using System;
using System.Collections;
using System.Collections.Generic;
using System.Collections.ObjectModel;
using System.ComponentModel;
using System.Diagnostics;
using System.Diagnostics.CodeAnalysis;
using System.IO;
using System.Reflection;
using System.Runtime.CompilerServices;
using System.Runtime.Serialization;
using System.Runtime.Versioning;
using System.Security;
using System.Security.Permissions;
using System.Text;
using Iced.Intel.BlockEncoderInternal;
using Iced.Intel.DecoderInternal;
using Iced.Intel.EncoderInternal;
using Iced.Intel.FastFormatterInternal;
using Iced.Intel.FormatterInternal;
using Iced.Intel.GasFormatterInternal;
using Iced.Intel.InstructionInfoInternal;
using Iced.Intel.IntelFormatterInternal;
using Iced.Intel.Internal;
using Iced.Intel.MasmFormatterInternal;
using Iced.Intel.NasmFormatterInternal;
using Microsoft.CodeAnalysis;

[assembly: CompilationRelaxations(8)]
[assembly: RuntimeCompatibility(WrapNonExceptionThrows = true)]
[assembly: Debuggable(DebuggableAttribute.DebuggingModes.IgnoreSymbolStoreSequencePoints)]
[assembly: TargetFramework(".NETStandard,Version=v2.1", FrameworkDisplayName = ".NET Standard 2.1")]
[assembly: AssemblyCompany("iced project and contributors <https://github.com/icedland>")]
[assembly: AssemblyConfiguration("Release")]
[assembly: AssemblyCopyright("Copyright (C) 2018-present iced project and contributors")]
[assembly: AssemblyDescription("x86/x64 disassembler, assembler, instruction decoder")]
[assembly: AssemblyFileVersion("1.18.0.0")]
[assembly: AssemblyInformationalVersion("1.18.0+2e21c4c1299f9f90b8fce53acb4710b6d474e46d")]
[assembly: AssemblyProduct("Iced")]
[assembly: AssemblyTitle("Iced")]
[assembly: AssemblyMetadata("RepositoryUrl", "https://github.com/icedland/iced")]
[assembly: SecurityPermission(SecurityAction.RequestMinimum, SkipVerification = true)]
[assembly: AssemblyVersion("1.18.0.0")]
[module: UnverifiableCode]
[module: RefSafetyRules(11)]
[module: System.Runtime.CompilerServices.NullablePublicOnly(false)]
namespace Microsoft.CodeAnalysis
{
	[CompilerGenerated]
	[Microsoft.CodeAnalysis.Embedded]
	internal sealed class EmbeddedAttribute : Attribute
	{
	}
}
namespace System.Runtime.CompilerServices
{
	[CompilerGenerated]
	[Microsoft.CodeAnalysis.Embedded]
	[AttributeUsage(AttributeTargets.Class | AttributeTargets.Property | AttributeTargets.Field | AttributeTargets.Event | AttributeTargets.Parameter | AttributeTargets.ReturnValue | AttributeTargets.GenericParameter, AllowMultiple = false, Inherited = false)]
	internal sealed class NullableAttribute : Attribute
	{
		public readonly byte[] NullableFlags;

		public NullableAttribute(byte P_0)
		{
			NullableFlags = new byte[1] { P_0 };
		}

		public NullableAttribute(byte[] P_0)
		{
			NullableFlags = P_0;
		}
	}
	[CompilerGenerated]
	[Microsoft.CodeAnalysis.Embedded]
	[AttributeUsage(AttributeTargets.Class | AttributeTargets.Struct | AttributeTargets.Method | AttributeTargets.Interface | AttributeTargets.Delegate, AllowMultiple = false, Inherited = false)]
	internal sealed class NullableContextAttribute : Attribute
	{
		public readonly byte Flag;

		public NullableContextAttribute(byte P_0)
		{
			Flag = P_0;
		}
	}
	[CompilerGenerated]
	[Microsoft.CodeAnalysis.Embedded]
	[AttributeUsage(AttributeTargets.Module, AllowMultiple = false, Inherited = false)]
	internal sealed class NullablePublicOnlyAttribute : Attribute
	{
		public readonly bool IncludesInternals;

		public NullablePublicOnlyAttribute(bool P_0)
		{
			IncludesInternals = P_0;
		}
	}
	[CompilerGenerated]
	[Microsoft.CodeAnalysis.Embedded]
	[AttributeUsage(AttributeTargets.Module, AllowMultiple = false, Inherited = false)]
	internal sealed class RefSafetyRulesAttribute : Attribute
	{
		public readonly int Version;

		public RefSafetyRulesAttribute(int P_0)
		{
			Version = P_0;
		}
	}
}
namespace Iced.Intel
{
	public class Assembler
	{
		[Flags]
		private enum PrefixFlags
		{
			None = 0,
			Lock = 1,
			Repe = 2,
			Repne = 4,
			Notrack = 8,
			PreferVex = 0x10,
			PreferEvex = 0x20
		}

		private readonly InstructionList instructions;

		private ulong currentLabelId;

		private Label currentLabel;

		private Label currentAnonLabel;

		private Label nextAnonLabel;

		private bool definedAnonLabel;

		private PrefixFlags prefixFlags;

		public int Bitness { get; }

		public bool PreferVex { get; set; }

		public bool PreferShortBranch { get; set; }

		internal bool InstructionPreferVex
		{
			get
			{
				if ((prefixFlags & (PrefixFlags.PreferVex | PrefixFlags.PreferEvex)) != 0)
				{
					return (prefixFlags & PrefixFlags.PreferVex) != 0;
				}
				return PreferVex;
			}
		}

		public IReadOnlyList<Instruction> Instructions => instructions;

		public Label CurrentLabel => currentLabel;

		[DebuggerBrowsable(DebuggerBrowsableState.Never)]
		public Label B
		{
			get
			{
				if (currentAnonLabel.IsEmpty)
				{
					throw new InvalidOperationException("No anonymous label has been created yet");
				}
				return currentAnonLabel;
			}
		}

		[DebuggerBrowsable(DebuggerBrowsableState.Never)]
		public Label F
		{
			get
			{
				if (nextAnonLabel.IsEmpty)
				{
					nextAnonLabel = CreateLabel();
				}
				return nextAnonLabel;
			}
		}

		[DebuggerBrowsable(DebuggerBrowsableState.Never)]
		public Assembler @lock
		{
			get
			{
				prefixFlags |= PrefixFlags.Lock;
				return this;
			}
		}

		[DebuggerBrowsable(DebuggerBrowsableState.Never)]
		public Assembler xacquire
		{
			get
			{
				prefixFlags |= PrefixFlags.Repne;
				return this;
			}
		}

		[DebuggerBrowsable(DebuggerBrowsableState.Never)]
		public Assembler xrelease
		{
			get
			{
				prefixFlags |= PrefixFlags.Repe;
				return this;
			}
		}

		[DebuggerBrowsable(DebuggerBrowsableState.Never)]
		public Assembler rep
		{
			get
			{
				prefixFlags |= PrefixFlags.Repe;
				return this;
			}
		}

		[DebuggerBrowsable(DebuggerBrowsableState.Never)]
		public Assembler repe
		{
			get
			{
				prefixFlags |= PrefixFlags.Repe;
				return this;
			}
		}

		[DebuggerBrowsable(DebuggerBrowsableState.Never)]
		public Assembler repz => repe;

		[DebuggerBrowsable(DebuggerBrowsableState.Never)]
		public Assembler repne
		{
			get
			{
				prefixFlags |= PrefixFlags.Repne;
				return this;
			}
		}

		[DebuggerBrowsable(DebuggerBrowsableState.Never)]
		public Assembler repnz => repne;

		[DebuggerBrowsable(DebuggerBrowsableState.Never)]
		public Assembler bnd
		{
			get
			{
				prefixFlags |= PrefixFlags.Repne;
				return this;
			}
		}

		[DebuggerBrowsable(DebuggerBrowsableState.Never)]
		public Assembler notrack
		{
			get
			{
				prefixFlags |= PrefixFlags.Notrack;
				return this;
			}
		}

		[DebuggerBrowsable(DebuggerBrowsableState.Never)]
		public Assembler vex
		{
			get
			{
				prefixFlags |= PrefixFlags.PreferVex;
				return this;
			}
		}

		[DebuggerBrowsable(DebuggerBrowsableState.Never)]
		public Assembler evex
		{
			get
			{
				prefixFlags |= PrefixFlags.PreferEvex;
				return this;
			}
		}

		public Assembler(int bitness)
		{
			if (bitness != 16 && bitness != 32 && bitness != 64)
			{
				throw new ArgumentOutOfRangeException("bitness");
			}
			Bitness = bitness;
			instructions = new InstructionList();
			currentLabelId = 0uL;
			currentLabel = default(Label);
			currentAnonLabel = default(Label);
			nextAnonLabel = default(Label);
			definedAnonLabel = false;
			prefixFlags = PrefixFlags.None;
			PreferVex = true;
			PreferShortBranch = true;
		}

		public void Reset()
		{
			instructions.Clear();
			currentLabelId = 0uL;
			currentLabel = default(Label);
			currentAnonLabel = default(Label);
			nextAnonLabel = default(Label);
			definedAnonLabel = false;
			prefixFlags = PrefixFlags.None;
		}

		public Label CreateLabel(string? name = null)
		{
			currentLabelId++;
			return new Label(name, currentLabelId);
		}

		public void Label(ref Label label)
		{
			if (label.IsEmpty)
			{
				throw new ArgumentException("Invalid label. Must be created via CreateLabel", "label");
			}
			if (label.InstructionIndex >= 0)
			{
				throw new ArgumentException($"Cannot reuse label. The specified label is already associated with an instruction at index {label.InstructionIndex}.", "label");
			}
			if (!currentLabel.IsEmpty)
			{
				throw new ArgumentException("At most one label per instruction is allowed");
			}
			label.InstructionIndex = instructions.Count;
			currentLabel = label;
		}

		public void AnonymousLabel()
		{
			if (definedAnonLabel)
			{
				throw new InvalidOperationException("At most one anonymous label per instruction is allowed");
			}
			if (nextAnonLabel.IsEmpty)
			{
				currentAnonLabel = CreateLabel();
			}
			else
			{
				currentAnonLabel = nextAnonLabel;
			}
			nextAnonLabel = default(Label);
			definedAnonLabel = true;
		}

		public void AddInstruction(Instruction instruction)
		{
			AddInstruction(ref instruction);
		}

		public void AddInstruction(ref Instruction instruction)
		{
			if (!currentLabel.IsEmpty && definedAnonLabel)
			{
				throw new InvalidOperationException("You can't create both an anonymous label and a normal label");
			}
			if (!currentLabel.IsEmpty)
			{
				instruction.IP = currentLabel.Id;
			}
			else if (definedAnonLabel)
			{
				instruction.IP = currentAnonLabel.Id;
			}
			if (prefixFlags != 0)
			{
				if ((prefixFlags & PrefixFlags.Lock) != 0)
				{
					instruction.HasLockPrefix = true;
				}
				if ((prefixFlags & PrefixFlags.Repe) != 0)
				{
					instruction.HasRepePrefix = true;
				}
				else if ((prefixFlags & PrefixFlags.Repne) != 0)
				{
					instruction.HasRepnePrefix = true;
				}
				if ((prefixFlags & PrefixFlags.Notrack) != 0)
				{
					instruction.SegmentPrefix = Register.DS;
				}
			}
			instructions.Add(in instruction);
			currentLabel = default(Label);
			definedAnonLabel = false;
			prefixFlags = PrefixFlags.None;
		}

		private void AddInstruction(Instruction instruction, AssemblerOperandFlags flags)
		{
			if (flags != 0)
			{
				if ((flags & AssemblerOperandFlags.Broadcast) != 0)
				{
					instruction.IsBroadcast = true;
				}
				if ((flags & AssemblerOperandFlags.Zeroing) != 0)
				{
					instruction.ZeroingMasking = true;
				}
				if ((flags & AssemblerOperandFlags.K7) != 0)
				{
					instruction.OpMask = (Register)(173 + ((int)(flags & AssemblerOperandFlags.K7) >> 6));
				}
				if ((flags & AssemblerOperandFlags.SuppressAllExceptions) != 0)
				{
					instruction.SuppressAllExceptions = true;
				}
				if ((flags & AssemblerOperandFlags.RoundingControlMask) != 0)
				{
					instruction.RoundingControl = (RoundingControl)((int)(flags & AssemblerOperandFlags.RoundingControlMask) >> 3);
				}
			}
			AddInstruction(ref instruction);
		}

		public void db(byte[] array)
		{
			if (array == null)
			{
				ThrowHelper.ThrowArgumentNullException_array();
			}
			db(array, 0, array.Length);
		}

		public void db(byte[] array, int index, int length)
		{
			if (array == null)
			{
				ThrowHelper.ThrowArgumentNullException_array();
			}
			if (index < 0)
			{
				ThrowHelper.ThrowArgumentOutOfRangeException_index();
			}
			if (length < 0 || (uint)(index + length) > (uint)array.Length)
			{
				ThrowHelper.ThrowArgumentOutOfRangeException_length();
			}
			int result;
			int num = Math.DivRem(length, 16, out result);
			int num2 = index;
			for (int i = 0; i < num; i++)
			{
				AddInstruction(Instruction.CreateDeclareByte(array, num2, 16));
				num2 += 16;
			}
			if (result > 0)
			{
				AddInstruction(Instruction.CreateDeclareByte(array, num2, result));
			}
		}

		public void db(ReadOnlySpan<byte> data)
		{
			int result;
			int num = Math.DivRem(data.Length, 16, out result);
			int num2 = 0;
			for (int i = 0; i < num; i++)
			{
				AddInstruction(Instruction.CreateDeclareByte(data.Slice(num2, 16)));
				num2 += 16;
			}
			if (result > 0)
			{
				AddInstruction(Instruction.CreateDeclareByte(data.Slice(num2, result)));
			}
		}

		public void call(ushort selector, uint offset)
		{
			AddInstruction(Instruction.CreateBranch((Bitness >= 32) ? Code.Call_ptr1632 : Code.Call_ptr1616, selector, offset));
		}

		public void jmp(ushort selector, uint offset)
		{
			AddInstruction(Instruction.CreateBranch((Bitness >= 32) ? Code.Jmp_ptr1632 : Code.Jmp_ptr1616, selector, offset));
		}

		public void xlatb()
		{
			MemoryOperand memory = new MemoryOperand(Bitness switch
			{
				64 => Register.RBX, 
				32 => Register.EBX, 
				_ => Register.BX, 
			}, Register.AL);
			AddInstruction(Instruction.Create(Code.Xlat_m8, in memory));
		}

		public void nop(int sizeInBytes)
		{
			if (sizeInBytes < 0)
			{
				throw new ArgumentOutOfRangeException("sizeInBytes");
			}
			if (prefixFlags != 0)
			{
				throw new InvalidOperationException("No prefixes are allowed");
			}
			if (sizeInBytes != 0)
			{
				int result;
				int num = Math.DivRem(sizeInBytes, 9, out result);
				for (int i = 0; i < num; i++)
				{
					AppendNop(9);
				}
				if (result > 0)
				{
					AppendNop(result);
				}
			}
			void AppendNop(int amount)
			{
				switch (amount)
				{
				case 1:
					db(144);
					break;
				case 2:
					db(102, 144);
					break;
				case 3:
					db(15, 31, 0);
					break;
				case 4:
					db(15, 31, 64, 0);
					break;
				case 5:
					if (Bitness != 16)
					{
						db(15, 31, 68, 0, 0);
					}
					else
					{
						db(15, 31, 128, 0, 0);
					}
					break;
				case 6:
					if (Bitness != 16)
					{
						db(102, 15, 31, 68, 0, 0);
					}
					else
					{
						db(102, 15, 31, 128, 0, 0);
					}
					break;
				case 7:
					if (Bitness != 16)
					{
						db(15, 31, 128, 0, 0, 0, 0);
					}
					else
					{
						db(103, 102, 15, 31, 68, 0, 0);
					}
					break;
				case 8:
					if (Bitness != 16)
					{
						db(15, 31, 132, 0, 0, 0, 0, 0);
					}
					else
					{
						db(103, 15, 31, 128, 0, 0, 0, 0);
					}
					break;
				case 9:
					if (Bitness != 16)
					{
						db(102, 15, 31, 132, 0, 0, 0, 0, 0);
					}
					else
					{
						db(103, 15, 31, 132, 0, 0, 0, 0, 0);
					}
					break;
				default:
					throw new InvalidOperationException();
				}
			}
		}

		public AssemblerResult Assemble(CodeWriter writer, ulong rip, BlockEncoderOptions options = BlockEncoderOptions.None)
		{
			if (!TryAssemble(writer, rip, out string errorMessage, out AssemblerResult assemblerResult, options))
			{
				throw new InvalidOperationException(errorMessage);
			}
			return assemblerResult;
		}

		public bool TryAssemble(CodeWriter writer, ulong rip, [NotNullWhen(false)] out string? errorMessage, out AssemblerResult assemblerResult, BlockEncoderOptions options = BlockEncoderOptions.None)
		{
			if (writer == null)
			{
				ThrowHelper.ThrowArgumentNullException_writer();
			}
			assemblerResult = default(AssemblerResult);
			if (prefixFlags != 0)
			{
				errorMessage = $"Unused prefixes {prefixFlags}. You must emit an instruction after using an instruction prefix.";
				return false;
			}
			if (!currentLabel.IsEmpty)
			{
				errorMessage = $"Unused label {currentLabel}. You must emit an instruction after emitting a label.";
				return false;
			}
			if (definedAnonLabel)
			{
				errorMessage = "Unused anonymous label. You must emit an instruction after emitting a label.";
				return false;
			}
			if (!nextAnonLabel.IsEmpty)
			{
				errorMessage = "Found an @F anonymous label reference but there was no call to AnonymousLabel";
				return false;
			}
			InstructionBlock[] blocks = new InstructionBlock[1]
			{
				new InstructionBlock(writer, instructions, rip)
			};
			if (BlockEncoder.TryEncode(Bitness, blocks, out errorMessage, out BlockEncoderResult[] result, options))
			{
				assemblerResult = new AssemblerResult(result);
				return true;
			}
			assemblerResult = new AssemblerResult(Array2.Empty<BlockEncoderResult>());
			return false;
		}

		private InvalidOperationException NoOpCodeFoundFor(Mnemonic mnemonic, params object[] argNames)
		{
			StringBuilder stringBuilder = new StringBuilder();
			stringBuilder.Append("Unable to calculate an OpCode for `" + mnemonic.ToString().ToLowerInvariant());
			for (int i = 0; i < argNames.Length; i++)
			{
				stringBuilder.Append((i == 0) ? " " : ", ");
				stringBuilder.Append(argNames[i]);
			}
			stringBuilder.Append($"`. Combination of arguments and/or current bitness {Bitness} is not compatible with any existing OpCode encoding.");
			return new InvalidOperationException(stringBuilder.ToString());
		}

		public void aaa()
		{
			AddInstruction(Instruction.Create(Code.Aaa));
		}

		public void aad(sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.Aad_imm8, imm));
		}

		public void aad(byte imm)
		{
			AddInstruction(Instruction.Create(Code.Aad_imm8, (uint)imm));
		}

		public void aadd(AssemblerMemoryOperand dst, AssemblerRegister32 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Aadd_m32_r32, in memory, src));
		}

		public void aadd(AssemblerMemoryOperand dst, AssemblerRegister64 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Aadd_m64_r64, in memory, src));
		}

		public void aam(sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.Aam_imm8, imm));
		}

		public void aam(byte imm)
		{
			AddInstruction(Instruction.Create(Code.Aam_imm8, (uint)imm));
		}

		public void aand(AssemblerMemoryOperand dst, AssemblerRegister32 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Aand_m32_r32, in memory, src));
		}

		public void aand(AssemblerMemoryOperand dst, AssemblerRegister64 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Aand_m64_r64, in memory, src));
		}

		public void aas()
		{
			AddInstruction(Instruction.Create(Code.Aas));
		}

		public void adc(AssemblerRegister8 dst, AssemblerRegister8 src)
		{
			AddInstruction(Instruction.Create(Code.Adc_rm8_r8, dst, src));
		}

		public void adc(AssemblerMemoryOperand dst, AssemblerRegister8 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Adc_rm8_r8, in memory, src));
		}

		public void adc(AssemblerRegister16 dst, AssemblerRegister16 src)
		{
			AddInstruction(Instruction.Create(Code.Adc_rm16_r16, dst, src));
		}

		public void adc(AssemblerMemoryOperand dst, AssemblerRegister16 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Adc_rm16_r16, in memory, src));
		}

		public void adc(AssemblerRegister32 dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.Adc_rm32_r32, dst, src));
		}

		public void adc(AssemblerMemoryOperand dst, AssemblerRegister32 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Adc_rm32_r32, in memory, src));
		}

		public void adc(AssemblerRegister64 dst, AssemblerRegister64 src)
		{
			AddInstruction(Instruction.Create(Code.Adc_rm64_r64, dst, src));
		}

		public void adc(AssemblerMemoryOperand dst, AssemblerRegister64 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Adc_rm64_r64, in memory, src));
		}

		public void adc(AssemblerRegister8 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Adc_r8_rm8, register, in memory));
		}

		public void adc(AssemblerRegister16 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Adc_r16_rm16, register, in memory));
		}

		public void adc(AssemblerRegister32 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Adc_r32_rm32, register, in memory));
		}

		public void adc(AssemblerRegister64 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Adc_r64_rm64, register, in memory));
		}

		public void adc(AssemblerRegister8 dst, sbyte imm)
		{
			Code code = (((Register)dst == Register.AL) ? Code.Adc_AL_imm8 : Code.Adc_rm8_imm8);
			AddInstruction(Instruction.Create(code, dst, imm));
		}

		public void adc(AssemblerRegister16 dst, short imm)
		{
			Code code = (((Register)dst != Register.AX) ? ((imm >= -128 && imm <= 127) ? Code.Adc_rm16_imm8 : Code.Adc_rm16_imm16) : Code.Adc_AX_imm16);
			AddInstruction(Instruction.Create(code, dst, imm));
		}

		public void adc(AssemblerRegister32 dst, int imm)
		{
			Code code = (((Register)dst != Register.EAX) ? ((imm >= -128 && imm <= 127) ? Code.Adc_rm32_imm8 : Code.Adc_rm32_imm32) : Code.Adc_EAX_imm32);
			AddInstruction(Instruction.Create(code, dst, imm));
		}

		public void adc(AssemblerRegister64 dst, int imm)
		{
			Code code = (((Register)dst != Register.RAX) ? ((imm >= -128 && imm <= 127) ? Code.Adc_rm64_imm8 : Code.Adc_rm64_imm32) : Code.Adc_RAX_imm32);
			AddInstruction(Instruction.Create(code, dst, imm));
		}

		public void adc(AssemblerMemoryOperand dst, int imm)
		{
			Code code;
			if (dst.Size == MemoryOperandSize.Qword)
			{
				code = ((imm >= -128 && imm <= 127) ? Code.Adc_rm64_imm8 : Code.Adc_rm64_imm32);
			}
			else if (dst.Size == MemoryOperandSize.Dword)
			{
				code = ((imm >= -128 && imm <= 127) ? Code.Adc_rm32_imm8 : Code.Adc_rm32_imm32);
			}
			else if (dst.Size == MemoryOperandSize.Word)
			{
				code = ((imm >= -128 && imm <= 127) ? Code.Adc_rm16_imm8 : Code.Adc_rm16_imm16);
			}
			else
			{
				if (dst.Size != MemoryOperandSize.Byte)
				{
					throw NoOpCodeFoundFor(Mnemonic.Adc, dst, imm);
				}
				code = Code.Adc_rm8_imm8;
			}
			Code code2 = code;
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, in memory, imm));
		}

		public void adc(AssemblerRegister8 dst, byte imm)
		{
			Code code = (((Register)dst == Register.AL) ? Code.Adc_AL_imm8 : Code.Adc_rm8_imm8);
			AddInstruction(Instruction.Create(code, (Register)dst, (uint)imm));
		}

		public void adc(AssemblerRegister16 dst, ushort imm)
		{
			Code code = (((Register)dst != Register.AX) ? ((imm <= 127 || (65408 <= imm && imm <= ushort.MaxValue)) ? Code.Adc_rm16_imm8 : Code.Adc_rm16_imm16) : Code.Adc_AX_imm16);
			AddInstruction(Instruction.Create(code, (Register)dst, (uint)imm));
		}

		public void adc(AssemblerRegister32 dst, uint imm)
		{
			Code code = (((Register)dst != Register.EAX) ? ((imm <= 127 || 4294967168u <= imm) ? Code.Adc_rm32_imm8 : Code.Adc_rm32_imm32) : Code.Adc_EAX_imm32);
			AddInstruction(Instruction.Create(code, dst, imm));
		}

		public void adc(AssemblerMemoryOperand dst, uint imm)
		{
			Code code;
			if (dst.Size == MemoryOperandSize.Dword)
			{
				code = ((imm <= 127 || 4294967168u <= imm) ? Code.Adc_rm32_imm8 : Code.Adc_rm32_imm32);
			}
			else if (dst.Size == MemoryOperandSize.Word)
			{
				code = ((imm <= 127 || (65408 <= imm && imm <= 65535)) ? Code.Adc_rm16_imm8 : Code.Adc_rm16_imm16);
			}
			else
			{
				if (dst.Size != MemoryOperandSize.Byte)
				{
					throw NoOpCodeFoundFor(Mnemonic.Adc, dst, imm);
				}
				code = Code.Adc_rm8_imm8;
			}
			Code code2 = code;
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, in memory, imm));
		}

		public void adcx(AssemblerRegister32 dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.Adcx_r32_rm32, dst, src));
		}

		public void adcx(AssemblerRegister64 dst, AssemblerRegister64 src)
		{
			AddInstruction(Instruction.Create(Code.Adcx_r64_rm64, dst, src));
		}

		public void adcx(AssemblerRegister32 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Adcx_r32_rm32, register, in memory));
		}

		public void adcx(AssemblerRegister64 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Adcx_r64_rm64, register, in memory));
		}

		public void add(AssemblerRegister8 dst, AssemblerRegister8 src)
		{
			AddInstruction(Instruction.Create(Code.Add_rm8_r8, dst, src));
		}

		public void add(AssemblerMemoryOperand dst, AssemblerRegister8 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Add_rm8_r8, in memory, src));
		}

		public void add(AssemblerRegister16 dst, AssemblerRegister16 src)
		{
			AddInstruction(Instruction.Create(Code.Add_rm16_r16, dst, src));
		}

		public void add(AssemblerMemoryOperand dst, AssemblerRegister16 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Add_rm16_r16, in memory, src));
		}

		public void add(AssemblerRegister32 dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.Add_rm32_r32, dst, src));
		}

		public void add(AssemblerMemoryOperand dst, AssemblerRegister32 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Add_rm32_r32, in memory, src));
		}

		public void add(AssemblerRegister64 dst, AssemblerRegister64 src)
		{
			AddInstruction(Instruction.Create(Code.Add_rm64_r64, dst, src));
		}

		public void add(AssemblerMemoryOperand dst, AssemblerRegister64 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Add_rm64_r64, in memory, src));
		}

		public void add(AssemblerRegister8 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Add_r8_rm8, register, in memory));
		}

		public void add(AssemblerRegister16 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Add_r16_rm16, register, in memory));
		}

		public void add(AssemblerRegister32 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Add_r32_rm32, register, in memory));
		}

		public void add(AssemblerRegister64 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Add_r64_rm64, register, in memory));
		}

		public void add(AssemblerRegister8 dst, sbyte imm)
		{
			Code code = (((Register)dst == Register.AL) ? Code.Add_AL_imm8 : Code.Add_rm8_imm8);
			AddInstruction(Instruction.Create(code, dst, imm));
		}

		public void add(AssemblerRegister16 dst, short imm)
		{
			Code code = (((Register)dst != Register.AX) ? ((imm >= -128 && imm <= 127) ? Code.Add_rm16_imm8 : Code.Add_rm16_imm16) : Code.Add_AX_imm16);
			AddInstruction(Instruction.Create(code, dst, imm));
		}

		public void add(AssemblerRegister32 dst, int imm)
		{
			Code code = (((Register)dst != Register.EAX) ? ((imm >= -128 && imm <= 127) ? Code.Add_rm32_imm8 : Code.Add_rm32_imm32) : Code.Add_EAX_imm32);
			AddInstruction(Instruction.Create(code, dst, imm));
		}

		public void add(AssemblerRegister64 dst, int imm)
		{
			Code code = (((Register)dst != Register.RAX) ? ((imm >= -128 && imm <= 127) ? Code.Add_rm64_imm8 : Code.Add_rm64_imm32) : Code.Add_RAX_imm32);
			AddInstruction(Instruction.Create(code, dst, imm));
		}

		public void add(AssemblerMemoryOperand dst, int imm)
		{
			Code code;
			if (dst.Size == MemoryOperandSize.Qword)
			{
				code = ((imm >= -128 && imm <= 127) ? Code.Add_rm64_imm8 : Code.Add_rm64_imm32);
			}
			else if (dst.Size == MemoryOperandSize.Dword)
			{
				code = ((imm >= -128 && imm <= 127) ? Code.Add_rm32_imm8 : Code.Add_rm32_imm32);
			}
			else if (dst.Size == MemoryOperandSize.Word)
			{
				code = ((imm >= -128 && imm <= 127) ? Code.Add_rm16_imm8 : Code.Add_rm16_imm16);
			}
			else
			{
				if (dst.Size != MemoryOperandSize.Byte)
				{
					throw NoOpCodeFoundFor(Mnemonic.Add, dst, imm);
				}
				code = Code.Add_rm8_imm8;
			}
			Code code2 = code;
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, in memory, imm));
		}

		public void add(AssemblerRegister8 dst, byte imm)
		{
			Code code = (((Register)dst == Register.AL) ? Code.Add_AL_imm8 : Code.Add_rm8_imm8);
			AddInstruction(Instruction.Create(code, (Register)dst, (uint)imm));
		}

		public void add(AssemblerRegister16 dst, ushort imm)
		{
			Code code = (((Register)dst != Register.AX) ? ((imm <= 127 || (65408 <= imm && imm <= ushort.MaxValue)) ? Code.Add_rm16_imm8 : Code.Add_rm16_imm16) : Code.Add_AX_imm16);
			AddInstruction(Instruction.Create(code, (Register)dst, (uint)imm));
		}

		public void add(AssemblerRegister32 dst, uint imm)
		{
			Code code = (((Register)dst != Register.EAX) ? ((imm <= 127 || 4294967168u <= imm) ? Code.Add_rm32_imm8 : Code.Add_rm32_imm32) : Code.Add_EAX_imm32);
			AddInstruction(Instruction.Create(code, dst, imm));
		}

		public void add(AssemblerMemoryOperand dst, uint imm)
		{
			Code code;
			if (dst.Size == MemoryOperandSize.Dword)
			{
				code = ((imm <= 127 || 4294967168u <= imm) ? Code.Add_rm32_imm8 : Code.Add_rm32_imm32);
			}
			else if (dst.Size == MemoryOperandSize.Word)
			{
				code = ((imm <= 127 || (65408 <= imm && imm <= 65535)) ? Code.Add_rm16_imm8 : Code.Add_rm16_imm16);
			}
			else
			{
				if (dst.Size != MemoryOperandSize.Byte)
				{
					throw NoOpCodeFoundFor(Mnemonic.Add, dst, imm);
				}
				code = Code.Add_rm8_imm8;
			}
			Code code2 = code;
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, in memory, imm));
		}

		public void addpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Addpd_xmm_xmmm128, dst, src));
		}

		public void addpd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Addpd_xmm_xmmm128, register, in memory));
		}

		public void addps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Addps_xmm_xmmm128, dst, src));
		}

		public void addps(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Addps_xmm_xmmm128, register, in memory));
		}

		public void addsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Addsd_xmm_xmmm64, dst, src));
		}

		public void addsd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Addsd_xmm_xmmm64, register, in memory));
		}

		public void addss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Addss_xmm_xmmm32, dst, src));
		}

		public void addss(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Addss_xmm_xmmm32, register, in memory));
		}

		public void addsubpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Addsubpd_xmm_xmmm128, dst, src));
		}

		public void addsubpd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Addsubpd_xmm_xmmm128, register, in memory));
		}

		public void addsubps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Addsubps_xmm_xmmm128, dst, src));
		}

		public void addsubps(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Addsubps_xmm_xmmm128, register, in memory));
		}

		public void adox(AssemblerRegister32 dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.Adox_r32_rm32, dst, src));
		}

		public void adox(AssemblerRegister64 dst, AssemblerRegister64 src)
		{
			AddInstruction(Instruction.Create(Code.Adox_r64_rm64, dst, src));
		}

		public void adox(AssemblerRegister32 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Adox_r32_rm32, register, in memory));
		}

		public void adox(AssemblerRegister64 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Adox_r64_rm64, register, in memory));
		}

		public void aesdec(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Aesdec_xmm_xmmm128, dst, src));
		}

		public void aesdec(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Aesdec_xmm_xmmm128, register, in memory));
		}

		public void aesdec128kl(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Aesdec128kl_xmm_m384, register, in memory));
		}

		public void aesdec256kl(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Aesdec256kl_xmm_m512, register, in memory));
		}

		public void aesdeclast(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Aesdeclast_xmm_xmmm128, dst, src));
		}

		public void aesdeclast(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Aesdeclast_xmm_xmmm128, register, in memory));
		}

		public void aesdecwide128kl(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Aesdecwide128kl_m384, in memory));
		}

		public void aesdecwide256kl(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Aesdecwide256kl_m512, in memory));
		}

		public void aesenc(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Aesenc_xmm_xmmm128, dst, src));
		}

		public void aesenc(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Aesenc_xmm_xmmm128, register, in memory));
		}

		public void aesenc128kl(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Aesenc128kl_xmm_m384, register, in memory));
		}

		public void aesenc256kl(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Aesenc256kl_xmm_m512, register, in memory));
		}

		public void aesenclast(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Aesenclast_xmm_xmmm128, dst, src));
		}

		public void aesenclast(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Aesenclast_xmm_xmmm128, register, in memory));
		}

		public void aesencwide128kl(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Aesencwide128kl_m384, in memory));
		}

		public void aesencwide256kl(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Aesencwide256kl_m512, in memory));
		}

		public void aesimc(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Aesimc_xmm_xmmm128, dst, src));
		}

		public void aesimc(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Aesimc_xmm_xmmm128, register, in memory));
		}

		public void aeskeygenassist(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.Aeskeygenassist_xmm_xmmm128_imm8, dst, src1, imm));
		}

		public void aeskeygenassist(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Aeskeygenassist_xmm_xmmm128_imm8, register, in memory, imm));
		}

		public void aeskeygenassist(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.Aeskeygenassist_xmm_xmmm128_imm8, (Register)dst, (Register)src1, (uint)imm));
		}

		public void aeskeygenassist(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Aeskeygenassist_xmm_xmmm128_imm8, register, in memory, (uint)imm));
		}

		public void altinst()
		{
			AddInstruction(Instruction.Create(Code.Altinst));
		}

		public void and(AssemblerRegister8 dst, AssemblerRegister8 src)
		{
			AddInstruction(Instruction.Create(Code.And_rm8_r8, dst, src));
		}

		public void and(AssemblerMemoryOperand dst, AssemblerRegister8 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.And_rm8_r8, in memory, src));
		}

		public void and(AssemblerRegister16 dst, AssemblerRegister16 src)
		{
			AddInstruction(Instruction.Create(Code.And_rm16_r16, dst, src));
		}

		public void and(AssemblerMemoryOperand dst, AssemblerRegister16 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.And_rm16_r16, in memory, src));
		}

		public void and(AssemblerRegister32 dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.And_rm32_r32, dst, src));
		}

		public void and(AssemblerMemoryOperand dst, AssemblerRegister32 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.And_rm32_r32, in memory, src));
		}

		public void and(AssemblerRegister64 dst, AssemblerRegister64 src)
		{
			AddInstruction(Instruction.Create(Code.And_rm64_r64, dst, src));
		}

		public void and(AssemblerMemoryOperand dst, AssemblerRegister64 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.And_rm64_r64, in memory, src));
		}

		public void and(AssemblerRegister8 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.And_r8_rm8, register, in memory));
		}

		public void and(AssemblerRegister16 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.And_r16_rm16, register, in memory));
		}

		public void and(AssemblerRegister32 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.And_r32_rm32, register, in memory));
		}

		public void and(AssemblerRegister64 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.And_r64_rm64, register, in memory));
		}

		public void and(AssemblerRegister8 dst, sbyte imm)
		{
			Code code = (((Register)dst == Register.AL) ? Code.And_AL_imm8 : Code.And_rm8_imm8);
			AddInstruction(Instruction.Create(code, dst, imm));
		}

		public void and(AssemblerRegister16 dst, short imm)
		{
			Code code = (((Register)dst != Register.AX) ? ((imm >= -128 && imm <= 127) ? Code.And_rm16_imm8 : Code.And_rm16_imm16) : Code.And_AX_imm16);
			AddInstruction(Instruction.Create(code, dst, imm));
		}

		public void and(AssemblerRegister32 dst, int imm)
		{
			Code code = (((Register)dst != Register.EAX) ? ((imm >= -128 && imm <= 127) ? Code.And_rm32_imm8 : Code.And_rm32_imm32) : Code.And_EAX_imm32);
			AddInstruction(Instruction.Create(code, dst, imm));
		}

		public void and(AssemblerRegister64 dst, int imm)
		{
			Code code = (((Register)dst != Register.RAX) ? ((imm >= -128 && imm <= 127) ? Code.And_rm64_imm8 : Code.And_rm64_imm32) : Code.And_RAX_imm32);
			AddInstruction(Instruction.Create(code, dst, imm));
		}

		public void and(AssemblerMemoryOperand dst, int imm)
		{
			Code code;
			if (dst.Size == MemoryOperandSize.Qword)
			{
				code = ((imm >= -128 && imm <= 127) ? Code.And_rm64_imm8 : Code.And_rm64_imm32);
			}
			else if (dst.Size == MemoryOperandSize.Dword)
			{
				code = ((imm >= -128 && imm <= 127) ? Code.And_rm32_imm8 : Code.And_rm32_imm32);
			}
			else if (dst.Size == MemoryOperandSize.Word)
			{
				code = ((imm >= -128 && imm <= 127) ? Code.And_rm16_imm8 : Code.And_rm16_imm16);
			}
			else
			{
				if (dst.Size != MemoryOperandSize.Byte)
				{
					throw NoOpCodeFoundFor(Mnemonic.And, dst, imm);
				}
				code = Code.And_rm8_imm8;
			}
			Code code2 = code;
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, in memory, imm));
		}

		public void and(AssemblerRegister8 dst, byte imm)
		{
			Code code = (((Register)dst == Register.AL) ? Code.And_AL_imm8 : Code.And_rm8_imm8);
			AddInstruction(Instruction.Create(code, (Register)dst, (uint)imm));
		}

		public void and(AssemblerRegister16 dst, ushort imm)
		{
			Code code = (((Register)dst != Register.AX) ? ((imm <= 127 || (65408 <= imm && imm <= ushort.MaxValue)) ? Code.And_rm16_imm8 : Code.And_rm16_imm16) : Code.And_AX_imm16);
			AddInstruction(Instruction.Create(code, (Register)dst, (uint)imm));
		}

		public void and(AssemblerRegister32 dst, uint imm)
		{
			Code code = (((Register)dst != Register.EAX) ? ((imm <= 127 || 4294967168u <= imm) ? Code.And_rm32_imm8 : Code.And_rm32_imm32) : Code.And_EAX_imm32);
			AddInstruction(Instruction.Create(code, dst, imm));
		}

		public void and(AssemblerMemoryOperand dst, uint imm)
		{
			Code code;
			if (dst.Size == MemoryOperandSize.Dword)
			{
				code = ((imm <= 127 || 4294967168u <= imm) ? Code.And_rm32_imm8 : Code.And_rm32_imm32);
			}
			else if (dst.Size == MemoryOperandSize.Word)
			{
				code = ((imm <= 127 || (65408 <= imm && imm <= 65535)) ? Code.And_rm16_imm8 : Code.And_rm16_imm16);
			}
			else
			{
				if (dst.Size != MemoryOperandSize.Byte)
				{
					throw NoOpCodeFoundFor(Mnemonic.And, dst, imm);
				}
				code = Code.And_rm8_imm8;
			}
			Code code2 = code;
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, in memory, imm));
		}

		public void andn(AssemblerRegister32 dst, AssemblerRegister32 src1, AssemblerRegister32 src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Andn_r32_r32_rm32, dst, src1, src2));
		}

		public void andn(AssemblerRegister64 dst, AssemblerRegister64 src1, AssemblerRegister64 src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Andn_r64_r64_rm64, dst, src1, src2));
		}

		public void andn(AssemblerRegister32 dst, AssemblerRegister32 src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Andn_r32_r32_rm32, register, register2, in memory));
		}

		public void andn(AssemblerRegister64 dst, AssemblerRegister64 src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Andn_r64_r64_rm64, register, register2, in memory));
		}

		public void andnpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Andnpd_xmm_xmmm128, dst, src));
		}

		public void andnpd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Andnpd_xmm_xmmm128, register, in memory));
		}

		public void andnps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Andnps_xmm_xmmm128, dst, src));
		}

		public void andnps(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Andnps_xmm_xmmm128, register, in memory));
		}

		public void andpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Andpd_xmm_xmmm128, dst, src));
		}

		public void andpd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Andpd_xmm_xmmm128, register, in memory));
		}

		public void andps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Andps_xmm_xmmm128, dst, src));
		}

		public void andps(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Andps_xmm_xmmm128, register, in memory));
		}

		public void aor(AssemblerMemoryOperand dst, AssemblerRegister32 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Aor_m32_r32, in memory, src));
		}

		public void aor(AssemblerMemoryOperand dst, AssemblerRegister64 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Aor_m64_r64, in memory, src));
		}

		public void arpl(AssemblerRegister16 dst, AssemblerRegister16 src)
		{
			AddInstruction(Instruction.Create(Code.Arpl_rm16_r16, dst, src));
		}

		public void arpl(AssemblerMemoryOperand dst, AssemblerRegister16 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Arpl_rm16_r16, in memory, src));
		}

		public void arpl(AssemblerRegister32 dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.Arpl_r32m16_r32, dst, src));
		}

		public void arpl(AssemblerMemoryOperand dst, AssemblerRegister32 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Arpl_r32m16_r32, in memory, src));
		}

		public void axor(AssemblerMemoryOperand dst, AssemblerRegister32 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Axor_m32_r32, in memory, src));
		}

		public void axor(AssemblerMemoryOperand dst, AssemblerRegister64 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Axor_m64_r64, in memory, src));
		}

		public void bb0_reset()
		{
			AddInstruction(Instruction.Create(Code.Bb0_reset));
		}

		public void bb1_reset()
		{
			AddInstruction(Instruction.Create(Code.Bb1_reset));
		}

		public void bextr(AssemblerRegister32 dst, AssemblerRegister32 src1, AssemblerRegister32 src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Bextr_r32_rm32_r32, dst, src1, src2));
		}

		public void bextr(AssemblerRegister32 dst, AssemblerMemoryOperand src1, AssemblerRegister32 src2)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Bextr_r32_rm32_r32, register, in memory, src2));
		}

		public void bextr(AssemblerRegister64 dst, AssemblerRegister64 src1, AssemblerRegister64 src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Bextr_r64_rm64_r64, dst, src1, src2));
		}

		public void bextr(AssemblerRegister64 dst, AssemblerMemoryOperand src1, AssemblerRegister64 src2)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Bextr_r64_rm64_r64, register, in memory, src2));
		}

		public void bextr(AssemblerRegister32 dst, AssemblerRegister32 src1, int imm)
		{
			AddInstruction(Instruction.Create(Code.XOP_Bextr_r32_rm32_imm32, dst, src1, imm));
		}

		public void bextr(AssemblerRegister64 dst, AssemblerRegister64 src1, int imm)
		{
			AddInstruction(Instruction.Create(Code.XOP_Bextr_r64_rm64_imm32, dst, src1, imm));
		}

		public void bextr(AssemblerRegister32 dst, AssemblerMemoryOperand src1, int imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Bextr_r32_rm32_imm32, register, in memory, imm));
		}

		public void bextr(AssemblerRegister64 dst, AssemblerMemoryOperand src1, int imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Bextr_r64_rm64_imm32, register, in memory, imm));
		}

		public void bextr(AssemblerRegister32 dst, AssemblerRegister32 src1, uint imm)
		{
			AddInstruction(Instruction.Create(Code.XOP_Bextr_r32_rm32_imm32, dst, src1, imm));
		}

		public void bextr(AssemblerRegister64 dst, AssemblerRegister64 src1, uint imm)
		{
			AddInstruction(Instruction.Create(Code.XOP_Bextr_r64_rm64_imm32, dst, src1, imm));
		}

		public void bextr(AssemblerRegister32 dst, AssemblerMemoryOperand src1, uint imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Bextr_r32_rm32_imm32, register, in memory, imm));
		}

		public void bextr(AssemblerRegister64 dst, AssemblerMemoryOperand src1, uint imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Bextr_r64_rm64_imm32, register, in memory, imm));
		}

		public void blcfill(AssemblerRegister32 dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.XOP_Blcfill_r32_rm32, dst, src));
		}

		public void blcfill(AssemblerRegister64 dst, AssemblerRegister64 src)
		{
			AddInstruction(Instruction.Create(Code.XOP_Blcfill_r64_rm64, dst, src));
		}

		public void blcfill(AssemblerRegister32 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Blcfill_r32_rm32, register, in memory));
		}

		public void blcfill(AssemblerRegister64 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Blcfill_r64_rm64, register, in memory));
		}

		public void blci(AssemblerRegister32 dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.XOP_Blci_r32_rm32, dst, src));
		}

		public void blci(AssemblerRegister64 dst, AssemblerRegister64 src)
		{
			AddInstruction(Instruction.Create(Code.XOP_Blci_r64_rm64, dst, src));
		}

		public void blci(AssemblerRegister32 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Blci_r32_rm32, register, in memory));
		}

		public void blci(AssemblerRegister64 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Blci_r64_rm64, register, in memory));
		}

		public void blcic(AssemblerRegister32 dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.XOP_Blcic_r32_rm32, dst, src));
		}

		public void blcic(AssemblerRegister64 dst, AssemblerRegister64 src)
		{
			AddInstruction(Instruction.Create(Code.XOP_Blcic_r64_rm64, dst, src));
		}

		public void blcic(AssemblerRegister32 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Blcic_r32_rm32, register, in memory));
		}

		public void blcic(AssemblerRegister64 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Blcic_r64_rm64, register, in memory));
		}

		public void blcmsk(AssemblerRegister32 dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.XOP_Blcmsk_r32_rm32, dst, src));
		}

		public void blcmsk(AssemblerRegister64 dst, AssemblerRegister64 src)
		{
			AddInstruction(Instruction.Create(Code.XOP_Blcmsk_r64_rm64, dst, src));
		}

		public void blcmsk(AssemblerRegister32 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Blcmsk_r32_rm32, register, in memory));
		}

		public void blcmsk(AssemblerRegister64 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Blcmsk_r64_rm64, register, in memory));
		}

		public void blcs(AssemblerRegister32 dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.XOP_Blcs_r32_rm32, dst, src));
		}

		public void blcs(AssemblerRegister64 dst, AssemblerRegister64 src)
		{
			AddInstruction(Instruction.Create(Code.XOP_Blcs_r64_rm64, dst, src));
		}

		public void blcs(AssemblerRegister32 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Blcs_r32_rm32, register, in memory));
		}

		public void blcs(AssemblerRegister64 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Blcs_r64_rm64, register, in memory));
		}

		public void blendpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.Blendpd_xmm_xmmm128_imm8, dst, src1, imm));
		}

		public void blendpd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Blendpd_xmm_xmmm128_imm8, register, in memory, imm));
		}

		public void blendpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.Blendpd_xmm_xmmm128_imm8, (Register)dst, (Register)src1, (uint)imm));
		}

		public void blendpd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Blendpd_xmm_xmmm128_imm8, register, in memory, (uint)imm));
		}

		public void blendps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.Blendps_xmm_xmmm128_imm8, dst, src1, imm));
		}

		public void blendps(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Blendps_xmm_xmmm128_imm8, register, in memory, imm));
		}

		public void blendps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.Blendps_xmm_xmmm128_imm8, (Register)dst, (Register)src1, (uint)imm));
		}

		public void blendps(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Blendps_xmm_xmmm128_imm8, register, in memory, (uint)imm));
		}

		public void blendvpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Blendvpd_xmm_xmmm128, dst, src));
		}

		public void blendvpd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Blendvpd_xmm_xmmm128, register, in memory));
		}

		public void blendvps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Blendvps_xmm_xmmm128, dst, src));
		}

		public void blendvps(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Blendvps_xmm_xmmm128, register, in memory));
		}

		public void blsfill(AssemblerRegister32 dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.XOP_Blsfill_r32_rm32, dst, src));
		}

		public void blsfill(AssemblerRegister64 dst, AssemblerRegister64 src)
		{
			AddInstruction(Instruction.Create(Code.XOP_Blsfill_r64_rm64, dst, src));
		}

		public void blsfill(AssemblerRegister32 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Blsfill_r32_rm32, register, in memory));
		}

		public void blsfill(AssemblerRegister64 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Blsfill_r64_rm64, register, in memory));
		}

		public void blsi(AssemblerRegister32 dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.VEX_Blsi_r32_rm32, dst, src));
		}

		public void blsi(AssemblerRegister64 dst, AssemblerRegister64 src)
		{
			AddInstruction(Instruction.Create(Code.VEX_Blsi_r64_rm64, dst, src));
		}

		public void blsi(AssemblerRegister32 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Blsi_r32_rm32, register, in memory));
		}

		public void blsi(AssemblerRegister64 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Blsi_r64_rm64, register, in memory));
		}

		public void blsic(AssemblerRegister32 dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.XOP_Blsic_r32_rm32, dst, src));
		}

		public void blsic(AssemblerRegister64 dst, AssemblerRegister64 src)
		{
			AddInstruction(Instruction.Create(Code.XOP_Blsic_r64_rm64, dst, src));
		}

		public void blsic(AssemblerRegister32 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Blsic_r32_rm32, register, in memory));
		}

		public void blsic(AssemblerRegister64 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Blsic_r64_rm64, register, in memory));
		}

		public void blsmsk(AssemblerRegister32 dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.VEX_Blsmsk_r32_rm32, dst, src));
		}

		public void blsmsk(AssemblerRegister64 dst, AssemblerRegister64 src)
		{
			AddInstruction(Instruction.Create(Code.VEX_Blsmsk_r64_rm64, dst, src));
		}

		public void blsmsk(AssemblerRegister32 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Blsmsk_r32_rm32, register, in memory));
		}

		public void blsmsk(AssemblerRegister64 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Blsmsk_r64_rm64, register, in memory));
		}

		public void blsr(AssemblerRegister32 dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.VEX_Blsr_r32_rm32, dst, src));
		}

		public void blsr(AssemblerRegister64 dst, AssemblerRegister64 src)
		{
			AddInstruction(Instruction.Create(Code.VEX_Blsr_r64_rm64, dst, src));
		}

		public void blsr(AssemblerRegister32 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Blsr_r32_rm32, register, in memory));
		}

		public void blsr(AssemblerRegister64 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Blsr_r64_rm64, register, in memory));
		}

		public void bndcl(AssemblerRegisterBND dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.Bndcl_bnd_rm32, dst, src));
		}

		public void bndcl(AssemblerRegisterBND dst, AssemblerRegister64 src)
		{
			AddInstruction(Instruction.Create(Code.Bndcl_bnd_rm64, dst, src));
		}

		public void bndcl(AssemblerRegisterBND dst, AssemblerMemoryOperand src)
		{
			Code code;
			if (src.Size == MemoryOperandSize.Qword)
			{
				code = Code.Bndcl_bnd_rm64;
			}
			else
			{
				if (src.Size != MemoryOperandSize.Dword)
				{
					throw NoOpCodeFoundFor(Mnemonic.Bndcl, dst, src);
				}
				code = Code.Bndcl_bnd_rm32;
			}
			Code code2 = code;
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, register, in memory));
		}

		public void bndcn(AssemblerRegisterBND dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.Bndcn_bnd_rm32, dst, src));
		}

		public void bndcn(AssemblerRegisterBND dst, AssemblerRegister64 src)
		{
			AddInstruction(Instruction.Create(Code.Bndcn_bnd_rm64, dst, src));
		}

		public void bndcn(AssemblerRegisterBND dst, AssemblerMemoryOperand src)
		{
			Code code;
			if (src.Size == MemoryOperandSize.Qword)
			{
				code = Code.Bndcn_bnd_rm64;
			}
			else
			{
				if (src.Size != MemoryOperandSize.Dword)
				{
					throw NoOpCodeFoundFor(Mnemonic.Bndcn, dst, src);
				}
				code = Code.Bndcn_bnd_rm32;
			}
			Code code2 = code;
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, register, in memory));
		}

		public void bndcu(AssemblerRegisterBND dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.Bndcu_bnd_rm32, dst, src));
		}

		public void bndcu(AssemblerRegisterBND dst, AssemblerRegister64 src)
		{
			AddInstruction(Instruction.Create(Code.Bndcu_bnd_rm64, dst, src));
		}

		public void bndcu(AssemblerRegisterBND dst, AssemblerMemoryOperand src)
		{
			Code code;
			if (src.Size == MemoryOperandSize.Qword)
			{
				code = Code.Bndcu_bnd_rm64;
			}
			else
			{
				if (src.Size != MemoryOperandSize.Dword)
				{
					throw NoOpCodeFoundFor(Mnemonic.Bndcu, dst, src);
				}
				code = Code.Bndcu_bnd_rm32;
			}
			Code code2 = code;
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, register, in memory));
		}

		public void bndldx(AssemblerRegisterBND dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Bndldx_bnd_mib, register, in memory));
		}

		public void bndmk(AssemblerRegisterBND dst, AssemblerMemoryOperand src)
		{
			Code code;
			if (src.Size == MemoryOperandSize.Qword)
			{
				code = Code.Bndmk_bnd_m64;
			}
			else
			{
				if (src.Size != MemoryOperandSize.Dword)
				{
					throw NoOpCodeFoundFor(Mnemonic.Bndmk, dst, src);
				}
				code = Code.Bndmk_bnd_m32;
			}
			Code code2 = code;
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, register, in memory));
		}

		public void bndmov(AssemblerRegisterBND dst, AssemblerRegisterBND src)
		{
			Code code = ((Bitness == 64) ? Code.Bndmov_bnd_bndm128 : Code.Bndmov_bnd_bndm64);
			AddInstruction(Instruction.Create(code, dst, src));
		}

		public void bndmov(AssemblerMemoryOperand dst, AssemblerRegisterBND src)
		{
			Code code = ((Bitness == 64) ? Code.Bndmov_bndm128_bnd : Code.Bndmov_bndm64_bnd);
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, in memory, src));
		}

		public void bndmov(AssemblerRegisterBND dst, AssemblerMemoryOperand src)
		{
			Code code = ((Bitness == 64) ? Code.Bndmov_bnd_bndm128 : Code.Bndmov_bnd_bndm64);
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory));
		}

		public void bndstx(AssemblerMemoryOperand dst, AssemblerRegisterBND src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Bndstx_mib_bnd, in memory, src));
		}

		public void bound(AssemblerRegister16 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Bound_r16_m1616, register, in memory));
		}

		public void bound(AssemblerRegister32 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Bound_r32_m3232, register, in memory));
		}

		public void bsf(AssemblerRegister16 dst, AssemblerRegister16 src)
		{
			AddInstruction(Instruction.Create(Code.Bsf_r16_rm16, dst, src));
		}

		public void bsf(AssemblerRegister32 dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.Bsf_r32_rm32, dst, src));
		}

		public void bsf(AssemblerRegister64 dst, AssemblerRegister64 src)
		{
			AddInstruction(Instruction.Create(Code.Bsf_r64_rm64, dst, src));
		}

		public void bsf(AssemblerRegister16 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Bsf_r16_rm16, register, in memory));
		}

		public void bsf(AssemblerRegister32 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Bsf_r32_rm32, register, in memory));
		}

		public void bsf(AssemblerRegister64 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Bsf_r64_rm64, register, in memory));
		}

		public void bsr(AssemblerRegister16 dst, AssemblerRegister16 src)
		{
			AddInstruction(Instruction.Create(Code.Bsr_r16_rm16, dst, src));
		}

		public void bsr(AssemblerRegister32 dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.Bsr_r32_rm32, dst, src));
		}

		public void bsr(AssemblerRegister64 dst, AssemblerRegister64 src)
		{
			AddInstruction(Instruction.Create(Code.Bsr_r64_rm64, dst, src));
		}

		public void bsr(AssemblerRegister16 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Bsr_r16_rm16, register, in memory));
		}

		public void bsr(AssemblerRegister32 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Bsr_r32_rm32, register, in memory));
		}

		public void bsr(AssemblerRegister64 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Bsr_r64_rm64, register, in memory));
		}

		public void bswap(AssemblerRegister16 dst)
		{
			AddInstruction(Instruction.Create(Code.Bswap_r16, dst));
		}

		public void bswap(AssemblerRegister32 dst)
		{
			AddInstruction(Instruction.Create(Code.Bswap_r32, dst));
		}

		public void bswap(AssemblerRegister64 dst)
		{
			AddInstruction(Instruction.Create(Code.Bswap_r64, dst));
		}

		public void bt(AssemblerRegister16 dst, AssemblerRegister16 src)
		{
			AddInstruction(Instruction.Create(Code.Bt_rm16_r16, dst, src));
		}

		public void bt(AssemblerMemoryOperand dst, AssemblerRegister16 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Bt_rm16_r16, in memory, src));
		}

		public void bt(AssemblerRegister32 dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.Bt_rm32_r32, dst, src));
		}

		public void bt(AssemblerMemoryOperand dst, AssemblerRegister32 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Bt_rm32_r32, in memory, src));
		}

		public void bt(AssemblerRegister64 dst, AssemblerRegister64 src)
		{
			AddInstruction(Instruction.Create(Code.Bt_rm64_r64, dst, src));
		}

		public void bt(AssemblerMemoryOperand dst, AssemblerRegister64 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Bt_rm64_r64, in memory, src));
		}

		public void bt(AssemblerRegister16 dst, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.Bt_rm16_imm8, dst, imm));
		}

		public void bt(AssemblerRegister32 dst, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.Bt_rm32_imm8, dst, imm));
		}

		public void bt(AssemblerRegister64 dst, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.Bt_rm64_imm8, dst, imm));
		}

		public void bt(AssemblerMemoryOperand dst, sbyte imm)
		{
			Code code;
			if (dst.Size == MemoryOperandSize.Qword)
			{
				code = Code.Bt_rm64_imm8;
			}
			else if (dst.Size == MemoryOperandSize.Dword)
			{
				code = Code.Bt_rm32_imm8;
			}
			else
			{
				if (dst.Size != MemoryOperandSize.Word)
				{
					throw NoOpCodeFoundFor(Mnemonic.Bt, dst, imm);
				}
				code = Code.Bt_rm16_imm8;
			}
			Code code2 = code;
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, in memory, imm));
		}

		public void bt(AssemblerRegister16 dst, byte imm)
		{
			AddInstruction(Instruction.Create(Code.Bt_rm16_imm8, (Register)dst, (uint)imm));
		}

		public void bt(AssemblerRegister32 dst, byte imm)
		{
			AddInstruction(Instruction.Create(Code.Bt_rm32_imm8, (Register)dst, (uint)imm));
		}

		public void bt(AssemblerRegister64 dst, byte imm)
		{
			AddInstruction(Instruction.Create(Code.Bt_rm64_imm8, (Register)dst, (uint)imm));
		}

		public void bt(AssemblerMemoryOperand dst, byte imm)
		{
			Code code;
			if (dst.Size == MemoryOperandSize.Qword)
			{
				code = Code.Bt_rm64_imm8;
			}
			else if (dst.Size == MemoryOperandSize.Dword)
			{
				code = Code.Bt_rm32_imm8;
			}
			else
			{
				if (dst.Size != MemoryOperandSize.Word)
				{
					throw NoOpCodeFoundFor(Mnemonic.Bt, dst, imm);
				}
				code = Code.Bt_rm16_imm8;
			}
			Code code2 = code;
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, in memory, (uint)imm));
		}

		public void btc(AssemblerRegister16 dst, AssemblerRegister16 src)
		{
			AddInstruction(Instruction.Create(Code.Btc_rm16_r16, dst, src));
		}

		public void btc(AssemblerMemoryOperand dst, AssemblerRegister16 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Btc_rm16_r16, in memory, src));
		}

		public void btc(AssemblerRegister32 dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.Btc_rm32_r32, dst, src));
		}

		public void btc(AssemblerMemoryOperand dst, AssemblerRegister32 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Btc_rm32_r32, in memory, src));
		}

		public void btc(AssemblerRegister64 dst, AssemblerRegister64 src)
		{
			AddInstruction(Instruction.Create(Code.Btc_rm64_r64, dst, src));
		}

		public void btc(AssemblerMemoryOperand dst, AssemblerRegister64 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Btc_rm64_r64, in memory, src));
		}

		public void btc(AssemblerRegister16 dst, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.Btc_rm16_imm8, dst, imm));
		}

		public void btc(AssemblerRegister32 dst, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.Btc_rm32_imm8, dst, imm));
		}

		public void btc(AssemblerRegister64 dst, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.Btc_rm64_imm8, dst, imm));
		}

		public void btc(AssemblerMemoryOperand dst, sbyte imm)
		{
			Code code;
			if (dst.Size == MemoryOperandSize.Qword)
			{
				code = Code.Btc_rm64_imm8;
			}
			else if (dst.Size == MemoryOperandSize.Dword)
			{
				code = Code.Btc_rm32_imm8;
			}
			else
			{
				if (dst.Size != MemoryOperandSize.Word)
				{
					throw NoOpCodeFoundFor(Mnemonic.Btc, dst, imm);
				}
				code = Code.Btc_rm16_imm8;
			}
			Code code2 = code;
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, in memory, imm));
		}

		public void btc(AssemblerRegister16 dst, byte imm)
		{
			AddInstruction(Instruction.Create(Code.Btc_rm16_imm8, (Register)dst, (uint)imm));
		}

		public void btc(AssemblerRegister32 dst, byte imm)
		{
			AddInstruction(Instruction.Create(Code.Btc_rm32_imm8, (Register)dst, (uint)imm));
		}

		public void btc(AssemblerRegister64 dst, byte imm)
		{
			AddInstruction(Instruction.Create(Code.Btc_rm64_imm8, (Register)dst, (uint)imm));
		}

		public void btc(AssemblerMemoryOperand dst, byte imm)
		{
			Code code;
			if (dst.Size == MemoryOperandSize.Qword)
			{
				code = Code.Btc_rm64_imm8;
			}
			else if (dst.Size == MemoryOperandSize.Dword)
			{
				code = Code.Btc_rm32_imm8;
			}
			else
			{
				if (dst.Size != MemoryOperandSize.Word)
				{
					throw NoOpCodeFoundFor(Mnemonic.Btc, dst, imm);
				}
				code = Code.Btc_rm16_imm8;
			}
			Code code2 = code;
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, in memory, (uint)imm));
		}

		public void btr(AssemblerRegister16 dst, AssemblerRegister16 src)
		{
			AddInstruction(Instruction.Create(Code.Btr_rm16_r16, dst, src));
		}

		public void btr(AssemblerMemoryOperand dst, AssemblerRegister16 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Btr_rm16_r16, in memory, src));
		}

		public void btr(AssemblerRegister32 dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.Btr_rm32_r32, dst, src));
		}

		public void btr(AssemblerMemoryOperand dst, AssemblerRegister32 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Btr_rm32_r32, in memory, src));
		}

		public void btr(AssemblerRegister64 dst, AssemblerRegister64 src)
		{
			AddInstruction(Instruction.Create(Code.Btr_rm64_r64, dst, src));
		}

		public void btr(AssemblerMemoryOperand dst, AssemblerRegister64 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Btr_rm64_r64, in memory, src));
		}

		public void btr(AssemblerRegister16 dst, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.Btr_rm16_imm8, dst, imm));
		}

		public void btr(AssemblerRegister32 dst, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.Btr_rm32_imm8, dst, imm));
		}

		public void btr(AssemblerRegister64 dst, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.Btr_rm64_imm8, dst, imm));
		}

		public void btr(AssemblerMemoryOperand dst, sbyte imm)
		{
			Code code;
			if (dst.Size == MemoryOperandSize.Qword)
			{
				code = Code.Btr_rm64_imm8;
			}
			else if (dst.Size == MemoryOperandSize.Dword)
			{
				code = Code.Btr_rm32_imm8;
			}
			else
			{
				if (dst.Size != MemoryOperandSize.Word)
				{
					throw NoOpCodeFoundFor(Mnemonic.Btr, dst, imm);
				}
				code = Code.Btr_rm16_imm8;
			}
			Code code2 = code;
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, in memory, imm));
		}

		public void btr(AssemblerRegister16 dst, byte imm)
		{
			AddInstruction(Instruction.Create(Code.Btr_rm16_imm8, (Register)dst, (uint)imm));
		}

		public void btr(AssemblerRegister32 dst, byte imm)
		{
			AddInstruction(Instruction.Create(Code.Btr_rm32_imm8, (Register)dst, (uint)imm));
		}

		public void btr(AssemblerRegister64 dst, byte imm)
		{
			AddInstruction(Instruction.Create(Code.Btr_rm64_imm8, (Register)dst, (uint)imm));
		}

		public void btr(AssemblerMemoryOperand dst, byte imm)
		{
			Code code;
			if (dst.Size == MemoryOperandSize.Qword)
			{
				code = Code.Btr_rm64_imm8;
			}
			else if (dst.Size == MemoryOperandSize.Dword)
			{
				code = Code.Btr_rm32_imm8;
			}
			else
			{
				if (dst.Size != MemoryOperandSize.Word)
				{
					throw NoOpCodeFoundFor(Mnemonic.Btr, dst, imm);
				}
				code = Code.Btr_rm16_imm8;
			}
			Code code2 = code;
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, in memory, (uint)imm));
		}

		public void bts(AssemblerRegister16 dst, AssemblerRegister16 src)
		{
			AddInstruction(Instruction.Create(Code.Bts_rm16_r16, dst, src));
		}

		public void bts(AssemblerMemoryOperand dst, AssemblerRegister16 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Bts_rm16_r16, in memory, src));
		}

		public void bts(AssemblerRegister32 dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.Bts_rm32_r32, dst, src));
		}

		public void bts(AssemblerMemoryOperand dst, AssemblerRegister32 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Bts_rm32_r32, in memory, src));
		}

		public void bts(AssemblerRegister64 dst, AssemblerRegister64 src)
		{
			AddInstruction(Instruction.Create(Code.Bts_rm64_r64, dst, src));
		}

		public void bts(AssemblerMemoryOperand dst, AssemblerRegister64 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Bts_rm64_r64, in memory, src));
		}

		public void bts(AssemblerRegister16 dst, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.Bts_rm16_imm8, dst, imm));
		}

		public void bts(AssemblerRegister32 dst, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.Bts_rm32_imm8, dst, imm));
		}

		public void bts(AssemblerRegister64 dst, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.Bts_rm64_imm8, dst, imm));
		}

		public void bts(AssemblerMemoryOperand dst, sbyte imm)
		{
			Code code;
			if (dst.Size == MemoryOperandSize.Qword)
			{
				code = Code.Bts_rm64_imm8;
			}
			else if (dst.Size == MemoryOperandSize.Dword)
			{
				code = Code.Bts_rm32_imm8;
			}
			else
			{
				if (dst.Size != MemoryOperandSize.Word)
				{
					throw NoOpCodeFoundFor(Mnemonic.Bts, dst, imm);
				}
				code = Code.Bts_rm16_imm8;
			}
			Code code2 = code;
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, in memory, imm));
		}

		public void bts(AssemblerRegister16 dst, byte imm)
		{
			AddInstruction(Instruction.Create(Code.Bts_rm16_imm8, (Register)dst, (uint)imm));
		}

		public void bts(AssemblerRegister32 dst, byte imm)
		{
			AddInstruction(Instruction.Create(Code.Bts_rm32_imm8, (Register)dst, (uint)imm));
		}

		public void bts(AssemblerRegister64 dst, byte imm)
		{
			AddInstruction(Instruction.Create(Code.Bts_rm64_imm8, (Register)dst, (uint)imm));
		}

		public void bts(AssemblerMemoryOperand dst, byte imm)
		{
			Code code;
			if (dst.Size == MemoryOperandSize.Qword)
			{
				code = Code.Bts_rm64_imm8;
			}
			else if (dst.Size == MemoryOperandSize.Dword)
			{
				code = Code.Bts_rm32_imm8;
			}
			else
			{
				if (dst.Size != MemoryOperandSize.Word)
				{
					throw NoOpCodeFoundFor(Mnemonic.Bts, dst, imm);
				}
				code = Code.Bts_rm16_imm8;
			}
			Code code2 = code;
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, in memory, (uint)imm));
		}

		public void bzhi(AssemblerRegister32 dst, AssemblerRegister32 src1, AssemblerRegister32 src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Bzhi_r32_rm32_r32, dst, src1, src2));
		}

		public void bzhi(AssemblerRegister32 dst, AssemblerMemoryOperand src1, AssemblerRegister32 src2)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Bzhi_r32_rm32_r32, register, in memory, src2));
		}

		public void bzhi(AssemblerRegister64 dst, AssemblerRegister64 src1, AssemblerRegister64 src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Bzhi_r64_rm64_r64, dst, src1, src2));
		}

		public void bzhi(AssemblerRegister64 dst, AssemblerMemoryOperand src1, AssemblerRegister64 src2)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Bzhi_r64_rm64_r64, register, in memory, src2));
		}

		public void call(AssemblerRegister16 dst)
		{
			AddInstruction(Instruction.Create(Code.Call_rm16, dst));
		}

		public void call(AssemblerRegister32 dst)
		{
			AddInstruction(Instruction.Create(Code.Call_rm32, dst));
		}

		public void call(AssemblerRegister64 dst)
		{
			AddInstruction(Instruction.Create(Code.Call_rm64, dst));
		}

		public void call(AssemblerMemoryOperand dst)
		{
			Code code;
			if (dst.Size == MemoryOperandSize.Tbyte)
			{
				code = Code.Call_m1664;
			}
			else if (dst.Size == MemoryOperandSize.Qword)
			{
				code = Code.Call_rm64;
			}
			else if (dst.Size == MemoryOperandSize.Fword)
			{
				code = Code.Call_m1632;
			}
			else if (dst.Size == MemoryOperandSize.Dword)
			{
				code = ((Bitness >= 32) ? Code.Call_rm32 : Code.Call_m1616);
			}
			else
			{
				if (dst.Size != MemoryOperandSize.Word)
				{
					throw NoOpCodeFoundFor(Mnemonic.Call, dst);
				}
				code = Code.Call_rm16;
			}
			Code code2 = code;
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, in memory));
		}

		public void call(Label dst)
		{
			Code code = ((Bitness != 64) ? ((Bitness >= 32) ? Code.Call_rel32_32 : Code.Call_rel16) : Code.Call_rel32_64);
			AddInstruction(Instruction.CreateBranch(code, dst.Id));
		}

		public void call(ulong dst)
		{
			Code code = ((Bitness != 64) ? ((Bitness >= 32) ? Code.Call_rel32_32 : Code.Call_rel16) : Code.Call_rel32_64);
			AddInstruction(Instruction.CreateBranch(code, dst));
		}

		public void cbw()
		{
			AddInstruction(Instruction.Create(Code.Cbw));
		}

		public void ccs_encrypt()
		{
			Code code = ((Bitness != 64) ? ((Bitness >= 32) ? Code.Ccs_encrypt_32 : Code.Ccs_encrypt_16) : Code.Ccs_encrypt_64);
			AddInstruction(Instruction.Create(code));
		}

		public void ccs_hash()
		{
			Code code = ((Bitness != 64) ? ((Bitness >= 32) ? Code.Ccs_hash_32 : Code.Ccs_hash_16) : Code.Ccs_hash_64);
			AddInstruction(Instruction.Create(code));
		}

		public void cdq()
		{
			AddInstruction(Instruction.Create(Code.Cdq));
		}

		public void cdqe()
		{
			AddInstruction(Instruction.Create(Code.Cdqe));
		}

		public void cl1invmb()
		{
			AddInstruction(Instruction.Create(Code.Cl1invmb));
		}

		public void clac()
		{
			AddInstruction(Instruction.Create(Code.Clac));
		}

		public void clc()
		{
			AddInstruction(Instruction.Create(Code.Clc));
		}

		public void cld()
		{
			AddInstruction(Instruction.Create(Code.Cld));
		}

		public void cldemote(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cldemote_m8, in memory));
		}

		public void clflush(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Clflush_m8, in memory));
		}

		public void clflushopt(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Clflushopt_m8, in memory));
		}

		public void clgi()
		{
			AddInstruction(Instruction.Create(Code.Clgi));
		}

		public void cli()
		{
			AddInstruction(Instruction.Create(Code.Cli));
		}

		public void clrssbsy(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Clrssbsy_m64, in memory));
		}

		public void clts()
		{
			AddInstruction(Instruction.Create(Code.Clts));
		}

		public void clui()
		{
			AddInstruction(Instruction.Create(Code.Clui));
		}

		public void clwb(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Clwb_m8, in memory));
		}

		public void clzero()
		{
			Code code = ((Bitness != 64) ? ((Bitness >= 32) ? Code.Clzerod : Code.Clzerow) : Code.Clzeroq);
			AddInstruction(Instruction.Create(code));
		}

		public void cmc()
		{
			AddInstruction(Instruction.Create(Code.Cmc));
		}

		public void cmova(AssemblerRegister16 dst, AssemblerRegister16 src)
		{
			AddInstruction(Instruction.Create(Code.Cmova_r16_rm16, dst, src));
		}

		public void cmova(AssemblerRegister32 dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.Cmova_r32_rm32, dst, src));
		}

		public void cmova(AssemblerRegister64 dst, AssemblerRegister64 src)
		{
			AddInstruction(Instruction.Create(Code.Cmova_r64_rm64, dst, src));
		}

		public void cmova(AssemblerRegister16 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmova_r16_rm16, register, in memory));
		}

		public void cmova(AssemblerRegister32 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmova_r32_rm32, register, in memory));
		}

		public void cmova(AssemblerRegister64 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmova_r64_rm64, register, in memory));
		}

		public void cmovae(AssemblerRegister16 dst, AssemblerRegister16 src)
		{
			AddInstruction(Instruction.Create(Code.Cmovae_r16_rm16, dst, src));
		}

		public void cmovae(AssemblerRegister32 dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.Cmovae_r32_rm32, dst, src));
		}

		public void cmovae(AssemblerRegister64 dst, AssemblerRegister64 src)
		{
			AddInstruction(Instruction.Create(Code.Cmovae_r64_rm64, dst, src));
		}

		public void cmovae(AssemblerRegister16 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmovae_r16_rm16, register, in memory));
		}

		public void cmovae(AssemblerRegister32 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmovae_r32_rm32, register, in memory));
		}

		public void cmovae(AssemblerRegister64 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmovae_r64_rm64, register, in memory));
		}

		public void cmovb(AssemblerRegister16 dst, AssemblerRegister16 src)
		{
			AddInstruction(Instruction.Create(Code.Cmovb_r16_rm16, dst, src));
		}

		public void cmovb(AssemblerRegister32 dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.Cmovb_r32_rm32, dst, src));
		}

		public void cmovb(AssemblerRegister64 dst, AssemblerRegister64 src)
		{
			AddInstruction(Instruction.Create(Code.Cmovb_r64_rm64, dst, src));
		}

		public void cmovb(AssemblerRegister16 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmovb_r16_rm16, register, in memory));
		}

		public void cmovb(AssemblerRegister32 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmovb_r32_rm32, register, in memory));
		}

		public void cmovb(AssemblerRegister64 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmovb_r64_rm64, register, in memory));
		}

		public void cmovbe(AssemblerRegister16 dst, AssemblerRegister16 src)
		{
			AddInstruction(Instruction.Create(Code.Cmovbe_r16_rm16, dst, src));
		}

		public void cmovbe(AssemblerRegister32 dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.Cmovbe_r32_rm32, dst, src));
		}

		public void cmovbe(AssemblerRegister64 dst, AssemblerRegister64 src)
		{
			AddInstruction(Instruction.Create(Code.Cmovbe_r64_rm64, dst, src));
		}

		public void cmovbe(AssemblerRegister16 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmovbe_r16_rm16, register, in memory));
		}

		public void cmovbe(AssemblerRegister32 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmovbe_r32_rm32, register, in memory));
		}

		public void cmovbe(AssemblerRegister64 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmovbe_r64_rm64, register, in memory));
		}

		public void cmovc(AssemblerRegister16 dst, AssemblerRegister16 src)
		{
			AddInstruction(Instruction.Create(Code.Cmovb_r16_rm16, dst, src));
		}

		public void cmovc(AssemblerRegister32 dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.Cmovb_r32_rm32, dst, src));
		}

		public void cmovc(AssemblerRegister64 dst, AssemblerRegister64 src)
		{
			AddInstruction(Instruction.Create(Code.Cmovb_r64_rm64, dst, src));
		}

		public void cmovc(AssemblerRegister16 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmovb_r16_rm16, register, in memory));
		}

		public void cmovc(AssemblerRegister32 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmovb_r32_rm32, register, in memory));
		}

		public void cmovc(AssemblerRegister64 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmovb_r64_rm64, register, in memory));
		}

		public void cmove(AssemblerRegister16 dst, AssemblerRegister16 src)
		{
			AddInstruction(Instruction.Create(Code.Cmove_r16_rm16, dst, src));
		}

		public void cmove(AssemblerRegister32 dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.Cmove_r32_rm32, dst, src));
		}

		public void cmove(AssemblerRegister64 dst, AssemblerRegister64 src)
		{
			AddInstruction(Instruction.Create(Code.Cmove_r64_rm64, dst, src));
		}

		public void cmove(AssemblerRegister16 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmove_r16_rm16, register, in memory));
		}

		public void cmove(AssemblerRegister32 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmove_r32_rm32, register, in memory));
		}

		public void cmove(AssemblerRegister64 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmove_r64_rm64, register, in memory));
		}

		public void cmovg(AssemblerRegister16 dst, AssemblerRegister16 src)
		{
			AddInstruction(Instruction.Create(Code.Cmovg_r16_rm16, dst, src));
		}

		public void cmovg(AssemblerRegister32 dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.Cmovg_r32_rm32, dst, src));
		}

		public void cmovg(AssemblerRegister64 dst, AssemblerRegister64 src)
		{
			AddInstruction(Instruction.Create(Code.Cmovg_r64_rm64, dst, src));
		}

		public void cmovg(AssemblerRegister16 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmovg_r16_rm16, register, in memory));
		}

		public void cmovg(AssemblerRegister32 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmovg_r32_rm32, register, in memory));
		}

		public void cmovg(AssemblerRegister64 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmovg_r64_rm64, register, in memory));
		}

		public void cmovge(AssemblerRegister16 dst, AssemblerRegister16 src)
		{
			AddInstruction(Instruction.Create(Code.Cmovge_r16_rm16, dst, src));
		}

		public void cmovge(AssemblerRegister32 dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.Cmovge_r32_rm32, dst, src));
		}

		public void cmovge(AssemblerRegister64 dst, AssemblerRegister64 src)
		{
			AddInstruction(Instruction.Create(Code.Cmovge_r64_rm64, dst, src));
		}

		public void cmovge(AssemblerRegister16 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmovge_r16_rm16, register, in memory));
		}

		public void cmovge(AssemblerRegister32 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmovge_r32_rm32, register, in memory));
		}

		public void cmovge(AssemblerRegister64 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmovge_r64_rm64, register, in memory));
		}

		public void cmovl(AssemblerRegister16 dst, AssemblerRegister16 src)
		{
			AddInstruction(Instruction.Create(Code.Cmovl_r16_rm16, dst, src));
		}

		public void cmovl(AssemblerRegister32 dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.Cmovl_r32_rm32, dst, src));
		}

		public void cmovl(AssemblerRegister64 dst, AssemblerRegister64 src)
		{
			AddInstruction(Instruction.Create(Code.Cmovl_r64_rm64, dst, src));
		}

		public void cmovl(AssemblerRegister16 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmovl_r16_rm16, register, in memory));
		}

		public void cmovl(AssemblerRegister32 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmovl_r32_rm32, register, in memory));
		}

		public void cmovl(AssemblerRegister64 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmovl_r64_rm64, register, in memory));
		}

		public void cmovle(AssemblerRegister16 dst, AssemblerRegister16 src)
		{
			AddInstruction(Instruction.Create(Code.Cmovle_r16_rm16, dst, src));
		}

		public void cmovle(AssemblerRegister32 dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.Cmovle_r32_rm32, dst, src));
		}

		public void cmovle(AssemblerRegister64 dst, AssemblerRegister64 src)
		{
			AddInstruction(Instruction.Create(Code.Cmovle_r64_rm64, dst, src));
		}

		public void cmovle(AssemblerRegister16 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmovle_r16_rm16, register, in memory));
		}

		public void cmovle(AssemblerRegister32 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmovle_r32_rm32, register, in memory));
		}

		public void cmovle(AssemblerRegister64 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmovle_r64_rm64, register, in memory));
		}

		public void cmovna(AssemblerRegister16 dst, AssemblerRegister16 src)
		{
			AddInstruction(Instruction.Create(Code.Cmovbe_r16_rm16, dst, src));
		}

		public void cmovna(AssemblerRegister32 dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.Cmovbe_r32_rm32, dst, src));
		}

		public void cmovna(AssemblerRegister64 dst, AssemblerRegister64 src)
		{
			AddInstruction(Instruction.Create(Code.Cmovbe_r64_rm64, dst, src));
		}

		public void cmovna(AssemblerRegister16 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmovbe_r16_rm16, register, in memory));
		}

		public void cmovna(AssemblerRegister32 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmovbe_r32_rm32, register, in memory));
		}

		public void cmovna(AssemblerRegister64 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmovbe_r64_rm64, register, in memory));
		}

		public void cmovnae(AssemblerRegister16 dst, AssemblerRegister16 src)
		{
			AddInstruction(Instruction.Create(Code.Cmovb_r16_rm16, dst, src));
		}

		public void cmovnae(AssemblerRegister32 dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.Cmovb_r32_rm32, dst, src));
		}

		public void cmovnae(AssemblerRegister64 dst, AssemblerRegister64 src)
		{
			AddInstruction(Instruction.Create(Code.Cmovb_r64_rm64, dst, src));
		}

		public void cmovnae(AssemblerRegister16 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmovb_r16_rm16, register, in memory));
		}

		public void cmovnae(AssemblerRegister32 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmovb_r32_rm32, register, in memory));
		}

		public void cmovnae(AssemblerRegister64 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmovb_r64_rm64, register, in memory));
		}

		public void cmovnb(AssemblerRegister16 dst, AssemblerRegister16 src)
		{
			AddInstruction(Instruction.Create(Code.Cmovae_r16_rm16, dst, src));
		}

		public void cmovnb(AssemblerRegister32 dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.Cmovae_r32_rm32, dst, src));
		}

		public void cmovnb(AssemblerRegister64 dst, AssemblerRegister64 src)
		{
			AddInstruction(Instruction.Create(Code.Cmovae_r64_rm64, dst, src));
		}

		public void cmovnb(AssemblerRegister16 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmovae_r16_rm16, register, in memory));
		}

		public void cmovnb(AssemblerRegister32 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmovae_r32_rm32, register, in memory));
		}

		public void cmovnb(AssemblerRegister64 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmovae_r64_rm64, register, in memory));
		}

		public void cmovnbe(AssemblerRegister16 dst, AssemblerRegister16 src)
		{
			AddInstruction(Instruction.Create(Code.Cmova_r16_rm16, dst, src));
		}

		public void cmovnbe(AssemblerRegister32 dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.Cmova_r32_rm32, dst, src));
		}

		public void cmovnbe(AssemblerRegister64 dst, AssemblerRegister64 src)
		{
			AddInstruction(Instruction.Create(Code.Cmova_r64_rm64, dst, src));
		}

		public void cmovnbe(AssemblerRegister16 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmova_r16_rm16, register, in memory));
		}

		public void cmovnbe(AssemblerRegister32 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmova_r32_rm32, register, in memory));
		}

		public void cmovnbe(AssemblerRegister64 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmova_r64_rm64, register, in memory));
		}

		public void cmovnc(AssemblerRegister16 dst, AssemblerRegister16 src)
		{
			AddInstruction(Instruction.Create(Code.Cmovae_r16_rm16, dst, src));
		}

		public void cmovnc(AssemblerRegister32 dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.Cmovae_r32_rm32, dst, src));
		}

		public void cmovnc(AssemblerRegister64 dst, AssemblerRegister64 src)
		{
			AddInstruction(Instruction.Create(Code.Cmovae_r64_rm64, dst, src));
		}

		public void cmovnc(AssemblerRegister16 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmovae_r16_rm16, register, in memory));
		}

		public void cmovnc(AssemblerRegister32 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmovae_r32_rm32, register, in memory));
		}

		public void cmovnc(AssemblerRegister64 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmovae_r64_rm64, register, in memory));
		}

		public void cmovne(AssemblerRegister16 dst, AssemblerRegister16 src)
		{
			AddInstruction(Instruction.Create(Code.Cmovne_r16_rm16, dst, src));
		}

		public void cmovne(AssemblerRegister32 dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.Cmovne_r32_rm32, dst, src));
		}

		public void cmovne(AssemblerRegister64 dst, AssemblerRegister64 src)
		{
			AddInstruction(Instruction.Create(Code.Cmovne_r64_rm64, dst, src));
		}

		public void cmovne(AssemblerRegister16 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmovne_r16_rm16, register, in memory));
		}

		public void cmovne(AssemblerRegister32 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmovne_r32_rm32, register, in memory));
		}

		public void cmovne(AssemblerRegister64 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmovne_r64_rm64, register, in memory));
		}

		public void cmovng(AssemblerRegister16 dst, AssemblerRegister16 src)
		{
			AddInstruction(Instruction.Create(Code.Cmovle_r16_rm16, dst, src));
		}

		public void cmovng(AssemblerRegister32 dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.Cmovle_r32_rm32, dst, src));
		}

		public void cmovng(AssemblerRegister64 dst, AssemblerRegister64 src)
		{
			AddInstruction(Instruction.Create(Code.Cmovle_r64_rm64, dst, src));
		}

		public void cmovng(AssemblerRegister16 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmovle_r16_rm16, register, in memory));
		}

		public void cmovng(AssemblerRegister32 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmovle_r32_rm32, register, in memory));
		}

		public void cmovng(AssemblerRegister64 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmovle_r64_rm64, register, in memory));
		}

		public void cmovnge(AssemblerRegister16 dst, AssemblerRegister16 src)
		{
			AddInstruction(Instruction.Create(Code.Cmovl_r16_rm16, dst, src));
		}

		public void cmovnge(AssemblerRegister32 dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.Cmovl_r32_rm32, dst, src));
		}

		public void cmovnge(AssemblerRegister64 dst, AssemblerRegister64 src)
		{
			AddInstruction(Instruction.Create(Code.Cmovl_r64_rm64, dst, src));
		}

		public void cmovnge(AssemblerRegister16 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmovl_r16_rm16, register, in memory));
		}

		public void cmovnge(AssemblerRegister32 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmovl_r32_rm32, register, in memory));
		}

		public void cmovnge(AssemblerRegister64 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmovl_r64_rm64, register, in memory));
		}

		public void cmovnl(AssemblerRegister16 dst, AssemblerRegister16 src)
		{
			AddInstruction(Instruction.Create(Code.Cmovge_r16_rm16, dst, src));
		}

		public void cmovnl(AssemblerRegister32 dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.Cmovge_r32_rm32, dst, src));
		}

		public void cmovnl(AssemblerRegister64 dst, AssemblerRegister64 src)
		{
			AddInstruction(Instruction.Create(Code.Cmovge_r64_rm64, dst, src));
		}

		public void cmovnl(AssemblerRegister16 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmovge_r16_rm16, register, in memory));
		}

		public void cmovnl(AssemblerRegister32 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmovge_r32_rm32, register, in memory));
		}

		public void cmovnl(AssemblerRegister64 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmovge_r64_rm64, register, in memory));
		}

		public void cmovnle(AssemblerRegister16 dst, AssemblerRegister16 src)
		{
			AddInstruction(Instruction.Create(Code.Cmovg_r16_rm16, dst, src));
		}

		public void cmovnle(AssemblerRegister32 dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.Cmovg_r32_rm32, dst, src));
		}

		public void cmovnle(AssemblerRegister64 dst, AssemblerRegister64 src)
		{
			AddInstruction(Instruction.Create(Code.Cmovg_r64_rm64, dst, src));
		}

		public void cmovnle(AssemblerRegister16 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmovg_r16_rm16, register, in memory));
		}

		public void cmovnle(AssemblerRegister32 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmovg_r32_rm32, register, in memory));
		}

		public void cmovnle(AssemblerRegister64 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmovg_r64_rm64, register, in memory));
		}

		public void cmovno(AssemblerRegister16 dst, AssemblerRegister16 src)
		{
			AddInstruction(Instruction.Create(Code.Cmovno_r16_rm16, dst, src));
		}

		public void cmovno(AssemblerRegister32 dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.Cmovno_r32_rm32, dst, src));
		}

		public void cmovno(AssemblerRegister64 dst, AssemblerRegister64 src)
		{
			AddInstruction(Instruction.Create(Code.Cmovno_r64_rm64, dst, src));
		}

		public void cmovno(AssemblerRegister16 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmovno_r16_rm16, register, in memory));
		}

		public void cmovno(AssemblerRegister32 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmovno_r32_rm32, register, in memory));
		}

		public void cmovno(AssemblerRegister64 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmovno_r64_rm64, register, in memory));
		}

		public void cmovnp(AssemblerRegister16 dst, AssemblerRegister16 src)
		{
			AddInstruction(Instruction.Create(Code.Cmovnp_r16_rm16, dst, src));
		}

		public void cmovnp(AssemblerRegister32 dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.Cmovnp_r32_rm32, dst, src));
		}

		public void cmovnp(AssemblerRegister64 dst, AssemblerRegister64 src)
		{
			AddInstruction(Instruction.Create(Code.Cmovnp_r64_rm64, dst, src));
		}

		public void cmovnp(AssemblerRegister16 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmovnp_r16_rm16, register, in memory));
		}

		public void cmovnp(AssemblerRegister32 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmovnp_r32_rm32, register, in memory));
		}

		public void cmovnp(AssemblerRegister64 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmovnp_r64_rm64, register, in memory));
		}

		public void cmovns(AssemblerRegister16 dst, AssemblerRegister16 src)
		{
			AddInstruction(Instruction.Create(Code.Cmovns_r16_rm16, dst, src));
		}

		public void cmovns(AssemblerRegister32 dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.Cmovns_r32_rm32, dst, src));
		}

		public void cmovns(AssemblerRegister64 dst, AssemblerRegister64 src)
		{
			AddInstruction(Instruction.Create(Code.Cmovns_r64_rm64, dst, src));
		}

		public void cmovns(AssemblerRegister16 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmovns_r16_rm16, register, in memory));
		}

		public void cmovns(AssemblerRegister32 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmovns_r32_rm32, register, in memory));
		}

		public void cmovns(AssemblerRegister64 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmovns_r64_rm64, register, in memory));
		}

		public void cmovnz(AssemblerRegister16 dst, AssemblerRegister16 src)
		{
			AddInstruction(Instruction.Create(Code.Cmovne_r16_rm16, dst, src));
		}

		public void cmovnz(AssemblerRegister32 dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.Cmovne_r32_rm32, dst, src));
		}

		public void cmovnz(AssemblerRegister64 dst, AssemblerRegister64 src)
		{
			AddInstruction(Instruction.Create(Code.Cmovne_r64_rm64, dst, src));
		}

		public void cmovnz(AssemblerRegister16 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmovne_r16_rm16, register, in memory));
		}

		public void cmovnz(AssemblerRegister32 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmovne_r32_rm32, register, in memory));
		}

		public void cmovnz(AssemblerRegister64 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmovne_r64_rm64, register, in memory));
		}

		public void cmovo(AssemblerRegister16 dst, AssemblerRegister16 src)
		{
			AddInstruction(Instruction.Create(Code.Cmovo_r16_rm16, dst, src));
		}

		public void cmovo(AssemblerRegister32 dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.Cmovo_r32_rm32, dst, src));
		}

		public void cmovo(AssemblerRegister64 dst, AssemblerRegister64 src)
		{
			AddInstruction(Instruction.Create(Code.Cmovo_r64_rm64, dst, src));
		}

		public void cmovo(AssemblerRegister16 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmovo_r16_rm16, register, in memory));
		}

		public void cmovo(AssemblerRegister32 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmovo_r32_rm32, register, in memory));
		}

		public void cmovo(AssemblerRegister64 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmovo_r64_rm64, register, in memory));
		}

		public void cmovp(AssemblerRegister16 dst, AssemblerRegister16 src)
		{
			AddInstruction(Instruction.Create(Code.Cmovp_r16_rm16, dst, src));
		}

		public void cmovp(AssemblerRegister32 dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.Cmovp_r32_rm32, dst, src));
		}

		public void cmovp(AssemblerRegister64 dst, AssemblerRegister64 src)
		{
			AddInstruction(Instruction.Create(Code.Cmovp_r64_rm64, dst, src));
		}

		public void cmovp(AssemblerRegister16 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmovp_r16_rm16, register, in memory));
		}

		public void cmovp(AssemblerRegister32 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmovp_r32_rm32, register, in memory));
		}

		public void cmovp(AssemblerRegister64 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmovp_r64_rm64, register, in memory));
		}

		public void cmovpe(AssemblerRegister16 dst, AssemblerRegister16 src)
		{
			AddInstruction(Instruction.Create(Code.Cmovp_r16_rm16, dst, src));
		}

		public void cmovpe(AssemblerRegister32 dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.Cmovp_r32_rm32, dst, src));
		}

		public void cmovpe(AssemblerRegister64 dst, AssemblerRegister64 src)
		{
			AddInstruction(Instruction.Create(Code.Cmovp_r64_rm64, dst, src));
		}

		public void cmovpe(AssemblerRegister16 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmovp_r16_rm16, register, in memory));
		}

		public void cmovpe(AssemblerRegister32 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmovp_r32_rm32, register, in memory));
		}

		public void cmovpe(AssemblerRegister64 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmovp_r64_rm64, register, in memory));
		}

		public void cmovpo(AssemblerRegister16 dst, AssemblerRegister16 src)
		{
			AddInstruction(Instruction.Create(Code.Cmovnp_r16_rm16, dst, src));
		}

		public void cmovpo(AssemblerRegister32 dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.Cmovnp_r32_rm32, dst, src));
		}

		public void cmovpo(AssemblerRegister64 dst, AssemblerRegister64 src)
		{
			AddInstruction(Instruction.Create(Code.Cmovnp_r64_rm64, dst, src));
		}

		public void cmovpo(AssemblerRegister16 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmovnp_r16_rm16, register, in memory));
		}

		public void cmovpo(AssemblerRegister32 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmovnp_r32_rm32, register, in memory));
		}

		public void cmovpo(AssemblerRegister64 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmovnp_r64_rm64, register, in memory));
		}

		public void cmovs(AssemblerRegister16 dst, AssemblerRegister16 src)
		{
			AddInstruction(Instruction.Create(Code.Cmovs_r16_rm16, dst, src));
		}

		public void cmovs(AssemblerRegister32 dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.Cmovs_r32_rm32, dst, src));
		}

		public void cmovs(AssemblerRegister64 dst, AssemblerRegister64 src)
		{
			AddInstruction(Instruction.Create(Code.Cmovs_r64_rm64, dst, src));
		}

		public void cmovs(AssemblerRegister16 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmovs_r16_rm16, register, in memory));
		}

		public void cmovs(AssemblerRegister32 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmovs_r32_rm32, register, in memory));
		}

		public void cmovs(AssemblerRegister64 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmovs_r64_rm64, register, in memory));
		}

		public void cmovz(AssemblerRegister16 dst, AssemblerRegister16 src)
		{
			AddInstruction(Instruction.Create(Code.Cmove_r16_rm16, dst, src));
		}

		public void cmovz(AssemblerRegister32 dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.Cmove_r32_rm32, dst, src));
		}

		public void cmovz(AssemblerRegister64 dst, AssemblerRegister64 src)
		{
			AddInstruction(Instruction.Create(Code.Cmove_r64_rm64, dst, src));
		}

		public void cmovz(AssemblerRegister16 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmove_r16_rm16, register, in memory));
		}

		public void cmovz(AssemblerRegister32 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmove_r32_rm32, register, in memory));
		}

		public void cmovz(AssemblerRegister64 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmove_r64_rm64, register, in memory));
		}

		public void cmp(AssemblerRegister8 dst, AssemblerRegister8 src)
		{
			AddInstruction(Instruction.Create(Code.Cmp_rm8_r8, dst, src));
		}

		public void cmp(AssemblerMemoryOperand dst, AssemblerRegister8 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmp_rm8_r8, in memory, src));
		}

		public void cmp(AssemblerRegister16 dst, AssemblerRegister16 src)
		{
			AddInstruction(Instruction.Create(Code.Cmp_rm16_r16, dst, src));
		}

		public void cmp(AssemblerMemoryOperand dst, AssemblerRegister16 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmp_rm16_r16, in memory, src));
		}

		public void cmp(AssemblerRegister32 dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.Cmp_rm32_r32, dst, src));
		}

		public void cmp(AssemblerMemoryOperand dst, AssemblerRegister32 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmp_rm32_r32, in memory, src));
		}

		public void cmp(AssemblerRegister64 dst, AssemblerRegister64 src)
		{
			AddInstruction(Instruction.Create(Code.Cmp_rm64_r64, dst, src));
		}

		public void cmp(AssemblerMemoryOperand dst, AssemblerRegister64 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmp_rm64_r64, in memory, src));
		}

		public void cmp(AssemblerRegister8 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmp_r8_rm8, register, in memory));
		}

		public void cmp(AssemblerRegister16 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmp_r16_rm16, register, in memory));
		}

		public void cmp(AssemblerRegister32 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmp_r32_rm32, register, in memory));
		}

		public void cmp(AssemblerRegister64 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmp_r64_rm64, register, in memory));
		}

		public void cmp(AssemblerRegister8 dst, sbyte imm)
		{
			Code code = (((Register)dst == Register.AL) ? Code.Cmp_AL_imm8 : Code.Cmp_rm8_imm8);
			AddInstruction(Instruction.Create(code, dst, imm));
		}

		public void cmp(AssemblerRegister16 dst, short imm)
		{
			Code code = (((Register)dst != Register.AX) ? ((imm >= -128 && imm <= 127) ? Code.Cmp_rm16_imm8 : Code.Cmp_rm16_imm16) : Code.Cmp_AX_imm16);
			AddInstruction(Instruction.Create(code, dst, imm));
		}

		public void cmp(AssemblerRegister32 dst, int imm)
		{
			Code code = (((Register)dst != Register.EAX) ? ((imm >= -128 && imm <= 127) ? Code.Cmp_rm32_imm8 : Code.Cmp_rm32_imm32) : Code.Cmp_EAX_imm32);
			AddInstruction(Instruction.Create(code, dst, imm));
		}

		public void cmp(AssemblerRegister64 dst, int imm)
		{
			Code code = (((Register)dst != Register.RAX) ? ((imm >= -128 && imm <= 127) ? Code.Cmp_rm64_imm8 : Code.Cmp_rm64_imm32) : Code.Cmp_RAX_imm32);
			AddInstruction(Instruction.Create(code, dst, imm));
		}

		public void cmp(AssemblerMemoryOperand dst, int imm)
		{
			Code code;
			if (dst.Size == MemoryOperandSize.Qword)
			{
				code = ((imm >= -128 && imm <= 127) ? Code.Cmp_rm64_imm8 : Code.Cmp_rm64_imm32);
			}
			else if (dst.Size == MemoryOperandSize.Dword)
			{
				code = ((imm >= -128 && imm <= 127) ? Code.Cmp_rm32_imm8 : Code.Cmp_rm32_imm32);
			}
			else if (dst.Size == MemoryOperandSize.Word)
			{
				code = ((imm >= -128 && imm <= 127) ? Code.Cmp_rm16_imm8 : Code.Cmp_rm16_imm16);
			}
			else
			{
				if (dst.Size != MemoryOperandSize.Byte)
				{
					throw NoOpCodeFoundFor(Mnemonic.Cmp, dst, imm);
				}
				code = Code.Cmp_rm8_imm8;
			}
			Code code2 = code;
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, in memory, imm));
		}

		public void cmp(AssemblerRegister8 dst, byte imm)
		{
			Code code = (((Register)dst == Register.AL) ? Code.Cmp_AL_imm8 : Code.Cmp_rm8_imm8);
			AddInstruction(Instruction.Create(code, (Register)dst, (uint)imm));
		}

		public void cmp(AssemblerRegister16 dst, ushort imm)
		{
			Code code = (((Register)dst != Register.AX) ? ((imm <= 127 || (65408 <= imm && imm <= ushort.MaxValue)) ? Code.Cmp_rm16_imm8 : Code.Cmp_rm16_imm16) : Code.Cmp_AX_imm16);
			AddInstruction(Instruction.Create(code, (Register)dst, (uint)imm));
		}

		public void cmp(AssemblerRegister32 dst, uint imm)
		{
			Code code = (((Register)dst != Register.EAX) ? ((imm <= 127 || 4294967168u <= imm) ? Code.Cmp_rm32_imm8 : Code.Cmp_rm32_imm32) : Code.Cmp_EAX_imm32);
			AddInstruction(Instruction.Create(code, dst, imm));
		}

		public void cmp(AssemblerMemoryOperand dst, uint imm)
		{
			Code code;
			if (dst.Size == MemoryOperandSize.Dword)
			{
				code = ((imm <= 127 || 4294967168u <= imm) ? Code.Cmp_rm32_imm8 : Code.Cmp_rm32_imm32);
			}
			else if (dst.Size == MemoryOperandSize.Word)
			{
				code = ((imm <= 127 || (65408 <= imm && imm <= 65535)) ? Code.Cmp_rm16_imm8 : Code.Cmp_rm16_imm16);
			}
			else
			{
				if (dst.Size != MemoryOperandSize.Byte)
				{
					throw NoOpCodeFoundFor(Mnemonic.Cmp, dst, imm);
				}
				code = Code.Cmp_rm8_imm8;
			}
			Code code2 = code;
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, in memory, imm));
		}

		public void cmpbexadd(AssemblerMemoryOperand dst, AssemblerRegister32 src1, AssemblerRegister32 src2)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Cmpbexadd_m32_r32_r32, in memory, src1, src2));
		}

		public void cmpbexadd(AssemblerMemoryOperand dst, AssemblerRegister64 src1, AssemblerRegister64 src2)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Cmpbexadd_m64_r64_r64, in memory, src1, src2));
		}

		public void cmpbxadd(AssemblerMemoryOperand dst, AssemblerRegister32 src1, AssemblerRegister32 src2)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Cmpbxadd_m32_r32_r32, in memory, src1, src2));
		}

		public void cmpbxadd(AssemblerMemoryOperand dst, AssemblerRegister64 src1, AssemblerRegister64 src2)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Cmpbxadd_m64_r64_r64, in memory, src1, src2));
		}

		public void cmpeqpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			cmppd(dst, src, 0);
		}

		public void cmpeqpd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			cmppd(dst, src, 0);
		}

		public void cmpeqps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			cmpps(dst, src, 0);
		}

		public void cmpeqps(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			cmpps(dst, src, 0);
		}

		public void cmpeqsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			cmpsd(dst, src, 0);
		}

		public void cmpeqsd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			cmpsd(dst, src, 0);
		}

		public void cmpeqss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			cmpss(dst, src, 0);
		}

		public void cmpeqss(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			cmpss(dst, src, 0);
		}

		public void cmplepd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			cmppd(dst, src, 2);
		}

		public void cmplepd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			cmppd(dst, src, 2);
		}

		public void cmpleps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			cmpps(dst, src, 2);
		}

		public void cmpleps(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			cmpps(dst, src, 2);
		}

		public void cmplesd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			cmpsd(dst, src, 2);
		}

		public void cmplesd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			cmpsd(dst, src, 2);
		}

		public void cmpless(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			cmpss(dst, src, 2);
		}

		public void cmpless(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			cmpss(dst, src, 2);
		}

		public void cmplexadd(AssemblerMemoryOperand dst, AssemblerRegister32 src1, AssemblerRegister32 src2)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Cmplexadd_m32_r32_r32, in memory, src1, src2));
		}

		public void cmplexadd(AssemblerMemoryOperand dst, AssemblerRegister64 src1, AssemblerRegister64 src2)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Cmplexadd_m64_r64_r64, in memory, src1, src2));
		}

		public void cmpltpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			cmppd(dst, src, 1);
		}

		public void cmpltpd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			cmppd(dst, src, 1);
		}

		public void cmpltps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			cmpps(dst, src, 1);
		}

		public void cmpltps(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			cmpps(dst, src, 1);
		}

		public void cmpltsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			cmpsd(dst, src, 1);
		}

		public void cmpltsd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			cmpsd(dst, src, 1);
		}

		public void cmpltss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			cmpss(dst, src, 1);
		}

		public void cmpltss(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			cmpss(dst, src, 1);
		}

		public void cmplxadd(AssemblerMemoryOperand dst, AssemblerRegister32 src1, AssemblerRegister32 src2)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Cmplxadd_m32_r32_r32, in memory, src1, src2));
		}

		public void cmplxadd(AssemblerMemoryOperand dst, AssemblerRegister64 src1, AssemblerRegister64 src2)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Cmplxadd_m64_r64_r64, in memory, src1, src2));
		}

		public void cmpnbexadd(AssemblerMemoryOperand dst, AssemblerRegister32 src1, AssemblerRegister32 src2)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Cmpnbexadd_m32_r32_r32, in memory, src1, src2));
		}

		public void cmpnbexadd(AssemblerMemoryOperand dst, AssemblerRegister64 src1, AssemblerRegister64 src2)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Cmpnbexadd_m64_r64_r64, in memory, src1, src2));
		}

		public void cmpnbxadd(AssemblerMemoryOperand dst, AssemblerRegister32 src1, AssemblerRegister32 src2)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Cmpnbxadd_m32_r32_r32, in memory, src1, src2));
		}

		public void cmpnbxadd(AssemblerMemoryOperand dst, AssemblerRegister64 src1, AssemblerRegister64 src2)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Cmpnbxadd_m64_r64_r64, in memory, src1, src2));
		}

		public void cmpneqpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			cmppd(dst, src, 4);
		}

		public void cmpneqpd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			cmppd(dst, src, 4);
		}

		public void cmpneqps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			cmpps(dst, src, 4);
		}

		public void cmpneqps(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			cmpps(dst, src, 4);
		}

		public void cmpneqsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			cmpsd(dst, src, 4);
		}

		public void cmpneqsd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			cmpsd(dst, src, 4);
		}

		public void cmpneqss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			cmpss(dst, src, 4);
		}

		public void cmpneqss(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			cmpss(dst, src, 4);
		}

		public void cmpnlepd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			cmppd(dst, src, 6);
		}

		public void cmpnlepd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			cmppd(dst, src, 6);
		}

		public void cmpnleps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			cmpps(dst, src, 6);
		}

		public void cmpnleps(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			cmpps(dst, src, 6);
		}

		public void cmpnlesd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			cmpsd(dst, src, 6);
		}

		public void cmpnlesd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			cmpsd(dst, src, 6);
		}

		public void cmpnless(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			cmpss(dst, src, 6);
		}

		public void cmpnless(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			cmpss(dst, src, 6);
		}

		public void cmpnlexadd(AssemblerMemoryOperand dst, AssemblerRegister32 src1, AssemblerRegister32 src2)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Cmpnlexadd_m32_r32_r32, in memory, src1, src2));
		}

		public void cmpnlexadd(AssemblerMemoryOperand dst, AssemblerRegister64 src1, AssemblerRegister64 src2)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Cmpnlexadd_m64_r64_r64, in memory, src1, src2));
		}

		public void cmpnltpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			cmppd(dst, src, 5);
		}

		public void cmpnltpd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			cmppd(dst, src, 5);
		}

		public void cmpnltps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			cmpps(dst, src, 5);
		}

		public void cmpnltps(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			cmpps(dst, src, 5);
		}

		public void cmpnltsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			cmpsd(dst, src, 5);
		}

		public void cmpnltsd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			cmpsd(dst, src, 5);
		}

		public void cmpnltss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			cmpss(dst, src, 5);
		}

		public void cmpnltss(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			cmpss(dst, src, 5);
		}

		public void cmpnlxadd(AssemblerMemoryOperand dst, AssemblerRegister32 src1, AssemblerRegister32 src2)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Cmpnlxadd_m32_r32_r32, in memory, src1, src2));
		}

		public void cmpnlxadd(AssemblerMemoryOperand dst, AssemblerRegister64 src1, AssemblerRegister64 src2)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Cmpnlxadd_m64_r64_r64, in memory, src1, src2));
		}

		public void cmpnoxadd(AssemblerMemoryOperand dst, AssemblerRegister32 src1, AssemblerRegister32 src2)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Cmpnoxadd_m32_r32_r32, in memory, src1, src2));
		}

		public void cmpnoxadd(AssemblerMemoryOperand dst, AssemblerRegister64 src1, AssemblerRegister64 src2)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Cmpnoxadd_m64_r64_r64, in memory, src1, src2));
		}

		public void cmpnpxadd(AssemblerMemoryOperand dst, AssemblerRegister32 src1, AssemblerRegister32 src2)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Cmpnpxadd_m32_r32_r32, in memory, src1, src2));
		}

		public void cmpnpxadd(AssemblerMemoryOperand dst, AssemblerRegister64 src1, AssemblerRegister64 src2)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Cmpnpxadd_m64_r64_r64, in memory, src1, src2));
		}

		public void cmpnsxadd(AssemblerMemoryOperand dst, AssemblerRegister32 src1, AssemblerRegister32 src2)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Cmpnsxadd_m32_r32_r32, in memory, src1, src2));
		}

		public void cmpnsxadd(AssemblerMemoryOperand dst, AssemblerRegister64 src1, AssemblerRegister64 src2)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Cmpnsxadd_m64_r64_r64, in memory, src1, src2));
		}

		public void cmpnzxadd(AssemblerMemoryOperand dst, AssemblerRegister32 src1, AssemblerRegister32 src2)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Cmpnzxadd_m32_r32_r32, in memory, src1, src2));
		}

		public void cmpnzxadd(AssemblerMemoryOperand dst, AssemblerRegister64 src1, AssemblerRegister64 src2)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Cmpnzxadd_m64_r64_r64, in memory, src1, src2));
		}

		public void cmpordpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			cmppd(dst, src, 7);
		}

		public void cmpordpd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			cmppd(dst, src, 7);
		}

		public void cmpordps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			cmpps(dst, src, 7);
		}

		public void cmpordps(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			cmpps(dst, src, 7);
		}

		public void cmpordsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			cmpsd(dst, src, 7);
		}

		public void cmpordsd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			cmpsd(dst, src, 7);
		}

		public void cmpordss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			cmpss(dst, src, 7);
		}

		public void cmpordss(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			cmpss(dst, src, 7);
		}

		public void cmpoxadd(AssemblerMemoryOperand dst, AssemblerRegister32 src1, AssemblerRegister32 src2)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Cmpoxadd_m32_r32_r32, in memory, src1, src2));
		}

		public void cmpoxadd(AssemblerMemoryOperand dst, AssemblerRegister64 src1, AssemblerRegister64 src2)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Cmpoxadd_m64_r64_r64, in memory, src1, src2));
		}

		public void cmppd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.Cmppd_xmm_xmmm128_imm8, dst, src1, imm));
		}

		public void cmppd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmppd_xmm_xmmm128_imm8, register, in memory, imm));
		}

		public void cmppd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.Cmppd_xmm_xmmm128_imm8, (Register)dst, (Register)src1, (uint)imm));
		}

		public void cmppd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmppd_xmm_xmmm128_imm8, register, in memory, (uint)imm));
		}

		public void cmpps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.Cmpps_xmm_xmmm128_imm8, dst, src1, imm));
		}

		public void cmpps(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmpps_xmm_xmmm128_imm8, register, in memory, imm));
		}

		public void cmpps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.Cmpps_xmm_xmmm128_imm8, (Register)dst, (Register)src1, (uint)imm));
		}

		public void cmpps(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmpps_xmm_xmmm128_imm8, register, in memory, (uint)imm));
		}

		public void cmppxadd(AssemblerMemoryOperand dst, AssemblerRegister32 src1, AssemblerRegister32 src2)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Cmppxadd_m32_r32_r32, in memory, src1, src2));
		}

		public void cmppxadd(AssemblerMemoryOperand dst, AssemblerRegister64 src1, AssemblerRegister64 src2)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Cmppxadd_m64_r64_r64, in memory, src1, src2));
		}

		public void cmpsb()
		{
			AddInstruction(Instruction.CreateCmpsb(Bitness));
		}

		public void cmpsd()
		{
			AddInstruction(Instruction.CreateCmpsd(Bitness));
		}

		public void cmpsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.Cmpsd_xmm_xmmm64_imm8, dst, src1, imm));
		}

		public void cmpsd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmpsd_xmm_xmmm64_imm8, register, in memory, imm));
		}

		public void cmpsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.Cmpsd_xmm_xmmm64_imm8, (Register)dst, (Register)src1, (uint)imm));
		}

		public void cmpsd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmpsd_xmm_xmmm64_imm8, register, in memory, (uint)imm));
		}

		public void cmpsq()
		{
			AddInstruction(Instruction.CreateCmpsq(Bitness));
		}

		public void cmpss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.Cmpss_xmm_xmmm32_imm8, dst, src1, imm));
		}

		public void cmpss(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmpss_xmm_xmmm32_imm8, register, in memory, imm));
		}

		public void cmpss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.Cmpss_xmm_xmmm32_imm8, (Register)dst, (Register)src1, (uint)imm));
		}

		public void cmpss(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmpss_xmm_xmmm32_imm8, register, in memory, (uint)imm));
		}

		public void cmpsw()
		{
			AddInstruction(Instruction.CreateCmpsw(Bitness));
		}

		public void cmpsxadd(AssemblerMemoryOperand dst, AssemblerRegister32 src1, AssemblerRegister32 src2)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Cmpsxadd_m32_r32_r32, in memory, src1, src2));
		}

		public void cmpsxadd(AssemblerMemoryOperand dst, AssemblerRegister64 src1, AssemblerRegister64 src2)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Cmpsxadd_m64_r64_r64, in memory, src1, src2));
		}

		public void cmpunordpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			cmppd(dst, src, 3);
		}

		public void cmpunordpd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			cmppd(dst, src, 3);
		}

		public void cmpunordps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			cmpps(dst, src, 3);
		}

		public void cmpunordps(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			cmpps(dst, src, 3);
		}

		public void cmpunordsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			cmpsd(dst, src, 3);
		}

		public void cmpunordsd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			cmpsd(dst, src, 3);
		}

		public void cmpunordss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			cmpss(dst, src, 3);
		}

		public void cmpunordss(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			cmpss(dst, src, 3);
		}

		public void cmpxchg(AssemblerRegister8 dst, AssemblerRegister8 src)
		{
			AddInstruction(Instruction.Create(Code.Cmpxchg_rm8_r8, dst, src));
		}

		public void cmpxchg(AssemblerMemoryOperand dst, AssemblerRegister8 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmpxchg_rm8_r8, in memory, src));
		}

		public void cmpxchg(AssemblerRegister16 dst, AssemblerRegister16 src)
		{
			AddInstruction(Instruction.Create(Code.Cmpxchg_rm16_r16, dst, src));
		}

		public void cmpxchg(AssemblerMemoryOperand dst, AssemblerRegister16 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmpxchg_rm16_r16, in memory, src));
		}

		public void cmpxchg(AssemblerRegister32 dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.Cmpxchg_rm32_r32, dst, src));
		}

		public void cmpxchg(AssemblerMemoryOperand dst, AssemblerRegister32 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmpxchg_rm32_r32, in memory, src));
		}

		public void cmpxchg(AssemblerRegister64 dst, AssemblerRegister64 src)
		{
			AddInstruction(Instruction.Create(Code.Cmpxchg_rm64_r64, dst, src));
		}

		public void cmpxchg(AssemblerMemoryOperand dst, AssemblerRegister64 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmpxchg_rm64_r64, in memory, src));
		}

		public void cmpxchg16b(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmpxchg16b_m128, in memory));
		}

		public void cmpxchg8b(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cmpxchg8b_m64, in memory));
		}

		public void cmpzxadd(AssemblerMemoryOperand dst, AssemblerRegister32 src1, AssemblerRegister32 src2)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Cmpzxadd_m32_r32_r32, in memory, src1, src2));
		}

		public void cmpzxadd(AssemblerMemoryOperand dst, AssemblerRegister64 src1, AssemblerRegister64 src2)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Cmpzxadd_m64_r64_r64, in memory, src1, src2));
		}

		public void comisd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Comisd_xmm_xmmm64, dst, src));
		}

		public void comisd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Comisd_xmm_xmmm64, register, in memory));
		}

		public void comiss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Comiss_xmm_xmmm32, dst, src));
		}

		public void comiss(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Comiss_xmm_xmmm32, register, in memory));
		}

		public void cpu_read()
		{
			AddInstruction(Instruction.Create(Code.Cpu_read));
		}

		public void cpu_write()
		{
			AddInstruction(Instruction.Create(Code.Cpu_write));
		}

		public void cpuid()
		{
			AddInstruction(Instruction.Create(Code.Cpuid));
		}

		public void cqo()
		{
			AddInstruction(Instruction.Create(Code.Cqo));
		}

		public void crc32(AssemblerRegister32 dst, AssemblerRegister8 src)
		{
			AddInstruction(Instruction.Create(Code.Crc32_r32_rm8, dst, src));
		}

		public void crc32(AssemblerRegister64 dst, AssemblerRegister8 src)
		{
			AddInstruction(Instruction.Create(Code.Crc32_r64_rm8, dst, src));
		}

		public void crc32(AssemblerRegister32 dst, AssemblerRegister16 src)
		{
			AddInstruction(Instruction.Create(Code.Crc32_r32_rm16, dst, src));
		}

		public void crc32(AssemblerRegister32 dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.Crc32_r32_rm32, dst, src));
		}

		public void crc32(AssemblerRegister64 dst, AssemblerRegister64 src)
		{
			AddInstruction(Instruction.Create(Code.Crc32_r64_rm64, dst, src));
		}

		public void crc32(AssemblerRegister32 dst, AssemblerMemoryOperand src)
		{
			Code code;
			if (src.Size == MemoryOperandSize.Dword)
			{
				code = Code.Crc32_r32_rm32;
			}
			else if (src.Size == MemoryOperandSize.Word)
			{
				code = Code.Crc32_r32_rm16;
			}
			else
			{
				if (src.Size != MemoryOperandSize.Byte)
				{
					throw NoOpCodeFoundFor(Mnemonic.Crc32, dst, src);
				}
				code = Code.Crc32_r32_rm8;
			}
			Code code2 = code;
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, register, in memory));
		}

		public void crc32(AssemblerRegister64 dst, AssemblerMemoryOperand src)
		{
			Code code;
			if (src.Size == MemoryOperandSize.Qword)
			{
				code = Code.Crc32_r64_rm64;
			}
			else
			{
				if (src.Size != MemoryOperandSize.Byte)
				{
					throw NoOpCodeFoundFor(Mnemonic.Crc32, dst, src);
				}
				code = Code.Crc32_r64_rm8;
			}
			Code code2 = code;
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, register, in memory));
		}

		public void cvtdq2pd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Cvtdq2pd_xmm_xmmm64, dst, src));
		}

		public void cvtdq2pd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cvtdq2pd_xmm_xmmm64, register, in memory));
		}

		public void cvtdq2ps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Cvtdq2ps_xmm_xmmm128, dst, src));
		}

		public void cvtdq2ps(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cvtdq2ps_xmm_xmmm128, register, in memory));
		}

		public void cvtpd2dq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Cvtpd2dq_xmm_xmmm128, dst, src));
		}

		public void cvtpd2dq(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cvtpd2dq_xmm_xmmm128, register, in memory));
		}

		public void cvtpd2pi(AssemblerRegisterMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Cvtpd2pi_mm_xmmm128, dst, src));
		}

		public void cvtpd2pi(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cvtpd2pi_mm_xmmm128, register, in memory));
		}

		public void cvtpd2ps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Cvtpd2ps_xmm_xmmm128, dst, src));
		}

		public void cvtpd2ps(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cvtpd2ps_xmm_xmmm128, register, in memory));
		}

		public void cvtpi2pd(AssemblerRegisterXMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.Cvtpi2pd_xmm_mmm64, dst, src));
		}

		public void cvtpi2pd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cvtpi2pd_xmm_mmm64, register, in memory));
		}

		public void cvtpi2ps(AssemblerRegisterXMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.Cvtpi2ps_xmm_mmm64, dst, src));
		}

		public void cvtpi2ps(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cvtpi2ps_xmm_mmm64, register, in memory));
		}

		public void cvtps2dq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Cvtps2dq_xmm_xmmm128, dst, src));
		}

		public void cvtps2dq(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cvtps2dq_xmm_xmmm128, register, in memory));
		}

		public void cvtps2pd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Cvtps2pd_xmm_xmmm64, dst, src));
		}

		public void cvtps2pd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cvtps2pd_xmm_xmmm64, register, in memory));
		}

		public void cvtps2pi(AssemblerRegisterMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Cvtps2pi_mm_xmmm64, dst, src));
		}

		public void cvtps2pi(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cvtps2pi_mm_xmmm64, register, in memory));
		}

		public void cvtsd2si(AssemblerRegister32 dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Cvtsd2si_r32_xmmm64, dst, src));
		}

		public void cvtsd2si(AssemblerRegister64 dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Cvtsd2si_r64_xmmm64, dst, src));
		}

		public void cvtsd2si(AssemblerRegister32 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cvtsd2si_r32_xmmm64, register, in memory));
		}

		public void cvtsd2si(AssemblerRegister64 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cvtsd2si_r64_xmmm64, register, in memory));
		}

		public void cvtsd2ss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Cvtsd2ss_xmm_xmmm64, dst, src));
		}

		public void cvtsd2ss(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cvtsd2ss_xmm_xmmm64, register, in memory));
		}

		public void cvtsi2sd(AssemblerRegisterXMM dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.Cvtsi2sd_xmm_rm32, dst, src));
		}

		public void cvtsi2sd(AssemblerRegisterXMM dst, AssemblerRegister64 src)
		{
			AddInstruction(Instruction.Create(Code.Cvtsi2sd_xmm_rm64, dst, src));
		}

		public void cvtsi2sd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Code code;
			if (src.Size == MemoryOperandSize.Qword)
			{
				code = Code.Cvtsi2sd_xmm_rm64;
			}
			else
			{
				if (src.Size != MemoryOperandSize.Dword)
				{
					throw NoOpCodeFoundFor(Mnemonic.Cvtsi2sd, dst, src);
				}
				code = Code.Cvtsi2sd_xmm_rm32;
			}
			Code code2 = code;
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, register, in memory));
		}

		public void cvtsi2ss(AssemblerRegisterXMM dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.Cvtsi2ss_xmm_rm32, dst, src));
		}

		public void cvtsi2ss(AssemblerRegisterXMM dst, AssemblerRegister64 src)
		{
			AddInstruction(Instruction.Create(Code.Cvtsi2ss_xmm_rm64, dst, src));
		}

		public void cvtsi2ss(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Code code;
			if (src.Size == MemoryOperandSize.Qword)
			{
				code = Code.Cvtsi2ss_xmm_rm64;
			}
			else
			{
				if (src.Size != MemoryOperandSize.Dword)
				{
					throw NoOpCodeFoundFor(Mnemonic.Cvtsi2ss, dst, src);
				}
				code = Code.Cvtsi2ss_xmm_rm32;
			}
			Code code2 = code;
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, register, in memory));
		}

		public void cvtss2sd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Cvtss2sd_xmm_xmmm32, dst, src));
		}

		public void cvtss2sd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cvtss2sd_xmm_xmmm32, register, in memory));
		}

		public void cvtss2si(AssemblerRegister32 dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Cvtss2si_r32_xmmm32, dst, src));
		}

		public void cvtss2si(AssemblerRegister64 dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Cvtss2si_r64_xmmm32, dst, src));
		}

		public void cvtss2si(AssemblerRegister32 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cvtss2si_r32_xmmm32, register, in memory));
		}

		public void cvtss2si(AssemblerRegister64 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cvtss2si_r64_xmmm32, register, in memory));
		}

		public void cvttpd2dq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Cvttpd2dq_xmm_xmmm128, dst, src));
		}

		public void cvttpd2dq(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cvttpd2dq_xmm_xmmm128, register, in memory));
		}

		public void cvttpd2pi(AssemblerRegisterMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Cvttpd2pi_mm_xmmm128, dst, src));
		}

		public void cvttpd2pi(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cvttpd2pi_mm_xmmm128, register, in memory));
		}

		public void cvttps2dq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Cvttps2dq_xmm_xmmm128, dst, src));
		}

		public void cvttps2dq(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cvttps2dq_xmm_xmmm128, register, in memory));
		}

		public void cvttps2pi(AssemblerRegisterMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Cvttps2pi_mm_xmmm64, dst, src));
		}

		public void cvttps2pi(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cvttps2pi_mm_xmmm64, register, in memory));
		}

		public void cvttsd2si(AssemblerRegister32 dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Cvttsd2si_r32_xmmm64, dst, src));
		}

		public void cvttsd2si(AssemblerRegister64 dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Cvttsd2si_r64_xmmm64, dst, src));
		}

		public void cvttsd2si(AssemblerRegister32 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cvttsd2si_r32_xmmm64, register, in memory));
		}

		public void cvttsd2si(AssemblerRegister64 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cvttsd2si_r64_xmmm64, register, in memory));
		}

		public void cvttss2si(AssemblerRegister32 dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Cvttss2si_r32_xmmm32, dst, src));
		}

		public void cvttss2si(AssemblerRegister64 dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Cvttss2si_r64_xmmm32, dst, src));
		}

		public void cvttss2si(AssemblerRegister32 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cvttss2si_r32_xmmm32, register, in memory));
		}

		public void cvttss2si(AssemblerRegister64 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Cvttss2si_r64_xmmm32, register, in memory));
		}

		public void cwd()
		{
			AddInstruction(Instruction.Create(Code.Cwd));
		}

		public void cwde()
		{
			AddInstruction(Instruction.Create(Code.Cwde));
		}

		public void daa()
		{
			AddInstruction(Instruction.Create(Code.Daa));
		}

		public void das()
		{
			AddInstruction(Instruction.Create(Code.Das));
		}

		public void dec(AssemblerRegister8 dst)
		{
			AddInstruction(Instruction.Create(Code.Dec_rm8, dst));
		}

		public void dec(AssemblerRegister16 dst)
		{
			Code code = ((Bitness == 64) ? Code.Dec_rm16 : Code.Dec_r16);
			AddInstruction(Instruction.Create(code, dst));
		}

		public void dec(AssemblerRegister32 dst)
		{
			Code code = ((Bitness == 64) ? Code.Dec_rm32 : Code.Dec_r32);
			AddInstruction(Instruction.Create(code, dst));
		}

		public void dec(AssemblerRegister64 dst)
		{
			AddInstruction(Instruction.Create(Code.Dec_rm64, dst));
		}

		public void dec(AssemblerMemoryOperand dst)
		{
			Code code;
			if (dst.Size == MemoryOperandSize.Qword)
			{
				code = Code.Dec_rm64;
			}
			else if (dst.Size == MemoryOperandSize.Dword)
			{
				code = Code.Dec_rm32;
			}
			else if (dst.Size == MemoryOperandSize.Word)
			{
				code = Code.Dec_rm16;
			}
			else
			{
				if (dst.Size != MemoryOperandSize.Byte)
				{
					throw NoOpCodeFoundFor(Mnemonic.Dec, dst);
				}
				code = Code.Dec_rm8;
			}
			Code code2 = code;
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, in memory));
		}

		public void div(AssemblerRegister8 dst)
		{
			AddInstruction(Instruction.Create(Code.Div_rm8, dst));
		}

		public void div(AssemblerRegister16 dst)
		{
			AddInstruction(Instruction.Create(Code.Div_rm16, dst));
		}

		public void div(AssemblerRegister32 dst)
		{
			AddInstruction(Instruction.Create(Code.Div_rm32, dst));
		}

		public void div(AssemblerRegister64 dst)
		{
			AddInstruction(Instruction.Create(Code.Div_rm64, dst));
		}

		public void div(AssemblerMemoryOperand dst)
		{
			Code code;
			if (dst.Size == MemoryOperandSize.Qword)
			{
				code = Code.Div_rm64;
			}
			else if (dst.Size == MemoryOperandSize.Dword)
			{
				code = Code.Div_rm32;
			}
			else if (dst.Size == MemoryOperandSize.Word)
			{
				code = Code.Div_rm16;
			}
			else
			{
				if (dst.Size != MemoryOperandSize.Byte)
				{
					throw NoOpCodeFoundFor(Mnemonic.Div, dst);
				}
				code = Code.Div_rm8;
			}
			Code code2 = code;
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, in memory));
		}

		public void divpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Divpd_xmm_xmmm128, dst, src));
		}

		public void divpd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Divpd_xmm_xmmm128, register, in memory));
		}

		public void divps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Divps_xmm_xmmm128, dst, src));
		}

		public void divps(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Divps_xmm_xmmm128, register, in memory));
		}

		public void divsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Divsd_xmm_xmmm64, dst, src));
		}

		public void divsd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Divsd_xmm_xmmm64, register, in memory));
		}

		public void divss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Divss_xmm_xmmm32, dst, src));
		}

		public void divss(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Divss_xmm_xmmm32, register, in memory));
		}

		public void dmint()
		{
			AddInstruction(Instruction.Create(Code.Dmint));
		}

		public void dppd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.Dppd_xmm_xmmm128_imm8, dst, src1, imm));
		}

		public void dppd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Dppd_xmm_xmmm128_imm8, register, in memory, imm));
		}

		public void dppd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.Dppd_xmm_xmmm128_imm8, (Register)dst, (Register)src1, (uint)imm));
		}

		public void dppd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Dppd_xmm_xmmm128_imm8, register, in memory, (uint)imm));
		}

		public void dpps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.Dpps_xmm_xmmm128_imm8, dst, src1, imm));
		}

		public void dpps(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Dpps_xmm_xmmm128_imm8, register, in memory, imm));
		}

		public void dpps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.Dpps_xmm_xmmm128_imm8, (Register)dst, (Register)src1, (uint)imm));
		}

		public void dpps(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Dpps_xmm_xmmm128_imm8, register, in memory, (uint)imm));
		}

		public void emms()
		{
			AddInstruction(Instruction.Create(Code.Emms));
		}

		public void encls()
		{
			AddInstruction(Instruction.Create(Code.Encls));
		}

		public void enclu()
		{
			AddInstruction(Instruction.Create(Code.Enclu));
		}

		public void enclv()
		{
			AddInstruction(Instruction.Create(Code.Enclv));
		}

		public void encodekey128(AssemblerRegister32 dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.Encodekey128_r32_r32, dst, src));
		}

		public void encodekey256(AssemblerRegister32 dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.Encodekey256_r32_r32, dst, src));
		}

		public void endbr32()
		{
			AddInstruction(Instruction.Create(Code.Endbr32));
		}

		public void endbr64()
		{
			AddInstruction(Instruction.Create(Code.Endbr64));
		}

		public void enqcmd(AssemblerRegister16 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Enqcmd_r16_m512, register, in memory));
		}

		public void enqcmd(AssemblerRegister32 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Enqcmd_r32_m512, register, in memory));
		}

		public void enqcmd(AssemblerRegister64 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Enqcmd_r64_m512, register, in memory));
		}

		public void enqcmds(AssemblerRegister16 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Enqcmds_r16_m512, register, in memory));
		}

		public void enqcmds(AssemblerRegister32 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Enqcmds_r32_m512, register, in memory));
		}

		public void enqcmds(AssemblerRegister64 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Enqcmds_r64_m512, register, in memory));
		}

		public void enter(short imm, sbyte imm1)
		{
			Code code = ((Bitness != 64) ? ((Bitness >= 32) ? Code.Enterd_imm16_imm8 : Code.Enterw_imm16_imm8) : Code.Enterq_imm16_imm8);
			AddInstruction(Instruction.Create(code, imm, imm1));
		}

		public void enter(ushort imm, byte imm1)
		{
			Code code = ((Bitness != 64) ? ((Bitness >= 32) ? Code.Enterd_imm16_imm8 : Code.Enterw_imm16_imm8) : Code.Enterq_imm16_imm8);
			AddInstruction(Instruction.Create(code, (uint)imm, (uint)imm1));
		}

		public void erets()
		{
			AddInstruction(Instruction.Create(Code.Erets));
		}

		public void eretu()
		{
			AddInstruction(Instruction.Create(Code.Eretu));
		}

		public void extractps(AssemblerRegister32 dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.Extractps_rm32_xmm_imm8, dst, src1, imm));
		}

		public void extractps(AssemblerRegister64 dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.Extractps_r64m32_xmm_imm8, dst, src1, imm));
		}

		public void extractps(AssemblerMemoryOperand dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Extractps_rm32_xmm_imm8, in memory, src1, imm));
		}

		public void extractps(AssemblerRegister32 dst, AssemblerRegisterXMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.Extractps_rm32_xmm_imm8, (Register)dst, (Register)src1, (uint)imm));
		}

		public void extractps(AssemblerRegister64 dst, AssemblerRegisterXMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.Extractps_r64m32_xmm_imm8, (Register)dst, (Register)src1, (uint)imm));
		}

		public void extractps(AssemblerMemoryOperand dst, AssemblerRegisterXMM src1, byte imm)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Extractps_rm32_xmm_imm8, in memory, (Register)src1, (uint)imm));
		}

		public void extrq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Extrq_xmm_xmm, dst, src));
		}

		public void extrq(AssemblerRegisterXMM dst, sbyte imm, sbyte imm1)
		{
			AddInstruction(Instruction.Create(Code.Extrq_xmm_imm8_imm8, dst, imm, imm1));
		}

		public void extrq(AssemblerRegisterXMM dst, byte imm, byte imm1)
		{
			AddInstruction(Instruction.Create(Code.Extrq_xmm_imm8_imm8, (Register)dst, (uint)imm, (uint)imm1));
		}

		public void f2xm1()
		{
			AddInstruction(Instruction.Create(Code.F2xm1));
		}

		public void fabs()
		{
			AddInstruction(Instruction.Create(Code.Fabs));
		}

		public void fadd(AssemblerMemoryOperand dst)
		{
			Code code;
			if (dst.Size == MemoryOperandSize.Qword)
			{
				code = Code.Fadd_m64fp;
			}
			else
			{
				if (dst.Size != MemoryOperandSize.Dword)
				{
					throw NoOpCodeFoundFor(Mnemonic.Fadd, dst);
				}
				code = Code.Fadd_m32fp;
			}
			Code code2 = code;
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, in memory));
		}

		public void fadd(AssemblerRegisterST dst, AssemblerRegisterST src)
		{
			Code code = (((Register)dst == Register.ST0) ? Code.Fadd_st0_sti : Code.Fadd_sti_st0);
			AddInstruction(Instruction.Create(code, dst, src));
		}

		public void faddp(AssemblerRegisterST dst, AssemblerRegisterST src)
		{
			AddInstruction(Instruction.Create(Code.Faddp_sti_st0, dst, src));
		}

		public void fbld(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Fbld_m80bcd, in memory));
		}

		public void fbstp(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Fbstp_m80bcd, in memory));
		}

		public void fchs()
		{
			AddInstruction(Instruction.Create(Code.Fchs));
		}

		public void fclex()
		{
			AddInstruction(Instruction.Create(Code.Fclex));
		}

		public void fcmovb(AssemblerRegisterST dst, AssemblerRegisterST src)
		{
			AddInstruction(Instruction.Create(Code.Fcmovb_st0_sti, dst, src));
		}

		public void fcmovbe(AssemblerRegisterST dst, AssemblerRegisterST src)
		{
			AddInstruction(Instruction.Create(Code.Fcmovbe_st0_sti, dst, src));
		}

		public void fcmove(AssemblerRegisterST dst, AssemblerRegisterST src)
		{
			AddInstruction(Instruction.Create(Code.Fcmove_st0_sti, dst, src));
		}

		public void fcmovnb(AssemblerRegisterST dst, AssemblerRegisterST src)
		{
			AddInstruction(Instruction.Create(Code.Fcmovnb_st0_sti, dst, src));
		}

		public void fcmovnbe(AssemblerRegisterST dst, AssemblerRegisterST src)
		{
			AddInstruction(Instruction.Create(Code.Fcmovnbe_st0_sti, dst, src));
		}

		public void fcmovne(AssemblerRegisterST dst, AssemblerRegisterST src)
		{
			AddInstruction(Instruction.Create(Code.Fcmovne_st0_sti, dst, src));
		}

		public void fcmovnu(AssemblerRegisterST dst, AssemblerRegisterST src)
		{
			AddInstruction(Instruction.Create(Code.Fcmovnu_st0_sti, dst, src));
		}

		public void fcmovu(AssemblerRegisterST dst, AssemblerRegisterST src)
		{
			AddInstruction(Instruction.Create(Code.Fcmovu_st0_sti, dst, src));
		}

		public void fcom(AssemblerMemoryOperand dst)
		{
			Code code;
			if (dst.Size == MemoryOperandSize.Qword)
			{
				code = Code.Fcom_m64fp;
			}
			else
			{
				if (dst.Size != MemoryOperandSize.Dword)
				{
					throw NoOpCodeFoundFor(Mnemonic.Fcom, dst);
				}
				code = Code.Fcom_m32fp;
			}
			Code code2 = code;
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, in memory));
		}

		public void fcom(AssemblerRegisterST dst, AssemblerRegisterST src)
		{
			AddInstruction(Instruction.Create(Code.Fcom_st0_sti, dst, src));
		}

		public void fcomi(AssemblerRegisterST dst, AssemblerRegisterST src)
		{
			AddInstruction(Instruction.Create(Code.Fcomi_st0_sti, dst, src));
		}

		public void fcomip(AssemblerRegisterST dst, AssemblerRegisterST src)
		{
			AddInstruction(Instruction.Create(Code.Fcomip_st0_sti, dst, src));
		}

		public void fcomp(AssemblerMemoryOperand dst)
		{
			Code code;
			if (dst.Size == MemoryOperandSize.Qword)
			{
				code = Code.Fcomp_m64fp;
			}
			else
			{
				if (dst.Size != MemoryOperandSize.Dword)
				{
					throw NoOpCodeFoundFor(Mnemonic.Fcomp, dst);
				}
				code = Code.Fcomp_m32fp;
			}
			Code code2 = code;
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, in memory));
		}

		public void fcomp(AssemblerRegisterST dst, AssemblerRegisterST src)
		{
			AddInstruction(Instruction.Create(Code.Fcomp_st0_sti, dst, src));
		}

		public void fcompp()
		{
			AddInstruction(Instruction.Create(Code.Fcompp));
		}

		public void fcos()
		{
			AddInstruction(Instruction.Create(Code.Fcos));
		}

		public void fdecstp()
		{
			AddInstruction(Instruction.Create(Code.Fdecstp));
		}

		public void fdisi()
		{
			AddInstruction(Instruction.Create(Code.Fdisi));
		}

		public void fdiv(AssemblerMemoryOperand dst)
		{
			Code code;
			if (dst.Size == MemoryOperandSize.Qword)
			{
				code = Code.Fdiv_m64fp;
			}
			else
			{
				if (dst.Size != MemoryOperandSize.Dword)
				{
					throw NoOpCodeFoundFor(Mnemonic.Fdiv, dst);
				}
				code = Code.Fdiv_m32fp;
			}
			Code code2 = code;
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, in memory));
		}

		public void fdiv(AssemblerRegisterST dst, AssemblerRegisterST src)
		{
			Code code = (((Register)dst == Register.ST0) ? Code.Fdiv_st0_sti : Code.Fdiv_sti_st0);
			AddInstruction(Instruction.Create(code, dst, src));
		}

		public void fdivp(AssemblerRegisterST dst, AssemblerRegisterST src)
		{
			AddInstruction(Instruction.Create(Code.Fdivp_sti_st0, dst, src));
		}

		public void fdivr(AssemblerMemoryOperand dst)
		{
			Code code;
			if (dst.Size == MemoryOperandSize.Qword)
			{
				code = Code.Fdivr_m64fp;
			}
			else
			{
				if (dst.Size != MemoryOperandSize.Dword)
				{
					throw NoOpCodeFoundFor(Mnemonic.Fdivr, dst);
				}
				code = Code.Fdivr_m32fp;
			}
			Code code2 = code;
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, in memory));
		}

		public void fdivr(AssemblerRegisterST dst, AssemblerRegisterST src)
		{
			Code code = (((Register)dst == Register.ST0) ? Code.Fdivr_st0_sti : Code.Fdivr_sti_st0);
			AddInstruction(Instruction.Create(code, dst, src));
		}

		public void fdivrp(AssemblerRegisterST dst, AssemblerRegisterST src)
		{
			AddInstruction(Instruction.Create(Code.Fdivrp_sti_st0, dst, src));
		}

		public void femms()
		{
			AddInstruction(Instruction.Create(Code.Femms));
		}

		public void feni()
		{
			AddInstruction(Instruction.Create(Code.Feni));
		}

		public void ffree(AssemblerRegisterST dst)
		{
			AddInstruction(Instruction.Create(Code.Ffree_sti, dst));
		}

		public void ffreep(AssemblerRegisterST dst)
		{
			AddInstruction(Instruction.Create(Code.Ffreep_sti, dst));
		}

		public void fiadd(AssemblerMemoryOperand dst)
		{
			Code code;
			if (dst.Size == MemoryOperandSize.Dword)
			{
				code = Code.Fiadd_m32int;
			}
			else
			{
				if (dst.Size != MemoryOperandSize.Word)
				{
					throw NoOpCodeFoundFor(Mnemonic.Fiadd, dst);
				}
				code = Code.Fiadd_m16int;
			}
			Code code2 = code;
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, in memory));
		}

		public void ficom(AssemblerMemoryOperand dst)
		{
			Code code;
			if (dst.Size == MemoryOperandSize.Dword)
			{
				code = Code.Ficom_m32int;
			}
			else
			{
				if (dst.Size != MemoryOperandSize.Word)
				{
					throw NoOpCodeFoundFor(Mnemonic.Ficom, dst);
				}
				code = Code.Ficom_m16int;
			}
			Code code2 = code;
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, in memory));
		}

		public void ficomp(AssemblerMemoryOperand dst)
		{
			Code code;
			if (dst.Size == MemoryOperandSize.Dword)
			{
				code = Code.Ficomp_m32int;
			}
			else
			{
				if (dst.Size != MemoryOperandSize.Word)
				{
					throw NoOpCodeFoundFor(Mnemonic.Ficomp, dst);
				}
				code = Code.Ficomp_m16int;
			}
			Code code2 = code;
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, in memory));
		}

		public void fidiv(AssemblerMemoryOperand dst)
		{
			Code code;
			if (dst.Size == MemoryOperandSize.Dword)
			{
				code = Code.Fidiv_m32int;
			}
			else
			{
				if (dst.Size != MemoryOperandSize.Word)
				{
					throw NoOpCodeFoundFor(Mnemonic.Fidiv, dst);
				}
				code = Code.Fidiv_m16int;
			}
			Code code2 = code;
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, in memory));
		}

		public void fidivr(AssemblerMemoryOperand dst)
		{
			Code code;
			if (dst.Size == MemoryOperandSize.Dword)
			{
				code = Code.Fidivr_m32int;
			}
			else
			{
				if (dst.Size != MemoryOperandSize.Word)
				{
					throw NoOpCodeFoundFor(Mnemonic.Fidivr, dst);
				}
				code = Code.Fidivr_m16int;
			}
			Code code2 = code;
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, in memory));
		}

		public void fild(AssemblerMemoryOperand dst)
		{
			Code code;
			if (dst.Size == MemoryOperandSize.Qword)
			{
				code = Code.Fild_m64int;
			}
			else if (dst.Size == MemoryOperandSize.Dword)
			{
				code = Code.Fild_m32int;
			}
			else
			{
				if (dst.Size != MemoryOperandSize.Word)
				{
					throw NoOpCodeFoundFor(Mnemonic.Fild, dst);
				}
				code = Code.Fild_m16int;
			}
			Code code2 = code;
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, in memory));
		}

		public void fimul(AssemblerMemoryOperand dst)
		{
			Code code;
			if (dst.Size == MemoryOperandSize.Dword)
			{
				code = Code.Fimul_m32int;
			}
			else
			{
				if (dst.Size != MemoryOperandSize.Word)
				{
					throw NoOpCodeFoundFor(Mnemonic.Fimul, dst);
				}
				code = Code.Fimul_m16int;
			}
			Code code2 = code;
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, in memory));
		}

		public void fincstp()
		{
			AddInstruction(Instruction.Create(Code.Fincstp));
		}

		public void finit()
		{
			AddInstruction(Instruction.Create(Code.Finit));
		}

		public void fist(AssemblerMemoryOperand dst)
		{
			Code code;
			if (dst.Size == MemoryOperandSize.Dword)
			{
				code = Code.Fist_m32int;
			}
			else
			{
				if (dst.Size != MemoryOperandSize.Word)
				{
					throw NoOpCodeFoundFor(Mnemonic.Fist, dst);
				}
				code = Code.Fist_m16int;
			}
			Code code2 = code;
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, in memory));
		}

		public void fistp(AssemblerMemoryOperand dst)
		{
			Code code;
			if (dst.Size == MemoryOperandSize.Qword)
			{
				code = Code.Fistp_m64int;
			}
			else if (dst.Size == MemoryOperandSize.Dword)
			{
				code = Code.Fistp_m32int;
			}
			else
			{
				if (dst.Size != MemoryOperandSize.Word)
				{
					throw NoOpCodeFoundFor(Mnemonic.Fistp, dst);
				}
				code = Code.Fistp_m16int;
			}
			Code code2 = code;
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, in memory));
		}

		public void fisttp(AssemblerMemoryOperand dst)
		{
			Code code;
			if (dst.Size == MemoryOperandSize.Qword)
			{
				code = Code.Fisttp_m64int;
			}
			else if (dst.Size == MemoryOperandSize.Dword)
			{
				code = Code.Fisttp_m32int;
			}
			else
			{
				if (dst.Size != MemoryOperandSize.Word)
				{
					throw NoOpCodeFoundFor(Mnemonic.Fisttp, dst);
				}
				code = Code.Fisttp_m16int;
			}
			Code code2 = code;
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, in memory));
		}

		public void fisub(AssemblerMemoryOperand dst)
		{
			Code code;
			if (dst.Size == MemoryOperandSize.Dword)
			{
				code = Code.Fisub_m32int;
			}
			else
			{
				if (dst.Size != MemoryOperandSize.Word)
				{
					throw NoOpCodeFoundFor(Mnemonic.Fisub, dst);
				}
				code = Code.Fisub_m16int;
			}
			Code code2 = code;
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, in memory));
		}

		public void fisubr(AssemblerMemoryOperand dst)
		{
			Code code;
			if (dst.Size == MemoryOperandSize.Dword)
			{
				code = Code.Fisubr_m32int;
			}
			else
			{
				if (dst.Size != MemoryOperandSize.Word)
				{
					throw NoOpCodeFoundFor(Mnemonic.Fisubr, dst);
				}
				code = Code.Fisubr_m16int;
			}
			Code code2 = code;
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, in memory));
		}

		public void fld(AssemblerRegisterST dst)
		{
			AddInstruction(Instruction.Create(Code.Fld_sti, dst));
		}

		public void fld(AssemblerMemoryOperand dst)
		{
			Code code;
			if (dst.Size == MemoryOperandSize.Tbyte)
			{
				code = Code.Fld_m80fp;
			}
			else if (dst.Size == MemoryOperandSize.Qword)
			{
				code = Code.Fld_m64fp;
			}
			else
			{
				if (dst.Size != MemoryOperandSize.Dword)
				{
					throw NoOpCodeFoundFor(Mnemonic.Fld, dst);
				}
				code = Code.Fld_m32fp;
			}
			Code code2 = code;
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, in memory));
		}

		public void fld1()
		{
			AddInstruction(Instruction.Create(Code.Fld1));
		}

		public void fldcw(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Fldcw_m2byte, in memory));
		}

		public void fldenv(AssemblerMemoryOperand dst)
		{
			Code code = ((Bitness >= 32) ? Code.Fldenv_m28byte : Code.Fldenv_m14byte);
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, in memory));
		}

		public void fldl2e()
		{
			AddInstruction(Instruction.Create(Code.Fldl2e));
		}

		public void fldl2t()
		{
			AddInstruction(Instruction.Create(Code.Fldl2t));
		}

		public void fldlg2()
		{
			AddInstruction(Instruction.Create(Code.Fldlg2));
		}

		public void fldln2()
		{
			AddInstruction(Instruction.Create(Code.Fldln2));
		}

		public void fldpi()
		{
			AddInstruction(Instruction.Create(Code.Fldpi));
		}

		public void fldz()
		{
			AddInstruction(Instruction.Create(Code.Fldz));
		}

		public void fmul(AssemblerMemoryOperand dst)
		{
			Code code;
			if (dst.Size == MemoryOperandSize.Qword)
			{
				code = Code.Fmul_m64fp;
			}
			else
			{
				if (dst.Size != MemoryOperandSize.Dword)
				{
					throw NoOpCodeFoundFor(Mnemonic.Fmul, dst);
				}
				code = Code.Fmul_m32fp;
			}
			Code code2 = code;
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, in memory));
		}

		public void fmul(AssemblerRegisterST dst, AssemblerRegisterST src)
		{
			Code code = (((Register)dst == Register.ST0) ? Code.Fmul_st0_sti : Code.Fmul_sti_st0);
			AddInstruction(Instruction.Create(code, dst, src));
		}

		public void fmulp(AssemblerRegisterST dst, AssemblerRegisterST src)
		{
			AddInstruction(Instruction.Create(Code.Fmulp_sti_st0, dst, src));
		}

		public void fnclex()
		{
			AddInstruction(Instruction.Create(Code.Fnclex));
		}

		public void fndisi()
		{
			AddInstruction(Instruction.Create(Code.Fndisi));
		}

		public void fneni()
		{
			AddInstruction(Instruction.Create(Code.Fneni));
		}

		public void fninit()
		{
			AddInstruction(Instruction.Create(Code.Fninit));
		}

		public void fnop()
		{
			AddInstruction(Instruction.Create(Code.Fnop));
		}

		public void fnsave(AssemblerMemoryOperand dst)
		{
			Code code = ((Bitness >= 32) ? Code.Fnsave_m108byte : Code.Fnsave_m94byte);
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, in memory));
		}

		public void fnsetpm()
		{
			AddInstruction(Instruction.Create(Code.Fnsetpm));
		}

		public void fnstcw(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Fnstcw_m2byte, in memory));
		}

		public void fnstdw(AssemblerRegister16 dst)
		{
			AddInstruction(Instruction.Create(Code.Fnstdw_AX, dst));
		}

		public void fnstenv(AssemblerMemoryOperand dst)
		{
			Code code = ((Bitness >= 32) ? Code.Fnstenv_m28byte : Code.Fnstenv_m14byte);
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, in memory));
		}

		public void fnstsg(AssemblerRegister16 dst)
		{
			AddInstruction(Instruction.Create(Code.Fnstsg_AX, dst));
		}

		public void fnstsw(AssemblerRegister16 dst)
		{
			AddInstruction(Instruction.Create(Code.Fnstsw_AX, dst));
		}

		public void fnstsw(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Fnstsw_m2byte, in memory));
		}

		public void fpatan()
		{
			AddInstruction(Instruction.Create(Code.Fpatan));
		}

		public void fprem()
		{
			AddInstruction(Instruction.Create(Code.Fprem));
		}

		public void fprem1()
		{
			AddInstruction(Instruction.Create(Code.Fprem1));
		}

		public void fptan()
		{
			AddInstruction(Instruction.Create(Code.Fptan));
		}

		public void frndint()
		{
			AddInstruction(Instruction.Create(Code.Frndint));
		}

		public void frstor(AssemblerMemoryOperand dst)
		{
			Code code = ((Bitness >= 32) ? Code.Frstor_m108byte : Code.Frstor_m94byte);
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, in memory));
		}

		public void frstpm()
		{
			AddInstruction(Instruction.Create(Code.Frstpm));
		}

		public void fsave(AssemblerMemoryOperand dst)
		{
			Code code = ((Bitness >= 32) ? Code.Fsave_m108byte : Code.Fsave_m94byte);
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, in memory));
		}

		public void fscale()
		{
			AddInstruction(Instruction.Create(Code.Fscale));
		}

		public void fsetpm()
		{
			AddInstruction(Instruction.Create(Code.Fsetpm));
		}

		public void fsin()
		{
			AddInstruction(Instruction.Create(Code.Fsin));
		}

		public void fsincos()
		{
			AddInstruction(Instruction.Create(Code.Fsincos));
		}

		public void fsqrt()
		{
			AddInstruction(Instruction.Create(Code.Fsqrt));
		}

		public void fst(AssemblerRegisterST dst)
		{
			AddInstruction(Instruction.Create(Code.Fst_sti, dst));
		}

		public void fst(AssemblerMemoryOperand dst)
		{
			Code code;
			if (dst.Size == MemoryOperandSize.Qword)
			{
				code = Code.Fst_m64fp;
			}
			else
			{
				if (dst.Size != MemoryOperandSize.Dword)
				{
					throw NoOpCodeFoundFor(Mnemonic.Fst, dst);
				}
				code = Code.Fst_m32fp;
			}
			Code code2 = code;
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, in memory));
		}

		public void fstcw(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Fstcw_m2byte, in memory));
		}

		public void fstdw(AssemblerRegister16 dst)
		{
			AddInstruction(Instruction.Create(Code.Fstdw_AX, dst));
		}

		public void fstenv(AssemblerMemoryOperand dst)
		{
			Code code = ((Bitness >= 32) ? Code.Fstenv_m28byte : Code.Fstenv_m14byte);
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, in memory));
		}

		public void fstp(AssemblerRegisterST dst)
		{
			AddInstruction(Instruction.Create(Code.Fstp_sti, dst));
		}

		public void fstp(AssemblerMemoryOperand dst)
		{
			Code code;
			if (dst.Size == MemoryOperandSize.Tbyte)
			{
				code = Code.Fstp_m80fp;
			}
			else if (dst.Size == MemoryOperandSize.Qword)
			{
				code = Code.Fstp_m64fp;
			}
			else
			{
				if (dst.Size != MemoryOperandSize.Dword)
				{
					throw NoOpCodeFoundFor(Mnemonic.Fstp, dst);
				}
				code = Code.Fstp_m32fp;
			}
			Code code2 = code;
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, in memory));
		}

		public void fstpnce(AssemblerRegisterST dst)
		{
			AddInstruction(Instruction.Create(Code.Fstpnce_sti, dst));
		}

		public void fstsg(AssemblerRegister16 dst)
		{
			AddInstruction(Instruction.Create(Code.Fstsg_AX, dst));
		}

		public void fstsw(AssemblerRegister16 dst)
		{
			AddInstruction(Instruction.Create(Code.Fstsw_AX, dst));
		}

		public void fstsw(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Fstsw_m2byte, in memory));
		}

		public void fsub(AssemblerMemoryOperand dst)
		{
			Code code;
			if (dst.Size == MemoryOperandSize.Qword)
			{
				code = Code.Fsub_m64fp;
			}
			else
			{
				if (dst.Size != MemoryOperandSize.Dword)
				{
					throw NoOpCodeFoundFor(Mnemonic.Fsub, dst);
				}
				code = Code.Fsub_m32fp;
			}
			Code code2 = code;
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, in memory));
		}

		public void fsub(AssemblerRegisterST dst, AssemblerRegisterST src)
		{
			Code code = (((Register)dst == Register.ST0) ? Code.Fsub_st0_sti : Code.Fsub_sti_st0);
			AddInstruction(Instruction.Create(code, dst, src));
		}

		public void fsubp(AssemblerRegisterST dst, AssemblerRegisterST src)
		{
			AddInstruction(Instruction.Create(Code.Fsubp_sti_st0, dst, src));
		}

		public void fsubr(AssemblerMemoryOperand dst)
		{
			Code code;
			if (dst.Size == MemoryOperandSize.Qword)
			{
				code = Code.Fsubr_m64fp;
			}
			else
			{
				if (dst.Size != MemoryOperandSize.Dword)
				{
					throw NoOpCodeFoundFor(Mnemonic.Fsubr, dst);
				}
				code = Code.Fsubr_m32fp;
			}
			Code code2 = code;
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, in memory));
		}

		public void fsubr(AssemblerRegisterST dst, AssemblerRegisterST src)
		{
			Code code = (((Register)dst == Register.ST0) ? Code.Fsubr_st0_sti : Code.Fsubr_sti_st0);
			AddInstruction(Instruction.Create(code, dst, src));
		}

		public void fsubrp(AssemblerRegisterST dst, AssemblerRegisterST src)
		{
			AddInstruction(Instruction.Create(Code.Fsubrp_sti_st0, dst, src));
		}

		public void ftst()
		{
			AddInstruction(Instruction.Create(Code.Ftst));
		}

		public void fucom(AssemblerRegisterST dst, AssemblerRegisterST src)
		{
			AddInstruction(Instruction.Create(Code.Fucom_st0_sti, dst, src));
		}

		public void fucomi(AssemblerRegisterST dst, AssemblerRegisterST src)
		{
			AddInstruction(Instruction.Create(Code.Fucomi_st0_sti, dst, src));
		}

		public void fucomip(AssemblerRegisterST dst, AssemblerRegisterST src)
		{
			AddInstruction(Instruction.Create(Code.Fucomip_st0_sti, dst, src));
		}

		public void fucomp(AssemblerRegisterST dst, AssemblerRegisterST src)
		{
			AddInstruction(Instruction.Create(Code.Fucomp_st0_sti, dst, src));
		}

		public void fucompp()
		{
			AddInstruction(Instruction.Create(Code.Fucompp));
		}

		public void fxam()
		{
			AddInstruction(Instruction.Create(Code.Fxam));
		}

		public void fxch(AssemblerRegisterST dst, AssemblerRegisterST src)
		{
			AddInstruction(Instruction.Create(Code.Fxch_st0_sti, dst, src));
		}

		public void fxrstor(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Fxrstor_m512byte, in memory));
		}

		public void fxrstor64(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Fxrstor64_m512byte, in memory));
		}

		public void fxsave(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Fxsave_m512byte, in memory));
		}

		public void fxsave64(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Fxsave64_m512byte, in memory));
		}

		public void fxtract()
		{
			AddInstruction(Instruction.Create(Code.Fxtract));
		}

		public void fyl2x()
		{
			AddInstruction(Instruction.Create(Code.Fyl2x));
		}

		public void fyl2xp1()
		{
			AddInstruction(Instruction.Create(Code.Fyl2xp1));
		}

		public void getsec()
		{
			AddInstruction(Instruction.Create(Code.Getsecd));
		}

		public void getsecq()
		{
			AddInstruction(Instruction.Create(Code.Getsecq));
		}

		public void gf2p8affineinvqb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.Gf2p8affineinvqb_xmm_xmmm128_imm8, dst, src1, imm));
		}

		public void gf2p8affineinvqb(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Gf2p8affineinvqb_xmm_xmmm128_imm8, register, in memory, imm));
		}

		public void gf2p8affineinvqb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.Gf2p8affineinvqb_xmm_xmmm128_imm8, (Register)dst, (Register)src1, (uint)imm));
		}

		public void gf2p8affineinvqb(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Gf2p8affineinvqb_xmm_xmmm128_imm8, register, in memory, (uint)imm));
		}

		public void gf2p8affineqb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.Gf2p8affineqb_xmm_xmmm128_imm8, dst, src1, imm));
		}

		public void gf2p8affineqb(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Gf2p8affineqb_xmm_xmmm128_imm8, register, in memory, imm));
		}

		public void gf2p8affineqb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.Gf2p8affineqb_xmm_xmmm128_imm8, (Register)dst, (Register)src1, (uint)imm));
		}

		public void gf2p8affineqb(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Gf2p8affineqb_xmm_xmmm128_imm8, register, in memory, (uint)imm));
		}

		public void gf2p8mulb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Gf2p8mulb_xmm_xmmm128, dst, src));
		}

		public void gf2p8mulb(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Gf2p8mulb_xmm_xmmm128, register, in memory));
		}

		public void haddpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Haddpd_xmm_xmmm128, dst, src));
		}

		public void haddpd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Haddpd_xmm_xmmm128, register, in memory));
		}

		public void haddps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Haddps_xmm_xmmm128, dst, src));
		}

		public void haddps(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Haddps_xmm_xmmm128, register, in memory));
		}

		public void hlt()
		{
			AddInstruction(Instruction.Create(Code.Hlt));
		}

		public void hreset(sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.Hreset_imm8, imm));
		}

		public void hreset(byte imm)
		{
			AddInstruction(Instruction.Create(Code.Hreset_imm8, (uint)imm));
		}

		public void hsubpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Hsubpd_xmm_xmmm128, dst, src));
		}

		public void hsubpd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Hsubpd_xmm_xmmm128, register, in memory));
		}

		public void hsubps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Hsubps_xmm_xmmm128, dst, src));
		}

		public void hsubps(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Hsubps_xmm_xmmm128, register, in memory));
		}

		public void ibts(AssemblerRegister16 dst, AssemblerRegister16 src)
		{
			AddInstruction(Instruction.Create(Code.Ibts_rm16_r16, dst, src));
		}

		public void ibts(AssemblerMemoryOperand dst, AssemblerRegister16 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Ibts_rm16_r16, in memory, src));
		}

		public void ibts(AssemblerRegister32 dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.Ibts_rm32_r32, dst, src));
		}

		public void ibts(AssemblerMemoryOperand dst, AssemblerRegister32 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Ibts_rm32_r32, in memory, src));
		}

		public void idiv(AssemblerRegister8 dst)
		{
			AddInstruction(Instruction.Create(Code.Idiv_rm8, dst));
		}

		public void idiv(AssemblerRegister16 dst)
		{
			AddInstruction(Instruction.Create(Code.Idiv_rm16, dst));
		}

		public void idiv(AssemblerRegister32 dst)
		{
			AddInstruction(Instruction.Create(Code.Idiv_rm32, dst));
		}

		public void idiv(AssemblerRegister64 dst)
		{
			AddInstruction(Instruction.Create(Code.Idiv_rm64, dst));
		}

		public void idiv(AssemblerMemoryOperand dst)
		{
			Code code;
			if (dst.Size == MemoryOperandSize.Qword)
			{
				code = Code.Idiv_rm64;
			}
			else if (dst.Size == MemoryOperandSize.Dword)
			{
				code = Code.Idiv_rm32;
			}
			else if (dst.Size == MemoryOperandSize.Word)
			{
				code = Code.Idiv_rm16;
			}
			else
			{
				if (dst.Size != MemoryOperandSize.Byte)
				{
					throw NoOpCodeFoundFor(Mnemonic.Idiv, dst);
				}
				code = Code.Idiv_rm8;
			}
			Code code2 = code;
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, in memory));
		}

		public void imul(AssemblerRegister8 dst)
		{
			AddInstruction(Instruction.Create(Code.Imul_rm8, dst));
		}

		public void imul(AssemblerRegister16 dst)
		{
			AddInstruction(Instruction.Create(Code.Imul_rm16, dst));
		}

		public void imul(AssemblerRegister32 dst)
		{
			AddInstruction(Instruction.Create(Code.Imul_rm32, dst));
		}

		public void imul(AssemblerRegister64 dst)
		{
			AddInstruction(Instruction.Create(Code.Imul_rm64, dst));
		}

		public void imul(AssemblerMemoryOperand dst)
		{
			Code code;
			if (dst.Size == MemoryOperandSize.Qword)
			{
				code = Code.Imul_rm64;
			}
			else if (dst.Size == MemoryOperandSize.Dword)
			{
				code = Code.Imul_rm32;
			}
			else if (dst.Size == MemoryOperandSize.Word)
			{
				code = Code.Imul_rm16;
			}
			else
			{
				if (dst.Size != MemoryOperandSize.Byte)
				{
					throw NoOpCodeFoundFor(Mnemonic.Imul, dst);
				}
				code = Code.Imul_rm8;
			}
			Code code2 = code;
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, in memory));
		}

		public void imul(AssemblerRegister16 dst, AssemblerRegister16 src)
		{
			AddInstruction(Instruction.Create(Code.Imul_r16_rm16, dst, src));
		}

		public void imul(AssemblerRegister32 dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.Imul_r32_rm32, dst, src));
		}

		public void imul(AssemblerRegister64 dst, AssemblerRegister64 src)
		{
			AddInstruction(Instruction.Create(Code.Imul_r64_rm64, dst, src));
		}

		public void imul(AssemblerRegister16 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Imul_r16_rm16, register, in memory));
		}

		public void imul(AssemblerRegister32 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Imul_r32_rm32, register, in memory));
		}

		public void imul(AssemblerRegister64 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Imul_r64_rm64, register, in memory));
		}

		public void imul(AssemblerRegister16 dst, AssemblerRegister16 src1, short imm)
		{
			Code code = ((imm >= -128 && imm <= 127) ? Code.Imul_r16_rm16_imm8 : Code.Imul_r16_rm16_imm16);
			AddInstruction(Instruction.Create(code, dst, src1, imm));
		}

		public void imul(AssemblerRegister32 dst, AssemblerRegister32 src1, int imm)
		{
			Code code = ((imm >= -128 && imm <= 127) ? Code.Imul_r32_rm32_imm8 : Code.Imul_r32_rm32_imm32);
			AddInstruction(Instruction.Create(code, dst, src1, imm));
		}

		public void imul(AssemblerRegister64 dst, AssemblerRegister64 src1, int imm)
		{
			Code code = ((imm >= -128 && imm <= 127) ? Code.Imul_r64_rm64_imm8 : Code.Imul_r64_rm64_imm32);
			AddInstruction(Instruction.Create(code, dst, src1, imm));
		}

		public void imul(AssemblerRegister16 dst, AssemblerMemoryOperand src1, short imm)
		{
			Code code = ((imm >= -128 && imm <= 127) ? Code.Imul_r16_rm16_imm8 : Code.Imul_r16_rm16_imm16);
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory, imm));
		}

		public void imul(AssemblerRegister32 dst, AssemblerMemoryOperand src1, int imm)
		{
			Code code = ((imm >= -128 && imm <= 127) ? Code.Imul_r32_rm32_imm8 : Code.Imul_r32_rm32_imm32);
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory, imm));
		}

		public void imul(AssemblerRegister64 dst, AssemblerMemoryOperand src1, int imm)
		{
			Code code = ((imm >= -128 && imm <= 127) ? Code.Imul_r64_rm64_imm8 : Code.Imul_r64_rm64_imm32);
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory, imm));
		}

		public void imul(AssemblerRegister16 dst, AssemblerRegister16 src1, ushort imm)
		{
			Code code = ((imm <= 127 || (65408 <= imm && imm <= ushort.MaxValue)) ? Code.Imul_r16_rm16_imm8 : Code.Imul_r16_rm16_imm16);
			AddInstruction(Instruction.Create(code, (Register)dst, (Register)src1, (uint)imm));
		}

		public void imul(AssemblerRegister32 dst, AssemblerRegister32 src1, uint imm)
		{
			Code code = ((imm <= 127 || 4294967168u <= imm) ? Code.Imul_r32_rm32_imm8 : Code.Imul_r32_rm32_imm32);
			AddInstruction(Instruction.Create(code, dst, src1, imm));
		}

		public void imul(AssemblerRegister16 dst, AssemblerMemoryOperand src1, ushort imm)
		{
			Code code = ((imm <= 127 || (65408 <= imm && imm <= ushort.MaxValue)) ? Code.Imul_r16_rm16_imm8 : Code.Imul_r16_rm16_imm16);
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory, (uint)imm));
		}

		public void imul(AssemblerRegister32 dst, AssemblerMemoryOperand src1, uint imm)
		{
			Code code = ((imm <= 127 || 4294967168u <= imm) ? Code.Imul_r32_rm32_imm8 : Code.Imul_r32_rm32_imm32);
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory, imm));
		}

		public void @in(AssemblerRegister8 dst, AssemblerRegister16 src)
		{
			AddInstruction(Instruction.Create(Code.In_AL_DX, dst, src));
		}

		public void @in(AssemblerRegister16 dst, AssemblerRegister16 src)
		{
			AddInstruction(Instruction.Create(Code.In_AX_DX, dst, src));
		}

		public void @in(AssemblerRegister32 dst, AssemblerRegister16 src)
		{
			AddInstruction(Instruction.Create(Code.In_EAX_DX, dst, src));
		}

		public void @in(AssemblerRegister8 dst, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.In_AL_imm8, dst, imm));
		}

		public void @in(AssemblerRegister16 dst, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.In_AX_imm8, dst, imm));
		}

		public void @in(AssemblerRegister32 dst, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.In_EAX_imm8, dst, imm));
		}

		public void @in(AssemblerRegister8 dst, byte imm)
		{
			AddInstruction(Instruction.Create(Code.In_AL_imm8, (Register)dst, (uint)imm));
		}

		public void @in(AssemblerRegister16 dst, byte imm)
		{
			AddInstruction(Instruction.Create(Code.In_AX_imm8, (Register)dst, (uint)imm));
		}

		public void @in(AssemblerRegister32 dst, byte imm)
		{
			AddInstruction(Instruction.Create(Code.In_EAX_imm8, (Register)dst, (uint)imm));
		}

		public void inc(AssemblerRegister8 dst)
		{
			AddInstruction(Instruction.Create(Code.Inc_rm8, dst));
		}

		public void inc(AssemblerRegister16 dst)
		{
			Code code = ((Bitness == 64) ? Code.Inc_rm16 : Code.Inc_r16);
			AddInstruction(Instruction.Create(code, dst));
		}

		public void inc(AssemblerRegister32 dst)
		{
			Code code = ((Bitness == 64) ? Code.Inc_rm32 : Code.Inc_r32);
			AddInstruction(Instruction.Create(code, dst));
		}

		public void inc(AssemblerRegister64 dst)
		{
			AddInstruction(Instruction.Create(Code.Inc_rm64, dst));
		}

		public void inc(AssemblerMemoryOperand dst)
		{
			Code code;
			if (dst.Size == MemoryOperandSize.Qword)
			{
				code = Code.Inc_rm64;
			}
			else if (dst.Size == MemoryOperandSize.Dword)
			{
				code = Code.Inc_rm32;
			}
			else if (dst.Size == MemoryOperandSize.Word)
			{
				code = Code.Inc_rm16;
			}
			else
			{
				if (dst.Size != MemoryOperandSize.Byte)
				{
					throw NoOpCodeFoundFor(Mnemonic.Inc, dst);
				}
				code = Code.Inc_rm8;
			}
			Code code2 = code;
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, in memory));
		}

		public void incsspd(AssemblerRegister32 dst)
		{
			AddInstruction(Instruction.Create(Code.Incsspd_r32, dst));
		}

		public void incsspq(AssemblerRegister64 dst)
		{
			AddInstruction(Instruction.Create(Code.Incsspq_r64, dst));
		}

		public void insb()
		{
			AddInstruction(Instruction.CreateInsb(Bitness));
		}

		public void insd()
		{
			AddInstruction(Instruction.CreateInsd(Bitness));
		}

		public void insertps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.Insertps_xmm_xmmm32_imm8, dst, src1, imm));
		}

		public void insertps(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Insertps_xmm_xmmm32_imm8, register, in memory, imm));
		}

		public void insertps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.Insertps_xmm_xmmm32_imm8, (Register)dst, (Register)src1, (uint)imm));
		}

		public void insertps(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Insertps_xmm_xmmm32_imm8, register, in memory, (uint)imm));
		}

		public void insertq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Insertq_xmm_xmm, dst, src));
		}

		public void insertq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, sbyte imm, sbyte imm1)
		{
			AddInstruction(Instruction.Create(Code.Insertq_xmm_xmm_imm8_imm8, dst, src1, imm, imm1));
		}

		public void insertq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, byte imm, byte imm1)
		{
			AddInstruction(Instruction.Create(Code.Insertq_xmm_xmm_imm8_imm8, (Register)dst, (Register)src1, (uint)imm, (uint)imm1));
		}

		public void insw()
		{
			AddInstruction(Instruction.CreateInsw(Bitness));
		}

		public void @int(sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.Int_imm8, imm));
		}

		public void @int(byte imm)
		{
			AddInstruction(Instruction.Create(Code.Int_imm8, (uint)imm));
		}

		public void int1()
		{
			AddInstruction(Instruction.Create(Code.Int1));
		}

		public void int3()
		{
			AddInstruction(Instruction.Create(Code.Int3));
		}

		public void into()
		{
			AddInstruction(Instruction.Create(Code.Into));
		}

		public void invd()
		{
			AddInstruction(Instruction.Create(Code.Invd));
		}

		public void invept(AssemblerRegister32 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Invept_r32_m128, register, in memory));
		}

		public void invept(AssemblerRegister64 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Invept_r64_m128, register, in memory));
		}

		public void invlpg(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Invlpg_m, in memory));
		}

		public void invlpga()
		{
			Code code = ((Bitness != 64) ? ((Bitness >= 32) ? Code.Invlpgad : Code.Invlpgaw) : Code.Invlpgaq);
			AddInstruction(Instruction.Create(code));
		}

		public void invlpgb()
		{
			Code code = ((Bitness != 64) ? ((Bitness >= 32) ? Code.Invlpgbd : Code.Invlpgbw) : Code.Invlpgbq);
			AddInstruction(Instruction.Create(code));
		}

		public void invpcid(AssemblerRegister32 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Invpcid_r32_m128, register, in memory));
		}

		public void invpcid(AssemblerRegister64 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Invpcid_r64_m128, register, in memory));
		}

		public void invvpid(AssemblerRegister32 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Invvpid_r32_m128, register, in memory));
		}

		public void invvpid(AssemblerRegister64 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Invvpid_r64_m128, register, in memory));
		}

		public void iret()
		{
			AddInstruction(Instruction.Create(Code.Iretw));
		}

		public void iretd()
		{
			AddInstruction(Instruction.Create(Code.Iretd));
		}

		public void iretq()
		{
			AddInstruction(Instruction.Create(Code.Iretq));
		}

		public void ja(Label dst)
		{
			Code code = (PreferShortBranch ? ((Bitness != 64) ? ((Bitness >= 32) ? Code.Ja_rel8_32 : Code.Ja_rel8_16) : Code.Ja_rel8_64) : ((Bitness != 64) ? ((Bitness >= 32) ? Code.Ja_rel32_32 : Code.Ja_rel16) : Code.Ja_rel32_64));
			AddInstruction(Instruction.CreateBranch(code, dst.Id));
		}

		public void ja(ulong dst)
		{
			Code code = (PreferShortBranch ? ((Bitness != 64) ? ((Bitness >= 32) ? Code.Ja_rel8_32 : Code.Ja_rel8_16) : Code.Ja_rel8_64) : ((Bitness != 64) ? ((Bitness >= 32) ? Code.Ja_rel32_32 : Code.Ja_rel16) : Code.Ja_rel32_64));
			AddInstruction(Instruction.CreateBranch(code, dst));
		}

		public void jae(Label dst)
		{
			Code code = (PreferShortBranch ? ((Bitness != 64) ? ((Bitness >= 32) ? Code.Jae_rel8_32 : Code.Jae_rel8_16) : Code.Jae_rel8_64) : ((Bitness != 64) ? ((Bitness >= 32) ? Code.Jae_rel32_32 : Code.Jae_rel16) : Code.Jae_rel32_64));
			AddInstruction(Instruction.CreateBranch(code, dst.Id));
		}

		public void jae(ulong dst)
		{
			Code code = (PreferShortBranch ? ((Bitness != 64) ? ((Bitness >= 32) ? Code.Jae_rel8_32 : Code.Jae_rel8_16) : Code.Jae_rel8_64) : ((Bitness != 64) ? ((Bitness >= 32) ? Code.Jae_rel32_32 : Code.Jae_rel16) : Code.Jae_rel32_64));
			AddInstruction(Instruction.CreateBranch(code, dst));
		}

		public void jb(Label dst)
		{
			Code code = (PreferShortBranch ? ((Bitness != 64) ? ((Bitness >= 32) ? Code.Jb_rel8_32 : Code.Jb_rel8_16) : Code.Jb_rel8_64) : ((Bitness != 64) ? ((Bitness >= 32) ? Code.Jb_rel32_32 : Code.Jb_rel16) : Code.Jb_rel32_64));
			AddInstruction(Instruction.CreateBranch(code, dst.Id));
		}

		public void jb(ulong dst)
		{
			Code code = (PreferShortBranch ? ((Bitness != 64) ? ((Bitness >= 32) ? Code.Jb_rel8_32 : Code.Jb_rel8_16) : Code.Jb_rel8_64) : ((Bitness != 64) ? ((Bitness >= 32) ? Code.Jb_rel32_32 : Code.Jb_rel16) : Code.Jb_rel32_64));
			AddInstruction(Instruction.CreateBranch(code, dst));
		}

		public void jbe(Label dst)
		{
			Code code = (PreferShortBranch ? ((Bitness != 64) ? ((Bitness >= 32) ? Code.Jbe_rel8_32 : Code.Jbe_rel8_16) : Code.Jbe_rel8_64) : ((Bitness != 64) ? ((Bitness >= 32) ? Code.Jbe_rel32_32 : Code.Jbe_rel16) : Code.Jbe_rel32_64));
			AddInstruction(Instruction.CreateBranch(code, dst.Id));
		}

		public void jbe(ulong dst)
		{
			Code code = (PreferShortBranch ? ((Bitness != 64) ? ((Bitness >= 32) ? Code.Jbe_rel8_32 : Code.Jbe_rel8_16) : Code.Jbe_rel8_64) : ((Bitness != 64) ? ((Bitness >= 32) ? Code.Jbe_rel32_32 : Code.Jbe_rel16) : Code.Jbe_rel32_64));
			AddInstruction(Instruction.CreateBranch(code, dst));
		}

		public void jc(Label dst)
		{
			Code code = (PreferShortBranch ? ((Bitness != 64) ? ((Bitness >= 32) ? Code.Jb_rel8_32 : Code.Jb_rel8_16) : Code.Jb_rel8_64) : ((Bitness != 64) ? ((Bitness >= 32) ? Code.Jb_rel32_32 : Code.Jb_rel16) : Code.Jb_rel32_64));
			AddInstruction(Instruction.CreateBranch(code, dst.Id));
		}

		public void jc(ulong dst)
		{
			Code code = (PreferShortBranch ? ((Bitness != 64) ? ((Bitness >= 32) ? Code.Jb_rel8_32 : Code.Jb_rel8_16) : Code.Jb_rel8_64) : ((Bitness != 64) ? ((Bitness >= 32) ? Code.Jb_rel32_32 : Code.Jb_rel16) : Code.Jb_rel32_64));
			AddInstruction(Instruction.CreateBranch(code, dst));
		}

		public void jcxz(Label dst)
		{
			AddInstruction(Instruction.CreateBranch(Code.Jcxz_rel8_16, dst.Id));
		}

		public void jcxz(ulong dst)
		{
			AddInstruction(Instruction.CreateBranch(Code.Jcxz_rel8_16, dst));
		}

		public void je(Label dst)
		{
			Code code = (PreferShortBranch ? ((Bitness != 64) ? ((Bitness >= 32) ? Code.Je_rel8_32 : Code.Je_rel8_16) : Code.Je_rel8_64) : ((Bitness != 64) ? ((Bitness >= 32) ? Code.Je_rel32_32 : Code.Je_rel16) : Code.Je_rel32_64));
			AddInstruction(Instruction.CreateBranch(code, dst.Id));
		}

		public void je(ulong dst)
		{
			Code code = (PreferShortBranch ? ((Bitness != 64) ? ((Bitness >= 32) ? Code.Je_rel8_32 : Code.Je_rel8_16) : Code.Je_rel8_64) : ((Bitness != 64) ? ((Bitness >= 32) ? Code.Je_rel32_32 : Code.Je_rel16) : Code.Je_rel32_64));
			AddInstruction(Instruction.CreateBranch(code, dst));
		}

		public void jecxz(Label dst)
		{
			AddInstruction(Instruction.CreateBranch(Code.Jecxz_rel8_32, dst.Id));
		}

		public void jecxz(ulong dst)
		{
			AddInstruction(Instruction.CreateBranch(Code.Jecxz_rel8_32, dst));
		}

		public void jg(Label dst)
		{
			Code code = (PreferShortBranch ? ((Bitness != 64) ? ((Bitness >= 32) ? Code.Jg_rel8_32 : Code.Jg_rel8_16) : Code.Jg_rel8_64) : ((Bitness != 64) ? ((Bitness >= 32) ? Code.Jg_rel32_32 : Code.Jg_rel16) : Code.Jg_rel32_64));
			AddInstruction(Instruction.CreateBranch(code, dst.Id));
		}

		public void jg(ulong dst)
		{
			Code code = (PreferShortBranch ? ((Bitness != 64) ? ((Bitness >= 32) ? Code.Jg_rel8_32 : Code.Jg_rel8_16) : Code.Jg_rel8_64) : ((Bitness != 64) ? ((Bitness >= 32) ? Code.Jg_rel32_32 : Code.Jg_rel16) : Code.Jg_rel32_64));
			AddInstruction(Instruction.CreateBranch(code, dst));
		}

		public void jge(Label dst)
		{
			Code code = (PreferShortBranch ? ((Bitness != 64) ? ((Bitness >= 32) ? Code.Jge_rel8_32 : Code.Jge_rel8_16) : Code.Jge_rel8_64) : ((Bitness != 64) ? ((Bitness >= 32) ? Code.Jge_rel32_32 : Code.Jge_rel16) : Code.Jge_rel32_64));
			AddInstruction(Instruction.CreateBranch(code, dst.Id));
		}

		public void jge(ulong dst)
		{
			Code code = (PreferShortBranch ? ((Bitness != 64) ? ((Bitness >= 32) ? Code.Jge_rel8_32 : Code.Jge_rel8_16) : Code.Jge_rel8_64) : ((Bitness != 64) ? ((Bitness >= 32) ? Code.Jge_rel32_32 : Code.Jge_rel16) : Code.Jge_rel32_64));
			AddInstruction(Instruction.CreateBranch(code, dst));
		}

		public void jl(Label dst)
		{
			Code code = (PreferShortBranch ? ((Bitness != 64) ? ((Bitness >= 32) ? Code.Jl_rel8_32 : Code.Jl_rel8_16) : Code.Jl_rel8_64) : ((Bitness != 64) ? ((Bitness >= 32) ? Code.Jl_rel32_32 : Code.Jl_rel16) : Code.Jl_rel32_64));
			AddInstruction(Instruction.CreateBranch(code, dst.Id));
		}

		public void jl(ulong dst)
		{
			Code code = (PreferShortBranch ? ((Bitness != 64) ? ((Bitness >= 32) ? Code.Jl_rel8_32 : Code.Jl_rel8_16) : Code.Jl_rel8_64) : ((Bitness != 64) ? ((Bitness >= 32) ? Code.Jl_rel32_32 : Code.Jl_rel16) : Code.Jl_rel32_64));
			AddInstruction(Instruction.CreateBranch(code, dst));
		}

		public void jle(Label dst)
		{
			Code code = (PreferShortBranch ? ((Bitness != 64) ? ((Bitness >= 32) ? Code.Jle_rel8_32 : Code.Jle_rel8_16) : Code.Jle_rel8_64) : ((Bitness != 64) ? ((Bitness >= 32) ? Code.Jle_rel32_32 : Code.Jle_rel16) : Code.Jle_rel32_64));
			AddInstruction(Instruction.CreateBranch(code, dst.Id));
		}

		public void jle(ulong dst)
		{
			Code code = (PreferShortBranch ? ((Bitness != 64) ? ((Bitness >= 32) ? Code.Jle_rel8_32 : Code.Jle_rel8_16) : Code.Jle_rel8_64) : ((Bitness != 64) ? ((Bitness >= 32) ? Code.Jle_rel32_32 : Code.Jle_rel16) : Code.Jle_rel32_64));
			AddInstruction(Instruction.CreateBranch(code, dst));
		}

		public void jmp(AssemblerRegister16 dst)
		{
			AddInstruction(Instruction.Create(Code.Jmp_rm16, dst));
		}

		public void jmp(AssemblerRegister32 dst)
		{
			AddInstruction(Instruction.Create(Code.Jmp_rm32, dst));
		}

		public void jmp(AssemblerRegister64 dst)
		{
			AddInstruction(Instruction.Create(Code.Jmp_rm64, dst));
		}

		public void jmp(AssemblerMemoryOperand dst)
		{
			Code code;
			if (dst.Size == MemoryOperandSize.Tbyte)
			{
				code = Code.Jmp_m1664;
			}
			else if (dst.Size == MemoryOperandSize.Qword)
			{
				code = Code.Jmp_rm64;
			}
			else if (dst.Size == MemoryOperandSize.Fword)
			{
				code = Code.Jmp_m1632;
			}
			else if (dst.Size == MemoryOperandSize.Dword)
			{
				code = ((Bitness >= 32) ? Code.Jmp_rm32 : Code.Jmp_m1616);
			}
			else
			{
				if (dst.Size != MemoryOperandSize.Word)
				{
					throw NoOpCodeFoundFor(Mnemonic.Jmp, dst);
				}
				code = Code.Jmp_rm16;
			}
			Code code2 = code;
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, in memory));
		}

		public void jmp(Label dst)
		{
			Code code = (PreferShortBranch ? ((Bitness != 64) ? ((Bitness >= 32) ? Code.Jmp_rel8_32 : Code.Jmp_rel8_16) : Code.Jmp_rel8_64) : ((Bitness != 64) ? ((Bitness >= 32) ? Code.Jmp_rel32_32 : Code.Jmp_rel16) : Code.Jmp_rel32_64));
			AddInstruction(Instruction.CreateBranch(code, dst.Id));
		}

		public void jmp(ulong dst)
		{
			Code code = (PreferShortBranch ? ((Bitness != 64) ? ((Bitness >= 32) ? Code.Jmp_rel8_32 : Code.Jmp_rel8_16) : Code.Jmp_rel8_64) : ((Bitness != 64) ? ((Bitness >= 32) ? Code.Jmp_rel32_32 : Code.Jmp_rel16) : Code.Jmp_rel32_64));
			AddInstruction(Instruction.CreateBranch(code, dst));
		}

		public void jmpe(AssemblerRegister16 dst)
		{
			AddInstruction(Instruction.Create(Code.Jmpe_rm16, dst));
		}

		public void jmpe(AssemblerRegister32 dst)
		{
			AddInstruction(Instruction.Create(Code.Jmpe_rm32, dst));
		}

		public void jmpe(AssemblerMemoryOperand dst)
		{
			Code code = ((Bitness >= 32) ? Code.Jmpe_rm32 : Code.Jmpe_rm16);
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, in memory));
		}

		public void jmpe(Label dst)
		{
			Code code = ((Bitness >= 32) ? Code.Jmpe_disp32 : Code.Jmpe_disp16);
			AddInstruction(Instruction.CreateBranch(code, dst.Id));
		}

		public void jmpe(ulong dst)
		{
			Code code = ((Bitness >= 32) ? Code.Jmpe_disp32 : Code.Jmpe_disp16);
			AddInstruction(Instruction.CreateBranch(code, dst));
		}

		public void jna(Label dst)
		{
			Code code = (PreferShortBranch ? ((Bitness != 64) ? ((Bitness >= 32) ? Code.Jbe_rel8_32 : Code.Jbe_rel8_16) : Code.Jbe_rel8_64) : ((Bitness != 64) ? ((Bitness >= 32) ? Code.Jbe_rel32_32 : Code.Jbe_rel16) : Code.Jbe_rel32_64));
			AddInstruction(Instruction.CreateBranch(code, dst.Id));
		}

		public void jna(ulong dst)
		{
			Code code = (PreferShortBranch ? ((Bitness != 64) ? ((Bitness >= 32) ? Code.Jbe_rel8_32 : Code.Jbe_rel8_16) : Code.Jbe_rel8_64) : ((Bitness != 64) ? ((Bitness >= 32) ? Code.Jbe_rel32_32 : Code.Jbe_rel16) : Code.Jbe_rel32_64));
			AddInstruction(Instruction.CreateBranch(code, dst));
		}

		public void jnae(Label dst)
		{
			Code code = (PreferShortBranch ? ((Bitness != 64) ? ((Bitness >= 32) ? Code.Jb_rel8_32 : Code.Jb_rel8_16) : Code.Jb_rel8_64) : ((Bitness != 64) ? ((Bitness >= 32) ? Code.Jb_rel32_32 : Code.Jb_rel16) : Code.Jb_rel32_64));
			AddInstruction(Instruction.CreateBranch(code, dst.Id));
		}

		public void jnae(ulong dst)
		{
			Code code = (PreferShortBranch ? ((Bitness != 64) ? ((Bitness >= 32) ? Code.Jb_rel8_32 : Code.Jb_rel8_16) : Code.Jb_rel8_64) : ((Bitness != 64) ? ((Bitness >= 32) ? Code.Jb_rel32_32 : Code.Jb_rel16) : Code.Jb_rel32_64));
			AddInstruction(Instruction.CreateBranch(code, dst));
		}

		public void jnb(Label dst)
		{
			Code code = (PreferShortBranch ? ((Bitness != 64) ? ((Bitness >= 32) ? Code.Jae_rel8_32 : Code.Jae_rel8_16) : Code.Jae_rel8_64) : ((Bitness != 64) ? ((Bitness >= 32) ? Code.Jae_rel32_32 : Code.Jae_rel16) : Code.Jae_rel32_64));
			AddInstruction(Instruction.CreateBranch(code, dst.Id));
		}

		public void jnb(ulong dst)
		{
			Code code = (PreferShortBranch ? ((Bitness != 64) ? ((Bitness >= 32) ? Code.Jae_rel8_32 : Code.Jae_rel8_16) : Code.Jae_rel8_64) : ((Bitness != 64) ? ((Bitness >= 32) ? Code.Jae_rel32_32 : Code.Jae_rel16) : Code.Jae_rel32_64));
			AddInstruction(Instruction.CreateBranch(code, dst));
		}

		public void jnbe(Label dst)
		{
			Code code = (PreferShortBranch ? ((Bitness != 64) ? ((Bitness >= 32) ? Code.Ja_rel8_32 : Code.Ja_rel8_16) : Code.Ja_rel8_64) : ((Bitness != 64) ? ((Bitness >= 32) ? Code.Ja_rel32_32 : Code.Ja_rel16) : Code.Ja_rel32_64));
			AddInstruction(Instruction.CreateBranch(code, dst.Id));
		}

		public void jnbe(ulong dst)
		{
			Code code = (PreferShortBranch ? ((Bitness != 64) ? ((Bitness >= 32) ? Code.Ja_rel8_32 : Code.Ja_rel8_16) : Code.Ja_rel8_64) : ((Bitness != 64) ? ((Bitness >= 32) ? Code.Ja_rel32_32 : Code.Ja_rel16) : Code.Ja_rel32_64));
			AddInstruction(Instruction.CreateBranch(code, dst));
		}

		public void jnc(Label dst)
		{
			Code code = (PreferShortBranch ? ((Bitness != 64) ? ((Bitness >= 32) ? Code.Jae_rel8_32 : Code.Jae_rel8_16) : Code.Jae_rel8_64) : ((Bitness != 64) ? ((Bitness >= 32) ? Code.Jae_rel32_32 : Code.Jae_rel16) : Code.Jae_rel32_64));
			AddInstruction(Instruction.CreateBranch(code, dst.Id));
		}

		public void jnc(ulong dst)
		{
			Code code = (PreferShortBranch ? ((Bitness != 64) ? ((Bitness >= 32) ? Code.Jae_rel8_32 : Code.Jae_rel8_16) : Code.Jae_rel8_64) : ((Bitness != 64) ? ((Bitness >= 32) ? Code.Jae_rel32_32 : Code.Jae_rel16) : Code.Jae_rel32_64));
			AddInstruction(Instruction.CreateBranch(code, dst));
		}

		public void jne(Label dst)
		{
			Code code = (PreferShortBranch ? ((Bitness != 64) ? ((Bitness >= 32) ? Code.Jne_rel8_32 : Code.Jne_rel8_16) : Code.Jne_rel8_64) : ((Bitness != 64) ? ((Bitness >= 32) ? Code.Jne_rel32_32 : Code.Jne_rel16) : Code.Jne_rel32_64));
			AddInstruction(Instruction.CreateBranch(code, dst.Id));
		}

		public void jne(ulong dst)
		{
			Code code = (PreferShortBranch ? ((Bitness != 64) ? ((Bitness >= 32) ? Code.Jne_rel8_32 : Code.Jne_rel8_16) : Code.Jne_rel8_64) : ((Bitness != 64) ? ((Bitness >= 32) ? Code.Jne_rel32_32 : Code.Jne_rel16) : Code.Jne_rel32_64));
			AddInstruction(Instruction.CreateBranch(code, dst));
		}

		public void jng(Label dst)
		{
			Code code = (PreferShortBranch ? ((Bitness != 64) ? ((Bitness >= 32) ? Code.Jle_rel8_32 : Code.Jle_rel8_16) : Code.Jle_rel8_64) : ((Bitness != 64) ? ((Bitness >= 32) ? Code.Jle_rel32_32 : Code.Jle_rel16) : Code.Jle_rel32_64));
			AddInstruction(Instruction.CreateBranch(code, dst.Id));
		}

		public void jng(ulong dst)
		{
			Code code = (PreferShortBranch ? ((Bitness != 64) ? ((Bitness >= 32) ? Code.Jle_rel8_32 : Code.Jle_rel8_16) : Code.Jle_rel8_64) : ((Bitness != 64) ? ((Bitness >= 32) ? Code.Jle_rel32_32 : Code.Jle_rel16) : Code.Jle_rel32_64));
			AddInstruction(Instruction.CreateBranch(code, dst));
		}

		public void jnge(Label dst)
		{
			Code code = (PreferShortBranch ? ((Bitness != 64) ? ((Bitness >= 32) ? Code.Jl_rel8_32 : Code.Jl_rel8_16) : Code.Jl_rel8_64) : ((Bitness != 64) ? ((Bitness >= 32) ? Code.Jl_rel32_32 : Code.Jl_rel16) : Code.Jl_rel32_64));
			AddInstruction(Instruction.CreateBranch(code, dst.Id));
		}

		public void jnge(ulong dst)
		{
			Code code = (PreferShortBranch ? ((Bitness != 64) ? ((Bitness >= 32) ? Code.Jl_rel8_32 : Code.Jl_rel8_16) : Code.Jl_rel8_64) : ((Bitness != 64) ? ((Bitness >= 32) ? Code.Jl_rel32_32 : Code.Jl_rel16) : Code.Jl_rel32_64));
			AddInstruction(Instruction.CreateBranch(code, dst));
		}

		public void jnl(Label dst)
		{
			Code code = (PreferShortBranch ? ((Bitness != 64) ? ((Bitness >= 32) ? Code.Jge_rel8_32 : Code.Jge_rel8_16) : Code.Jge_rel8_64) : ((Bitness != 64) ? ((Bitness >= 32) ? Code.Jge_rel32_32 : Code.Jge_rel16) : Code.Jge_rel32_64));
			AddInstruction(Instruction.CreateBranch(code, dst.Id));
		}

		public void jnl(ulong dst)
		{
			Code code = (PreferShortBranch ? ((Bitness != 64) ? ((Bitness >= 32) ? Code.Jge_rel8_32 : Code.Jge_rel8_16) : Code.Jge_rel8_64) : ((Bitness != 64) ? ((Bitness >= 32) ? Code.Jge_rel32_32 : Code.Jge_rel16) : Code.Jge_rel32_64));
			AddInstruction(Instruction.CreateBranch(code, dst));
		}

		public void jnle(Label dst)
		{
			Code code = (PreferShortBranch ? ((Bitness != 64) ? ((Bitness >= 32) ? Code.Jg_rel8_32 : Code.Jg_rel8_16) : Code.Jg_rel8_64) : ((Bitness != 64) ? ((Bitness >= 32) ? Code.Jg_rel32_32 : Code.Jg_rel16) : Code.Jg_rel32_64));
			AddInstruction(Instruction.CreateBranch(code, dst.Id));
		}

		public void jnle(ulong dst)
		{
			Code code = (PreferShortBranch ? ((Bitness != 64) ? ((Bitness >= 32) ? Code.Jg_rel8_32 : Code.Jg_rel8_16) : Code.Jg_rel8_64) : ((Bitness != 64) ? ((Bitness >= 32) ? Code.Jg_rel32_32 : Code.Jg_rel16) : Code.Jg_rel32_64));
			AddInstruction(Instruction.CreateBranch(code, dst));
		}

		public void jno(Label dst)
		{
			Code code = (PreferShortBranch ? ((Bitness != 64) ? ((Bitness >= 32) ? Code.Jno_rel8_32 : Code.Jno_rel8_16) : Code.Jno_rel8_64) : ((Bitness != 64) ? ((Bitness >= 32) ? Code.Jno_rel32_32 : Code.Jno_rel16) : Code.Jno_rel32_64));
			AddInstruction(Instruction.CreateBranch(code, dst.Id));
		}

		public void jno(ulong dst)
		{
			Code code = (PreferShortBranch ? ((Bitness != 64) ? ((Bitness >= 32) ? Code.Jno_rel8_32 : Code.Jno_rel8_16) : Code.Jno_rel8_64) : ((Bitness != 64) ? ((Bitness >= 32) ? Code.Jno_rel32_32 : Code.Jno_rel16) : Code.Jno_rel32_64));
			AddInstruction(Instruction.CreateBranch(code, dst));
		}

		public void jnp(Label dst)
		{
			Code code = (PreferShortBranch ? ((Bitness != 64) ? ((Bitness >= 32) ? Code.Jnp_rel8_32 : Code.Jnp_rel8_16) : Code.Jnp_rel8_64) : ((Bitness != 64) ? ((Bitness >= 32) ? Code.Jnp_rel32_32 : Code.Jnp_rel16) : Code.Jnp_rel32_64));
			AddInstruction(Instruction.CreateBranch(code, dst.Id));
		}

		public void jnp(ulong dst)
		{
			Code code = (PreferShortBranch ? ((Bitness != 64) ? ((Bitness >= 32) ? Code.Jnp_rel8_32 : Code.Jnp_rel8_16) : Code.Jnp_rel8_64) : ((Bitness != 64) ? ((Bitness >= 32) ? Code.Jnp_rel32_32 : Code.Jnp_rel16) : Code.Jnp_rel32_64));
			AddInstruction(Instruction.CreateBranch(code, dst));
		}

		public void jns(Label dst)
		{
			Code code = (PreferShortBranch ? ((Bitness != 64) ? ((Bitness >= 32) ? Code.Jns_rel8_32 : Code.Jns_rel8_16) : Code.Jns_rel8_64) : ((Bitness != 64) ? ((Bitness >= 32) ? Code.Jns_rel32_32 : Code.Jns_rel16) : Code.Jns_rel32_64));
			AddInstruction(Instruction.CreateBranch(code, dst.Id));
		}

		public void jns(ulong dst)
		{
			Code code = (PreferShortBranch ? ((Bitness != 64) ? ((Bitness >= 32) ? Code.Jns_rel8_32 : Code.Jns_rel8_16) : Code.Jns_rel8_64) : ((Bitness != 64) ? ((Bitness >= 32) ? Code.Jns_rel32_32 : Code.Jns_rel16) : Code.Jns_rel32_64));
			AddInstruction(Instruction.CreateBranch(code, dst));
		}

		public void jnz(Label dst)
		{
			Code code = (PreferShortBranch ? ((Bitness != 64) ? ((Bitness >= 32) ? Code.Jne_rel8_32 : Code.Jne_rel8_16) : Code.Jne_rel8_64) : ((Bitness != 64) ? ((Bitness >= 32) ? Code.Jne_rel32_32 : Code.Jne_rel16) : Code.Jne_rel32_64));
			AddInstruction(Instruction.CreateBranch(code, dst.Id));
		}

		public void jnz(ulong dst)
		{
			Code code = (PreferShortBranch ? ((Bitness != 64) ? ((Bitness >= 32) ? Code.Jne_rel8_32 : Code.Jne_rel8_16) : Code.Jne_rel8_64) : ((Bitness != 64) ? ((Bitness >= 32) ? Code.Jne_rel32_32 : Code.Jne_rel16) : Code.Jne_rel32_64));
			AddInstruction(Instruction.CreateBranch(code, dst));
		}

		public void jo(Label dst)
		{
			Code code = (PreferShortBranch ? ((Bitness != 64) ? ((Bitness >= 32) ? Code.Jo_rel8_32 : Code.Jo_rel8_16) : Code.Jo_rel8_64) : ((Bitness != 64) ? ((Bitness >= 32) ? Code.Jo_rel32_32 : Code.Jo_rel16) : Code.Jo_rel32_64));
			AddInstruction(Instruction.CreateBranch(code, dst.Id));
		}

		public void jo(ulong dst)
		{
			Code code = (PreferShortBranch ? ((Bitness != 64) ? ((Bitness >= 32) ? Code.Jo_rel8_32 : Code.Jo_rel8_16) : Code.Jo_rel8_64) : ((Bitness != 64) ? ((Bitness >= 32) ? Code.Jo_rel32_32 : Code.Jo_rel16) : Code.Jo_rel32_64));
			AddInstruction(Instruction.CreateBranch(code, dst));
		}

		public void jp(Label dst)
		{
			Code code = (PreferShortBranch ? ((Bitness != 64) ? ((Bitness >= 32) ? Code.Jp_rel8_32 : Code.Jp_rel8_16) : Code.Jp_rel8_64) : ((Bitness != 64) ? ((Bitness >= 32) ? Code.Jp_rel32_32 : Code.Jp_rel16) : Code.Jp_rel32_64));
			AddInstruction(Instruction.CreateBranch(code, dst.Id));
		}

		public void jp(ulong dst)
		{
			Code code = (PreferShortBranch ? ((Bitness != 64) ? ((Bitness >= 32) ? Code.Jp_rel8_32 : Code.Jp_rel8_16) : Code.Jp_rel8_64) : ((Bitness != 64) ? ((Bitness >= 32) ? Code.Jp_rel32_32 : Code.Jp_rel16) : Code.Jp_rel32_64));
			AddInstruction(Instruction.CreateBranch(code, dst));
		}

		public void jpe(Label dst)
		{
			Code code = (PreferShortBranch ? ((Bitness != 64) ? ((Bitness >= 32) ? Code.Jp_rel8_32 : Code.Jp_rel8_16) : Code.Jp_rel8_64) : ((Bitness != 64) ? ((Bitness >= 32) ? Code.Jp_rel32_32 : Code.Jp_rel16) : Code.Jp_rel32_64));
			AddInstruction(Instruction.CreateBranch(code, dst.Id));
		}

		public void jpe(ulong dst)
		{
			Code code = (PreferShortBranch ? ((Bitness != 64) ? ((Bitness >= 32) ? Code.Jp_rel8_32 : Code.Jp_rel8_16) : Code.Jp_rel8_64) : ((Bitness != 64) ? ((Bitness >= 32) ? Code.Jp_rel32_32 : Code.Jp_rel16) : Code.Jp_rel32_64));
			AddInstruction(Instruction.CreateBranch(code, dst));
		}

		public void jpo(Label dst)
		{
			Code code = (PreferShortBranch ? ((Bitness != 64) ? ((Bitness >= 32) ? Code.Jnp_rel8_32 : Code.Jnp_rel8_16) : Code.Jnp_rel8_64) : ((Bitness != 64) ? ((Bitness >= 32) ? Code.Jnp_rel32_32 : Code.Jnp_rel16) : Code.Jnp_rel32_64));
			AddInstruction(Instruction.CreateBranch(code, dst.Id));
		}

		public void jpo(ulong dst)
		{
			Code code = (PreferShortBranch ? ((Bitness != 64) ? ((Bitness >= 32) ? Code.Jnp_rel8_32 : Code.Jnp_rel8_16) : Code.Jnp_rel8_64) : ((Bitness != 64) ? ((Bitness >= 32) ? Code.Jnp_rel32_32 : Code.Jnp_rel16) : Code.Jnp_rel32_64));
			AddInstruction(Instruction.CreateBranch(code, dst));
		}

		public void jrcxz(Label dst)
		{
			AddInstruction(Instruction.CreateBranch(Code.Jrcxz_rel8_64, dst.Id));
		}

		public void jrcxz(ulong dst)
		{
			AddInstruction(Instruction.CreateBranch(Code.Jrcxz_rel8_64, dst));
		}

		public void js(Label dst)
		{
			Code code = (PreferShortBranch ? ((Bitness != 64) ? ((Bitness >= 32) ? Code.Js_rel8_32 : Code.Js_rel8_16) : Code.Js_rel8_64) : ((Bitness != 64) ? ((Bitness >= 32) ? Code.Js_rel32_32 : Code.Js_rel16) : Code.Js_rel32_64));
			AddInstruction(Instruction.CreateBranch(code, dst.Id));
		}

		public void js(ulong dst)
		{
			Code code = (PreferShortBranch ? ((Bitness != 64) ? ((Bitness >= 32) ? Code.Js_rel8_32 : Code.Js_rel8_16) : Code.Js_rel8_64) : ((Bitness != 64) ? ((Bitness >= 32) ? Code.Js_rel32_32 : Code.Js_rel16) : Code.Js_rel32_64));
			AddInstruction(Instruction.CreateBranch(code, dst));
		}

		public void jz(Label dst)
		{
			Code code = (PreferShortBranch ? ((Bitness != 64) ? ((Bitness >= 32) ? Code.Je_rel8_32 : Code.Je_rel8_16) : Code.Je_rel8_64) : ((Bitness != 64) ? ((Bitness >= 32) ? Code.Je_rel32_32 : Code.Je_rel16) : Code.Je_rel32_64));
			AddInstruction(Instruction.CreateBranch(code, dst.Id));
		}

		public void jz(ulong dst)
		{
			Code code = (PreferShortBranch ? ((Bitness != 64) ? ((Bitness >= 32) ? Code.Je_rel8_32 : Code.Je_rel8_16) : Code.Je_rel8_64) : ((Bitness != 64) ? ((Bitness >= 32) ? Code.Je_rel32_32 : Code.Je_rel16) : Code.Je_rel32_64));
			AddInstruction(Instruction.CreateBranch(code, dst));
		}

		public void kaddb(AssemblerRegisterK dst, AssemblerRegisterK src1, AssemblerRegisterK src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Kaddb_kr_kr_kr, dst, src1, src2));
		}

		public void kaddd(AssemblerRegisterK dst, AssemblerRegisterK src1, AssemblerRegisterK src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Kaddd_kr_kr_kr, dst, src1, src2));
		}

		public void kaddq(AssemblerRegisterK dst, AssemblerRegisterK src1, AssemblerRegisterK src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Kaddq_kr_kr_kr, dst, src1, src2));
		}

		public void kaddw(AssemblerRegisterK dst, AssemblerRegisterK src1, AssemblerRegisterK src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Kaddw_kr_kr_kr, dst, src1, src2));
		}

		public void kandb(AssemblerRegisterK dst, AssemblerRegisterK src1, AssemblerRegisterK src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Kandb_kr_kr_kr, dst, src1, src2));
		}

		public void kandd(AssemblerRegisterK dst, AssemblerRegisterK src1, AssemblerRegisterK src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Kandd_kr_kr_kr, dst, src1, src2));
		}

		public void kandnb(AssemblerRegisterK dst, AssemblerRegisterK src1, AssemblerRegisterK src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Kandnb_kr_kr_kr, dst, src1, src2));
		}

		public void kandnd(AssemblerRegisterK dst, AssemblerRegisterK src1, AssemblerRegisterK src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Kandnd_kr_kr_kr, dst, src1, src2));
		}

		public void kandnq(AssemblerRegisterK dst, AssemblerRegisterK src1, AssemblerRegisterK src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Kandnq_kr_kr_kr, dst, src1, src2));
		}

		public void kandnw(AssemblerRegisterK dst, AssemblerRegisterK src1, AssemblerRegisterK src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Kandnw_kr_kr_kr, dst, src1, src2));
		}

		public void kandq(AssemblerRegisterK dst, AssemblerRegisterK src1, AssemblerRegisterK src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Kandq_kr_kr_kr, dst, src1, src2));
		}

		public void kandw(AssemblerRegisterK dst, AssemblerRegisterK src1, AssemblerRegisterK src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Kandw_kr_kr_kr, dst, src1, src2));
		}

		public void kmovb(AssemblerRegisterK dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.VEX_Kmovb_kr_r32, dst, src));
		}

		public void kmovb(AssemblerRegister32 dst, AssemblerRegisterK src)
		{
			AddInstruction(Instruction.Create(Code.VEX_Kmovb_r32_kr, dst, src));
		}

		public void kmovb(AssemblerRegisterK dst, AssemblerRegisterK src)
		{
			AddInstruction(Instruction.Create(Code.VEX_Kmovb_kr_km8, dst, src));
		}

		public void kmovb(AssemblerMemoryOperand dst, AssemblerRegisterK src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Kmovb_m8_kr, in memory, src));
		}

		public void kmovb(AssemblerRegisterK dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Kmovb_kr_km8, register, in memory));
		}

		public void kmovd(AssemblerRegisterK dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.VEX_Kmovd_kr_r32, dst, src));
		}

		public void kmovd(AssemblerRegister32 dst, AssemblerRegisterK src)
		{
			AddInstruction(Instruction.Create(Code.VEX_Kmovd_r32_kr, dst, src));
		}

		public void kmovd(AssemblerRegisterK dst, AssemblerRegisterK src)
		{
			AddInstruction(Instruction.Create(Code.VEX_Kmovd_kr_km32, dst, src));
		}

		public void kmovd(AssemblerMemoryOperand dst, AssemblerRegisterK src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Kmovd_m32_kr, in memory, src));
		}

		public void kmovd(AssemblerRegisterK dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Kmovd_kr_km32, register, in memory));
		}

		public void kmovq(AssemblerRegisterK dst, AssemblerRegister64 src)
		{
			AddInstruction(Instruction.Create(Code.VEX_Kmovq_kr_r64, dst, src));
		}

		public void kmovq(AssemblerRegister64 dst, AssemblerRegisterK src)
		{
			AddInstruction(Instruction.Create(Code.VEX_Kmovq_r64_kr, dst, src));
		}

		public void kmovq(AssemblerRegisterK dst, AssemblerRegisterK src)
		{
			AddInstruction(Instruction.Create(Code.VEX_Kmovq_kr_km64, dst, src));
		}

		public void kmovq(AssemblerMemoryOperand dst, AssemblerRegisterK src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Kmovq_m64_kr, in memory, src));
		}

		public void kmovq(AssemblerRegisterK dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Kmovq_kr_km64, register, in memory));
		}

		public void kmovw(AssemblerRegisterK dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.VEX_Kmovw_kr_r32, dst, src));
		}

		public void kmovw(AssemblerRegister32 dst, AssemblerRegisterK src)
		{
			AddInstruction(Instruction.Create(Code.VEX_Kmovw_r32_kr, dst, src));
		}

		public void kmovw(AssemblerRegisterK dst, AssemblerRegisterK src)
		{
			AddInstruction(Instruction.Create(Code.VEX_Kmovw_kr_km16, dst, src));
		}

		public void kmovw(AssemblerMemoryOperand dst, AssemblerRegisterK src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Kmovw_m16_kr, in memory, src));
		}

		public void kmovw(AssemblerRegisterK dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Kmovw_kr_km16, register, in memory));
		}

		public void knotb(AssemblerRegisterK dst, AssemblerRegisterK src)
		{
			AddInstruction(Instruction.Create(Code.VEX_Knotb_kr_kr, dst, src));
		}

		public void knotd(AssemblerRegisterK dst, AssemblerRegisterK src)
		{
			AddInstruction(Instruction.Create(Code.VEX_Knotd_kr_kr, dst, src));
		}

		public void knotq(AssemblerRegisterK dst, AssemblerRegisterK src)
		{
			AddInstruction(Instruction.Create(Code.VEX_Knotq_kr_kr, dst, src));
		}

		public void knotw(AssemblerRegisterK dst, AssemblerRegisterK src)
		{
			AddInstruction(Instruction.Create(Code.VEX_Knotw_kr_kr, dst, src));
		}

		public void korb(AssemblerRegisterK dst, AssemblerRegisterK src1, AssemblerRegisterK src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Korb_kr_kr_kr, dst, src1, src2));
		}

		public void kord(AssemblerRegisterK dst, AssemblerRegisterK src1, AssemblerRegisterK src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Kord_kr_kr_kr, dst, src1, src2));
		}

		public void korq(AssemblerRegisterK dst, AssemblerRegisterK src1, AssemblerRegisterK src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Korq_kr_kr_kr, dst, src1, src2));
		}

		public void kortestb(AssemblerRegisterK dst, AssemblerRegisterK src)
		{
			AddInstruction(Instruction.Create(Code.VEX_Kortestb_kr_kr, dst, src));
		}

		public void kortestd(AssemblerRegisterK dst, AssemblerRegisterK src)
		{
			AddInstruction(Instruction.Create(Code.VEX_Kortestd_kr_kr, dst, src));
		}

		public void kortestq(AssemblerRegisterK dst, AssemblerRegisterK src)
		{
			AddInstruction(Instruction.Create(Code.VEX_Kortestq_kr_kr, dst, src));
		}

		public void kortestw(AssemblerRegisterK dst, AssemblerRegisterK src)
		{
			AddInstruction(Instruction.Create(Code.VEX_Kortestw_kr_kr, dst, src));
		}

		public void korw(AssemblerRegisterK dst, AssemblerRegisterK src1, AssemblerRegisterK src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Korw_kr_kr_kr, dst, src1, src2));
		}

		public void kshiftlb(AssemblerRegisterK dst, AssemblerRegisterK src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.VEX_Kshiftlb_kr_kr_imm8, dst, src1, imm));
		}

		public void kshiftlb(AssemblerRegisterK dst, AssemblerRegisterK src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.VEX_Kshiftlb_kr_kr_imm8, (Register)dst, (Register)src1, (uint)imm));
		}

		public void kshiftld(AssemblerRegisterK dst, AssemblerRegisterK src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.VEX_Kshiftld_kr_kr_imm8, dst, src1, imm));
		}

		public void kshiftld(AssemblerRegisterK dst, AssemblerRegisterK src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.VEX_Kshiftld_kr_kr_imm8, (Register)dst, (Register)src1, (uint)imm));
		}

		public void kshiftlq(AssemblerRegisterK dst, AssemblerRegisterK src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.VEX_Kshiftlq_kr_kr_imm8, dst, src1, imm));
		}

		public void kshiftlq(AssemblerRegisterK dst, AssemblerRegisterK src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.VEX_Kshiftlq_kr_kr_imm8, (Register)dst, (Register)src1, (uint)imm));
		}

		public void kshiftlw(AssemblerRegisterK dst, AssemblerRegisterK src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.VEX_Kshiftlw_kr_kr_imm8, dst, src1, imm));
		}

		public void kshiftlw(AssemblerRegisterK dst, AssemblerRegisterK src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.VEX_Kshiftlw_kr_kr_imm8, (Register)dst, (Register)src1, (uint)imm));
		}

		public void kshiftrb(AssemblerRegisterK dst, AssemblerRegisterK src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.VEX_Kshiftrb_kr_kr_imm8, dst, src1, imm));
		}

		public void kshiftrb(AssemblerRegisterK dst, AssemblerRegisterK src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.VEX_Kshiftrb_kr_kr_imm8, (Register)dst, (Register)src1, (uint)imm));
		}

		public void kshiftrd(AssemblerRegisterK dst, AssemblerRegisterK src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.VEX_Kshiftrd_kr_kr_imm8, dst, src1, imm));
		}

		public void kshiftrd(AssemblerRegisterK dst, AssemblerRegisterK src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.VEX_Kshiftrd_kr_kr_imm8, (Register)dst, (Register)src1, (uint)imm));
		}

		public void kshiftrq(AssemblerRegisterK dst, AssemblerRegisterK src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.VEX_Kshiftrq_kr_kr_imm8, dst, src1, imm));
		}

		public void kshiftrq(AssemblerRegisterK dst, AssemblerRegisterK src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.VEX_Kshiftrq_kr_kr_imm8, (Register)dst, (Register)src1, (uint)imm));
		}

		public void kshiftrw(AssemblerRegisterK dst, AssemblerRegisterK src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.VEX_Kshiftrw_kr_kr_imm8, dst, src1, imm));
		}

		public void kshiftrw(AssemblerRegisterK dst, AssemblerRegisterK src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.VEX_Kshiftrw_kr_kr_imm8, (Register)dst, (Register)src1, (uint)imm));
		}

		public void ktestb(AssemblerRegisterK dst, AssemblerRegisterK src)
		{
			AddInstruction(Instruction.Create(Code.VEX_Ktestb_kr_kr, dst, src));
		}

		public void ktestd(AssemblerRegisterK dst, AssemblerRegisterK src)
		{
			AddInstruction(Instruction.Create(Code.VEX_Ktestd_kr_kr, dst, src));
		}

		public void ktestq(AssemblerRegisterK dst, AssemblerRegisterK src)
		{
			AddInstruction(Instruction.Create(Code.VEX_Ktestq_kr_kr, dst, src));
		}

		public void ktestw(AssemblerRegisterK dst, AssemblerRegisterK src)
		{
			AddInstruction(Instruction.Create(Code.VEX_Ktestw_kr_kr, dst, src));
		}

		public void kunpckbw(AssemblerRegisterK dst, AssemblerRegisterK src1, AssemblerRegisterK src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Kunpckbw_kr_kr_kr, dst, src1, src2));
		}

		public void kunpckdq(AssemblerRegisterK dst, AssemblerRegisterK src1, AssemblerRegisterK src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Kunpckdq_kr_kr_kr, dst, src1, src2));
		}

		public void kunpckwd(AssemblerRegisterK dst, AssemblerRegisterK src1, AssemblerRegisterK src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Kunpckwd_kr_kr_kr, dst, src1, src2));
		}

		public void kxnorb(AssemblerRegisterK dst, AssemblerRegisterK src1, AssemblerRegisterK src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Kxnorb_kr_kr_kr, dst, src1, src2));
		}

		public void kxnord(AssemblerRegisterK dst, AssemblerRegisterK src1, AssemblerRegisterK src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Kxnord_kr_kr_kr, dst, src1, src2));
		}

		public void kxnorq(AssemblerRegisterK dst, AssemblerRegisterK src1, AssemblerRegisterK src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Kxnorq_kr_kr_kr, dst, src1, src2));
		}

		public void kxnorw(AssemblerRegisterK dst, AssemblerRegisterK src1, AssemblerRegisterK src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Kxnorw_kr_kr_kr, dst, src1, src2));
		}

		public void kxorb(AssemblerRegisterK dst, AssemblerRegisterK src1, AssemblerRegisterK src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Kxorb_kr_kr_kr, dst, src1, src2));
		}

		public void kxord(AssemblerRegisterK dst, AssemblerRegisterK src1, AssemblerRegisterK src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Kxord_kr_kr_kr, dst, src1, src2));
		}

		public void kxorq(AssemblerRegisterK dst, AssemblerRegisterK src1, AssemblerRegisterK src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Kxorq_kr_kr_kr, dst, src1, src2));
		}

		public void kxorw(AssemblerRegisterK dst, AssemblerRegisterK src1, AssemblerRegisterK src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Kxorw_kr_kr_kr, dst, src1, src2));
		}

		public void lahf()
		{
			AddInstruction(Instruction.Create(Code.Lahf));
		}

		public void lar(AssemblerRegister16 dst, AssemblerRegister16 src)
		{
			AddInstruction(Instruction.Create(Code.Lar_r16_rm16, dst, src));
		}

		public void lar(AssemblerRegister32 dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.Lar_r32_r32m16, dst, src));
		}

		public void lar(AssemblerRegister64 dst, AssemblerRegister64 src)
		{
			AddInstruction(Instruction.Create(Code.Lar_r64_r64m16, dst, src));
		}

		public void lar(AssemblerRegister16 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Lar_r16_rm16, register, in memory));
		}

		public void lar(AssemblerRegister32 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Lar_r32_r32m16, register, in memory));
		}

		public void lddqu(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Lddqu_xmm_m128, register, in memory));
		}

		public void ldmxcsr(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Ldmxcsr_m32, in memory));
		}

		public void lds(AssemblerRegister16 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Lds_r16_m1616, register, in memory));
		}

		public void lds(AssemblerRegister32 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Lds_r32_m1632, register, in memory));
		}

		public void ldtilecfg(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Ldtilecfg_m512, in memory));
		}

		public void lea(AssemblerRegister16 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Lea_r16_m, register, in memory));
		}

		public void lea(AssemblerRegister32 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Lea_r32_m, register, in memory));
		}

		public void lea(AssemblerRegister64 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Lea_r64_m, register, in memory));
		}

		public void leave()
		{
			Code code = ((Bitness != 64) ? ((Bitness >= 32) ? Code.Leaved : Code.Leavew) : Code.Leaveq);
			AddInstruction(Instruction.Create(code));
		}

		public void les(AssemblerRegister16 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Les_r16_m1616, register, in memory));
		}

		public void les(AssemblerRegister32 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Les_r32_m1632, register, in memory));
		}

		public void lfence()
		{
			AddInstruction(Instruction.Create(Code.Lfence));
		}

		public void lfs(AssemblerRegister16 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Lfs_r16_m1616, register, in memory));
		}

		public void lfs(AssemblerRegister32 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Lfs_r32_m1632, register, in memory));
		}

		public void lfs(AssemblerRegister64 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Lfs_r64_m1664, register, in memory));
		}

		public void lgdt(AssemblerMemoryOperand dst)
		{
			Code code = ((Bitness != 64) ? ((Bitness >= 32) ? Code.Lgdt_m1632 : Code.Lgdt_m1632_16) : Code.Lgdt_m1664);
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, in memory));
		}

		public void lgs(AssemblerRegister16 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Lgs_r16_m1616, register, in memory));
		}

		public void lgs(AssemblerRegister32 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Lgs_r32_m1632, register, in memory));
		}

		public void lgs(AssemblerRegister64 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Lgs_r64_m1664, register, in memory));
		}

		public void lidt(AssemblerMemoryOperand dst)
		{
			Code code = ((Bitness != 64) ? ((Bitness >= 32) ? Code.Lidt_m1632 : Code.Lidt_m1632_16) : Code.Lidt_m1664);
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, in memory));
		}

		public void lkgs(AssemblerRegister16 dst)
		{
			AddInstruction(Instruction.Create(Code.Lkgs_rm16, dst));
		}

		public void lkgs(AssemblerRegister32 dst)
		{
			AddInstruction(Instruction.Create(Code.Lkgs_r32m16, dst));
		}

		public void lkgs(AssemblerRegister64 dst)
		{
			AddInstruction(Instruction.Create(Code.Lkgs_r64m16, dst));
		}

		public void lkgs(AssemblerMemoryOperand dst)
		{
			Code code = ((Bitness >= 32) ? Code.Lkgs_r32m16 : Code.Lkgs_rm16);
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, in memory));
		}

		public void lldt(AssemblerRegister16 dst)
		{
			AddInstruction(Instruction.Create(Code.Lldt_rm16, dst));
		}

		public void lldt(AssemblerRegister32 dst)
		{
			AddInstruction(Instruction.Create(Code.Lldt_r32m16, dst));
		}

		public void lldt(AssemblerRegister64 dst)
		{
			AddInstruction(Instruction.Create(Code.Lldt_r64m16, dst));
		}

		public void lldt(AssemblerMemoryOperand dst)
		{
			Code code = ((Bitness >= 32) ? Code.Lldt_r32m16 : Code.Lldt_rm16);
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, in memory));
		}

		public void llwpcb(AssemblerRegister32 dst)
		{
			AddInstruction(Instruction.Create(Code.XOP_Llwpcb_r32, dst));
		}

		public void llwpcb(AssemblerRegister64 dst)
		{
			AddInstruction(Instruction.Create(Code.XOP_Llwpcb_r64, dst));
		}

		public void lmsw(AssemblerRegister16 dst)
		{
			AddInstruction(Instruction.Create(Code.Lmsw_rm16, dst));
		}

		public void lmsw(AssemblerRegister32 dst)
		{
			AddInstruction(Instruction.Create(Code.Lmsw_r32m16, dst));
		}

		public void lmsw(AssemblerRegister64 dst)
		{
			AddInstruction(Instruction.Create(Code.Lmsw_r64m16, dst));
		}

		public void lmsw(AssemblerMemoryOperand dst)
		{
			Code code = ((Bitness >= 32) ? Code.Lmsw_r32m16 : Code.Lmsw_rm16);
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, in memory));
		}

		public void loadall()
		{
			AddInstruction(Instruction.Create(Code.Loadall386));
		}

		public void loadiwkey(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Loadiwkey_xmm_xmm, dst, src));
		}

		public void lodsb()
		{
			AddInstruction(Instruction.CreateLodsb(Bitness));
		}

		public void lodsd()
		{
			AddInstruction(Instruction.CreateLodsd(Bitness));
		}

		public void lodsq()
		{
			AddInstruction(Instruction.CreateLodsq(Bitness));
		}

		public void lodsw()
		{
			AddInstruction(Instruction.CreateLodsw(Bitness));
		}

		public void loop(Label dst)
		{
			Code code = ((Bitness != 64) ? ((Bitness >= 32) ? Code.Loop_rel8_32_ECX : Code.Loop_rel8_16_CX) : Code.Loop_rel8_64_RCX);
			AddInstruction(Instruction.CreateBranch(code, dst.Id));
		}

		public void loop(ulong dst)
		{
			Code code = ((Bitness != 64) ? ((Bitness >= 32) ? Code.Loop_rel8_32_ECX : Code.Loop_rel8_16_CX) : Code.Loop_rel8_64_RCX);
			AddInstruction(Instruction.CreateBranch(code, dst));
		}

		public void loope(Label dst)
		{
			Code code = ((Bitness != 64) ? ((Bitness >= 32) ? Code.Loope_rel8_32_ECX : Code.Loope_rel8_16_CX) : Code.Loope_rel8_64_RCX);
			AddInstruction(Instruction.CreateBranch(code, dst.Id));
		}

		public void loope(ulong dst)
		{
			Code code = ((Bitness != 64) ? ((Bitness >= 32) ? Code.Loope_rel8_32_ECX : Code.Loope_rel8_16_CX) : Code.Loope_rel8_64_RCX);
			AddInstruction(Instruction.CreateBranch(code, dst));
		}

		public void loopne(Label dst)
		{
			Code code = ((Bitness != 64) ? ((Bitness >= 32) ? Code.Loopne_rel8_32_ECX : Code.Loopne_rel8_16_CX) : Code.Loopne_rel8_64_RCX);
			AddInstruction(Instruction.CreateBranch(code, dst.Id));
		}

		public void loopne(ulong dst)
		{
			Code code = ((Bitness != 64) ? ((Bitness >= 32) ? Code.Loopne_rel8_32_ECX : Code.Loopne_rel8_16_CX) : Code.Loopne_rel8_64_RCX);
			AddInstruction(Instruction.CreateBranch(code, dst));
		}

		public void loopnz(Label dst)
		{
			Code code = ((Bitness != 64) ? ((Bitness >= 32) ? Code.Loopne_rel8_32_ECX : Code.Loopne_rel8_16_CX) : Code.Loopne_rel8_64_RCX);
			AddInstruction(Instruction.CreateBranch(code, dst.Id));
		}

		public void loopnz(ulong dst)
		{
			Code code = ((Bitness != 64) ? ((Bitness >= 32) ? Code.Loopne_rel8_32_ECX : Code.Loopne_rel8_16_CX) : Code.Loopne_rel8_64_RCX);
			AddInstruction(Instruction.CreateBranch(code, dst));
		}

		public void loopz(Label dst)
		{
			Code code = ((Bitness != 64) ? ((Bitness >= 32) ? Code.Loope_rel8_32_ECX : Code.Loope_rel8_16_CX) : Code.Loope_rel8_64_RCX);
			AddInstruction(Instruction.CreateBranch(code, dst.Id));
		}

		public void loopz(ulong dst)
		{
			Code code = ((Bitness != 64) ? ((Bitness >= 32) ? Code.Loope_rel8_32_ECX : Code.Loope_rel8_16_CX) : Code.Loope_rel8_64_RCX);
			AddInstruction(Instruction.CreateBranch(code, dst));
		}

		public void lsl(AssemblerRegister16 dst, AssemblerRegister16 src)
		{
			AddInstruction(Instruction.Create(Code.Lsl_r16_rm16, dst, src));
		}

		public void lsl(AssemblerRegister32 dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.Lsl_r32_r32m16, dst, src));
		}

		public void lsl(AssemblerRegister64 dst, AssemblerRegister64 src)
		{
			AddInstruction(Instruction.Create(Code.Lsl_r64_r64m16, dst, src));
		}

		public void lsl(AssemblerRegister16 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Lsl_r16_rm16, register, in memory));
		}

		public void lsl(AssemblerRegister32 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Lsl_r32_r32m16, register, in memory));
		}

		public void lss(AssemblerRegister16 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Lss_r16_m1616, register, in memory));
		}

		public void lss(AssemblerRegister32 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Lss_r32_m1632, register, in memory));
		}

		public void lss(AssemblerRegister64 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Lss_r64_m1664, register, in memory));
		}

		public void ltr(AssemblerRegister16 dst)
		{
			AddInstruction(Instruction.Create(Code.Ltr_rm16, dst));
		}

		public void ltr(AssemblerRegister32 dst)
		{
			AddInstruction(Instruction.Create(Code.Ltr_r32m16, dst));
		}

		public void ltr(AssemblerRegister64 dst)
		{
			AddInstruction(Instruction.Create(Code.Ltr_r64m16, dst));
		}

		public void ltr(AssemblerMemoryOperand dst)
		{
			Code code = ((Bitness >= 32) ? Code.Ltr_r32m16 : Code.Ltr_rm16);
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, in memory));
		}

		public void lwpins(AssemblerRegister32 dst, AssemblerRegister32 src1, int imm)
		{
			AddInstruction(Instruction.Create(Code.XOP_Lwpins_r32_rm32_imm32, dst, src1, imm));
		}

		public void lwpins(AssemblerRegister64 dst, AssemblerRegister32 src1, int imm)
		{
			AddInstruction(Instruction.Create(Code.XOP_Lwpins_r64_rm32_imm32, dst, src1, imm));
		}

		public void lwpins(AssemblerRegister32 dst, AssemblerMemoryOperand src1, int imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Lwpins_r32_rm32_imm32, register, in memory, imm));
		}

		public void lwpins(AssemblerRegister64 dst, AssemblerMemoryOperand src1, int imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Lwpins_r64_rm32_imm32, register, in memory, imm));
		}

		public void lwpins(AssemblerRegister32 dst, AssemblerRegister32 src1, uint imm)
		{
			AddInstruction(Instruction.Create(Code.XOP_Lwpins_r32_rm32_imm32, dst, src1, imm));
		}

		public void lwpins(AssemblerRegister64 dst, AssemblerRegister32 src1, uint imm)
		{
			AddInstruction(Instruction.Create(Code.XOP_Lwpins_r64_rm32_imm32, dst, src1, imm));
		}

		public void lwpins(AssemblerRegister32 dst, AssemblerMemoryOperand src1, uint imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Lwpins_r32_rm32_imm32, register, in memory, imm));
		}

		public void lwpins(AssemblerRegister64 dst, AssemblerMemoryOperand src1, uint imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Lwpins_r64_rm32_imm32, register, in memory, imm));
		}

		public void lwpval(AssemblerRegister32 dst, AssemblerRegister32 src1, int imm)
		{
			AddInstruction(Instruction.Create(Code.XOP_Lwpval_r32_rm32_imm32, dst, src1, imm));
		}

		public void lwpval(AssemblerRegister64 dst, AssemblerRegister32 src1, int imm)
		{
			AddInstruction(Instruction.Create(Code.XOP_Lwpval_r64_rm32_imm32, dst, src1, imm));
		}

		public void lwpval(AssemblerRegister32 dst, AssemblerMemoryOperand src1, int imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Lwpval_r32_rm32_imm32, register, in memory, imm));
		}

		public void lwpval(AssemblerRegister64 dst, AssemblerMemoryOperand src1, int imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Lwpval_r64_rm32_imm32, register, in memory, imm));
		}

		public void lwpval(AssemblerRegister32 dst, AssemblerRegister32 src1, uint imm)
		{
			AddInstruction(Instruction.Create(Code.XOP_Lwpval_r32_rm32_imm32, dst, src1, imm));
		}

		public void lwpval(AssemblerRegister64 dst, AssemblerRegister32 src1, uint imm)
		{
			AddInstruction(Instruction.Create(Code.XOP_Lwpval_r64_rm32_imm32, dst, src1, imm));
		}

		public void lwpval(AssemblerRegister32 dst, AssemblerMemoryOperand src1, uint imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Lwpval_r32_rm32_imm32, register, in memory, imm));
		}

		public void lwpval(AssemblerRegister64 dst, AssemblerMemoryOperand src1, uint imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Lwpval_r64_rm32_imm32, register, in memory, imm));
		}

		public void lzcnt(AssemblerRegister16 dst, AssemblerRegister16 src)
		{
			AddInstruction(Instruction.Create(Code.Lzcnt_r16_rm16, dst, src));
		}

		public void lzcnt(AssemblerRegister32 dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.Lzcnt_r32_rm32, dst, src));
		}

		public void lzcnt(AssemblerRegister64 dst, AssemblerRegister64 src)
		{
			AddInstruction(Instruction.Create(Code.Lzcnt_r64_rm64, dst, src));
		}

		public void lzcnt(AssemblerRegister16 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Lzcnt_r16_rm16, register, in memory));
		}

		public void lzcnt(AssemblerRegister32 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Lzcnt_r32_rm32, register, in memory));
		}

		public void lzcnt(AssemblerRegister64 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Lzcnt_r64_rm64, register, in memory));
		}

		public void maskmovdqu(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.CreateMaskmovdqu(Bitness, dst, src));
		}

		public void maskmovq(AssemblerRegisterMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.CreateMaskmovq(Bitness, dst, src));
		}

		public void maxpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Maxpd_xmm_xmmm128, dst, src));
		}

		public void maxpd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Maxpd_xmm_xmmm128, register, in memory));
		}

		public void maxps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Maxps_xmm_xmmm128, dst, src));
		}

		public void maxps(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Maxps_xmm_xmmm128, register, in memory));
		}

		public void maxsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Maxsd_xmm_xmmm64, dst, src));
		}

		public void maxsd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Maxsd_xmm_xmmm64, register, in memory));
		}

		public void maxss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Maxss_xmm_xmmm32, dst, src));
		}

		public void maxss(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Maxss_xmm_xmmm32, register, in memory));
		}

		public void mcommit()
		{
			AddInstruction(Instruction.Create(Code.Mcommit));
		}

		public void mfence()
		{
			AddInstruction(Instruction.Create(Code.Mfence));
		}

		public void minpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Minpd_xmm_xmmm128, dst, src));
		}

		public void minpd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Minpd_xmm_xmmm128, register, in memory));
		}

		public void minps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Minps_xmm_xmmm128, dst, src));
		}

		public void minps(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Minps_xmm_xmmm128, register, in memory));
		}

		public void minsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Minsd_xmm_xmmm64, dst, src));
		}

		public void minsd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Minsd_xmm_xmmm64, register, in memory));
		}

		public void minss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Minss_xmm_xmmm32, dst, src));
		}

		public void minss(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Minss_xmm_xmmm32, register, in memory));
		}

		public void monitor()
		{
			Code code = ((Bitness != 64) ? ((Bitness >= 32) ? Code.Monitord : Code.Monitorw) : Code.Monitorq);
			AddInstruction(Instruction.Create(code));
		}

		public void monitorx()
		{
			Code code = ((Bitness != 64) ? ((Bitness >= 32) ? Code.Monitorxd : Code.Monitorxw) : Code.Monitorxq);
			AddInstruction(Instruction.Create(code));
		}

		public void montmul()
		{
			Code code = ((Bitness != 64) ? ((Bitness >= 32) ? Code.Montmul_32 : Code.Montmul_16) : Code.Montmul_64);
			AddInstruction(Instruction.Create(code));
		}

		public void mov(AssemblerRegister8 dst, AssemblerRegister8 src)
		{
			AddInstruction(Instruction.Create(Code.Mov_rm8_r8, dst, src));
		}

		public void mov(AssemblerMemoryOperand dst, AssemblerRegister8 src)
		{
			Code code = ((src.Value != Register.AL || Bitness != 64 || !dst.IsDisplacementOnly) ? ((src.Value == Register.AL && Bitness < 64 && dst.IsDisplacementOnly) ? Code.Mov_moffs8_AL : Code.Mov_rm8_r8) : Code.Mov_moffs8_AL);
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, in memory, src));
		}

		public void mov(AssemblerRegister16 dst, AssemblerRegister16 src)
		{
			AddInstruction(Instruction.Create(Code.Mov_rm16_r16, dst, src));
		}

		public void mov(AssemblerRegisterSegment dst, AssemblerRegister16 src)
		{
			AddInstruction(Instruction.Create(Code.Mov_Sreg_rm16, dst, src));
		}

		public void mov(AssemblerMemoryOperand dst, AssemblerRegister16 src)
		{
			Code code = ((src.Value != Register.AX || Bitness != 64 || !dst.IsDisplacementOnly) ? ((src.Value == Register.AX && Bitness < 64 && dst.IsDisplacementOnly) ? Code.Mov_moffs16_AX : Code.Mov_rm16_r16) : Code.Mov_moffs16_AX);
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, in memory, src));
		}

		public void mov(AssemblerRegister32 dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.Mov_rm32_r32, dst, src));
		}

		public void mov(AssemblerRegisterSegment dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.Mov_Sreg_r32m16, dst, src));
		}

		public void mov(AssemblerRegisterCR dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.Mov_cr_r32, dst, src));
		}

		public void mov(AssemblerRegisterDR dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.Mov_dr_r32, dst, src));
		}

		public void mov(AssemblerRegisterTR dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.Mov_tr_r32, dst, src));
		}

		public void mov(AssemblerMemoryOperand dst, AssemblerRegister32 src)
		{
			Code code = ((src.Value != Register.EAX || Bitness != 64 || !dst.IsDisplacementOnly) ? ((src.Value == Register.EAX && Bitness < 64 && dst.IsDisplacementOnly) ? Code.Mov_moffs32_EAX : Code.Mov_rm32_r32) : Code.Mov_moffs32_EAX);
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, in memory, src));
		}

		public void mov(AssemblerRegister64 dst, AssemblerRegister64 src)
		{
			AddInstruction(Instruction.Create(Code.Mov_rm64_r64, dst, src));
		}

		public void mov(AssemblerRegisterSegment dst, AssemblerRegister64 src)
		{
			AddInstruction(Instruction.Create(Code.Mov_Sreg_r64m16, dst, src));
		}

		public void mov(AssemblerRegisterCR dst, AssemblerRegister64 src)
		{
			AddInstruction(Instruction.Create(Code.Mov_cr_r64, dst, src));
		}

		public void mov(AssemblerRegisterDR dst, AssemblerRegister64 src)
		{
			AddInstruction(Instruction.Create(Code.Mov_dr_r64, dst, src));
		}

		public void mov(AssemblerMemoryOperand dst, AssemblerRegister64 src)
		{
			Code code = ((src.Value != Register.RAX || Bitness != 64 || !dst.IsDisplacementOnly) ? ((src.Value == Register.RAX && Bitness < 64 && dst.IsDisplacementOnly) ? Code.Mov_moffs64_RAX : Code.Mov_rm64_r64) : Code.Mov_moffs64_RAX);
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, in memory, src));
		}

		public void mov(AssemblerRegister16 dst, AssemblerRegisterSegment src)
		{
			AddInstruction(Instruction.Create(Code.Mov_rm16_Sreg, dst, src));
		}

		public void mov(AssemblerRegister32 dst, AssemblerRegisterSegment src)
		{
			AddInstruction(Instruction.Create(Code.Mov_r32m16_Sreg, dst, src));
		}

		public void mov(AssemblerRegister64 dst, AssemblerRegisterSegment src)
		{
			AddInstruction(Instruction.Create(Code.Mov_r64m16_Sreg, dst, src));
		}

		public void mov(AssemblerMemoryOperand dst, AssemblerRegisterSegment src)
		{
			Code code = ((Bitness >= 32) ? Code.Mov_r32m16_Sreg : Code.Mov_rm16_Sreg);
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, in memory, src));
		}

		public void mov(AssemblerRegister32 dst, AssemblerRegisterCR src)
		{
			AddInstruction(Instruction.Create(Code.Mov_r32_cr, dst, src));
		}

		public void mov(AssemblerRegister64 dst, AssemblerRegisterCR src)
		{
			AddInstruction(Instruction.Create(Code.Mov_r64_cr, dst, src));
		}

		public void mov(AssemblerRegister32 dst, AssemblerRegisterDR src)
		{
			AddInstruction(Instruction.Create(Code.Mov_r32_dr, dst, src));
		}

		public void mov(AssemblerRegister64 dst, AssemblerRegisterDR src)
		{
			AddInstruction(Instruction.Create(Code.Mov_r64_dr, dst, src));
		}

		public void mov(AssemblerRegister32 dst, AssemblerRegisterTR src)
		{
			AddInstruction(Instruction.Create(Code.Mov_r32_tr, dst, src));
		}

		public void mov(AssemblerRegister8 dst, AssemblerMemoryOperand src)
		{
			Code code = ((dst.Value != Register.AL || Bitness != 64 || !src.IsDisplacementOnly) ? ((dst.Value == Register.AL && Bitness < 64 && src.IsDisplacementOnly) ? Code.Mov_AL_moffs8 : Code.Mov_r8_rm8) : Code.Mov_AL_moffs8);
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory));
		}

		public void mov(AssemblerRegister16 dst, AssemblerMemoryOperand src)
		{
			Code code = ((dst.Value != Register.AX || Bitness != 64 || !src.IsDisplacementOnly) ? ((dst.Value == Register.AX && Bitness < 64 && src.IsDisplacementOnly) ? Code.Mov_AX_moffs16 : Code.Mov_r16_rm16) : Code.Mov_AX_moffs16);
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory));
		}

		public void mov(AssemblerRegister32 dst, AssemblerMemoryOperand src)
		{
			Code code = ((dst.Value != Register.EAX || Bitness != 64 || !src.IsDisplacementOnly) ? ((dst.Value == Register.EAX && Bitness < 64 && src.IsDisplacementOnly) ? Code.Mov_EAX_moffs32 : Code.Mov_r32_rm32) : Code.Mov_EAX_moffs32);
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory));
		}

		public void mov(AssemblerRegister64 dst, AssemblerMemoryOperand src)
		{
			Code code = ((dst.Value != Register.RAX || Bitness != 64 || !src.IsDisplacementOnly) ? ((dst.Value == Register.RAX && Bitness < 64 && src.IsDisplacementOnly) ? Code.Mov_RAX_moffs64 : Code.Mov_r64_rm64) : Code.Mov_RAX_moffs64);
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory));
		}

		public void mov(AssemblerRegisterSegment dst, AssemblerMemoryOperand src)
		{
			Code code = ((Bitness >= 32) ? Code.Mov_Sreg_r32m16 : Code.Mov_Sreg_rm16);
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory));
		}

		public void mov(AssemblerRegister8 dst, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.Mov_r8_imm8, dst, imm));
		}

		public void mov(AssemblerRegister16 dst, short imm)
		{
			AddInstruction(Instruction.Create(Code.Mov_r16_imm16, dst, imm));
		}

		public void mov(AssemblerRegister32 dst, int imm)
		{
			AddInstruction(Instruction.Create(Code.Mov_r32_imm32, dst, imm));
		}

		public void mov(AssemblerRegister64 dst, long imm)
		{
			AddInstruction(Instruction.Create(Code.Mov_r64_imm64, dst, imm));
		}

		public void mov(AssemblerMemoryOperand dst, int imm)
		{
			Code code;
			if (dst.Size == MemoryOperandSize.Qword)
			{
				code = Code.Mov_rm64_imm32;
			}
			else if (dst.Size == MemoryOperandSize.Dword)
			{
				code = Code.Mov_rm32_imm32;
			}
			else if (dst.Size == MemoryOperandSize.Word)
			{
				code = Code.Mov_rm16_imm16;
			}
			else
			{
				if (dst.Size != MemoryOperandSize.Byte)
				{
					throw NoOpCodeFoundFor(Mnemonic.Mov, dst, imm);
				}
				code = Code.Mov_rm8_imm8;
			}
			Code code2 = code;
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, in memory, imm));
		}

		public void mov(AssemblerRegister8 dst, byte imm)
		{
			AddInstruction(Instruction.Create(Code.Mov_r8_imm8, (Register)dst, (uint)imm));
		}

		public void mov(AssemblerRegister16 dst, ushort imm)
		{
			AddInstruction(Instruction.Create(Code.Mov_r16_imm16, (Register)dst, (uint)imm));
		}

		public void mov(AssemblerRegister32 dst, uint imm)
		{
			AddInstruction(Instruction.Create(Code.Mov_r32_imm32, dst, imm));
		}

		public void mov(AssemblerRegister64 dst, ulong imm)
		{
			AddInstruction(Instruction.Create(Code.Mov_r64_imm64, dst, imm));
		}

		public void mov(AssemblerMemoryOperand dst, uint imm)
		{
			Code code;
			if (dst.Size == MemoryOperandSize.Dword)
			{
				code = Code.Mov_rm32_imm32;
			}
			else if (dst.Size == MemoryOperandSize.Word)
			{
				code = Code.Mov_rm16_imm16;
			}
			else
			{
				if (dst.Size != MemoryOperandSize.Byte)
				{
					throw NoOpCodeFoundFor(Mnemonic.Mov, dst, imm);
				}
				code = Code.Mov_rm8_imm8;
			}
			Code code2 = code;
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, in memory, imm));
		}

		public void movapd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Movapd_xmm_xmmm128, dst, src));
		}

		public void movapd(AssemblerMemoryOperand dst, AssemblerRegisterXMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Movapd_xmmm128_xmm, in memory, src));
		}

		public void movapd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Movapd_xmm_xmmm128, register, in memory));
		}

		public void movaps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Movaps_xmm_xmmm128, dst, src));
		}

		public void movaps(AssemblerMemoryOperand dst, AssemblerRegisterXMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Movaps_xmmm128_xmm, in memory, src));
		}

		public void movaps(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Movaps_xmm_xmmm128, register, in memory));
		}

		public void movbe(AssemblerMemoryOperand dst, AssemblerRegister16 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Movbe_m16_r16, in memory, src));
		}

		public void movbe(AssemblerMemoryOperand dst, AssemblerRegister32 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Movbe_m32_r32, in memory, src));
		}

		public void movbe(AssemblerMemoryOperand dst, AssemblerRegister64 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Movbe_m64_r64, in memory, src));
		}

		public void movbe(AssemblerRegister16 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Movbe_r16_m16, register, in memory));
		}

		public void movbe(AssemblerRegister32 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Movbe_r32_m32, register, in memory));
		}

		public void movbe(AssemblerRegister64 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Movbe_r64_m64, register, in memory));
		}

		public void movd(AssemblerRegisterMM dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.Movd_mm_rm32, dst, src));
		}

		public void movd(AssemblerRegisterXMM dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.Movd_xmm_rm32, dst, src));
		}

		public void movd(AssemblerRegister32 dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.Movd_rm32_mm, dst, src));
		}

		public void movd(AssemblerMemoryOperand dst, AssemblerRegisterMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Movd_rm32_mm, in memory, src));
		}

		public void movd(AssemblerRegister32 dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Movd_rm32_xmm, dst, src));
		}

		public void movd(AssemblerMemoryOperand dst, AssemblerRegisterXMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Movd_rm32_xmm, in memory, src));
		}

		public void movd(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Movd_mm_rm32, register, in memory));
		}

		public void movd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Movd_xmm_rm32, register, in memory));
		}

		public void movddup(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Movddup_xmm_xmmm64, dst, src));
		}

		public void movddup(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Movddup_xmm_xmmm64, register, in memory));
		}

		public void movdir64b(AssemblerRegister16 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Movdir64b_r16_m512, register, in memory));
		}

		public void movdir64b(AssemblerRegister32 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Movdir64b_r32_m512, register, in memory));
		}

		public void movdir64b(AssemblerRegister64 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Movdir64b_r64_m512, register, in memory));
		}

		public void movdiri(AssemblerMemoryOperand dst, AssemblerRegister32 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Movdiri_m32_r32, in memory, src));
		}

		public void movdiri(AssemblerMemoryOperand dst, AssemblerRegister64 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Movdiri_m64_r64, in memory, src));
		}

		public void movdq2q(AssemblerRegisterMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Movdq2q_mm_xmm, dst, src));
		}

		public void movdqa(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Movdqa_xmm_xmmm128, dst, src));
		}

		public void movdqa(AssemblerMemoryOperand dst, AssemblerRegisterXMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Movdqa_xmmm128_xmm, in memory, src));
		}

		public void movdqa(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Movdqa_xmm_xmmm128, register, in memory));
		}

		public void movdqu(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Movdqu_xmm_xmmm128, dst, src));
		}

		public void movdqu(AssemblerMemoryOperand dst, AssemblerRegisterXMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Movdqu_xmmm128_xmm, in memory, src));
		}

		public void movdqu(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Movdqu_xmm_xmmm128, register, in memory));
		}

		public void movhlps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Movhlps_xmm_xmm, dst, src));
		}

		public void movhpd(AssemblerMemoryOperand dst, AssemblerRegisterXMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Movhpd_m64_xmm, in memory, src));
		}

		public void movhpd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Movhpd_xmm_m64, register, in memory));
		}

		public void movhps(AssemblerMemoryOperand dst, AssemblerRegisterXMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Movhps_m64_xmm, in memory, src));
		}

		public void movhps(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Movhps_xmm_m64, register, in memory));
		}

		public void movlhps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Movlhps_xmm_xmm, dst, src));
		}

		public void movlpd(AssemblerMemoryOperand dst, AssemblerRegisterXMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Movlpd_m64_xmm, in memory, src));
		}

		public void movlpd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Movlpd_xmm_m64, register, in memory));
		}

		public void movlps(AssemblerMemoryOperand dst, AssemblerRegisterXMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Movlps_m64_xmm, in memory, src));
		}

		public void movlps(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Movlps_xmm_m64, register, in memory));
		}

		public void movmskpd(AssemblerRegister32 dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Movmskpd_r32_xmm, dst, src));
		}

		public void movmskpd(AssemblerRegister64 dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Movmskpd_r64_xmm, dst, src));
		}

		public void movmskps(AssemblerRegister32 dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Movmskps_r32_xmm, dst, src));
		}

		public void movmskps(AssemblerRegister64 dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Movmskps_r64_xmm, dst, src));
		}

		public void movntdq(AssemblerMemoryOperand dst, AssemblerRegisterXMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Movntdq_m128_xmm, in memory, src));
		}

		public void movntdqa(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Movntdqa_xmm_m128, register, in memory));
		}

		public void movnti(AssemblerMemoryOperand dst, AssemblerRegister32 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Movnti_m32_r32, in memory, src));
		}

		public void movnti(AssemblerMemoryOperand dst, AssemblerRegister64 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Movnti_m64_r64, in memory, src));
		}

		public void movntpd(AssemblerMemoryOperand dst, AssemblerRegisterXMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Movntpd_m128_xmm, in memory, src));
		}

		public void movntps(AssemblerMemoryOperand dst, AssemblerRegisterXMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Movntps_m128_xmm, in memory, src));
		}

		public void movntq(AssemblerMemoryOperand dst, AssemblerRegisterMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Movntq_m64_mm, in memory, src));
		}

		public void movntsd(AssemblerMemoryOperand dst, AssemblerRegisterXMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Movntsd_m64_xmm, in memory, src));
		}

		public void movntss(AssemblerMemoryOperand dst, AssemblerRegisterXMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Movntss_m32_xmm, in memory, src));
		}

		public void movq(AssemblerRegisterMM dst, AssemblerRegister64 src)
		{
			AddInstruction(Instruction.Create(Code.Movq_mm_rm64, dst, src));
		}

		public void movq(AssemblerRegisterXMM dst, AssemblerRegister64 src)
		{
			AddInstruction(Instruction.Create(Code.Movq_xmm_rm64, dst, src));
		}

		public void movq(AssemblerRegister64 dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.Movq_rm64_mm, dst, src));
		}

		public void movq(AssemblerRegisterMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.Movq_mm_mmm64, dst, src));
		}

		public void movq(AssemblerMemoryOperand dst, AssemblerRegisterMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Movq_mmm64_mm, in memory, src));
		}

		public void movq(AssemblerRegister64 dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Movq_rm64_xmm, dst, src));
		}

		public void movq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Movq_xmm_xmmm64, dst, src));
		}

		public void movq(AssemblerMemoryOperand dst, AssemblerRegisterXMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Movq_xmmm64_xmm, in memory, src));
		}

		public void movq(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Movq_mm_mmm64, register, in memory));
		}

		public void movq(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Movq_xmm_xmmm64, register, in memory));
		}

		public void movq2dq(AssemblerRegisterXMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.Movq2dq_xmm_mm, dst, src));
		}

		public void movsb()
		{
			AddInstruction(Instruction.CreateMovsb(Bitness));
		}

		public void movsd()
		{
			AddInstruction(Instruction.CreateMovsd(Bitness));
		}

		public void movsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Movsd_xmm_xmmm64, dst, src));
		}

		public void movsd(AssemblerMemoryOperand dst, AssemblerRegisterXMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Movsd_xmmm64_xmm, in memory, src));
		}

		public void movsd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Movsd_xmm_xmmm64, register, in memory));
		}

		public void movshdup(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Movshdup_xmm_xmmm128, dst, src));
		}

		public void movshdup(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Movshdup_xmm_xmmm128, register, in memory));
		}

		public void movsldup(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Movsldup_xmm_xmmm128, dst, src));
		}

		public void movsldup(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Movsldup_xmm_xmmm128, register, in memory));
		}

		public void movsq()
		{
			AddInstruction(Instruction.CreateMovsq(Bitness));
		}

		public void movss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Movss_xmm_xmmm32, dst, src));
		}

		public void movss(AssemblerMemoryOperand dst, AssemblerRegisterXMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Movss_xmmm32_xmm, in memory, src));
		}

		public void movss(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Movss_xmm_xmmm32, register, in memory));
		}

		public void movsw()
		{
			AddInstruction(Instruction.CreateMovsw(Bitness));
		}

		public void movsx(AssemblerRegister16 dst, AssemblerRegister8 src)
		{
			AddInstruction(Instruction.Create(Code.Movsx_r16_rm8, dst, src));
		}

		public void movsx(AssemblerRegister32 dst, AssemblerRegister8 src)
		{
			AddInstruction(Instruction.Create(Code.Movsx_r32_rm8, dst, src));
		}

		public void movsx(AssemblerRegister64 dst, AssemblerRegister8 src)
		{
			AddInstruction(Instruction.Create(Code.Movsx_r64_rm8, dst, src));
		}

		public void movsx(AssemblerRegister16 dst, AssemblerRegister16 src)
		{
			AddInstruction(Instruction.Create(Code.Movsx_r16_rm16, dst, src));
		}

		public void movsx(AssemblerRegister32 dst, AssemblerRegister16 src)
		{
			AddInstruction(Instruction.Create(Code.Movsx_r32_rm16, dst, src));
		}

		public void movsx(AssemblerRegister64 dst, AssemblerRegister16 src)
		{
			AddInstruction(Instruction.Create(Code.Movsx_r64_rm16, dst, src));
		}

		public void movsx(AssemblerRegister16 dst, AssemblerMemoryOperand src)
		{
			Code code;
			if (src.Size == MemoryOperandSize.Word)
			{
				code = Code.Movsx_r16_rm16;
			}
			else
			{
				if (src.Size != MemoryOperandSize.Byte)
				{
					throw NoOpCodeFoundFor(Mnemonic.Movsx, dst, src);
				}
				code = Code.Movsx_r16_rm8;
			}
			Code code2 = code;
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, register, in memory));
		}

		public void movsx(AssemblerRegister32 dst, AssemblerMemoryOperand src)
		{
			Code code;
			if (src.Size == MemoryOperandSize.Word)
			{
				code = Code.Movsx_r32_rm16;
			}
			else
			{
				if (src.Size != MemoryOperandSize.Byte)
				{
					throw NoOpCodeFoundFor(Mnemonic.Movsx, dst, src);
				}
				code = Code.Movsx_r32_rm8;
			}
			Code code2 = code;
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, register, in memory));
		}

		public void movsx(AssemblerRegister64 dst, AssemblerMemoryOperand src)
		{
			Code code;
			if (src.Size == MemoryOperandSize.Word)
			{
				code = Code.Movsx_r64_rm16;
			}
			else
			{
				if (src.Size != MemoryOperandSize.Byte)
				{
					throw NoOpCodeFoundFor(Mnemonic.Movsx, dst, src);
				}
				code = Code.Movsx_r64_rm8;
			}
			Code code2 = code;
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, register, in memory));
		}

		public void movsxd(AssemblerRegister16 dst, AssemblerRegister16 src)
		{
			AddInstruction(Instruction.Create(Code.Movsxd_r16_rm16, dst, src));
		}

		public void movsxd(AssemblerRegister32 dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.Movsxd_r32_rm32, dst, src));
		}

		public void movsxd(AssemblerRegister64 dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.Movsxd_r64_rm32, dst, src));
		}

		public void movsxd(AssemblerRegister16 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Movsxd_r16_rm16, register, in memory));
		}

		public void movsxd(AssemblerRegister32 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Movsxd_r32_rm32, register, in memory));
		}

		public void movsxd(AssemblerRegister64 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Movsxd_r64_rm32, register, in memory));
		}

		public void movupd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Movupd_xmm_xmmm128, dst, src));
		}

		public void movupd(AssemblerMemoryOperand dst, AssemblerRegisterXMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Movupd_xmmm128_xmm, in memory, src));
		}

		public void movupd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Movupd_xmm_xmmm128, register, in memory));
		}

		public void movups(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Movups_xmm_xmmm128, dst, src));
		}

		public void movups(AssemblerMemoryOperand dst, AssemblerRegisterXMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Movups_xmmm128_xmm, in memory, src));
		}

		public void movups(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Movups_xmm_xmmm128, register, in memory));
		}

		public void movzx(AssemblerRegister16 dst, AssemblerRegister8 src)
		{
			AddInstruction(Instruction.Create(Code.Movzx_r16_rm8, dst, src));
		}

		public void movzx(AssemblerRegister32 dst, AssemblerRegister8 src)
		{
			AddInstruction(Instruction.Create(Code.Movzx_r32_rm8, dst, src));
		}

		public void movzx(AssemblerRegister64 dst, AssemblerRegister8 src)
		{
			AddInstruction(Instruction.Create(Code.Movzx_r64_rm8, dst, src));
		}

		public void movzx(AssemblerRegister16 dst, AssemblerRegister16 src)
		{
			AddInstruction(Instruction.Create(Code.Movzx_r16_rm16, dst, src));
		}

		public void movzx(AssemblerRegister32 dst, AssemblerRegister16 src)
		{
			AddInstruction(Instruction.Create(Code.Movzx_r32_rm16, dst, src));
		}

		public void movzx(AssemblerRegister64 dst, AssemblerRegister16 src)
		{
			AddInstruction(Instruction.Create(Code.Movzx_r64_rm16, dst, src));
		}

		public void movzx(AssemblerRegister16 dst, AssemblerMemoryOperand src)
		{
			Code code;
			if (src.Size == MemoryOperandSize.Word)
			{
				code = Code.Movzx_r16_rm16;
			}
			else
			{
				if (src.Size != MemoryOperandSize.Byte)
				{
					throw NoOpCodeFoundFor(Mnemonic.Movzx, dst, src);
				}
				code = Code.Movzx_r16_rm8;
			}
			Code code2 = code;
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, register, in memory));
		}

		public void movzx(AssemblerRegister32 dst, AssemblerMemoryOperand src)
		{
			Code code;
			if (src.Size == MemoryOperandSize.Word)
			{
				code = Code.Movzx_r32_rm16;
			}
			else
			{
				if (src.Size != MemoryOperandSize.Byte)
				{
					throw NoOpCodeFoundFor(Mnemonic.Movzx, dst, src);
				}
				code = Code.Movzx_r32_rm8;
			}
			Code code2 = code;
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, register, in memory));
		}

		public void movzx(AssemblerRegister64 dst, AssemblerMemoryOperand src)
		{
			Code code;
			if (src.Size == MemoryOperandSize.Word)
			{
				code = Code.Movzx_r64_rm16;
			}
			else
			{
				if (src.Size != MemoryOperandSize.Byte)
				{
					throw NoOpCodeFoundFor(Mnemonic.Movzx, dst, src);
				}
				code = Code.Movzx_r64_rm8;
			}
			Code code2 = code;
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, register, in memory));
		}

		public void mpsadbw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.Mpsadbw_xmm_xmmm128_imm8, dst, src1, imm));
		}

		public void mpsadbw(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Mpsadbw_xmm_xmmm128_imm8, register, in memory, imm));
		}

		public void mpsadbw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.Mpsadbw_xmm_xmmm128_imm8, (Register)dst, (Register)src1, (uint)imm));
		}

		public void mpsadbw(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Mpsadbw_xmm_xmmm128_imm8, register, in memory, (uint)imm));
		}

		public void mul(AssemblerRegister8 dst)
		{
			AddInstruction(Instruction.Create(Code.Mul_rm8, dst));
		}

		public void mul(AssemblerRegister16 dst)
		{
			AddInstruction(Instruction.Create(Code.Mul_rm16, dst));
		}

		public void mul(AssemblerRegister32 dst)
		{
			AddInstruction(Instruction.Create(Code.Mul_rm32, dst));
		}

		public void mul(AssemblerRegister64 dst)
		{
			AddInstruction(Instruction.Create(Code.Mul_rm64, dst));
		}

		public void mul(AssemblerMemoryOperand dst)
		{
			Code code;
			if (dst.Size == MemoryOperandSize.Qword)
			{
				code = Code.Mul_rm64;
			}
			else if (dst.Size == MemoryOperandSize.Dword)
			{
				code = Code.Mul_rm32;
			}
			else if (dst.Size == MemoryOperandSize.Word)
			{
				code = Code.Mul_rm16;
			}
			else
			{
				if (dst.Size != MemoryOperandSize.Byte)
				{
					throw NoOpCodeFoundFor(Mnemonic.Mul, dst);
				}
				code = Code.Mul_rm8;
			}
			Code code2 = code;
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, in memory));
		}

		public void mulpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Mulpd_xmm_xmmm128, dst, src));
		}

		public void mulpd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Mulpd_xmm_xmmm128, register, in memory));
		}

		public void mulps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Mulps_xmm_xmmm128, dst, src));
		}

		public void mulps(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Mulps_xmm_xmmm128, register, in memory));
		}

		public void mulsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Mulsd_xmm_xmmm64, dst, src));
		}

		public void mulsd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Mulsd_xmm_xmmm64, register, in memory));
		}

		public void mulss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Mulss_xmm_xmmm32, dst, src));
		}

		public void mulss(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Mulss_xmm_xmmm32, register, in memory));
		}

		public void mulx(AssemblerRegister32 dst, AssemblerRegister32 src1, AssemblerRegister32 src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Mulx_r32_r32_rm32, dst, src1, src2));
		}

		public void mulx(AssemblerRegister64 dst, AssemblerRegister64 src1, AssemblerRegister64 src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Mulx_r64_r64_rm64, dst, src1, src2));
		}

		public void mulx(AssemblerRegister32 dst, AssemblerRegister32 src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Mulx_r32_r32_rm32, register, register2, in memory));
		}

		public void mulx(AssemblerRegister64 dst, AssemblerRegister64 src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Mulx_r64_r64_rm64, register, register2, in memory));
		}

		public void mwait()
		{
			AddInstruction(Instruction.Create(Code.Mwait));
		}

		public void mwaitx()
		{
			AddInstruction(Instruction.Create(Code.Mwaitx));
		}

		public void neg(AssemblerRegister8 dst)
		{
			AddInstruction(Instruction.Create(Code.Neg_rm8, dst));
		}

		public void neg(AssemblerRegister16 dst)
		{
			AddInstruction(Instruction.Create(Code.Neg_rm16, dst));
		}

		public void neg(AssemblerRegister32 dst)
		{
			AddInstruction(Instruction.Create(Code.Neg_rm32, dst));
		}

		public void neg(AssemblerRegister64 dst)
		{
			AddInstruction(Instruction.Create(Code.Neg_rm64, dst));
		}

		public void neg(AssemblerMemoryOperand dst)
		{
			Code code;
			if (dst.Size == MemoryOperandSize.Qword)
			{
				code = Code.Neg_rm64;
			}
			else if (dst.Size == MemoryOperandSize.Dword)
			{
				code = Code.Neg_rm32;
			}
			else if (dst.Size == MemoryOperandSize.Word)
			{
				code = Code.Neg_rm16;
			}
			else
			{
				if (dst.Size != MemoryOperandSize.Byte)
				{
					throw NoOpCodeFoundFor(Mnemonic.Neg, dst);
				}
				code = Code.Neg_rm8;
			}
			Code code2 = code;
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, in memory));
		}

		public void nop()
		{
			Code code = ((Bitness >= 32) ? Code.Nopd : Code.Nopw);
			AddInstruction(Instruction.Create(code));
		}

		public void nop(AssemblerRegister16 dst)
		{
			AddInstruction(Instruction.Create(Code.Nop_rm16, dst));
		}

		public void nop(AssemblerRegister32 dst)
		{
			AddInstruction(Instruction.Create(Code.Nop_rm32, dst));
		}

		public void nop(AssemblerRegister64 dst)
		{
			AddInstruction(Instruction.Create(Code.Nop_rm64, dst));
		}

		public void nop(AssemblerMemoryOperand dst)
		{
			Code code;
			if (dst.Size == MemoryOperandSize.Qword)
			{
				code = Code.Nop_rm64;
			}
			else if (dst.Size == MemoryOperandSize.Dword)
			{
				code = Code.Nop_rm32;
			}
			else
			{
				if (dst.Size != MemoryOperandSize.Word)
				{
					throw NoOpCodeFoundFor(Mnemonic.Nop, dst);
				}
				code = Code.Nop_rm16;
			}
			Code code2 = code;
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, in memory));
		}

		public void not(AssemblerRegister8 dst)
		{
			AddInstruction(Instruction.Create(Code.Not_rm8, dst));
		}

		public void not(AssemblerRegister16 dst)
		{
			AddInstruction(Instruction.Create(Code.Not_rm16, dst));
		}

		public void not(AssemblerRegister32 dst)
		{
			AddInstruction(Instruction.Create(Code.Not_rm32, dst));
		}

		public void not(AssemblerRegister64 dst)
		{
			AddInstruction(Instruction.Create(Code.Not_rm64, dst));
		}

		public void not(AssemblerMemoryOperand dst)
		{
			Code code;
			if (dst.Size == MemoryOperandSize.Qword)
			{
				code = Code.Not_rm64;
			}
			else if (dst.Size == MemoryOperandSize.Dword)
			{
				code = Code.Not_rm32;
			}
			else if (dst.Size == MemoryOperandSize.Word)
			{
				code = Code.Not_rm16;
			}
			else
			{
				if (dst.Size != MemoryOperandSize.Byte)
				{
					throw NoOpCodeFoundFor(Mnemonic.Not, dst);
				}
				code = Code.Not_rm8;
			}
			Code code2 = code;
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, in memory));
		}

		public void or(AssemblerRegister8 dst, AssemblerRegister8 src)
		{
			AddInstruction(Instruction.Create(Code.Or_rm8_r8, dst, src));
		}

		public void or(AssemblerMemoryOperand dst, AssemblerRegister8 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Or_rm8_r8, in memory, src));
		}

		public void or(AssemblerRegister16 dst, AssemblerRegister16 src)
		{
			AddInstruction(Instruction.Create(Code.Or_rm16_r16, dst, src));
		}

		public void or(AssemblerMemoryOperand dst, AssemblerRegister16 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Or_rm16_r16, in memory, src));
		}

		public void or(AssemblerRegister32 dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.Or_rm32_r32, dst, src));
		}

		public void or(AssemblerMemoryOperand dst, AssemblerRegister32 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Or_rm32_r32, in memory, src));
		}

		public void or(AssemblerRegister64 dst, AssemblerRegister64 src)
		{
			AddInstruction(Instruction.Create(Code.Or_rm64_r64, dst, src));
		}

		public void or(AssemblerMemoryOperand dst, AssemblerRegister64 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Or_rm64_r64, in memory, src));
		}

		public void or(AssemblerRegister8 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Or_r8_rm8, register, in memory));
		}

		public void or(AssemblerRegister16 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Or_r16_rm16, register, in memory));
		}

		public void or(AssemblerRegister32 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Or_r32_rm32, register, in memory));
		}

		public void or(AssemblerRegister64 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Or_r64_rm64, register, in memory));
		}

		public void or(AssemblerRegister8 dst, sbyte imm)
		{
			Code code = (((Register)dst == Register.AL) ? Code.Or_AL_imm8 : Code.Or_rm8_imm8);
			AddInstruction(Instruction.Create(code, dst, imm));
		}

		public void or(AssemblerRegister16 dst, short imm)
		{
			Code code = (((Register)dst != Register.AX) ? ((imm >= -128 && imm <= 127) ? Code.Or_rm16_imm8 : Code.Or_rm16_imm16) : Code.Or_AX_imm16);
			AddInstruction(Instruction.Create(code, dst, imm));
		}

		public void or(AssemblerRegister32 dst, int imm)
		{
			Code code = (((Register)dst != Register.EAX) ? ((imm >= -128 && imm <= 127) ? Code.Or_rm32_imm8 : Code.Or_rm32_imm32) : Code.Or_EAX_imm32);
			AddInstruction(Instruction.Create(code, dst, imm));
		}

		public void or(AssemblerRegister64 dst, int imm)
		{
			Code code = (((Register)dst != Register.RAX) ? ((imm >= -128 && imm <= 127) ? Code.Or_rm64_imm8 : Code.Or_rm64_imm32) : Code.Or_RAX_imm32);
			AddInstruction(Instruction.Create(code, dst, imm));
		}

		public void or(AssemblerMemoryOperand dst, int imm)
		{
			Code code;
			if (dst.Size == MemoryOperandSize.Qword)
			{
				code = ((imm >= -128 && imm <= 127) ? Code.Or_rm64_imm8 : Code.Or_rm64_imm32);
			}
			else if (dst.Size == MemoryOperandSize.Dword)
			{
				code = ((imm >= -128 && imm <= 127) ? Code.Or_rm32_imm8 : Code.Or_rm32_imm32);
			}
			else if (dst.Size == MemoryOperandSize.Word)
			{
				code = ((imm >= -128 && imm <= 127) ? Code.Or_rm16_imm8 : Code.Or_rm16_imm16);
			}
			else
			{
				if (dst.Size != MemoryOperandSize.Byte)
				{
					throw NoOpCodeFoundFor(Mnemonic.Or, dst, imm);
				}
				code = Code.Or_rm8_imm8;
			}
			Code code2 = code;
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, in memory, imm));
		}

		public void or(AssemblerRegister8 dst, byte imm)
		{
			Code code = (((Register)dst == Register.AL) ? Code.Or_AL_imm8 : Code.Or_rm8_imm8);
			AddInstruction(Instruction.Create(code, (Register)dst, (uint)imm));
		}

		public void or(AssemblerRegister16 dst, ushort imm)
		{
			Code code = (((Register)dst != Register.AX) ? ((imm <= 127 || (65408 <= imm && imm <= ushort.MaxValue)) ? Code.Or_rm16_imm8 : Code.Or_rm16_imm16) : Code.Or_AX_imm16);
			AddInstruction(Instruction.Create(code, (Register)dst, (uint)imm));
		}

		public void or(AssemblerRegister32 dst, uint imm)
		{
			Code code = (((Register)dst != Register.EAX) ? ((imm <= 127 || 4294967168u <= imm) ? Code.Or_rm32_imm8 : Code.Or_rm32_imm32) : Code.Or_EAX_imm32);
			AddInstruction(Instruction.Create(code, dst, imm));
		}

		public void or(AssemblerMemoryOperand dst, uint imm)
		{
			Code code;
			if (dst.Size == MemoryOperandSize.Dword)
			{
				code = ((imm <= 127 || 4294967168u <= imm) ? Code.Or_rm32_imm8 : Code.Or_rm32_imm32);
			}
			else if (dst.Size == MemoryOperandSize.Word)
			{
				code = ((imm <= 127 || (65408 <= imm && imm <= 65535)) ? Code.Or_rm16_imm8 : Code.Or_rm16_imm16);
			}
			else
			{
				if (dst.Size != MemoryOperandSize.Byte)
				{
					throw NoOpCodeFoundFor(Mnemonic.Or, dst, imm);
				}
				code = Code.Or_rm8_imm8;
			}
			Code code2 = code;
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, in memory, imm));
		}

		public void orpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Orpd_xmm_xmmm128, dst, src));
		}

		public void orpd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Orpd_xmm_xmmm128, register, in memory));
		}

		public void orps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Orps_xmm_xmmm128, dst, src));
		}

		public void orps(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Orps_xmm_xmmm128, register, in memory));
		}

		public void @out(AssemblerRegister16 dst, AssemblerRegister8 src)
		{
			AddInstruction(Instruction.Create(Code.Out_DX_AL, dst, src));
		}

		public void @out(sbyte imm, AssemblerRegister8 src)
		{
			AddInstruction(Instruction.Create(Code.Out_imm8_AL, imm, src));
		}

		public void @out(byte imm, AssemblerRegister8 src)
		{
			AddInstruction(Instruction.Create(Code.Out_imm8_AL, (uint)imm, (Register)src));
		}

		public void @out(AssemblerRegister16 dst, AssemblerRegister16 src)
		{
			AddInstruction(Instruction.Create(Code.Out_DX_AX, dst, src));
		}

		public void @out(sbyte imm, AssemblerRegister16 src)
		{
			AddInstruction(Instruction.Create(Code.Out_imm8_AX, imm, src));
		}

		public void @out(byte imm, AssemblerRegister16 src)
		{
			AddInstruction(Instruction.Create(Code.Out_imm8_AX, (uint)imm, (Register)src));
		}

		public void @out(AssemblerRegister16 dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.Out_DX_EAX, dst, src));
		}

		public void @out(sbyte imm, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.Out_imm8_EAX, imm, src));
		}

		public void @out(byte imm, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.Out_imm8_EAX, (uint)imm, (Register)src));
		}

		public void outsb()
		{
			AddInstruction(Instruction.CreateOutsb(Bitness));
		}

		public void outsd()
		{
			AddInstruction(Instruction.CreateOutsd(Bitness));
		}

		public void outsw()
		{
			AddInstruction(Instruction.CreateOutsw(Bitness));
		}

		public void pabsb(AssemblerRegisterMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.Pabsb_mm_mmm64, dst, src));
		}

		public void pabsb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Pabsb_xmm_xmmm128, dst, src));
		}

		public void pabsb(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pabsb_mm_mmm64, register, in memory));
		}

		public void pabsb(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pabsb_xmm_xmmm128, register, in memory));
		}

		public void pabsd(AssemblerRegisterMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.Pabsd_mm_mmm64, dst, src));
		}

		public void pabsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Pabsd_xmm_xmmm128, dst, src));
		}

		public void pabsd(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pabsd_mm_mmm64, register, in memory));
		}

		public void pabsd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pabsd_xmm_xmmm128, register, in memory));
		}

		public void pabsw(AssemblerRegisterMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.Pabsw_mm_mmm64, dst, src));
		}

		public void pabsw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Pabsw_xmm_xmmm128, dst, src));
		}

		public void pabsw(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pabsw_mm_mmm64, register, in memory));
		}

		public void pabsw(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pabsw_xmm_xmmm128, register, in memory));
		}

		public void packssdw(AssemblerRegisterMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.Packssdw_mm_mmm64, dst, src));
		}

		public void packssdw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Packssdw_xmm_xmmm128, dst, src));
		}

		public void packssdw(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Packssdw_mm_mmm64, register, in memory));
		}

		public void packssdw(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Packssdw_xmm_xmmm128, register, in memory));
		}

		public void packsswb(AssemblerRegisterMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.Packsswb_mm_mmm64, dst, src));
		}

		public void packsswb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Packsswb_xmm_xmmm128, dst, src));
		}

		public void packsswb(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Packsswb_mm_mmm64, register, in memory));
		}

		public void packsswb(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Packsswb_xmm_xmmm128, register, in memory));
		}

		public void packusdw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Packusdw_xmm_xmmm128, dst, src));
		}

		public void packusdw(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Packusdw_xmm_xmmm128, register, in memory));
		}

		public void packuswb(AssemblerRegisterMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.Packuswb_mm_mmm64, dst, src));
		}

		public void packuswb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Packuswb_xmm_xmmm128, dst, src));
		}

		public void packuswb(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Packuswb_mm_mmm64, register, in memory));
		}

		public void packuswb(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Packuswb_xmm_xmmm128, register, in memory));
		}

		public void paddb(AssemblerRegisterMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.Paddb_mm_mmm64, dst, src));
		}

		public void paddb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Paddb_xmm_xmmm128, dst, src));
		}

		public void paddb(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Paddb_mm_mmm64, register, in memory));
		}

		public void paddb(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Paddb_xmm_xmmm128, register, in memory));
		}

		public void paddd(AssemblerRegisterMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.Paddd_mm_mmm64, dst, src));
		}

		public void paddd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Paddd_xmm_xmmm128, dst, src));
		}

		public void paddd(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Paddd_mm_mmm64, register, in memory));
		}

		public void paddd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Paddd_xmm_xmmm128, register, in memory));
		}

		public void paddq(AssemblerRegisterMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.Paddq_mm_mmm64, dst, src));
		}

		public void paddq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Paddq_xmm_xmmm128, dst, src));
		}

		public void paddq(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Paddq_mm_mmm64, register, in memory));
		}

		public void paddq(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Paddq_xmm_xmmm128, register, in memory));
		}

		public void paddsb(AssemblerRegisterMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.Paddsb_mm_mmm64, dst, src));
		}

		public void paddsb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Paddsb_xmm_xmmm128, dst, src));
		}

		public void paddsb(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Paddsb_mm_mmm64, register, in memory));
		}

		public void paddsb(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Paddsb_xmm_xmmm128, register, in memory));
		}

		public void paddsiw(AssemblerRegisterMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.Paddsiw_mm_mmm64, dst, src));
		}

		public void paddsiw(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Paddsiw_mm_mmm64, register, in memory));
		}

		public void paddsw(AssemblerRegisterMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.Paddsw_mm_mmm64, dst, src));
		}

		public void paddsw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Paddsw_xmm_xmmm128, dst, src));
		}

		public void paddsw(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Paddsw_mm_mmm64, register, in memory));
		}

		public void paddsw(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Paddsw_xmm_xmmm128, register, in memory));
		}

		public void paddusb(AssemblerRegisterMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.Paddusb_mm_mmm64, dst, src));
		}

		public void paddusb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Paddusb_xmm_xmmm128, dst, src));
		}

		public void paddusb(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Paddusb_mm_mmm64, register, in memory));
		}

		public void paddusb(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Paddusb_xmm_xmmm128, register, in memory));
		}

		public void paddusw(AssemblerRegisterMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.Paddusw_mm_mmm64, dst, src));
		}

		public void paddusw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Paddusw_xmm_xmmm128, dst, src));
		}

		public void paddusw(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Paddusw_mm_mmm64, register, in memory));
		}

		public void paddusw(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Paddusw_xmm_xmmm128, register, in memory));
		}

		public void paddw(AssemblerRegisterMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.Paddw_mm_mmm64, dst, src));
		}

		public void paddw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Paddw_xmm_xmmm128, dst, src));
		}

		public void paddw(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Paddw_mm_mmm64, register, in memory));
		}

		public void paddw(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Paddw_xmm_xmmm128, register, in memory));
		}

		public void palignr(AssemblerRegisterMM dst, AssemblerRegisterMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.Palignr_mm_mmm64_imm8, dst, src1, imm));
		}

		public void palignr(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.Palignr_xmm_xmmm128_imm8, dst, src1, imm));
		}

		public void palignr(AssemblerRegisterMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Palignr_mm_mmm64_imm8, register, in memory, imm));
		}

		public void palignr(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Palignr_xmm_xmmm128_imm8, register, in memory, imm));
		}

		public void palignr(AssemblerRegisterMM dst, AssemblerRegisterMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.Palignr_mm_mmm64_imm8, (Register)dst, (Register)src1, (uint)imm));
		}

		public void palignr(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.Palignr_xmm_xmmm128_imm8, (Register)dst, (Register)src1, (uint)imm));
		}

		public void palignr(AssemblerRegisterMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Palignr_mm_mmm64_imm8, register, in memory, (uint)imm));
		}

		public void palignr(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Palignr_xmm_xmmm128_imm8, register, in memory, (uint)imm));
		}

		public void pand(AssemblerRegisterMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.Pand_mm_mmm64, dst, src));
		}

		public void pand(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Pand_xmm_xmmm128, dst, src));
		}

		public void pand(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pand_mm_mmm64, register, in memory));
		}

		public void pand(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pand_xmm_xmmm128, register, in memory));
		}

		public void pandn(AssemblerRegisterMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.Pandn_mm_mmm64, dst, src));
		}

		public void pandn(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Pandn_xmm_xmmm128, dst, src));
		}

		public void pandn(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pandn_mm_mmm64, register, in memory));
		}

		public void pandn(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pandn_xmm_xmmm128, register, in memory));
		}

		public void pause()
		{
			AddInstruction(Instruction.Create(Code.Pause));
		}

		public void paveb(AssemblerRegisterMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.Paveb_mm_mmm64, dst, src));
		}

		public void paveb(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Paveb_mm_mmm64, register, in memory));
		}

		public void pavgb(AssemblerRegisterMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.Pavgb_mm_mmm64, dst, src));
		}

		public void pavgb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Pavgb_xmm_xmmm128, dst, src));
		}

		public void pavgb(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pavgb_mm_mmm64, register, in memory));
		}

		public void pavgb(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pavgb_xmm_xmmm128, register, in memory));
		}

		public void pavgusb(AssemblerRegisterMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.D3NOW_Pavgusb_mm_mmm64, dst, src));
		}

		public void pavgusb(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.D3NOW_Pavgusb_mm_mmm64, register, in memory));
		}

		public void pavgw(AssemblerRegisterMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.Pavgw_mm_mmm64, dst, src));
		}

		public void pavgw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Pavgw_xmm_xmmm128, dst, src));
		}

		public void pavgw(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pavgw_mm_mmm64, register, in memory));
		}

		public void pavgw(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pavgw_xmm_xmmm128, register, in memory));
		}

		public void pblendvb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Pblendvb_xmm_xmmm128, dst, src));
		}

		public void pblendvb(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pblendvb_xmm_xmmm128, register, in memory));
		}

		public void pblendw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.Pblendw_xmm_xmmm128_imm8, dst, src1, imm));
		}

		public void pblendw(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pblendw_xmm_xmmm128_imm8, register, in memory, imm));
		}

		public void pblendw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.Pblendw_xmm_xmmm128_imm8, (Register)dst, (Register)src1, (uint)imm));
		}

		public void pblendw(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pblendw_xmm_xmmm128_imm8, register, in memory, (uint)imm));
		}

		public void pclmulhqhqdq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			pclmulqdq(dst, src, 17);
		}

		public void pclmulhqhqdq(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			pclmulqdq(dst, src, 17);
		}

		public void pclmulhqlqdq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			pclmulqdq(dst, src, 1);
		}

		public void pclmulhqlqdq(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			pclmulqdq(dst, src, 1);
		}

		public void pclmullqhqdq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			pclmulqdq(dst, src, 16);
		}

		public void pclmullqhqdq(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			pclmulqdq(dst, src, 16);
		}

		public void pclmullqlqdq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			pclmulqdq(dst, src, 0);
		}

		public void pclmullqlqdq(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			pclmulqdq(dst, src, 0);
		}

		public void pclmulqdq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.Pclmulqdq_xmm_xmmm128_imm8, dst, src1, imm));
		}

		public void pclmulqdq(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pclmulqdq_xmm_xmmm128_imm8, register, in memory, imm));
		}

		public void pclmulqdq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.Pclmulqdq_xmm_xmmm128_imm8, (Register)dst, (Register)src1, (uint)imm));
		}

		public void pclmulqdq(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pclmulqdq_xmm_xmmm128_imm8, register, in memory, (uint)imm));
		}

		public void pcmpeqb(AssemblerRegisterMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.Pcmpeqb_mm_mmm64, dst, src));
		}

		public void pcmpeqb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Pcmpeqb_xmm_xmmm128, dst, src));
		}

		public void pcmpeqb(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pcmpeqb_mm_mmm64, register, in memory));
		}

		public void pcmpeqb(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pcmpeqb_xmm_xmmm128, register, in memory));
		}

		public void pcmpeqd(AssemblerRegisterMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.Pcmpeqd_mm_mmm64, dst, src));
		}

		public void pcmpeqd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Pcmpeqd_xmm_xmmm128, dst, src));
		}

		public void pcmpeqd(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pcmpeqd_mm_mmm64, register, in memory));
		}

		public void pcmpeqd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pcmpeqd_xmm_xmmm128, register, in memory));
		}

		public void pcmpeqq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Pcmpeqq_xmm_xmmm128, dst, src));
		}

		public void pcmpeqq(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pcmpeqq_xmm_xmmm128, register, in memory));
		}

		public void pcmpeqw(AssemblerRegisterMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.Pcmpeqw_mm_mmm64, dst, src));
		}

		public void pcmpeqw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Pcmpeqw_xmm_xmmm128, dst, src));
		}

		public void pcmpeqw(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pcmpeqw_mm_mmm64, register, in memory));
		}

		public void pcmpeqw(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pcmpeqw_xmm_xmmm128, register, in memory));
		}

		public void pcmpestri(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.Pcmpestri_xmm_xmmm128_imm8, dst, src1, imm));
		}

		public void pcmpestri(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pcmpestri_xmm_xmmm128_imm8, register, in memory, imm));
		}

		public void pcmpestri(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.Pcmpestri_xmm_xmmm128_imm8, (Register)dst, (Register)src1, (uint)imm));
		}

		public void pcmpestri(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pcmpestri_xmm_xmmm128_imm8, register, in memory, (uint)imm));
		}

		public void pcmpestri64(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.Pcmpestri64_xmm_xmmm128_imm8, dst, src1, imm));
		}

		public void pcmpestri64(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pcmpestri64_xmm_xmmm128_imm8, register, in memory, imm));
		}

		public void pcmpestri64(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.Pcmpestri64_xmm_xmmm128_imm8, (Register)dst, (Register)src1, (uint)imm));
		}

		public void pcmpestri64(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pcmpestri64_xmm_xmmm128_imm8, register, in memory, (uint)imm));
		}

		public void pcmpestrm(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.Pcmpestrm_xmm_xmmm128_imm8, dst, src1, imm));
		}

		public void pcmpestrm(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pcmpestrm_xmm_xmmm128_imm8, register, in memory, imm));
		}

		public void pcmpestrm(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.Pcmpestrm_xmm_xmmm128_imm8, (Register)dst, (Register)src1, (uint)imm));
		}

		public void pcmpestrm(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pcmpestrm_xmm_xmmm128_imm8, register, in memory, (uint)imm));
		}

		public void pcmpestrm64(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.Pcmpestrm64_xmm_xmmm128_imm8, dst, src1, imm));
		}

		public void pcmpestrm64(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pcmpestrm64_xmm_xmmm128_imm8, register, in memory, imm));
		}

		public void pcmpestrm64(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.Pcmpestrm64_xmm_xmmm128_imm8, (Register)dst, (Register)src1, (uint)imm));
		}

		public void pcmpestrm64(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pcmpestrm64_xmm_xmmm128_imm8, register, in memory, (uint)imm));
		}

		public void pcmpgtb(AssemblerRegisterMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.Pcmpgtb_mm_mmm64, dst, src));
		}

		public void pcmpgtb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Pcmpgtb_xmm_xmmm128, dst, src));
		}

		public void pcmpgtb(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pcmpgtb_mm_mmm64, register, in memory));
		}

		public void pcmpgtb(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pcmpgtb_xmm_xmmm128, register, in memory));
		}

		public void pcmpgtd(AssemblerRegisterMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.Pcmpgtd_mm_mmm64, dst, src));
		}

		public void pcmpgtd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Pcmpgtd_xmm_xmmm128, dst, src));
		}

		public void pcmpgtd(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pcmpgtd_mm_mmm64, register, in memory));
		}

		public void pcmpgtd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pcmpgtd_xmm_xmmm128, register, in memory));
		}

		public void pcmpgtq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Pcmpgtq_xmm_xmmm128, dst, src));
		}

		public void pcmpgtq(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pcmpgtq_xmm_xmmm128, register, in memory));
		}

		public void pcmpgtw(AssemblerRegisterMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.Pcmpgtw_mm_mmm64, dst, src));
		}

		public void pcmpgtw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Pcmpgtw_xmm_xmmm128, dst, src));
		}

		public void pcmpgtw(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pcmpgtw_mm_mmm64, register, in memory));
		}

		public void pcmpgtw(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pcmpgtw_xmm_xmmm128, register, in memory));
		}

		public void pcmpistri(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.Pcmpistri_xmm_xmmm128_imm8, dst, src1, imm));
		}

		public void pcmpistri(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pcmpistri_xmm_xmmm128_imm8, register, in memory, imm));
		}

		public void pcmpistri(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.Pcmpistri_xmm_xmmm128_imm8, (Register)dst, (Register)src1, (uint)imm));
		}

		public void pcmpistri(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pcmpistri_xmm_xmmm128_imm8, register, in memory, (uint)imm));
		}

		public void pcmpistrm(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.Pcmpistrm_xmm_xmmm128_imm8, dst, src1, imm));
		}

		public void pcmpistrm(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pcmpistrm_xmm_xmmm128_imm8, register, in memory, imm));
		}

		public void pcmpistrm(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.Pcmpistrm_xmm_xmmm128_imm8, (Register)dst, (Register)src1, (uint)imm));
		}

		public void pcmpistrm(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pcmpistrm_xmm_xmmm128_imm8, register, in memory, (uint)imm));
		}

		public void pcommit()
		{
			AddInstruction(Instruction.Create(Code.Pcommit));
		}

		public void pconfig()
		{
			AddInstruction(Instruction.Create(Code.Pconfig));
		}

		public void pdep(AssemblerRegister32 dst, AssemblerRegister32 src1, AssemblerRegister32 src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Pdep_r32_r32_rm32, dst, src1, src2));
		}

		public void pdep(AssemblerRegister64 dst, AssemblerRegister64 src1, AssemblerRegister64 src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Pdep_r64_r64_rm64, dst, src1, src2));
		}

		public void pdep(AssemblerRegister32 dst, AssemblerRegister32 src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Pdep_r32_r32_rm32, register, register2, in memory));
		}

		public void pdep(AssemblerRegister64 dst, AssemblerRegister64 src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Pdep_r64_r64_rm64, register, register2, in memory));
		}

		public void pdistib(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pdistib_mm_m64, register, in memory));
		}

		public void pext(AssemblerRegister32 dst, AssemblerRegister32 src1, AssemblerRegister32 src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Pext_r32_r32_rm32, dst, src1, src2));
		}

		public void pext(AssemblerRegister64 dst, AssemblerRegister64 src1, AssemblerRegister64 src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Pext_r64_r64_rm64, dst, src1, src2));
		}

		public void pext(AssemblerRegister32 dst, AssemblerRegister32 src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Pext_r32_r32_rm32, register, register2, in memory));
		}

		public void pext(AssemblerRegister64 dst, AssemblerRegister64 src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Pext_r64_r64_rm64, register, register2, in memory));
		}

		public void pextrb(AssemblerRegister32 dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.Pextrb_r32m8_xmm_imm8, dst, src1, imm));
		}

		public void pextrb(AssemblerRegister64 dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.Pextrb_r64m8_xmm_imm8, dst, src1, imm));
		}

		public void pextrb(AssemblerMemoryOperand dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pextrb_r32m8_xmm_imm8, in memory, src1, imm));
		}

		public void pextrb(AssemblerRegister32 dst, AssemblerRegisterXMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.Pextrb_r32m8_xmm_imm8, (Register)dst, (Register)src1, (uint)imm));
		}

		public void pextrb(AssemblerRegister64 dst, AssemblerRegisterXMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.Pextrb_r64m8_xmm_imm8, (Register)dst, (Register)src1, (uint)imm));
		}

		public void pextrb(AssemblerMemoryOperand dst, AssemblerRegisterXMM src1, byte imm)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pextrb_r32m8_xmm_imm8, in memory, (Register)src1, (uint)imm));
		}

		public void pextrd(AssemblerRegister32 dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.Pextrd_rm32_xmm_imm8, dst, src1, imm));
		}

		public void pextrd(AssemblerMemoryOperand dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pextrd_rm32_xmm_imm8, in memory, src1, imm));
		}

		public void pextrd(AssemblerRegister32 dst, AssemblerRegisterXMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.Pextrd_rm32_xmm_imm8, (Register)dst, (Register)src1, (uint)imm));
		}

		public void pextrd(AssemblerMemoryOperand dst, AssemblerRegisterXMM src1, byte imm)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pextrd_rm32_xmm_imm8, in memory, (Register)src1, (uint)imm));
		}

		public void pextrq(AssemblerRegister64 dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.Pextrq_rm64_xmm_imm8, dst, src1, imm));
		}

		public void pextrq(AssemblerMemoryOperand dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pextrq_rm64_xmm_imm8, in memory, src1, imm));
		}

		public void pextrq(AssemblerRegister64 dst, AssemblerRegisterXMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.Pextrq_rm64_xmm_imm8, (Register)dst, (Register)src1, (uint)imm));
		}

		public void pextrq(AssemblerMemoryOperand dst, AssemblerRegisterXMM src1, byte imm)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pextrq_rm64_xmm_imm8, in memory, (Register)src1, (uint)imm));
		}

		public void pextrw(AssemblerRegister32 dst, AssemblerRegisterMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.Pextrw_r32_mm_imm8, dst, src1, imm));
		}

		public void pextrw(AssemblerRegister64 dst, AssemblerRegisterMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.Pextrw_r64_mm_imm8, dst, src1, imm));
		}

		public void pextrw(AssemblerRegister32 dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.Pextrw_r32_xmm_imm8, dst, src1, imm));
		}

		public void pextrw(AssemblerRegister64 dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.Pextrw_r64_xmm_imm8, dst, src1, imm));
		}

		public void pextrw(AssemblerMemoryOperand dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pextrw_r32m16_xmm_imm8, in memory, src1, imm));
		}

		public void pextrw(AssemblerRegister32 dst, AssemblerRegisterMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.Pextrw_r32_mm_imm8, (Register)dst, (Register)src1, (uint)imm));
		}

		public void pextrw(AssemblerRegister64 dst, AssemblerRegisterMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.Pextrw_r64_mm_imm8, (Register)dst, (Register)src1, (uint)imm));
		}

		public void pextrw(AssemblerRegister32 dst, AssemblerRegisterXMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.Pextrw_r32_xmm_imm8, (Register)dst, (Register)src1, (uint)imm));
		}

		public void pextrw(AssemblerRegister64 dst, AssemblerRegisterXMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.Pextrw_r64_xmm_imm8, (Register)dst, (Register)src1, (uint)imm));
		}

		public void pextrw(AssemblerMemoryOperand dst, AssemblerRegisterXMM src1, byte imm)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pextrw_r32m16_xmm_imm8, in memory, (Register)src1, (uint)imm));
		}

		public void pf2id(AssemblerRegisterMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.D3NOW_Pf2id_mm_mmm64, dst, src));
		}

		public void pf2id(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.D3NOW_Pf2id_mm_mmm64, register, in memory));
		}

		public void pf2iw(AssemblerRegisterMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.D3NOW_Pf2iw_mm_mmm64, dst, src));
		}

		public void pf2iw(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.D3NOW_Pf2iw_mm_mmm64, register, in memory));
		}

		public void pfacc(AssemblerRegisterMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.D3NOW_Pfacc_mm_mmm64, dst, src));
		}

		public void pfacc(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.D3NOW_Pfacc_mm_mmm64, register, in memory));
		}

		public void pfadd(AssemblerRegisterMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.D3NOW_Pfadd_mm_mmm64, dst, src));
		}

		public void pfadd(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.D3NOW_Pfadd_mm_mmm64, register, in memory));
		}

		public void pfcmpeq(AssemblerRegisterMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.D3NOW_Pfcmpeq_mm_mmm64, dst, src));
		}

		public void pfcmpeq(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.D3NOW_Pfcmpeq_mm_mmm64, register, in memory));
		}

		public void pfcmpge(AssemblerRegisterMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.D3NOW_Pfcmpge_mm_mmm64, dst, src));
		}

		public void pfcmpge(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.D3NOW_Pfcmpge_mm_mmm64, register, in memory));
		}

		public void pfcmpgt(AssemblerRegisterMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.D3NOW_Pfcmpgt_mm_mmm64, dst, src));
		}

		public void pfcmpgt(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.D3NOW_Pfcmpgt_mm_mmm64, register, in memory));
		}

		public void pfmax(AssemblerRegisterMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.D3NOW_Pfmax_mm_mmm64, dst, src));
		}

		public void pfmax(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.D3NOW_Pfmax_mm_mmm64, register, in memory));
		}

		public void pfmin(AssemblerRegisterMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.D3NOW_Pfmin_mm_mmm64, dst, src));
		}

		public void pfmin(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.D3NOW_Pfmin_mm_mmm64, register, in memory));
		}

		public void pfmul(AssemblerRegisterMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.D3NOW_Pfmul_mm_mmm64, dst, src));
		}

		public void pfmul(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.D3NOW_Pfmul_mm_mmm64, register, in memory));
		}

		public void pfnacc(AssemblerRegisterMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.D3NOW_Pfnacc_mm_mmm64, dst, src));
		}

		public void pfnacc(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.D3NOW_Pfnacc_mm_mmm64, register, in memory));
		}

		public void pfpnacc(AssemblerRegisterMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.D3NOW_Pfpnacc_mm_mmm64, dst, src));
		}

		public void pfpnacc(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.D3NOW_Pfpnacc_mm_mmm64, register, in memory));
		}

		public void pfrcp(AssemblerRegisterMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.D3NOW_Pfrcp_mm_mmm64, dst, src));
		}

		public void pfrcp(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.D3NOW_Pfrcp_mm_mmm64, register, in memory));
		}

		public void pfrcpit1(AssemblerRegisterMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.D3NOW_Pfrcpit1_mm_mmm64, dst, src));
		}

		public void pfrcpit1(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.D3NOW_Pfrcpit1_mm_mmm64, register, in memory));
		}

		public void pfrcpit2(AssemblerRegisterMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.D3NOW_Pfrcpit2_mm_mmm64, dst, src));
		}

		public void pfrcpit2(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.D3NOW_Pfrcpit2_mm_mmm64, register, in memory));
		}

		public void pfrcpv(AssemblerRegisterMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.D3NOW_Pfrcpv_mm_mmm64, dst, src));
		}

		public void pfrcpv(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.D3NOW_Pfrcpv_mm_mmm64, register, in memory));
		}

		public void pfrsqit1(AssemblerRegisterMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.D3NOW_Pfrsqit1_mm_mmm64, dst, src));
		}

		public void pfrsqit1(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.D3NOW_Pfrsqit1_mm_mmm64, register, in memory));
		}

		public void pfrsqrt(AssemblerRegisterMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.D3NOW_Pfrsqrt_mm_mmm64, dst, src));
		}

		public void pfrsqrt(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.D3NOW_Pfrsqrt_mm_mmm64, register, in memory));
		}

		public void pfrsqrtv(AssemblerRegisterMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.D3NOW_Pfrsqrtv_mm_mmm64, dst, src));
		}

		public void pfrsqrtv(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.D3NOW_Pfrsqrtv_mm_mmm64, register, in memory));
		}

		public void pfsub(AssemblerRegisterMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.D3NOW_Pfsub_mm_mmm64, dst, src));
		}

		public void pfsub(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.D3NOW_Pfsub_mm_mmm64, register, in memory));
		}

		public void pfsubr(AssemblerRegisterMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.D3NOW_Pfsubr_mm_mmm64, dst, src));
		}

		public void pfsubr(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.D3NOW_Pfsubr_mm_mmm64, register, in memory));
		}

		public void phaddd(AssemblerRegisterMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.Phaddd_mm_mmm64, dst, src));
		}

		public void phaddd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Phaddd_xmm_xmmm128, dst, src));
		}

		public void phaddd(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Phaddd_mm_mmm64, register, in memory));
		}

		public void phaddd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Phaddd_xmm_xmmm128, register, in memory));
		}

		public void phaddsw(AssemblerRegisterMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.Phaddsw_mm_mmm64, dst, src));
		}

		public void phaddsw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Phaddsw_xmm_xmmm128, dst, src));
		}

		public void phaddsw(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Phaddsw_mm_mmm64, register, in memory));
		}

		public void phaddsw(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Phaddsw_xmm_xmmm128, register, in memory));
		}

		public void phaddw(AssemblerRegisterMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.Phaddw_mm_mmm64, dst, src));
		}

		public void phaddw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Phaddw_xmm_xmmm128, dst, src));
		}

		public void phaddw(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Phaddw_mm_mmm64, register, in memory));
		}

		public void phaddw(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Phaddw_xmm_xmmm128, register, in memory));
		}

		public void phminposuw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Phminposuw_xmm_xmmm128, dst, src));
		}

		public void phminposuw(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Phminposuw_xmm_xmmm128, register, in memory));
		}

		public void phsubd(AssemblerRegisterMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.Phsubd_mm_mmm64, dst, src));
		}

		public void phsubd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Phsubd_xmm_xmmm128, dst, src));
		}

		public void phsubd(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Phsubd_mm_mmm64, register, in memory));
		}

		public void phsubd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Phsubd_xmm_xmmm128, register, in memory));
		}

		public void phsubsw(AssemblerRegisterMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.Phsubsw_mm_mmm64, dst, src));
		}

		public void phsubsw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Phsubsw_xmm_xmmm128, dst, src));
		}

		public void phsubsw(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Phsubsw_mm_mmm64, register, in memory));
		}

		public void phsubsw(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Phsubsw_xmm_xmmm128, register, in memory));
		}

		public void phsubw(AssemblerRegisterMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.Phsubw_mm_mmm64, dst, src));
		}

		public void phsubw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Phsubw_xmm_xmmm128, dst, src));
		}

		public void phsubw(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Phsubw_mm_mmm64, register, in memory));
		}

		public void phsubw(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Phsubw_xmm_xmmm128, register, in memory));
		}

		public void pi2fd(AssemblerRegisterMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.D3NOW_Pi2fd_mm_mmm64, dst, src));
		}

		public void pi2fd(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.D3NOW_Pi2fd_mm_mmm64, register, in memory));
		}

		public void pi2fw(AssemblerRegisterMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.D3NOW_Pi2fw_mm_mmm64, dst, src));
		}

		public void pi2fw(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.D3NOW_Pi2fw_mm_mmm64, register, in memory));
		}

		public void pinsrb(AssemblerRegisterXMM dst, AssemblerRegister32 src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.Pinsrb_xmm_r32m8_imm8, dst, src1, imm));
		}

		public void pinsrb(AssemblerRegisterXMM dst, AssemblerRegister64 src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.Pinsrb_xmm_r64m8_imm8, dst, src1, imm));
		}

		public void pinsrb(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pinsrb_xmm_r32m8_imm8, register, in memory, imm));
		}

		public void pinsrb(AssemblerRegisterXMM dst, AssemblerRegister32 src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.Pinsrb_xmm_r32m8_imm8, (Register)dst, (Register)src1, (uint)imm));
		}

		public void pinsrb(AssemblerRegisterXMM dst, AssemblerRegister64 src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.Pinsrb_xmm_r64m8_imm8, (Register)dst, (Register)src1, (uint)imm));
		}

		public void pinsrb(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pinsrb_xmm_r32m8_imm8, register, in memory, (uint)imm));
		}

		public void pinsrd(AssemblerRegisterXMM dst, AssemblerRegister32 src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.Pinsrd_xmm_rm32_imm8, dst, src1, imm));
		}

		public void pinsrd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pinsrd_xmm_rm32_imm8, register, in memory, imm));
		}

		public void pinsrd(AssemblerRegisterXMM dst, AssemblerRegister32 src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.Pinsrd_xmm_rm32_imm8, (Register)dst, (Register)src1, (uint)imm));
		}

		public void pinsrd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pinsrd_xmm_rm32_imm8, register, in memory, (uint)imm));
		}

		public void pinsrq(AssemblerRegisterXMM dst, AssemblerRegister64 src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.Pinsrq_xmm_rm64_imm8, dst, src1, imm));
		}

		public void pinsrq(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pinsrq_xmm_rm64_imm8, register, in memory, imm));
		}

		public void pinsrq(AssemblerRegisterXMM dst, AssemblerRegister64 src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.Pinsrq_xmm_rm64_imm8, (Register)dst, (Register)src1, (uint)imm));
		}

		public void pinsrq(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pinsrq_xmm_rm64_imm8, register, in memory, (uint)imm));
		}

		public void pinsrw(AssemblerRegisterMM dst, AssemblerRegister32 src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.Pinsrw_mm_r32m16_imm8, dst, src1, imm));
		}

		public void pinsrw(AssemblerRegisterXMM dst, AssemblerRegister32 src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.Pinsrw_xmm_r32m16_imm8, dst, src1, imm));
		}

		public void pinsrw(AssemblerRegisterMM dst, AssemblerRegister64 src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.Pinsrw_mm_r64m16_imm8, dst, src1, imm));
		}

		public void pinsrw(AssemblerRegisterXMM dst, AssemblerRegister64 src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.Pinsrw_xmm_r64m16_imm8, dst, src1, imm));
		}

		public void pinsrw(AssemblerRegisterMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pinsrw_mm_r32m16_imm8, register, in memory, imm));
		}

		public void pinsrw(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pinsrw_xmm_r32m16_imm8, register, in memory, imm));
		}

		public void pinsrw(AssemblerRegisterMM dst, AssemblerRegister32 src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.Pinsrw_mm_r32m16_imm8, (Register)dst, (Register)src1, (uint)imm));
		}

		public void pinsrw(AssemblerRegisterXMM dst, AssemblerRegister32 src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.Pinsrw_xmm_r32m16_imm8, (Register)dst, (Register)src1, (uint)imm));
		}

		public void pinsrw(AssemblerRegisterMM dst, AssemblerRegister64 src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.Pinsrw_mm_r64m16_imm8, (Register)dst, (Register)src1, (uint)imm));
		}

		public void pinsrw(AssemblerRegisterXMM dst, AssemblerRegister64 src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.Pinsrw_xmm_r64m16_imm8, (Register)dst, (Register)src1, (uint)imm));
		}

		public void pinsrw(AssemblerRegisterMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pinsrw_mm_r32m16_imm8, register, in memory, (uint)imm));
		}

		public void pinsrw(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pinsrw_xmm_r32m16_imm8, register, in memory, (uint)imm));
		}

		public void pmachriw(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pmachriw_mm_m64, register, in memory));
		}

		public void pmaddubsw(AssemblerRegisterMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.Pmaddubsw_mm_mmm64, dst, src));
		}

		public void pmaddubsw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Pmaddubsw_xmm_xmmm128, dst, src));
		}

		public void pmaddubsw(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pmaddubsw_mm_mmm64, register, in memory));
		}

		public void pmaddubsw(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pmaddubsw_xmm_xmmm128, register, in memory));
		}

		public void pmaddwd(AssemblerRegisterMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.Pmaddwd_mm_mmm64, dst, src));
		}

		public void pmaddwd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Pmaddwd_xmm_xmmm128, dst, src));
		}

		public void pmaddwd(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pmaddwd_mm_mmm64, register, in memory));
		}

		public void pmaddwd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pmaddwd_xmm_xmmm128, register, in memory));
		}

		public void pmagw(AssemblerRegisterMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.Pmagw_mm_mmm64, dst, src));
		}

		public void pmagw(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pmagw_mm_mmm64, register, in memory));
		}

		public void pmaxsb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Pmaxsb_xmm_xmmm128, dst, src));
		}

		public void pmaxsb(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pmaxsb_xmm_xmmm128, register, in memory));
		}

		public void pmaxsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Pmaxsd_xmm_xmmm128, dst, src));
		}

		public void pmaxsd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pmaxsd_xmm_xmmm128, register, in memory));
		}

		public void pmaxsw(AssemblerRegisterMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.Pmaxsw_mm_mmm64, dst, src));
		}

		public void pmaxsw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Pmaxsw_xmm_xmmm128, dst, src));
		}

		public void pmaxsw(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pmaxsw_mm_mmm64, register, in memory));
		}

		public void pmaxsw(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pmaxsw_xmm_xmmm128, register, in memory));
		}

		public void pmaxub(AssemblerRegisterMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.Pmaxub_mm_mmm64, dst, src));
		}

		public void pmaxub(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Pmaxub_xmm_xmmm128, dst, src));
		}

		public void pmaxub(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pmaxub_mm_mmm64, register, in memory));
		}

		public void pmaxub(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pmaxub_xmm_xmmm128, register, in memory));
		}

		public void pmaxud(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Pmaxud_xmm_xmmm128, dst, src));
		}

		public void pmaxud(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pmaxud_xmm_xmmm128, register, in memory));
		}

		public void pmaxuw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Pmaxuw_xmm_xmmm128, dst, src));
		}

		public void pmaxuw(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pmaxuw_xmm_xmmm128, register, in memory));
		}

		public void pminsb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Pminsb_xmm_xmmm128, dst, src));
		}

		public void pminsb(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pminsb_xmm_xmmm128, register, in memory));
		}

		public void pminsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Pminsd_xmm_xmmm128, dst, src));
		}

		public void pminsd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pminsd_xmm_xmmm128, register, in memory));
		}

		public void pminsw(AssemblerRegisterMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.Pminsw_mm_mmm64, dst, src));
		}

		public void pminsw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Pminsw_xmm_xmmm128, dst, src));
		}

		public void pminsw(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pminsw_mm_mmm64, register, in memory));
		}

		public void pminsw(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pminsw_xmm_xmmm128, register, in memory));
		}

		public void pminub(AssemblerRegisterMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.Pminub_mm_mmm64, dst, src));
		}

		public void pminub(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Pminub_xmm_xmmm128, dst, src));
		}

		public void pminub(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pminub_mm_mmm64, register, in memory));
		}

		public void pminub(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pminub_xmm_xmmm128, register, in memory));
		}

		public void pminud(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Pminud_xmm_xmmm128, dst, src));
		}

		public void pminud(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pminud_xmm_xmmm128, register, in memory));
		}

		public void pminuw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Pminuw_xmm_xmmm128, dst, src));
		}

		public void pminuw(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pminuw_xmm_xmmm128, register, in memory));
		}

		public void pmovmskb(AssemblerRegister32 dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.Pmovmskb_r32_mm, dst, src));
		}

		public void pmovmskb(AssemblerRegister64 dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.Pmovmskb_r64_mm, dst, src));
		}

		public void pmovmskb(AssemblerRegister32 dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Pmovmskb_r32_xmm, dst, src));
		}

		public void pmovmskb(AssemblerRegister64 dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Pmovmskb_r64_xmm, dst, src));
		}

		public void pmovsxbd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Pmovsxbd_xmm_xmmm32, dst, src));
		}

		public void pmovsxbd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pmovsxbd_xmm_xmmm32, register, in memory));
		}

		public void pmovsxbq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Pmovsxbq_xmm_xmmm16, dst, src));
		}

		public void pmovsxbq(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pmovsxbq_xmm_xmmm16, register, in memory));
		}

		public void pmovsxbw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Pmovsxbw_xmm_xmmm64, dst, src));
		}

		public void pmovsxbw(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pmovsxbw_xmm_xmmm64, register, in memory));
		}

		public void pmovsxdq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Pmovsxdq_xmm_xmmm64, dst, src));
		}

		public void pmovsxdq(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pmovsxdq_xmm_xmmm64, register, in memory));
		}

		public void pmovsxwd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Pmovsxwd_xmm_xmmm64, dst, src));
		}

		public void pmovsxwd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pmovsxwd_xmm_xmmm64, register, in memory));
		}

		public void pmovsxwq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Pmovsxwq_xmm_xmmm32, dst, src));
		}

		public void pmovsxwq(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pmovsxwq_xmm_xmmm32, register, in memory));
		}

		public void pmovzxbd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Pmovzxbd_xmm_xmmm32, dst, src));
		}

		public void pmovzxbd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pmovzxbd_xmm_xmmm32, register, in memory));
		}

		public void pmovzxbq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Pmovzxbq_xmm_xmmm16, dst, src));
		}

		public void pmovzxbq(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pmovzxbq_xmm_xmmm16, register, in memory));
		}

		public void pmovzxbw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Pmovzxbw_xmm_xmmm64, dst, src));
		}

		public void pmovzxbw(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pmovzxbw_xmm_xmmm64, register, in memory));
		}

		public void pmovzxdq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Pmovzxdq_xmm_xmmm64, dst, src));
		}

		public void pmovzxdq(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pmovzxdq_xmm_xmmm64, register, in memory));
		}

		public void pmovzxwd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Pmovzxwd_xmm_xmmm64, dst, src));
		}

		public void pmovzxwd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pmovzxwd_xmm_xmmm64, register, in memory));
		}

		public void pmovzxwq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Pmovzxwq_xmm_xmmm32, dst, src));
		}

		public void pmovzxwq(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pmovzxwq_xmm_xmmm32, register, in memory));
		}

		public void pmuldq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Pmuldq_xmm_xmmm128, dst, src));
		}

		public void pmuldq(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pmuldq_xmm_xmmm128, register, in memory));
		}

		public void pmulhriw(AssemblerRegisterMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.Pmulhriw_mm_mmm64, dst, src));
		}

		public void pmulhriw(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pmulhriw_mm_mmm64, register, in memory));
		}

		public void pmulhrsw(AssemblerRegisterMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.Pmulhrsw_mm_mmm64, dst, src));
		}

		public void pmulhrsw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Pmulhrsw_xmm_xmmm128, dst, src));
		}

		public void pmulhrsw(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pmulhrsw_mm_mmm64, register, in memory));
		}

		public void pmulhrsw(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pmulhrsw_xmm_xmmm128, register, in memory));
		}

		public void pmulhrw(AssemblerRegisterMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.D3NOW_Pmulhrw_mm_mmm64, dst, src));
		}

		public void pmulhrw(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.D3NOW_Pmulhrw_mm_mmm64, register, in memory));
		}

		public void pmulhrw_cyrix(AssemblerRegisterMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.Pmulhrw_mm_mmm64, dst, src));
		}

		public void pmulhrw_cyrix(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pmulhrw_mm_mmm64, register, in memory));
		}

		public void pmulhuw(AssemblerRegisterMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.Pmulhuw_mm_mmm64, dst, src));
		}

		public void pmulhuw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Pmulhuw_xmm_xmmm128, dst, src));
		}

		public void pmulhuw(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pmulhuw_mm_mmm64, register, in memory));
		}

		public void pmulhuw(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pmulhuw_xmm_xmmm128, register, in memory));
		}

		public void pmulhw(AssemblerRegisterMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.Pmulhw_mm_mmm64, dst, src));
		}

		public void pmulhw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Pmulhw_xmm_xmmm128, dst, src));
		}

		public void pmulhw(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pmulhw_mm_mmm64, register, in memory));
		}

		public void pmulhw(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pmulhw_xmm_xmmm128, register, in memory));
		}

		public void pmulld(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Pmulld_xmm_xmmm128, dst, src));
		}

		public void pmulld(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pmulld_xmm_xmmm128, register, in memory));
		}

		public void pmullw(AssemblerRegisterMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.Pmullw_mm_mmm64, dst, src));
		}

		public void pmullw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Pmullw_xmm_xmmm128, dst, src));
		}

		public void pmullw(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pmullw_mm_mmm64, register, in memory));
		}

		public void pmullw(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pmullw_xmm_xmmm128, register, in memory));
		}

		public void pmuludq(AssemblerRegisterMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.Pmuludq_mm_mmm64, dst, src));
		}

		public void pmuludq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Pmuludq_xmm_xmmm128, dst, src));
		}

		public void pmuludq(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pmuludq_mm_mmm64, register, in memory));
		}

		public void pmuludq(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pmuludq_xmm_xmmm128, register, in memory));
		}

		public void pmvgezb(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pmvgezb_mm_m64, register, in memory));
		}

		public void pmvlzb(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pmvlzb_mm_m64, register, in memory));
		}

		public void pmvnzb(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pmvnzb_mm_m64, register, in memory));
		}

		public void pmvzb(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pmvzb_mm_m64, register, in memory));
		}

		public void pop(AssemblerRegister16 dst)
		{
			AddInstruction(Instruction.Create(Code.Pop_r16, dst));
		}

		public void pop(AssemblerRegister32 dst)
		{
			AddInstruction(Instruction.Create(Code.Pop_r32, dst));
		}

		public void pop(AssemblerRegister64 dst)
		{
			AddInstruction(Instruction.Create(Code.Pop_r64, dst));
		}

		public void pop(AssemblerRegisterSegment dst)
		{
			Code code;
			if ((Register)dst == Register.FS)
			{
				code = ((Bitness != 64) ? ((Bitness >= 32) ? Code.Popd_FS : Code.Popw_FS) : Code.Popq_FS);
			}
			else if ((Register)dst == Register.GS)
			{
				code = ((Bitness != 64) ? ((Bitness >= 32) ? Code.Popd_GS : Code.Popw_GS) : Code.Popq_GS);
			}
			else if ((Register)dst == Register.ES)
			{
				code = ((Bitness >= 32) ? Code.Popd_ES : Code.Popw_ES);
			}
			else if ((Register)dst == Register.SS)
			{
				code = ((Bitness >= 32) ? Code.Popd_SS : Code.Popw_SS);
			}
			else
			{
				if ((Register)dst != Register.DS)
				{
					throw NoOpCodeFoundFor(Mnemonic.Pop, dst);
				}
				code = ((Bitness >= 32) ? Code.Popd_DS : Code.Popw_DS);
			}
			AddInstruction(Instruction.Create(code, dst));
		}

		public void pop(AssemblerMemoryOperand dst)
		{
			Code code;
			if (dst.Size == MemoryOperandSize.Qword)
			{
				code = Code.Pop_rm64;
			}
			else if (dst.Size == MemoryOperandSize.Dword)
			{
				code = Code.Pop_rm32;
			}
			else
			{
				if (dst.Size != MemoryOperandSize.Word)
				{
					throw NoOpCodeFoundFor(Mnemonic.Pop, dst);
				}
				code = Code.Pop_rm16;
			}
			Code code2 = code;
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, in memory));
		}

		public void popa()
		{
			AddInstruction(Instruction.Create(Code.Popaw));
		}

		public void popad()
		{
			AddInstruction(Instruction.Create(Code.Popad));
		}

		public void popcnt(AssemblerRegister16 dst, AssemblerRegister16 src)
		{
			AddInstruction(Instruction.Create(Code.Popcnt_r16_rm16, dst, src));
		}

		public void popcnt(AssemblerRegister32 dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.Popcnt_r32_rm32, dst, src));
		}

		public void popcnt(AssemblerRegister64 dst, AssemblerRegister64 src)
		{
			AddInstruction(Instruction.Create(Code.Popcnt_r64_rm64, dst, src));
		}

		public void popcnt(AssemblerRegister16 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Popcnt_r16_rm16, register, in memory));
		}

		public void popcnt(AssemblerRegister32 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Popcnt_r32_rm32, register, in memory));
		}

		public void popcnt(AssemblerRegister64 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Popcnt_r64_rm64, register, in memory));
		}

		public void popf()
		{
			AddInstruction(Instruction.Create(Code.Popfw));
		}

		public void popfd()
		{
			AddInstruction(Instruction.Create(Code.Popfd));
		}

		public void popfq()
		{
			AddInstruction(Instruction.Create(Code.Popfq));
		}

		public void por(AssemblerRegisterMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.Por_mm_mmm64, dst, src));
		}

		public void por(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Por_xmm_xmmm128, dst, src));
		}

		public void por(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Por_mm_mmm64, register, in memory));
		}

		public void por(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Por_xmm_xmmm128, register, in memory));
		}

		public void prefetch(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Prefetch_m8, in memory));
		}

		public void prefetchit0(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Prefetchit0_m8, in memory));
		}

		public void prefetchit1(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Prefetchit1_m8, in memory));
		}

		public void prefetchnta(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Prefetchnta_m8, in memory));
		}

		public void prefetcht0(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Prefetcht0_m8, in memory));
		}

		public void prefetcht1(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Prefetcht1_m8, in memory));
		}

		public void prefetcht2(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Prefetcht2_m8, in memory));
		}

		public void prefetchw(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Prefetchw_m8, in memory));
		}

		public void prefetchwt1(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Prefetchwt1_m8, in memory));
		}

		public void psadbw(AssemblerRegisterMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.Psadbw_mm_mmm64, dst, src));
		}

		public void psadbw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Psadbw_xmm_xmmm128, dst, src));
		}

		public void psadbw(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Psadbw_mm_mmm64, register, in memory));
		}

		public void psadbw(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Psadbw_xmm_xmmm128, register, in memory));
		}

		public void pshufb(AssemblerRegisterMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.Pshufb_mm_mmm64, dst, src));
		}

		public void pshufb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Pshufb_xmm_xmmm128, dst, src));
		}

		public void pshufb(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pshufb_mm_mmm64, register, in memory));
		}

		public void pshufb(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pshufb_xmm_xmmm128, register, in memory));
		}

		public void pshufd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.Pshufd_xmm_xmmm128_imm8, dst, src1, imm));
		}

		public void pshufd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pshufd_xmm_xmmm128_imm8, register, in memory, imm));
		}

		public void pshufd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.Pshufd_xmm_xmmm128_imm8, (Register)dst, (Register)src1, (uint)imm));
		}

		public void pshufd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pshufd_xmm_xmmm128_imm8, register, in memory, (uint)imm));
		}

		public void pshufhw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.Pshufhw_xmm_xmmm128_imm8, dst, src1, imm));
		}

		public void pshufhw(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pshufhw_xmm_xmmm128_imm8, register, in memory, imm));
		}

		public void pshufhw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.Pshufhw_xmm_xmmm128_imm8, (Register)dst, (Register)src1, (uint)imm));
		}

		public void pshufhw(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pshufhw_xmm_xmmm128_imm8, register, in memory, (uint)imm));
		}

		public void pshuflw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.Pshuflw_xmm_xmmm128_imm8, dst, src1, imm));
		}

		public void pshuflw(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pshuflw_xmm_xmmm128_imm8, register, in memory, imm));
		}

		public void pshuflw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.Pshuflw_xmm_xmmm128_imm8, (Register)dst, (Register)src1, (uint)imm));
		}

		public void pshuflw(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pshuflw_xmm_xmmm128_imm8, register, in memory, (uint)imm));
		}

		public void pshufw(AssemblerRegisterMM dst, AssemblerRegisterMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.Pshufw_mm_mmm64_imm8, dst, src1, imm));
		}

		public void pshufw(AssemblerRegisterMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pshufw_mm_mmm64_imm8, register, in memory, imm));
		}

		public void pshufw(AssemblerRegisterMM dst, AssemblerRegisterMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.Pshufw_mm_mmm64_imm8, (Register)dst, (Register)src1, (uint)imm));
		}

		public void pshufw(AssemblerRegisterMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pshufw_mm_mmm64_imm8, register, in memory, (uint)imm));
		}

		public void psignb(AssemblerRegisterMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.Psignb_mm_mmm64, dst, src));
		}

		public void psignb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Psignb_xmm_xmmm128, dst, src));
		}

		public void psignb(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Psignb_mm_mmm64, register, in memory));
		}

		public void psignb(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Psignb_xmm_xmmm128, register, in memory));
		}

		public void psignd(AssemblerRegisterMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.Psignd_mm_mmm64, dst, src));
		}

		public void psignd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Psignd_xmm_xmmm128, dst, src));
		}

		public void psignd(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Psignd_mm_mmm64, register, in memory));
		}

		public void psignd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Psignd_xmm_xmmm128, register, in memory));
		}

		public void psignw(AssemblerRegisterMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.Psignw_mm_mmm64, dst, src));
		}

		public void psignw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Psignw_xmm_xmmm128, dst, src));
		}

		public void psignw(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Psignw_mm_mmm64, register, in memory));
		}

		public void psignw(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Psignw_xmm_xmmm128, register, in memory));
		}

		public void pslld(AssemblerRegisterMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.Pslld_mm_mmm64, dst, src));
		}

		public void pslld(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Pslld_xmm_xmmm128, dst, src));
		}

		public void pslld(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pslld_mm_mmm64, register, in memory));
		}

		public void pslld(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pslld_xmm_xmmm128, register, in memory));
		}

		public void pslld(AssemblerRegisterMM dst, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.Pslld_mm_imm8, dst, imm));
		}

		public void pslld(AssemblerRegisterXMM dst, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.Pslld_xmm_imm8, dst, imm));
		}

		public void pslld(AssemblerRegisterMM dst, byte imm)
		{
			AddInstruction(Instruction.Create(Code.Pslld_mm_imm8, (Register)dst, (uint)imm));
		}

		public void pslld(AssemblerRegisterXMM dst, byte imm)
		{
			AddInstruction(Instruction.Create(Code.Pslld_xmm_imm8, (Register)dst, (uint)imm));
		}

		public void pslldq(AssemblerRegisterXMM dst, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.Pslldq_xmm_imm8, dst, imm));
		}

		public void pslldq(AssemblerRegisterXMM dst, byte imm)
		{
			AddInstruction(Instruction.Create(Code.Pslldq_xmm_imm8, (Register)dst, (uint)imm));
		}

		public void psllq(AssemblerRegisterMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.Psllq_mm_mmm64, dst, src));
		}

		public void psllq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Psllq_xmm_xmmm128, dst, src));
		}

		public void psllq(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Psllq_mm_mmm64, register, in memory));
		}

		public void psllq(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Psllq_xmm_xmmm128, register, in memory));
		}

		public void psllq(AssemblerRegisterMM dst, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.Psllq_mm_imm8, dst, imm));
		}

		public void psllq(AssemblerRegisterXMM dst, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.Psllq_xmm_imm8, dst, imm));
		}

		public void psllq(AssemblerRegisterMM dst, byte imm)
		{
			AddInstruction(Instruction.Create(Code.Psllq_mm_imm8, (Register)dst, (uint)imm));
		}

		public void psllq(AssemblerRegisterXMM dst, byte imm)
		{
			AddInstruction(Instruction.Create(Code.Psllq_xmm_imm8, (Register)dst, (uint)imm));
		}

		public void psllw(AssemblerRegisterMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.Psllw_mm_mmm64, dst, src));
		}

		public void psllw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Psllw_xmm_xmmm128, dst, src));
		}

		public void psllw(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Psllw_mm_mmm64, register, in memory));
		}

		public void psllw(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Psllw_xmm_xmmm128, register, in memory));
		}

		public void psllw(AssemblerRegisterMM dst, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.Psllw_mm_imm8, dst, imm));
		}

		public void psllw(AssemblerRegisterXMM dst, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.Psllw_xmm_imm8, dst, imm));
		}

		public void psllw(AssemblerRegisterMM dst, byte imm)
		{
			AddInstruction(Instruction.Create(Code.Psllw_mm_imm8, (Register)dst, (uint)imm));
		}

		public void psllw(AssemblerRegisterXMM dst, byte imm)
		{
			AddInstruction(Instruction.Create(Code.Psllw_xmm_imm8, (Register)dst, (uint)imm));
		}

		public void psmash()
		{
			AddInstruction(Instruction.Create(Code.Psmash));
		}

		public void psrad(AssemblerRegisterMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.Psrad_mm_mmm64, dst, src));
		}

		public void psrad(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Psrad_xmm_xmmm128, dst, src));
		}

		public void psrad(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Psrad_mm_mmm64, register, in memory));
		}

		public void psrad(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Psrad_xmm_xmmm128, register, in memory));
		}

		public void psrad(AssemblerRegisterMM dst, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.Psrad_mm_imm8, dst, imm));
		}

		public void psrad(AssemblerRegisterXMM dst, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.Psrad_xmm_imm8, dst, imm));
		}

		public void psrad(AssemblerRegisterMM dst, byte imm)
		{
			AddInstruction(Instruction.Create(Code.Psrad_mm_imm8, (Register)dst, (uint)imm));
		}

		public void psrad(AssemblerRegisterXMM dst, byte imm)
		{
			AddInstruction(Instruction.Create(Code.Psrad_xmm_imm8, (Register)dst, (uint)imm));
		}

		public void psraw(AssemblerRegisterMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.Psraw_mm_mmm64, dst, src));
		}

		public void psraw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Psraw_xmm_xmmm128, dst, src));
		}

		public void psraw(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Psraw_mm_mmm64, register, in memory));
		}

		public void psraw(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Psraw_xmm_xmmm128, register, in memory));
		}

		public void psraw(AssemblerRegisterMM dst, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.Psraw_mm_imm8, dst, imm));
		}

		public void psraw(AssemblerRegisterXMM dst, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.Psraw_xmm_imm8, dst, imm));
		}

		public void psraw(AssemblerRegisterMM dst, byte imm)
		{
			AddInstruction(Instruction.Create(Code.Psraw_mm_imm8, (Register)dst, (uint)imm));
		}

		public void psraw(AssemblerRegisterXMM dst, byte imm)
		{
			AddInstruction(Instruction.Create(Code.Psraw_xmm_imm8, (Register)dst, (uint)imm));
		}

		public void psrld(AssemblerRegisterMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.Psrld_mm_mmm64, dst, src));
		}

		public void psrld(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Psrld_xmm_xmmm128, dst, src));
		}

		public void psrld(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Psrld_mm_mmm64, register, in memory));
		}

		public void psrld(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Psrld_xmm_xmmm128, register, in memory));
		}

		public void psrld(AssemblerRegisterMM dst, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.Psrld_mm_imm8, dst, imm));
		}

		public void psrld(AssemblerRegisterXMM dst, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.Psrld_xmm_imm8, dst, imm));
		}

		public void psrld(AssemblerRegisterMM dst, byte imm)
		{
			AddInstruction(Instruction.Create(Code.Psrld_mm_imm8, (Register)dst, (uint)imm));
		}

		public void psrld(AssemblerRegisterXMM dst, byte imm)
		{
			AddInstruction(Instruction.Create(Code.Psrld_xmm_imm8, (Register)dst, (uint)imm));
		}

		public void psrldq(AssemblerRegisterXMM dst, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.Psrldq_xmm_imm8, dst, imm));
		}

		public void psrldq(AssemblerRegisterXMM dst, byte imm)
		{
			AddInstruction(Instruction.Create(Code.Psrldq_xmm_imm8, (Register)dst, (uint)imm));
		}

		public void psrlq(AssemblerRegisterMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.Psrlq_mm_mmm64, dst, src));
		}

		public void psrlq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Psrlq_xmm_xmmm128, dst, src));
		}

		public void psrlq(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Psrlq_mm_mmm64, register, in memory));
		}

		public void psrlq(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Psrlq_xmm_xmmm128, register, in memory));
		}

		public void psrlq(AssemblerRegisterMM dst, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.Psrlq_mm_imm8, dst, imm));
		}

		public void psrlq(AssemblerRegisterXMM dst, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.Psrlq_xmm_imm8, dst, imm));
		}

		public void psrlq(AssemblerRegisterMM dst, byte imm)
		{
			AddInstruction(Instruction.Create(Code.Psrlq_mm_imm8, (Register)dst, (uint)imm));
		}

		public void psrlq(AssemblerRegisterXMM dst, byte imm)
		{
			AddInstruction(Instruction.Create(Code.Psrlq_xmm_imm8, (Register)dst, (uint)imm));
		}

		public void psrlw(AssemblerRegisterMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.Psrlw_mm_mmm64, dst, src));
		}

		public void psrlw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Psrlw_xmm_xmmm128, dst, src));
		}

		public void psrlw(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Psrlw_mm_mmm64, register, in memory));
		}

		public void psrlw(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Psrlw_xmm_xmmm128, register, in memory));
		}

		public void psrlw(AssemblerRegisterMM dst, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.Psrlw_mm_imm8, dst, imm));
		}

		public void psrlw(AssemblerRegisterXMM dst, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.Psrlw_xmm_imm8, dst, imm));
		}

		public void psrlw(AssemblerRegisterMM dst, byte imm)
		{
			AddInstruction(Instruction.Create(Code.Psrlw_mm_imm8, (Register)dst, (uint)imm));
		}

		public void psrlw(AssemblerRegisterXMM dst, byte imm)
		{
			AddInstruction(Instruction.Create(Code.Psrlw_xmm_imm8, (Register)dst, (uint)imm));
		}

		public void psubb(AssemblerRegisterMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.Psubb_mm_mmm64, dst, src));
		}

		public void psubb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Psubb_xmm_xmmm128, dst, src));
		}

		public void psubb(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Psubb_mm_mmm64, register, in memory));
		}

		public void psubb(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Psubb_xmm_xmmm128, register, in memory));
		}

		public void psubd(AssemblerRegisterMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.Psubd_mm_mmm64, dst, src));
		}

		public void psubd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Psubd_xmm_xmmm128, dst, src));
		}

		public void psubd(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Psubd_mm_mmm64, register, in memory));
		}

		public void psubd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Psubd_xmm_xmmm128, register, in memory));
		}

		public void psubq(AssemblerRegisterMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.Psubq_mm_mmm64, dst, src));
		}

		public void psubq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Psubq_xmm_xmmm128, dst, src));
		}

		public void psubq(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Psubq_mm_mmm64, register, in memory));
		}

		public void psubq(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Psubq_xmm_xmmm128, register, in memory));
		}

		public void psubsb(AssemblerRegisterMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.Psubsb_mm_mmm64, dst, src));
		}

		public void psubsb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Psubsb_xmm_xmmm128, dst, src));
		}

		public void psubsb(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Psubsb_mm_mmm64, register, in memory));
		}

		public void psubsb(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Psubsb_xmm_xmmm128, register, in memory));
		}

		public void psubsiw(AssemblerRegisterMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.Psubsiw_mm_mmm64, dst, src));
		}

		public void psubsiw(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Psubsiw_mm_mmm64, register, in memory));
		}

		public void psubsw(AssemblerRegisterMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.Psubsw_mm_mmm64, dst, src));
		}

		public void psubsw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Psubsw_xmm_xmmm128, dst, src));
		}

		public void psubsw(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Psubsw_mm_mmm64, register, in memory));
		}

		public void psubsw(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Psubsw_xmm_xmmm128, register, in memory));
		}

		public void psubusb(AssemblerRegisterMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.Psubusb_mm_mmm64, dst, src));
		}

		public void psubusb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Psubusb_xmm_xmmm128, dst, src));
		}

		public void psubusb(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Psubusb_mm_mmm64, register, in memory));
		}

		public void psubusb(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Psubusb_xmm_xmmm128, register, in memory));
		}

		public void psubusw(AssemblerRegisterMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.Psubusw_mm_mmm64, dst, src));
		}

		public void psubusw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Psubusw_xmm_xmmm128, dst, src));
		}

		public void psubusw(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Psubusw_mm_mmm64, register, in memory));
		}

		public void psubusw(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Psubusw_xmm_xmmm128, register, in memory));
		}

		public void psubw(AssemblerRegisterMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.Psubw_mm_mmm64, dst, src));
		}

		public void psubw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Psubw_xmm_xmmm128, dst, src));
		}

		public void psubw(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Psubw_mm_mmm64, register, in memory));
		}

		public void psubw(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Psubw_xmm_xmmm128, register, in memory));
		}

		public void pswapd(AssemblerRegisterMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.D3NOW_Pswapd_mm_mmm64, dst, src));
		}

		public void pswapd(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.D3NOW_Pswapd_mm_mmm64, register, in memory));
		}

		public void ptest(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Ptest_xmm_xmmm128, dst, src));
		}

		public void ptest(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Ptest_xmm_xmmm128, register, in memory));
		}

		public void ptwrite(AssemblerRegister32 dst)
		{
			AddInstruction(Instruction.Create(Code.Ptwrite_rm32, dst));
		}

		public void ptwrite(AssemblerRegister64 dst)
		{
			AddInstruction(Instruction.Create(Code.Ptwrite_rm64, dst));
		}

		public void ptwrite(AssemblerMemoryOperand dst)
		{
			Code code;
			if (dst.Size == MemoryOperandSize.Qword)
			{
				code = Code.Ptwrite_rm64;
			}
			else
			{
				if (dst.Size != MemoryOperandSize.Dword)
				{
					throw NoOpCodeFoundFor(Mnemonic.Ptwrite, dst);
				}
				code = Code.Ptwrite_rm32;
			}
			Code code2 = code;
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, in memory));
		}

		public void punpckhbw(AssemblerRegisterMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.Punpckhbw_mm_mmm64, dst, src));
		}

		public void punpckhbw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Punpckhbw_xmm_xmmm128, dst, src));
		}

		public void punpckhbw(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Punpckhbw_mm_mmm64, register, in memory));
		}

		public void punpckhbw(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Punpckhbw_xmm_xmmm128, register, in memory));
		}

		public void punpckhdq(AssemblerRegisterMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.Punpckhdq_mm_mmm64, dst, src));
		}

		public void punpckhdq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Punpckhdq_xmm_xmmm128, dst, src));
		}

		public void punpckhdq(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Punpckhdq_mm_mmm64, register, in memory));
		}

		public void punpckhdq(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Punpckhdq_xmm_xmmm128, register, in memory));
		}

		public void punpckhqdq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Punpckhqdq_xmm_xmmm128, dst, src));
		}

		public void punpckhqdq(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Punpckhqdq_xmm_xmmm128, register, in memory));
		}

		public void punpckhwd(AssemblerRegisterMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.Punpckhwd_mm_mmm64, dst, src));
		}

		public void punpckhwd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Punpckhwd_xmm_xmmm128, dst, src));
		}

		public void punpckhwd(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Punpckhwd_mm_mmm64, register, in memory));
		}

		public void punpckhwd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Punpckhwd_xmm_xmmm128, register, in memory));
		}

		public void punpcklbw(AssemblerRegisterMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.Punpcklbw_mm_mmm32, dst, src));
		}

		public void punpcklbw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Punpcklbw_xmm_xmmm128, dst, src));
		}

		public void punpcklbw(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Punpcklbw_mm_mmm32, register, in memory));
		}

		public void punpcklbw(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Punpcklbw_xmm_xmmm128, register, in memory));
		}

		public void punpckldq(AssemblerRegisterMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.Punpckldq_mm_mmm32, dst, src));
		}

		public void punpckldq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Punpckldq_xmm_xmmm128, dst, src));
		}

		public void punpckldq(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Punpckldq_mm_mmm32, register, in memory));
		}

		public void punpckldq(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Punpckldq_xmm_xmmm128, register, in memory));
		}

		public void punpcklqdq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Punpcklqdq_xmm_xmmm128, dst, src));
		}

		public void punpcklqdq(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Punpcklqdq_xmm_xmmm128, register, in memory));
		}

		public void punpcklwd(AssemblerRegisterMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.Punpcklwd_mm_mmm32, dst, src));
		}

		public void punpcklwd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Punpcklwd_xmm_xmmm128, dst, src));
		}

		public void punpcklwd(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Punpcklwd_mm_mmm32, register, in memory));
		}

		public void punpcklwd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Punpcklwd_xmm_xmmm128, register, in memory));
		}

		public void push(AssemblerRegister16 dst)
		{
			AddInstruction(Instruction.Create(Code.Push_r16, dst));
		}

		public void push(AssemblerRegister32 dst)
		{
			AddInstruction(Instruction.Create(Code.Push_r32, dst));
		}

		public void push(AssemblerRegister64 dst)
		{
			AddInstruction(Instruction.Create(Code.Push_r64, dst));
		}

		public void push(AssemblerRegisterSegment dst)
		{
			Code code;
			if ((Register)dst == Register.FS)
			{
				code = ((Bitness != 64) ? ((Bitness >= 32) ? Code.Pushd_FS : Code.Pushw_FS) : Code.Pushq_FS);
			}
			else if ((Register)dst == Register.GS)
			{
				code = ((Bitness != 64) ? ((Bitness >= 32) ? Code.Pushd_GS : Code.Pushw_GS) : Code.Pushq_GS);
			}
			else if ((Register)dst == Register.ES)
			{
				code = ((Bitness >= 32) ? Code.Pushd_ES : Code.Pushw_ES);
			}
			else if ((Register)dst == Register.CS)
			{
				code = ((Bitness >= 32) ? Code.Pushd_CS : Code.Pushw_CS);
			}
			else if ((Register)dst == Register.SS)
			{
				code = ((Bitness >= 32) ? Code.Pushd_SS : Code.Pushw_SS);
			}
			else
			{
				if ((Register)dst != Register.DS)
				{
					throw NoOpCodeFoundFor(Mnemonic.Push, dst);
				}
				code = ((Bitness >= 32) ? Code.Pushd_DS : Code.Pushw_DS);
			}
			AddInstruction(Instruction.Create(code, dst));
		}

		public void push(AssemblerMemoryOperand dst)
		{
			Code code;
			if (dst.Size == MemoryOperandSize.Qword)
			{
				code = Code.Push_rm64;
			}
			else if (dst.Size == MemoryOperandSize.Dword)
			{
				code = Code.Push_rm32;
			}
			else
			{
				if (dst.Size != MemoryOperandSize.Word)
				{
					throw NoOpCodeFoundFor(Mnemonic.Push, dst);
				}
				code = Code.Push_rm16;
			}
			Code code2 = code;
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, in memory));
		}

		public void push(int imm)
		{
			Code code = ((Bitness == 64) ? ((imm >= -128 && imm <= 127) ? Code.Pushq_imm8 : Code.Pushq_imm32) : ((Bitness < 32) ? ((imm >= -128 && imm <= 127) ? Code.Pushw_imm8 : Code.Push_imm16) : ((imm >= -128 && imm <= 127) ? Code.Pushd_imm8 : Code.Pushd_imm32)));
			AddInstruction(Instruction.Create(code, imm));
		}

		public void push(uint imm)
		{
			Code code = ((Bitness < 32) ? ((imm <= 127 || (65408 <= imm && imm <= 65535)) ? Code.Pushw_imm8 : Code.Push_imm16) : ((imm <= 127 || 4294967168u <= imm) ? Code.Pushd_imm8 : Code.Pushd_imm32));
			AddInstruction(Instruction.Create(code, imm));
		}

		public void pusha()
		{
			AddInstruction(Instruction.Create(Code.Pushaw));
		}

		public void pushad()
		{
			AddInstruction(Instruction.Create(Code.Pushad));
		}

		public void pushf()
		{
			AddInstruction(Instruction.Create(Code.Pushfw));
		}

		public void pushfd()
		{
			AddInstruction(Instruction.Create(Code.Pushfd));
		}

		public void pushfq()
		{
			AddInstruction(Instruction.Create(Code.Pushfq));
		}

		public void pvalidate()
		{
			Code code = ((Bitness != 64) ? ((Bitness >= 32) ? Code.Pvalidated : Code.Pvalidatew) : Code.Pvalidateq);
			AddInstruction(Instruction.Create(code));
		}

		public void pxor(AssemblerRegisterMM dst, AssemblerRegisterMM src)
		{
			AddInstruction(Instruction.Create(Code.Pxor_mm_mmm64, dst, src));
		}

		public void pxor(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Pxor_xmm_xmmm128, dst, src));
		}

		public void pxor(AssemblerRegisterMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pxor_mm_mmm64, register, in memory));
		}

		public void pxor(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Pxor_xmm_xmmm128, register, in memory));
		}

		public void rcl(AssemblerRegister8 dst, AssemblerRegister8 src)
		{
			AddInstruction(Instruction.Create(Code.Rcl_rm8_CL, dst, src));
		}

		public void rcl(AssemblerRegister16 dst, AssemblerRegister8 src)
		{
			AddInstruction(Instruction.Create(Code.Rcl_rm16_CL, dst, src));
		}

		public void rcl(AssemblerRegister32 dst, AssemblerRegister8 src)
		{
			AddInstruction(Instruction.Create(Code.Rcl_rm32_CL, dst, src));
		}

		public void rcl(AssemblerRegister64 dst, AssemblerRegister8 src)
		{
			AddInstruction(Instruction.Create(Code.Rcl_rm64_CL, dst, src));
		}

		public void rcl(AssemblerMemoryOperand dst, AssemblerRegister8 src)
		{
			Code code;
			if (dst.Size == MemoryOperandSize.Qword)
			{
				code = Code.Rcl_rm64_CL;
			}
			else if (dst.Size == MemoryOperandSize.Dword)
			{
				code = Code.Rcl_rm32_CL;
			}
			else if (dst.Size == MemoryOperandSize.Word)
			{
				code = Code.Rcl_rm16_CL;
			}
			else
			{
				if (dst.Size != MemoryOperandSize.Byte)
				{
					throw NoOpCodeFoundFor(Mnemonic.Rcl, dst, src);
				}
				code = Code.Rcl_rm8_CL;
			}
			Code code2 = code;
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, in memory, src));
		}

		public void rcl(AssemblerRegister8 dst, sbyte imm)
		{
			Code code = ((imm == 1) ? Code.Rcl_rm8_1 : Code.Rcl_rm8_imm8);
			AddInstruction(Instruction.Create(code, dst, imm));
		}

		public void rcl(AssemblerRegister16 dst, sbyte imm)
		{
			Code code = ((imm == 1) ? Code.Rcl_rm16_1 : Code.Rcl_rm16_imm8);
			AddInstruction(Instruction.Create(code, dst, imm));
		}

		public void rcl(AssemblerRegister32 dst, sbyte imm)
		{
			Code code = ((imm == 1) ? Code.Rcl_rm32_1 : Code.Rcl_rm32_imm8);
			AddInstruction(Instruction.Create(code, dst, imm));
		}

		public void rcl(AssemblerRegister64 dst, sbyte imm)
		{
			Code code = ((imm == 1) ? Code.Rcl_rm64_1 : Code.Rcl_rm64_imm8);
			AddInstruction(Instruction.Create(code, dst, imm));
		}

		public void rcl(AssemblerMemoryOperand dst, sbyte imm)
		{
			Code code;
			if (imm == 1)
			{
				if (dst.Size == MemoryOperandSize.Qword)
				{
					code = Code.Rcl_rm64_1;
				}
				else if (dst.Size == MemoryOperandSize.Dword)
				{
					code = Code.Rcl_rm32_1;
				}
				else if (dst.Size == MemoryOperandSize.Word)
				{
					code = Code.Rcl_rm16_1;
				}
				else
				{
					if (dst.Size != MemoryOperandSize.Byte)
					{
						throw NoOpCodeFoundFor(Mnemonic.Rcl, dst, imm);
					}
					code = Code.Rcl_rm8_1;
				}
			}
			else if (dst.Size == MemoryOperandSize.Qword)
			{
				code = Code.Rcl_rm64_imm8;
			}
			else if (dst.Size == MemoryOperandSize.Dword)
			{
				code = Code.Rcl_rm32_imm8;
			}
			else if (dst.Size == MemoryOperandSize.Word)
			{
				code = Code.Rcl_rm16_imm8;
			}
			else
			{
				if (dst.Size != MemoryOperandSize.Byte)
				{
					throw NoOpCodeFoundFor(Mnemonic.Rcl, dst, imm);
				}
				code = Code.Rcl_rm8_imm8;
			}
			Code code2 = code;
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, in memory, imm));
		}

		public void rcl(AssemblerRegister8 dst, byte imm)
		{
			Code code = ((imm == 1) ? Code.Rcl_rm8_1 : Code.Rcl_rm8_imm8);
			AddInstruction(Instruction.Create(code, (Register)dst, (uint)imm));
		}

		public void rcl(AssemblerRegister16 dst, byte imm)
		{
			Code code = ((imm == 1) ? Code.Rcl_rm16_1 : Code.Rcl_rm16_imm8);
			AddInstruction(Instruction.Create(code, (Register)dst, (uint)imm));
		}

		public void rcl(AssemblerRegister32 dst, byte imm)
		{
			Code code = ((imm == 1) ? Code.Rcl_rm32_1 : Code.Rcl_rm32_imm8);
			AddInstruction(Instruction.Create(code, (Register)dst, (uint)imm));
		}

		public void rcl(AssemblerRegister64 dst, byte imm)
		{
			Code code = ((imm == 1) ? Code.Rcl_rm64_1 : Code.Rcl_rm64_imm8);
			AddInstruction(Instruction.Create(code, (Register)dst, (uint)imm));
		}

		public void rcl(AssemblerMemoryOperand dst, byte imm)
		{
			Code code;
			if (imm == 1)
			{
				if (dst.Size == MemoryOperandSize.Qword)
				{
					code = Code.Rcl_rm64_1;
				}
				else if (dst.Size == MemoryOperandSize.Dword)
				{
					code = Code.Rcl_rm32_1;
				}
				else if (dst.Size == MemoryOperandSize.Word)
				{
					code = Code.Rcl_rm16_1;
				}
				else
				{
					if (dst.Size != MemoryOperandSize.Byte)
					{
						throw NoOpCodeFoundFor(Mnemonic.Rcl, dst, imm);
					}
					code = Code.Rcl_rm8_1;
				}
			}
			else if (dst.Size == MemoryOperandSize.Qword)
			{
				code = Code.Rcl_rm64_imm8;
			}
			else if (dst.Size == MemoryOperandSize.Dword)
			{
				code = Code.Rcl_rm32_imm8;
			}
			else if (dst.Size == MemoryOperandSize.Word)
			{
				code = Code.Rcl_rm16_imm8;
			}
			else
			{
				if (dst.Size != MemoryOperandSize.Byte)
				{
					throw NoOpCodeFoundFor(Mnemonic.Rcl, dst, imm);
				}
				code = Code.Rcl_rm8_imm8;
			}
			Code code2 = code;
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, in memory, (uint)imm));
		}

		public void rcpps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Rcpps_xmm_xmmm128, dst, src));
		}

		public void rcpps(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Rcpps_xmm_xmmm128, register, in memory));
		}

		public void rcpss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Rcpss_xmm_xmmm32, dst, src));
		}

		public void rcpss(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Rcpss_xmm_xmmm32, register, in memory));
		}

		public void rcr(AssemblerRegister8 dst, AssemblerRegister8 src)
		{
			AddInstruction(Instruction.Create(Code.Rcr_rm8_CL, dst, src));
		}

		public void rcr(AssemblerRegister16 dst, AssemblerRegister8 src)
		{
			AddInstruction(Instruction.Create(Code.Rcr_rm16_CL, dst, src));
		}

		public void rcr(AssemblerRegister32 dst, AssemblerRegister8 src)
		{
			AddInstruction(Instruction.Create(Code.Rcr_rm32_CL, dst, src));
		}

		public void rcr(AssemblerRegister64 dst, AssemblerRegister8 src)
		{
			AddInstruction(Instruction.Create(Code.Rcr_rm64_CL, dst, src));
		}

		public void rcr(AssemblerMemoryOperand dst, AssemblerRegister8 src)
		{
			Code code;
			if (dst.Size == MemoryOperandSize.Qword)
			{
				code = Code.Rcr_rm64_CL;
			}
			else if (dst.Size == MemoryOperandSize.Dword)
			{
				code = Code.Rcr_rm32_CL;
			}
			else if (dst.Size == MemoryOperandSize.Word)
			{
				code = Code.Rcr_rm16_CL;
			}
			else
			{
				if (dst.Size != MemoryOperandSize.Byte)
				{
					throw NoOpCodeFoundFor(Mnemonic.Rcr, dst, src);
				}
				code = Code.Rcr_rm8_CL;
			}
			Code code2 = code;
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, in memory, src));
		}

		public void rcr(AssemblerRegister8 dst, sbyte imm)
		{
			Code code = ((imm == 1) ? Code.Rcr_rm8_1 : Code.Rcr_rm8_imm8);
			AddInstruction(Instruction.Create(code, dst, imm));
		}

		public void rcr(AssemblerRegister16 dst, sbyte imm)
		{
			Code code = ((imm == 1) ? Code.Rcr_rm16_1 : Code.Rcr_rm16_imm8);
			AddInstruction(Instruction.Create(code, dst, imm));
		}

		public void rcr(AssemblerRegister32 dst, sbyte imm)
		{
			Code code = ((imm == 1) ? Code.Rcr_rm32_1 : Code.Rcr_rm32_imm8);
			AddInstruction(Instruction.Create(code, dst, imm));
		}

		public void rcr(AssemblerRegister64 dst, sbyte imm)
		{
			Code code = ((imm == 1) ? Code.Rcr_rm64_1 : Code.Rcr_rm64_imm8);
			AddInstruction(Instruction.Create(code, dst, imm));
		}

		public void rcr(AssemblerMemoryOperand dst, sbyte imm)
		{
			Code code;
			if (imm == 1)
			{
				if (dst.Size == MemoryOperandSize.Qword)
				{
					code = Code.Rcr_rm64_1;
				}
				else if (dst.Size == MemoryOperandSize.Dword)
				{
					code = Code.Rcr_rm32_1;
				}
				else if (dst.Size == MemoryOperandSize.Word)
				{
					code = Code.Rcr_rm16_1;
				}
				else
				{
					if (dst.Size != MemoryOperandSize.Byte)
					{
						throw NoOpCodeFoundFor(Mnemonic.Rcr, dst, imm);
					}
					code = Code.Rcr_rm8_1;
				}
			}
			else if (dst.Size == MemoryOperandSize.Qword)
			{
				code = Code.Rcr_rm64_imm8;
			}
			else if (dst.Size == MemoryOperandSize.Dword)
			{
				code = Code.Rcr_rm32_imm8;
			}
			else if (dst.Size == MemoryOperandSize.Word)
			{
				code = Code.Rcr_rm16_imm8;
			}
			else
			{
				if (dst.Size != MemoryOperandSize.Byte)
				{
					throw NoOpCodeFoundFor(Mnemonic.Rcr, dst, imm);
				}
				code = Code.Rcr_rm8_imm8;
			}
			Code code2 = code;
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, in memory, imm));
		}

		public void rcr(AssemblerRegister8 dst, byte imm)
		{
			Code code = ((imm == 1) ? Code.Rcr_rm8_1 : Code.Rcr_rm8_imm8);
			AddInstruction(Instruction.Create(code, (Register)dst, (uint)imm));
		}

		public void rcr(AssemblerRegister16 dst, byte imm)
		{
			Code code = ((imm == 1) ? Code.Rcr_rm16_1 : Code.Rcr_rm16_imm8);
			AddInstruction(Instruction.Create(code, (Register)dst, (uint)imm));
		}

		public void rcr(AssemblerRegister32 dst, byte imm)
		{
			Code code = ((imm == 1) ? Code.Rcr_rm32_1 : Code.Rcr_rm32_imm8);
			AddInstruction(Instruction.Create(code, (Register)dst, (uint)imm));
		}

		public void rcr(AssemblerRegister64 dst, byte imm)
		{
			Code code = ((imm == 1) ? Code.Rcr_rm64_1 : Code.Rcr_rm64_imm8);
			AddInstruction(Instruction.Create(code, (Register)dst, (uint)imm));
		}

		public void rcr(AssemblerMemoryOperand dst, byte imm)
		{
			Code code;
			if (imm == 1)
			{
				if (dst.Size == MemoryOperandSize.Qword)
				{
					code = Code.Rcr_rm64_1;
				}
				else if (dst.Size == MemoryOperandSize.Dword)
				{
					code = Code.Rcr_rm32_1;
				}
				else if (dst.Size == MemoryOperandSize.Word)
				{
					code = Code.Rcr_rm16_1;
				}
				else
				{
					if (dst.Size != MemoryOperandSize.Byte)
					{
						throw NoOpCodeFoundFor(Mnemonic.Rcr, dst, imm);
					}
					code = Code.Rcr_rm8_1;
				}
			}
			else if (dst.Size == MemoryOperandSize.Qword)
			{
				code = Code.Rcr_rm64_imm8;
			}
			else if (dst.Size == MemoryOperandSize.Dword)
			{
				code = Code.Rcr_rm32_imm8;
			}
			else if (dst.Size == MemoryOperandSize.Word)
			{
				code = Code.Rcr_rm16_imm8;
			}
			else
			{
				if (dst.Size != MemoryOperandSize.Byte)
				{
					throw NoOpCodeFoundFor(Mnemonic.Rcr, dst, imm);
				}
				code = Code.Rcr_rm8_imm8;
			}
			Code code2 = code;
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, in memory, (uint)imm));
		}

		public void rdfsbase(AssemblerRegister32 dst)
		{
			AddInstruction(Instruction.Create(Code.Rdfsbase_r32, dst));
		}

		public void rdfsbase(AssemblerRegister64 dst)
		{
			AddInstruction(Instruction.Create(Code.Rdfsbase_r64, dst));
		}

		public void rdgsbase(AssemblerRegister32 dst)
		{
			AddInstruction(Instruction.Create(Code.Rdgsbase_r32, dst));
		}

		public void rdgsbase(AssemblerRegister64 dst)
		{
			AddInstruction(Instruction.Create(Code.Rdgsbase_r64, dst));
		}

		public void rdm()
		{
			AddInstruction(Instruction.Create(Code.Rdm));
		}

		public void rdmsr()
		{
			AddInstruction(Instruction.Create(Code.Rdmsr));
		}

		public void rdmsrlist()
		{
			AddInstruction(Instruction.Create(Code.Rdmsrlist));
		}

		public void rdpid(AssemblerRegister32 dst)
		{
			AddInstruction(Instruction.Create(Code.Rdpid_r32, dst));
		}

		public void rdpid(AssemblerRegister64 dst)
		{
			AddInstruction(Instruction.Create(Code.Rdpid_r64, dst));
		}

		public void rdpkru()
		{
			AddInstruction(Instruction.Create(Code.Rdpkru));
		}

		public void rdpmc()
		{
			AddInstruction(Instruction.Create(Code.Rdpmc));
		}

		public void rdpru()
		{
			AddInstruction(Instruction.Create(Code.Rdpru));
		}

		public void rdrand(AssemblerRegister16 dst)
		{
			AddInstruction(Instruction.Create(Code.Rdrand_r16, dst));
		}

		public void rdrand(AssemblerRegister32 dst)
		{
			AddInstruction(Instruction.Create(Code.Rdrand_r32, dst));
		}

		public void rdrand(AssemblerRegister64 dst)
		{
			AddInstruction(Instruction.Create(Code.Rdrand_r64, dst));
		}

		public void rdseed(AssemblerRegister16 dst)
		{
			AddInstruction(Instruction.Create(Code.Rdseed_r16, dst));
		}

		public void rdseed(AssemblerRegister32 dst)
		{
			AddInstruction(Instruction.Create(Code.Rdseed_r32, dst));
		}

		public void rdseed(AssemblerRegister64 dst)
		{
			AddInstruction(Instruction.Create(Code.Rdseed_r64, dst));
		}

		public void rdshr(AssemblerRegister32 dst)
		{
			AddInstruction(Instruction.Create(Code.Rdshr_rm32, dst));
		}

		public void rdshr(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Rdshr_rm32, in memory));
		}

		public void rdsspd(AssemblerRegister32 dst)
		{
			AddInstruction(Instruction.Create(Code.Rdsspd_r32, dst));
		}

		public void rdsspq(AssemblerRegister64 dst)
		{
			AddInstruction(Instruction.Create(Code.Rdsspq_r64, dst));
		}

		public void rdtsc()
		{
			AddInstruction(Instruction.Create(Code.Rdtsc));
		}

		public void rdtscp()
		{
			AddInstruction(Instruction.Create(Code.Rdtscp));
		}

		public void rdudbg()
		{
			AddInstruction(Instruction.Create(Code.Rdudbg));
		}

		public void reservednop_0f0d(AssemblerRegister16 dst, AssemblerRegister16 src)
		{
			AddInstruction(Instruction.Create(Code.Reservednop_rm16_r16_0F0D, dst, src));
		}

		public void reservednop_0f0d(AssemblerMemoryOperand dst, AssemblerRegister16 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Reservednop_rm16_r16_0F0D, in memory, src));
		}

		public void reservednop_0f0d(AssemblerRegister32 dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.Reservednop_rm32_r32_0F0D, dst, src));
		}

		public void reservednop_0f0d(AssemblerMemoryOperand dst, AssemblerRegister32 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Reservednop_rm32_r32_0F0D, in memory, src));
		}

		public void reservednop_0f0d(AssemblerRegister64 dst, AssemblerRegister64 src)
		{
			AddInstruction(Instruction.Create(Code.Reservednop_rm64_r64_0F0D, dst, src));
		}

		public void reservednop_0f0d(AssemblerMemoryOperand dst, AssemblerRegister64 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Reservednop_rm64_r64_0F0D, in memory, src));
		}

		public void reservednop_0f18(AssemblerRegister16 dst, AssemblerRegister16 src)
		{
			AddInstruction(Instruction.Create(Code.Reservednop_rm16_r16_0F18, dst, src));
		}

		public void reservednop_0f18(AssemblerMemoryOperand dst, AssemblerRegister16 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Reservednop_rm16_r16_0F18, in memory, src));
		}

		public void reservednop_0f18(AssemblerRegister32 dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.Reservednop_rm32_r32_0F18, dst, src));
		}

		public void reservednop_0f18(AssemblerMemoryOperand dst, AssemblerRegister32 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Reservednop_rm32_r32_0F18, in memory, src));
		}

		public void reservednop_0f18(AssemblerRegister64 dst, AssemblerRegister64 src)
		{
			AddInstruction(Instruction.Create(Code.Reservednop_rm64_r64_0F18, dst, src));
		}

		public void reservednop_0f18(AssemblerMemoryOperand dst, AssemblerRegister64 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Reservednop_rm64_r64_0F18, in memory, src));
		}

		public void reservednop_0f19(AssemblerRegister16 dst, AssemblerRegister16 src)
		{
			AddInstruction(Instruction.Create(Code.Reservednop_rm16_r16_0F19, dst, src));
		}

		public void reservednop_0f19(AssemblerMemoryOperand dst, AssemblerRegister16 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Reservednop_rm16_r16_0F19, in memory, src));
		}

		public void reservednop_0f19(AssemblerRegister32 dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.Reservednop_rm32_r32_0F19, dst, src));
		}

		public void reservednop_0f19(AssemblerMemoryOperand dst, AssemblerRegister32 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Reservednop_rm32_r32_0F19, in memory, src));
		}

		public void reservednop_0f19(AssemblerRegister64 dst, AssemblerRegister64 src)
		{
			AddInstruction(Instruction.Create(Code.Reservednop_rm64_r64_0F19, dst, src));
		}

		public void reservednop_0f19(AssemblerMemoryOperand dst, AssemblerRegister64 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Reservednop_rm64_r64_0F19, in memory, src));
		}

		public void reservednop_0f1a(AssemblerRegister16 dst, AssemblerRegister16 src)
		{
			AddInstruction(Instruction.Create(Code.Reservednop_rm16_r16_0F1A, dst, src));
		}

		public void reservednop_0f1a(AssemblerMemoryOperand dst, AssemblerRegister16 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Reservednop_rm16_r16_0F1A, in memory, src));
		}

		public void reservednop_0f1a(AssemblerRegister32 dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.Reservednop_rm32_r32_0F1A, dst, src));
		}

		public void reservednop_0f1a(AssemblerMemoryOperand dst, AssemblerRegister32 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Reservednop_rm32_r32_0F1A, in memory, src));
		}

		public void reservednop_0f1a(AssemblerRegister64 dst, AssemblerRegister64 src)
		{
			AddInstruction(Instruction.Create(Code.Reservednop_rm64_r64_0F1A, dst, src));
		}

		public void reservednop_0f1a(AssemblerMemoryOperand dst, AssemblerRegister64 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Reservednop_rm64_r64_0F1A, in memory, src));
		}

		public void reservednop_0f1b(AssemblerRegister16 dst, AssemblerRegister16 src)
		{
			AddInstruction(Instruction.Create(Code.Reservednop_rm16_r16_0F1B, dst, src));
		}

		public void reservednop_0f1b(AssemblerMemoryOperand dst, AssemblerRegister16 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Reservednop_rm16_r16_0F1B, in memory, src));
		}

		public void reservednop_0f1b(AssemblerRegister32 dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.Reservednop_rm32_r32_0F1B, dst, src));
		}

		public void reservednop_0f1b(AssemblerMemoryOperand dst, AssemblerRegister32 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Reservednop_rm32_r32_0F1B, in memory, src));
		}

		public void reservednop_0f1b(AssemblerRegister64 dst, AssemblerRegister64 src)
		{
			AddInstruction(Instruction.Create(Code.Reservednop_rm64_r64_0F1B, dst, src));
		}

		public void reservednop_0f1b(AssemblerMemoryOperand dst, AssemblerRegister64 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Reservednop_rm64_r64_0F1B, in memory, src));
		}

		public void reservednop_0f1c(AssemblerRegister16 dst, AssemblerRegister16 src)
		{
			AddInstruction(Instruction.Create(Code.Reservednop_rm16_r16_0F1C, dst, src));
		}

		public void reservednop_0f1c(AssemblerMemoryOperand dst, AssemblerRegister16 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Reservednop_rm16_r16_0F1C, in memory, src));
		}

		public void reservednop_0f1c(AssemblerRegister32 dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.Reservednop_rm32_r32_0F1C, dst, src));
		}

		public void reservednop_0f1c(AssemblerMemoryOperand dst, AssemblerRegister32 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Reservednop_rm32_r32_0F1C, in memory, src));
		}

		public void reservednop_0f1c(AssemblerRegister64 dst, AssemblerRegister64 src)
		{
			AddInstruction(Instruction.Create(Code.Reservednop_rm64_r64_0F1C, dst, src));
		}

		public void reservednop_0f1c(AssemblerMemoryOperand dst, AssemblerRegister64 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Reservednop_rm64_r64_0F1C, in memory, src));
		}

		public void reservednop_0f1d(AssemblerRegister16 dst, AssemblerRegister16 src)
		{
			AddInstruction(Instruction.Create(Code.Reservednop_rm16_r16_0F1D, dst, src));
		}

		public void reservednop_0f1d(AssemblerMemoryOperand dst, AssemblerRegister16 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Reservednop_rm16_r16_0F1D, in memory, src));
		}

		public void reservednop_0f1d(AssemblerRegister32 dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.Reservednop_rm32_r32_0F1D, dst, src));
		}

		public void reservednop_0f1d(AssemblerMemoryOperand dst, AssemblerRegister32 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Reservednop_rm32_r32_0F1D, in memory, src));
		}

		public void reservednop_0f1d(AssemblerRegister64 dst, AssemblerRegister64 src)
		{
			AddInstruction(Instruction.Create(Code.Reservednop_rm64_r64_0F1D, dst, src));
		}

		public void reservednop_0f1d(AssemblerMemoryOperand dst, AssemblerRegister64 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Reservednop_rm64_r64_0F1D, in memory, src));
		}

		public void reservednop_0f1e(AssemblerRegister16 dst, AssemblerRegister16 src)
		{
			AddInstruction(Instruction.Create(Code.Reservednop_rm16_r16_0F1E, dst, src));
		}

		public void reservednop_0f1e(AssemblerMemoryOperand dst, AssemblerRegister16 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Reservednop_rm16_r16_0F1E, in memory, src));
		}

		public void reservednop_0f1e(AssemblerRegister32 dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.Reservednop_rm32_r32_0F1E, dst, src));
		}

		public void reservednop_0f1e(AssemblerMemoryOperand dst, AssemblerRegister32 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Reservednop_rm32_r32_0F1E, in memory, src));
		}

		public void reservednop_0f1e(AssemblerRegister64 dst, AssemblerRegister64 src)
		{
			AddInstruction(Instruction.Create(Code.Reservednop_rm64_r64_0F1E, dst, src));
		}

		public void reservednop_0f1e(AssemblerMemoryOperand dst, AssemblerRegister64 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Reservednop_rm64_r64_0F1E, in memory, src));
		}

		public void reservednop_0f1f(AssemblerRegister16 dst, AssemblerRegister16 src)
		{
			AddInstruction(Instruction.Create(Code.Reservednop_rm16_r16_0F1F, dst, src));
		}

		public void reservednop_0f1f(AssemblerMemoryOperand dst, AssemblerRegister16 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Reservednop_rm16_r16_0F1F, in memory, src));
		}

		public void reservednop_0f1f(AssemblerRegister32 dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.Reservednop_rm32_r32_0F1F, dst, src));
		}

		public void reservednop_0f1f(AssemblerMemoryOperand dst, AssemblerRegister32 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Reservednop_rm32_r32_0F1F, in memory, src));
		}

		public void reservednop_0f1f(AssemblerRegister64 dst, AssemblerRegister64 src)
		{
			AddInstruction(Instruction.Create(Code.Reservednop_rm64_r64_0F1F, dst, src));
		}

		public void reservednop_0f1f(AssemblerMemoryOperand dst, AssemblerRegister64 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Reservednop_rm64_r64_0F1F, in memory, src));
		}

		public void ret()
		{
			Code code = ((Bitness != 64) ? ((Bitness >= 32) ? Code.Retnd : Code.Retnw) : Code.Retnq);
			AddInstruction(Instruction.Create(code));
		}

		public void ret(short imm)
		{
			Code code = ((Bitness != 64) ? ((Bitness >= 32) ? Code.Retnd_imm16 : Code.Retnw_imm16) : Code.Retnq_imm16);
			AddInstruction(Instruction.Create(code, imm));
		}

		public void ret(ushort imm)
		{
			Code code = ((Bitness != 64) ? ((Bitness >= 32) ? Code.Retnd_imm16 : Code.Retnw_imm16) : Code.Retnq_imm16);
			AddInstruction(Instruction.Create(code, (uint)imm));
		}

		public void retf()
		{
			Code code = ((Bitness != 64) ? ((Bitness >= 32) ? Code.Retfd : Code.Retfw) : Code.Retfq);
			AddInstruction(Instruction.Create(code));
		}

		public void retf(short imm)
		{
			Code code = ((Bitness != 64) ? ((Bitness >= 32) ? Code.Retfd_imm16 : Code.Retfw_imm16) : Code.Retfq_imm16);
			AddInstruction(Instruction.Create(code, imm));
		}

		public void retf(ushort imm)
		{
			Code code = ((Bitness != 64) ? ((Bitness >= 32) ? Code.Retfd_imm16 : Code.Retfw_imm16) : Code.Retfq_imm16);
			AddInstruction(Instruction.Create(code, (uint)imm));
		}

		public void rmpadjust()
		{
			AddInstruction(Instruction.Create(Code.Rmpadjust));
		}

		public void rmpquery()
		{
			AddInstruction(Instruction.Create(Code.Rmpquery));
		}

		public void rmpupdate()
		{
			AddInstruction(Instruction.Create(Code.Rmpupdate));
		}

		public void rol(AssemblerRegister8 dst, AssemblerRegister8 src)
		{
			AddInstruction(Instruction.Create(Code.Rol_rm8_CL, dst, src));
		}

		public void rol(AssemblerRegister16 dst, AssemblerRegister8 src)
		{
			AddInstruction(Instruction.Create(Code.Rol_rm16_CL, dst, src));
		}

		public void rol(AssemblerRegister32 dst, AssemblerRegister8 src)
		{
			AddInstruction(Instruction.Create(Code.Rol_rm32_CL, dst, src));
		}

		public void rol(AssemblerRegister64 dst, AssemblerRegister8 src)
		{
			AddInstruction(Instruction.Create(Code.Rol_rm64_CL, dst, src));
		}

		public void rol(AssemblerMemoryOperand dst, AssemblerRegister8 src)
		{
			Code code;
			if (dst.Size == MemoryOperandSize.Qword)
			{
				code = Code.Rol_rm64_CL;
			}
			else if (dst.Size == MemoryOperandSize.Dword)
			{
				code = Code.Rol_rm32_CL;
			}
			else if (dst.Size == MemoryOperandSize.Word)
			{
				code = Code.Rol_rm16_CL;
			}
			else
			{
				if (dst.Size != MemoryOperandSize.Byte)
				{
					throw NoOpCodeFoundFor(Mnemonic.Rol, dst, src);
				}
				code = Code.Rol_rm8_CL;
			}
			Code code2 = code;
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, in memory, src));
		}

		public void rol(AssemblerRegister8 dst, sbyte imm)
		{
			Code code = ((imm == 1) ? Code.Rol_rm8_1 : Code.Rol_rm8_imm8);
			AddInstruction(Instruction.Create(code, dst, imm));
		}

		public void rol(AssemblerRegister16 dst, sbyte imm)
		{
			Code code = ((imm == 1) ? Code.Rol_rm16_1 : Code.Rol_rm16_imm8);
			AddInstruction(Instruction.Create(code, dst, imm));
		}

		public void rol(AssemblerRegister32 dst, sbyte imm)
		{
			Code code = ((imm == 1) ? Code.Rol_rm32_1 : Code.Rol_rm32_imm8);
			AddInstruction(Instruction.Create(code, dst, imm));
		}

		public void rol(AssemblerRegister64 dst, sbyte imm)
		{
			Code code = ((imm == 1) ? Code.Rol_rm64_1 : Code.Rol_rm64_imm8);
			AddInstruction(Instruction.Create(code, dst, imm));
		}

		public void rol(AssemblerMemoryOperand dst, sbyte imm)
		{
			Code code;
			if (imm == 1)
			{
				if (dst.Size == MemoryOperandSize.Qword)
				{
					code = Code.Rol_rm64_1;
				}
				else if (dst.Size == MemoryOperandSize.Dword)
				{
					code = Code.Rol_rm32_1;
				}
				else if (dst.Size == MemoryOperandSize.Word)
				{
					code = Code.Rol_rm16_1;
				}
				else
				{
					if (dst.Size != MemoryOperandSize.Byte)
					{
						throw NoOpCodeFoundFor(Mnemonic.Rol, dst, imm);
					}
					code = Code.Rol_rm8_1;
				}
			}
			else if (dst.Size == MemoryOperandSize.Qword)
			{
				code = Code.Rol_rm64_imm8;
			}
			else if (dst.Size == MemoryOperandSize.Dword)
			{
				code = Code.Rol_rm32_imm8;
			}
			else if (dst.Size == MemoryOperandSize.Word)
			{
				code = Code.Rol_rm16_imm8;
			}
			else
			{
				if (dst.Size != MemoryOperandSize.Byte)
				{
					throw NoOpCodeFoundFor(Mnemonic.Rol, dst, imm);
				}
				code = Code.Rol_rm8_imm8;
			}
			Code code2 = code;
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, in memory, imm));
		}

		public void rol(AssemblerRegister8 dst, byte imm)
		{
			Code code = ((imm == 1) ? Code.Rol_rm8_1 : Code.Rol_rm8_imm8);
			AddInstruction(Instruction.Create(code, (Register)dst, (uint)imm));
		}

		public void rol(AssemblerRegister16 dst, byte imm)
		{
			Code code = ((imm == 1) ? Code.Rol_rm16_1 : Code.Rol_rm16_imm8);
			AddInstruction(Instruction.Create(code, (Register)dst, (uint)imm));
		}

		public void rol(AssemblerRegister32 dst, byte imm)
		{
			Code code = ((imm == 1) ? Code.Rol_rm32_1 : Code.Rol_rm32_imm8);
			AddInstruction(Instruction.Create(code, (Register)dst, (uint)imm));
		}

		public void rol(AssemblerRegister64 dst, byte imm)
		{
			Code code = ((imm == 1) ? Code.Rol_rm64_1 : Code.Rol_rm64_imm8);
			AddInstruction(Instruction.Create(code, (Register)dst, (uint)imm));
		}

		public void rol(AssemblerMemoryOperand dst, byte imm)
		{
			Code code;
			if (imm == 1)
			{
				if (dst.Size == MemoryOperandSize.Qword)
				{
					code = Code.Rol_rm64_1;
				}
				else if (dst.Size == MemoryOperandSize.Dword)
				{
					code = Code.Rol_rm32_1;
				}
				else if (dst.Size == MemoryOperandSize.Word)
				{
					code = Code.Rol_rm16_1;
				}
				else
				{
					if (dst.Size != MemoryOperandSize.Byte)
					{
						throw NoOpCodeFoundFor(Mnemonic.Rol, dst, imm);
					}
					code = Code.Rol_rm8_1;
				}
			}
			else if (dst.Size == MemoryOperandSize.Qword)
			{
				code = Code.Rol_rm64_imm8;
			}
			else if (dst.Size == MemoryOperandSize.Dword)
			{
				code = Code.Rol_rm32_imm8;
			}
			else if (dst.Size == MemoryOperandSize.Word)
			{
				code = Code.Rol_rm16_imm8;
			}
			else
			{
				if (dst.Size != MemoryOperandSize.Byte)
				{
					throw NoOpCodeFoundFor(Mnemonic.Rol, dst, imm);
				}
				code = Code.Rol_rm8_imm8;
			}
			Code code2 = code;
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, in memory, (uint)imm));
		}

		public void ror(AssemblerRegister8 dst, AssemblerRegister8 src)
		{
			AddInstruction(Instruction.Create(Code.Ror_rm8_CL, dst, src));
		}

		public void ror(AssemblerRegister16 dst, AssemblerRegister8 src)
		{
			AddInstruction(Instruction.Create(Code.Ror_rm16_CL, dst, src));
		}

		public void ror(AssemblerRegister32 dst, AssemblerRegister8 src)
		{
			AddInstruction(Instruction.Create(Code.Ror_rm32_CL, dst, src));
		}

		public void ror(AssemblerRegister64 dst, AssemblerRegister8 src)
		{
			AddInstruction(Instruction.Create(Code.Ror_rm64_CL, dst, src));
		}

		public void ror(AssemblerMemoryOperand dst, AssemblerRegister8 src)
		{
			Code code;
			if (dst.Size == MemoryOperandSize.Qword)
			{
				code = Code.Ror_rm64_CL;
			}
			else if (dst.Size == MemoryOperandSize.Dword)
			{
				code = Code.Ror_rm32_CL;
			}
			else if (dst.Size == MemoryOperandSize.Word)
			{
				code = Code.Ror_rm16_CL;
			}
			else
			{
				if (dst.Size != MemoryOperandSize.Byte)
				{
					throw NoOpCodeFoundFor(Mnemonic.Ror, dst, src);
				}
				code = Code.Ror_rm8_CL;
			}
			Code code2 = code;
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, in memory, src));
		}

		public void ror(AssemblerRegister8 dst, sbyte imm)
		{
			Code code = ((imm == 1) ? Code.Ror_rm8_1 : Code.Ror_rm8_imm8);
			AddInstruction(Instruction.Create(code, dst, imm));
		}

		public void ror(AssemblerRegister16 dst, sbyte imm)
		{
			Code code = ((imm == 1) ? Code.Ror_rm16_1 : Code.Ror_rm16_imm8);
			AddInstruction(Instruction.Create(code, dst, imm));
		}

		public void ror(AssemblerRegister32 dst, sbyte imm)
		{
			Code code = ((imm == 1) ? Code.Ror_rm32_1 : Code.Ror_rm32_imm8);
			AddInstruction(Instruction.Create(code, dst, imm));
		}

		public void ror(AssemblerRegister64 dst, sbyte imm)
		{
			Code code = ((imm == 1) ? Code.Ror_rm64_1 : Code.Ror_rm64_imm8);
			AddInstruction(Instruction.Create(code, dst, imm));
		}

		public void ror(AssemblerMemoryOperand dst, sbyte imm)
		{
			Code code;
			if (imm == 1)
			{
				if (dst.Size == MemoryOperandSize.Qword)
				{
					code = Code.Ror_rm64_1;
				}
				else if (dst.Size == MemoryOperandSize.Dword)
				{
					code = Code.Ror_rm32_1;
				}
				else if (dst.Size == MemoryOperandSize.Word)
				{
					code = Code.Ror_rm16_1;
				}
				else
				{
					if (dst.Size != MemoryOperandSize.Byte)
					{
						throw NoOpCodeFoundFor(Mnemonic.Ror, dst, imm);
					}
					code = Code.Ror_rm8_1;
				}
			}
			else if (dst.Size == MemoryOperandSize.Qword)
			{
				code = Code.Ror_rm64_imm8;
			}
			else if (dst.Size == MemoryOperandSize.Dword)
			{
				code = Code.Ror_rm32_imm8;
			}
			else if (dst.Size == MemoryOperandSize.Word)
			{
				code = Code.Ror_rm16_imm8;
			}
			else
			{
				if (dst.Size != MemoryOperandSize.Byte)
				{
					throw NoOpCodeFoundFor(Mnemonic.Ror, dst, imm);
				}
				code = Code.Ror_rm8_imm8;
			}
			Code code2 = code;
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, in memory, imm));
		}

		public void ror(AssemblerRegister8 dst, byte imm)
		{
			Code code = ((imm == 1) ? Code.Ror_rm8_1 : Code.Ror_rm8_imm8);
			AddInstruction(Instruction.Create(code, (Register)dst, (uint)imm));
		}

		public void ror(AssemblerRegister16 dst, byte imm)
		{
			Code code = ((imm == 1) ? Code.Ror_rm16_1 : Code.Ror_rm16_imm8);
			AddInstruction(Instruction.Create(code, (Register)dst, (uint)imm));
		}

		public void ror(AssemblerRegister32 dst, byte imm)
		{
			Code code = ((imm == 1) ? Code.Ror_rm32_1 : Code.Ror_rm32_imm8);
			AddInstruction(Instruction.Create(code, (Register)dst, (uint)imm));
		}

		public void ror(AssemblerRegister64 dst, byte imm)
		{
			Code code = ((imm == 1) ? Code.Ror_rm64_1 : Code.Ror_rm64_imm8);
			AddInstruction(Instruction.Create(code, (Register)dst, (uint)imm));
		}

		public void ror(AssemblerMemoryOperand dst, byte imm)
		{
			Code code;
			if (imm == 1)
			{
				if (dst.Size == MemoryOperandSize.Qword)
				{
					code = Code.Ror_rm64_1;
				}
				else if (dst.Size == MemoryOperandSize.Dword)
				{
					code = Code.Ror_rm32_1;
				}
				else if (dst.Size == MemoryOperandSize.Word)
				{
					code = Code.Ror_rm16_1;
				}
				else
				{
					if (dst.Size != MemoryOperandSize.Byte)
					{
						throw NoOpCodeFoundFor(Mnemonic.Ror, dst, imm);
					}
					code = Code.Ror_rm8_1;
				}
			}
			else if (dst.Size == MemoryOperandSize.Qword)
			{
				code = Code.Ror_rm64_imm8;
			}
			else if (dst.Size == MemoryOperandSize.Dword)
			{
				code = Code.Ror_rm32_imm8;
			}
			else if (dst.Size == MemoryOperandSize.Word)
			{
				code = Code.Ror_rm16_imm8;
			}
			else
			{
				if (dst.Size != MemoryOperandSize.Byte)
				{
					throw NoOpCodeFoundFor(Mnemonic.Ror, dst, imm);
				}
				code = Code.Ror_rm8_imm8;
			}
			Code code2 = code;
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, in memory, (uint)imm));
		}

		public void rorx(AssemblerRegister32 dst, AssemblerRegister32 src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.VEX_Rorx_r32_rm32_imm8, dst, src1, imm));
		}

		public void rorx(AssemblerRegister64 dst, AssemblerRegister64 src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.VEX_Rorx_r64_rm64_imm8, dst, src1, imm));
		}

		public void rorx(AssemblerRegister32 dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Rorx_r32_rm32_imm8, register, in memory, imm));
		}

		public void rorx(AssemblerRegister64 dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Rorx_r64_rm64_imm8, register, in memory, imm));
		}

		public void rorx(AssemblerRegister32 dst, AssemblerRegister32 src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.VEX_Rorx_r32_rm32_imm8, (Register)dst, (Register)src1, (uint)imm));
		}

		public void rorx(AssemblerRegister64 dst, AssemblerRegister64 src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.VEX_Rorx_r64_rm64_imm8, (Register)dst, (Register)src1, (uint)imm));
		}

		public void rorx(AssemblerRegister32 dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Rorx_r32_rm32_imm8, register, in memory, (uint)imm));
		}

		public void rorx(AssemblerRegister64 dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Rorx_r64_rm64_imm8, register, in memory, (uint)imm));
		}

		public void roundpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.Roundpd_xmm_xmmm128_imm8, dst, src1, imm));
		}

		public void roundpd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Roundpd_xmm_xmmm128_imm8, register, in memory, imm));
		}

		public void roundpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.Roundpd_xmm_xmmm128_imm8, (Register)dst, (Register)src1, (uint)imm));
		}

		public void roundpd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Roundpd_xmm_xmmm128_imm8, register, in memory, (uint)imm));
		}

		public void roundps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.Roundps_xmm_xmmm128_imm8, dst, src1, imm));
		}

		public void roundps(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Roundps_xmm_xmmm128_imm8, register, in memory, imm));
		}

		public void roundps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.Roundps_xmm_xmmm128_imm8, (Register)dst, (Register)src1, (uint)imm));
		}

		public void roundps(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Roundps_xmm_xmmm128_imm8, register, in memory, (uint)imm));
		}

		public void roundsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.Roundsd_xmm_xmmm64_imm8, dst, src1, imm));
		}

		public void roundsd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Roundsd_xmm_xmmm64_imm8, register, in memory, imm));
		}

		public void roundsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.Roundsd_xmm_xmmm64_imm8, (Register)dst, (Register)src1, (uint)imm));
		}

		public void roundsd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Roundsd_xmm_xmmm64_imm8, register, in memory, (uint)imm));
		}

		public void roundss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.Roundss_xmm_xmmm32_imm8, dst, src1, imm));
		}

		public void roundss(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Roundss_xmm_xmmm32_imm8, register, in memory, imm));
		}

		public void roundss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.Roundss_xmm_xmmm32_imm8, (Register)dst, (Register)src1, (uint)imm));
		}

		public void roundss(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Roundss_xmm_xmmm32_imm8, register, in memory, (uint)imm));
		}

		public void rsdc(AssemblerRegisterSegment dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Rsdc_Sreg_m80, register, in memory));
		}

		public void rsldt(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Rsldt_m80, in memory));
		}

		public void rsm()
		{
			AddInstruction(Instruction.Create(Code.Rsm));
		}

		public void rsqrtps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Rsqrtps_xmm_xmmm128, dst, src));
		}

		public void rsqrtps(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Rsqrtps_xmm_xmmm128, register, in memory));
		}

		public void rsqrtss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Rsqrtss_xmm_xmmm32, dst, src));
		}

		public void rsqrtss(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Rsqrtss_xmm_xmmm32, register, in memory));
		}

		public void rstorssp(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Rstorssp_m64, in memory));
		}

		public void rsts(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Rsts_m80, in memory));
		}

		public void sahf()
		{
			AddInstruction(Instruction.Create(Code.Sahf));
		}

		public void sal(AssemblerRegister8 dst, AssemblerRegister8 src)
		{
			AddInstruction(Instruction.Create(Code.Sal_rm8_CL, dst, src));
		}

		public void sal(AssemblerRegister16 dst, AssemblerRegister8 src)
		{
			AddInstruction(Instruction.Create(Code.Sal_rm16_CL, dst, src));
		}

		public void sal(AssemblerRegister32 dst, AssemblerRegister8 src)
		{
			AddInstruction(Instruction.Create(Code.Sal_rm32_CL, dst, src));
		}

		public void sal(AssemblerRegister64 dst, AssemblerRegister8 src)
		{
			AddInstruction(Instruction.Create(Code.Sal_rm64_CL, dst, src));
		}

		public void sal(AssemblerMemoryOperand dst, AssemblerRegister8 src)
		{
			Code code;
			if (dst.Size == MemoryOperandSize.Qword)
			{
				code = Code.Sal_rm64_CL;
			}
			else if (dst.Size == MemoryOperandSize.Dword)
			{
				code = Code.Sal_rm32_CL;
			}
			else if (dst.Size == MemoryOperandSize.Word)
			{
				code = Code.Sal_rm16_CL;
			}
			else
			{
				if (dst.Size != MemoryOperandSize.Byte)
				{
					throw NoOpCodeFoundFor(Mnemonic.Sal, dst, src);
				}
				code = Code.Sal_rm8_CL;
			}
			Code code2 = code;
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, in memory, src));
		}

		public void sal(AssemblerRegister8 dst, sbyte imm)
		{
			Code code = ((imm == 1) ? Code.Sal_rm8_1 : Code.Sal_rm8_imm8);
			AddInstruction(Instruction.Create(code, dst, imm));
		}

		public void sal(AssemblerRegister16 dst, sbyte imm)
		{
			Code code = ((imm == 1) ? Code.Sal_rm16_1 : Code.Sal_rm16_imm8);
			AddInstruction(Instruction.Create(code, dst, imm));
		}

		public void sal(AssemblerRegister32 dst, sbyte imm)
		{
			Code code = ((imm == 1) ? Code.Sal_rm32_1 : Code.Sal_rm32_imm8);
			AddInstruction(Instruction.Create(code, dst, imm));
		}

		public void sal(AssemblerRegister64 dst, sbyte imm)
		{
			Code code = ((imm == 1) ? Code.Sal_rm64_1 : Code.Sal_rm64_imm8);
			AddInstruction(Instruction.Create(code, dst, imm));
		}

		public void sal(AssemblerMemoryOperand dst, sbyte imm)
		{
			Code code;
			if (imm == 1)
			{
				if (dst.Size == MemoryOperandSize.Qword)
				{
					code = Code.Sal_rm64_1;
				}
				else if (dst.Size == MemoryOperandSize.Dword)
				{
					code = Code.Sal_rm32_1;
				}
				else if (dst.Size == MemoryOperandSize.Word)
				{
					code = Code.Sal_rm16_1;
				}
				else
				{
					if (dst.Size != MemoryOperandSize.Byte)
					{
						throw NoOpCodeFoundFor(Mnemonic.Sal, dst, imm);
					}
					code = Code.Sal_rm8_1;
				}
			}
			else if (dst.Size == MemoryOperandSize.Qword)
			{
				code = Code.Sal_rm64_imm8;
			}
			else if (dst.Size == MemoryOperandSize.Dword)
			{
				code = Code.Sal_rm32_imm8;
			}
			else if (dst.Size == MemoryOperandSize.Word)
			{
				code = Code.Sal_rm16_imm8;
			}
			else
			{
				if (dst.Size != MemoryOperandSize.Byte)
				{
					throw NoOpCodeFoundFor(Mnemonic.Sal, dst, imm);
				}
				code = Code.Sal_rm8_imm8;
			}
			Code code2 = code;
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, in memory, imm));
		}

		public void sal(AssemblerRegister8 dst, byte imm)
		{
			Code code = ((imm == 1) ? Code.Sal_rm8_1 : Code.Sal_rm8_imm8);
			AddInstruction(Instruction.Create(code, (Register)dst, (uint)imm));
		}

		public void sal(AssemblerRegister16 dst, byte imm)
		{
			Code code = ((imm == 1) ? Code.Sal_rm16_1 : Code.Sal_rm16_imm8);
			AddInstruction(Instruction.Create(code, (Register)dst, (uint)imm));
		}

		public void sal(AssemblerRegister32 dst, byte imm)
		{
			Code code = ((imm == 1) ? Code.Sal_rm32_1 : Code.Sal_rm32_imm8);
			AddInstruction(Instruction.Create(code, (Register)dst, (uint)imm));
		}

		public void sal(AssemblerRegister64 dst, byte imm)
		{
			Code code = ((imm == 1) ? Code.Sal_rm64_1 : Code.Sal_rm64_imm8);
			AddInstruction(Instruction.Create(code, (Register)dst, (uint)imm));
		}

		public void sal(AssemblerMemoryOperand dst, byte imm)
		{
			Code code;
			if (imm == 1)
			{
				if (dst.Size == MemoryOperandSize.Qword)
				{
					code = Code.Sal_rm64_1;
				}
				else if (dst.Size == MemoryOperandSize.Dword)
				{
					code = Code.Sal_rm32_1;
				}
				else if (dst.Size == MemoryOperandSize.Word)
				{
					code = Code.Sal_rm16_1;
				}
				else
				{
					if (dst.Size != MemoryOperandSize.Byte)
					{
						throw NoOpCodeFoundFor(Mnemonic.Sal, dst, imm);
					}
					code = Code.Sal_rm8_1;
				}
			}
			else if (dst.Size == MemoryOperandSize.Qword)
			{
				code = Code.Sal_rm64_imm8;
			}
			else if (dst.Size == MemoryOperandSize.Dword)
			{
				code = Code.Sal_rm32_imm8;
			}
			else if (dst.Size == MemoryOperandSize.Word)
			{
				code = Code.Sal_rm16_imm8;
			}
			else
			{
				if (dst.Size != MemoryOperandSize.Byte)
				{
					throw NoOpCodeFoundFor(Mnemonic.Sal, dst, imm);
				}
				code = Code.Sal_rm8_imm8;
			}
			Code code2 = code;
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, in memory, (uint)imm));
		}

		public void salc()
		{
			AddInstruction(Instruction.Create(Code.Salc));
		}

		public void sar(AssemblerRegister8 dst, AssemblerRegister8 src)
		{
			AddInstruction(Instruction.Create(Code.Sar_rm8_CL, dst, src));
		}

		public void sar(AssemblerRegister16 dst, AssemblerRegister8 src)
		{
			AddInstruction(Instruction.Create(Code.Sar_rm16_CL, dst, src));
		}

		public void sar(AssemblerRegister32 dst, AssemblerRegister8 src)
		{
			AddInstruction(Instruction.Create(Code.Sar_rm32_CL, dst, src));
		}

		public void sar(AssemblerRegister64 dst, AssemblerRegister8 src)
		{
			AddInstruction(Instruction.Create(Code.Sar_rm64_CL, dst, src));
		}

		public void sar(AssemblerMemoryOperand dst, AssemblerRegister8 src)
		{
			Code code;
			if (dst.Size == MemoryOperandSize.Qword)
			{
				code = Code.Sar_rm64_CL;
			}
			else if (dst.Size == MemoryOperandSize.Dword)
			{
				code = Code.Sar_rm32_CL;
			}
			else if (dst.Size == MemoryOperandSize.Word)
			{
				code = Code.Sar_rm16_CL;
			}
			else
			{
				if (dst.Size != MemoryOperandSize.Byte)
				{
					throw NoOpCodeFoundFor(Mnemonic.Sar, dst, src);
				}
				code = Code.Sar_rm8_CL;
			}
			Code code2 = code;
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, in memory, src));
		}

		public void sar(AssemblerRegister8 dst, sbyte imm)
		{
			Code code = ((imm == 1) ? Code.Sar_rm8_1 : Code.Sar_rm8_imm8);
			AddInstruction(Instruction.Create(code, dst, imm));
		}

		public void sar(AssemblerRegister16 dst, sbyte imm)
		{
			Code code = ((imm == 1) ? Code.Sar_rm16_1 : Code.Sar_rm16_imm8);
			AddInstruction(Instruction.Create(code, dst, imm));
		}

		public void sar(AssemblerRegister32 dst, sbyte imm)
		{
			Code code = ((imm == 1) ? Code.Sar_rm32_1 : Code.Sar_rm32_imm8);
			AddInstruction(Instruction.Create(code, dst, imm));
		}

		public void sar(AssemblerRegister64 dst, sbyte imm)
		{
			Code code = ((imm == 1) ? Code.Sar_rm64_1 : Code.Sar_rm64_imm8);
			AddInstruction(Instruction.Create(code, dst, imm));
		}

		public void sar(AssemblerMemoryOperand dst, sbyte imm)
		{
			Code code;
			if (imm == 1)
			{
				if (dst.Size == MemoryOperandSize.Qword)
				{
					code = Code.Sar_rm64_1;
				}
				else if (dst.Size == MemoryOperandSize.Dword)
				{
					code = Code.Sar_rm32_1;
				}
				else if (dst.Size == MemoryOperandSize.Word)
				{
					code = Code.Sar_rm16_1;
				}
				else
				{
					if (dst.Size != MemoryOperandSize.Byte)
					{
						throw NoOpCodeFoundFor(Mnemonic.Sar, dst, imm);
					}
					code = Code.Sar_rm8_1;
				}
			}
			else if (dst.Size == MemoryOperandSize.Qword)
			{
				code = Code.Sar_rm64_imm8;
			}
			else if (dst.Size == MemoryOperandSize.Dword)
			{
				code = Code.Sar_rm32_imm8;
			}
			else if (dst.Size == MemoryOperandSize.Word)
			{
				code = Code.Sar_rm16_imm8;
			}
			else
			{
				if (dst.Size != MemoryOperandSize.Byte)
				{
					throw NoOpCodeFoundFor(Mnemonic.Sar, dst, imm);
				}
				code = Code.Sar_rm8_imm8;
			}
			Code code2 = code;
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, in memory, imm));
		}

		public void sar(AssemblerRegister8 dst, byte imm)
		{
			Code code = ((imm == 1) ? Code.Sar_rm8_1 : Code.Sar_rm8_imm8);
			AddInstruction(Instruction.Create(code, (Register)dst, (uint)imm));
		}

		public void sar(AssemblerRegister16 dst, byte imm)
		{
			Code code = ((imm == 1) ? Code.Sar_rm16_1 : Code.Sar_rm16_imm8);
			AddInstruction(Instruction.Create(code, (Register)dst, (uint)imm));
		}

		public void sar(AssemblerRegister32 dst, byte imm)
		{
			Code code = ((imm == 1) ? Code.Sar_rm32_1 : Code.Sar_rm32_imm8);
			AddInstruction(Instruction.Create(code, (Register)dst, (uint)imm));
		}

		public void sar(AssemblerRegister64 dst, byte imm)
		{
			Code code = ((imm == 1) ? Code.Sar_rm64_1 : Code.Sar_rm64_imm8);
			AddInstruction(Instruction.Create(code, (Register)dst, (uint)imm));
		}

		public void sar(AssemblerMemoryOperand dst, byte imm)
		{
			Code code;
			if (imm == 1)
			{
				if (dst.Size == MemoryOperandSize.Qword)
				{
					code = Code.Sar_rm64_1;
				}
				else if (dst.Size == MemoryOperandSize.Dword)
				{
					code = Code.Sar_rm32_1;
				}
				else if (dst.Size == MemoryOperandSize.Word)
				{
					code = Code.Sar_rm16_1;
				}
				else
				{
					if (dst.Size != MemoryOperandSize.Byte)
					{
						throw NoOpCodeFoundFor(Mnemonic.Sar, dst, imm);
					}
					code = Code.Sar_rm8_1;
				}
			}
			else if (dst.Size == MemoryOperandSize.Qword)
			{
				code = Code.Sar_rm64_imm8;
			}
			else if (dst.Size == MemoryOperandSize.Dword)
			{
				code = Code.Sar_rm32_imm8;
			}
			else if (dst.Size == MemoryOperandSize.Word)
			{
				code = Code.Sar_rm16_imm8;
			}
			else
			{
				if (dst.Size != MemoryOperandSize.Byte)
				{
					throw NoOpCodeFoundFor(Mnemonic.Sar, dst, imm);
				}
				code = Code.Sar_rm8_imm8;
			}
			Code code2 = code;
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, in memory, (uint)imm));
		}

		public void sarx(AssemblerRegister32 dst, AssemblerRegister32 src1, AssemblerRegister32 src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Sarx_r32_rm32_r32, dst, src1, src2));
		}

		public void sarx(AssemblerRegister32 dst, AssemblerMemoryOperand src1, AssemblerRegister32 src2)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Sarx_r32_rm32_r32, register, in memory, src2));
		}

		public void sarx(AssemblerRegister64 dst, AssemblerRegister64 src1, AssemblerRegister64 src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Sarx_r64_rm64_r64, dst, src1, src2));
		}

		public void sarx(AssemblerRegister64 dst, AssemblerMemoryOperand src1, AssemblerRegister64 src2)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Sarx_r64_rm64_r64, register, in memory, src2));
		}

		public void saveprevssp()
		{
			AddInstruction(Instruction.Create(Code.Saveprevssp));
		}

		public void sbb(AssemblerRegister8 dst, AssemblerRegister8 src)
		{
			AddInstruction(Instruction.Create(Code.Sbb_rm8_r8, dst, src));
		}

		public void sbb(AssemblerMemoryOperand dst, AssemblerRegister8 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Sbb_rm8_r8, in memory, src));
		}

		public void sbb(AssemblerRegister16 dst, AssemblerRegister16 src)
		{
			AddInstruction(Instruction.Create(Code.Sbb_rm16_r16, dst, src));
		}

		public void sbb(AssemblerMemoryOperand dst, AssemblerRegister16 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Sbb_rm16_r16, in memory, src));
		}

		public void sbb(AssemblerRegister32 dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.Sbb_rm32_r32, dst, src));
		}

		public void sbb(AssemblerMemoryOperand dst, AssemblerRegister32 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Sbb_rm32_r32, in memory, src));
		}

		public void sbb(AssemblerRegister64 dst, AssemblerRegister64 src)
		{
			AddInstruction(Instruction.Create(Code.Sbb_rm64_r64, dst, src));
		}

		public void sbb(AssemblerMemoryOperand dst, AssemblerRegister64 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Sbb_rm64_r64, in memory, src));
		}

		public void sbb(AssemblerRegister8 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Sbb_r8_rm8, register, in memory));
		}

		public void sbb(AssemblerRegister16 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Sbb_r16_rm16, register, in memory));
		}

		public void sbb(AssemblerRegister32 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Sbb_r32_rm32, register, in memory));
		}

		public void sbb(AssemblerRegister64 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Sbb_r64_rm64, register, in memory));
		}

		public void sbb(AssemblerRegister8 dst, sbyte imm)
		{
			Code code = (((Register)dst == Register.AL) ? Code.Sbb_AL_imm8 : Code.Sbb_rm8_imm8);
			AddInstruction(Instruction.Create(code, dst, imm));
		}

		public void sbb(AssemblerRegister16 dst, short imm)
		{
			Code code = (((Register)dst != Register.AX) ? ((imm >= -128 && imm <= 127) ? Code.Sbb_rm16_imm8 : Code.Sbb_rm16_imm16) : Code.Sbb_AX_imm16);
			AddInstruction(Instruction.Create(code, dst, imm));
		}

		public void sbb(AssemblerRegister32 dst, int imm)
		{
			Code code = (((Register)dst != Register.EAX) ? ((imm >= -128 && imm <= 127) ? Code.Sbb_rm32_imm8 : Code.Sbb_rm32_imm32) : Code.Sbb_EAX_imm32);
			AddInstruction(Instruction.Create(code, dst, imm));
		}

		public void sbb(AssemblerRegister64 dst, int imm)
		{
			Code code = (((Register)dst != Register.RAX) ? ((imm >= -128 && imm <= 127) ? Code.Sbb_rm64_imm8 : Code.Sbb_rm64_imm32) : Code.Sbb_RAX_imm32);
			AddInstruction(Instruction.Create(code, dst, imm));
		}

		public void sbb(AssemblerMemoryOperand dst, int imm)
		{
			Code code;
			if (dst.Size == MemoryOperandSize.Qword)
			{
				code = ((imm >= -128 && imm <= 127) ? Code.Sbb_rm64_imm8 : Code.Sbb_rm64_imm32);
			}
			else if (dst.Size == MemoryOperandSize.Dword)
			{
				code = ((imm >= -128 && imm <= 127) ? Code.Sbb_rm32_imm8 : Code.Sbb_rm32_imm32);
			}
			else if (dst.Size == MemoryOperandSize.Word)
			{
				code = ((imm >= -128 && imm <= 127) ? Code.Sbb_rm16_imm8 : Code.Sbb_rm16_imm16);
			}
			else
			{
				if (dst.Size != MemoryOperandSize.Byte)
				{
					throw NoOpCodeFoundFor(Mnemonic.Sbb, dst, imm);
				}
				code = Code.Sbb_rm8_imm8;
			}
			Code code2 = code;
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, in memory, imm));
		}

		public void sbb(AssemblerRegister8 dst, byte imm)
		{
			Code code = (((Register)dst == Register.AL) ? Code.Sbb_AL_imm8 : Code.Sbb_rm8_imm8);
			AddInstruction(Instruction.Create(code, (Register)dst, (uint)imm));
		}

		public void sbb(AssemblerRegister16 dst, ushort imm)
		{
			Code code = (((Register)dst != Register.AX) ? ((imm <= 127 || (65408 <= imm && imm <= ushort.MaxValue)) ? Code.Sbb_rm16_imm8 : Code.Sbb_rm16_imm16) : Code.Sbb_AX_imm16);
			AddInstruction(Instruction.Create(code, (Register)dst, (uint)imm));
		}

		public void sbb(AssemblerRegister32 dst, uint imm)
		{
			Code code = (((Register)dst != Register.EAX) ? ((imm <= 127 || 4294967168u <= imm) ? Code.Sbb_rm32_imm8 : Code.Sbb_rm32_imm32) : Code.Sbb_EAX_imm32);
			AddInstruction(Instruction.Create(code, dst, imm));
		}

		public void sbb(AssemblerMemoryOperand dst, uint imm)
		{
			Code code;
			if (dst.Size == MemoryOperandSize.Dword)
			{
				code = ((imm <= 127 || 4294967168u <= imm) ? Code.Sbb_rm32_imm8 : Code.Sbb_rm32_imm32);
			}
			else if (dst.Size == MemoryOperandSize.Word)
			{
				code = ((imm <= 127 || (65408 <= imm && imm <= 65535)) ? Code.Sbb_rm16_imm8 : Code.Sbb_rm16_imm16);
			}
			else
			{
				if (dst.Size != MemoryOperandSize.Byte)
				{
					throw NoOpCodeFoundFor(Mnemonic.Sbb, dst, imm);
				}
				code = Code.Sbb_rm8_imm8;
			}
			Code code2 = code;
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, in memory, imm));
		}

		public void scasb()
		{
			AddInstruction(Instruction.CreateScasb(Bitness));
		}

		public void scasd()
		{
			AddInstruction(Instruction.CreateScasd(Bitness));
		}

		public void scasq()
		{
			AddInstruction(Instruction.CreateScasq(Bitness));
		}

		public void scasw()
		{
			AddInstruction(Instruction.CreateScasw(Bitness));
		}

		public void seamcall()
		{
			AddInstruction(Instruction.Create(Code.Seamcall));
		}

		public void seamops()
		{
			AddInstruction(Instruction.Create(Code.Seamops));
		}

		public void seamret()
		{
			AddInstruction(Instruction.Create(Code.Seamret));
		}

		public void senduipi(AssemblerRegister64 dst)
		{
			AddInstruction(Instruction.Create(Code.Senduipi_r64, dst));
		}

		public void serialize()
		{
			AddInstruction(Instruction.Create(Code.Serialize));
		}

		public void seta(AssemblerRegister8 dst)
		{
			AddInstruction(Instruction.Create(Code.Seta_rm8, dst));
		}

		public void seta(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Seta_rm8, in memory));
		}

		public void setae(AssemblerRegister8 dst)
		{
			AddInstruction(Instruction.Create(Code.Setae_rm8, dst));
		}

		public void setae(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Setae_rm8, in memory));
		}

		public void setb(AssemblerRegister8 dst)
		{
			AddInstruction(Instruction.Create(Code.Setb_rm8, dst));
		}

		public void setb(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Setb_rm8, in memory));
		}

		public void setbe(AssemblerRegister8 dst)
		{
			AddInstruction(Instruction.Create(Code.Setbe_rm8, dst));
		}

		public void setbe(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Setbe_rm8, in memory));
		}

		public void setc(AssemblerRegister8 dst)
		{
			AddInstruction(Instruction.Create(Code.Setb_rm8, dst));
		}

		public void setc(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Setb_rm8, in memory));
		}

		public void sete(AssemblerRegister8 dst)
		{
			AddInstruction(Instruction.Create(Code.Sete_rm8, dst));
		}

		public void sete(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Sete_rm8, in memory));
		}

		public void setg(AssemblerRegister8 dst)
		{
			AddInstruction(Instruction.Create(Code.Setg_rm8, dst));
		}

		public void setg(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Setg_rm8, in memory));
		}

		public void setge(AssemblerRegister8 dst)
		{
			AddInstruction(Instruction.Create(Code.Setge_rm8, dst));
		}

		public void setge(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Setge_rm8, in memory));
		}

		public void setl(AssemblerRegister8 dst)
		{
			AddInstruction(Instruction.Create(Code.Setl_rm8, dst));
		}

		public void setl(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Setl_rm8, in memory));
		}

		public void setle(AssemblerRegister8 dst)
		{
			AddInstruction(Instruction.Create(Code.Setle_rm8, dst));
		}

		public void setle(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Setle_rm8, in memory));
		}

		public void setna(AssemblerRegister8 dst)
		{
			AddInstruction(Instruction.Create(Code.Setbe_rm8, dst));
		}

		public void setna(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Setbe_rm8, in memory));
		}

		public void setnae(AssemblerRegister8 dst)
		{
			AddInstruction(Instruction.Create(Code.Setb_rm8, dst));
		}

		public void setnae(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Setb_rm8, in memory));
		}

		public void setnb(AssemblerRegister8 dst)
		{
			AddInstruction(Instruction.Create(Code.Setae_rm8, dst));
		}

		public void setnb(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Setae_rm8, in memory));
		}

		public void setnbe(AssemblerRegister8 dst)
		{
			AddInstruction(Instruction.Create(Code.Seta_rm8, dst));
		}

		public void setnbe(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Seta_rm8, in memory));
		}

		public void setnc(AssemblerRegister8 dst)
		{
			AddInstruction(Instruction.Create(Code.Setae_rm8, dst));
		}

		public void setnc(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Setae_rm8, in memory));
		}

		public void setne(AssemblerRegister8 dst)
		{
			AddInstruction(Instruction.Create(Code.Setne_rm8, dst));
		}

		public void setne(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Setne_rm8, in memory));
		}

		public void setng(AssemblerRegister8 dst)
		{
			AddInstruction(Instruction.Create(Code.Setle_rm8, dst));
		}

		public void setng(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Setle_rm8, in memory));
		}

		public void setnge(AssemblerRegister8 dst)
		{
			AddInstruction(Instruction.Create(Code.Setl_rm8, dst));
		}

		public void setnge(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Setl_rm8, in memory));
		}

		public void setnl(AssemblerRegister8 dst)
		{
			AddInstruction(Instruction.Create(Code.Setge_rm8, dst));
		}

		public void setnl(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Setge_rm8, in memory));
		}

		public void setnle(AssemblerRegister8 dst)
		{
			AddInstruction(Instruction.Create(Code.Setg_rm8, dst));
		}

		public void setnle(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Setg_rm8, in memory));
		}

		public void setno(AssemblerRegister8 dst)
		{
			AddInstruction(Instruction.Create(Code.Setno_rm8, dst));
		}

		public void setno(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Setno_rm8, in memory));
		}

		public void setnp(AssemblerRegister8 dst)
		{
			AddInstruction(Instruction.Create(Code.Setnp_rm8, dst));
		}

		public void setnp(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Setnp_rm8, in memory));
		}

		public void setns(AssemblerRegister8 dst)
		{
			AddInstruction(Instruction.Create(Code.Setns_rm8, dst));
		}

		public void setns(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Setns_rm8, in memory));
		}

		public void setnz(AssemblerRegister8 dst)
		{
			AddInstruction(Instruction.Create(Code.Setne_rm8, dst));
		}

		public void setnz(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Setne_rm8, in memory));
		}

		public void seto(AssemblerRegister8 dst)
		{
			AddInstruction(Instruction.Create(Code.Seto_rm8, dst));
		}

		public void seto(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Seto_rm8, in memory));
		}

		public void setp(AssemblerRegister8 dst)
		{
			AddInstruction(Instruction.Create(Code.Setp_rm8, dst));
		}

		public void setp(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Setp_rm8, in memory));
		}

		public void setpe(AssemblerRegister8 dst)
		{
			AddInstruction(Instruction.Create(Code.Setp_rm8, dst));
		}

		public void setpe(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Setp_rm8, in memory));
		}

		public void setpo(AssemblerRegister8 dst)
		{
			AddInstruction(Instruction.Create(Code.Setnp_rm8, dst));
		}

		public void setpo(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Setnp_rm8, in memory));
		}

		public void sets(AssemblerRegister8 dst)
		{
			AddInstruction(Instruction.Create(Code.Sets_rm8, dst));
		}

		public void sets(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Sets_rm8, in memory));
		}

		public void setssbsy()
		{
			AddInstruction(Instruction.Create(Code.Setssbsy));
		}

		public void setz(AssemblerRegister8 dst)
		{
			AddInstruction(Instruction.Create(Code.Sete_rm8, dst));
		}

		public void setz(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Sete_rm8, in memory));
		}

		public void sfence()
		{
			AddInstruction(Instruction.Create(Code.Sfence));
		}

		public void sgdt(AssemblerMemoryOperand dst)
		{
			Code code = ((Bitness != 64) ? ((Bitness >= 32) ? Code.Sgdt_m1632 : Code.Sgdt_m1632_16) : Code.Sgdt_m1664);
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, in memory));
		}

		public void sha1msg1(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Sha1msg1_xmm_xmmm128, dst, src));
		}

		public void sha1msg1(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Sha1msg1_xmm_xmmm128, register, in memory));
		}

		public void sha1msg2(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Sha1msg2_xmm_xmmm128, dst, src));
		}

		public void sha1msg2(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Sha1msg2_xmm_xmmm128, register, in memory));
		}

		public void sha1nexte(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Sha1nexte_xmm_xmmm128, dst, src));
		}

		public void sha1nexte(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Sha1nexte_xmm_xmmm128, register, in memory));
		}

		public void sha1rnds4(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.Sha1rnds4_xmm_xmmm128_imm8, dst, src1, imm));
		}

		public void sha1rnds4(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Sha1rnds4_xmm_xmmm128_imm8, register, in memory, imm));
		}

		public void sha1rnds4(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.Sha1rnds4_xmm_xmmm128_imm8, (Register)dst, (Register)src1, (uint)imm));
		}

		public void sha1rnds4(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Sha1rnds4_xmm_xmmm128_imm8, register, in memory, (uint)imm));
		}

		public void sha256msg1(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Sha256msg1_xmm_xmmm128, dst, src));
		}

		public void sha256msg1(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Sha256msg1_xmm_xmmm128, register, in memory));
		}

		public void sha256msg2(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Sha256msg2_xmm_xmmm128, dst, src));
		}

		public void sha256msg2(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Sha256msg2_xmm_xmmm128, register, in memory));
		}

		public void sha256rnds2(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Sha256rnds2_xmm_xmmm128, dst, src));
		}

		public void sha256rnds2(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Sha256rnds2_xmm_xmmm128, register, in memory));
		}

		public void shl(AssemblerRegister8 dst, AssemblerRegister8 src)
		{
			AddInstruction(Instruction.Create(Code.Shl_rm8_CL, dst, src));
		}

		public void shl(AssemblerRegister16 dst, AssemblerRegister8 src)
		{
			AddInstruction(Instruction.Create(Code.Shl_rm16_CL, dst, src));
		}

		public void shl(AssemblerRegister32 dst, AssemblerRegister8 src)
		{
			AddInstruction(Instruction.Create(Code.Shl_rm32_CL, dst, src));
		}

		public void shl(AssemblerRegister64 dst, AssemblerRegister8 src)
		{
			AddInstruction(Instruction.Create(Code.Shl_rm64_CL, dst, src));
		}

		public void shl(AssemblerMemoryOperand dst, AssemblerRegister8 src)
		{
			Code code;
			if (dst.Size == MemoryOperandSize.Qword)
			{
				code = Code.Shl_rm64_CL;
			}
			else if (dst.Size == MemoryOperandSize.Dword)
			{
				code = Code.Shl_rm32_CL;
			}
			else if (dst.Size == MemoryOperandSize.Word)
			{
				code = Code.Shl_rm16_CL;
			}
			else
			{
				if (dst.Size != MemoryOperandSize.Byte)
				{
					throw NoOpCodeFoundFor(Mnemonic.Shl, dst, src);
				}
				code = Code.Shl_rm8_CL;
			}
			Code code2 = code;
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, in memory, src));
		}

		public void shl(AssemblerRegister8 dst, sbyte imm)
		{
			Code code = ((imm == 1) ? Code.Shl_rm8_1 : Code.Shl_rm8_imm8);
			AddInstruction(Instruction.Create(code, dst, imm));
		}

		public void shl(AssemblerRegister16 dst, sbyte imm)
		{
			Code code = ((imm == 1) ? Code.Shl_rm16_1 : Code.Shl_rm16_imm8);
			AddInstruction(Instruction.Create(code, dst, imm));
		}

		public void shl(AssemblerRegister32 dst, sbyte imm)
		{
			Code code = ((imm == 1) ? Code.Shl_rm32_1 : Code.Shl_rm32_imm8);
			AddInstruction(Instruction.Create(code, dst, imm));
		}

		public void shl(AssemblerRegister64 dst, sbyte imm)
		{
			Code code = ((imm == 1) ? Code.Shl_rm64_1 : Code.Shl_rm64_imm8);
			AddInstruction(Instruction.Create(code, dst, imm));
		}

		public void shl(AssemblerMemoryOperand dst, sbyte imm)
		{
			Code code;
			if (imm == 1)
			{
				if (dst.Size == MemoryOperandSize.Qword)
				{
					code = Code.Shl_rm64_1;
				}
				else if (dst.Size == MemoryOperandSize.Dword)
				{
					code = Code.Shl_rm32_1;
				}
				else if (dst.Size == MemoryOperandSize.Word)
				{
					code = Code.Shl_rm16_1;
				}
				else
				{
					if (dst.Size != MemoryOperandSize.Byte)
					{
						throw NoOpCodeFoundFor(Mnemonic.Shl, dst, imm);
					}
					code = Code.Shl_rm8_1;
				}
			}
			else if (dst.Size == MemoryOperandSize.Qword)
			{
				code = Code.Shl_rm64_imm8;
			}
			else if (dst.Size == MemoryOperandSize.Dword)
			{
				code = Code.Shl_rm32_imm8;
			}
			else if (dst.Size == MemoryOperandSize.Word)
			{
				code = Code.Shl_rm16_imm8;
			}
			else
			{
				if (dst.Size != MemoryOperandSize.Byte)
				{
					throw NoOpCodeFoundFor(Mnemonic.Shl, dst, imm);
				}
				code = Code.Shl_rm8_imm8;
			}
			Code code2 = code;
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, in memory, imm));
		}

		public void shl(AssemblerRegister8 dst, byte imm)
		{
			Code code = ((imm == 1) ? Code.Shl_rm8_1 : Code.Shl_rm8_imm8);
			AddInstruction(Instruction.Create(code, (Register)dst, (uint)imm));
		}

		public void shl(AssemblerRegister16 dst, byte imm)
		{
			Code code = ((imm == 1) ? Code.Shl_rm16_1 : Code.Shl_rm16_imm8);
			AddInstruction(Instruction.Create(code, (Register)dst, (uint)imm));
		}

		public void shl(AssemblerRegister32 dst, byte imm)
		{
			Code code = ((imm == 1) ? Code.Shl_rm32_1 : Code.Shl_rm32_imm8);
			AddInstruction(Instruction.Create(code, (Register)dst, (uint)imm));
		}

		public void shl(AssemblerRegister64 dst, byte imm)
		{
			Code code = ((imm == 1) ? Code.Shl_rm64_1 : Code.Shl_rm64_imm8);
			AddInstruction(Instruction.Create(code, (Register)dst, (uint)imm));
		}

		public void shl(AssemblerMemoryOperand dst, byte imm)
		{
			Code code;
			if (imm == 1)
			{
				if (dst.Size == MemoryOperandSize.Qword)
				{
					code = Code.Shl_rm64_1;
				}
				else if (dst.Size == MemoryOperandSize.Dword)
				{
					code = Code.Shl_rm32_1;
				}
				else if (dst.Size == MemoryOperandSize.Word)
				{
					code = Code.Shl_rm16_1;
				}
				else
				{
					if (dst.Size != MemoryOperandSize.Byte)
					{
						throw NoOpCodeFoundFor(Mnemonic.Shl, dst, imm);
					}
					code = Code.Shl_rm8_1;
				}
			}
			else if (dst.Size == MemoryOperandSize.Qword)
			{
				code = Code.Shl_rm64_imm8;
			}
			else if (dst.Size == MemoryOperandSize.Dword)
			{
				code = Code.Shl_rm32_imm8;
			}
			else if (dst.Size == MemoryOperandSize.Word)
			{
				code = Code.Shl_rm16_imm8;
			}
			else
			{
				if (dst.Size != MemoryOperandSize.Byte)
				{
					throw NoOpCodeFoundFor(Mnemonic.Shl, dst, imm);
				}
				code = Code.Shl_rm8_imm8;
			}
			Code code2 = code;
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, in memory, (uint)imm));
		}

		public void shld(AssemblerRegister16 dst, AssemblerRegister16 src1, AssemblerRegister8 src2)
		{
			AddInstruction(Instruction.Create(Code.Shld_rm16_r16_CL, dst, src1, src2));
		}

		public void shld(AssemblerMemoryOperand dst, AssemblerRegister16 src1, AssemblerRegister8 src2)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Shld_rm16_r16_CL, in memory, src1, src2));
		}

		public void shld(AssemblerRegister32 dst, AssemblerRegister32 src1, AssemblerRegister8 src2)
		{
			AddInstruction(Instruction.Create(Code.Shld_rm32_r32_CL, dst, src1, src2));
		}

		public void shld(AssemblerMemoryOperand dst, AssemblerRegister32 src1, AssemblerRegister8 src2)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Shld_rm32_r32_CL, in memory, src1, src2));
		}

		public void shld(AssemblerRegister64 dst, AssemblerRegister64 src1, AssemblerRegister8 src2)
		{
			AddInstruction(Instruction.Create(Code.Shld_rm64_r64_CL, dst, src1, src2));
		}

		public void shld(AssemblerMemoryOperand dst, AssemblerRegister64 src1, AssemblerRegister8 src2)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Shld_rm64_r64_CL, in memory, src1, src2));
		}

		public void shld(AssemblerRegister16 dst, AssemblerRegister16 src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.Shld_rm16_r16_imm8, dst, src1, imm));
		}

		public void shld(AssemblerMemoryOperand dst, AssemblerRegister16 src1, sbyte imm)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Shld_rm16_r16_imm8, in memory, src1, imm));
		}

		public void shld(AssemblerRegister32 dst, AssemblerRegister32 src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.Shld_rm32_r32_imm8, dst, src1, imm));
		}

		public void shld(AssemblerMemoryOperand dst, AssemblerRegister32 src1, sbyte imm)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Shld_rm32_r32_imm8, in memory, src1, imm));
		}

		public void shld(AssemblerRegister64 dst, AssemblerRegister64 src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.Shld_rm64_r64_imm8, dst, src1, imm));
		}

		public void shld(AssemblerMemoryOperand dst, AssemblerRegister64 src1, sbyte imm)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Shld_rm64_r64_imm8, in memory, src1, imm));
		}

		public void shld(AssemblerRegister16 dst, AssemblerRegister16 src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.Shld_rm16_r16_imm8, (Register)dst, (Register)src1, (uint)imm));
		}

		public void shld(AssemblerMemoryOperand dst, AssemblerRegister16 src1, byte imm)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Shld_rm16_r16_imm8, in memory, (Register)src1, (uint)imm));
		}

		public void shld(AssemblerRegister32 dst, AssemblerRegister32 src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.Shld_rm32_r32_imm8, (Register)dst, (Register)src1, (uint)imm));
		}

		public void shld(AssemblerMemoryOperand dst, AssemblerRegister32 src1, byte imm)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Shld_rm32_r32_imm8, in memory, (Register)src1, (uint)imm));
		}

		public void shld(AssemblerRegister64 dst, AssemblerRegister64 src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.Shld_rm64_r64_imm8, (Register)dst, (Register)src1, (uint)imm));
		}

		public void shld(AssemblerMemoryOperand dst, AssemblerRegister64 src1, byte imm)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Shld_rm64_r64_imm8, in memory, (Register)src1, (uint)imm));
		}

		public void shlx(AssemblerRegister32 dst, AssemblerRegister32 src1, AssemblerRegister32 src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Shlx_r32_rm32_r32, dst, src1, src2));
		}

		public void shlx(AssemblerRegister32 dst, AssemblerMemoryOperand src1, AssemblerRegister32 src2)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Shlx_r32_rm32_r32, register, in memory, src2));
		}

		public void shlx(AssemblerRegister64 dst, AssemblerRegister64 src1, AssemblerRegister64 src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Shlx_r64_rm64_r64, dst, src1, src2));
		}

		public void shlx(AssemblerRegister64 dst, AssemblerMemoryOperand src1, AssemblerRegister64 src2)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Shlx_r64_rm64_r64, register, in memory, src2));
		}

		public void shr(AssemblerRegister8 dst, AssemblerRegister8 src)
		{
			AddInstruction(Instruction.Create(Code.Shr_rm8_CL, dst, src));
		}

		public void shr(AssemblerRegister16 dst, AssemblerRegister8 src)
		{
			AddInstruction(Instruction.Create(Code.Shr_rm16_CL, dst, src));
		}

		public void shr(AssemblerRegister32 dst, AssemblerRegister8 src)
		{
			AddInstruction(Instruction.Create(Code.Shr_rm32_CL, dst, src));
		}

		public void shr(AssemblerRegister64 dst, AssemblerRegister8 src)
		{
			AddInstruction(Instruction.Create(Code.Shr_rm64_CL, dst, src));
		}

		public void shr(AssemblerMemoryOperand dst, AssemblerRegister8 src)
		{
			Code code;
			if (dst.Size == MemoryOperandSize.Qword)
			{
				code = Code.Shr_rm64_CL;
			}
			else if (dst.Size == MemoryOperandSize.Dword)
			{
				code = Code.Shr_rm32_CL;
			}
			else if (dst.Size == MemoryOperandSize.Word)
			{
				code = Code.Shr_rm16_CL;
			}
			else
			{
				if (dst.Size != MemoryOperandSize.Byte)
				{
					throw NoOpCodeFoundFor(Mnemonic.Shr, dst, src);
				}
				code = Code.Shr_rm8_CL;
			}
			Code code2 = code;
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, in memory, src));
		}

		public void shr(AssemblerRegister8 dst, sbyte imm)
		{
			Code code = ((imm == 1) ? Code.Shr_rm8_1 : Code.Shr_rm8_imm8);
			AddInstruction(Instruction.Create(code, dst, imm));
		}

		public void shr(AssemblerRegister16 dst, sbyte imm)
		{
			Code code = ((imm == 1) ? Code.Shr_rm16_1 : Code.Shr_rm16_imm8);
			AddInstruction(Instruction.Create(code, dst, imm));
		}

		public void shr(AssemblerRegister32 dst, sbyte imm)
		{
			Code code = ((imm == 1) ? Code.Shr_rm32_1 : Code.Shr_rm32_imm8);
			AddInstruction(Instruction.Create(code, dst, imm));
		}

		public void shr(AssemblerRegister64 dst, sbyte imm)
		{
			Code code = ((imm == 1) ? Code.Shr_rm64_1 : Code.Shr_rm64_imm8);
			AddInstruction(Instruction.Create(code, dst, imm));
		}

		public void shr(AssemblerMemoryOperand dst, sbyte imm)
		{
			Code code;
			if (imm == 1)
			{
				if (dst.Size == MemoryOperandSize.Qword)
				{
					code = Code.Shr_rm64_1;
				}
				else if (dst.Size == MemoryOperandSize.Dword)
				{
					code = Code.Shr_rm32_1;
				}
				else if (dst.Size == MemoryOperandSize.Word)
				{
					code = Code.Shr_rm16_1;
				}
				else
				{
					if (dst.Size != MemoryOperandSize.Byte)
					{
						throw NoOpCodeFoundFor(Mnemonic.Shr, dst, imm);
					}
					code = Code.Shr_rm8_1;
				}
			}
			else if (dst.Size == MemoryOperandSize.Qword)
			{
				code = Code.Shr_rm64_imm8;
			}
			else if (dst.Size == MemoryOperandSize.Dword)
			{
				code = Code.Shr_rm32_imm8;
			}
			else if (dst.Size == MemoryOperandSize.Word)
			{
				code = Code.Shr_rm16_imm8;
			}
			else
			{
				if (dst.Size != MemoryOperandSize.Byte)
				{
					throw NoOpCodeFoundFor(Mnemonic.Shr, dst, imm);
				}
				code = Code.Shr_rm8_imm8;
			}
			Code code2 = code;
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, in memory, imm));
		}

		public void shr(AssemblerRegister8 dst, byte imm)
		{
			Code code = ((imm == 1) ? Code.Shr_rm8_1 : Code.Shr_rm8_imm8);
			AddInstruction(Instruction.Create(code, (Register)dst, (uint)imm));
		}

		public void shr(AssemblerRegister16 dst, byte imm)
		{
			Code code = ((imm == 1) ? Code.Shr_rm16_1 : Code.Shr_rm16_imm8);
			AddInstruction(Instruction.Create(code, (Register)dst, (uint)imm));
		}

		public void shr(AssemblerRegister32 dst, byte imm)
		{
			Code code = ((imm == 1) ? Code.Shr_rm32_1 : Code.Shr_rm32_imm8);
			AddInstruction(Instruction.Create(code, (Register)dst, (uint)imm));
		}

		public void shr(AssemblerRegister64 dst, byte imm)
		{
			Code code = ((imm == 1) ? Code.Shr_rm64_1 : Code.Shr_rm64_imm8);
			AddInstruction(Instruction.Create(code, (Register)dst, (uint)imm));
		}

		public void shr(AssemblerMemoryOperand dst, byte imm)
		{
			Code code;
			if (imm == 1)
			{
				if (dst.Size == MemoryOperandSize.Qword)
				{
					code = Code.Shr_rm64_1;
				}
				else if (dst.Size == MemoryOperandSize.Dword)
				{
					code = Code.Shr_rm32_1;
				}
				else if (dst.Size == MemoryOperandSize.Word)
				{
					code = Code.Shr_rm16_1;
				}
				else
				{
					if (dst.Size != MemoryOperandSize.Byte)
					{
						throw NoOpCodeFoundFor(Mnemonic.Shr, dst, imm);
					}
					code = Code.Shr_rm8_1;
				}
			}
			else if (dst.Size == MemoryOperandSize.Qword)
			{
				code = Code.Shr_rm64_imm8;
			}
			else if (dst.Size == MemoryOperandSize.Dword)
			{
				code = Code.Shr_rm32_imm8;
			}
			else if (dst.Size == MemoryOperandSize.Word)
			{
				code = Code.Shr_rm16_imm8;
			}
			else
			{
				if (dst.Size != MemoryOperandSize.Byte)
				{
					throw NoOpCodeFoundFor(Mnemonic.Shr, dst, imm);
				}
				code = Code.Shr_rm8_imm8;
			}
			Code code2 = code;
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, in memory, (uint)imm));
		}

		public void shrd(AssemblerRegister16 dst, AssemblerRegister16 src1, AssemblerRegister8 src2)
		{
			AddInstruction(Instruction.Create(Code.Shrd_rm16_r16_CL, dst, src1, src2));
		}

		public void shrd(AssemblerMemoryOperand dst, AssemblerRegister16 src1, AssemblerRegister8 src2)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Shrd_rm16_r16_CL, in memory, src1, src2));
		}

		public void shrd(AssemblerRegister32 dst, AssemblerRegister32 src1, AssemblerRegister8 src2)
		{
			AddInstruction(Instruction.Create(Code.Shrd_rm32_r32_CL, dst, src1, src2));
		}

		public void shrd(AssemblerMemoryOperand dst, AssemblerRegister32 src1, AssemblerRegister8 src2)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Shrd_rm32_r32_CL, in memory, src1, src2));
		}

		public void shrd(AssemblerRegister64 dst, AssemblerRegister64 src1, AssemblerRegister8 src2)
		{
			AddInstruction(Instruction.Create(Code.Shrd_rm64_r64_CL, dst, src1, src2));
		}

		public void shrd(AssemblerMemoryOperand dst, AssemblerRegister64 src1, AssemblerRegister8 src2)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Shrd_rm64_r64_CL, in memory, src1, src2));
		}

		public void shrd(AssemblerRegister16 dst, AssemblerRegister16 src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.Shrd_rm16_r16_imm8, dst, src1, imm));
		}

		public void shrd(AssemblerMemoryOperand dst, AssemblerRegister16 src1, sbyte imm)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Shrd_rm16_r16_imm8, in memory, src1, imm));
		}

		public void shrd(AssemblerRegister32 dst, AssemblerRegister32 src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.Shrd_rm32_r32_imm8, dst, src1, imm));
		}

		public void shrd(AssemblerMemoryOperand dst, AssemblerRegister32 src1, sbyte imm)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Shrd_rm32_r32_imm8, in memory, src1, imm));
		}

		public void shrd(AssemblerRegister64 dst, AssemblerRegister64 src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.Shrd_rm64_r64_imm8, dst, src1, imm));
		}

		public void shrd(AssemblerMemoryOperand dst, AssemblerRegister64 src1, sbyte imm)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Shrd_rm64_r64_imm8, in memory, src1, imm));
		}

		public void shrd(AssemblerRegister16 dst, AssemblerRegister16 src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.Shrd_rm16_r16_imm8, (Register)dst, (Register)src1, (uint)imm));
		}

		public void shrd(AssemblerMemoryOperand dst, AssemblerRegister16 src1, byte imm)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Shrd_rm16_r16_imm8, in memory, (Register)src1, (uint)imm));
		}

		public void shrd(AssemblerRegister32 dst, AssemblerRegister32 src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.Shrd_rm32_r32_imm8, (Register)dst, (Register)src1, (uint)imm));
		}

		public void shrd(AssemblerMemoryOperand dst, AssemblerRegister32 src1, byte imm)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Shrd_rm32_r32_imm8, in memory, (Register)src1, (uint)imm));
		}

		public void shrd(AssemblerRegister64 dst, AssemblerRegister64 src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.Shrd_rm64_r64_imm8, (Register)dst, (Register)src1, (uint)imm));
		}

		public void shrd(AssemblerMemoryOperand dst, AssemblerRegister64 src1, byte imm)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Shrd_rm64_r64_imm8, in memory, (Register)src1, (uint)imm));
		}

		public void shrx(AssemblerRegister32 dst, AssemblerRegister32 src1, AssemblerRegister32 src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Shrx_r32_rm32_r32, dst, src1, src2));
		}

		public void shrx(AssemblerRegister32 dst, AssemblerMemoryOperand src1, AssemblerRegister32 src2)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Shrx_r32_rm32_r32, register, in memory, src2));
		}

		public void shrx(AssemblerRegister64 dst, AssemblerRegister64 src1, AssemblerRegister64 src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Shrx_r64_rm64_r64, dst, src1, src2));
		}

		public void shrx(AssemblerRegister64 dst, AssemblerMemoryOperand src1, AssemblerRegister64 src2)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Shrx_r64_rm64_r64, register, in memory, src2));
		}

		public void shufpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.Shufpd_xmm_xmmm128_imm8, dst, src1, imm));
		}

		public void shufpd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Shufpd_xmm_xmmm128_imm8, register, in memory, imm));
		}

		public void shufpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.Shufpd_xmm_xmmm128_imm8, (Register)dst, (Register)src1, (uint)imm));
		}

		public void shufpd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Shufpd_xmm_xmmm128_imm8, register, in memory, (uint)imm));
		}

		public void shufps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.Shufps_xmm_xmmm128_imm8, dst, src1, imm));
		}

		public void shufps(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Shufps_xmm_xmmm128_imm8, register, in memory, imm));
		}

		public void shufps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.Shufps_xmm_xmmm128_imm8, (Register)dst, (Register)src1, (uint)imm));
		}

		public void shufps(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Shufps_xmm_xmmm128_imm8, register, in memory, (uint)imm));
		}

		public void sidt(AssemblerMemoryOperand dst)
		{
			Code code = ((Bitness != 64) ? ((Bitness >= 32) ? Code.Sidt_m1632 : Code.Sidt_m1632_16) : Code.Sidt_m1664);
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, in memory));
		}

		public void skinit()
		{
			AddInstruction(Instruction.Create(Code.Skinit));
		}

		public void sldt(AssemblerRegister16 dst)
		{
			AddInstruction(Instruction.Create(Code.Sldt_rm16, dst));
		}

		public void sldt(AssemblerRegister32 dst)
		{
			AddInstruction(Instruction.Create(Code.Sldt_r32m16, dst));
		}

		public void sldt(AssemblerRegister64 dst)
		{
			AddInstruction(Instruction.Create(Code.Sldt_r64m16, dst));
		}

		public void sldt(AssemblerMemoryOperand dst)
		{
			Code code = ((Bitness >= 32) ? Code.Sldt_r32m16 : Code.Sldt_rm16);
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, in memory));
		}

		public void slwpcb(AssemblerRegister32 dst)
		{
			AddInstruction(Instruction.Create(Code.XOP_Slwpcb_r32, dst));
		}

		public void slwpcb(AssemblerRegister64 dst)
		{
			AddInstruction(Instruction.Create(Code.XOP_Slwpcb_r64, dst));
		}

		public void smint()
		{
			AddInstruction(Instruction.Create(Code.Smint));
		}

		public void smint_0f7e()
		{
			AddInstruction(Instruction.Create(Code.Smint_0F7E));
		}

		public void smsw(AssemblerRegister16 dst)
		{
			AddInstruction(Instruction.Create(Code.Smsw_rm16, dst));
		}

		public void smsw(AssemblerRegister32 dst)
		{
			AddInstruction(Instruction.Create(Code.Smsw_r32m16, dst));
		}

		public void smsw(AssemblerRegister64 dst)
		{
			AddInstruction(Instruction.Create(Code.Smsw_r64m16, dst));
		}

		public void smsw(AssemblerMemoryOperand dst)
		{
			Code code = ((Bitness >= 32) ? Code.Smsw_r32m16 : Code.Smsw_rm16);
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, in memory));
		}

		public void sqrtpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Sqrtpd_xmm_xmmm128, dst, src));
		}

		public void sqrtpd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Sqrtpd_xmm_xmmm128, register, in memory));
		}

		public void sqrtps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Sqrtps_xmm_xmmm128, dst, src));
		}

		public void sqrtps(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Sqrtps_xmm_xmmm128, register, in memory));
		}

		public void sqrtsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Sqrtsd_xmm_xmmm64, dst, src));
		}

		public void sqrtsd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Sqrtsd_xmm_xmmm64, register, in memory));
		}

		public void sqrtss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Sqrtss_xmm_xmmm32, dst, src));
		}

		public void sqrtss(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Sqrtss_xmm_xmmm32, register, in memory));
		}

		public void stac()
		{
			AddInstruction(Instruction.Create(Code.Stac));
		}

		public void stc()
		{
			AddInstruction(Instruction.Create(Code.Stc));
		}

		public void std()
		{
			AddInstruction(Instruction.Create(Code.Std));
		}

		public void stgi()
		{
			AddInstruction(Instruction.Create(Code.Stgi));
		}

		public void sti()
		{
			AddInstruction(Instruction.Create(Code.Sti));
		}

		public void stmxcsr(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Stmxcsr_m32, in memory));
		}

		public void stosb()
		{
			AddInstruction(Instruction.CreateStosb(Bitness));
		}

		public void stosd()
		{
			AddInstruction(Instruction.CreateStosd(Bitness));
		}

		public void stosq()
		{
			AddInstruction(Instruction.CreateStosq(Bitness));
		}

		public void stosw()
		{
			AddInstruction(Instruction.CreateStosw(Bitness));
		}

		public void str(AssemblerRegister16 dst)
		{
			AddInstruction(Instruction.Create(Code.Str_rm16, dst));
		}

		public void str(AssemblerRegister32 dst)
		{
			AddInstruction(Instruction.Create(Code.Str_r32m16, dst));
		}

		public void str(AssemblerRegister64 dst)
		{
			AddInstruction(Instruction.Create(Code.Str_r64m16, dst));
		}

		public void str(AssemblerMemoryOperand dst)
		{
			Code code = ((Bitness >= 32) ? Code.Str_r32m16 : Code.Str_rm16);
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, in memory));
		}

		public void sttilecfg(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Sttilecfg_m512, in memory));
		}

		public void stui()
		{
			AddInstruction(Instruction.Create(Code.Stui));
		}

		public void sub(AssemblerRegister8 dst, AssemblerRegister8 src)
		{
			AddInstruction(Instruction.Create(Code.Sub_rm8_r8, dst, src));
		}

		public void sub(AssemblerMemoryOperand dst, AssemblerRegister8 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Sub_rm8_r8, in memory, src));
		}

		public void sub(AssemblerRegister16 dst, AssemblerRegister16 src)
		{
			AddInstruction(Instruction.Create(Code.Sub_rm16_r16, dst, src));
		}

		public void sub(AssemblerMemoryOperand dst, AssemblerRegister16 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Sub_rm16_r16, in memory, src));
		}

		public void sub(AssemblerRegister32 dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.Sub_rm32_r32, dst, src));
		}

		public void sub(AssemblerMemoryOperand dst, AssemblerRegister32 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Sub_rm32_r32, in memory, src));
		}

		public void sub(AssemblerRegister64 dst, AssemblerRegister64 src)
		{
			AddInstruction(Instruction.Create(Code.Sub_rm64_r64, dst, src));
		}

		public void sub(AssemblerMemoryOperand dst, AssemblerRegister64 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Sub_rm64_r64, in memory, src));
		}

		public void sub(AssemblerRegister8 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Sub_r8_rm8, register, in memory));
		}

		public void sub(AssemblerRegister16 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Sub_r16_rm16, register, in memory));
		}

		public void sub(AssemblerRegister32 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Sub_r32_rm32, register, in memory));
		}

		public void sub(AssemblerRegister64 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Sub_r64_rm64, register, in memory));
		}

		public void sub(AssemblerRegister8 dst, sbyte imm)
		{
			Code code = (((Register)dst == Register.AL) ? Code.Sub_AL_imm8 : Code.Sub_rm8_imm8);
			AddInstruction(Instruction.Create(code, dst, imm));
		}

		public void sub(AssemblerRegister16 dst, short imm)
		{
			Code code = (((Register)dst != Register.AX) ? ((imm >= -128 && imm <= 127) ? Code.Sub_rm16_imm8 : Code.Sub_rm16_imm16) : Code.Sub_AX_imm16);
			AddInstruction(Instruction.Create(code, dst, imm));
		}

		public void sub(AssemblerRegister32 dst, int imm)
		{
			Code code = (((Register)dst != Register.EAX) ? ((imm >= -128 && imm <= 127) ? Code.Sub_rm32_imm8 : Code.Sub_rm32_imm32) : Code.Sub_EAX_imm32);
			AddInstruction(Instruction.Create(code, dst, imm));
		}

		public void sub(AssemblerRegister64 dst, int imm)
		{
			Code code = (((Register)dst != Register.RAX) ? ((imm >= -128 && imm <= 127) ? Code.Sub_rm64_imm8 : Code.Sub_rm64_imm32) : Code.Sub_RAX_imm32);
			AddInstruction(Instruction.Create(code, dst, imm));
		}

		public void sub(AssemblerMemoryOperand dst, int imm)
		{
			Code code;
			if (dst.Size == MemoryOperandSize.Qword)
			{
				code = ((imm >= -128 && imm <= 127) ? Code.Sub_rm64_imm8 : Code.Sub_rm64_imm32);
			}
			else if (dst.Size == MemoryOperandSize.Dword)
			{
				code = ((imm >= -128 && imm <= 127) ? Code.Sub_rm32_imm8 : Code.Sub_rm32_imm32);
			}
			else if (dst.Size == MemoryOperandSize.Word)
			{
				code = ((imm >= -128 && imm <= 127) ? Code.Sub_rm16_imm8 : Code.Sub_rm16_imm16);
			}
			else
			{
				if (dst.Size != MemoryOperandSize.Byte)
				{
					throw NoOpCodeFoundFor(Mnemonic.Sub, dst, imm);
				}
				code = Code.Sub_rm8_imm8;
			}
			Code code2 = code;
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, in memory, imm));
		}

		public void sub(AssemblerRegister8 dst, byte imm)
		{
			Code code = (((Register)dst == Register.AL) ? Code.Sub_AL_imm8 : Code.Sub_rm8_imm8);
			AddInstruction(Instruction.Create(code, (Register)dst, (uint)imm));
		}

		public void sub(AssemblerRegister16 dst, ushort imm)
		{
			Code code = (((Register)dst != Register.AX) ? ((imm <= 127 || (65408 <= imm && imm <= ushort.MaxValue)) ? Code.Sub_rm16_imm8 : Code.Sub_rm16_imm16) : Code.Sub_AX_imm16);
			AddInstruction(Instruction.Create(code, (Register)dst, (uint)imm));
		}

		public void sub(AssemblerRegister32 dst, uint imm)
		{
			Code code = (((Register)dst != Register.EAX) ? ((imm <= 127 || 4294967168u <= imm) ? Code.Sub_rm32_imm8 : Code.Sub_rm32_imm32) : Code.Sub_EAX_imm32);
			AddInstruction(Instruction.Create(code, dst, imm));
		}

		public void sub(AssemblerMemoryOperand dst, uint imm)
		{
			Code code;
			if (dst.Size == MemoryOperandSize.Dword)
			{
				code = ((imm <= 127 || 4294967168u <= imm) ? Code.Sub_rm32_imm8 : Code.Sub_rm32_imm32);
			}
			else if (dst.Size == MemoryOperandSize.Word)
			{
				code = ((imm <= 127 || (65408 <= imm && imm <= 65535)) ? Code.Sub_rm16_imm8 : Code.Sub_rm16_imm16);
			}
			else
			{
				if (dst.Size != MemoryOperandSize.Byte)
				{
					throw NoOpCodeFoundFor(Mnemonic.Sub, dst, imm);
				}
				code = Code.Sub_rm8_imm8;
			}
			Code code2 = code;
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, in memory, imm));
		}

		public void subpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Subpd_xmm_xmmm128, dst, src));
		}

		public void subpd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Subpd_xmm_xmmm128, register, in memory));
		}

		public void subps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Subps_xmm_xmmm128, dst, src));
		}

		public void subps(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Subps_xmm_xmmm128, register, in memory));
		}

		public void subsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Subsd_xmm_xmmm64, dst, src));
		}

		public void subsd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Subsd_xmm_xmmm64, register, in memory));
		}

		public void subss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Subss_xmm_xmmm32, dst, src));
		}

		public void subss(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Subss_xmm_xmmm32, register, in memory));
		}

		public void svdc(AssemblerMemoryOperand dst, AssemblerRegisterSegment src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Svdc_m80_Sreg, in memory, src));
		}

		public void svldt(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Svldt_m80, in memory));
		}

		public void svts(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Svts_m80, in memory));
		}

		public void swapgs()
		{
			AddInstruction(Instruction.Create(Code.Swapgs));
		}

		public void syscall()
		{
			AddInstruction(Instruction.Create(Code.Syscall));
		}

		public void sysenter()
		{
			AddInstruction(Instruction.Create(Code.Sysenter));
		}

		public void sysexit()
		{
			AddInstruction(Instruction.Create(Code.Sysexitd));
		}

		public void sysexitq()
		{
			AddInstruction(Instruction.Create(Code.Sysexitq));
		}

		public void sysret()
		{
			AddInstruction(Instruction.Create(Code.Sysretd));
		}

		public void sysretq()
		{
			AddInstruction(Instruction.Create(Code.Sysretq));
		}

		public void t1mskc(AssemblerRegister32 dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.XOP_T1mskc_r32_rm32, dst, src));
		}

		public void t1mskc(AssemblerRegister64 dst, AssemblerRegister64 src)
		{
			AddInstruction(Instruction.Create(Code.XOP_T1mskc_r64_rm64, dst, src));
		}

		public void t1mskc(AssemblerRegister32 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_T1mskc_r32_rm32, register, in memory));
		}

		public void t1mskc(AssemblerRegister64 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_T1mskc_r64_rm64, register, in memory));
		}

		public void tdcall()
		{
			AddInstruction(Instruction.Create(Code.Tdcall));
		}

		public void tdpbf16ps(AssemblerRegisterTMM dst, AssemblerRegisterTMM src1, AssemblerRegisterTMM src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Tdpbf16ps_tmm_tmm_tmm, dst, src1, src2));
		}

		public void tdpbssd(AssemblerRegisterTMM dst, AssemblerRegisterTMM src1, AssemblerRegisterTMM src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Tdpbssd_tmm_tmm_tmm, dst, src1, src2));
		}

		public void tdpbsud(AssemblerRegisterTMM dst, AssemblerRegisterTMM src1, AssemblerRegisterTMM src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Tdpbsud_tmm_tmm_tmm, dst, src1, src2));
		}

		public void tdpbusd(AssemblerRegisterTMM dst, AssemblerRegisterTMM src1, AssemblerRegisterTMM src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Tdpbusd_tmm_tmm_tmm, dst, src1, src2));
		}

		public void tdpbuud(AssemblerRegisterTMM dst, AssemblerRegisterTMM src1, AssemblerRegisterTMM src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Tdpbuud_tmm_tmm_tmm, dst, src1, src2));
		}

		public void tdpfp16ps(AssemblerRegisterTMM dst, AssemblerRegisterTMM src1, AssemblerRegisterTMM src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Tdpfp16ps_tmm_tmm_tmm, dst, src1, src2));
		}

		public void test(AssemblerRegister8 dst, AssemblerRegister8 src)
		{
			AddInstruction(Instruction.Create(Code.Test_rm8_r8, dst, src));
		}

		public void test(AssemblerMemoryOperand dst, AssemblerRegister8 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Test_rm8_r8, in memory, src));
		}

		public void test(AssemblerRegister16 dst, AssemblerRegister16 src)
		{
			AddInstruction(Instruction.Create(Code.Test_rm16_r16, dst, src));
		}

		public void test(AssemblerMemoryOperand dst, AssemblerRegister16 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Test_rm16_r16, in memory, src));
		}

		public void test(AssemblerRegister32 dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.Test_rm32_r32, dst, src));
		}

		public void test(AssemblerMemoryOperand dst, AssemblerRegister32 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Test_rm32_r32, in memory, src));
		}

		public void test(AssemblerRegister64 dst, AssemblerRegister64 src)
		{
			AddInstruction(Instruction.Create(Code.Test_rm64_r64, dst, src));
		}

		public void test(AssemblerMemoryOperand dst, AssemblerRegister64 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Test_rm64_r64, in memory, src));
		}

		public void test(AssemblerRegister8 dst, sbyte imm)
		{
			Code code = (((Register)dst == Register.AL) ? Code.Test_AL_imm8 : Code.Test_rm8_imm8);
			AddInstruction(Instruction.Create(code, dst, imm));
		}

		public void test(AssemblerRegister16 dst, short imm)
		{
			Code code = (((Register)dst == Register.AX) ? Code.Test_AX_imm16 : Code.Test_rm16_imm16);
			AddInstruction(Instruction.Create(code, dst, imm));
		}

		public void test(AssemblerRegister32 dst, int imm)
		{
			Code code = (((Register)dst == Register.EAX) ? Code.Test_EAX_imm32 : Code.Test_rm32_imm32);
			AddInstruction(Instruction.Create(code, dst, imm));
		}

		public void test(AssemblerRegister64 dst, int imm)
		{
			Code code = (((Register)dst == Register.RAX) ? Code.Test_RAX_imm32 : Code.Test_rm64_imm32);
			AddInstruction(Instruction.Create(code, dst, imm));
		}

		public void test(AssemblerMemoryOperand dst, int imm)
		{
			Code code;
			if (dst.Size == MemoryOperandSize.Qword)
			{
				code = Code.Test_rm64_imm32;
			}
			else if (dst.Size == MemoryOperandSize.Dword)
			{
				code = Code.Test_rm32_imm32;
			}
			else if (dst.Size == MemoryOperandSize.Word)
			{
				code = Code.Test_rm16_imm16;
			}
			else
			{
				if (dst.Size != MemoryOperandSize.Byte)
				{
					throw NoOpCodeFoundFor(Mnemonic.Test, dst, imm);
				}
				code = Code.Test_rm8_imm8;
			}
			Code code2 = code;
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, in memory, imm));
		}

		public void test(AssemblerRegister8 dst, byte imm)
		{
			Code code = (((Register)dst == Register.AL) ? Code.Test_AL_imm8 : Code.Test_rm8_imm8);
			AddInstruction(Instruction.Create(code, (Register)dst, (uint)imm));
		}

		public void test(AssemblerRegister16 dst, ushort imm)
		{
			Code code = (((Register)dst == Register.AX) ? Code.Test_AX_imm16 : Code.Test_rm16_imm16);
			AddInstruction(Instruction.Create(code, (Register)dst, (uint)imm));
		}

		public void test(AssemblerRegister32 dst, uint imm)
		{
			Code code = (((Register)dst == Register.EAX) ? Code.Test_EAX_imm32 : Code.Test_rm32_imm32);
			AddInstruction(Instruction.Create(code, dst, imm));
		}

		public void test(AssemblerMemoryOperand dst, uint imm)
		{
			Code code;
			if (dst.Size == MemoryOperandSize.Dword)
			{
				code = Code.Test_rm32_imm32;
			}
			else if (dst.Size == MemoryOperandSize.Word)
			{
				code = Code.Test_rm16_imm16;
			}
			else
			{
				if (dst.Size != MemoryOperandSize.Byte)
				{
					throw NoOpCodeFoundFor(Mnemonic.Test, dst, imm);
				}
				code = Code.Test_rm8_imm8;
			}
			Code code2 = code;
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, in memory, imm));
		}

		public void testui()
		{
			AddInstruction(Instruction.Create(Code.Testui));
		}

		public void tileloadd(AssemblerRegisterTMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Tileloadd_tmm_sibmem, register, in memory));
		}

		public void tileloaddt1(AssemblerRegisterTMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Tileloaddt1_tmm_sibmem, register, in memory));
		}

		public void tilerelease()
		{
			AddInstruction(Instruction.Create(Code.VEX_Tilerelease));
		}

		public void tilestored(AssemblerMemoryOperand dst, AssemblerRegisterTMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Tilestored_sibmem_tmm, in memory, src));
		}

		public void tilezero(AssemblerRegisterTMM dst)
		{
			AddInstruction(Instruction.Create(Code.VEX_Tilezero_tmm, dst));
		}

		public void tlbsync()
		{
			AddInstruction(Instruction.Create(Code.Tlbsync));
		}

		public void tpause(AssemblerRegister32 dst)
		{
			AddInstruction(Instruction.Create(Code.Tpause_r32, dst));
		}

		public void tpause(AssemblerRegister64 dst)
		{
			AddInstruction(Instruction.Create(Code.Tpause_r64, dst));
		}

		public void tzcnt(AssemblerRegister16 dst, AssemblerRegister16 src)
		{
			AddInstruction(Instruction.Create(Code.Tzcnt_r16_rm16, dst, src));
		}

		public void tzcnt(AssemblerRegister32 dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.Tzcnt_r32_rm32, dst, src));
		}

		public void tzcnt(AssemblerRegister64 dst, AssemblerRegister64 src)
		{
			AddInstruction(Instruction.Create(Code.Tzcnt_r64_rm64, dst, src));
		}

		public void tzcnt(AssemblerRegister16 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Tzcnt_r16_rm16, register, in memory));
		}

		public void tzcnt(AssemblerRegister32 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Tzcnt_r32_rm32, register, in memory));
		}

		public void tzcnt(AssemblerRegister64 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Tzcnt_r64_rm64, register, in memory));
		}

		public void tzmsk(AssemblerRegister32 dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.XOP_Tzmsk_r32_rm32, dst, src));
		}

		public void tzmsk(AssemblerRegister64 dst, AssemblerRegister64 src)
		{
			AddInstruction(Instruction.Create(Code.XOP_Tzmsk_r64_rm64, dst, src));
		}

		public void tzmsk(AssemblerRegister32 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Tzmsk_r32_rm32, register, in memory));
		}

		public void tzmsk(AssemblerRegister64 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Tzmsk_r64_rm64, register, in memory));
		}

		public void ucomisd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Ucomisd_xmm_xmmm64, dst, src));
		}

		public void ucomisd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Ucomisd_xmm_xmmm64, register, in memory));
		}

		public void ucomiss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Ucomiss_xmm_xmmm32, dst, src));
		}

		public void ucomiss(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Ucomiss_xmm_xmmm32, register, in memory));
		}

		public void ud0()
		{
			AddInstruction(Instruction.Create(Code.Ud0));
		}

		public void ud0(AssemblerRegister16 dst, AssemblerRegister16 src)
		{
			AddInstruction(Instruction.Create(Code.Ud0_r16_rm16, dst, src));
		}

		public void ud0(AssemblerRegister32 dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.Ud0_r32_rm32, dst, src));
		}

		public void ud0(AssemblerRegister64 dst, AssemblerRegister64 src)
		{
			AddInstruction(Instruction.Create(Code.Ud0_r64_rm64, dst, src));
		}

		public void ud0(AssemblerRegister16 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Ud0_r16_rm16, register, in memory));
		}

		public void ud0(AssemblerRegister32 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Ud0_r32_rm32, register, in memory));
		}

		public void ud0(AssemblerRegister64 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Ud0_r64_rm64, register, in memory));
		}

		public void ud1(AssemblerRegister16 dst, AssemblerRegister16 src)
		{
			AddInstruction(Instruction.Create(Code.Ud1_r16_rm16, dst, src));
		}

		public void ud1(AssemblerRegister32 dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.Ud1_r32_rm32, dst, src));
		}

		public void ud1(AssemblerRegister64 dst, AssemblerRegister64 src)
		{
			AddInstruction(Instruction.Create(Code.Ud1_r64_rm64, dst, src));
		}

		public void ud1(AssemblerRegister16 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Ud1_r16_rm16, register, in memory));
		}

		public void ud1(AssemblerRegister32 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Ud1_r32_rm32, register, in memory));
		}

		public void ud1(AssemblerRegister64 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Ud1_r64_rm64, register, in memory));
		}

		public void ud2()
		{
			AddInstruction(Instruction.Create(Code.Ud2));
		}

		public void uiret()
		{
			AddInstruction(Instruction.Create(Code.Uiret));
		}

		public void umonitor(AssemblerRegister16 dst)
		{
			AddInstruction(Instruction.Create(Code.Umonitor_r16, dst));
		}

		public void umonitor(AssemblerRegister32 dst)
		{
			AddInstruction(Instruction.Create(Code.Umonitor_r32, dst));
		}

		public void umonitor(AssemblerRegister64 dst)
		{
			AddInstruction(Instruction.Create(Code.Umonitor_r64, dst));
		}

		public void umov(AssemblerRegister8 dst, AssemblerRegister8 src)
		{
			AddInstruction(Instruction.Create(Code.Umov_rm8_r8, dst, src));
		}

		public void umov(AssemblerMemoryOperand dst, AssemblerRegister8 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Umov_rm8_r8, in memory, src));
		}

		public void umov(AssemblerRegister16 dst, AssemblerRegister16 src)
		{
			AddInstruction(Instruction.Create(Code.Umov_rm16_r16, dst, src));
		}

		public void umov(AssemblerMemoryOperand dst, AssemblerRegister16 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Umov_rm16_r16, in memory, src));
		}

		public void umov(AssemblerRegister32 dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.Umov_rm32_r32, dst, src));
		}

		public void umov(AssemblerMemoryOperand dst, AssemblerRegister32 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Umov_rm32_r32, in memory, src));
		}

		public void umov(AssemblerRegister8 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Umov_r8_rm8, register, in memory));
		}

		public void umov(AssemblerRegister16 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Umov_r16_rm16, register, in memory));
		}

		public void umov(AssemblerRegister32 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Umov_r32_rm32, register, in memory));
		}

		public void umwait(AssemblerRegister32 dst)
		{
			AddInstruction(Instruction.Create(Code.Umwait_r32, dst));
		}

		public void umwait(AssemblerRegister64 dst)
		{
			AddInstruction(Instruction.Create(Code.Umwait_r64, dst));
		}

		public void unpckhpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Unpckhpd_xmm_xmmm128, dst, src));
		}

		public void unpckhpd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Unpckhpd_xmm_xmmm128, register, in memory));
		}

		public void unpckhps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Unpckhps_xmm_xmmm128, dst, src));
		}

		public void unpckhps(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Unpckhps_xmm_xmmm128, register, in memory));
		}

		public void unpcklpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Unpcklpd_xmm_xmmm128, dst, src));
		}

		public void unpcklpd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Unpcklpd_xmm_xmmm128, register, in memory));
		}

		public void unpcklps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Unpcklps_xmm_xmmm128, dst, src));
		}

		public void unpcklps(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Unpcklps_xmm_xmmm128, register, in memory));
		}

		public void v4fmaddps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_V4fmaddps_zmm_k1z_zmmp3_m128, register, register2, in memory), dst.Flags);
		}

		public void v4fmaddss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_V4fmaddss_xmm_k1z_xmmp3_m128, register, register2, in memory), dst.Flags);
		}

		public void v4fnmaddps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_V4fnmaddps_zmm_k1z_zmmp3_m128, register, register2, in memory), dst.Flags);
		}

		public void v4fnmaddss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_V4fnmaddss_xmm_k1z_xmmp3_m128, register, register2, in memory), dst.Flags);
		}

		public void vaddpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vaddpd_xmm_xmm_xmmm128 : Code.EVEX_Vaddpd_xmm_k1z_xmm_xmmm128b64);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vaddpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vaddpd_ymm_ymm_ymmm256 : Code.EVEX_Vaddpd_ymm_k1z_ymm_ymmm256b64);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vaddpd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vaddpd_zmm_k1z_zmm_zmmm512b64_er, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vaddpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vaddpd_xmm_xmm_xmmm128 : Code.EVEX_Vaddpd_xmm_k1z_xmm_xmmm128b64) : Code.EVEX_Vaddpd_xmm_k1z_xmm_xmmm128b64);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vaddpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vaddpd_ymm_ymm_ymmm256 : Code.EVEX_Vaddpd_ymm_k1z_ymm_ymmm256b64) : Code.EVEX_Vaddpd_ymm_k1z_ymm_ymmm256b64);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vaddpd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vaddpd_zmm_k1z_zmm_zmmm512b64_er, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vaddph(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vaddph_xmm_k1z_xmm_xmmm128b16, dst, src1, src2), dst.Flags);
		}

		public void vaddph(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vaddph_ymm_k1z_ymm_ymmm256b16, dst, src1, src2), dst.Flags);
		}

		public void vaddph(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vaddph_zmm_k1z_zmm_zmmm512b16_er, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vaddph(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vaddph_xmm_k1z_xmm_xmmm128b16, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vaddph(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vaddph_ymm_k1z_ymm_ymmm256b16, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vaddph(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vaddph_zmm_k1z_zmm_zmmm512b16_er, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vaddps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vaddps_xmm_xmm_xmmm128 : Code.EVEX_Vaddps_xmm_k1z_xmm_xmmm128b32);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vaddps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vaddps_ymm_ymm_ymmm256 : Code.EVEX_Vaddps_ymm_k1z_ymm_ymmm256b32);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vaddps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vaddps_zmm_k1z_zmm_zmmm512b32_er, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vaddps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vaddps_xmm_xmm_xmmm128 : Code.EVEX_Vaddps_xmm_k1z_xmm_xmmm128b32) : Code.EVEX_Vaddps_xmm_k1z_xmm_xmmm128b32);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vaddps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vaddps_ymm_ymm_ymmm256 : Code.EVEX_Vaddps_ymm_k1z_ymm_ymmm256b32) : Code.EVEX_Vaddps_ymm_k1z_ymm_ymmm256b32);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vaddps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vaddps_zmm_k1z_zmm_zmmm512b32_er, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vaddsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vaddsd_xmm_xmm_xmmm64 : Code.EVEX_Vaddsd_xmm_k1z_xmm_xmmm64_er);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vaddsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vaddsd_xmm_xmm_xmmm64 : Code.EVEX_Vaddsd_xmm_k1z_xmm_xmmm64_er);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vaddsh(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vaddsh_xmm_k1z_xmm_xmmm16_er, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vaddsh(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vaddsh_xmm_k1z_xmm_xmmm16_er, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vaddss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vaddss_xmm_xmm_xmmm32 : Code.EVEX_Vaddss_xmm_k1z_xmm_xmmm32_er);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vaddss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vaddss_xmm_xmm_xmmm32 : Code.EVEX_Vaddss_xmm_k1z_xmm_xmmm32_er);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vaddsubpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vaddsubpd_xmm_xmm_xmmm128, dst, src1, src2));
		}

		public void vaddsubpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vaddsubpd_ymm_ymm_ymmm256, dst, src1, src2));
		}

		public void vaddsubpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vaddsubpd_xmm_xmm_xmmm128, register, register2, in memory));
		}

		public void vaddsubpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vaddsubpd_ymm_ymm_ymmm256, register, register2, in memory));
		}

		public void vaddsubps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vaddsubps_xmm_xmm_xmmm128, dst, src1, src2));
		}

		public void vaddsubps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vaddsubps_ymm_ymm_ymmm256, dst, src1, src2));
		}

		public void vaddsubps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vaddsubps_xmm_xmm_xmmm128, register, register2, in memory));
		}

		public void vaddsubps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vaddsubps_ymm_ymm_ymmm256, register, register2, in memory));
		}

		public void vaesdec(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vaesdec_xmm_xmm_xmmm128 : Code.EVEX_Vaesdec_xmm_xmm_xmmm128);
			AddInstruction(Instruction.Create(code, dst, src1, src2));
		}

		public void vaesdec(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vaesdec_ymm_ymm_ymmm256 : Code.EVEX_Vaesdec_ymm_ymm_ymmm256);
			AddInstruction(Instruction.Create(code, dst, src1, src2));
		}

		public void vaesdec(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vaesdec_zmm_zmm_zmmm512, dst, src1, src2));
		}

		public void vaesdec(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vaesdec_xmm_xmm_xmmm128 : Code.EVEX_Vaesdec_xmm_xmm_xmmm128);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory));
		}

		public void vaesdec(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vaesdec_ymm_ymm_ymmm256 : Code.EVEX_Vaesdec_ymm_ymm_ymmm256);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory));
		}

		public void vaesdec(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vaesdec_zmm_zmm_zmmm512, register, register2, in memory));
		}

		public void vaesdeclast(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vaesdeclast_xmm_xmm_xmmm128 : Code.EVEX_Vaesdeclast_xmm_xmm_xmmm128);
			AddInstruction(Instruction.Create(code, dst, src1, src2));
		}

		public void vaesdeclast(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vaesdeclast_ymm_ymm_ymmm256 : Code.EVEX_Vaesdeclast_ymm_ymm_ymmm256);
			AddInstruction(Instruction.Create(code, dst, src1, src2));
		}

		public void vaesdeclast(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vaesdeclast_zmm_zmm_zmmm512, dst, src1, src2));
		}

		public void vaesdeclast(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vaesdeclast_xmm_xmm_xmmm128 : Code.EVEX_Vaesdeclast_xmm_xmm_xmmm128);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory));
		}

		public void vaesdeclast(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vaesdeclast_ymm_ymm_ymmm256 : Code.EVEX_Vaesdeclast_ymm_ymm_ymmm256);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory));
		}

		public void vaesdeclast(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vaesdeclast_zmm_zmm_zmmm512, register, register2, in memory));
		}

		public void vaesenc(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vaesenc_xmm_xmm_xmmm128 : Code.EVEX_Vaesenc_xmm_xmm_xmmm128);
			AddInstruction(Instruction.Create(code, dst, src1, src2));
		}

		public void vaesenc(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vaesenc_ymm_ymm_ymmm256 : Code.EVEX_Vaesenc_ymm_ymm_ymmm256);
			AddInstruction(Instruction.Create(code, dst, src1, src2));
		}

		public void vaesenc(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vaesenc_zmm_zmm_zmmm512, dst, src1, src2));
		}

		public void vaesenc(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vaesenc_xmm_xmm_xmmm128 : Code.EVEX_Vaesenc_xmm_xmm_xmmm128);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory));
		}

		public void vaesenc(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vaesenc_ymm_ymm_ymmm256 : Code.EVEX_Vaesenc_ymm_ymm_ymmm256);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory));
		}

		public void vaesenc(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vaesenc_zmm_zmm_zmmm512, register, register2, in memory));
		}

		public void vaesenclast(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vaesenclast_xmm_xmm_xmmm128 : Code.EVEX_Vaesenclast_xmm_xmm_xmmm128);
			AddInstruction(Instruction.Create(code, dst, src1, src2));
		}

		public void vaesenclast(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vaesenclast_ymm_ymm_ymmm256 : Code.EVEX_Vaesenclast_ymm_ymm_ymmm256);
			AddInstruction(Instruction.Create(code, dst, src1, src2));
		}

		public void vaesenclast(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vaesenclast_zmm_zmm_zmmm512, dst, src1, src2));
		}

		public void vaesenclast(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vaesenclast_xmm_xmm_xmmm128 : Code.EVEX_Vaesenclast_xmm_xmm_xmmm128);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory));
		}

		public void vaesenclast(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vaesenclast_ymm_ymm_ymmm256 : Code.EVEX_Vaesenclast_ymm_ymm_ymmm256);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory));
		}

		public void vaesenclast(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vaesenclast_zmm_zmm_zmmm512, register, register2, in memory));
		}

		public void vaesimc(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vaesimc_xmm_xmmm128, dst, src));
		}

		public void vaesimc(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vaesimc_xmm_xmmm128, register, in memory));
		}

		public void vaeskeygenassist(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vaeskeygenassist_xmm_xmmm128_imm8, dst, src1, imm));
		}

		public void vaeskeygenassist(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vaeskeygenassist_xmm_xmmm128_imm8, register, in memory, imm));
		}

		public void vaeskeygenassist(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vaeskeygenassist_xmm_xmmm128_imm8, (Register)dst, (Register)src1, (uint)imm));
		}

		public void vaeskeygenassist(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vaeskeygenassist_xmm_xmmm128_imm8, register, in memory, (uint)imm));
		}

		public void valignd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Valignd_xmm_k1z_xmm_xmmm128b32_imm8, dst, src1, src2, imm), dst.Flags);
		}

		public void valignd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Valignd_ymm_k1z_ymm_ymmm256b32_imm8, dst, src1, src2, imm), dst.Flags);
		}

		public void valignd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Valignd_zmm_k1z_zmm_zmmm512b32_imm8, dst, src1, src2, imm), dst.Flags);
		}

		public void valignd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Valignd_xmm_k1z_xmm_xmmm128b32_imm8, register, register2, in memory, imm), dst.Flags | src2.Flags);
		}

		public void valignd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Valignd_ymm_k1z_ymm_ymmm256b32_imm8, register, register2, in memory, imm), dst.Flags | src2.Flags);
		}

		public void valignd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Valignd_zmm_k1z_zmm_zmmm512b32_imm8, register, register2, in memory, imm), dst.Flags | src2.Flags);
		}

		public void valignd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Valignd_xmm_k1z_xmm_xmmm128b32_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags);
		}

		public void valignd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Valignd_ymm_k1z_ymm_ymmm256b32_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags);
		}

		public void valignd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Valignd_zmm_k1z_zmm_zmmm512b32_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags);
		}

		public void valignd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Valignd_xmm_k1z_xmm_xmmm128b32_imm8, register, register2, in memory, (uint)imm), dst.Flags | src2.Flags);
		}

		public void valignd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Valignd_ymm_k1z_ymm_ymmm256b32_imm8, register, register2, in memory, (uint)imm), dst.Flags | src2.Flags);
		}

		public void valignd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Valignd_zmm_k1z_zmm_zmmm512b32_imm8, register, register2, in memory, (uint)imm), dst.Flags | src2.Flags);
		}

		public void valignq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Valignq_xmm_k1z_xmm_xmmm128b64_imm8, dst, src1, src2, imm), dst.Flags);
		}

		public void valignq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Valignq_ymm_k1z_ymm_ymmm256b64_imm8, dst, src1, src2, imm), dst.Flags);
		}

		public void valignq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Valignq_zmm_k1z_zmm_zmmm512b64_imm8, dst, src1, src2, imm), dst.Flags);
		}

		public void valignq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Valignq_xmm_k1z_xmm_xmmm128b64_imm8, register, register2, in memory, imm), dst.Flags | src2.Flags);
		}

		public void valignq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Valignq_ymm_k1z_ymm_ymmm256b64_imm8, register, register2, in memory, imm), dst.Flags | src2.Flags);
		}

		public void valignq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Valignq_zmm_k1z_zmm_zmmm512b64_imm8, register, register2, in memory, imm), dst.Flags | src2.Flags);
		}

		public void valignq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Valignq_xmm_k1z_xmm_xmmm128b64_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags);
		}

		public void valignq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Valignq_ymm_k1z_ymm_ymmm256b64_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags);
		}

		public void valignq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Valignq_zmm_k1z_zmm_zmmm512b64_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags);
		}

		public void valignq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Valignq_xmm_k1z_xmm_xmmm128b64_imm8, register, register2, in memory, (uint)imm), dst.Flags | src2.Flags);
		}

		public void valignq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Valignq_ymm_k1z_ymm_ymmm256b64_imm8, register, register2, in memory, (uint)imm), dst.Flags | src2.Flags);
		}

		public void valignq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Valignq_zmm_k1z_zmm_zmmm512b64_imm8, register, register2, in memory, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vandnpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vandnpd_xmm_xmm_xmmm128 : Code.EVEX_Vandnpd_xmm_k1z_xmm_xmmm128b64);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vandnpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vandnpd_ymm_ymm_ymmm256 : Code.EVEX_Vandnpd_ymm_k1z_ymm_ymmm256b64);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vandnpd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vandnpd_zmm_k1z_zmm_zmmm512b64, dst, src1, src2), dst.Flags);
		}

		public void vandnpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vandnpd_xmm_xmm_xmmm128 : Code.EVEX_Vandnpd_xmm_k1z_xmm_xmmm128b64) : Code.EVEX_Vandnpd_xmm_k1z_xmm_xmmm128b64);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vandnpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vandnpd_ymm_ymm_ymmm256 : Code.EVEX_Vandnpd_ymm_k1z_ymm_ymmm256b64) : Code.EVEX_Vandnpd_ymm_k1z_ymm_ymmm256b64);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vandnpd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vandnpd_zmm_k1z_zmm_zmmm512b64, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vandnps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vandnps_xmm_xmm_xmmm128 : Code.EVEX_Vandnps_xmm_k1z_xmm_xmmm128b32);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vandnps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vandnps_ymm_ymm_ymmm256 : Code.EVEX_Vandnps_ymm_k1z_ymm_ymmm256b32);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vandnps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vandnps_zmm_k1z_zmm_zmmm512b32, dst, src1, src2), dst.Flags);
		}

		public void vandnps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vandnps_xmm_xmm_xmmm128 : Code.EVEX_Vandnps_xmm_k1z_xmm_xmmm128b32) : Code.EVEX_Vandnps_xmm_k1z_xmm_xmmm128b32);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vandnps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vandnps_ymm_ymm_ymmm256 : Code.EVEX_Vandnps_ymm_k1z_ymm_ymmm256b32) : Code.EVEX_Vandnps_ymm_k1z_ymm_ymmm256b32);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vandnps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vandnps_zmm_k1z_zmm_zmmm512b32, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vandpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vandpd_xmm_xmm_xmmm128 : Code.EVEX_Vandpd_xmm_k1z_xmm_xmmm128b64);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vandpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vandpd_ymm_ymm_ymmm256 : Code.EVEX_Vandpd_ymm_k1z_ymm_ymmm256b64);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vandpd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vandpd_zmm_k1z_zmm_zmmm512b64, dst, src1, src2), dst.Flags);
		}

		public void vandpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vandpd_xmm_xmm_xmmm128 : Code.EVEX_Vandpd_xmm_k1z_xmm_xmmm128b64) : Code.EVEX_Vandpd_xmm_k1z_xmm_xmmm128b64);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vandpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vandpd_ymm_ymm_ymmm256 : Code.EVEX_Vandpd_ymm_k1z_ymm_ymmm256b64) : Code.EVEX_Vandpd_ymm_k1z_ymm_ymmm256b64);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vandpd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vandpd_zmm_k1z_zmm_zmmm512b64, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vandps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vandps_xmm_xmm_xmmm128 : Code.EVEX_Vandps_xmm_k1z_xmm_xmmm128b32);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vandps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vandps_ymm_ymm_ymmm256 : Code.EVEX_Vandps_ymm_k1z_ymm_ymmm256b32);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vandps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vandps_zmm_k1z_zmm_zmmm512b32, dst, src1, src2), dst.Flags);
		}

		public void vandps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vandps_xmm_xmm_xmmm128 : Code.EVEX_Vandps_xmm_k1z_xmm_xmmm128b32) : Code.EVEX_Vandps_xmm_k1z_xmm_xmmm128b32);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vandps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vandps_ymm_ymm_ymmm256 : Code.EVEX_Vandps_ymm_k1z_ymm_ymmm256b32) : Code.EVEX_Vandps_ymm_k1z_ymm_ymmm256b32);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vandps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vandps_zmm_k1z_zmm_zmmm512b32, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vbcstnebf162ps(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vbcstnebf162ps_xmm_m16, register, in memory));
		}

		public void vbcstnebf162ps(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vbcstnebf162ps_ymm_m16, register, in memory));
		}

		public void vbcstnesh2ps(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vbcstnesh2ps_xmm_m16, register, in memory));
		}

		public void vbcstnesh2ps(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vbcstnesh2ps_ymm_m16, register, in memory));
		}

		public void vblendmpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vblendmpd_xmm_k1z_xmm_xmmm128b64, dst, src1, src2), dst.Flags);
		}

		public void vblendmpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vblendmpd_ymm_k1z_ymm_ymmm256b64, dst, src1, src2), dst.Flags);
		}

		public void vblendmpd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vblendmpd_zmm_k1z_zmm_zmmm512b64, dst, src1, src2), dst.Flags);
		}

		public void vblendmpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vblendmpd_xmm_k1z_xmm_xmmm128b64, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vblendmpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vblendmpd_ymm_k1z_ymm_ymmm256b64, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vblendmpd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vblendmpd_zmm_k1z_zmm_zmmm512b64, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vblendmps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vblendmps_xmm_k1z_xmm_xmmm128b32, dst, src1, src2), dst.Flags);
		}

		public void vblendmps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vblendmps_ymm_k1z_ymm_ymmm256b32, dst, src1, src2), dst.Flags);
		}

		public void vblendmps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vblendmps_zmm_k1z_zmm_zmmm512b32, dst, src1, src2), dst.Flags);
		}

		public void vblendmps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vblendmps_xmm_k1z_xmm_xmmm128b32, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vblendmps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vblendmps_ymm_k1z_ymm_ymmm256b32, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vblendmps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vblendmps_zmm_k1z_zmm_zmmm512b32, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vblendpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vblendpd_xmm_xmm_xmmm128_imm8, dst, src1, src2, imm));
		}

		public void vblendpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vblendpd_ymm_ymm_ymmm256_imm8, dst, src1, src2, imm));
		}

		public void vblendpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vblendpd_xmm_xmm_xmmm128_imm8, register, register2, in memory, imm));
		}

		public void vblendpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vblendpd_ymm_ymm_ymmm256_imm8, register, register2, in memory, imm));
		}

		public void vblendpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vblendpd_xmm_xmm_xmmm128_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm));
		}

		public void vblendpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vblendpd_ymm_ymm_ymmm256_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm));
		}

		public void vblendpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vblendpd_xmm_xmm_xmmm128_imm8, register, register2, in memory, (uint)imm));
		}

		public void vblendpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vblendpd_ymm_ymm_ymmm256_imm8, register, register2, in memory, (uint)imm));
		}

		public void vblendps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vblendps_xmm_xmm_xmmm128_imm8, dst, src1, src2, imm));
		}

		public void vblendps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vblendps_ymm_ymm_ymmm256_imm8, dst, src1, src2, imm));
		}

		public void vblendps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vblendps_xmm_xmm_xmmm128_imm8, register, register2, in memory, imm));
		}

		public void vblendps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vblendps_ymm_ymm_ymmm256_imm8, register, register2, in memory, imm));
		}

		public void vblendps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vblendps_xmm_xmm_xmmm128_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm));
		}

		public void vblendps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vblendps_ymm_ymm_ymmm256_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm));
		}

		public void vblendps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vblendps_xmm_xmm_xmmm128_imm8, register, register2, in memory, (uint)imm));
		}

		public void vblendps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vblendps_ymm_ymm_ymmm256_imm8, register, register2, in memory, (uint)imm));
		}

		public void vblendvpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, AssemblerRegisterXMM src3)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vblendvpd_xmm_xmm_xmmm128_xmm, dst, src1, src2, src3));
		}

		public void vblendvpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, AssemblerRegisterXMM src3)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vblendvpd_xmm_xmm_xmmm128_xmm, register, register2, in memory, src3));
		}

		public void vblendvpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, AssemblerRegisterYMM src3)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vblendvpd_ymm_ymm_ymmm256_ymm, dst, src1, src2, src3));
		}

		public void vblendvpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, AssemblerRegisterYMM src3)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vblendvpd_ymm_ymm_ymmm256_ymm, register, register2, in memory, src3));
		}

		public void vblendvps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, AssemblerRegisterXMM src3)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vblendvps_xmm_xmm_xmmm128_xmm, dst, src1, src2, src3));
		}

		public void vblendvps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, AssemblerRegisterXMM src3)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vblendvps_xmm_xmm_xmmm128_xmm, register, register2, in memory, src3));
		}

		public void vblendvps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, AssemblerRegisterYMM src3)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vblendvps_ymm_ymm_ymmm256_ymm, dst, src1, src2, src3));
		}

		public void vblendvps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, AssemblerRegisterYMM src3)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vblendvps_ymm_ymm_ymmm256_ymm, register, register2, in memory, src3));
		}

		public void vbroadcastf128(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vbroadcastf128_ymm_m128, register, in memory));
		}

		public void vbroadcastf32x2(AssemblerRegisterYMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vbroadcastf32x2_ymm_k1z_xmmm64, dst, src), dst.Flags);
		}

		public void vbroadcastf32x2(AssemblerRegisterZMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vbroadcastf32x2_zmm_k1z_xmmm64, dst, src), dst.Flags);
		}

		public void vbroadcastf32x2(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vbroadcastf32x2_ymm_k1z_xmmm64, register, in memory), dst.Flags);
		}

		public void vbroadcastf32x2(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vbroadcastf32x2_zmm_k1z_xmmm64, register, in memory), dst.Flags);
		}

		public void vbroadcastf32x4(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vbroadcastf32x4_ymm_k1z_m128, register, in memory), dst.Flags);
		}

		public void vbroadcastf32x4(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vbroadcastf32x4_zmm_k1z_m128, register, in memory), dst.Flags);
		}

		public void vbroadcastf32x8(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vbroadcastf32x8_zmm_k1z_m256, register, in memory), dst.Flags);
		}

		public void vbroadcastf64x2(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vbroadcastf64x2_ymm_k1z_m128, register, in memory), dst.Flags);
		}

		public void vbroadcastf64x2(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vbroadcastf64x2_zmm_k1z_m128, register, in memory), dst.Flags);
		}

		public void vbroadcastf64x4(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vbroadcastf64x4_zmm_k1z_m256, register, in memory), dst.Flags);
		}

		public void vbroadcasti128(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vbroadcasti128_ymm_m128, register, in memory));
		}

		public void vbroadcasti32x2(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vbroadcasti32x2_xmm_k1z_xmmm64, dst, src), dst.Flags);
		}

		public void vbroadcasti32x2(AssemblerRegisterYMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vbroadcasti32x2_ymm_k1z_xmmm64, dst, src), dst.Flags);
		}

		public void vbroadcasti32x2(AssemblerRegisterZMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vbroadcasti32x2_zmm_k1z_xmmm64, dst, src), dst.Flags);
		}

		public void vbroadcasti32x2(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vbroadcasti32x2_xmm_k1z_xmmm64, register, in memory), dst.Flags);
		}

		public void vbroadcasti32x2(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vbroadcasti32x2_ymm_k1z_xmmm64, register, in memory), dst.Flags);
		}

		public void vbroadcasti32x2(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vbroadcasti32x2_zmm_k1z_xmmm64, register, in memory), dst.Flags);
		}

		public void vbroadcasti32x4(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vbroadcasti32x4_ymm_k1z_m128, register, in memory), dst.Flags);
		}

		public void vbroadcasti32x4(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vbroadcasti32x4_zmm_k1z_m128, register, in memory), dst.Flags);
		}

		public void vbroadcasti32x8(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vbroadcasti32x8_zmm_k1z_m256, register, in memory), dst.Flags);
		}

		public void vbroadcasti64x2(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vbroadcasti64x2_ymm_k1z_m128, register, in memory), dst.Flags);
		}

		public void vbroadcasti64x2(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vbroadcasti64x2_zmm_k1z_m128, register, in memory), dst.Flags);
		}

		public void vbroadcasti64x4(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vbroadcasti64x4_zmm_k1z_m256, register, in memory), dst.Flags);
		}

		public void vbroadcastsd(AssemblerRegisterYMM dst, AssemblerRegisterXMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vbroadcastsd_ymm_xmm : Code.EVEX_Vbroadcastsd_ymm_k1z_xmmm64);
			AddInstruction(Instruction.Create(code, dst, src), dst.Flags);
		}

		public void vbroadcastsd(AssemblerRegisterZMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vbroadcastsd_zmm_k1z_xmmm64, dst, src), dst.Flags);
		}

		public void vbroadcastsd(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vbroadcastsd_ymm_m64 : Code.EVEX_Vbroadcastsd_ymm_k1z_xmmm64);
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory), dst.Flags);
		}

		public void vbroadcastsd(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vbroadcastsd_zmm_k1z_xmmm64, register, in memory), dst.Flags);
		}

		public void vbroadcastss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vbroadcastss_xmm_xmm : Code.EVEX_Vbroadcastss_xmm_k1z_xmmm32);
			AddInstruction(Instruction.Create(code, dst, src), dst.Flags);
		}

		public void vbroadcastss(AssemblerRegisterYMM dst, AssemblerRegisterXMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vbroadcastss_ymm_xmm : Code.EVEX_Vbroadcastss_ymm_k1z_xmmm32);
			AddInstruction(Instruction.Create(code, dst, src), dst.Flags);
		}

		public void vbroadcastss(AssemblerRegisterZMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vbroadcastss_zmm_k1z_xmmm32, dst, src), dst.Flags);
		}

		public void vbroadcastss(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vbroadcastss_xmm_m32 : Code.EVEX_Vbroadcastss_xmm_k1z_xmmm32);
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory), dst.Flags);
		}

		public void vbroadcastss(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vbroadcastss_ymm_m32 : Code.EVEX_Vbroadcastss_ymm_k1z_xmmm32);
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory), dst.Flags);
		}

		public void vbroadcastss(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vbroadcastss_zmm_k1z_xmmm32, register, in memory), dst.Flags);
		}

		public void vcmpeq_ospd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmppd(dst, src1, src2, 16);
		}

		public void vcmpeq_ospd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmppd(dst, src1, src2, 16);
		}

		public void vcmpeq_ospd(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmppd(dst, src1, src2, 16);
		}

		public void vcmpeq_ospd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmppd(dst, src1, src2, 16);
		}

		public void vcmpeq_ospd(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vcmppd(dst, src1, src2, 16);
		}

		public void vcmpeq_ospd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 16);
		}

		public void vcmpeq_ospd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 16);
		}

		public void vcmpeq_ospd(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 16);
		}

		public void vcmpeq_ospd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 16);
		}

		public void vcmpeq_ospd(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 16);
		}

		public void vcmpeq_osph(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpph(dst, src1, src2, 16);
		}

		public void vcmpeq_osph(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmpph(dst, src1, src2, 16);
		}

		public void vcmpeq_osph(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vcmpph(dst, src1, src2, 16);
		}

		public void vcmpeq_osph(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpph(dst, src1, src2, 16);
		}

		public void vcmpeq_osph(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmpph(dst, src1, src2, 16);
		}

		public void vcmpeq_osph(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vcmpph(dst, src1, src2, 16);
		}

		public void vcmpeq_osps(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpps(dst, src1, src2, 16);
		}

		public void vcmpeq_osps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpps(dst, src1, src2, 16);
		}

		public void vcmpeq_osps(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmpps(dst, src1, src2, 16);
		}

		public void vcmpeq_osps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmpps(dst, src1, src2, 16);
		}

		public void vcmpeq_osps(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vcmpps(dst, src1, src2, 16);
		}

		public void vcmpeq_osps(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 16);
		}

		public void vcmpeq_osps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 16);
		}

		public void vcmpeq_osps(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 16);
		}

		public void vcmpeq_osps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 16);
		}

		public void vcmpeq_osps(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 16);
		}

		public void vcmpeq_ossd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpsd(dst, src1, src2, 16);
		}

		public void vcmpeq_ossd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpsd(dst, src1, src2, 16);
		}

		public void vcmpeq_ossd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpsd(dst, src1, src2, 16);
		}

		public void vcmpeq_ossd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpsd(dst, src1, src2, 16);
		}

		public void vcmpeq_ossh(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpsh(dst, src1, src2, 16);
		}

		public void vcmpeq_ossh(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpsh(dst, src1, src2, 16);
		}

		public void vcmpeq_osss(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpss(dst, src1, src2, 16);
		}

		public void vcmpeq_osss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpss(dst, src1, src2, 16);
		}

		public void vcmpeq_osss(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpss(dst, src1, src2, 16);
		}

		public void vcmpeq_osss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpss(dst, src1, src2, 16);
		}

		public void vcmpeq_uqpd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmppd(dst, src1, src2, 8);
		}

		public void vcmpeq_uqpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmppd(dst, src1, src2, 8);
		}

		public void vcmpeq_uqpd(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmppd(dst, src1, src2, 8);
		}

		public void vcmpeq_uqpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmppd(dst, src1, src2, 8);
		}

		public void vcmpeq_uqpd(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vcmppd(dst, src1, src2, 8);
		}

		public void vcmpeq_uqpd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 8);
		}

		public void vcmpeq_uqpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 8);
		}

		public void vcmpeq_uqpd(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 8);
		}

		public void vcmpeq_uqpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 8);
		}

		public void vcmpeq_uqpd(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 8);
		}

		public void vcmpeq_uqph(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpph(dst, src1, src2, 8);
		}

		public void vcmpeq_uqph(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmpph(dst, src1, src2, 8);
		}

		public void vcmpeq_uqph(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vcmpph(dst, src1, src2, 8);
		}

		public void vcmpeq_uqph(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpph(dst, src1, src2, 8);
		}

		public void vcmpeq_uqph(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmpph(dst, src1, src2, 8);
		}

		public void vcmpeq_uqph(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vcmpph(dst, src1, src2, 8);
		}

		public void vcmpeq_uqps(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpps(dst, src1, src2, 8);
		}

		public void vcmpeq_uqps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpps(dst, src1, src2, 8);
		}

		public void vcmpeq_uqps(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmpps(dst, src1, src2, 8);
		}

		public void vcmpeq_uqps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmpps(dst, src1, src2, 8);
		}

		public void vcmpeq_uqps(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vcmpps(dst, src1, src2, 8);
		}

		public void vcmpeq_uqps(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 8);
		}

		public void vcmpeq_uqps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 8);
		}

		public void vcmpeq_uqps(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 8);
		}

		public void vcmpeq_uqps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 8);
		}

		public void vcmpeq_uqps(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 8);
		}

		public void vcmpeq_uqsd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpsd(dst, src1, src2, 8);
		}

		public void vcmpeq_uqsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpsd(dst, src1, src2, 8);
		}

		public void vcmpeq_uqsd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpsd(dst, src1, src2, 8);
		}

		public void vcmpeq_uqsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpsd(dst, src1, src2, 8);
		}

		public void vcmpeq_uqsh(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpsh(dst, src1, src2, 8);
		}

		public void vcmpeq_uqsh(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpsh(dst, src1, src2, 8);
		}

		public void vcmpeq_uqss(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpss(dst, src1, src2, 8);
		}

		public void vcmpeq_uqss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpss(dst, src1, src2, 8);
		}

		public void vcmpeq_uqss(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpss(dst, src1, src2, 8);
		}

		public void vcmpeq_uqss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpss(dst, src1, src2, 8);
		}

		public void vcmpeq_uspd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmppd(dst, src1, src2, 24);
		}

		public void vcmpeq_uspd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmppd(dst, src1, src2, 24);
		}

		public void vcmpeq_uspd(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmppd(dst, src1, src2, 24);
		}

		public void vcmpeq_uspd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmppd(dst, src1, src2, 24);
		}

		public void vcmpeq_uspd(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vcmppd(dst, src1, src2, 24);
		}

		public void vcmpeq_uspd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 24);
		}

		public void vcmpeq_uspd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 24);
		}

		public void vcmpeq_uspd(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 24);
		}

		public void vcmpeq_uspd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 24);
		}

		public void vcmpeq_uspd(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 24);
		}

		public void vcmpeq_usph(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpph(dst, src1, src2, 24);
		}

		public void vcmpeq_usph(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmpph(dst, src1, src2, 24);
		}

		public void vcmpeq_usph(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vcmpph(dst, src1, src2, 24);
		}

		public void vcmpeq_usph(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpph(dst, src1, src2, 24);
		}

		public void vcmpeq_usph(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmpph(dst, src1, src2, 24);
		}

		public void vcmpeq_usph(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vcmpph(dst, src1, src2, 24);
		}

		public void vcmpeq_usps(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpps(dst, src1, src2, 24);
		}

		public void vcmpeq_usps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpps(dst, src1, src2, 24);
		}

		public void vcmpeq_usps(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmpps(dst, src1, src2, 24);
		}

		public void vcmpeq_usps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmpps(dst, src1, src2, 24);
		}

		public void vcmpeq_usps(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vcmpps(dst, src1, src2, 24);
		}

		public void vcmpeq_usps(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 24);
		}

		public void vcmpeq_usps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 24);
		}

		public void vcmpeq_usps(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 24);
		}

		public void vcmpeq_usps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 24);
		}

		public void vcmpeq_usps(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 24);
		}

		public void vcmpeq_ussd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpsd(dst, src1, src2, 24);
		}

		public void vcmpeq_ussd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpsd(dst, src1, src2, 24);
		}

		public void vcmpeq_ussd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpsd(dst, src1, src2, 24);
		}

		public void vcmpeq_ussd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpsd(dst, src1, src2, 24);
		}

		public void vcmpeq_ussh(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpsh(dst, src1, src2, 24);
		}

		public void vcmpeq_ussh(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpsh(dst, src1, src2, 24);
		}

		public void vcmpeq_usss(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpss(dst, src1, src2, 24);
		}

		public void vcmpeq_usss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpss(dst, src1, src2, 24);
		}

		public void vcmpeq_usss(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpss(dst, src1, src2, 24);
		}

		public void vcmpeq_usss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpss(dst, src1, src2, 24);
		}

		public void vcmpeqpd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmppd(dst, src1, src2, 0);
		}

		public void vcmpeqpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmppd(dst, src1, src2, 0);
		}

		public void vcmpeqpd(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmppd(dst, src1, src2, 0);
		}

		public void vcmpeqpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmppd(dst, src1, src2, 0);
		}

		public void vcmpeqpd(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vcmppd(dst, src1, src2, 0);
		}

		public void vcmpeqpd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 0);
		}

		public void vcmpeqpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 0);
		}

		public void vcmpeqpd(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 0);
		}

		public void vcmpeqpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 0);
		}

		public void vcmpeqpd(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 0);
		}

		public void vcmpeqph(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpph(dst, src1, src2, 0);
		}

		public void vcmpeqph(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmpph(dst, src1, src2, 0);
		}

		public void vcmpeqph(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vcmpph(dst, src1, src2, 0);
		}

		public void vcmpeqph(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpph(dst, src1, src2, 0);
		}

		public void vcmpeqph(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmpph(dst, src1, src2, 0);
		}

		public void vcmpeqph(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vcmpph(dst, src1, src2, 0);
		}

		public void vcmpeqps(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpps(dst, src1, src2, 0);
		}

		public void vcmpeqps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpps(dst, src1, src2, 0);
		}

		public void vcmpeqps(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmpps(dst, src1, src2, 0);
		}

		public void vcmpeqps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmpps(dst, src1, src2, 0);
		}

		public void vcmpeqps(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vcmpps(dst, src1, src2, 0);
		}

		public void vcmpeqps(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 0);
		}

		public void vcmpeqps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 0);
		}

		public void vcmpeqps(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 0);
		}

		public void vcmpeqps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 0);
		}

		public void vcmpeqps(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 0);
		}

		public void vcmpeqsd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpsd(dst, src1, src2, 0);
		}

		public void vcmpeqsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpsd(dst, src1, src2, 0);
		}

		public void vcmpeqsd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpsd(dst, src1, src2, 0);
		}

		public void vcmpeqsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpsd(dst, src1, src2, 0);
		}

		public void vcmpeqsh(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpsh(dst, src1, src2, 0);
		}

		public void vcmpeqsh(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpsh(dst, src1, src2, 0);
		}

		public void vcmpeqss(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpss(dst, src1, src2, 0);
		}

		public void vcmpeqss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpss(dst, src1, src2, 0);
		}

		public void vcmpeqss(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpss(dst, src1, src2, 0);
		}

		public void vcmpeqss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpss(dst, src1, src2, 0);
		}

		public void vcmpfalse_ospd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmppd(dst, src1, src2, 27);
		}

		public void vcmpfalse_ospd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmppd(dst, src1, src2, 27);
		}

		public void vcmpfalse_ospd(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmppd(dst, src1, src2, 27);
		}

		public void vcmpfalse_ospd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmppd(dst, src1, src2, 27);
		}

		public void vcmpfalse_ospd(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vcmppd(dst, src1, src2, 27);
		}

		public void vcmpfalse_ospd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 27);
		}

		public void vcmpfalse_ospd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 27);
		}

		public void vcmpfalse_ospd(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 27);
		}

		public void vcmpfalse_ospd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 27);
		}

		public void vcmpfalse_ospd(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 27);
		}

		public void vcmpfalse_osph(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpph(dst, src1, src2, 27);
		}

		public void vcmpfalse_osph(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmpph(dst, src1, src2, 27);
		}

		public void vcmpfalse_osph(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vcmpph(dst, src1, src2, 27);
		}

		public void vcmpfalse_osph(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpph(dst, src1, src2, 27);
		}

		public void vcmpfalse_osph(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmpph(dst, src1, src2, 27);
		}

		public void vcmpfalse_osph(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vcmpph(dst, src1, src2, 27);
		}

		public void vcmpfalse_osps(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpps(dst, src1, src2, 27);
		}

		public void vcmpfalse_osps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpps(dst, src1, src2, 27);
		}

		public void vcmpfalse_osps(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmpps(dst, src1, src2, 27);
		}

		public void vcmpfalse_osps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmpps(dst, src1, src2, 27);
		}

		public void vcmpfalse_osps(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vcmpps(dst, src1, src2, 27);
		}

		public void vcmpfalse_osps(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 27);
		}

		public void vcmpfalse_osps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 27);
		}

		public void vcmpfalse_osps(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 27);
		}

		public void vcmpfalse_osps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 27);
		}

		public void vcmpfalse_osps(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 27);
		}

		public void vcmpfalse_ossd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpsd(dst, src1, src2, 27);
		}

		public void vcmpfalse_ossd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpsd(dst, src1, src2, 27);
		}

		public void vcmpfalse_ossd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpsd(dst, src1, src2, 27);
		}

		public void vcmpfalse_ossd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpsd(dst, src1, src2, 27);
		}

		public void vcmpfalse_ossh(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpsh(dst, src1, src2, 27);
		}

		public void vcmpfalse_ossh(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpsh(dst, src1, src2, 27);
		}

		public void vcmpfalse_osss(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpss(dst, src1, src2, 27);
		}

		public void vcmpfalse_osss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpss(dst, src1, src2, 27);
		}

		public void vcmpfalse_osss(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpss(dst, src1, src2, 27);
		}

		public void vcmpfalse_osss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpss(dst, src1, src2, 27);
		}

		public void vcmpfalsepd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmppd(dst, src1, src2, 11);
		}

		public void vcmpfalsepd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmppd(dst, src1, src2, 11);
		}

		public void vcmpfalsepd(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmppd(dst, src1, src2, 11);
		}

		public void vcmpfalsepd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmppd(dst, src1, src2, 11);
		}

		public void vcmpfalsepd(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vcmppd(dst, src1, src2, 11);
		}

		public void vcmpfalsepd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 11);
		}

		public void vcmpfalsepd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 11);
		}

		public void vcmpfalsepd(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 11);
		}

		public void vcmpfalsepd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 11);
		}

		public void vcmpfalsepd(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 11);
		}

		public void vcmpfalseph(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpph(dst, src1, src2, 11);
		}

		public void vcmpfalseph(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmpph(dst, src1, src2, 11);
		}

		public void vcmpfalseph(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vcmpph(dst, src1, src2, 11);
		}

		public void vcmpfalseph(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpph(dst, src1, src2, 11);
		}

		public void vcmpfalseph(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmpph(dst, src1, src2, 11);
		}

		public void vcmpfalseph(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vcmpph(dst, src1, src2, 11);
		}

		public void vcmpfalseps(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpps(dst, src1, src2, 11);
		}

		public void vcmpfalseps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpps(dst, src1, src2, 11);
		}

		public void vcmpfalseps(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmpps(dst, src1, src2, 11);
		}

		public void vcmpfalseps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmpps(dst, src1, src2, 11);
		}

		public void vcmpfalseps(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vcmpps(dst, src1, src2, 11);
		}

		public void vcmpfalseps(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 11);
		}

		public void vcmpfalseps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 11);
		}

		public void vcmpfalseps(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 11);
		}

		public void vcmpfalseps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 11);
		}

		public void vcmpfalseps(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 11);
		}

		public void vcmpfalsesd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpsd(dst, src1, src2, 11);
		}

		public void vcmpfalsesd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpsd(dst, src1, src2, 11);
		}

		public void vcmpfalsesd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpsd(dst, src1, src2, 11);
		}

		public void vcmpfalsesd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpsd(dst, src1, src2, 11);
		}

		public void vcmpfalsesh(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpsh(dst, src1, src2, 11);
		}

		public void vcmpfalsesh(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpsh(dst, src1, src2, 11);
		}

		public void vcmpfalsess(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpss(dst, src1, src2, 11);
		}

		public void vcmpfalsess(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpss(dst, src1, src2, 11);
		}

		public void vcmpfalsess(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpss(dst, src1, src2, 11);
		}

		public void vcmpfalsess(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpss(dst, src1, src2, 11);
		}

		public void vcmpge_oqpd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmppd(dst, src1, src2, 29);
		}

		public void vcmpge_oqpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmppd(dst, src1, src2, 29);
		}

		public void vcmpge_oqpd(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmppd(dst, src1, src2, 29);
		}

		public void vcmpge_oqpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmppd(dst, src1, src2, 29);
		}

		public void vcmpge_oqpd(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vcmppd(dst, src1, src2, 29);
		}

		public void vcmpge_oqpd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 29);
		}

		public void vcmpge_oqpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 29);
		}

		public void vcmpge_oqpd(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 29);
		}

		public void vcmpge_oqpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 29);
		}

		public void vcmpge_oqpd(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 29);
		}

		public void vcmpge_oqph(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpph(dst, src1, src2, 29);
		}

		public void vcmpge_oqph(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmpph(dst, src1, src2, 29);
		}

		public void vcmpge_oqph(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vcmpph(dst, src1, src2, 29);
		}

		public void vcmpge_oqph(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpph(dst, src1, src2, 29);
		}

		public void vcmpge_oqph(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmpph(dst, src1, src2, 29);
		}

		public void vcmpge_oqph(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vcmpph(dst, src1, src2, 29);
		}

		public void vcmpge_oqps(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpps(dst, src1, src2, 29);
		}

		public void vcmpge_oqps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpps(dst, src1, src2, 29);
		}

		public void vcmpge_oqps(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmpps(dst, src1, src2, 29);
		}

		public void vcmpge_oqps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmpps(dst, src1, src2, 29);
		}

		public void vcmpge_oqps(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vcmpps(dst, src1, src2, 29);
		}

		public void vcmpge_oqps(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 29);
		}

		public void vcmpge_oqps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 29);
		}

		public void vcmpge_oqps(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 29);
		}

		public void vcmpge_oqps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 29);
		}

		public void vcmpge_oqps(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 29);
		}

		public void vcmpge_oqsd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpsd(dst, src1, src2, 29);
		}

		public void vcmpge_oqsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpsd(dst, src1, src2, 29);
		}

		public void vcmpge_oqsd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpsd(dst, src1, src2, 29);
		}

		public void vcmpge_oqsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpsd(dst, src1, src2, 29);
		}

		public void vcmpge_oqsh(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpsh(dst, src1, src2, 29);
		}

		public void vcmpge_oqsh(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpsh(dst, src1, src2, 29);
		}

		public void vcmpge_oqss(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpss(dst, src1, src2, 29);
		}

		public void vcmpge_oqss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpss(dst, src1, src2, 29);
		}

		public void vcmpge_oqss(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpss(dst, src1, src2, 29);
		}

		public void vcmpge_oqss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpss(dst, src1, src2, 29);
		}

		public void vcmpgepd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmppd(dst, src1, src2, 13);
		}

		public void vcmpgepd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmppd(dst, src1, src2, 13);
		}

		public void vcmpgepd(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmppd(dst, src1, src2, 13);
		}

		public void vcmpgepd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmppd(dst, src1, src2, 13);
		}

		public void vcmpgepd(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vcmppd(dst, src1, src2, 13);
		}

		public void vcmpgepd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 13);
		}

		public void vcmpgepd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 13);
		}

		public void vcmpgepd(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 13);
		}

		public void vcmpgepd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 13);
		}

		public void vcmpgepd(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 13);
		}

		public void vcmpgeph(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpph(dst, src1, src2, 13);
		}

		public void vcmpgeph(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmpph(dst, src1, src2, 13);
		}

		public void vcmpgeph(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vcmpph(dst, src1, src2, 13);
		}

		public void vcmpgeph(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpph(dst, src1, src2, 13);
		}

		public void vcmpgeph(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmpph(dst, src1, src2, 13);
		}

		public void vcmpgeph(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vcmpph(dst, src1, src2, 13);
		}

		public void vcmpgeps(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpps(dst, src1, src2, 13);
		}

		public void vcmpgeps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpps(dst, src1, src2, 13);
		}

		public void vcmpgeps(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmpps(dst, src1, src2, 13);
		}

		public void vcmpgeps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmpps(dst, src1, src2, 13);
		}

		public void vcmpgeps(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vcmpps(dst, src1, src2, 13);
		}

		public void vcmpgeps(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 13);
		}

		public void vcmpgeps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 13);
		}

		public void vcmpgeps(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 13);
		}

		public void vcmpgeps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 13);
		}

		public void vcmpgeps(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 13);
		}

		public void vcmpgesd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpsd(dst, src1, src2, 13);
		}

		public void vcmpgesd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpsd(dst, src1, src2, 13);
		}

		public void vcmpgesd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpsd(dst, src1, src2, 13);
		}

		public void vcmpgesd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpsd(dst, src1, src2, 13);
		}

		public void vcmpgesh(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpsh(dst, src1, src2, 13);
		}

		public void vcmpgesh(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpsh(dst, src1, src2, 13);
		}

		public void vcmpgess(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpss(dst, src1, src2, 13);
		}

		public void vcmpgess(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpss(dst, src1, src2, 13);
		}

		public void vcmpgess(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpss(dst, src1, src2, 13);
		}

		public void vcmpgess(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpss(dst, src1, src2, 13);
		}

		public void vcmpgt_oqpd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmppd(dst, src1, src2, 30);
		}

		public void vcmpgt_oqpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmppd(dst, src1, src2, 30);
		}

		public void vcmpgt_oqpd(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmppd(dst, src1, src2, 30);
		}

		public void vcmpgt_oqpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmppd(dst, src1, src2, 30);
		}

		public void vcmpgt_oqpd(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vcmppd(dst, src1, src2, 30);
		}

		public void vcmpgt_oqpd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 30);
		}

		public void vcmpgt_oqpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 30);
		}

		public void vcmpgt_oqpd(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 30);
		}

		public void vcmpgt_oqpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 30);
		}

		public void vcmpgt_oqpd(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 30);
		}

		public void vcmpgt_oqph(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpph(dst, src1, src2, 30);
		}

		public void vcmpgt_oqph(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmpph(dst, src1, src2, 30);
		}

		public void vcmpgt_oqph(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vcmpph(dst, src1, src2, 30);
		}

		public void vcmpgt_oqph(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpph(dst, src1, src2, 30);
		}

		public void vcmpgt_oqph(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmpph(dst, src1, src2, 30);
		}

		public void vcmpgt_oqph(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vcmpph(dst, src1, src2, 30);
		}

		public void vcmpgt_oqps(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpps(dst, src1, src2, 30);
		}

		public void vcmpgt_oqps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpps(dst, src1, src2, 30);
		}

		public void vcmpgt_oqps(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmpps(dst, src1, src2, 30);
		}

		public void vcmpgt_oqps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmpps(dst, src1, src2, 30);
		}

		public void vcmpgt_oqps(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vcmpps(dst, src1, src2, 30);
		}

		public void vcmpgt_oqps(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 30);
		}

		public void vcmpgt_oqps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 30);
		}

		public void vcmpgt_oqps(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 30);
		}

		public void vcmpgt_oqps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 30);
		}

		public void vcmpgt_oqps(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 30);
		}

		public void vcmpgt_oqsd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpsd(dst, src1, src2, 30);
		}

		public void vcmpgt_oqsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpsd(dst, src1, src2, 30);
		}

		public void vcmpgt_oqsd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpsd(dst, src1, src2, 30);
		}

		public void vcmpgt_oqsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpsd(dst, src1, src2, 30);
		}

		public void vcmpgt_oqsh(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpsh(dst, src1, src2, 30);
		}

		public void vcmpgt_oqsh(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpsh(dst, src1, src2, 30);
		}

		public void vcmpgt_oqss(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpss(dst, src1, src2, 30);
		}

		public void vcmpgt_oqss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpss(dst, src1, src2, 30);
		}

		public void vcmpgt_oqss(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpss(dst, src1, src2, 30);
		}

		public void vcmpgt_oqss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpss(dst, src1, src2, 30);
		}

		public void vcmpgtpd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmppd(dst, src1, src2, 14);
		}

		public void vcmpgtpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmppd(dst, src1, src2, 14);
		}

		public void vcmpgtpd(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmppd(dst, src1, src2, 14);
		}

		public void vcmpgtpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmppd(dst, src1, src2, 14);
		}

		public void vcmpgtpd(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vcmppd(dst, src1, src2, 14);
		}

		public void vcmpgtpd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 14);
		}

		public void vcmpgtpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 14);
		}

		public void vcmpgtpd(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 14);
		}

		public void vcmpgtpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 14);
		}

		public void vcmpgtpd(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 14);
		}

		public void vcmpgtph(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpph(dst, src1, src2, 14);
		}

		public void vcmpgtph(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmpph(dst, src1, src2, 14);
		}

		public void vcmpgtph(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vcmpph(dst, src1, src2, 14);
		}

		public void vcmpgtph(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpph(dst, src1, src2, 14);
		}

		public void vcmpgtph(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmpph(dst, src1, src2, 14);
		}

		public void vcmpgtph(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vcmpph(dst, src1, src2, 14);
		}

		public void vcmpgtps(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpps(dst, src1, src2, 14);
		}

		public void vcmpgtps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpps(dst, src1, src2, 14);
		}

		public void vcmpgtps(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmpps(dst, src1, src2, 14);
		}

		public void vcmpgtps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmpps(dst, src1, src2, 14);
		}

		public void vcmpgtps(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vcmpps(dst, src1, src2, 14);
		}

		public void vcmpgtps(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 14);
		}

		public void vcmpgtps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 14);
		}

		public void vcmpgtps(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 14);
		}

		public void vcmpgtps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 14);
		}

		public void vcmpgtps(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 14);
		}

		public void vcmpgtsd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpsd(dst, src1, src2, 14);
		}

		public void vcmpgtsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpsd(dst, src1, src2, 14);
		}

		public void vcmpgtsd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpsd(dst, src1, src2, 14);
		}

		public void vcmpgtsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpsd(dst, src1, src2, 14);
		}

		public void vcmpgtsh(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpsh(dst, src1, src2, 14);
		}

		public void vcmpgtsh(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpsh(dst, src1, src2, 14);
		}

		public void vcmpgtss(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpss(dst, src1, src2, 14);
		}

		public void vcmpgtss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpss(dst, src1, src2, 14);
		}

		public void vcmpgtss(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpss(dst, src1, src2, 14);
		}

		public void vcmpgtss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpss(dst, src1, src2, 14);
		}

		public void vcmple_oqpd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmppd(dst, src1, src2, 18);
		}

		public void vcmple_oqpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmppd(dst, src1, src2, 18);
		}

		public void vcmple_oqpd(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmppd(dst, src1, src2, 18);
		}

		public void vcmple_oqpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmppd(dst, src1, src2, 18);
		}

		public void vcmple_oqpd(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vcmppd(dst, src1, src2, 18);
		}

		public void vcmple_oqpd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 18);
		}

		public void vcmple_oqpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 18);
		}

		public void vcmple_oqpd(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 18);
		}

		public void vcmple_oqpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 18);
		}

		public void vcmple_oqpd(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 18);
		}

		public void vcmple_oqph(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpph(dst, src1, src2, 18);
		}

		public void vcmple_oqph(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmpph(dst, src1, src2, 18);
		}

		public void vcmple_oqph(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vcmpph(dst, src1, src2, 18);
		}

		public void vcmple_oqph(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpph(dst, src1, src2, 18);
		}

		public void vcmple_oqph(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmpph(dst, src1, src2, 18);
		}

		public void vcmple_oqph(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vcmpph(dst, src1, src2, 18);
		}

		public void vcmple_oqps(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpps(dst, src1, src2, 18);
		}

		public void vcmple_oqps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpps(dst, src1, src2, 18);
		}

		public void vcmple_oqps(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmpps(dst, src1, src2, 18);
		}

		public void vcmple_oqps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmpps(dst, src1, src2, 18);
		}

		public void vcmple_oqps(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vcmpps(dst, src1, src2, 18);
		}

		public void vcmple_oqps(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 18);
		}

		public void vcmple_oqps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 18);
		}

		public void vcmple_oqps(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 18);
		}

		public void vcmple_oqps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 18);
		}

		public void vcmple_oqps(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 18);
		}

		public void vcmple_oqsd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpsd(dst, src1, src2, 18);
		}

		public void vcmple_oqsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpsd(dst, src1, src2, 18);
		}

		public void vcmple_oqsd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpsd(dst, src1, src2, 18);
		}

		public void vcmple_oqsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpsd(dst, src1, src2, 18);
		}

		public void vcmple_oqsh(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpsh(dst, src1, src2, 18);
		}

		public void vcmple_oqsh(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpsh(dst, src1, src2, 18);
		}

		public void vcmple_oqss(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpss(dst, src1, src2, 18);
		}

		public void vcmple_oqss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpss(dst, src1, src2, 18);
		}

		public void vcmple_oqss(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpss(dst, src1, src2, 18);
		}

		public void vcmple_oqss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpss(dst, src1, src2, 18);
		}

		public void vcmplepd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmppd(dst, src1, src2, 2);
		}

		public void vcmplepd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmppd(dst, src1, src2, 2);
		}

		public void vcmplepd(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmppd(dst, src1, src2, 2);
		}

		public void vcmplepd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmppd(dst, src1, src2, 2);
		}

		public void vcmplepd(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vcmppd(dst, src1, src2, 2);
		}

		public void vcmplepd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 2);
		}

		public void vcmplepd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 2);
		}

		public void vcmplepd(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 2);
		}

		public void vcmplepd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 2);
		}

		public void vcmplepd(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 2);
		}

		public void vcmpleph(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpph(dst, src1, src2, 2);
		}

		public void vcmpleph(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmpph(dst, src1, src2, 2);
		}

		public void vcmpleph(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vcmpph(dst, src1, src2, 2);
		}

		public void vcmpleph(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpph(dst, src1, src2, 2);
		}

		public void vcmpleph(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmpph(dst, src1, src2, 2);
		}

		public void vcmpleph(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vcmpph(dst, src1, src2, 2);
		}

		public void vcmpleps(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpps(dst, src1, src2, 2);
		}

		public void vcmpleps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpps(dst, src1, src2, 2);
		}

		public void vcmpleps(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmpps(dst, src1, src2, 2);
		}

		public void vcmpleps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmpps(dst, src1, src2, 2);
		}

		public void vcmpleps(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vcmpps(dst, src1, src2, 2);
		}

		public void vcmpleps(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 2);
		}

		public void vcmpleps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 2);
		}

		public void vcmpleps(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 2);
		}

		public void vcmpleps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 2);
		}

		public void vcmpleps(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 2);
		}

		public void vcmplesd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpsd(dst, src1, src2, 2);
		}

		public void vcmplesd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpsd(dst, src1, src2, 2);
		}

		public void vcmplesd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpsd(dst, src1, src2, 2);
		}

		public void vcmplesd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpsd(dst, src1, src2, 2);
		}

		public void vcmplesh(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpsh(dst, src1, src2, 2);
		}

		public void vcmplesh(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpsh(dst, src1, src2, 2);
		}

		public void vcmpless(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpss(dst, src1, src2, 2);
		}

		public void vcmpless(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpss(dst, src1, src2, 2);
		}

		public void vcmpless(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpss(dst, src1, src2, 2);
		}

		public void vcmpless(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpss(dst, src1, src2, 2);
		}

		public void vcmplt_oqpd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmppd(dst, src1, src2, 17);
		}

		public void vcmplt_oqpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmppd(dst, src1, src2, 17);
		}

		public void vcmplt_oqpd(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmppd(dst, src1, src2, 17);
		}

		public void vcmplt_oqpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmppd(dst, src1, src2, 17);
		}

		public void vcmplt_oqpd(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vcmppd(dst, src1, src2, 17);
		}

		public void vcmplt_oqpd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 17);
		}

		public void vcmplt_oqpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 17);
		}

		public void vcmplt_oqpd(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 17);
		}

		public void vcmplt_oqpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 17);
		}

		public void vcmplt_oqpd(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 17);
		}

		public void vcmplt_oqph(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpph(dst, src1, src2, 17);
		}

		public void vcmplt_oqph(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmpph(dst, src1, src2, 17);
		}

		public void vcmplt_oqph(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vcmpph(dst, src1, src2, 17);
		}

		public void vcmplt_oqph(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpph(dst, src1, src2, 17);
		}

		public void vcmplt_oqph(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmpph(dst, src1, src2, 17);
		}

		public void vcmplt_oqph(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vcmpph(dst, src1, src2, 17);
		}

		public void vcmplt_oqps(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpps(dst, src1, src2, 17);
		}

		public void vcmplt_oqps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpps(dst, src1, src2, 17);
		}

		public void vcmplt_oqps(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmpps(dst, src1, src2, 17);
		}

		public void vcmplt_oqps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmpps(dst, src1, src2, 17);
		}

		public void vcmplt_oqps(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vcmpps(dst, src1, src2, 17);
		}

		public void vcmplt_oqps(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 17);
		}

		public void vcmplt_oqps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 17);
		}

		public void vcmplt_oqps(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 17);
		}

		public void vcmplt_oqps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 17);
		}

		public void vcmplt_oqps(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 17);
		}

		public void vcmplt_oqsd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpsd(dst, src1, src2, 17);
		}

		public void vcmplt_oqsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpsd(dst, src1, src2, 17);
		}

		public void vcmplt_oqsd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpsd(dst, src1, src2, 17);
		}

		public void vcmplt_oqsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpsd(dst, src1, src2, 17);
		}

		public void vcmplt_oqsh(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpsh(dst, src1, src2, 17);
		}

		public void vcmplt_oqsh(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpsh(dst, src1, src2, 17);
		}

		public void vcmplt_oqss(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpss(dst, src1, src2, 17);
		}

		public void vcmplt_oqss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpss(dst, src1, src2, 17);
		}

		public void vcmplt_oqss(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpss(dst, src1, src2, 17);
		}

		public void vcmplt_oqss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpss(dst, src1, src2, 17);
		}

		public void vcmpltpd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmppd(dst, src1, src2, 1);
		}

		public void vcmpltpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmppd(dst, src1, src2, 1);
		}

		public void vcmpltpd(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmppd(dst, src1, src2, 1);
		}

		public void vcmpltpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmppd(dst, src1, src2, 1);
		}

		public void vcmpltpd(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vcmppd(dst, src1, src2, 1);
		}

		public void vcmpltpd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 1);
		}

		public void vcmpltpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 1);
		}

		public void vcmpltpd(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 1);
		}

		public void vcmpltpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 1);
		}

		public void vcmpltpd(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 1);
		}

		public void vcmpltph(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpph(dst, src1, src2, 1);
		}

		public void vcmpltph(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmpph(dst, src1, src2, 1);
		}

		public void vcmpltph(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vcmpph(dst, src1, src2, 1);
		}

		public void vcmpltph(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpph(dst, src1, src2, 1);
		}

		public void vcmpltph(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmpph(dst, src1, src2, 1);
		}

		public void vcmpltph(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vcmpph(dst, src1, src2, 1);
		}

		public void vcmpltps(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpps(dst, src1, src2, 1);
		}

		public void vcmpltps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpps(dst, src1, src2, 1);
		}

		public void vcmpltps(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmpps(dst, src1, src2, 1);
		}

		public void vcmpltps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmpps(dst, src1, src2, 1);
		}

		public void vcmpltps(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vcmpps(dst, src1, src2, 1);
		}

		public void vcmpltps(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 1);
		}

		public void vcmpltps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 1);
		}

		public void vcmpltps(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 1);
		}

		public void vcmpltps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 1);
		}

		public void vcmpltps(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 1);
		}

		public void vcmpltsd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpsd(dst, src1, src2, 1);
		}

		public void vcmpltsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpsd(dst, src1, src2, 1);
		}

		public void vcmpltsd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpsd(dst, src1, src2, 1);
		}

		public void vcmpltsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpsd(dst, src1, src2, 1);
		}

		public void vcmpltsh(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpsh(dst, src1, src2, 1);
		}

		public void vcmpltsh(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpsh(dst, src1, src2, 1);
		}

		public void vcmpltss(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpss(dst, src1, src2, 1);
		}

		public void vcmpltss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpss(dst, src1, src2, 1);
		}

		public void vcmpltss(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpss(dst, src1, src2, 1);
		}

		public void vcmpltss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpss(dst, src1, src2, 1);
		}

		public void vcmpneq_oqpd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmppd(dst, src1, src2, 12);
		}

		public void vcmpneq_oqpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmppd(dst, src1, src2, 12);
		}

		public void vcmpneq_oqpd(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmppd(dst, src1, src2, 12);
		}

		public void vcmpneq_oqpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmppd(dst, src1, src2, 12);
		}

		public void vcmpneq_oqpd(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vcmppd(dst, src1, src2, 12);
		}

		public void vcmpneq_oqpd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 12);
		}

		public void vcmpneq_oqpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 12);
		}

		public void vcmpneq_oqpd(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 12);
		}

		public void vcmpneq_oqpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 12);
		}

		public void vcmpneq_oqpd(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 12);
		}

		public void vcmpneq_oqph(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpph(dst, src1, src2, 12);
		}

		public void vcmpneq_oqph(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmpph(dst, src1, src2, 12);
		}

		public void vcmpneq_oqph(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vcmpph(dst, src1, src2, 12);
		}

		public void vcmpneq_oqph(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpph(dst, src1, src2, 12);
		}

		public void vcmpneq_oqph(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmpph(dst, src1, src2, 12);
		}

		public void vcmpneq_oqph(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vcmpph(dst, src1, src2, 12);
		}

		public void vcmpneq_oqps(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpps(dst, src1, src2, 12);
		}

		public void vcmpneq_oqps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpps(dst, src1, src2, 12);
		}

		public void vcmpneq_oqps(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmpps(dst, src1, src2, 12);
		}

		public void vcmpneq_oqps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmpps(dst, src1, src2, 12);
		}

		public void vcmpneq_oqps(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vcmpps(dst, src1, src2, 12);
		}

		public void vcmpneq_oqps(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 12);
		}

		public void vcmpneq_oqps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 12);
		}

		public void vcmpneq_oqps(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 12);
		}

		public void vcmpneq_oqps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 12);
		}

		public void vcmpneq_oqps(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 12);
		}

		public void vcmpneq_oqsd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpsd(dst, src1, src2, 12);
		}

		public void vcmpneq_oqsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpsd(dst, src1, src2, 12);
		}

		public void vcmpneq_oqsd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpsd(dst, src1, src2, 12);
		}

		public void vcmpneq_oqsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpsd(dst, src1, src2, 12);
		}

		public void vcmpneq_oqsh(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpsh(dst, src1, src2, 12);
		}

		public void vcmpneq_oqsh(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpsh(dst, src1, src2, 12);
		}

		public void vcmpneq_oqss(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpss(dst, src1, src2, 12);
		}

		public void vcmpneq_oqss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpss(dst, src1, src2, 12);
		}

		public void vcmpneq_oqss(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpss(dst, src1, src2, 12);
		}

		public void vcmpneq_oqss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpss(dst, src1, src2, 12);
		}

		public void vcmpneq_ospd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmppd(dst, src1, src2, 28);
		}

		public void vcmpneq_ospd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmppd(dst, src1, src2, 28);
		}

		public void vcmpneq_ospd(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmppd(dst, src1, src2, 28);
		}

		public void vcmpneq_ospd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmppd(dst, src1, src2, 28);
		}

		public void vcmpneq_ospd(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vcmppd(dst, src1, src2, 28);
		}

		public void vcmpneq_ospd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 28);
		}

		public void vcmpneq_ospd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 28);
		}

		public void vcmpneq_ospd(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 28);
		}

		public void vcmpneq_ospd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 28);
		}

		public void vcmpneq_ospd(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 28);
		}

		public void vcmpneq_osph(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpph(dst, src1, src2, 28);
		}

		public void vcmpneq_osph(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmpph(dst, src1, src2, 28);
		}

		public void vcmpneq_osph(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vcmpph(dst, src1, src2, 28);
		}

		public void vcmpneq_osph(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpph(dst, src1, src2, 28);
		}

		public void vcmpneq_osph(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmpph(dst, src1, src2, 28);
		}

		public void vcmpneq_osph(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vcmpph(dst, src1, src2, 28);
		}

		public void vcmpneq_osps(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpps(dst, src1, src2, 28);
		}

		public void vcmpneq_osps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpps(dst, src1, src2, 28);
		}

		public void vcmpneq_osps(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmpps(dst, src1, src2, 28);
		}

		public void vcmpneq_osps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmpps(dst, src1, src2, 28);
		}

		public void vcmpneq_osps(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vcmpps(dst, src1, src2, 28);
		}

		public void vcmpneq_osps(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 28);
		}

		public void vcmpneq_osps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 28);
		}

		public void vcmpneq_osps(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 28);
		}

		public void vcmpneq_osps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 28);
		}

		public void vcmpneq_osps(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 28);
		}

		public void vcmpneq_ossd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpsd(dst, src1, src2, 28);
		}

		public void vcmpneq_ossd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpsd(dst, src1, src2, 28);
		}

		public void vcmpneq_ossd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpsd(dst, src1, src2, 28);
		}

		public void vcmpneq_ossd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpsd(dst, src1, src2, 28);
		}

		public void vcmpneq_ossh(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpsh(dst, src1, src2, 28);
		}

		public void vcmpneq_ossh(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpsh(dst, src1, src2, 28);
		}

		public void vcmpneq_osss(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpss(dst, src1, src2, 28);
		}

		public void vcmpneq_osss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpss(dst, src1, src2, 28);
		}

		public void vcmpneq_osss(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpss(dst, src1, src2, 28);
		}

		public void vcmpneq_osss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpss(dst, src1, src2, 28);
		}

		public void vcmpneq_uspd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmppd(dst, src1, src2, 20);
		}

		public void vcmpneq_uspd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmppd(dst, src1, src2, 20);
		}

		public void vcmpneq_uspd(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmppd(dst, src1, src2, 20);
		}

		public void vcmpneq_uspd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmppd(dst, src1, src2, 20);
		}

		public void vcmpneq_uspd(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vcmppd(dst, src1, src2, 20);
		}

		public void vcmpneq_uspd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 20);
		}

		public void vcmpneq_uspd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 20);
		}

		public void vcmpneq_uspd(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 20);
		}

		public void vcmpneq_uspd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 20);
		}

		public void vcmpneq_uspd(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 20);
		}

		public void vcmpneq_usph(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpph(dst, src1, src2, 20);
		}

		public void vcmpneq_usph(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmpph(dst, src1, src2, 20);
		}

		public void vcmpneq_usph(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vcmpph(dst, src1, src2, 20);
		}

		public void vcmpneq_usph(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpph(dst, src1, src2, 20);
		}

		public void vcmpneq_usph(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmpph(dst, src1, src2, 20);
		}

		public void vcmpneq_usph(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vcmpph(dst, src1, src2, 20);
		}

		public void vcmpneq_usps(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpps(dst, src1, src2, 20);
		}

		public void vcmpneq_usps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpps(dst, src1, src2, 20);
		}

		public void vcmpneq_usps(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmpps(dst, src1, src2, 20);
		}

		public void vcmpneq_usps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmpps(dst, src1, src2, 20);
		}

		public void vcmpneq_usps(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vcmpps(dst, src1, src2, 20);
		}

		public void vcmpneq_usps(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 20);
		}

		public void vcmpneq_usps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 20);
		}

		public void vcmpneq_usps(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 20);
		}

		public void vcmpneq_usps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 20);
		}

		public void vcmpneq_usps(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 20);
		}

		public void vcmpneq_ussd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpsd(dst, src1, src2, 20);
		}

		public void vcmpneq_ussd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpsd(dst, src1, src2, 20);
		}

		public void vcmpneq_ussd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpsd(dst, src1, src2, 20);
		}

		public void vcmpneq_ussd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpsd(dst, src1, src2, 20);
		}

		public void vcmpneq_ussh(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpsh(dst, src1, src2, 20);
		}

		public void vcmpneq_ussh(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpsh(dst, src1, src2, 20);
		}

		public void vcmpneq_usss(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpss(dst, src1, src2, 20);
		}

		public void vcmpneq_usss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpss(dst, src1, src2, 20);
		}

		public void vcmpneq_usss(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpss(dst, src1, src2, 20);
		}

		public void vcmpneq_usss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpss(dst, src1, src2, 20);
		}

		public void vcmpneqpd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmppd(dst, src1, src2, 4);
		}

		public void vcmpneqpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmppd(dst, src1, src2, 4);
		}

		public void vcmpneqpd(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmppd(dst, src1, src2, 4);
		}

		public void vcmpneqpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmppd(dst, src1, src2, 4);
		}

		public void vcmpneqpd(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vcmppd(dst, src1, src2, 4);
		}

		public void vcmpneqpd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 4);
		}

		public void vcmpneqpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 4);
		}

		public void vcmpneqpd(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 4);
		}

		public void vcmpneqpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 4);
		}

		public void vcmpneqpd(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 4);
		}

		public void vcmpneqph(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpph(dst, src1, src2, 4);
		}

		public void vcmpneqph(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmpph(dst, src1, src2, 4);
		}

		public void vcmpneqph(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vcmpph(dst, src1, src2, 4);
		}

		public void vcmpneqph(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpph(dst, src1, src2, 4);
		}

		public void vcmpneqph(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmpph(dst, src1, src2, 4);
		}

		public void vcmpneqph(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vcmpph(dst, src1, src2, 4);
		}

		public void vcmpneqps(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpps(dst, src1, src2, 4);
		}

		public void vcmpneqps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpps(dst, src1, src2, 4);
		}

		public void vcmpneqps(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmpps(dst, src1, src2, 4);
		}

		public void vcmpneqps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmpps(dst, src1, src2, 4);
		}

		public void vcmpneqps(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vcmpps(dst, src1, src2, 4);
		}

		public void vcmpneqps(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 4);
		}

		public void vcmpneqps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 4);
		}

		public void vcmpneqps(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 4);
		}

		public void vcmpneqps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 4);
		}

		public void vcmpneqps(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 4);
		}

		public void vcmpneqsd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpsd(dst, src1, src2, 4);
		}

		public void vcmpneqsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpsd(dst, src1, src2, 4);
		}

		public void vcmpneqsd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpsd(dst, src1, src2, 4);
		}

		public void vcmpneqsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpsd(dst, src1, src2, 4);
		}

		public void vcmpneqsh(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpsh(dst, src1, src2, 4);
		}

		public void vcmpneqsh(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpsh(dst, src1, src2, 4);
		}

		public void vcmpneqss(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpss(dst, src1, src2, 4);
		}

		public void vcmpneqss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpss(dst, src1, src2, 4);
		}

		public void vcmpneqss(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpss(dst, src1, src2, 4);
		}

		public void vcmpneqss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpss(dst, src1, src2, 4);
		}

		public void vcmpnge_uqpd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmppd(dst, src1, src2, 25);
		}

		public void vcmpnge_uqpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmppd(dst, src1, src2, 25);
		}

		public void vcmpnge_uqpd(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmppd(dst, src1, src2, 25);
		}

		public void vcmpnge_uqpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmppd(dst, src1, src2, 25);
		}

		public void vcmpnge_uqpd(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vcmppd(dst, src1, src2, 25);
		}

		public void vcmpnge_uqpd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 25);
		}

		public void vcmpnge_uqpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 25);
		}

		public void vcmpnge_uqpd(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 25);
		}

		public void vcmpnge_uqpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 25);
		}

		public void vcmpnge_uqpd(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 25);
		}

		public void vcmpnge_uqph(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpph(dst, src1, src2, 25);
		}

		public void vcmpnge_uqph(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmpph(dst, src1, src2, 25);
		}

		public void vcmpnge_uqph(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vcmpph(dst, src1, src2, 25);
		}

		public void vcmpnge_uqph(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpph(dst, src1, src2, 25);
		}

		public void vcmpnge_uqph(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmpph(dst, src1, src2, 25);
		}

		public void vcmpnge_uqph(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vcmpph(dst, src1, src2, 25);
		}

		public void vcmpnge_uqps(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpps(dst, src1, src2, 25);
		}

		public void vcmpnge_uqps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpps(dst, src1, src2, 25);
		}

		public void vcmpnge_uqps(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmpps(dst, src1, src2, 25);
		}

		public void vcmpnge_uqps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmpps(dst, src1, src2, 25);
		}

		public void vcmpnge_uqps(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vcmpps(dst, src1, src2, 25);
		}

		public void vcmpnge_uqps(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 25);
		}

		public void vcmpnge_uqps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 25);
		}

		public void vcmpnge_uqps(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 25);
		}

		public void vcmpnge_uqps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 25);
		}

		public void vcmpnge_uqps(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 25);
		}

		public void vcmpnge_uqsd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpsd(dst, src1, src2, 25);
		}

		public void vcmpnge_uqsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpsd(dst, src1, src2, 25);
		}

		public void vcmpnge_uqsd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpsd(dst, src1, src2, 25);
		}

		public void vcmpnge_uqsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpsd(dst, src1, src2, 25);
		}

		public void vcmpnge_uqsh(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpsh(dst, src1, src2, 25);
		}

		public void vcmpnge_uqsh(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpsh(dst, src1, src2, 25);
		}

		public void vcmpnge_uqss(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpss(dst, src1, src2, 25);
		}

		public void vcmpnge_uqss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpss(dst, src1, src2, 25);
		}

		public void vcmpnge_uqss(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpss(dst, src1, src2, 25);
		}

		public void vcmpnge_uqss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpss(dst, src1, src2, 25);
		}

		public void vcmpngepd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmppd(dst, src1, src2, 9);
		}

		public void vcmpngepd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmppd(dst, src1, src2, 9);
		}

		public void vcmpngepd(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmppd(dst, src1, src2, 9);
		}

		public void vcmpngepd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmppd(dst, src1, src2, 9);
		}

		public void vcmpngepd(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vcmppd(dst, src1, src2, 9);
		}

		public void vcmpngepd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 9);
		}

		public void vcmpngepd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 9);
		}

		public void vcmpngepd(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 9);
		}

		public void vcmpngepd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 9);
		}

		public void vcmpngepd(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 9);
		}

		public void vcmpngeph(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpph(dst, src1, src2, 9);
		}

		public void vcmpngeph(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmpph(dst, src1, src2, 9);
		}

		public void vcmpngeph(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vcmpph(dst, src1, src2, 9);
		}

		public void vcmpngeph(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpph(dst, src1, src2, 9);
		}

		public void vcmpngeph(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmpph(dst, src1, src2, 9);
		}

		public void vcmpngeph(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vcmpph(dst, src1, src2, 9);
		}

		public void vcmpngeps(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpps(dst, src1, src2, 9);
		}

		public void vcmpngeps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpps(dst, src1, src2, 9);
		}

		public void vcmpngeps(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmpps(dst, src1, src2, 9);
		}

		public void vcmpngeps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmpps(dst, src1, src2, 9);
		}

		public void vcmpngeps(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vcmpps(dst, src1, src2, 9);
		}

		public void vcmpngeps(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 9);
		}

		public void vcmpngeps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 9);
		}

		public void vcmpngeps(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 9);
		}

		public void vcmpngeps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 9);
		}

		public void vcmpngeps(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 9);
		}

		public void vcmpngesd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpsd(dst, src1, src2, 9);
		}

		public void vcmpngesd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpsd(dst, src1, src2, 9);
		}

		public void vcmpngesd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpsd(dst, src1, src2, 9);
		}

		public void vcmpngesd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpsd(dst, src1, src2, 9);
		}

		public void vcmpngesh(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpsh(dst, src1, src2, 9);
		}

		public void vcmpngesh(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpsh(dst, src1, src2, 9);
		}

		public void vcmpngess(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpss(dst, src1, src2, 9);
		}

		public void vcmpngess(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpss(dst, src1, src2, 9);
		}

		public void vcmpngess(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpss(dst, src1, src2, 9);
		}

		public void vcmpngess(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpss(dst, src1, src2, 9);
		}

		public void vcmpngt_uqpd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmppd(dst, src1, src2, 26);
		}

		public void vcmpngt_uqpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmppd(dst, src1, src2, 26);
		}

		public void vcmpngt_uqpd(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmppd(dst, src1, src2, 26);
		}

		public void vcmpngt_uqpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmppd(dst, src1, src2, 26);
		}

		public void vcmpngt_uqpd(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vcmppd(dst, src1, src2, 26);
		}

		public void vcmpngt_uqpd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 26);
		}

		public void vcmpngt_uqpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 26);
		}

		public void vcmpngt_uqpd(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 26);
		}

		public void vcmpngt_uqpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 26);
		}

		public void vcmpngt_uqpd(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 26);
		}

		public void vcmpngt_uqph(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpph(dst, src1, src2, 26);
		}

		public void vcmpngt_uqph(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmpph(dst, src1, src2, 26);
		}

		public void vcmpngt_uqph(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vcmpph(dst, src1, src2, 26);
		}

		public void vcmpngt_uqph(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpph(dst, src1, src2, 26);
		}

		public void vcmpngt_uqph(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmpph(dst, src1, src2, 26);
		}

		public void vcmpngt_uqph(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vcmpph(dst, src1, src2, 26);
		}

		public void vcmpngt_uqps(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpps(dst, src1, src2, 26);
		}

		public void vcmpngt_uqps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpps(dst, src1, src2, 26);
		}

		public void vcmpngt_uqps(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmpps(dst, src1, src2, 26);
		}

		public void vcmpngt_uqps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmpps(dst, src1, src2, 26);
		}

		public void vcmpngt_uqps(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vcmpps(dst, src1, src2, 26);
		}

		public void vcmpngt_uqps(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 26);
		}

		public void vcmpngt_uqps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 26);
		}

		public void vcmpngt_uqps(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 26);
		}

		public void vcmpngt_uqps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 26);
		}

		public void vcmpngt_uqps(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 26);
		}

		public void vcmpngt_uqsd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpsd(dst, src1, src2, 26);
		}

		public void vcmpngt_uqsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpsd(dst, src1, src2, 26);
		}

		public void vcmpngt_uqsd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpsd(dst, src1, src2, 26);
		}

		public void vcmpngt_uqsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpsd(dst, src1, src2, 26);
		}

		public void vcmpngt_uqsh(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpsh(dst, src1, src2, 26);
		}

		public void vcmpngt_uqsh(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpsh(dst, src1, src2, 26);
		}

		public void vcmpngt_uqss(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpss(dst, src1, src2, 26);
		}

		public void vcmpngt_uqss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpss(dst, src1, src2, 26);
		}

		public void vcmpngt_uqss(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpss(dst, src1, src2, 26);
		}

		public void vcmpngt_uqss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpss(dst, src1, src2, 26);
		}

		public void vcmpngtpd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmppd(dst, src1, src2, 10);
		}

		public void vcmpngtpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmppd(dst, src1, src2, 10);
		}

		public void vcmpngtpd(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmppd(dst, src1, src2, 10);
		}

		public void vcmpngtpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmppd(dst, src1, src2, 10);
		}

		public void vcmpngtpd(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vcmppd(dst, src1, src2, 10);
		}

		public void vcmpngtpd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 10);
		}

		public void vcmpngtpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 10);
		}

		public void vcmpngtpd(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 10);
		}

		public void vcmpngtpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 10);
		}

		public void vcmpngtpd(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 10);
		}

		public void vcmpngtph(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpph(dst, src1, src2, 10);
		}

		public void vcmpngtph(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmpph(dst, src1, src2, 10);
		}

		public void vcmpngtph(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vcmpph(dst, src1, src2, 10);
		}

		public void vcmpngtph(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpph(dst, src1, src2, 10);
		}

		public void vcmpngtph(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmpph(dst, src1, src2, 10);
		}

		public void vcmpngtph(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vcmpph(dst, src1, src2, 10);
		}

		public void vcmpngtps(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpps(dst, src1, src2, 10);
		}

		public void vcmpngtps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpps(dst, src1, src2, 10);
		}

		public void vcmpngtps(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmpps(dst, src1, src2, 10);
		}

		public void vcmpngtps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmpps(dst, src1, src2, 10);
		}

		public void vcmpngtps(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vcmpps(dst, src1, src2, 10);
		}

		public void vcmpngtps(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 10);
		}

		public void vcmpngtps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 10);
		}

		public void vcmpngtps(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 10);
		}

		public void vcmpngtps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 10);
		}

		public void vcmpngtps(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 10);
		}

		public void vcmpngtsd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpsd(dst, src1, src2, 10);
		}

		public void vcmpngtsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpsd(dst, src1, src2, 10);
		}

		public void vcmpngtsd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpsd(dst, src1, src2, 10);
		}

		public void vcmpngtsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpsd(dst, src1, src2, 10);
		}

		public void vcmpngtsh(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpsh(dst, src1, src2, 10);
		}

		public void vcmpngtsh(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpsh(dst, src1, src2, 10);
		}

		public void vcmpngtss(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpss(dst, src1, src2, 10);
		}

		public void vcmpngtss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpss(dst, src1, src2, 10);
		}

		public void vcmpngtss(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpss(dst, src1, src2, 10);
		}

		public void vcmpngtss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpss(dst, src1, src2, 10);
		}

		public void vcmpnle_uqpd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmppd(dst, src1, src2, 22);
		}

		public void vcmpnle_uqpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmppd(dst, src1, src2, 22);
		}

		public void vcmpnle_uqpd(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmppd(dst, src1, src2, 22);
		}

		public void vcmpnle_uqpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmppd(dst, src1, src2, 22);
		}

		public void vcmpnle_uqpd(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vcmppd(dst, src1, src2, 22);
		}

		public void vcmpnle_uqpd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 22);
		}

		public void vcmpnle_uqpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 22);
		}

		public void vcmpnle_uqpd(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 22);
		}

		public void vcmpnle_uqpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 22);
		}

		public void vcmpnle_uqpd(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 22);
		}

		public void vcmpnle_uqph(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpph(dst, src1, src2, 22);
		}

		public void vcmpnle_uqph(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmpph(dst, src1, src2, 22);
		}

		public void vcmpnle_uqph(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vcmpph(dst, src1, src2, 22);
		}

		public void vcmpnle_uqph(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpph(dst, src1, src2, 22);
		}

		public void vcmpnle_uqph(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmpph(dst, src1, src2, 22);
		}

		public void vcmpnle_uqph(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vcmpph(dst, src1, src2, 22);
		}

		public void vcmpnle_uqps(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpps(dst, src1, src2, 22);
		}

		public void vcmpnle_uqps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpps(dst, src1, src2, 22);
		}

		public void vcmpnle_uqps(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmpps(dst, src1, src2, 22);
		}

		public void vcmpnle_uqps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmpps(dst, src1, src2, 22);
		}

		public void vcmpnle_uqps(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vcmpps(dst, src1, src2, 22);
		}

		public void vcmpnle_uqps(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 22);
		}

		public void vcmpnle_uqps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 22);
		}

		public void vcmpnle_uqps(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 22);
		}

		public void vcmpnle_uqps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 22);
		}

		public void vcmpnle_uqps(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 22);
		}

		public void vcmpnle_uqsd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpsd(dst, src1, src2, 22);
		}

		public void vcmpnle_uqsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpsd(dst, src1, src2, 22);
		}

		public void vcmpnle_uqsd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpsd(dst, src1, src2, 22);
		}

		public void vcmpnle_uqsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpsd(dst, src1, src2, 22);
		}

		public void vcmpnle_uqsh(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpsh(dst, src1, src2, 22);
		}

		public void vcmpnle_uqsh(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpsh(dst, src1, src2, 22);
		}

		public void vcmpnle_uqss(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpss(dst, src1, src2, 22);
		}

		public void vcmpnle_uqss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpss(dst, src1, src2, 22);
		}

		public void vcmpnle_uqss(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpss(dst, src1, src2, 22);
		}

		public void vcmpnle_uqss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpss(dst, src1, src2, 22);
		}

		public void vcmpnlepd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmppd(dst, src1, src2, 6);
		}

		public void vcmpnlepd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmppd(dst, src1, src2, 6);
		}

		public void vcmpnlepd(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmppd(dst, src1, src2, 6);
		}

		public void vcmpnlepd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmppd(dst, src1, src2, 6);
		}

		public void vcmpnlepd(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vcmppd(dst, src1, src2, 6);
		}

		public void vcmpnlepd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 6);
		}

		public void vcmpnlepd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 6);
		}

		public void vcmpnlepd(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 6);
		}

		public void vcmpnlepd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 6);
		}

		public void vcmpnlepd(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 6);
		}

		public void vcmpnleph(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpph(dst, src1, src2, 6);
		}

		public void vcmpnleph(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmpph(dst, src1, src2, 6);
		}

		public void vcmpnleph(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vcmpph(dst, src1, src2, 6);
		}

		public void vcmpnleph(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpph(dst, src1, src2, 6);
		}

		public void vcmpnleph(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmpph(dst, src1, src2, 6);
		}

		public void vcmpnleph(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vcmpph(dst, src1, src2, 6);
		}

		public void vcmpnleps(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpps(dst, src1, src2, 6);
		}

		public void vcmpnleps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpps(dst, src1, src2, 6);
		}

		public void vcmpnleps(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmpps(dst, src1, src2, 6);
		}

		public void vcmpnleps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmpps(dst, src1, src2, 6);
		}

		public void vcmpnleps(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vcmpps(dst, src1, src2, 6);
		}

		public void vcmpnleps(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 6);
		}

		public void vcmpnleps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 6);
		}

		public void vcmpnleps(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 6);
		}

		public void vcmpnleps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 6);
		}

		public void vcmpnleps(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 6);
		}

		public void vcmpnlesd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpsd(dst, src1, src2, 6);
		}

		public void vcmpnlesd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpsd(dst, src1, src2, 6);
		}

		public void vcmpnlesd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpsd(dst, src1, src2, 6);
		}

		public void vcmpnlesd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpsd(dst, src1, src2, 6);
		}

		public void vcmpnlesh(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpsh(dst, src1, src2, 6);
		}

		public void vcmpnlesh(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpsh(dst, src1, src2, 6);
		}

		public void vcmpnless(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpss(dst, src1, src2, 6);
		}

		public void vcmpnless(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpss(dst, src1, src2, 6);
		}

		public void vcmpnless(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpss(dst, src1, src2, 6);
		}

		public void vcmpnless(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpss(dst, src1, src2, 6);
		}

		public void vcmpnlt_uqpd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmppd(dst, src1, src2, 21);
		}

		public void vcmpnlt_uqpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmppd(dst, src1, src2, 21);
		}

		public void vcmpnlt_uqpd(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmppd(dst, src1, src2, 21);
		}

		public void vcmpnlt_uqpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmppd(dst, src1, src2, 21);
		}

		public void vcmpnlt_uqpd(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vcmppd(dst, src1, src2, 21);
		}

		public void vcmpnlt_uqpd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 21);
		}

		public void vcmpnlt_uqpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 21);
		}

		public void vcmpnlt_uqpd(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 21);
		}

		public void vcmpnlt_uqpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 21);
		}

		public void vcmpnlt_uqpd(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 21);
		}

		public void vcmpnlt_uqph(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpph(dst, src1, src2, 21);
		}

		public void vcmpnlt_uqph(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmpph(dst, src1, src2, 21);
		}

		public void vcmpnlt_uqph(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vcmpph(dst, src1, src2, 21);
		}

		public void vcmpnlt_uqph(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpph(dst, src1, src2, 21);
		}

		public void vcmpnlt_uqph(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmpph(dst, src1, src2, 21);
		}

		public void vcmpnlt_uqph(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vcmpph(dst, src1, src2, 21);
		}

		public void vcmpnlt_uqps(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpps(dst, src1, src2, 21);
		}

		public void vcmpnlt_uqps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpps(dst, src1, src2, 21);
		}

		public void vcmpnlt_uqps(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmpps(dst, src1, src2, 21);
		}

		public void vcmpnlt_uqps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmpps(dst, src1, src2, 21);
		}

		public void vcmpnlt_uqps(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vcmpps(dst, src1, src2, 21);
		}

		public void vcmpnlt_uqps(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 21);
		}

		public void vcmpnlt_uqps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 21);
		}

		public void vcmpnlt_uqps(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 21);
		}

		public void vcmpnlt_uqps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 21);
		}

		public void vcmpnlt_uqps(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 21);
		}

		public void vcmpnlt_uqsd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpsd(dst, src1, src2, 21);
		}

		public void vcmpnlt_uqsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpsd(dst, src1, src2, 21);
		}

		public void vcmpnlt_uqsd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpsd(dst, src1, src2, 21);
		}

		public void vcmpnlt_uqsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpsd(dst, src1, src2, 21);
		}

		public void vcmpnlt_uqsh(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpsh(dst, src1, src2, 21);
		}

		public void vcmpnlt_uqsh(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpsh(dst, src1, src2, 21);
		}

		public void vcmpnlt_uqss(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpss(dst, src1, src2, 21);
		}

		public void vcmpnlt_uqss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpss(dst, src1, src2, 21);
		}

		public void vcmpnlt_uqss(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpss(dst, src1, src2, 21);
		}

		public void vcmpnlt_uqss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpss(dst, src1, src2, 21);
		}

		public void vcmpnltpd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmppd(dst, src1, src2, 5);
		}

		public void vcmpnltpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmppd(dst, src1, src2, 5);
		}

		public void vcmpnltpd(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmppd(dst, src1, src2, 5);
		}

		public void vcmpnltpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmppd(dst, src1, src2, 5);
		}

		public void vcmpnltpd(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vcmppd(dst, src1, src2, 5);
		}

		public void vcmpnltpd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 5);
		}

		public void vcmpnltpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 5);
		}

		public void vcmpnltpd(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 5);
		}

		public void vcmpnltpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 5);
		}

		public void vcmpnltpd(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 5);
		}

		public void vcmpnltph(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpph(dst, src1, src2, 5);
		}

		public void vcmpnltph(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmpph(dst, src1, src2, 5);
		}

		public void vcmpnltph(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vcmpph(dst, src1, src2, 5);
		}

		public void vcmpnltph(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpph(dst, src1, src2, 5);
		}

		public void vcmpnltph(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmpph(dst, src1, src2, 5);
		}

		public void vcmpnltph(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vcmpph(dst, src1, src2, 5);
		}

		public void vcmpnltps(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpps(dst, src1, src2, 5);
		}

		public void vcmpnltps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpps(dst, src1, src2, 5);
		}

		public void vcmpnltps(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmpps(dst, src1, src2, 5);
		}

		public void vcmpnltps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmpps(dst, src1, src2, 5);
		}

		public void vcmpnltps(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vcmpps(dst, src1, src2, 5);
		}

		public void vcmpnltps(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 5);
		}

		public void vcmpnltps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 5);
		}

		public void vcmpnltps(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 5);
		}

		public void vcmpnltps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 5);
		}

		public void vcmpnltps(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 5);
		}

		public void vcmpnltsd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpsd(dst, src1, src2, 5);
		}

		public void vcmpnltsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpsd(dst, src1, src2, 5);
		}

		public void vcmpnltsd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpsd(dst, src1, src2, 5);
		}

		public void vcmpnltsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpsd(dst, src1, src2, 5);
		}

		public void vcmpnltsh(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpsh(dst, src1, src2, 5);
		}

		public void vcmpnltsh(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpsh(dst, src1, src2, 5);
		}

		public void vcmpnltss(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpss(dst, src1, src2, 5);
		}

		public void vcmpnltss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpss(dst, src1, src2, 5);
		}

		public void vcmpnltss(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpss(dst, src1, src2, 5);
		}

		public void vcmpnltss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpss(dst, src1, src2, 5);
		}

		public void vcmpord_spd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmppd(dst, src1, src2, 23);
		}

		public void vcmpord_spd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmppd(dst, src1, src2, 23);
		}

		public void vcmpord_spd(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmppd(dst, src1, src2, 23);
		}

		public void vcmpord_spd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmppd(dst, src1, src2, 23);
		}

		public void vcmpord_spd(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vcmppd(dst, src1, src2, 23);
		}

		public void vcmpord_spd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 23);
		}

		public void vcmpord_spd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 23);
		}

		public void vcmpord_spd(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 23);
		}

		public void vcmpord_spd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 23);
		}

		public void vcmpord_spd(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 23);
		}

		public void vcmpord_sph(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpph(dst, src1, src2, 23);
		}

		public void vcmpord_sph(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmpph(dst, src1, src2, 23);
		}

		public void vcmpord_sph(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vcmpph(dst, src1, src2, 23);
		}

		public void vcmpord_sph(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpph(dst, src1, src2, 23);
		}

		public void vcmpord_sph(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmpph(dst, src1, src2, 23);
		}

		public void vcmpord_sph(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vcmpph(dst, src1, src2, 23);
		}

		public void vcmpord_sps(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpps(dst, src1, src2, 23);
		}

		public void vcmpord_sps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpps(dst, src1, src2, 23);
		}

		public void vcmpord_sps(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmpps(dst, src1, src2, 23);
		}

		public void vcmpord_sps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmpps(dst, src1, src2, 23);
		}

		public void vcmpord_sps(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vcmpps(dst, src1, src2, 23);
		}

		public void vcmpord_sps(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 23);
		}

		public void vcmpord_sps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 23);
		}

		public void vcmpord_sps(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 23);
		}

		public void vcmpord_sps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 23);
		}

		public void vcmpord_sps(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 23);
		}

		public void vcmpord_ssd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpsd(dst, src1, src2, 23);
		}

		public void vcmpord_ssd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpsd(dst, src1, src2, 23);
		}

		public void vcmpord_ssd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpsd(dst, src1, src2, 23);
		}

		public void vcmpord_ssd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpsd(dst, src1, src2, 23);
		}

		public void vcmpord_ssh(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpsh(dst, src1, src2, 23);
		}

		public void vcmpord_ssh(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpsh(dst, src1, src2, 23);
		}

		public void vcmpord_sss(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpss(dst, src1, src2, 23);
		}

		public void vcmpord_sss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpss(dst, src1, src2, 23);
		}

		public void vcmpord_sss(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpss(dst, src1, src2, 23);
		}

		public void vcmpord_sss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpss(dst, src1, src2, 23);
		}

		public void vcmpordpd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmppd(dst, src1, src2, 7);
		}

		public void vcmpordpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmppd(dst, src1, src2, 7);
		}

		public void vcmpordpd(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmppd(dst, src1, src2, 7);
		}

		public void vcmpordpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmppd(dst, src1, src2, 7);
		}

		public void vcmpordpd(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vcmppd(dst, src1, src2, 7);
		}

		public void vcmpordpd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 7);
		}

		public void vcmpordpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 7);
		}

		public void vcmpordpd(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 7);
		}

		public void vcmpordpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 7);
		}

		public void vcmpordpd(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 7);
		}

		public void vcmpordph(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpph(dst, src1, src2, 7);
		}

		public void vcmpordph(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmpph(dst, src1, src2, 7);
		}

		public void vcmpordph(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vcmpph(dst, src1, src2, 7);
		}

		public void vcmpordph(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpph(dst, src1, src2, 7);
		}

		public void vcmpordph(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmpph(dst, src1, src2, 7);
		}

		public void vcmpordph(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vcmpph(dst, src1, src2, 7);
		}

		public void vcmpordps(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpps(dst, src1, src2, 7);
		}

		public void vcmpordps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpps(dst, src1, src2, 7);
		}

		public void vcmpordps(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmpps(dst, src1, src2, 7);
		}

		public void vcmpordps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmpps(dst, src1, src2, 7);
		}

		public void vcmpordps(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vcmpps(dst, src1, src2, 7);
		}

		public void vcmpordps(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 7);
		}

		public void vcmpordps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 7);
		}

		public void vcmpordps(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 7);
		}

		public void vcmpordps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 7);
		}

		public void vcmpordps(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 7);
		}

		public void vcmpordsd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpsd(dst, src1, src2, 7);
		}

		public void vcmpordsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpsd(dst, src1, src2, 7);
		}

		public void vcmpordsd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpsd(dst, src1, src2, 7);
		}

		public void vcmpordsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpsd(dst, src1, src2, 7);
		}

		public void vcmpordsh(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpsh(dst, src1, src2, 7);
		}

		public void vcmpordsh(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpsh(dst, src1, src2, 7);
		}

		public void vcmpordss(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpss(dst, src1, src2, 7);
		}

		public void vcmpordss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpss(dst, src1, src2, 7);
		}

		public void vcmpordss(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpss(dst, src1, src2, 7);
		}

		public void vcmpordss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpss(dst, src1, src2, 7);
		}

		public void vcmppd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcmppd_kr_k1_xmm_xmmm128b64_imm8, dst, src1, src2, imm), dst.Flags);
		}

		public void vcmppd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vcmppd_xmm_xmm_xmmm128_imm8, dst, src1, src2, imm));
		}

		public void vcmppd(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcmppd_kr_k1_ymm_ymmm256b64_imm8, dst, src1, src2, imm), dst.Flags);
		}

		public void vcmppd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vcmppd_ymm_ymm_ymmm256_imm8, dst, src1, src2, imm));
		}

		public void vcmppd(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcmppd_kr_k1_zmm_zmmm512b64_imm8_sae, dst, src1, src2, imm), dst.Flags | src2.Flags);
		}

		public void vcmppd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcmppd_kr_k1_xmm_xmmm128b64_imm8, register, register2, in memory, imm), dst.Flags | src2.Flags);
		}

		public void vcmppd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vcmppd_xmm_xmm_xmmm128_imm8, register, register2, in memory, imm));
		}

		public void vcmppd(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcmppd_kr_k1_ymm_ymmm256b64_imm8, register, register2, in memory, imm), dst.Flags | src2.Flags);
		}

		public void vcmppd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vcmppd_ymm_ymm_ymmm256_imm8, register, register2, in memory, imm));
		}

		public void vcmppd(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcmppd_kr_k1_zmm_zmmm512b64_imm8_sae, register, register2, in memory, imm), dst.Flags | src2.Flags);
		}

		public void vcmppd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcmppd_kr_k1_xmm_xmmm128b64_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags);
		}

		public void vcmppd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vcmppd_xmm_xmm_xmmm128_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm));
		}

		public void vcmppd(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcmppd_kr_k1_ymm_ymmm256b64_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags);
		}

		public void vcmppd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vcmppd_ymm_ymm_ymmm256_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm));
		}

		public void vcmppd(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcmppd_kr_k1_zmm_zmmm512b64_imm8_sae, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vcmppd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcmppd_kr_k1_xmm_xmmm128b64_imm8, register, register2, in memory, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vcmppd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vcmppd_xmm_xmm_xmmm128_imm8, register, register2, in memory, (uint)imm));
		}

		public void vcmppd(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcmppd_kr_k1_ymm_ymmm256b64_imm8, register, register2, in memory, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vcmppd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vcmppd_ymm_ymm_ymmm256_imm8, register, register2, in memory, (uint)imm));
		}

		public void vcmppd(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcmppd_kr_k1_zmm_zmmm512b64_imm8_sae, register, register2, in memory, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vcmpph(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcmpph_kr_k1_xmm_xmmm128b16_imm8, dst, src1, src2, imm), dst.Flags);
		}

		public void vcmpph(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcmpph_kr_k1_ymm_ymmm256b16_imm8, dst, src1, src2, imm), dst.Flags);
		}

		public void vcmpph(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcmpph_kr_k1_zmm_zmmm512b16_imm8_sae, dst, src1, src2, imm), dst.Flags | src2.Flags);
		}

		public void vcmpph(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcmpph_kr_k1_xmm_xmmm128b16_imm8, register, register2, in memory, imm), dst.Flags | src2.Flags);
		}

		public void vcmpph(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcmpph_kr_k1_ymm_ymmm256b16_imm8, register, register2, in memory, imm), dst.Flags | src2.Flags);
		}

		public void vcmpph(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcmpph_kr_k1_zmm_zmmm512b16_imm8_sae, register, register2, in memory, imm), dst.Flags | src2.Flags);
		}

		public void vcmpph(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcmpph_kr_k1_xmm_xmmm128b16_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags);
		}

		public void vcmpph(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcmpph_kr_k1_ymm_ymmm256b16_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags);
		}

		public void vcmpph(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcmpph_kr_k1_zmm_zmmm512b16_imm8_sae, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vcmpph(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcmpph_kr_k1_xmm_xmmm128b16_imm8, register, register2, in memory, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vcmpph(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcmpph_kr_k1_ymm_ymmm256b16_imm8, register, register2, in memory, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vcmpph(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcmpph_kr_k1_zmm_zmmm512b16_imm8_sae, register, register2, in memory, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vcmpps(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcmpps_kr_k1_xmm_xmmm128b32_imm8, dst, src1, src2, imm), dst.Flags);
		}

		public void vcmpps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vcmpps_xmm_xmm_xmmm128_imm8, dst, src1, src2, imm));
		}

		public void vcmpps(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcmpps_kr_k1_ymm_ymmm256b32_imm8, dst, src1, src2, imm), dst.Flags);
		}

		public void vcmpps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vcmpps_ymm_ymm_ymmm256_imm8, dst, src1, src2, imm));
		}

		public void vcmpps(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcmpps_kr_k1_zmm_zmmm512b32_imm8_sae, dst, src1, src2, imm), dst.Flags | src2.Flags);
		}

		public void vcmpps(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcmpps_kr_k1_xmm_xmmm128b32_imm8, register, register2, in memory, imm), dst.Flags | src2.Flags);
		}

		public void vcmpps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vcmpps_xmm_xmm_xmmm128_imm8, register, register2, in memory, imm));
		}

		public void vcmpps(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcmpps_kr_k1_ymm_ymmm256b32_imm8, register, register2, in memory, imm), dst.Flags | src2.Flags);
		}

		public void vcmpps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vcmpps_ymm_ymm_ymmm256_imm8, register, register2, in memory, imm));
		}

		public void vcmpps(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcmpps_kr_k1_zmm_zmmm512b32_imm8_sae, register, register2, in memory, imm), dst.Flags | src2.Flags);
		}

		public void vcmpps(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcmpps_kr_k1_xmm_xmmm128b32_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags);
		}

		public void vcmpps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vcmpps_xmm_xmm_xmmm128_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm));
		}

		public void vcmpps(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcmpps_kr_k1_ymm_ymmm256b32_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags);
		}

		public void vcmpps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vcmpps_ymm_ymm_ymmm256_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm));
		}

		public void vcmpps(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcmpps_kr_k1_zmm_zmmm512b32_imm8_sae, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vcmpps(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcmpps_kr_k1_xmm_xmmm128b32_imm8, register, register2, in memory, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vcmpps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vcmpps_xmm_xmm_xmmm128_imm8, register, register2, in memory, (uint)imm));
		}

		public void vcmpps(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcmpps_kr_k1_ymm_ymmm256b32_imm8, register, register2, in memory, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vcmpps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vcmpps_ymm_ymm_ymmm256_imm8, register, register2, in memory, (uint)imm));
		}

		public void vcmpps(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcmpps_kr_k1_zmm_zmmm512b32_imm8_sae, register, register2, in memory, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vcmpsd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcmpsd_kr_k1_xmm_xmmm64_imm8_sae, dst, src1, src2, imm), dst.Flags | src2.Flags);
		}

		public void vcmpsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vcmpsd_xmm_xmm_xmmm64_imm8, dst, src1, src2, imm));
		}

		public void vcmpsd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcmpsd_kr_k1_xmm_xmmm64_imm8_sae, register, register2, in memory, imm), dst.Flags | src2.Flags);
		}

		public void vcmpsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vcmpsd_xmm_xmm_xmmm64_imm8, register, register2, in memory, imm));
		}

		public void vcmpsd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcmpsd_kr_k1_xmm_xmmm64_imm8_sae, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vcmpsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vcmpsd_xmm_xmm_xmmm64_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm));
		}

		public void vcmpsd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcmpsd_kr_k1_xmm_xmmm64_imm8_sae, register, register2, in memory, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vcmpsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vcmpsd_xmm_xmm_xmmm64_imm8, register, register2, in memory, (uint)imm));
		}

		public void vcmpsh(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcmpsh_kr_k1_xmm_xmmm16_imm8_sae, dst, src1, src2, imm), dst.Flags | src2.Flags);
		}

		public void vcmpsh(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcmpsh_kr_k1_xmm_xmmm16_imm8_sae, register, register2, in memory, imm), dst.Flags | src2.Flags);
		}

		public void vcmpsh(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcmpsh_kr_k1_xmm_xmmm16_imm8_sae, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vcmpsh(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcmpsh_kr_k1_xmm_xmmm16_imm8_sae, register, register2, in memory, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vcmpss(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcmpss_kr_k1_xmm_xmmm32_imm8_sae, dst, src1, src2, imm), dst.Flags | src2.Flags);
		}

		public void vcmpss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vcmpss_xmm_xmm_xmmm32_imm8, dst, src1, src2, imm));
		}

		public void vcmpss(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcmpss_kr_k1_xmm_xmmm32_imm8_sae, register, register2, in memory, imm), dst.Flags | src2.Flags);
		}

		public void vcmpss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vcmpss_xmm_xmm_xmmm32_imm8, register, register2, in memory, imm));
		}

		public void vcmpss(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcmpss_kr_k1_xmm_xmmm32_imm8_sae, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vcmpss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vcmpss_xmm_xmm_xmmm32_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm));
		}

		public void vcmpss(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcmpss_kr_k1_xmm_xmmm32_imm8_sae, register, register2, in memory, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vcmpss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vcmpss_xmm_xmm_xmmm32_imm8, register, register2, in memory, (uint)imm));
		}

		public void vcmptrue_uspd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmppd(dst, src1, src2, 31);
		}

		public void vcmptrue_uspd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmppd(dst, src1, src2, 31);
		}

		public void vcmptrue_uspd(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmppd(dst, src1, src2, 31);
		}

		public void vcmptrue_uspd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmppd(dst, src1, src2, 31);
		}

		public void vcmptrue_uspd(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vcmppd(dst, src1, src2, 31);
		}

		public void vcmptrue_uspd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 31);
		}

		public void vcmptrue_uspd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 31);
		}

		public void vcmptrue_uspd(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 31);
		}

		public void vcmptrue_uspd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 31);
		}

		public void vcmptrue_uspd(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 31);
		}

		public void vcmptrue_usph(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpph(dst, src1, src2, 31);
		}

		public void vcmptrue_usph(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmpph(dst, src1, src2, 31);
		}

		public void vcmptrue_usph(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vcmpph(dst, src1, src2, 31);
		}

		public void vcmptrue_usph(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpph(dst, src1, src2, 31);
		}

		public void vcmptrue_usph(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmpph(dst, src1, src2, 31);
		}

		public void vcmptrue_usph(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vcmpph(dst, src1, src2, 31);
		}

		public void vcmptrue_usps(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpps(dst, src1, src2, 31);
		}

		public void vcmptrue_usps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpps(dst, src1, src2, 31);
		}

		public void vcmptrue_usps(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmpps(dst, src1, src2, 31);
		}

		public void vcmptrue_usps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmpps(dst, src1, src2, 31);
		}

		public void vcmptrue_usps(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vcmpps(dst, src1, src2, 31);
		}

		public void vcmptrue_usps(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 31);
		}

		public void vcmptrue_usps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 31);
		}

		public void vcmptrue_usps(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 31);
		}

		public void vcmptrue_usps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 31);
		}

		public void vcmptrue_usps(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 31);
		}

		public void vcmptrue_ussd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpsd(dst, src1, src2, 31);
		}

		public void vcmptrue_ussd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpsd(dst, src1, src2, 31);
		}

		public void vcmptrue_ussd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpsd(dst, src1, src2, 31);
		}

		public void vcmptrue_ussd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpsd(dst, src1, src2, 31);
		}

		public void vcmptrue_ussh(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpsh(dst, src1, src2, 31);
		}

		public void vcmptrue_ussh(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpsh(dst, src1, src2, 31);
		}

		public void vcmptrue_usss(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpss(dst, src1, src2, 31);
		}

		public void vcmptrue_usss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpss(dst, src1, src2, 31);
		}

		public void vcmptrue_usss(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpss(dst, src1, src2, 31);
		}

		public void vcmptrue_usss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpss(dst, src1, src2, 31);
		}

		public void vcmptruepd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmppd(dst, src1, src2, 15);
		}

		public void vcmptruepd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmppd(dst, src1, src2, 15);
		}

		public void vcmptruepd(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmppd(dst, src1, src2, 15);
		}

		public void vcmptruepd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmppd(dst, src1, src2, 15);
		}

		public void vcmptruepd(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vcmppd(dst, src1, src2, 15);
		}

		public void vcmptruepd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 15);
		}

		public void vcmptruepd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 15);
		}

		public void vcmptruepd(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 15);
		}

		public void vcmptruepd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 15);
		}

		public void vcmptruepd(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 15);
		}

		public void vcmptrueph(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpph(dst, src1, src2, 15);
		}

		public void vcmptrueph(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmpph(dst, src1, src2, 15);
		}

		public void vcmptrueph(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vcmpph(dst, src1, src2, 15);
		}

		public void vcmptrueph(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpph(dst, src1, src2, 15);
		}

		public void vcmptrueph(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmpph(dst, src1, src2, 15);
		}

		public void vcmptrueph(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vcmpph(dst, src1, src2, 15);
		}

		public void vcmptrueps(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpps(dst, src1, src2, 15);
		}

		public void vcmptrueps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpps(dst, src1, src2, 15);
		}

		public void vcmptrueps(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmpps(dst, src1, src2, 15);
		}

		public void vcmptrueps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmpps(dst, src1, src2, 15);
		}

		public void vcmptrueps(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vcmpps(dst, src1, src2, 15);
		}

		public void vcmptrueps(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 15);
		}

		public void vcmptrueps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 15);
		}

		public void vcmptrueps(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 15);
		}

		public void vcmptrueps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 15);
		}

		public void vcmptrueps(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 15);
		}

		public void vcmptruesd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpsd(dst, src1, src2, 15);
		}

		public void vcmptruesd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpsd(dst, src1, src2, 15);
		}

		public void vcmptruesd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpsd(dst, src1, src2, 15);
		}

		public void vcmptruesd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpsd(dst, src1, src2, 15);
		}

		public void vcmptruesh(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpsh(dst, src1, src2, 15);
		}

		public void vcmptruesh(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpsh(dst, src1, src2, 15);
		}

		public void vcmptruess(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpss(dst, src1, src2, 15);
		}

		public void vcmptruess(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpss(dst, src1, src2, 15);
		}

		public void vcmptruess(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpss(dst, src1, src2, 15);
		}

		public void vcmptruess(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpss(dst, src1, src2, 15);
		}

		public void vcmpunord_spd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmppd(dst, src1, src2, 19);
		}

		public void vcmpunord_spd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmppd(dst, src1, src2, 19);
		}

		public void vcmpunord_spd(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmppd(dst, src1, src2, 19);
		}

		public void vcmpunord_spd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmppd(dst, src1, src2, 19);
		}

		public void vcmpunord_spd(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vcmppd(dst, src1, src2, 19);
		}

		public void vcmpunord_spd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 19);
		}

		public void vcmpunord_spd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 19);
		}

		public void vcmpunord_spd(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 19);
		}

		public void vcmpunord_spd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 19);
		}

		public void vcmpunord_spd(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 19);
		}

		public void vcmpunord_sph(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpph(dst, src1, src2, 19);
		}

		public void vcmpunord_sph(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmpph(dst, src1, src2, 19);
		}

		public void vcmpunord_sph(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vcmpph(dst, src1, src2, 19);
		}

		public void vcmpunord_sph(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpph(dst, src1, src2, 19);
		}

		public void vcmpunord_sph(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmpph(dst, src1, src2, 19);
		}

		public void vcmpunord_sph(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vcmpph(dst, src1, src2, 19);
		}

		public void vcmpunord_sps(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpps(dst, src1, src2, 19);
		}

		public void vcmpunord_sps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpps(dst, src1, src2, 19);
		}

		public void vcmpunord_sps(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmpps(dst, src1, src2, 19);
		}

		public void vcmpunord_sps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmpps(dst, src1, src2, 19);
		}

		public void vcmpunord_sps(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vcmpps(dst, src1, src2, 19);
		}

		public void vcmpunord_sps(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 19);
		}

		public void vcmpunord_sps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 19);
		}

		public void vcmpunord_sps(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 19);
		}

		public void vcmpunord_sps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 19);
		}

		public void vcmpunord_sps(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 19);
		}

		public void vcmpunord_ssd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpsd(dst, src1, src2, 19);
		}

		public void vcmpunord_ssd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpsd(dst, src1, src2, 19);
		}

		public void vcmpunord_ssd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpsd(dst, src1, src2, 19);
		}

		public void vcmpunord_ssd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpsd(dst, src1, src2, 19);
		}

		public void vcmpunord_ssh(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpsh(dst, src1, src2, 19);
		}

		public void vcmpunord_ssh(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpsh(dst, src1, src2, 19);
		}

		public void vcmpunord_sss(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpss(dst, src1, src2, 19);
		}

		public void vcmpunord_sss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpss(dst, src1, src2, 19);
		}

		public void vcmpunord_sss(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpss(dst, src1, src2, 19);
		}

		public void vcmpunord_sss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpss(dst, src1, src2, 19);
		}

		public void vcmpunordpd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmppd(dst, src1, src2, 3);
		}

		public void vcmpunordpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmppd(dst, src1, src2, 3);
		}

		public void vcmpunordpd(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmppd(dst, src1, src2, 3);
		}

		public void vcmpunordpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmppd(dst, src1, src2, 3);
		}

		public void vcmpunordpd(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vcmppd(dst, src1, src2, 3);
		}

		public void vcmpunordpd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 3);
		}

		public void vcmpunordpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 3);
		}

		public void vcmpunordpd(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 3);
		}

		public void vcmpunordpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 3);
		}

		public void vcmpunordpd(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vcmppd(dst, src1, src2, 3);
		}

		public void vcmpunordph(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpph(dst, src1, src2, 3);
		}

		public void vcmpunordph(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmpph(dst, src1, src2, 3);
		}

		public void vcmpunordph(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vcmpph(dst, src1, src2, 3);
		}

		public void vcmpunordph(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpph(dst, src1, src2, 3);
		}

		public void vcmpunordph(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmpph(dst, src1, src2, 3);
		}

		public void vcmpunordph(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vcmpph(dst, src1, src2, 3);
		}

		public void vcmpunordps(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpps(dst, src1, src2, 3);
		}

		public void vcmpunordps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpps(dst, src1, src2, 3);
		}

		public void vcmpunordps(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmpps(dst, src1, src2, 3);
		}

		public void vcmpunordps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vcmpps(dst, src1, src2, 3);
		}

		public void vcmpunordps(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vcmpps(dst, src1, src2, 3);
		}

		public void vcmpunordps(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 3);
		}

		public void vcmpunordps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 3);
		}

		public void vcmpunordps(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 3);
		}

		public void vcmpunordps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 3);
		}

		public void vcmpunordps(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vcmpps(dst, src1, src2, 3);
		}

		public void vcmpunordsd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpsd(dst, src1, src2, 3);
		}

		public void vcmpunordsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpsd(dst, src1, src2, 3);
		}

		public void vcmpunordsd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpsd(dst, src1, src2, 3);
		}

		public void vcmpunordsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpsd(dst, src1, src2, 3);
		}

		public void vcmpunordsh(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpsh(dst, src1, src2, 3);
		}

		public void vcmpunordsh(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpsh(dst, src1, src2, 3);
		}

		public void vcmpunordss(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpss(dst, src1, src2, 3);
		}

		public void vcmpunordss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vcmpss(dst, src1, src2, 3);
		}

		public void vcmpunordss(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpss(dst, src1, src2, 3);
		}

		public void vcmpunordss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vcmpss(dst, src1, src2, 3);
		}

		public void vcomisd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vcomisd_xmm_xmmm64 : Code.EVEX_Vcomisd_xmm_xmmm64_sae);
			AddInstruction(Instruction.Create(code, dst, src), src.Flags);
		}

		public void vcomisd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vcomisd_xmm_xmmm64 : Code.EVEX_Vcomisd_xmm_xmmm64_sae);
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory), src.Flags);
		}

		public void vcomish(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcomish_xmm_xmmm16_sae, dst, src), src.Flags);
		}

		public void vcomish(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcomish_xmm_xmmm16_sae, register, in memory), src.Flags);
		}

		public void vcomiss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vcomiss_xmm_xmmm32 : Code.EVEX_Vcomiss_xmm_xmmm32_sae);
			AddInstruction(Instruction.Create(code, dst, src), src.Flags);
		}

		public void vcomiss(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vcomiss_xmm_xmmm32 : Code.EVEX_Vcomiss_xmm_xmmm32_sae);
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory), src.Flags);
		}

		public void vcompresspd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcompresspd_xmmm128_k1z_xmm, dst, src), dst.Flags);
		}

		public void vcompresspd(AssemblerMemoryOperand dst, AssemblerRegisterXMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcompresspd_xmmm128_k1z_xmm, in memory, src), dst.Flags);
		}

		public void vcompresspd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcompresspd_ymmm256_k1z_ymm, dst, src), dst.Flags);
		}

		public void vcompresspd(AssemblerMemoryOperand dst, AssemblerRegisterYMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcompresspd_ymmm256_k1z_ymm, in memory, src), dst.Flags);
		}

		public void vcompresspd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcompresspd_zmmm512_k1z_zmm, dst, src), dst.Flags);
		}

		public void vcompresspd(AssemblerMemoryOperand dst, AssemblerRegisterZMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcompresspd_zmmm512_k1z_zmm, in memory, src), dst.Flags);
		}

		public void vcompressps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcompressps_xmmm128_k1z_xmm, dst, src), dst.Flags);
		}

		public void vcompressps(AssemblerMemoryOperand dst, AssemblerRegisterXMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcompressps_xmmm128_k1z_xmm, in memory, src), dst.Flags);
		}

		public void vcompressps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcompressps_ymmm256_k1z_ymm, dst, src), dst.Flags);
		}

		public void vcompressps(AssemblerMemoryOperand dst, AssemblerRegisterYMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcompressps_ymmm256_k1z_ymm, in memory, src), dst.Flags);
		}

		public void vcompressps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcompressps_zmmm512_k1z_zmm, dst, src), dst.Flags);
		}

		public void vcompressps(AssemblerMemoryOperand dst, AssemblerRegisterZMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcompressps_zmmm512_k1z_zmm, in memory, src), dst.Flags);
		}

		public void vcvtdq2pd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vcvtdq2pd_xmm_xmmm64 : Code.EVEX_Vcvtdq2pd_xmm_k1z_xmmm64b32);
			AddInstruction(Instruction.Create(code, dst, src), dst.Flags);
		}

		public void vcvtdq2pd(AssemblerRegisterYMM dst, AssemblerRegisterXMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vcvtdq2pd_ymm_xmmm128 : Code.EVEX_Vcvtdq2pd_ymm_k1z_xmmm128b32);
			AddInstruction(Instruction.Create(code, dst, src), dst.Flags);
		}

		public void vcvtdq2pd(AssemblerRegisterZMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtdq2pd_zmm_k1z_ymmm256b32_er, dst, src), dst.Flags | src.Flags);
		}

		public void vcvtdq2pd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Code code = ((!src.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vcvtdq2pd_xmm_xmmm64 : Code.EVEX_Vcvtdq2pd_xmm_k1z_xmmm64b32) : Code.EVEX_Vcvtdq2pd_xmm_k1z_xmmm64b32);
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtdq2pd(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Code code = ((!src.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vcvtdq2pd_ymm_xmmm128 : Code.EVEX_Vcvtdq2pd_ymm_k1z_xmmm128b32) : Code.EVEX_Vcvtdq2pd_ymm_k1z_xmmm128b32);
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtdq2pd(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtdq2pd_zmm_k1z_ymmm256b32_er, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtdq2ph(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtdq2ph_xmm_k1z_xmmm128b32, dst, src), dst.Flags);
		}

		public void vcvtdq2ph(AssemblerRegisterXMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtdq2ph_xmm_k1z_ymmm256b32, dst, src), dst.Flags);
		}

		public void vcvtdq2ph(AssemblerRegisterYMM dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtdq2ph_ymm_k1z_zmmm512b32_er, dst, src), dst.Flags | src.Flags);
		}

		public void vcvtdq2ph(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Code code;
			if (src.IsBroadcast)
			{
				code = Code.EVEX_Vcvtdq2ph_xmm_k1z_ymmm256b32;
			}
			else if (src.Size == MemoryOperandSize.Yword)
			{
				code = Code.EVEX_Vcvtdq2ph_xmm_k1z_ymmm256b32;
			}
			else
			{
				if (src.Size != MemoryOperandSize.Xword)
				{
					throw NoOpCodeFoundFor(Mnemonic.Vcvtdq2ph, dst, src);
				}
				code = Code.EVEX_Vcvtdq2ph_xmm_k1z_xmmm128b32;
			}
			Code code2 = code;
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtdq2ph(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtdq2ph_ymm_k1z_zmmm512b32_er, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtdq2phx(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtdq2ph_xmm_k1z_xmmm128b32, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtdq2phy(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtdq2ph_xmm_k1z_ymmm256b32, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtdq2ps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vcvtdq2ps_xmm_xmmm128 : Code.EVEX_Vcvtdq2ps_xmm_k1z_xmmm128b32);
			AddInstruction(Instruction.Create(code, dst, src), dst.Flags);
		}

		public void vcvtdq2ps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vcvtdq2ps_ymm_ymmm256 : Code.EVEX_Vcvtdq2ps_ymm_k1z_ymmm256b32);
			AddInstruction(Instruction.Create(code, dst, src), dst.Flags);
		}

		public void vcvtdq2ps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtdq2ps_zmm_k1z_zmmm512b32_er, dst, src), dst.Flags | src.Flags);
		}

		public void vcvtdq2ps(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Code code = ((!src.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vcvtdq2ps_xmm_xmmm128 : Code.EVEX_Vcvtdq2ps_xmm_k1z_xmmm128b32) : Code.EVEX_Vcvtdq2ps_xmm_k1z_xmmm128b32);
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtdq2ps(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Code code = ((!src.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vcvtdq2ps_ymm_ymmm256 : Code.EVEX_Vcvtdq2ps_ymm_k1z_ymmm256b32) : Code.EVEX_Vcvtdq2ps_ymm_k1z_ymmm256b32);
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtdq2ps(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtdq2ps_zmm_k1z_zmmm512b32_er, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtne2ps2bf16(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtne2ps2bf16_xmm_k1z_xmm_xmmm128b32, dst, src1, src2), dst.Flags);
		}

		public void vcvtne2ps2bf16(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtne2ps2bf16_ymm_k1z_ymm_ymmm256b32, dst, src1, src2), dst.Flags);
		}

		public void vcvtne2ps2bf16(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtne2ps2bf16_zmm_k1z_zmm_zmmm512b32, dst, src1, src2), dst.Flags);
		}

		public void vcvtne2ps2bf16(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtne2ps2bf16_xmm_k1z_xmm_xmmm128b32, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vcvtne2ps2bf16(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtne2ps2bf16_ymm_k1z_ymm_ymmm256b32, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vcvtne2ps2bf16(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtne2ps2bf16_zmm_k1z_zmm_zmmm512b32, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vcvtneebf162ps(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vcvtneebf162ps_xmm_m128, register, in memory));
		}

		public void vcvtneebf162ps(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vcvtneebf162ps_ymm_m256, register, in memory));
		}

		public void vcvtneeph2ps(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vcvtneeph2ps_xmm_m128, register, in memory));
		}

		public void vcvtneeph2ps(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vcvtneeph2ps_ymm_m256, register, in memory));
		}

		public void vcvtneobf162ps(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vcvtneobf162ps_xmm_m128, register, in memory));
		}

		public void vcvtneobf162ps(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vcvtneobf162ps_ymm_m256, register, in memory));
		}

		public void vcvtneoph2ps(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vcvtneoph2ps_xmm_m128, register, in memory));
		}

		public void vcvtneoph2ps(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vcvtneoph2ps_ymm_m256, register, in memory));
		}

		public void vcvtneps2bf16(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vcvtneps2bf16_xmm_xmmm128 : Code.EVEX_Vcvtneps2bf16_xmm_k1z_xmmm128b32);
			AddInstruction(Instruction.Create(code, dst, src), dst.Flags);
		}

		public void vcvtneps2bf16(AssemblerRegisterXMM dst, AssemblerRegisterYMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vcvtneps2bf16_xmm_ymmm256 : Code.EVEX_Vcvtneps2bf16_xmm_k1z_ymmm256b32);
			AddInstruction(Instruction.Create(code, dst, src), dst.Flags);
		}

		public void vcvtneps2bf16(AssemblerRegisterYMM dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtneps2bf16_ymm_k1z_zmmm512b32, dst, src), dst.Flags);
		}

		public void vcvtneps2bf16(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Code code;
			if (src.IsBroadcast)
			{
				code = Code.EVEX_Vcvtneps2bf16_xmm_k1z_ymmm256b32;
			}
			else if (src.Size == MemoryOperandSize.Yword)
			{
				code = (InstructionPreferVex ? Code.VEX_Vcvtneps2bf16_xmm_ymmm256 : Code.EVEX_Vcvtneps2bf16_xmm_k1z_ymmm256b32);
			}
			else
			{
				if (src.Size != MemoryOperandSize.Xword)
				{
					throw NoOpCodeFoundFor(Mnemonic.Vcvtneps2bf16, dst, src);
				}
				code = (InstructionPreferVex ? Code.VEX_Vcvtneps2bf16_xmm_xmmm128 : Code.EVEX_Vcvtneps2bf16_xmm_k1z_xmmm128b32);
			}
			Code code2 = code;
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtneps2bf16(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtneps2bf16_ymm_k1z_zmmm512b32, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtneps2bf16x(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtneps2bf16_xmm_k1z_xmmm128b32, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtneps2bf16y(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtneps2bf16_xmm_k1z_ymmm256b32, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtpd2dq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vcvtpd2dq_xmm_xmmm128 : Code.EVEX_Vcvtpd2dq_xmm_k1z_xmmm128b64);
			AddInstruction(Instruction.Create(code, dst, src), dst.Flags);
		}

		public void vcvtpd2dq(AssemblerRegisterXMM dst, AssemblerRegisterYMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vcvtpd2dq_xmm_ymmm256 : Code.EVEX_Vcvtpd2dq_xmm_k1z_ymmm256b64);
			AddInstruction(Instruction.Create(code, dst, src), dst.Flags);
		}

		public void vcvtpd2dq(AssemblerRegisterYMM dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtpd2dq_ymm_k1z_zmmm512b64_er, dst, src), dst.Flags | src.Flags);
		}

		public void vcvtpd2dq(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Code code;
			if (src.IsBroadcast)
			{
				code = Code.EVEX_Vcvtpd2dq_xmm_k1z_ymmm256b64;
			}
			else if (src.Size == MemoryOperandSize.Yword)
			{
				code = (InstructionPreferVex ? Code.VEX_Vcvtpd2dq_xmm_ymmm256 : Code.EVEX_Vcvtpd2dq_xmm_k1z_ymmm256b64);
			}
			else
			{
				if (src.Size != MemoryOperandSize.Xword)
				{
					throw NoOpCodeFoundFor(Mnemonic.Vcvtpd2dq, dst, src);
				}
				code = (InstructionPreferVex ? Code.VEX_Vcvtpd2dq_xmm_xmmm128 : Code.EVEX_Vcvtpd2dq_xmm_k1z_xmmm128b64);
			}
			Code code2 = code;
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtpd2dq(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtpd2dq_ymm_k1z_zmmm512b64_er, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtpd2dqx(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtpd2dq_xmm_k1z_xmmm128b64, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtpd2dqy(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtpd2dq_xmm_k1z_ymmm256b64, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtpd2ph(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtpd2ph_xmm_k1z_xmmm128b64, dst, src), dst.Flags);
		}

		public void vcvtpd2ph(AssemblerRegisterXMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtpd2ph_xmm_k1z_ymmm256b64, dst, src), dst.Flags);
		}

		public void vcvtpd2ph(AssemblerRegisterXMM dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtpd2ph_xmm_k1z_zmmm512b64_er, dst, src), dst.Flags | src.Flags);
		}

		public void vcvtpd2ph(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Code code;
			if (src.IsBroadcast)
			{
				code = Code.EVEX_Vcvtpd2ph_xmm_k1z_zmmm512b64_er;
			}
			else if (src.Size == MemoryOperandSize.Zword)
			{
				code = Code.EVEX_Vcvtpd2ph_xmm_k1z_zmmm512b64_er;
			}
			else if (src.Size == MemoryOperandSize.Yword)
			{
				code = Code.EVEX_Vcvtpd2ph_xmm_k1z_ymmm256b64;
			}
			else
			{
				if (src.Size != MemoryOperandSize.Xword)
				{
					throw NoOpCodeFoundFor(Mnemonic.Vcvtpd2ph, dst, src);
				}
				code = Code.EVEX_Vcvtpd2ph_xmm_k1z_xmmm128b64;
			}
			Code code2 = code;
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtpd2phx(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtpd2ph_xmm_k1z_xmmm128b64, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtpd2phy(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtpd2ph_xmm_k1z_ymmm256b64, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtpd2phz(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtpd2ph_xmm_k1z_zmmm512b64_er, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtpd2ps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vcvtpd2ps_xmm_xmmm128 : Code.EVEX_Vcvtpd2ps_xmm_k1z_xmmm128b64);
			AddInstruction(Instruction.Create(code, dst, src), dst.Flags);
		}

		public void vcvtpd2ps(AssemblerRegisterXMM dst, AssemblerRegisterYMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vcvtpd2ps_xmm_ymmm256 : Code.EVEX_Vcvtpd2ps_xmm_k1z_ymmm256b64);
			AddInstruction(Instruction.Create(code, dst, src), dst.Flags);
		}

		public void vcvtpd2ps(AssemblerRegisterYMM dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtpd2ps_ymm_k1z_zmmm512b64_er, dst, src), dst.Flags | src.Flags);
		}

		public void vcvtpd2ps(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Code code;
			if (src.IsBroadcast)
			{
				code = Code.EVEX_Vcvtpd2ps_xmm_k1z_ymmm256b64;
			}
			else if (src.Size == MemoryOperandSize.Yword)
			{
				code = (InstructionPreferVex ? Code.VEX_Vcvtpd2ps_xmm_ymmm256 : Code.EVEX_Vcvtpd2ps_xmm_k1z_ymmm256b64);
			}
			else
			{
				if (src.Size != MemoryOperandSize.Xword)
				{
					throw NoOpCodeFoundFor(Mnemonic.Vcvtpd2ps, dst, src);
				}
				code = (InstructionPreferVex ? Code.VEX_Vcvtpd2ps_xmm_xmmm128 : Code.EVEX_Vcvtpd2ps_xmm_k1z_xmmm128b64);
			}
			Code code2 = code;
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtpd2ps(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtpd2ps_ymm_k1z_zmmm512b64_er, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtpd2psx(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtpd2ps_xmm_k1z_xmmm128b64, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtpd2psy(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtpd2ps_xmm_k1z_ymmm256b64, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtpd2qq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtpd2qq_xmm_k1z_xmmm128b64, dst, src), dst.Flags);
		}

		public void vcvtpd2qq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtpd2qq_ymm_k1z_ymmm256b64, dst, src), dst.Flags);
		}

		public void vcvtpd2qq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtpd2qq_zmm_k1z_zmmm512b64_er, dst, src), dst.Flags | src.Flags);
		}

		public void vcvtpd2qq(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtpd2qq_xmm_k1z_xmmm128b64, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtpd2qq(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtpd2qq_ymm_k1z_ymmm256b64, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtpd2qq(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtpd2qq_zmm_k1z_zmmm512b64_er, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtpd2udq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtpd2udq_xmm_k1z_xmmm128b64, dst, src), dst.Flags);
		}

		public void vcvtpd2udq(AssemblerRegisterXMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtpd2udq_xmm_k1z_ymmm256b64, dst, src), dst.Flags);
		}

		public void vcvtpd2udq(AssemblerRegisterYMM dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtpd2udq_ymm_k1z_zmmm512b64_er, dst, src), dst.Flags | src.Flags);
		}

		public void vcvtpd2udq(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Code code;
			if (src.IsBroadcast)
			{
				code = Code.EVEX_Vcvtpd2udq_xmm_k1z_ymmm256b64;
			}
			else if (src.Size == MemoryOperandSize.Yword)
			{
				code = Code.EVEX_Vcvtpd2udq_xmm_k1z_ymmm256b64;
			}
			else
			{
				if (src.Size != MemoryOperandSize.Xword)
				{
					throw NoOpCodeFoundFor(Mnemonic.Vcvtpd2udq, dst, src);
				}
				code = Code.EVEX_Vcvtpd2udq_xmm_k1z_xmmm128b64;
			}
			Code code2 = code;
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtpd2udq(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtpd2udq_ymm_k1z_zmmm512b64_er, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtpd2udqx(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtpd2udq_xmm_k1z_xmmm128b64, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtpd2udqy(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtpd2udq_xmm_k1z_ymmm256b64, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtpd2uqq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtpd2uqq_xmm_k1z_xmmm128b64, dst, src), dst.Flags);
		}

		public void vcvtpd2uqq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtpd2uqq_ymm_k1z_ymmm256b64, dst, src), dst.Flags);
		}

		public void vcvtpd2uqq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtpd2uqq_zmm_k1z_zmmm512b64_er, dst, src), dst.Flags | src.Flags);
		}

		public void vcvtpd2uqq(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtpd2uqq_xmm_k1z_xmmm128b64, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtpd2uqq(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtpd2uqq_ymm_k1z_ymmm256b64, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtpd2uqq(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtpd2uqq_zmm_k1z_zmmm512b64_er, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtph2dq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtph2dq_xmm_k1z_xmmm64b16, dst, src), dst.Flags);
		}

		public void vcvtph2dq(AssemblerRegisterYMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtph2dq_ymm_k1z_xmmm128b16, dst, src), dst.Flags);
		}

		public void vcvtph2dq(AssemblerRegisterZMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtph2dq_zmm_k1z_ymmm256b16_er, dst, src), dst.Flags | src.Flags);
		}

		public void vcvtph2dq(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtph2dq_xmm_k1z_xmmm64b16, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtph2dq(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtph2dq_ymm_k1z_xmmm128b16, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtph2dq(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtph2dq_zmm_k1z_ymmm256b16_er, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtph2pd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtph2pd_xmm_k1z_xmmm32b16, dst, src), dst.Flags);
		}

		public void vcvtph2pd(AssemblerRegisterYMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtph2pd_ymm_k1z_xmmm64b16, dst, src), dst.Flags);
		}

		public void vcvtph2pd(AssemblerRegisterZMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtph2pd_zmm_k1z_xmmm128b16_sae, dst, src), dst.Flags | src.Flags);
		}

		public void vcvtph2pd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtph2pd_xmm_k1z_xmmm32b16, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtph2pd(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtph2pd_ymm_k1z_xmmm64b16, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtph2pd(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtph2pd_zmm_k1z_xmmm128b16_sae, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtph2ps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vcvtph2ps_xmm_xmmm64 : Code.EVEX_Vcvtph2ps_xmm_k1z_xmmm64);
			AddInstruction(Instruction.Create(code, dst, src), dst.Flags);
		}

		public void vcvtph2ps(AssemblerRegisterYMM dst, AssemblerRegisterXMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vcvtph2ps_ymm_xmmm128 : Code.EVEX_Vcvtph2ps_ymm_k1z_xmmm128);
			AddInstruction(Instruction.Create(code, dst, src), dst.Flags);
		}

		public void vcvtph2ps(AssemblerRegisterZMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtph2ps_zmm_k1z_ymmm256_sae, dst, src), dst.Flags | src.Flags);
		}

		public void vcvtph2ps(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vcvtph2ps_xmm_xmmm64 : Code.EVEX_Vcvtph2ps_xmm_k1z_xmmm64);
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory), dst.Flags);
		}

		public void vcvtph2ps(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vcvtph2ps_ymm_xmmm128 : Code.EVEX_Vcvtph2ps_ymm_k1z_xmmm128);
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory), dst.Flags);
		}

		public void vcvtph2ps(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtph2ps_zmm_k1z_ymmm256_sae, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtph2psx(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtph2psx_xmm_k1z_xmmm64b16, dst, src), dst.Flags);
		}

		public void vcvtph2psx(AssemblerRegisterYMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtph2psx_ymm_k1z_xmmm128b16, dst, src), dst.Flags);
		}

		public void vcvtph2psx(AssemblerRegisterZMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtph2psx_zmm_k1z_ymmm256b16_sae, dst, src), dst.Flags | src.Flags);
		}

		public void vcvtph2psx(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtph2psx_xmm_k1z_xmmm64b16, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtph2psx(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtph2psx_ymm_k1z_xmmm128b16, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtph2psx(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtph2psx_zmm_k1z_ymmm256b16_sae, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtph2qq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtph2qq_xmm_k1z_xmmm32b16, dst, src), dst.Flags);
		}

		public void vcvtph2qq(AssemblerRegisterYMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtph2qq_ymm_k1z_xmmm64b16, dst, src), dst.Flags);
		}

		public void vcvtph2qq(AssemblerRegisterZMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtph2qq_zmm_k1z_xmmm128b16_er, dst, src), dst.Flags | src.Flags);
		}

		public void vcvtph2qq(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtph2qq_xmm_k1z_xmmm32b16, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtph2qq(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtph2qq_ymm_k1z_xmmm64b16, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtph2qq(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtph2qq_zmm_k1z_xmmm128b16_er, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtph2udq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtph2udq_xmm_k1z_xmmm64b16, dst, src), dst.Flags);
		}

		public void vcvtph2udq(AssemblerRegisterYMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtph2udq_ymm_k1z_xmmm128b16, dst, src), dst.Flags);
		}

		public void vcvtph2udq(AssemblerRegisterZMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtph2udq_zmm_k1z_ymmm256b16_er, dst, src), dst.Flags | src.Flags);
		}

		public void vcvtph2udq(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtph2udq_xmm_k1z_xmmm64b16, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtph2udq(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtph2udq_ymm_k1z_xmmm128b16, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtph2udq(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtph2udq_zmm_k1z_ymmm256b16_er, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtph2uqq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtph2uqq_xmm_k1z_xmmm32b16, dst, src), dst.Flags);
		}

		public void vcvtph2uqq(AssemblerRegisterYMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtph2uqq_ymm_k1z_xmmm64b16, dst, src), dst.Flags);
		}

		public void vcvtph2uqq(AssemblerRegisterZMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtph2uqq_zmm_k1z_xmmm128b16_er, dst, src), dst.Flags | src.Flags);
		}

		public void vcvtph2uqq(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtph2uqq_xmm_k1z_xmmm32b16, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtph2uqq(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtph2uqq_ymm_k1z_xmmm64b16, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtph2uqq(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtph2uqq_zmm_k1z_xmmm128b16_er, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtph2uw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtph2uw_xmm_k1z_xmmm128b16, dst, src), dst.Flags);
		}

		public void vcvtph2uw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtph2uw_ymm_k1z_ymmm256b16, dst, src), dst.Flags);
		}

		public void vcvtph2uw(AssemblerRegisterZMM dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtph2uw_zmm_k1z_zmmm512b16_er, dst, src), dst.Flags | src.Flags);
		}

		public void vcvtph2uw(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtph2uw_xmm_k1z_xmmm128b16, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtph2uw(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtph2uw_ymm_k1z_ymmm256b16, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtph2uw(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtph2uw_zmm_k1z_zmmm512b16_er, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtph2w(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtph2w_xmm_k1z_xmmm128b16, dst, src), dst.Flags);
		}

		public void vcvtph2w(AssemblerRegisterYMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtph2w_ymm_k1z_ymmm256b16, dst, src), dst.Flags);
		}

		public void vcvtph2w(AssemblerRegisterZMM dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtph2w_zmm_k1z_zmmm512b16_er, dst, src), dst.Flags | src.Flags);
		}

		public void vcvtph2w(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtph2w_xmm_k1z_xmmm128b16, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtph2w(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtph2w_ymm_k1z_ymmm256b16, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtph2w(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtph2w_zmm_k1z_zmmm512b16_er, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtps2dq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vcvtps2dq_xmm_xmmm128 : Code.EVEX_Vcvtps2dq_xmm_k1z_xmmm128b32);
			AddInstruction(Instruction.Create(code, dst, src), dst.Flags);
		}

		public void vcvtps2dq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vcvtps2dq_ymm_ymmm256 : Code.EVEX_Vcvtps2dq_ymm_k1z_ymmm256b32);
			AddInstruction(Instruction.Create(code, dst, src), dst.Flags);
		}

		public void vcvtps2dq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtps2dq_zmm_k1z_zmmm512b32_er, dst, src), dst.Flags | src.Flags);
		}

		public void vcvtps2dq(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Code code = ((!src.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vcvtps2dq_xmm_xmmm128 : Code.EVEX_Vcvtps2dq_xmm_k1z_xmmm128b32) : Code.EVEX_Vcvtps2dq_xmm_k1z_xmmm128b32);
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtps2dq(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Code code = ((!src.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vcvtps2dq_ymm_ymmm256 : Code.EVEX_Vcvtps2dq_ymm_k1z_ymmm256b32) : Code.EVEX_Vcvtps2dq_ymm_k1z_ymmm256b32);
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtps2dq(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtps2dq_zmm_k1z_zmmm512b32_er, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtps2pd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vcvtps2pd_xmm_xmmm64 : Code.EVEX_Vcvtps2pd_xmm_k1z_xmmm64b32);
			AddInstruction(Instruction.Create(code, dst, src), dst.Flags);
		}

		public void vcvtps2pd(AssemblerRegisterYMM dst, AssemblerRegisterXMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vcvtps2pd_ymm_xmmm128 : Code.EVEX_Vcvtps2pd_ymm_k1z_xmmm128b32);
			AddInstruction(Instruction.Create(code, dst, src), dst.Flags);
		}

		public void vcvtps2pd(AssemblerRegisterZMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtps2pd_zmm_k1z_ymmm256b32_sae, dst, src), dst.Flags | src.Flags);
		}

		public void vcvtps2pd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Code code = ((!src.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vcvtps2pd_xmm_xmmm64 : Code.EVEX_Vcvtps2pd_xmm_k1z_xmmm64b32) : Code.EVEX_Vcvtps2pd_xmm_k1z_xmmm64b32);
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtps2pd(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Code code = ((!src.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vcvtps2pd_ymm_xmmm128 : Code.EVEX_Vcvtps2pd_ymm_k1z_xmmm128b32) : Code.EVEX_Vcvtps2pd_ymm_k1z_xmmm128b32);
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtps2pd(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtps2pd_zmm_k1z_ymmm256b32_sae, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtps2ph(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vcvtps2ph_xmmm64_xmm_imm8 : Code.EVEX_Vcvtps2ph_xmmm64_k1z_xmm_imm8);
			AddInstruction(Instruction.Create(code, dst, src1, imm), dst.Flags);
		}

		public void vcvtps2ph(AssemblerMemoryOperand dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vcvtps2ph_xmmm64_xmm_imm8 : Code.EVEX_Vcvtps2ph_xmmm64_k1z_xmm_imm8);
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, in memory, src1, imm), dst.Flags);
		}

		public void vcvtps2ph(AssemblerRegisterXMM dst, AssemblerRegisterYMM src1, sbyte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vcvtps2ph_xmmm128_ymm_imm8 : Code.EVEX_Vcvtps2ph_xmmm128_k1z_ymm_imm8);
			AddInstruction(Instruction.Create(code, dst, src1, imm), dst.Flags);
		}

		public void vcvtps2ph(AssemblerMemoryOperand dst, AssemblerRegisterYMM src1, sbyte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vcvtps2ph_xmmm128_ymm_imm8 : Code.EVEX_Vcvtps2ph_xmmm128_k1z_ymm_imm8);
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, in memory, src1, imm), dst.Flags);
		}

		public void vcvtps2ph(AssemblerRegisterYMM dst, AssemblerRegisterZMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtps2ph_ymmm256_k1z_zmm_imm8_sae, dst, src1, imm), dst.Flags | src1.Flags);
		}

		public void vcvtps2ph(AssemblerMemoryOperand dst, AssemblerRegisterZMM src1, sbyte imm)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtps2ph_ymmm256_k1z_zmm_imm8_sae, in memory, src1, imm), dst.Flags | src1.Flags);
		}

		public void vcvtps2ph(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, byte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vcvtps2ph_xmmm64_xmm_imm8 : Code.EVEX_Vcvtps2ph_xmmm64_k1z_xmm_imm8);
			AddInstruction(Instruction.Create(code, (Register)dst, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vcvtps2ph(AssemblerMemoryOperand dst, AssemblerRegisterXMM src1, byte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vcvtps2ph_xmmm64_xmm_imm8 : Code.EVEX_Vcvtps2ph_xmmm64_k1z_xmm_imm8);
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, in memory, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vcvtps2ph(AssemblerRegisterXMM dst, AssemblerRegisterYMM src1, byte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vcvtps2ph_xmmm128_ymm_imm8 : Code.EVEX_Vcvtps2ph_xmmm128_k1z_ymm_imm8);
			AddInstruction(Instruction.Create(code, (Register)dst, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vcvtps2ph(AssemblerMemoryOperand dst, AssemblerRegisterYMM src1, byte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vcvtps2ph_xmmm128_ymm_imm8 : Code.EVEX_Vcvtps2ph_xmmm128_k1z_ymm_imm8);
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, in memory, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vcvtps2ph(AssemblerRegisterYMM dst, AssemblerRegisterZMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtps2ph_ymmm256_k1z_zmm_imm8_sae, (Register)dst, (Register)src1, (uint)imm), dst.Flags | src1.Flags);
		}

		public void vcvtps2ph(AssemblerMemoryOperand dst, AssemblerRegisterZMM src1, byte imm)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtps2ph_ymmm256_k1z_zmm_imm8_sae, in memory, (Register)src1, (uint)imm), dst.Flags | src1.Flags);
		}

		public void vcvtps2phx(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtps2phx_xmm_k1z_xmmm128b32, dst, src), dst.Flags);
		}

		public void vcvtps2phx(AssemblerRegisterXMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtps2phx_xmm_k1z_ymmm256b32, dst, src), dst.Flags);
		}

		public void vcvtps2phx(AssemblerRegisterYMM dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtps2phx_ymm_k1z_zmmm512b32_er, dst, src), dst.Flags | src.Flags);
		}

		public void vcvtps2phx(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Code code;
			if (src.IsBroadcast)
			{
				code = Code.EVEX_Vcvtps2phx_xmm_k1z_ymmm256b32;
			}
			else if (src.Size == MemoryOperandSize.Yword)
			{
				code = Code.EVEX_Vcvtps2phx_xmm_k1z_ymmm256b32;
			}
			else
			{
				if (src.Size != MemoryOperandSize.Xword)
				{
					throw NoOpCodeFoundFor(Mnemonic.Vcvtps2phx, dst, src);
				}
				code = Code.EVEX_Vcvtps2phx_xmm_k1z_xmmm128b32;
			}
			Code code2 = code;
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtps2phx(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtps2phx_ymm_k1z_zmmm512b32_er, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtps2phxx(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtps2phx_xmm_k1z_xmmm128b32, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtps2phxy(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtps2phx_xmm_k1z_ymmm256b32, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtps2qq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtps2qq_xmm_k1z_xmmm64b32, dst, src), dst.Flags);
		}

		public void vcvtps2qq(AssemblerRegisterYMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtps2qq_ymm_k1z_xmmm128b32, dst, src), dst.Flags);
		}

		public void vcvtps2qq(AssemblerRegisterZMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtps2qq_zmm_k1z_ymmm256b32_er, dst, src), dst.Flags | src.Flags);
		}

		public void vcvtps2qq(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtps2qq_xmm_k1z_xmmm64b32, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtps2qq(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtps2qq_ymm_k1z_xmmm128b32, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtps2qq(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtps2qq_zmm_k1z_ymmm256b32_er, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtps2udq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtps2udq_xmm_k1z_xmmm128b32, dst, src), dst.Flags);
		}

		public void vcvtps2udq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtps2udq_ymm_k1z_ymmm256b32, dst, src), dst.Flags);
		}

		public void vcvtps2udq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtps2udq_zmm_k1z_zmmm512b32_er, dst, src), dst.Flags | src.Flags);
		}

		public void vcvtps2udq(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtps2udq_xmm_k1z_xmmm128b32, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtps2udq(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtps2udq_ymm_k1z_ymmm256b32, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtps2udq(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtps2udq_zmm_k1z_zmmm512b32_er, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtps2uqq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtps2uqq_xmm_k1z_xmmm64b32, dst, src), dst.Flags);
		}

		public void vcvtps2uqq(AssemblerRegisterYMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtps2uqq_ymm_k1z_xmmm128b32, dst, src), dst.Flags);
		}

		public void vcvtps2uqq(AssemblerRegisterZMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtps2uqq_zmm_k1z_ymmm256b32_er, dst, src), dst.Flags | src.Flags);
		}

		public void vcvtps2uqq(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtps2uqq_xmm_k1z_xmmm64b32, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtps2uqq(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtps2uqq_ymm_k1z_xmmm128b32, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtps2uqq(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtps2uqq_zmm_k1z_ymmm256b32_er, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtqq2pd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtqq2pd_xmm_k1z_xmmm128b64, dst, src), dst.Flags);
		}

		public void vcvtqq2pd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtqq2pd_ymm_k1z_ymmm256b64, dst, src), dst.Flags);
		}

		public void vcvtqq2pd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtqq2pd_zmm_k1z_zmmm512b64_er, dst, src), dst.Flags | src.Flags);
		}

		public void vcvtqq2pd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtqq2pd_xmm_k1z_xmmm128b64, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtqq2pd(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtqq2pd_ymm_k1z_ymmm256b64, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtqq2pd(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtqq2pd_zmm_k1z_zmmm512b64_er, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtqq2ph(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtqq2ph_xmm_k1z_xmmm128b64, dst, src), dst.Flags);
		}

		public void vcvtqq2ph(AssemblerRegisterXMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtqq2ph_xmm_k1z_ymmm256b64, dst, src), dst.Flags);
		}

		public void vcvtqq2ph(AssemblerRegisterXMM dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtqq2ph_xmm_k1z_zmmm512b64_er, dst, src), dst.Flags | src.Flags);
		}

		public void vcvtqq2ph(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Code code;
			if (src.IsBroadcast)
			{
				code = Code.EVEX_Vcvtqq2ph_xmm_k1z_zmmm512b64_er;
			}
			else if (src.Size == MemoryOperandSize.Zword)
			{
				code = Code.EVEX_Vcvtqq2ph_xmm_k1z_zmmm512b64_er;
			}
			else if (src.Size == MemoryOperandSize.Yword)
			{
				code = Code.EVEX_Vcvtqq2ph_xmm_k1z_ymmm256b64;
			}
			else
			{
				if (src.Size != MemoryOperandSize.Xword)
				{
					throw NoOpCodeFoundFor(Mnemonic.Vcvtqq2ph, dst, src);
				}
				code = Code.EVEX_Vcvtqq2ph_xmm_k1z_xmmm128b64;
			}
			Code code2 = code;
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtqq2phx(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtqq2ph_xmm_k1z_xmmm128b64, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtqq2phy(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtqq2ph_xmm_k1z_ymmm256b64, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtqq2phz(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtqq2ph_xmm_k1z_zmmm512b64_er, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtqq2ps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtqq2ps_xmm_k1z_xmmm128b64, dst, src), dst.Flags);
		}

		public void vcvtqq2ps(AssemblerRegisterXMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtqq2ps_xmm_k1z_ymmm256b64, dst, src), dst.Flags);
		}

		public void vcvtqq2ps(AssemblerRegisterYMM dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtqq2ps_ymm_k1z_zmmm512b64_er, dst, src), dst.Flags | src.Flags);
		}

		public void vcvtqq2ps(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Code code;
			if (src.IsBroadcast)
			{
				code = Code.EVEX_Vcvtqq2ps_xmm_k1z_ymmm256b64;
			}
			else if (src.Size == MemoryOperandSize.Yword)
			{
				code = Code.EVEX_Vcvtqq2ps_xmm_k1z_ymmm256b64;
			}
			else
			{
				if (src.Size != MemoryOperandSize.Xword)
				{
					throw NoOpCodeFoundFor(Mnemonic.Vcvtqq2ps, dst, src);
				}
				code = Code.EVEX_Vcvtqq2ps_xmm_k1z_xmmm128b64;
			}
			Code code2 = code;
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtqq2ps(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtqq2ps_ymm_k1z_zmmm512b64_er, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtqq2psx(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtqq2ps_xmm_k1z_xmmm128b64, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtqq2psy(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtqq2ps_xmm_k1z_ymmm256b64, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtsd2sh(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtsd2sh_xmm_k1z_xmm_xmmm64_er, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vcvtsd2sh(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtsd2sh_xmm_k1z_xmm_xmmm64_er, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vcvtsd2si(AssemblerRegister32 dst, AssemblerRegisterXMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vcvtsd2si_r32_xmmm64 : Code.EVEX_Vcvtsd2si_r32_xmmm64_er);
			AddInstruction(Instruction.Create(code, dst, src), src.Flags);
		}

		public void vcvtsd2si(AssemblerRegister64 dst, AssemblerRegisterXMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vcvtsd2si_r64_xmmm64 : Code.EVEX_Vcvtsd2si_r64_xmmm64_er);
			AddInstruction(Instruction.Create(code, dst, src), src.Flags);
		}

		public void vcvtsd2si(AssemblerRegister32 dst, AssemblerMemoryOperand src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vcvtsd2si_r32_xmmm64 : Code.EVEX_Vcvtsd2si_r32_xmmm64_er);
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory), src.Flags);
		}

		public void vcvtsd2si(AssemblerRegister64 dst, AssemblerMemoryOperand src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vcvtsd2si_r64_xmmm64 : Code.EVEX_Vcvtsd2si_r64_xmmm64_er);
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory), src.Flags);
		}

		public void vcvtsd2ss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vcvtsd2ss_xmm_xmm_xmmm64 : Code.EVEX_Vcvtsd2ss_xmm_k1z_xmm_xmmm64_er);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vcvtsd2ss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vcvtsd2ss_xmm_xmm_xmmm64 : Code.EVEX_Vcvtsd2ss_xmm_k1z_xmm_xmmm64_er);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vcvtsd2usi(AssemblerRegister32 dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtsd2usi_r32_xmmm64_er, dst, src), src.Flags);
		}

		public void vcvtsd2usi(AssemblerRegister64 dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtsd2usi_r64_xmmm64_er, dst, src), src.Flags);
		}

		public void vcvtsd2usi(AssemblerRegister32 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtsd2usi_r32_xmmm64_er, register, in memory), src.Flags);
		}

		public void vcvtsd2usi(AssemblerRegister64 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtsd2usi_r64_xmmm64_er, register, in memory), src.Flags);
		}

		public void vcvtsh2sd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtsh2sd_xmm_k1z_xmm_xmmm16_sae, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vcvtsh2sd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtsh2sd_xmm_k1z_xmm_xmmm16_sae, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vcvtsh2si(AssemblerRegister32 dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtsh2si_r32_xmmm16_er, dst, src), src.Flags);
		}

		public void vcvtsh2si(AssemblerRegister64 dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtsh2si_r64_xmmm16_er, dst, src), src.Flags);
		}

		public void vcvtsh2si(AssemblerRegister32 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtsh2si_r32_xmmm16_er, register, in memory), src.Flags);
		}

		public void vcvtsh2si(AssemblerRegister64 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtsh2si_r64_xmmm16_er, register, in memory), src.Flags);
		}

		public void vcvtsh2ss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtsh2ss_xmm_k1z_xmm_xmmm16_sae, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vcvtsh2ss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtsh2ss_xmm_k1z_xmm_xmmm16_sae, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vcvtsh2usi(AssemblerRegister32 dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtsh2usi_r32_xmmm16_er, dst, src), src.Flags);
		}

		public void vcvtsh2usi(AssemblerRegister64 dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtsh2usi_r64_xmmm16_er, dst, src), src.Flags);
		}

		public void vcvtsh2usi(AssemblerRegister32 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtsh2usi_r32_xmmm16_er, register, in memory), src.Flags);
		}

		public void vcvtsh2usi(AssemblerRegister64 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtsh2usi_r64_xmmm16_er, register, in memory), src.Flags);
		}

		public void vcvtsi2sd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegister32 src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vcvtsi2sd_xmm_xmm_rm32 : Code.EVEX_Vcvtsi2sd_xmm_xmm_rm32_er);
			AddInstruction(Instruction.Create(code, dst, src1, src2), src2.Flags);
		}

		public void vcvtsi2sd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegister64 src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vcvtsi2sd_xmm_xmm_rm64 : Code.EVEX_Vcvtsi2sd_xmm_xmm_rm64_er);
			AddInstruction(Instruction.Create(code, dst, src1, src2), src2.Flags);
		}

		public void vcvtsi2sd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code;
			if (src2.Size == MemoryOperandSize.Qword)
			{
				code = (InstructionPreferVex ? Code.VEX_Vcvtsi2sd_xmm_xmm_rm64 : Code.EVEX_Vcvtsi2sd_xmm_xmm_rm64_er);
			}
			else
			{
				if (src2.Size != MemoryOperandSize.Dword)
				{
					throw NoOpCodeFoundFor(Mnemonic.Vcvtsi2sd, dst, src1, src2);
				}
				code = (InstructionPreferVex ? Code.VEX_Vcvtsi2sd_xmm_xmm_rm32 : Code.EVEX_Vcvtsi2sd_xmm_xmm_rm32_er);
			}
			Code code2 = code;
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, register, register2, in memory), src2.Flags);
		}

		public void vcvtsi2sh(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegister32 src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtsi2sh_xmm_xmm_rm32_er, dst, src1, src2), src2.Flags);
		}

		public void vcvtsi2sh(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegister64 src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtsi2sh_xmm_xmm_rm64_er, dst, src1, src2), src2.Flags);
		}

		public void vcvtsi2sh(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code;
			if (src2.Size == MemoryOperandSize.Qword)
			{
				code = Code.EVEX_Vcvtsi2sh_xmm_xmm_rm64_er;
			}
			else
			{
				if (src2.Size != MemoryOperandSize.Dword)
				{
					throw NoOpCodeFoundFor(Mnemonic.Vcvtsi2sh, dst, src1, src2);
				}
				code = Code.EVEX_Vcvtsi2sh_xmm_xmm_rm32_er;
			}
			Code code2 = code;
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, register, register2, in memory), src2.Flags);
		}

		public void vcvtsi2ss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegister32 src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vcvtsi2ss_xmm_xmm_rm32 : Code.EVEX_Vcvtsi2ss_xmm_xmm_rm32_er);
			AddInstruction(Instruction.Create(code, dst, src1, src2), src2.Flags);
		}

		public void vcvtsi2ss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegister64 src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vcvtsi2ss_xmm_xmm_rm64 : Code.EVEX_Vcvtsi2ss_xmm_xmm_rm64_er);
			AddInstruction(Instruction.Create(code, dst, src1, src2), src2.Flags);
		}

		public void vcvtsi2ss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code;
			if (src2.Size == MemoryOperandSize.Qword)
			{
				code = (InstructionPreferVex ? Code.VEX_Vcvtsi2ss_xmm_xmm_rm64 : Code.EVEX_Vcvtsi2ss_xmm_xmm_rm64_er);
			}
			else
			{
				if (src2.Size != MemoryOperandSize.Dword)
				{
					throw NoOpCodeFoundFor(Mnemonic.Vcvtsi2ss, dst, src1, src2);
				}
				code = (InstructionPreferVex ? Code.VEX_Vcvtsi2ss_xmm_xmm_rm32 : Code.EVEX_Vcvtsi2ss_xmm_xmm_rm32_er);
			}
			Code code2 = code;
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, register, register2, in memory), src2.Flags);
		}

		public void vcvtss2sd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vcvtss2sd_xmm_xmm_xmmm32 : Code.EVEX_Vcvtss2sd_xmm_k1z_xmm_xmmm32_sae);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vcvtss2sd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vcvtss2sd_xmm_xmm_xmmm32 : Code.EVEX_Vcvtss2sd_xmm_k1z_xmm_xmmm32_sae);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vcvtss2sh(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtss2sh_xmm_k1z_xmm_xmmm32_er, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vcvtss2sh(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtss2sh_xmm_k1z_xmm_xmmm32_er, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vcvtss2si(AssemblerRegister32 dst, AssemblerRegisterXMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vcvtss2si_r32_xmmm32 : Code.EVEX_Vcvtss2si_r32_xmmm32_er);
			AddInstruction(Instruction.Create(code, dst, src), src.Flags);
		}

		public void vcvtss2si(AssemblerRegister64 dst, AssemblerRegisterXMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vcvtss2si_r64_xmmm32 : Code.EVEX_Vcvtss2si_r64_xmmm32_er);
			AddInstruction(Instruction.Create(code, dst, src), src.Flags);
		}

		public void vcvtss2si(AssemblerRegister32 dst, AssemblerMemoryOperand src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vcvtss2si_r32_xmmm32 : Code.EVEX_Vcvtss2si_r32_xmmm32_er);
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory), src.Flags);
		}

		public void vcvtss2si(AssemblerRegister64 dst, AssemblerMemoryOperand src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vcvtss2si_r64_xmmm32 : Code.EVEX_Vcvtss2si_r64_xmmm32_er);
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory), src.Flags);
		}

		public void vcvtss2usi(AssemblerRegister32 dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtss2usi_r32_xmmm32_er, dst, src), src.Flags);
		}

		public void vcvtss2usi(AssemblerRegister64 dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtss2usi_r64_xmmm32_er, dst, src), src.Flags);
		}

		public void vcvtss2usi(AssemblerRegister32 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtss2usi_r32_xmmm32_er, register, in memory), src.Flags);
		}

		public void vcvtss2usi(AssemblerRegister64 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtss2usi_r64_xmmm32_er, register, in memory), src.Flags);
		}

		public void vcvttpd2dq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vcvttpd2dq_xmm_xmmm128 : Code.EVEX_Vcvttpd2dq_xmm_k1z_xmmm128b64);
			AddInstruction(Instruction.Create(code, dst, src), dst.Flags);
		}

		public void vcvttpd2dq(AssemblerRegisterXMM dst, AssemblerRegisterYMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vcvttpd2dq_xmm_ymmm256 : Code.EVEX_Vcvttpd2dq_xmm_k1z_ymmm256b64);
			AddInstruction(Instruction.Create(code, dst, src), dst.Flags);
		}

		public void vcvttpd2dq(AssemblerRegisterYMM dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvttpd2dq_ymm_k1z_zmmm512b64_sae, dst, src), dst.Flags | src.Flags);
		}

		public void vcvttpd2dq(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Code code;
			if (src.IsBroadcast)
			{
				code = Code.EVEX_Vcvttpd2dq_xmm_k1z_ymmm256b64;
			}
			else if (src.Size == MemoryOperandSize.Yword)
			{
				code = (InstructionPreferVex ? Code.VEX_Vcvttpd2dq_xmm_ymmm256 : Code.EVEX_Vcvttpd2dq_xmm_k1z_ymmm256b64);
			}
			else
			{
				if (src.Size != MemoryOperandSize.Xword)
				{
					throw NoOpCodeFoundFor(Mnemonic.Vcvttpd2dq, dst, src);
				}
				code = (InstructionPreferVex ? Code.VEX_Vcvttpd2dq_xmm_xmmm128 : Code.EVEX_Vcvttpd2dq_xmm_k1z_xmmm128b64);
			}
			Code code2 = code;
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvttpd2dq(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvttpd2dq_ymm_k1z_zmmm512b64_sae, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvttpd2dqx(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvttpd2dq_xmm_k1z_xmmm128b64, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvttpd2dqy(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvttpd2dq_xmm_k1z_ymmm256b64, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvttpd2qq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvttpd2qq_xmm_k1z_xmmm128b64, dst, src), dst.Flags);
		}

		public void vcvttpd2qq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvttpd2qq_ymm_k1z_ymmm256b64, dst, src), dst.Flags);
		}

		public void vcvttpd2qq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvttpd2qq_zmm_k1z_zmmm512b64_sae, dst, src), dst.Flags | src.Flags);
		}

		public void vcvttpd2qq(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvttpd2qq_xmm_k1z_xmmm128b64, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvttpd2qq(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvttpd2qq_ymm_k1z_ymmm256b64, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvttpd2qq(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvttpd2qq_zmm_k1z_zmmm512b64_sae, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvttpd2udq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvttpd2udq_xmm_k1z_xmmm128b64, dst, src), dst.Flags);
		}

		public void vcvttpd2udq(AssemblerRegisterXMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvttpd2udq_xmm_k1z_ymmm256b64, dst, src), dst.Flags);
		}

		public void vcvttpd2udq(AssemblerRegisterYMM dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvttpd2udq_ymm_k1z_zmmm512b64_sae, dst, src), dst.Flags | src.Flags);
		}

		public void vcvttpd2udq(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Code code;
			if (src.IsBroadcast)
			{
				code = Code.EVEX_Vcvttpd2udq_xmm_k1z_ymmm256b64;
			}
			else if (src.Size == MemoryOperandSize.Yword)
			{
				code = Code.EVEX_Vcvttpd2udq_xmm_k1z_ymmm256b64;
			}
			else
			{
				if (src.Size != MemoryOperandSize.Xword)
				{
					throw NoOpCodeFoundFor(Mnemonic.Vcvttpd2udq, dst, src);
				}
				code = Code.EVEX_Vcvttpd2udq_xmm_k1z_xmmm128b64;
			}
			Code code2 = code;
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvttpd2udq(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvttpd2udq_ymm_k1z_zmmm512b64_sae, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvttpd2udqx(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvttpd2udq_xmm_k1z_xmmm128b64, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvttpd2udqy(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvttpd2udq_xmm_k1z_ymmm256b64, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvttpd2uqq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvttpd2uqq_xmm_k1z_xmmm128b64, dst, src), dst.Flags);
		}

		public void vcvttpd2uqq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvttpd2uqq_ymm_k1z_ymmm256b64, dst, src), dst.Flags);
		}

		public void vcvttpd2uqq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvttpd2uqq_zmm_k1z_zmmm512b64_sae, dst, src), dst.Flags | src.Flags);
		}

		public void vcvttpd2uqq(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvttpd2uqq_xmm_k1z_xmmm128b64, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvttpd2uqq(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvttpd2uqq_ymm_k1z_ymmm256b64, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvttpd2uqq(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvttpd2uqq_zmm_k1z_zmmm512b64_sae, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvttph2dq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvttph2dq_xmm_k1z_xmmm64b16, dst, src), dst.Flags);
		}

		public void vcvttph2dq(AssemblerRegisterYMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvttph2dq_ymm_k1z_xmmm128b16, dst, src), dst.Flags);
		}

		public void vcvttph2dq(AssemblerRegisterZMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvttph2dq_zmm_k1z_ymmm256b16_sae, dst, src), dst.Flags | src.Flags);
		}

		public void vcvttph2dq(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvttph2dq_xmm_k1z_xmmm64b16, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvttph2dq(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvttph2dq_ymm_k1z_xmmm128b16, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvttph2dq(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvttph2dq_zmm_k1z_ymmm256b16_sae, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvttph2qq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvttph2qq_xmm_k1z_xmmm32b16, dst, src), dst.Flags);
		}

		public void vcvttph2qq(AssemblerRegisterYMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvttph2qq_ymm_k1z_xmmm64b16, dst, src), dst.Flags);
		}

		public void vcvttph2qq(AssemblerRegisterZMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvttph2qq_zmm_k1z_xmmm128b16_sae, dst, src), dst.Flags | src.Flags);
		}

		public void vcvttph2qq(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvttph2qq_xmm_k1z_xmmm32b16, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvttph2qq(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvttph2qq_ymm_k1z_xmmm64b16, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvttph2qq(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvttph2qq_zmm_k1z_xmmm128b16_sae, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvttph2udq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvttph2udq_xmm_k1z_xmmm64b16, dst, src), dst.Flags);
		}

		public void vcvttph2udq(AssemblerRegisterYMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvttph2udq_ymm_k1z_xmmm128b16, dst, src), dst.Flags);
		}

		public void vcvttph2udq(AssemblerRegisterZMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvttph2udq_zmm_k1z_ymmm256b16_sae, dst, src), dst.Flags | src.Flags);
		}

		public void vcvttph2udq(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvttph2udq_xmm_k1z_xmmm64b16, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvttph2udq(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvttph2udq_ymm_k1z_xmmm128b16, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvttph2udq(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvttph2udq_zmm_k1z_ymmm256b16_sae, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvttph2uqq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvttph2uqq_xmm_k1z_xmmm32b16, dst, src), dst.Flags);
		}

		public void vcvttph2uqq(AssemblerRegisterYMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvttph2uqq_ymm_k1z_xmmm64b16, dst, src), dst.Flags);
		}

		public void vcvttph2uqq(AssemblerRegisterZMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvttph2uqq_zmm_k1z_xmmm128b16_sae, dst, src), dst.Flags | src.Flags);
		}

		public void vcvttph2uqq(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvttph2uqq_xmm_k1z_xmmm32b16, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvttph2uqq(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvttph2uqq_ymm_k1z_xmmm64b16, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvttph2uqq(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvttph2uqq_zmm_k1z_xmmm128b16_sae, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvttph2uw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvttph2uw_xmm_k1z_xmmm128b16, dst, src), dst.Flags);
		}

		public void vcvttph2uw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvttph2uw_ymm_k1z_ymmm256b16, dst, src), dst.Flags);
		}

		public void vcvttph2uw(AssemblerRegisterZMM dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvttph2uw_zmm_k1z_zmmm512b16_sae, dst, src), dst.Flags | src.Flags);
		}

		public void vcvttph2uw(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvttph2uw_xmm_k1z_xmmm128b16, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvttph2uw(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvttph2uw_ymm_k1z_ymmm256b16, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvttph2uw(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvttph2uw_zmm_k1z_zmmm512b16_sae, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvttph2w(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvttph2w_xmm_k1z_xmmm128b16, dst, src), dst.Flags);
		}

		public void vcvttph2w(AssemblerRegisterYMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvttph2w_ymm_k1z_ymmm256b16, dst, src), dst.Flags);
		}

		public void vcvttph2w(AssemblerRegisterZMM dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvttph2w_zmm_k1z_zmmm512b16_sae, dst, src), dst.Flags | src.Flags);
		}

		public void vcvttph2w(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvttph2w_xmm_k1z_xmmm128b16, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvttph2w(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvttph2w_ymm_k1z_ymmm256b16, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvttph2w(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvttph2w_zmm_k1z_zmmm512b16_sae, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvttps2dq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vcvttps2dq_xmm_xmmm128 : Code.EVEX_Vcvttps2dq_xmm_k1z_xmmm128b32);
			AddInstruction(Instruction.Create(code, dst, src), dst.Flags);
		}

		public void vcvttps2dq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vcvttps2dq_ymm_ymmm256 : Code.EVEX_Vcvttps2dq_ymm_k1z_ymmm256b32);
			AddInstruction(Instruction.Create(code, dst, src), dst.Flags);
		}

		public void vcvttps2dq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvttps2dq_zmm_k1z_zmmm512b32_sae, dst, src), dst.Flags | src.Flags);
		}

		public void vcvttps2dq(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Code code = ((!src.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vcvttps2dq_xmm_xmmm128 : Code.EVEX_Vcvttps2dq_xmm_k1z_xmmm128b32) : Code.EVEX_Vcvttps2dq_xmm_k1z_xmmm128b32);
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvttps2dq(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Code code = ((!src.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vcvttps2dq_ymm_ymmm256 : Code.EVEX_Vcvttps2dq_ymm_k1z_ymmm256b32) : Code.EVEX_Vcvttps2dq_ymm_k1z_ymmm256b32);
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvttps2dq(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvttps2dq_zmm_k1z_zmmm512b32_sae, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvttps2qq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvttps2qq_xmm_k1z_xmmm64b32, dst, src), dst.Flags);
		}

		public void vcvttps2qq(AssemblerRegisterYMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvttps2qq_ymm_k1z_xmmm128b32, dst, src), dst.Flags);
		}

		public void vcvttps2qq(AssemblerRegisterZMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvttps2qq_zmm_k1z_ymmm256b32_sae, dst, src), dst.Flags | src.Flags);
		}

		public void vcvttps2qq(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvttps2qq_xmm_k1z_xmmm64b32, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvttps2qq(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvttps2qq_ymm_k1z_xmmm128b32, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvttps2qq(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvttps2qq_zmm_k1z_ymmm256b32_sae, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvttps2udq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvttps2udq_xmm_k1z_xmmm128b32, dst, src), dst.Flags);
		}

		public void vcvttps2udq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvttps2udq_ymm_k1z_ymmm256b32, dst, src), dst.Flags);
		}

		public void vcvttps2udq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvttps2udq_zmm_k1z_zmmm512b32_sae, dst, src), dst.Flags | src.Flags);
		}

		public void vcvttps2udq(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvttps2udq_xmm_k1z_xmmm128b32, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvttps2udq(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvttps2udq_ymm_k1z_ymmm256b32, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvttps2udq(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvttps2udq_zmm_k1z_zmmm512b32_sae, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvttps2uqq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvttps2uqq_xmm_k1z_xmmm64b32, dst, src), dst.Flags);
		}

		public void vcvttps2uqq(AssemblerRegisterYMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvttps2uqq_ymm_k1z_xmmm128b32, dst, src), dst.Flags);
		}

		public void vcvttps2uqq(AssemblerRegisterZMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvttps2uqq_zmm_k1z_ymmm256b32_sae, dst, src), dst.Flags | src.Flags);
		}

		public void vcvttps2uqq(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvttps2uqq_xmm_k1z_xmmm64b32, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvttps2uqq(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvttps2uqq_ymm_k1z_xmmm128b32, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvttps2uqq(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvttps2uqq_zmm_k1z_ymmm256b32_sae, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvttsd2si(AssemblerRegister32 dst, AssemblerRegisterXMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vcvttsd2si_r32_xmmm64 : Code.EVEX_Vcvttsd2si_r32_xmmm64_sae);
			AddInstruction(Instruction.Create(code, dst, src), src.Flags);
		}

		public void vcvttsd2si(AssemblerRegister64 dst, AssemblerRegisterXMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vcvttsd2si_r64_xmmm64 : Code.EVEX_Vcvttsd2si_r64_xmmm64_sae);
			AddInstruction(Instruction.Create(code, dst, src), src.Flags);
		}

		public void vcvttsd2si(AssemblerRegister32 dst, AssemblerMemoryOperand src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vcvttsd2si_r32_xmmm64 : Code.EVEX_Vcvttsd2si_r32_xmmm64_sae);
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory), src.Flags);
		}

		public void vcvttsd2si(AssemblerRegister64 dst, AssemblerMemoryOperand src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vcvttsd2si_r64_xmmm64 : Code.EVEX_Vcvttsd2si_r64_xmmm64_sae);
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory), src.Flags);
		}

		public void vcvttsd2usi(AssemblerRegister32 dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvttsd2usi_r32_xmmm64_sae, dst, src), src.Flags);
		}

		public void vcvttsd2usi(AssemblerRegister64 dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvttsd2usi_r64_xmmm64_sae, dst, src), src.Flags);
		}

		public void vcvttsd2usi(AssemblerRegister32 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvttsd2usi_r32_xmmm64_sae, register, in memory), src.Flags);
		}

		public void vcvttsd2usi(AssemblerRegister64 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvttsd2usi_r64_xmmm64_sae, register, in memory), src.Flags);
		}

		public void vcvttsh2si(AssemblerRegister32 dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvttsh2si_r32_xmmm16_sae, dst, src), src.Flags);
		}

		public void vcvttsh2si(AssemblerRegister64 dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvttsh2si_r64_xmmm16_sae, dst, src), src.Flags);
		}

		public void vcvttsh2si(AssemblerRegister32 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvttsh2si_r32_xmmm16_sae, register, in memory), src.Flags);
		}

		public void vcvttsh2si(AssemblerRegister64 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvttsh2si_r64_xmmm16_sae, register, in memory), src.Flags);
		}

		public void vcvttsh2usi(AssemblerRegister32 dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvttsh2usi_r32_xmmm16_sae, dst, src), src.Flags);
		}

		public void vcvttsh2usi(AssemblerRegister64 dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvttsh2usi_r64_xmmm16_sae, dst, src), src.Flags);
		}

		public void vcvttsh2usi(AssemblerRegister32 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvttsh2usi_r32_xmmm16_sae, register, in memory), src.Flags);
		}

		public void vcvttsh2usi(AssemblerRegister64 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvttsh2usi_r64_xmmm16_sae, register, in memory), src.Flags);
		}

		public void vcvttss2si(AssemblerRegister32 dst, AssemblerRegisterXMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vcvttss2si_r32_xmmm32 : Code.EVEX_Vcvttss2si_r32_xmmm32_sae);
			AddInstruction(Instruction.Create(code, dst, src), src.Flags);
		}

		public void vcvttss2si(AssemblerRegister64 dst, AssemblerRegisterXMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vcvttss2si_r64_xmmm32 : Code.EVEX_Vcvttss2si_r64_xmmm32_sae);
			AddInstruction(Instruction.Create(code, dst, src), src.Flags);
		}

		public void vcvttss2si(AssemblerRegister32 dst, AssemblerMemoryOperand src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vcvttss2si_r32_xmmm32 : Code.EVEX_Vcvttss2si_r32_xmmm32_sae);
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory), src.Flags);
		}

		public void vcvttss2si(AssemblerRegister64 dst, AssemblerMemoryOperand src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vcvttss2si_r64_xmmm32 : Code.EVEX_Vcvttss2si_r64_xmmm32_sae);
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory), src.Flags);
		}

		public void vcvttss2usi(AssemblerRegister32 dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvttss2usi_r32_xmmm32_sae, dst, src), src.Flags);
		}

		public void vcvttss2usi(AssemblerRegister64 dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvttss2usi_r64_xmmm32_sae, dst, src), src.Flags);
		}

		public void vcvttss2usi(AssemblerRegister32 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvttss2usi_r32_xmmm32_sae, register, in memory), src.Flags);
		}

		public void vcvttss2usi(AssemblerRegister64 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvttss2usi_r64_xmmm32_sae, register, in memory), src.Flags);
		}

		public void vcvtudq2pd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtudq2pd_xmm_k1z_xmmm64b32, dst, src), dst.Flags);
		}

		public void vcvtudq2pd(AssemblerRegisterYMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtudq2pd_ymm_k1z_xmmm128b32, dst, src), dst.Flags);
		}

		public void vcvtudq2pd(AssemblerRegisterZMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtudq2pd_zmm_k1z_ymmm256b32_er, dst, src), dst.Flags | src.Flags);
		}

		public void vcvtudq2pd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtudq2pd_xmm_k1z_xmmm64b32, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtudq2pd(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtudq2pd_ymm_k1z_xmmm128b32, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtudq2pd(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtudq2pd_zmm_k1z_ymmm256b32_er, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtudq2ph(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtudq2ph_xmm_k1z_xmmm128b32, dst, src), dst.Flags);
		}

		public void vcvtudq2ph(AssemblerRegisterXMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtudq2ph_xmm_k1z_ymmm256b32, dst, src), dst.Flags);
		}

		public void vcvtudq2ph(AssemblerRegisterYMM dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtudq2ph_ymm_k1z_zmmm512b32_er, dst, src), dst.Flags | src.Flags);
		}

		public void vcvtudq2ph(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Code code;
			if (src.IsBroadcast)
			{
				code = Code.EVEX_Vcvtudq2ph_xmm_k1z_ymmm256b32;
			}
			else if (src.Size == MemoryOperandSize.Yword)
			{
				code = Code.EVEX_Vcvtudq2ph_xmm_k1z_ymmm256b32;
			}
			else
			{
				if (src.Size != MemoryOperandSize.Xword)
				{
					throw NoOpCodeFoundFor(Mnemonic.Vcvtudq2ph, dst, src);
				}
				code = Code.EVEX_Vcvtudq2ph_xmm_k1z_xmmm128b32;
			}
			Code code2 = code;
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtudq2ph(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtudq2ph_ymm_k1z_zmmm512b32_er, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtudq2phx(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtudq2ph_xmm_k1z_xmmm128b32, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtudq2phy(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtudq2ph_xmm_k1z_ymmm256b32, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtudq2ps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtudq2ps_xmm_k1z_xmmm128b32, dst, src), dst.Flags);
		}

		public void vcvtudq2ps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtudq2ps_ymm_k1z_ymmm256b32, dst, src), dst.Flags);
		}

		public void vcvtudq2ps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtudq2ps_zmm_k1z_zmmm512b32_er, dst, src), dst.Flags | src.Flags);
		}

		public void vcvtudq2ps(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtudq2ps_xmm_k1z_xmmm128b32, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtudq2ps(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtudq2ps_ymm_k1z_ymmm256b32, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtudq2ps(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtudq2ps_zmm_k1z_zmmm512b32_er, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtuqq2pd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtuqq2pd_xmm_k1z_xmmm128b64, dst, src), dst.Flags);
		}

		public void vcvtuqq2pd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtuqq2pd_ymm_k1z_ymmm256b64, dst, src), dst.Flags);
		}

		public void vcvtuqq2pd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtuqq2pd_zmm_k1z_zmmm512b64_er, dst, src), dst.Flags | src.Flags);
		}

		public void vcvtuqq2pd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtuqq2pd_xmm_k1z_xmmm128b64, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtuqq2pd(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtuqq2pd_ymm_k1z_ymmm256b64, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtuqq2pd(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtuqq2pd_zmm_k1z_zmmm512b64_er, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtuqq2ph(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtuqq2ph_xmm_k1z_xmmm128b64, dst, src), dst.Flags);
		}

		public void vcvtuqq2ph(AssemblerRegisterXMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtuqq2ph_xmm_k1z_ymmm256b64, dst, src), dst.Flags);
		}

		public void vcvtuqq2ph(AssemblerRegisterXMM dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtuqq2ph_xmm_k1z_zmmm512b64_er, dst, src), dst.Flags | src.Flags);
		}

		public void vcvtuqq2ph(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Code code;
			if (src.IsBroadcast)
			{
				code = Code.EVEX_Vcvtuqq2ph_xmm_k1z_zmmm512b64_er;
			}
			else if (src.Size == MemoryOperandSize.Zword)
			{
				code = Code.EVEX_Vcvtuqq2ph_xmm_k1z_zmmm512b64_er;
			}
			else if (src.Size == MemoryOperandSize.Yword)
			{
				code = Code.EVEX_Vcvtuqq2ph_xmm_k1z_ymmm256b64;
			}
			else
			{
				if (src.Size != MemoryOperandSize.Xword)
				{
					throw NoOpCodeFoundFor(Mnemonic.Vcvtuqq2ph, dst, src);
				}
				code = Code.EVEX_Vcvtuqq2ph_xmm_k1z_xmmm128b64;
			}
			Code code2 = code;
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtuqq2phx(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtuqq2ph_xmm_k1z_xmmm128b64, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtuqq2phy(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtuqq2ph_xmm_k1z_ymmm256b64, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtuqq2phz(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtuqq2ph_xmm_k1z_zmmm512b64_er, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtuqq2ps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtuqq2ps_xmm_k1z_xmmm128b64, dst, src), dst.Flags);
		}

		public void vcvtuqq2ps(AssemblerRegisterXMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtuqq2ps_xmm_k1z_ymmm256b64, dst, src), dst.Flags);
		}

		public void vcvtuqq2ps(AssemblerRegisterYMM dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtuqq2ps_ymm_k1z_zmmm512b64_er, dst, src), dst.Flags | src.Flags);
		}

		public void vcvtuqq2ps(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Code code;
			if (src.IsBroadcast)
			{
				code = Code.EVEX_Vcvtuqq2ps_xmm_k1z_ymmm256b64;
			}
			else if (src.Size == MemoryOperandSize.Yword)
			{
				code = Code.EVEX_Vcvtuqq2ps_xmm_k1z_ymmm256b64;
			}
			else
			{
				if (src.Size != MemoryOperandSize.Xword)
				{
					throw NoOpCodeFoundFor(Mnemonic.Vcvtuqq2ps, dst, src);
				}
				code = Code.EVEX_Vcvtuqq2ps_xmm_k1z_xmmm128b64;
			}
			Code code2 = code;
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtuqq2ps(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtuqq2ps_ymm_k1z_zmmm512b64_er, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtuqq2psx(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtuqq2ps_xmm_k1z_xmmm128b64, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtuqq2psy(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtuqq2ps_xmm_k1z_ymmm256b64, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtusi2sd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegister32 src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtusi2sd_xmm_xmm_rm32_er, dst, src1, src2), src2.Flags);
		}

		public void vcvtusi2sd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegister64 src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtusi2sd_xmm_xmm_rm64_er, dst, src1, src2), src2.Flags);
		}

		public void vcvtusi2sd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code;
			if (src2.Size == MemoryOperandSize.Qword)
			{
				code = Code.EVEX_Vcvtusi2sd_xmm_xmm_rm64_er;
			}
			else
			{
				if (src2.Size != MemoryOperandSize.Dword)
				{
					throw NoOpCodeFoundFor(Mnemonic.Vcvtusi2sd, dst, src1, src2);
				}
				code = Code.EVEX_Vcvtusi2sd_xmm_xmm_rm32_er;
			}
			Code code2 = code;
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, register, register2, in memory), src2.Flags);
		}

		public void vcvtusi2sh(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegister32 src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtusi2sh_xmm_xmm_rm32_er, dst, src1, src2), src2.Flags);
		}

		public void vcvtusi2sh(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegister64 src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtusi2sh_xmm_xmm_rm64_er, dst, src1, src2), src2.Flags);
		}

		public void vcvtusi2sh(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code;
			if (src2.Size == MemoryOperandSize.Qword)
			{
				code = Code.EVEX_Vcvtusi2sh_xmm_xmm_rm64_er;
			}
			else
			{
				if (src2.Size != MemoryOperandSize.Dword)
				{
					throw NoOpCodeFoundFor(Mnemonic.Vcvtusi2sh, dst, src1, src2);
				}
				code = Code.EVEX_Vcvtusi2sh_xmm_xmm_rm32_er;
			}
			Code code2 = code;
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, register, register2, in memory), src2.Flags);
		}

		public void vcvtusi2ss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegister32 src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtusi2ss_xmm_xmm_rm32_er, dst, src1, src2), src2.Flags);
		}

		public void vcvtusi2ss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegister64 src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtusi2ss_xmm_xmm_rm64_er, dst, src1, src2), src2.Flags);
		}

		public void vcvtusi2ss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code;
			if (src2.Size == MemoryOperandSize.Qword)
			{
				code = Code.EVEX_Vcvtusi2ss_xmm_xmm_rm64_er;
			}
			else
			{
				if (src2.Size != MemoryOperandSize.Dword)
				{
					throw NoOpCodeFoundFor(Mnemonic.Vcvtusi2ss, dst, src1, src2);
				}
				code = Code.EVEX_Vcvtusi2ss_xmm_xmm_rm32_er;
			}
			Code code2 = code;
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, register, register2, in memory), src2.Flags);
		}

		public void vcvtuw2ph(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtuw2ph_xmm_k1z_xmmm128b16, dst, src), dst.Flags);
		}

		public void vcvtuw2ph(AssemblerRegisterYMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtuw2ph_ymm_k1z_ymmm256b16, dst, src), dst.Flags);
		}

		public void vcvtuw2ph(AssemblerRegisterZMM dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtuw2ph_zmm_k1z_zmmm512b16_er, dst, src), dst.Flags | src.Flags);
		}

		public void vcvtuw2ph(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtuw2ph_xmm_k1z_xmmm128b16, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtuw2ph(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtuw2ph_ymm_k1z_ymmm256b16, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtuw2ph(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtuw2ph_zmm_k1z_zmmm512b16_er, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtw2ph(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtw2ph_xmm_k1z_xmmm128b16, dst, src), dst.Flags);
		}

		public void vcvtw2ph(AssemblerRegisterYMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtw2ph_ymm_k1z_ymmm256b16, dst, src), dst.Flags);
		}

		public void vcvtw2ph(AssemblerRegisterZMM dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtw2ph_zmm_k1z_zmmm512b16_er, dst, src), dst.Flags | src.Flags);
		}

		public void vcvtw2ph(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtw2ph_xmm_k1z_xmmm128b16, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtw2ph(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtw2ph_ymm_k1z_ymmm256b16, register, in memory), dst.Flags | src.Flags);
		}

		public void vcvtw2ph(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vcvtw2ph_zmm_k1z_zmmm512b16_er, register, in memory), dst.Flags | src.Flags);
		}

		public void vdbpsadbw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vdbpsadbw_xmm_k1z_xmm_xmmm128_imm8, dst, src1, src2, imm), dst.Flags);
		}

		public void vdbpsadbw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vdbpsadbw_ymm_k1z_ymm_ymmm256_imm8, dst, src1, src2, imm), dst.Flags);
		}

		public void vdbpsadbw(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vdbpsadbw_zmm_k1z_zmm_zmmm512_imm8, dst, src1, src2, imm), dst.Flags);
		}

		public void vdbpsadbw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vdbpsadbw_xmm_k1z_xmm_xmmm128_imm8, register, register2, in memory, imm), dst.Flags);
		}

		public void vdbpsadbw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vdbpsadbw_ymm_k1z_ymm_ymmm256_imm8, register, register2, in memory, imm), dst.Flags);
		}

		public void vdbpsadbw(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vdbpsadbw_zmm_k1z_zmm_zmmm512_imm8, register, register2, in memory, imm), dst.Flags);
		}

		public void vdbpsadbw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vdbpsadbw_xmm_k1z_xmm_xmmm128_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags);
		}

		public void vdbpsadbw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vdbpsadbw_ymm_k1z_ymm_ymmm256_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags);
		}

		public void vdbpsadbw(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vdbpsadbw_zmm_k1z_zmm_zmmm512_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags);
		}

		public void vdbpsadbw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vdbpsadbw_xmm_k1z_xmm_xmmm128_imm8, register, register2, in memory, (uint)imm), dst.Flags);
		}

		public void vdbpsadbw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vdbpsadbw_ymm_k1z_ymm_ymmm256_imm8, register, register2, in memory, (uint)imm), dst.Flags);
		}

		public void vdbpsadbw(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vdbpsadbw_zmm_k1z_zmm_zmmm512_imm8, register, register2, in memory, (uint)imm), dst.Flags);
		}

		public void vdivpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vdivpd_xmm_xmm_xmmm128 : Code.EVEX_Vdivpd_xmm_k1z_xmm_xmmm128b64);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vdivpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vdivpd_ymm_ymm_ymmm256 : Code.EVEX_Vdivpd_ymm_k1z_ymm_ymmm256b64);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vdivpd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vdivpd_zmm_k1z_zmm_zmmm512b64_er, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vdivpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vdivpd_xmm_xmm_xmmm128 : Code.EVEX_Vdivpd_xmm_k1z_xmm_xmmm128b64) : Code.EVEX_Vdivpd_xmm_k1z_xmm_xmmm128b64);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vdivpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vdivpd_ymm_ymm_ymmm256 : Code.EVEX_Vdivpd_ymm_k1z_ymm_ymmm256b64) : Code.EVEX_Vdivpd_ymm_k1z_ymm_ymmm256b64);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vdivpd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vdivpd_zmm_k1z_zmm_zmmm512b64_er, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vdivph(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vdivph_xmm_k1z_xmm_xmmm128b16, dst, src1, src2), dst.Flags);
		}

		public void vdivph(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vdivph_ymm_k1z_ymm_ymmm256b16, dst, src1, src2), dst.Flags);
		}

		public void vdivph(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vdivph_zmm_k1z_zmm_zmmm512b16_er, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vdivph(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vdivph_xmm_k1z_xmm_xmmm128b16, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vdivph(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vdivph_ymm_k1z_ymm_ymmm256b16, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vdivph(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vdivph_zmm_k1z_zmm_zmmm512b16_er, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vdivps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vdivps_xmm_xmm_xmmm128 : Code.EVEX_Vdivps_xmm_k1z_xmm_xmmm128b32);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vdivps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vdivps_ymm_ymm_ymmm256 : Code.EVEX_Vdivps_ymm_k1z_ymm_ymmm256b32);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vdivps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vdivps_zmm_k1z_zmm_zmmm512b32_er, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vdivps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vdivps_xmm_xmm_xmmm128 : Code.EVEX_Vdivps_xmm_k1z_xmm_xmmm128b32) : Code.EVEX_Vdivps_xmm_k1z_xmm_xmmm128b32);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vdivps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vdivps_ymm_ymm_ymmm256 : Code.EVEX_Vdivps_ymm_k1z_ymm_ymmm256b32) : Code.EVEX_Vdivps_ymm_k1z_ymm_ymmm256b32);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vdivps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vdivps_zmm_k1z_zmm_zmmm512b32_er, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vdivsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vdivsd_xmm_xmm_xmmm64 : Code.EVEX_Vdivsd_xmm_k1z_xmm_xmmm64_er);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vdivsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vdivsd_xmm_xmm_xmmm64 : Code.EVEX_Vdivsd_xmm_k1z_xmm_xmmm64_er);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vdivsh(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vdivsh_xmm_k1z_xmm_xmmm16_er, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vdivsh(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vdivsh_xmm_k1z_xmm_xmmm16_er, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vdivss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vdivss_xmm_xmm_xmmm32 : Code.EVEX_Vdivss_xmm_k1z_xmm_xmmm32_er);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vdivss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vdivss_xmm_xmm_xmmm32 : Code.EVEX_Vdivss_xmm_k1z_xmm_xmmm32_er);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vdpbf16ps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vdpbf16ps_xmm_k1z_xmm_xmmm128b32, dst, src1, src2), dst.Flags);
		}

		public void vdpbf16ps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vdpbf16ps_ymm_k1z_ymm_ymmm256b32, dst, src1, src2), dst.Flags);
		}

		public void vdpbf16ps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vdpbf16ps_zmm_k1z_zmm_zmmm512b32, dst, src1, src2), dst.Flags);
		}

		public void vdpbf16ps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vdpbf16ps_xmm_k1z_xmm_xmmm128b32, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vdpbf16ps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vdpbf16ps_ymm_k1z_ymm_ymmm256b32, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vdpbf16ps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vdpbf16ps_zmm_k1z_zmm_zmmm512b32, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vdppd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vdppd_xmm_xmm_xmmm128_imm8, dst, src1, src2, imm));
		}

		public void vdppd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vdppd_xmm_xmm_xmmm128_imm8, register, register2, in memory, imm));
		}

		public void vdppd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vdppd_xmm_xmm_xmmm128_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm));
		}

		public void vdppd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vdppd_xmm_xmm_xmmm128_imm8, register, register2, in memory, (uint)imm));
		}

		public void vdpps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vdpps_xmm_xmm_xmmm128_imm8, dst, src1, src2, imm));
		}

		public void vdpps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vdpps_ymm_ymm_ymmm256_imm8, dst, src1, src2, imm));
		}

		public void vdpps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vdpps_xmm_xmm_xmmm128_imm8, register, register2, in memory, imm));
		}

		public void vdpps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vdpps_ymm_ymm_ymmm256_imm8, register, register2, in memory, imm));
		}

		public void vdpps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vdpps_xmm_xmm_xmmm128_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm));
		}

		public void vdpps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vdpps_ymm_ymm_ymmm256_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm));
		}

		public void vdpps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vdpps_xmm_xmm_xmmm128_imm8, register, register2, in memory, (uint)imm));
		}

		public void vdpps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vdpps_ymm_ymm_ymmm256_imm8, register, register2, in memory, (uint)imm));
		}

		public void verr(AssemblerRegister16 dst)
		{
			AddInstruction(Instruction.Create(Code.Verr_rm16, dst));
		}

		public void verr(AssemblerRegister32 dst)
		{
			AddInstruction(Instruction.Create(Code.Verr_r32m16, dst));
		}

		public void verr(AssemblerRegister64 dst)
		{
			AddInstruction(Instruction.Create(Code.Verr_r64m16, dst));
		}

		public void verr(AssemblerMemoryOperand dst)
		{
			Code code = ((Bitness >= 32) ? Code.Verr_r32m16 : Code.Verr_rm16);
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, in memory));
		}

		public void verw(AssemblerRegister16 dst)
		{
			AddInstruction(Instruction.Create(Code.Verw_rm16, dst));
		}

		public void verw(AssemblerRegister32 dst)
		{
			AddInstruction(Instruction.Create(Code.Verw_r32m16, dst));
		}

		public void verw(AssemblerRegister64 dst)
		{
			AddInstruction(Instruction.Create(Code.Verw_r64m16, dst));
		}

		public void verw(AssemblerMemoryOperand dst)
		{
			Code code = ((Bitness >= 32) ? Code.Verw_r32m16 : Code.Verw_rm16);
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, in memory));
		}

		public void vexp2pd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vexp2pd_zmm_k1z_zmmm512b64_sae, dst, src), dst.Flags | src.Flags);
		}

		public void vexp2pd(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vexp2pd_zmm_k1z_zmmm512b64_sae, register, in memory), dst.Flags | src.Flags);
		}

		public void vexp2ps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vexp2ps_zmm_k1z_zmmm512b32_sae, dst, src), dst.Flags | src.Flags);
		}

		public void vexp2ps(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vexp2ps_zmm_k1z_zmmm512b32_sae, register, in memory), dst.Flags | src.Flags);
		}

		public void vexpandpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vexpandpd_xmm_k1z_xmmm128, dst, src), dst.Flags);
		}

		public void vexpandpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vexpandpd_ymm_k1z_ymmm256, dst, src), dst.Flags);
		}

		public void vexpandpd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vexpandpd_zmm_k1z_zmmm512, dst, src), dst.Flags);
		}

		public void vexpandpd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vexpandpd_xmm_k1z_xmmm128, register, in memory), dst.Flags);
		}

		public void vexpandpd(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vexpandpd_ymm_k1z_ymmm256, register, in memory), dst.Flags);
		}

		public void vexpandpd(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vexpandpd_zmm_k1z_zmmm512, register, in memory), dst.Flags);
		}

		public void vexpandps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vexpandps_xmm_k1z_xmmm128, dst, src), dst.Flags);
		}

		public void vexpandps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vexpandps_ymm_k1z_ymmm256, dst, src), dst.Flags);
		}

		public void vexpandps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vexpandps_zmm_k1z_zmmm512, dst, src), dst.Flags);
		}

		public void vexpandps(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vexpandps_xmm_k1z_xmmm128, register, in memory), dst.Flags);
		}

		public void vexpandps(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vexpandps_ymm_k1z_ymmm256, register, in memory), dst.Flags);
		}

		public void vexpandps(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vexpandps_zmm_k1z_zmmm512, register, in memory), dst.Flags);
		}

		public void vextractf128(AssemblerRegisterXMM dst, AssemblerRegisterYMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vextractf128_xmmm128_ymm_imm8, dst, src1, imm));
		}

		public void vextractf128(AssemblerMemoryOperand dst, AssemblerRegisterYMM src1, sbyte imm)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vextractf128_xmmm128_ymm_imm8, in memory, src1, imm));
		}

		public void vextractf128(AssemblerRegisterXMM dst, AssemblerRegisterYMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vextractf128_xmmm128_ymm_imm8, (Register)dst, (Register)src1, (uint)imm));
		}

		public void vextractf128(AssemblerMemoryOperand dst, AssemblerRegisterYMM src1, byte imm)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vextractf128_xmmm128_ymm_imm8, in memory, (Register)src1, (uint)imm));
		}

		public void vextractf32x4(AssemblerRegisterXMM dst, AssemblerRegisterYMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vextractf32x4_xmmm128_k1z_ymm_imm8, dst, src1, imm), dst.Flags);
		}

		public void vextractf32x4(AssemblerMemoryOperand dst, AssemblerRegisterYMM src1, sbyte imm)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vextractf32x4_xmmm128_k1z_ymm_imm8, in memory, src1, imm), dst.Flags);
		}

		public void vextractf32x4(AssemblerRegisterXMM dst, AssemblerRegisterZMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vextractf32x4_xmmm128_k1z_zmm_imm8, dst, src1, imm), dst.Flags);
		}

		public void vextractf32x4(AssemblerMemoryOperand dst, AssemblerRegisterZMM src1, sbyte imm)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vextractf32x4_xmmm128_k1z_zmm_imm8, in memory, src1, imm), dst.Flags);
		}

		public void vextractf32x4(AssemblerRegisterXMM dst, AssemblerRegisterYMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vextractf32x4_xmmm128_k1z_ymm_imm8, (Register)dst, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vextractf32x4(AssemblerMemoryOperand dst, AssemblerRegisterYMM src1, byte imm)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vextractf32x4_xmmm128_k1z_ymm_imm8, in memory, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vextractf32x4(AssemblerRegisterXMM dst, AssemblerRegisterZMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vextractf32x4_xmmm128_k1z_zmm_imm8, (Register)dst, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vextractf32x4(AssemblerMemoryOperand dst, AssemblerRegisterZMM src1, byte imm)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vextractf32x4_xmmm128_k1z_zmm_imm8, in memory, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vextractf32x8(AssemblerRegisterYMM dst, AssemblerRegisterZMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vextractf32x8_ymmm256_k1z_zmm_imm8, dst, src1, imm), dst.Flags);
		}

		public void vextractf32x8(AssemblerMemoryOperand dst, AssemblerRegisterZMM src1, sbyte imm)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vextractf32x8_ymmm256_k1z_zmm_imm8, in memory, src1, imm), dst.Flags);
		}

		public void vextractf32x8(AssemblerRegisterYMM dst, AssemblerRegisterZMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vextractf32x8_ymmm256_k1z_zmm_imm8, (Register)dst, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vextractf32x8(AssemblerMemoryOperand dst, AssemblerRegisterZMM src1, byte imm)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vextractf32x8_ymmm256_k1z_zmm_imm8, in memory, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vextractf64x2(AssemblerRegisterXMM dst, AssemblerRegisterYMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vextractf64x2_xmmm128_k1z_ymm_imm8, dst, src1, imm), dst.Flags);
		}

		public void vextractf64x2(AssemblerMemoryOperand dst, AssemblerRegisterYMM src1, sbyte imm)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vextractf64x2_xmmm128_k1z_ymm_imm8, in memory, src1, imm), dst.Flags);
		}

		public void vextractf64x2(AssemblerRegisterXMM dst, AssemblerRegisterZMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vextractf64x2_xmmm128_k1z_zmm_imm8, dst, src1, imm), dst.Flags);
		}

		public void vextractf64x2(AssemblerMemoryOperand dst, AssemblerRegisterZMM src1, sbyte imm)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vextractf64x2_xmmm128_k1z_zmm_imm8, in memory, src1, imm), dst.Flags);
		}

		public void vextractf64x2(AssemblerRegisterXMM dst, AssemblerRegisterYMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vextractf64x2_xmmm128_k1z_ymm_imm8, (Register)dst, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vextractf64x2(AssemblerMemoryOperand dst, AssemblerRegisterYMM src1, byte imm)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vextractf64x2_xmmm128_k1z_ymm_imm8, in memory, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vextractf64x2(AssemblerRegisterXMM dst, AssemblerRegisterZMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vextractf64x2_xmmm128_k1z_zmm_imm8, (Register)dst, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vextractf64x2(AssemblerMemoryOperand dst, AssemblerRegisterZMM src1, byte imm)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vextractf64x2_xmmm128_k1z_zmm_imm8, in memory, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vextractf64x4(AssemblerRegisterYMM dst, AssemblerRegisterZMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vextractf64x4_ymmm256_k1z_zmm_imm8, dst, src1, imm), dst.Flags);
		}

		public void vextractf64x4(AssemblerMemoryOperand dst, AssemblerRegisterZMM src1, sbyte imm)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vextractf64x4_ymmm256_k1z_zmm_imm8, in memory, src1, imm), dst.Flags);
		}

		public void vextractf64x4(AssemblerRegisterYMM dst, AssemblerRegisterZMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vextractf64x4_ymmm256_k1z_zmm_imm8, (Register)dst, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vextractf64x4(AssemblerMemoryOperand dst, AssemblerRegisterZMM src1, byte imm)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vextractf64x4_ymmm256_k1z_zmm_imm8, in memory, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vextracti128(AssemblerRegisterXMM dst, AssemblerRegisterYMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vextracti128_xmmm128_ymm_imm8, dst, src1, imm));
		}

		public void vextracti128(AssemblerMemoryOperand dst, AssemblerRegisterYMM src1, sbyte imm)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vextracti128_xmmm128_ymm_imm8, in memory, src1, imm));
		}

		public void vextracti128(AssemblerRegisterXMM dst, AssemblerRegisterYMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vextracti128_xmmm128_ymm_imm8, (Register)dst, (Register)src1, (uint)imm));
		}

		public void vextracti128(AssemblerMemoryOperand dst, AssemblerRegisterYMM src1, byte imm)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vextracti128_xmmm128_ymm_imm8, in memory, (Register)src1, (uint)imm));
		}

		public void vextracti32x4(AssemblerRegisterXMM dst, AssemblerRegisterYMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vextracti32x4_xmmm128_k1z_ymm_imm8, dst, src1, imm), dst.Flags);
		}

		public void vextracti32x4(AssemblerMemoryOperand dst, AssemblerRegisterYMM src1, sbyte imm)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vextracti32x4_xmmm128_k1z_ymm_imm8, in memory, src1, imm), dst.Flags);
		}

		public void vextracti32x4(AssemblerRegisterXMM dst, AssemblerRegisterZMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vextracti32x4_xmmm128_k1z_zmm_imm8, dst, src1, imm), dst.Flags);
		}

		public void vextracti32x4(AssemblerMemoryOperand dst, AssemblerRegisterZMM src1, sbyte imm)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vextracti32x4_xmmm128_k1z_zmm_imm8, in memory, src1, imm), dst.Flags);
		}

		public void vextracti32x4(AssemblerRegisterXMM dst, AssemblerRegisterYMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vextracti32x4_xmmm128_k1z_ymm_imm8, (Register)dst, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vextracti32x4(AssemblerMemoryOperand dst, AssemblerRegisterYMM src1, byte imm)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vextracti32x4_xmmm128_k1z_ymm_imm8, in memory, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vextracti32x4(AssemblerRegisterXMM dst, AssemblerRegisterZMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vextracti32x4_xmmm128_k1z_zmm_imm8, (Register)dst, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vextracti32x4(AssemblerMemoryOperand dst, AssemblerRegisterZMM src1, byte imm)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vextracti32x4_xmmm128_k1z_zmm_imm8, in memory, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vextracti32x8(AssemblerRegisterYMM dst, AssemblerRegisterZMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vextracti32x8_ymmm256_k1z_zmm_imm8, dst, src1, imm), dst.Flags);
		}

		public void vextracti32x8(AssemblerMemoryOperand dst, AssemblerRegisterZMM src1, sbyte imm)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vextracti32x8_ymmm256_k1z_zmm_imm8, in memory, src1, imm), dst.Flags);
		}

		public void vextracti32x8(AssemblerRegisterYMM dst, AssemblerRegisterZMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vextracti32x8_ymmm256_k1z_zmm_imm8, (Register)dst, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vextracti32x8(AssemblerMemoryOperand dst, AssemblerRegisterZMM src1, byte imm)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vextracti32x8_ymmm256_k1z_zmm_imm8, in memory, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vextracti64x2(AssemblerRegisterXMM dst, AssemblerRegisterYMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vextracti64x2_xmmm128_k1z_ymm_imm8, dst, src1, imm), dst.Flags);
		}

		public void vextracti64x2(AssemblerMemoryOperand dst, AssemblerRegisterYMM src1, sbyte imm)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vextracti64x2_xmmm128_k1z_ymm_imm8, in memory, src1, imm), dst.Flags);
		}

		public void vextracti64x2(AssemblerRegisterXMM dst, AssemblerRegisterZMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vextracti64x2_xmmm128_k1z_zmm_imm8, dst, src1, imm), dst.Flags);
		}

		public void vextracti64x2(AssemblerMemoryOperand dst, AssemblerRegisterZMM src1, sbyte imm)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vextracti64x2_xmmm128_k1z_zmm_imm8, in memory, src1, imm), dst.Flags);
		}

		public void vextracti64x2(AssemblerRegisterXMM dst, AssemblerRegisterYMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vextracti64x2_xmmm128_k1z_ymm_imm8, (Register)dst, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vextracti64x2(AssemblerMemoryOperand dst, AssemblerRegisterYMM src1, byte imm)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vextracti64x2_xmmm128_k1z_ymm_imm8, in memory, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vextracti64x2(AssemblerRegisterXMM dst, AssemblerRegisterZMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vextracti64x2_xmmm128_k1z_zmm_imm8, (Register)dst, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vextracti64x2(AssemblerMemoryOperand dst, AssemblerRegisterZMM src1, byte imm)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vextracti64x2_xmmm128_k1z_zmm_imm8, in memory, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vextracti64x4(AssemblerRegisterYMM dst, AssemblerRegisterZMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vextracti64x4_ymmm256_k1z_zmm_imm8, dst, src1, imm), dst.Flags);
		}

		public void vextracti64x4(AssemblerMemoryOperand dst, AssemblerRegisterZMM src1, sbyte imm)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vextracti64x4_ymmm256_k1z_zmm_imm8, in memory, src1, imm), dst.Flags);
		}

		public void vextracti64x4(AssemblerRegisterYMM dst, AssemblerRegisterZMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vextracti64x4_ymmm256_k1z_zmm_imm8, (Register)dst, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vextracti64x4(AssemblerMemoryOperand dst, AssemblerRegisterZMM src1, byte imm)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vextracti64x4_ymmm256_k1z_zmm_imm8, in memory, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vextractps(AssemblerRegister32 dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vextractps_rm32_xmm_imm8 : Code.EVEX_Vextractps_rm32_xmm_imm8);
			AddInstruction(Instruction.Create(code, dst, src1, imm));
		}

		public void vextractps(AssemblerRegister64 dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vextractps_r64m32_xmm_imm8 : Code.EVEX_Vextractps_r64m32_xmm_imm8);
			AddInstruction(Instruction.Create(code, dst, src1, imm));
		}

		public void vextractps(AssemblerMemoryOperand dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vextractps_rm32_xmm_imm8 : Code.EVEX_Vextractps_rm32_xmm_imm8);
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, in memory, src1, imm));
		}

		public void vextractps(AssemblerRegister32 dst, AssemblerRegisterXMM src1, byte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vextractps_rm32_xmm_imm8 : Code.EVEX_Vextractps_rm32_xmm_imm8);
			AddInstruction(Instruction.Create(code, (Register)dst, (Register)src1, (uint)imm));
		}

		public void vextractps(AssemblerRegister64 dst, AssemblerRegisterXMM src1, byte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vextractps_r64m32_xmm_imm8 : Code.EVEX_Vextractps_r64m32_xmm_imm8);
			AddInstruction(Instruction.Create(code, (Register)dst, (Register)src1, (uint)imm));
		}

		public void vextractps(AssemblerMemoryOperand dst, AssemblerRegisterXMM src1, byte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vextractps_rm32_xmm_imm8 : Code.EVEX_Vextractps_rm32_xmm_imm8);
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, in memory, (Register)src1, (uint)imm));
		}

		public void vfcmaddcph(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfcmaddcph_xmm_k1z_xmm_xmmm128b32, dst, src1, src2), dst.Flags);
		}

		public void vfcmaddcph(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfcmaddcph_ymm_k1z_ymm_ymmm256b32, dst, src1, src2), dst.Flags);
		}

		public void vfcmaddcph(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfcmaddcph_zmm_k1z_zmm_zmmm512b32_er, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vfcmaddcph(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfcmaddcph_xmm_k1z_xmm_xmmm128b32, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfcmaddcph(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfcmaddcph_ymm_k1z_ymm_ymmm256b32, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfcmaddcph(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfcmaddcph_zmm_k1z_zmm_zmmm512b32_er, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfcmaddcsh(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfcmaddcsh_xmm_k1z_xmm_xmmm32_er, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vfcmaddcsh(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfcmaddcsh_xmm_k1z_xmm_xmmm32_er, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfcmulcph(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfcmulcph_xmm_k1z_xmm_xmmm128b32, dst, src1, src2), dst.Flags);
		}

		public void vfcmulcph(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfcmulcph_ymm_k1z_ymm_ymmm256b32, dst, src1, src2), dst.Flags);
		}

		public void vfcmulcph(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfcmulcph_zmm_k1z_zmm_zmmm512b32_er, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vfcmulcph(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfcmulcph_xmm_k1z_xmm_xmmm128b32, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfcmulcph(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfcmulcph_ymm_k1z_ymm_ymmm256b32, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfcmulcph(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfcmulcph_zmm_k1z_zmm_zmmm512b32_er, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfcmulcsh(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfcmulcsh_xmm_k1z_xmm_xmmm32_er, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vfcmulcsh(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfcmulcsh_xmm_k1z_xmm_xmmm32_er, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfixupimmpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfixupimmpd_xmm_k1z_xmm_xmmm128b64_imm8, dst, src1, src2, imm), dst.Flags);
		}

		public void vfixupimmpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfixupimmpd_ymm_k1z_ymm_ymmm256b64_imm8, dst, src1, src2, imm), dst.Flags);
		}

		public void vfixupimmpd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfixupimmpd_zmm_k1z_zmm_zmmm512b64_imm8_sae, dst, src1, src2, imm), dst.Flags | src2.Flags);
		}

		public void vfixupimmpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfixupimmpd_xmm_k1z_xmm_xmmm128b64_imm8, register, register2, in memory, imm), dst.Flags | src2.Flags);
		}

		public void vfixupimmpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfixupimmpd_ymm_k1z_ymm_ymmm256b64_imm8, register, register2, in memory, imm), dst.Flags | src2.Flags);
		}

		public void vfixupimmpd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfixupimmpd_zmm_k1z_zmm_zmmm512b64_imm8_sae, register, register2, in memory, imm), dst.Flags | src2.Flags);
		}

		public void vfixupimmpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfixupimmpd_xmm_k1z_xmm_xmmm128b64_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags);
		}

		public void vfixupimmpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfixupimmpd_ymm_k1z_ymm_ymmm256b64_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags);
		}

		public void vfixupimmpd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfixupimmpd_zmm_k1z_zmm_zmmm512b64_imm8_sae, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vfixupimmpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfixupimmpd_xmm_k1z_xmm_xmmm128b64_imm8, register, register2, in memory, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vfixupimmpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfixupimmpd_ymm_k1z_ymm_ymmm256b64_imm8, register, register2, in memory, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vfixupimmpd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfixupimmpd_zmm_k1z_zmm_zmmm512b64_imm8_sae, register, register2, in memory, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vfixupimmps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfixupimmps_xmm_k1z_xmm_xmmm128b32_imm8, dst, src1, src2, imm), dst.Flags);
		}

		public void vfixupimmps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfixupimmps_ymm_k1z_ymm_ymmm256b32_imm8, dst, src1, src2, imm), dst.Flags);
		}

		public void vfixupimmps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfixupimmps_zmm_k1z_zmm_zmmm512b32_imm8_sae, dst, src1, src2, imm), dst.Flags | src2.Flags);
		}

		public void vfixupimmps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfixupimmps_xmm_k1z_xmm_xmmm128b32_imm8, register, register2, in memory, imm), dst.Flags | src2.Flags);
		}

		public void vfixupimmps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfixupimmps_ymm_k1z_ymm_ymmm256b32_imm8, register, register2, in memory, imm), dst.Flags | src2.Flags);
		}

		public void vfixupimmps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfixupimmps_zmm_k1z_zmm_zmmm512b32_imm8_sae, register, register2, in memory, imm), dst.Flags | src2.Flags);
		}

		public void vfixupimmps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfixupimmps_xmm_k1z_xmm_xmmm128b32_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags);
		}

		public void vfixupimmps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfixupimmps_ymm_k1z_ymm_ymmm256b32_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags);
		}

		public void vfixupimmps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfixupimmps_zmm_k1z_zmm_zmmm512b32_imm8_sae, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vfixupimmps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfixupimmps_xmm_k1z_xmm_xmmm128b32_imm8, register, register2, in memory, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vfixupimmps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfixupimmps_ymm_k1z_ymm_ymmm256b32_imm8, register, register2, in memory, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vfixupimmps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfixupimmps_zmm_k1z_zmm_zmmm512b32_imm8_sae, register, register2, in memory, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vfixupimmsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfixupimmsd_xmm_k1z_xmm_xmmm64_imm8_sae, dst, src1, src2, imm), dst.Flags | src2.Flags);
		}

		public void vfixupimmsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfixupimmsd_xmm_k1z_xmm_xmmm64_imm8_sae, register, register2, in memory, imm), dst.Flags | src2.Flags);
		}

		public void vfixupimmsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfixupimmsd_xmm_k1z_xmm_xmmm64_imm8_sae, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vfixupimmsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfixupimmsd_xmm_k1z_xmm_xmmm64_imm8_sae, register, register2, in memory, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vfixupimmss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfixupimmss_xmm_k1z_xmm_xmmm32_imm8_sae, dst, src1, src2, imm), dst.Flags | src2.Flags);
		}

		public void vfixupimmss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfixupimmss_xmm_k1z_xmm_xmmm32_imm8_sae, register, register2, in memory, imm), dst.Flags | src2.Flags);
		}

		public void vfixupimmss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfixupimmss_xmm_k1z_xmm_xmmm32_imm8_sae, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vfixupimmss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfixupimmss_xmm_k1z_xmm_xmmm32_imm8_sae, register, register2, in memory, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vfmadd132pd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfmadd132pd_xmm_xmm_xmmm128 : Code.EVEX_Vfmadd132pd_xmm_k1z_xmm_xmmm128b64);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vfmadd132pd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfmadd132pd_ymm_ymm_ymmm256 : Code.EVEX_Vfmadd132pd_ymm_k1z_ymm_ymmm256b64);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vfmadd132pd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfmadd132pd_zmm_k1z_zmm_zmmm512b64_er, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vfmadd132pd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vfmadd132pd_xmm_xmm_xmmm128 : Code.EVEX_Vfmadd132pd_xmm_k1z_xmm_xmmm128b64) : Code.EVEX_Vfmadd132pd_xmm_k1z_xmm_xmmm128b64);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmadd132pd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vfmadd132pd_ymm_ymm_ymmm256 : Code.EVEX_Vfmadd132pd_ymm_k1z_ymm_ymmm256b64) : Code.EVEX_Vfmadd132pd_ymm_k1z_ymm_ymmm256b64);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmadd132pd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfmadd132pd_zmm_k1z_zmm_zmmm512b64_er, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmadd132ph(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfmadd132ph_xmm_k1z_xmm_xmmm128b16, dst, src1, src2), dst.Flags);
		}

		public void vfmadd132ph(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfmadd132ph_ymm_k1z_ymm_ymmm256b16, dst, src1, src2), dst.Flags);
		}

		public void vfmadd132ph(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfmadd132ph_zmm_k1z_zmm_zmmm512b16_er, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vfmadd132ph(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfmadd132ph_xmm_k1z_xmm_xmmm128b16, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmadd132ph(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfmadd132ph_ymm_k1z_ymm_ymmm256b16, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmadd132ph(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfmadd132ph_zmm_k1z_zmm_zmmm512b16_er, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmadd132ps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfmadd132ps_xmm_xmm_xmmm128 : Code.EVEX_Vfmadd132ps_xmm_k1z_xmm_xmmm128b32);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vfmadd132ps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfmadd132ps_ymm_ymm_ymmm256 : Code.EVEX_Vfmadd132ps_ymm_k1z_ymm_ymmm256b32);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vfmadd132ps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfmadd132ps_zmm_k1z_zmm_zmmm512b32_er, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vfmadd132ps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vfmadd132ps_xmm_xmm_xmmm128 : Code.EVEX_Vfmadd132ps_xmm_k1z_xmm_xmmm128b32) : Code.EVEX_Vfmadd132ps_xmm_k1z_xmm_xmmm128b32);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmadd132ps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vfmadd132ps_ymm_ymm_ymmm256 : Code.EVEX_Vfmadd132ps_ymm_k1z_ymm_ymmm256b32) : Code.EVEX_Vfmadd132ps_ymm_k1z_ymm_ymmm256b32);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmadd132ps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfmadd132ps_zmm_k1z_zmm_zmmm512b32_er, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmadd132sd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfmadd132sd_xmm_xmm_xmmm64 : Code.EVEX_Vfmadd132sd_xmm_k1z_xmm_xmmm64_er);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vfmadd132sd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfmadd132sd_xmm_xmm_xmmm64 : Code.EVEX_Vfmadd132sd_xmm_k1z_xmm_xmmm64_er);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmadd132sh(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfmadd132sh_xmm_k1z_xmm_xmmm16_er, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vfmadd132sh(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfmadd132sh_xmm_k1z_xmm_xmmm16_er, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmadd132ss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfmadd132ss_xmm_xmm_xmmm32 : Code.EVEX_Vfmadd132ss_xmm_k1z_xmm_xmmm32_er);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vfmadd132ss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfmadd132ss_xmm_xmm_xmmm32 : Code.EVEX_Vfmadd132ss_xmm_k1z_xmm_xmmm32_er);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmadd213pd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfmadd213pd_xmm_xmm_xmmm128 : Code.EVEX_Vfmadd213pd_xmm_k1z_xmm_xmmm128b64);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vfmadd213pd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfmadd213pd_ymm_ymm_ymmm256 : Code.EVEX_Vfmadd213pd_ymm_k1z_ymm_ymmm256b64);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vfmadd213pd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfmadd213pd_zmm_k1z_zmm_zmmm512b64_er, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vfmadd213pd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vfmadd213pd_xmm_xmm_xmmm128 : Code.EVEX_Vfmadd213pd_xmm_k1z_xmm_xmmm128b64) : Code.EVEX_Vfmadd213pd_xmm_k1z_xmm_xmmm128b64);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmadd213pd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vfmadd213pd_ymm_ymm_ymmm256 : Code.EVEX_Vfmadd213pd_ymm_k1z_ymm_ymmm256b64) : Code.EVEX_Vfmadd213pd_ymm_k1z_ymm_ymmm256b64);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmadd213pd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfmadd213pd_zmm_k1z_zmm_zmmm512b64_er, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmadd213ph(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfmadd213ph_xmm_k1z_xmm_xmmm128b16, dst, src1, src2), dst.Flags);
		}

		public void vfmadd213ph(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfmadd213ph_ymm_k1z_ymm_ymmm256b16, dst, src1, src2), dst.Flags);
		}

		public void vfmadd213ph(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfmadd213ph_zmm_k1z_zmm_zmmm512b16_er, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vfmadd213ph(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfmadd213ph_xmm_k1z_xmm_xmmm128b16, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmadd213ph(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfmadd213ph_ymm_k1z_ymm_ymmm256b16, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmadd213ph(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfmadd213ph_zmm_k1z_zmm_zmmm512b16_er, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmadd213ps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfmadd213ps_xmm_xmm_xmmm128 : Code.EVEX_Vfmadd213ps_xmm_k1z_xmm_xmmm128b32);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vfmadd213ps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfmadd213ps_ymm_ymm_ymmm256 : Code.EVEX_Vfmadd213ps_ymm_k1z_ymm_ymmm256b32);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vfmadd213ps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfmadd213ps_zmm_k1z_zmm_zmmm512b32_er, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vfmadd213ps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vfmadd213ps_xmm_xmm_xmmm128 : Code.EVEX_Vfmadd213ps_xmm_k1z_xmm_xmmm128b32) : Code.EVEX_Vfmadd213ps_xmm_k1z_xmm_xmmm128b32);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmadd213ps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vfmadd213ps_ymm_ymm_ymmm256 : Code.EVEX_Vfmadd213ps_ymm_k1z_ymm_ymmm256b32) : Code.EVEX_Vfmadd213ps_ymm_k1z_ymm_ymmm256b32);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmadd213ps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfmadd213ps_zmm_k1z_zmm_zmmm512b32_er, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmadd213sd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfmadd213sd_xmm_xmm_xmmm64 : Code.EVEX_Vfmadd213sd_xmm_k1z_xmm_xmmm64_er);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vfmadd213sd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfmadd213sd_xmm_xmm_xmmm64 : Code.EVEX_Vfmadd213sd_xmm_k1z_xmm_xmmm64_er);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmadd213sh(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfmadd213sh_xmm_k1z_xmm_xmmm16_er, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vfmadd213sh(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfmadd213sh_xmm_k1z_xmm_xmmm16_er, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmadd213ss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfmadd213ss_xmm_xmm_xmmm32 : Code.EVEX_Vfmadd213ss_xmm_k1z_xmm_xmmm32_er);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vfmadd213ss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfmadd213ss_xmm_xmm_xmmm32 : Code.EVEX_Vfmadd213ss_xmm_k1z_xmm_xmmm32_er);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmadd231pd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfmadd231pd_xmm_xmm_xmmm128 : Code.EVEX_Vfmadd231pd_xmm_k1z_xmm_xmmm128b64);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vfmadd231pd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfmadd231pd_ymm_ymm_ymmm256 : Code.EVEX_Vfmadd231pd_ymm_k1z_ymm_ymmm256b64);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vfmadd231pd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfmadd231pd_zmm_k1z_zmm_zmmm512b64_er, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vfmadd231pd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vfmadd231pd_xmm_xmm_xmmm128 : Code.EVEX_Vfmadd231pd_xmm_k1z_xmm_xmmm128b64) : Code.EVEX_Vfmadd231pd_xmm_k1z_xmm_xmmm128b64);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmadd231pd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vfmadd231pd_ymm_ymm_ymmm256 : Code.EVEX_Vfmadd231pd_ymm_k1z_ymm_ymmm256b64) : Code.EVEX_Vfmadd231pd_ymm_k1z_ymm_ymmm256b64);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmadd231pd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfmadd231pd_zmm_k1z_zmm_zmmm512b64_er, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmadd231ph(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfmadd231ph_xmm_k1z_xmm_xmmm128b16, dst, src1, src2), dst.Flags);
		}

		public void vfmadd231ph(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfmadd231ph_ymm_k1z_ymm_ymmm256b16, dst, src1, src2), dst.Flags);
		}

		public void vfmadd231ph(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfmadd231ph_zmm_k1z_zmm_zmmm512b16_er, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vfmadd231ph(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfmadd231ph_xmm_k1z_xmm_xmmm128b16, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmadd231ph(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfmadd231ph_ymm_k1z_ymm_ymmm256b16, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmadd231ph(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfmadd231ph_zmm_k1z_zmm_zmmm512b16_er, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmadd231ps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfmadd231ps_xmm_xmm_xmmm128 : Code.EVEX_Vfmadd231ps_xmm_k1z_xmm_xmmm128b32);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vfmadd231ps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfmadd231ps_ymm_ymm_ymmm256 : Code.EVEX_Vfmadd231ps_ymm_k1z_ymm_ymmm256b32);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vfmadd231ps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfmadd231ps_zmm_k1z_zmm_zmmm512b32_er, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vfmadd231ps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vfmadd231ps_xmm_xmm_xmmm128 : Code.EVEX_Vfmadd231ps_xmm_k1z_xmm_xmmm128b32) : Code.EVEX_Vfmadd231ps_xmm_k1z_xmm_xmmm128b32);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmadd231ps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vfmadd231ps_ymm_ymm_ymmm256 : Code.EVEX_Vfmadd231ps_ymm_k1z_ymm_ymmm256b32) : Code.EVEX_Vfmadd231ps_ymm_k1z_ymm_ymmm256b32);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmadd231ps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfmadd231ps_zmm_k1z_zmm_zmmm512b32_er, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmadd231sd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfmadd231sd_xmm_xmm_xmmm64 : Code.EVEX_Vfmadd231sd_xmm_k1z_xmm_xmmm64_er);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vfmadd231sd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfmadd231sd_xmm_xmm_xmmm64 : Code.EVEX_Vfmadd231sd_xmm_k1z_xmm_xmmm64_er);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmadd231sh(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfmadd231sh_xmm_k1z_xmm_xmmm16_er, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vfmadd231sh(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfmadd231sh_xmm_k1z_xmm_xmmm16_er, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmadd231ss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfmadd231ss_xmm_xmm_xmmm32 : Code.EVEX_Vfmadd231ss_xmm_k1z_xmm_xmmm32_er);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vfmadd231ss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfmadd231ss_xmm_xmm_xmmm32 : Code.EVEX_Vfmadd231ss_xmm_k1z_xmm_xmmm32_er);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmaddcph(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfmaddcph_xmm_k1z_xmm_xmmm128b32, dst, src1, src2), dst.Flags);
		}

		public void vfmaddcph(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfmaddcph_ymm_k1z_ymm_ymmm256b32, dst, src1, src2), dst.Flags);
		}

		public void vfmaddcph(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfmaddcph_zmm_k1z_zmm_zmmm512b32_er, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vfmaddcph(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfmaddcph_xmm_k1z_xmm_xmmm128b32, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmaddcph(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfmaddcph_ymm_k1z_ymm_ymmm256b32, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmaddcph(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfmaddcph_zmm_k1z_zmm_zmmm512b32_er, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmaddcsh(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfmaddcsh_xmm_k1z_xmm_xmmm32_er, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vfmaddcsh(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfmaddcsh_xmm_k1z_xmm_xmmm32_er, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmaddpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, AssemblerRegisterXMM src3)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vfmaddpd_xmm_xmm_xmmm128_xmm, dst, src1, src2, src3));
		}

		public void vfmaddpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, AssemblerRegisterXMM src3)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vfmaddpd_xmm_xmm_xmmm128_xmm, register, register2, in memory, src3));
		}

		public void vfmaddpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, AssemblerRegisterYMM src3)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vfmaddpd_ymm_ymm_ymmm256_ymm, dst, src1, src2, src3));
		}

		public void vfmaddpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, AssemblerRegisterYMM src3)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vfmaddpd_ymm_ymm_ymmm256_ymm, register, register2, in memory, src3));
		}

		public void vfmaddpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, AssemblerMemoryOperand src3)
		{
			Register register = dst;
			Register register2 = src1;
			Register register3 = src2;
			MemoryOperand memory = src3.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vfmaddpd_xmm_xmm_xmm_xmmm128, register, register2, register3, in memory));
		}

		public void vfmaddpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, AssemblerMemoryOperand src3)
		{
			Register register = dst;
			Register register2 = src1;
			Register register3 = src2;
			MemoryOperand memory = src3.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vfmaddpd_ymm_ymm_ymm_ymmm256, register, register2, register3, in memory));
		}

		public void vfmaddps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, AssemblerRegisterXMM src3)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vfmaddps_xmm_xmm_xmmm128_xmm, dst, src1, src2, src3));
		}

		public void vfmaddps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, AssemblerRegisterXMM src3)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vfmaddps_xmm_xmm_xmmm128_xmm, register, register2, in memory, src3));
		}

		public void vfmaddps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, AssemblerRegisterYMM src3)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vfmaddps_ymm_ymm_ymmm256_ymm, dst, src1, src2, src3));
		}

		public void vfmaddps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, AssemblerRegisterYMM src3)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vfmaddps_ymm_ymm_ymmm256_ymm, register, register2, in memory, src3));
		}

		public void vfmaddps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, AssemblerMemoryOperand src3)
		{
			Register register = dst;
			Register register2 = src1;
			Register register3 = src2;
			MemoryOperand memory = src3.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vfmaddps_xmm_xmm_xmm_xmmm128, register, register2, register3, in memory));
		}

		public void vfmaddps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, AssemblerMemoryOperand src3)
		{
			Register register = dst;
			Register register2 = src1;
			Register register3 = src2;
			MemoryOperand memory = src3.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vfmaddps_ymm_ymm_ymm_ymmm256, register, register2, register3, in memory));
		}

		public void vfmaddsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, AssemblerRegisterXMM src3)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vfmaddsd_xmm_xmm_xmmm64_xmm, dst, src1, src2, src3));
		}

		public void vfmaddsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, AssemblerRegisterXMM src3)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vfmaddsd_xmm_xmm_xmmm64_xmm, register, register2, in memory, src3));
		}

		public void vfmaddsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, AssemblerMemoryOperand src3)
		{
			Register register = dst;
			Register register2 = src1;
			Register register3 = src2;
			MemoryOperand memory = src3.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vfmaddsd_xmm_xmm_xmm_xmmm64, register, register2, register3, in memory));
		}

		public void vfmaddss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, AssemblerRegisterXMM src3)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vfmaddss_xmm_xmm_xmmm32_xmm, dst, src1, src2, src3));
		}

		public void vfmaddss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, AssemblerRegisterXMM src3)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vfmaddss_xmm_xmm_xmmm32_xmm, register, register2, in memory, src3));
		}

		public void vfmaddss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, AssemblerMemoryOperand src3)
		{
			Register register = dst;
			Register register2 = src1;
			Register register3 = src2;
			MemoryOperand memory = src3.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vfmaddss_xmm_xmm_xmm_xmmm32, register, register2, register3, in memory));
		}

		public void vfmaddsub132pd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfmaddsub132pd_xmm_xmm_xmmm128 : Code.EVEX_Vfmaddsub132pd_xmm_k1z_xmm_xmmm128b64);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vfmaddsub132pd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfmaddsub132pd_ymm_ymm_ymmm256 : Code.EVEX_Vfmaddsub132pd_ymm_k1z_ymm_ymmm256b64);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vfmaddsub132pd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfmaddsub132pd_zmm_k1z_zmm_zmmm512b64_er, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vfmaddsub132pd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vfmaddsub132pd_xmm_xmm_xmmm128 : Code.EVEX_Vfmaddsub132pd_xmm_k1z_xmm_xmmm128b64) : Code.EVEX_Vfmaddsub132pd_xmm_k1z_xmm_xmmm128b64);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmaddsub132pd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vfmaddsub132pd_ymm_ymm_ymmm256 : Code.EVEX_Vfmaddsub132pd_ymm_k1z_ymm_ymmm256b64) : Code.EVEX_Vfmaddsub132pd_ymm_k1z_ymm_ymmm256b64);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmaddsub132pd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfmaddsub132pd_zmm_k1z_zmm_zmmm512b64_er, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmaddsub132ph(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfmaddsub132ph_xmm_k1z_xmm_xmmm128b16, dst, src1, src2), dst.Flags);
		}

		public void vfmaddsub132ph(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfmaddsub132ph_ymm_k1z_ymm_ymmm256b16, dst, src1, src2), dst.Flags);
		}

		public void vfmaddsub132ph(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfmaddsub132ph_zmm_k1z_zmm_zmmm512b16_er, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vfmaddsub132ph(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfmaddsub132ph_xmm_k1z_xmm_xmmm128b16, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmaddsub132ph(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfmaddsub132ph_ymm_k1z_ymm_ymmm256b16, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmaddsub132ph(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfmaddsub132ph_zmm_k1z_zmm_zmmm512b16_er, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmaddsub132ps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfmaddsub132ps_xmm_xmm_xmmm128 : Code.EVEX_Vfmaddsub132ps_xmm_k1z_xmm_xmmm128b32);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vfmaddsub132ps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfmaddsub132ps_ymm_ymm_ymmm256 : Code.EVEX_Vfmaddsub132ps_ymm_k1z_ymm_ymmm256b32);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vfmaddsub132ps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfmaddsub132ps_zmm_k1z_zmm_zmmm512b32_er, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vfmaddsub132ps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vfmaddsub132ps_xmm_xmm_xmmm128 : Code.EVEX_Vfmaddsub132ps_xmm_k1z_xmm_xmmm128b32) : Code.EVEX_Vfmaddsub132ps_xmm_k1z_xmm_xmmm128b32);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmaddsub132ps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vfmaddsub132ps_ymm_ymm_ymmm256 : Code.EVEX_Vfmaddsub132ps_ymm_k1z_ymm_ymmm256b32) : Code.EVEX_Vfmaddsub132ps_ymm_k1z_ymm_ymmm256b32);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmaddsub132ps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfmaddsub132ps_zmm_k1z_zmm_zmmm512b32_er, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmaddsub213pd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfmaddsub213pd_xmm_xmm_xmmm128 : Code.EVEX_Vfmaddsub213pd_xmm_k1z_xmm_xmmm128b64);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vfmaddsub213pd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfmaddsub213pd_ymm_ymm_ymmm256 : Code.EVEX_Vfmaddsub213pd_ymm_k1z_ymm_ymmm256b64);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vfmaddsub213pd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfmaddsub213pd_zmm_k1z_zmm_zmmm512b64_er, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vfmaddsub213pd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vfmaddsub213pd_xmm_xmm_xmmm128 : Code.EVEX_Vfmaddsub213pd_xmm_k1z_xmm_xmmm128b64) : Code.EVEX_Vfmaddsub213pd_xmm_k1z_xmm_xmmm128b64);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmaddsub213pd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vfmaddsub213pd_ymm_ymm_ymmm256 : Code.EVEX_Vfmaddsub213pd_ymm_k1z_ymm_ymmm256b64) : Code.EVEX_Vfmaddsub213pd_ymm_k1z_ymm_ymmm256b64);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmaddsub213pd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfmaddsub213pd_zmm_k1z_zmm_zmmm512b64_er, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmaddsub213ph(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfmaddsub213ph_xmm_k1z_xmm_xmmm128b16, dst, src1, src2), dst.Flags);
		}

		public void vfmaddsub213ph(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfmaddsub213ph_ymm_k1z_ymm_ymmm256b16, dst, src1, src2), dst.Flags);
		}

		public void vfmaddsub213ph(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfmaddsub213ph_zmm_k1z_zmm_zmmm512b16_er, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vfmaddsub213ph(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfmaddsub213ph_xmm_k1z_xmm_xmmm128b16, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmaddsub213ph(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfmaddsub213ph_ymm_k1z_ymm_ymmm256b16, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmaddsub213ph(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfmaddsub213ph_zmm_k1z_zmm_zmmm512b16_er, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmaddsub213ps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfmaddsub213ps_xmm_xmm_xmmm128 : Code.EVEX_Vfmaddsub213ps_xmm_k1z_xmm_xmmm128b32);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vfmaddsub213ps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfmaddsub213ps_ymm_ymm_ymmm256 : Code.EVEX_Vfmaddsub213ps_ymm_k1z_ymm_ymmm256b32);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vfmaddsub213ps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfmaddsub213ps_zmm_k1z_zmm_zmmm512b32_er, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vfmaddsub213ps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vfmaddsub213ps_xmm_xmm_xmmm128 : Code.EVEX_Vfmaddsub213ps_xmm_k1z_xmm_xmmm128b32) : Code.EVEX_Vfmaddsub213ps_xmm_k1z_xmm_xmmm128b32);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmaddsub213ps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vfmaddsub213ps_ymm_ymm_ymmm256 : Code.EVEX_Vfmaddsub213ps_ymm_k1z_ymm_ymmm256b32) : Code.EVEX_Vfmaddsub213ps_ymm_k1z_ymm_ymmm256b32);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmaddsub213ps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfmaddsub213ps_zmm_k1z_zmm_zmmm512b32_er, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmaddsub231pd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfmaddsub231pd_xmm_xmm_xmmm128 : Code.EVEX_Vfmaddsub231pd_xmm_k1z_xmm_xmmm128b64);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vfmaddsub231pd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfmaddsub231pd_ymm_ymm_ymmm256 : Code.EVEX_Vfmaddsub231pd_ymm_k1z_ymm_ymmm256b64);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vfmaddsub231pd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfmaddsub231pd_zmm_k1z_zmm_zmmm512b64_er, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vfmaddsub231pd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vfmaddsub231pd_xmm_xmm_xmmm128 : Code.EVEX_Vfmaddsub231pd_xmm_k1z_xmm_xmmm128b64) : Code.EVEX_Vfmaddsub231pd_xmm_k1z_xmm_xmmm128b64);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmaddsub231pd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vfmaddsub231pd_ymm_ymm_ymmm256 : Code.EVEX_Vfmaddsub231pd_ymm_k1z_ymm_ymmm256b64) : Code.EVEX_Vfmaddsub231pd_ymm_k1z_ymm_ymmm256b64);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmaddsub231pd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfmaddsub231pd_zmm_k1z_zmm_zmmm512b64_er, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmaddsub231ph(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfmaddsub231ph_xmm_k1z_xmm_xmmm128b16, dst, src1, src2), dst.Flags);
		}

		public void vfmaddsub231ph(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfmaddsub231ph_ymm_k1z_ymm_ymmm256b16, dst, src1, src2), dst.Flags);
		}

		public void vfmaddsub231ph(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfmaddsub231ph_zmm_k1z_zmm_zmmm512b16_er, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vfmaddsub231ph(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfmaddsub231ph_xmm_k1z_xmm_xmmm128b16, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmaddsub231ph(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfmaddsub231ph_ymm_k1z_ymm_ymmm256b16, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmaddsub231ph(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfmaddsub231ph_zmm_k1z_zmm_zmmm512b16_er, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmaddsub231ps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfmaddsub231ps_xmm_xmm_xmmm128 : Code.EVEX_Vfmaddsub231ps_xmm_k1z_xmm_xmmm128b32);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vfmaddsub231ps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfmaddsub231ps_ymm_ymm_ymmm256 : Code.EVEX_Vfmaddsub231ps_ymm_k1z_ymm_ymmm256b32);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vfmaddsub231ps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfmaddsub231ps_zmm_k1z_zmm_zmmm512b32_er, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vfmaddsub231ps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vfmaddsub231ps_xmm_xmm_xmmm128 : Code.EVEX_Vfmaddsub231ps_xmm_k1z_xmm_xmmm128b32) : Code.EVEX_Vfmaddsub231ps_xmm_k1z_xmm_xmmm128b32);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmaddsub231ps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vfmaddsub231ps_ymm_ymm_ymmm256 : Code.EVEX_Vfmaddsub231ps_ymm_k1z_ymm_ymmm256b32) : Code.EVEX_Vfmaddsub231ps_ymm_k1z_ymm_ymmm256b32);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmaddsub231ps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfmaddsub231ps_zmm_k1z_zmm_zmmm512b32_er, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmaddsubpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, AssemblerRegisterXMM src3)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vfmaddsubpd_xmm_xmm_xmmm128_xmm, dst, src1, src2, src3));
		}

		public void vfmaddsubpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, AssemblerRegisterXMM src3)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vfmaddsubpd_xmm_xmm_xmmm128_xmm, register, register2, in memory, src3));
		}

		public void vfmaddsubpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, AssemblerRegisterYMM src3)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vfmaddsubpd_ymm_ymm_ymmm256_ymm, dst, src1, src2, src3));
		}

		public void vfmaddsubpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, AssemblerRegisterYMM src3)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vfmaddsubpd_ymm_ymm_ymmm256_ymm, register, register2, in memory, src3));
		}

		public void vfmaddsubpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, AssemblerMemoryOperand src3)
		{
			Register register = dst;
			Register register2 = src1;
			Register register3 = src2;
			MemoryOperand memory = src3.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vfmaddsubpd_xmm_xmm_xmm_xmmm128, register, register2, register3, in memory));
		}

		public void vfmaddsubpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, AssemblerMemoryOperand src3)
		{
			Register register = dst;
			Register register2 = src1;
			Register register3 = src2;
			MemoryOperand memory = src3.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vfmaddsubpd_ymm_ymm_ymm_ymmm256, register, register2, register3, in memory));
		}

		public void vfmaddsubps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, AssemblerRegisterXMM src3)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vfmaddsubps_xmm_xmm_xmmm128_xmm, dst, src1, src2, src3));
		}

		public void vfmaddsubps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, AssemblerRegisterXMM src3)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vfmaddsubps_xmm_xmm_xmmm128_xmm, register, register2, in memory, src3));
		}

		public void vfmaddsubps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, AssemblerRegisterYMM src3)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vfmaddsubps_ymm_ymm_ymmm256_ymm, dst, src1, src2, src3));
		}

		public void vfmaddsubps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, AssemblerRegisterYMM src3)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vfmaddsubps_ymm_ymm_ymmm256_ymm, register, register2, in memory, src3));
		}

		public void vfmaddsubps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, AssemblerMemoryOperand src3)
		{
			Register register = dst;
			Register register2 = src1;
			Register register3 = src2;
			MemoryOperand memory = src3.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vfmaddsubps_xmm_xmm_xmm_xmmm128, register, register2, register3, in memory));
		}

		public void vfmaddsubps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, AssemblerMemoryOperand src3)
		{
			Register register = dst;
			Register register2 = src1;
			Register register3 = src2;
			MemoryOperand memory = src3.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vfmaddsubps_ymm_ymm_ymm_ymmm256, register, register2, register3, in memory));
		}

		public void vfmsub132pd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfmsub132pd_xmm_xmm_xmmm128 : Code.EVEX_Vfmsub132pd_xmm_k1z_xmm_xmmm128b64);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vfmsub132pd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfmsub132pd_ymm_ymm_ymmm256 : Code.EVEX_Vfmsub132pd_ymm_k1z_ymm_ymmm256b64);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vfmsub132pd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfmsub132pd_zmm_k1z_zmm_zmmm512b64_er, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vfmsub132pd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vfmsub132pd_xmm_xmm_xmmm128 : Code.EVEX_Vfmsub132pd_xmm_k1z_xmm_xmmm128b64) : Code.EVEX_Vfmsub132pd_xmm_k1z_xmm_xmmm128b64);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmsub132pd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vfmsub132pd_ymm_ymm_ymmm256 : Code.EVEX_Vfmsub132pd_ymm_k1z_ymm_ymmm256b64) : Code.EVEX_Vfmsub132pd_ymm_k1z_ymm_ymmm256b64);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmsub132pd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfmsub132pd_zmm_k1z_zmm_zmmm512b64_er, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmsub132ph(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfmsub132ph_xmm_k1z_xmm_xmmm128b16, dst, src1, src2), dst.Flags);
		}

		public void vfmsub132ph(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfmsub132ph_ymm_k1z_ymm_ymmm256b16, dst, src1, src2), dst.Flags);
		}

		public void vfmsub132ph(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfmsub132ph_zmm_k1z_zmm_zmmm512b16_er, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vfmsub132ph(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfmsub132ph_xmm_k1z_xmm_xmmm128b16, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmsub132ph(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfmsub132ph_ymm_k1z_ymm_ymmm256b16, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmsub132ph(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfmsub132ph_zmm_k1z_zmm_zmmm512b16_er, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmsub132ps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfmsub132ps_xmm_xmm_xmmm128 : Code.EVEX_Vfmsub132ps_xmm_k1z_xmm_xmmm128b32);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vfmsub132ps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfmsub132ps_ymm_ymm_ymmm256 : Code.EVEX_Vfmsub132ps_ymm_k1z_ymm_ymmm256b32);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vfmsub132ps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfmsub132ps_zmm_k1z_zmm_zmmm512b32_er, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vfmsub132ps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vfmsub132ps_xmm_xmm_xmmm128 : Code.EVEX_Vfmsub132ps_xmm_k1z_xmm_xmmm128b32) : Code.EVEX_Vfmsub132ps_xmm_k1z_xmm_xmmm128b32);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmsub132ps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vfmsub132ps_ymm_ymm_ymmm256 : Code.EVEX_Vfmsub132ps_ymm_k1z_ymm_ymmm256b32) : Code.EVEX_Vfmsub132ps_ymm_k1z_ymm_ymmm256b32);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmsub132ps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfmsub132ps_zmm_k1z_zmm_zmmm512b32_er, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmsub132sd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfmsub132sd_xmm_xmm_xmmm64 : Code.EVEX_Vfmsub132sd_xmm_k1z_xmm_xmmm64_er);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vfmsub132sd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfmsub132sd_xmm_xmm_xmmm64 : Code.EVEX_Vfmsub132sd_xmm_k1z_xmm_xmmm64_er);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmsub132sh(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfmsub132sh_xmm_k1z_xmm_xmmm16_er, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vfmsub132sh(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfmsub132sh_xmm_k1z_xmm_xmmm16_er, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmsub132ss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfmsub132ss_xmm_xmm_xmmm32 : Code.EVEX_Vfmsub132ss_xmm_k1z_xmm_xmmm32_er);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vfmsub132ss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfmsub132ss_xmm_xmm_xmmm32 : Code.EVEX_Vfmsub132ss_xmm_k1z_xmm_xmmm32_er);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmsub213pd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfmsub213pd_xmm_xmm_xmmm128 : Code.EVEX_Vfmsub213pd_xmm_k1z_xmm_xmmm128b64);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vfmsub213pd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfmsub213pd_ymm_ymm_ymmm256 : Code.EVEX_Vfmsub213pd_ymm_k1z_ymm_ymmm256b64);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vfmsub213pd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfmsub213pd_zmm_k1z_zmm_zmmm512b64_er, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vfmsub213pd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vfmsub213pd_xmm_xmm_xmmm128 : Code.EVEX_Vfmsub213pd_xmm_k1z_xmm_xmmm128b64) : Code.EVEX_Vfmsub213pd_xmm_k1z_xmm_xmmm128b64);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmsub213pd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vfmsub213pd_ymm_ymm_ymmm256 : Code.EVEX_Vfmsub213pd_ymm_k1z_ymm_ymmm256b64) : Code.EVEX_Vfmsub213pd_ymm_k1z_ymm_ymmm256b64);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmsub213pd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfmsub213pd_zmm_k1z_zmm_zmmm512b64_er, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmsub213ph(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfmsub213ph_xmm_k1z_xmm_xmmm128b16, dst, src1, src2), dst.Flags);
		}

		public void vfmsub213ph(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfmsub213ph_ymm_k1z_ymm_ymmm256b16, dst, src1, src2), dst.Flags);
		}

		public void vfmsub213ph(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfmsub213ph_zmm_k1z_zmm_zmmm512b16_er, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vfmsub213ph(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfmsub213ph_xmm_k1z_xmm_xmmm128b16, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmsub213ph(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfmsub213ph_ymm_k1z_ymm_ymmm256b16, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmsub213ph(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfmsub213ph_zmm_k1z_zmm_zmmm512b16_er, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmsub213ps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfmsub213ps_xmm_xmm_xmmm128 : Code.EVEX_Vfmsub213ps_xmm_k1z_xmm_xmmm128b32);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vfmsub213ps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfmsub213ps_ymm_ymm_ymmm256 : Code.EVEX_Vfmsub213ps_ymm_k1z_ymm_ymmm256b32);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vfmsub213ps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfmsub213ps_zmm_k1z_zmm_zmmm512b32_er, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vfmsub213ps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vfmsub213ps_xmm_xmm_xmmm128 : Code.EVEX_Vfmsub213ps_xmm_k1z_xmm_xmmm128b32) : Code.EVEX_Vfmsub213ps_xmm_k1z_xmm_xmmm128b32);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmsub213ps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vfmsub213ps_ymm_ymm_ymmm256 : Code.EVEX_Vfmsub213ps_ymm_k1z_ymm_ymmm256b32) : Code.EVEX_Vfmsub213ps_ymm_k1z_ymm_ymmm256b32);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmsub213ps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfmsub213ps_zmm_k1z_zmm_zmmm512b32_er, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmsub213sd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfmsub213sd_xmm_xmm_xmmm64 : Code.EVEX_Vfmsub213sd_xmm_k1z_xmm_xmmm64_er);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vfmsub213sd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfmsub213sd_xmm_xmm_xmmm64 : Code.EVEX_Vfmsub213sd_xmm_k1z_xmm_xmmm64_er);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmsub213sh(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfmsub213sh_xmm_k1z_xmm_xmmm16_er, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vfmsub213sh(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfmsub213sh_xmm_k1z_xmm_xmmm16_er, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmsub213ss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfmsub213ss_xmm_xmm_xmmm32 : Code.EVEX_Vfmsub213ss_xmm_k1z_xmm_xmmm32_er);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vfmsub213ss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfmsub213ss_xmm_xmm_xmmm32 : Code.EVEX_Vfmsub213ss_xmm_k1z_xmm_xmmm32_er);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmsub231pd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfmsub231pd_xmm_xmm_xmmm128 : Code.EVEX_Vfmsub231pd_xmm_k1z_xmm_xmmm128b64);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vfmsub231pd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfmsub231pd_ymm_ymm_ymmm256 : Code.EVEX_Vfmsub231pd_ymm_k1z_ymm_ymmm256b64);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vfmsub231pd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfmsub231pd_zmm_k1z_zmm_zmmm512b64_er, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vfmsub231pd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vfmsub231pd_xmm_xmm_xmmm128 : Code.EVEX_Vfmsub231pd_xmm_k1z_xmm_xmmm128b64) : Code.EVEX_Vfmsub231pd_xmm_k1z_xmm_xmmm128b64);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmsub231pd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vfmsub231pd_ymm_ymm_ymmm256 : Code.EVEX_Vfmsub231pd_ymm_k1z_ymm_ymmm256b64) : Code.EVEX_Vfmsub231pd_ymm_k1z_ymm_ymmm256b64);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmsub231pd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfmsub231pd_zmm_k1z_zmm_zmmm512b64_er, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmsub231ph(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfmsub231ph_xmm_k1z_xmm_xmmm128b16, dst, src1, src2), dst.Flags);
		}

		public void vfmsub231ph(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfmsub231ph_ymm_k1z_ymm_ymmm256b16, dst, src1, src2), dst.Flags);
		}

		public void vfmsub231ph(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfmsub231ph_zmm_k1z_zmm_zmmm512b16_er, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vfmsub231ph(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfmsub231ph_xmm_k1z_xmm_xmmm128b16, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmsub231ph(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfmsub231ph_ymm_k1z_ymm_ymmm256b16, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmsub231ph(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfmsub231ph_zmm_k1z_zmm_zmmm512b16_er, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmsub231ps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfmsub231ps_xmm_xmm_xmmm128 : Code.EVEX_Vfmsub231ps_xmm_k1z_xmm_xmmm128b32);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vfmsub231ps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfmsub231ps_ymm_ymm_ymmm256 : Code.EVEX_Vfmsub231ps_ymm_k1z_ymm_ymmm256b32);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vfmsub231ps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfmsub231ps_zmm_k1z_zmm_zmmm512b32_er, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vfmsub231ps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vfmsub231ps_xmm_xmm_xmmm128 : Code.EVEX_Vfmsub231ps_xmm_k1z_xmm_xmmm128b32) : Code.EVEX_Vfmsub231ps_xmm_k1z_xmm_xmmm128b32);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmsub231ps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vfmsub231ps_ymm_ymm_ymmm256 : Code.EVEX_Vfmsub231ps_ymm_k1z_ymm_ymmm256b32) : Code.EVEX_Vfmsub231ps_ymm_k1z_ymm_ymmm256b32);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmsub231ps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfmsub231ps_zmm_k1z_zmm_zmmm512b32_er, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmsub231sd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfmsub231sd_xmm_xmm_xmmm64 : Code.EVEX_Vfmsub231sd_xmm_k1z_xmm_xmmm64_er);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vfmsub231sd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfmsub231sd_xmm_xmm_xmmm64 : Code.EVEX_Vfmsub231sd_xmm_k1z_xmm_xmmm64_er);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmsub231sh(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfmsub231sh_xmm_k1z_xmm_xmmm16_er, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vfmsub231sh(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfmsub231sh_xmm_k1z_xmm_xmmm16_er, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmsub231ss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfmsub231ss_xmm_xmm_xmmm32 : Code.EVEX_Vfmsub231ss_xmm_k1z_xmm_xmmm32_er);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vfmsub231ss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfmsub231ss_xmm_xmm_xmmm32 : Code.EVEX_Vfmsub231ss_xmm_k1z_xmm_xmmm32_er);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmsubadd132pd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfmsubadd132pd_xmm_xmm_xmmm128 : Code.EVEX_Vfmsubadd132pd_xmm_k1z_xmm_xmmm128b64);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vfmsubadd132pd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfmsubadd132pd_ymm_ymm_ymmm256 : Code.EVEX_Vfmsubadd132pd_ymm_k1z_ymm_ymmm256b64);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vfmsubadd132pd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfmsubadd132pd_zmm_k1z_zmm_zmmm512b64_er, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vfmsubadd132pd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vfmsubadd132pd_xmm_xmm_xmmm128 : Code.EVEX_Vfmsubadd132pd_xmm_k1z_xmm_xmmm128b64) : Code.EVEX_Vfmsubadd132pd_xmm_k1z_xmm_xmmm128b64);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmsubadd132pd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vfmsubadd132pd_ymm_ymm_ymmm256 : Code.EVEX_Vfmsubadd132pd_ymm_k1z_ymm_ymmm256b64) : Code.EVEX_Vfmsubadd132pd_ymm_k1z_ymm_ymmm256b64);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmsubadd132pd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfmsubadd132pd_zmm_k1z_zmm_zmmm512b64_er, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmsubadd132ph(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfmsubadd132ph_xmm_k1z_xmm_xmmm128b16, dst, src1, src2), dst.Flags);
		}

		public void vfmsubadd132ph(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfmsubadd132ph_ymm_k1z_ymm_ymmm256b16, dst, src1, src2), dst.Flags);
		}

		public void vfmsubadd132ph(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfmsubadd132ph_zmm_k1z_zmm_zmmm512b16_er, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vfmsubadd132ph(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfmsubadd132ph_xmm_k1z_xmm_xmmm128b16, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmsubadd132ph(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfmsubadd132ph_ymm_k1z_ymm_ymmm256b16, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmsubadd132ph(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfmsubadd132ph_zmm_k1z_zmm_zmmm512b16_er, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmsubadd132ps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfmsubadd132ps_xmm_xmm_xmmm128 : Code.EVEX_Vfmsubadd132ps_xmm_k1z_xmm_xmmm128b32);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vfmsubadd132ps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfmsubadd132ps_ymm_ymm_ymmm256 : Code.EVEX_Vfmsubadd132ps_ymm_k1z_ymm_ymmm256b32);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vfmsubadd132ps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfmsubadd132ps_zmm_k1z_zmm_zmmm512b32_er, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vfmsubadd132ps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vfmsubadd132ps_xmm_xmm_xmmm128 : Code.EVEX_Vfmsubadd132ps_xmm_k1z_xmm_xmmm128b32) : Code.EVEX_Vfmsubadd132ps_xmm_k1z_xmm_xmmm128b32);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmsubadd132ps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vfmsubadd132ps_ymm_ymm_ymmm256 : Code.EVEX_Vfmsubadd132ps_ymm_k1z_ymm_ymmm256b32) : Code.EVEX_Vfmsubadd132ps_ymm_k1z_ymm_ymmm256b32);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmsubadd132ps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfmsubadd132ps_zmm_k1z_zmm_zmmm512b32_er, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmsubadd213pd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfmsubadd213pd_xmm_xmm_xmmm128 : Code.EVEX_Vfmsubadd213pd_xmm_k1z_xmm_xmmm128b64);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vfmsubadd213pd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfmsubadd213pd_ymm_ymm_ymmm256 : Code.EVEX_Vfmsubadd213pd_ymm_k1z_ymm_ymmm256b64);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vfmsubadd213pd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfmsubadd213pd_zmm_k1z_zmm_zmmm512b64_er, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vfmsubadd213pd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vfmsubadd213pd_xmm_xmm_xmmm128 : Code.EVEX_Vfmsubadd213pd_xmm_k1z_xmm_xmmm128b64) : Code.EVEX_Vfmsubadd213pd_xmm_k1z_xmm_xmmm128b64);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmsubadd213pd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vfmsubadd213pd_ymm_ymm_ymmm256 : Code.EVEX_Vfmsubadd213pd_ymm_k1z_ymm_ymmm256b64) : Code.EVEX_Vfmsubadd213pd_ymm_k1z_ymm_ymmm256b64);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmsubadd213pd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfmsubadd213pd_zmm_k1z_zmm_zmmm512b64_er, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmsubadd213ph(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfmsubadd213ph_xmm_k1z_xmm_xmmm128b16, dst, src1, src2), dst.Flags);
		}

		public void vfmsubadd213ph(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfmsubadd213ph_ymm_k1z_ymm_ymmm256b16, dst, src1, src2), dst.Flags);
		}

		public void vfmsubadd213ph(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfmsubadd213ph_zmm_k1z_zmm_zmmm512b16_er, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vfmsubadd213ph(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfmsubadd213ph_xmm_k1z_xmm_xmmm128b16, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmsubadd213ph(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfmsubadd213ph_ymm_k1z_ymm_ymmm256b16, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmsubadd213ph(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfmsubadd213ph_zmm_k1z_zmm_zmmm512b16_er, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmsubadd213ps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfmsubadd213ps_xmm_xmm_xmmm128 : Code.EVEX_Vfmsubadd213ps_xmm_k1z_xmm_xmmm128b32);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vfmsubadd213ps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfmsubadd213ps_ymm_ymm_ymmm256 : Code.EVEX_Vfmsubadd213ps_ymm_k1z_ymm_ymmm256b32);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vfmsubadd213ps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfmsubadd213ps_zmm_k1z_zmm_zmmm512b32_er, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vfmsubadd213ps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vfmsubadd213ps_xmm_xmm_xmmm128 : Code.EVEX_Vfmsubadd213ps_xmm_k1z_xmm_xmmm128b32) : Code.EVEX_Vfmsubadd213ps_xmm_k1z_xmm_xmmm128b32);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmsubadd213ps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vfmsubadd213ps_ymm_ymm_ymmm256 : Code.EVEX_Vfmsubadd213ps_ymm_k1z_ymm_ymmm256b32) : Code.EVEX_Vfmsubadd213ps_ymm_k1z_ymm_ymmm256b32);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmsubadd213ps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfmsubadd213ps_zmm_k1z_zmm_zmmm512b32_er, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmsubadd231pd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfmsubadd231pd_xmm_xmm_xmmm128 : Code.EVEX_Vfmsubadd231pd_xmm_k1z_xmm_xmmm128b64);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vfmsubadd231pd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfmsubadd231pd_ymm_ymm_ymmm256 : Code.EVEX_Vfmsubadd231pd_ymm_k1z_ymm_ymmm256b64);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vfmsubadd231pd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfmsubadd231pd_zmm_k1z_zmm_zmmm512b64_er, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vfmsubadd231pd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vfmsubadd231pd_xmm_xmm_xmmm128 : Code.EVEX_Vfmsubadd231pd_xmm_k1z_xmm_xmmm128b64) : Code.EVEX_Vfmsubadd231pd_xmm_k1z_xmm_xmmm128b64);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmsubadd231pd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vfmsubadd231pd_ymm_ymm_ymmm256 : Code.EVEX_Vfmsubadd231pd_ymm_k1z_ymm_ymmm256b64) : Code.EVEX_Vfmsubadd231pd_ymm_k1z_ymm_ymmm256b64);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmsubadd231pd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfmsubadd231pd_zmm_k1z_zmm_zmmm512b64_er, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmsubadd231ph(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfmsubadd231ph_xmm_k1z_xmm_xmmm128b16, dst, src1, src2), dst.Flags);
		}

		public void vfmsubadd231ph(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfmsubadd231ph_ymm_k1z_ymm_ymmm256b16, dst, src1, src2), dst.Flags);
		}

		public void vfmsubadd231ph(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfmsubadd231ph_zmm_k1z_zmm_zmmm512b16_er, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vfmsubadd231ph(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfmsubadd231ph_xmm_k1z_xmm_xmmm128b16, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmsubadd231ph(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfmsubadd231ph_ymm_k1z_ymm_ymmm256b16, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmsubadd231ph(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfmsubadd231ph_zmm_k1z_zmm_zmmm512b16_er, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmsubadd231ps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfmsubadd231ps_xmm_xmm_xmmm128 : Code.EVEX_Vfmsubadd231ps_xmm_k1z_xmm_xmmm128b32);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vfmsubadd231ps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfmsubadd231ps_ymm_ymm_ymmm256 : Code.EVEX_Vfmsubadd231ps_ymm_k1z_ymm_ymmm256b32);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vfmsubadd231ps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfmsubadd231ps_zmm_k1z_zmm_zmmm512b32_er, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vfmsubadd231ps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vfmsubadd231ps_xmm_xmm_xmmm128 : Code.EVEX_Vfmsubadd231ps_xmm_k1z_xmm_xmmm128b32) : Code.EVEX_Vfmsubadd231ps_xmm_k1z_xmm_xmmm128b32);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmsubadd231ps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vfmsubadd231ps_ymm_ymm_ymmm256 : Code.EVEX_Vfmsubadd231ps_ymm_k1z_ymm_ymmm256b32) : Code.EVEX_Vfmsubadd231ps_ymm_k1z_ymm_ymmm256b32);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmsubadd231ps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfmsubadd231ps_zmm_k1z_zmm_zmmm512b32_er, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmsubaddpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, AssemblerRegisterXMM src3)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vfmsubaddpd_xmm_xmm_xmmm128_xmm, dst, src1, src2, src3));
		}

		public void vfmsubaddpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, AssemblerRegisterXMM src3)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vfmsubaddpd_xmm_xmm_xmmm128_xmm, register, register2, in memory, src3));
		}

		public void vfmsubaddpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, AssemblerRegisterYMM src3)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vfmsubaddpd_ymm_ymm_ymmm256_ymm, dst, src1, src2, src3));
		}

		public void vfmsubaddpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, AssemblerRegisterYMM src3)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vfmsubaddpd_ymm_ymm_ymmm256_ymm, register, register2, in memory, src3));
		}

		public void vfmsubaddpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, AssemblerMemoryOperand src3)
		{
			Register register = dst;
			Register register2 = src1;
			Register register3 = src2;
			MemoryOperand memory = src3.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vfmsubaddpd_xmm_xmm_xmm_xmmm128, register, register2, register3, in memory));
		}

		public void vfmsubaddpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, AssemblerMemoryOperand src3)
		{
			Register register = dst;
			Register register2 = src1;
			Register register3 = src2;
			MemoryOperand memory = src3.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vfmsubaddpd_ymm_ymm_ymm_ymmm256, register, register2, register3, in memory));
		}

		public void vfmsubaddps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, AssemblerRegisterXMM src3)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vfmsubaddps_xmm_xmm_xmmm128_xmm, dst, src1, src2, src3));
		}

		public void vfmsubaddps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, AssemblerRegisterXMM src3)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vfmsubaddps_xmm_xmm_xmmm128_xmm, register, register2, in memory, src3));
		}

		public void vfmsubaddps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, AssemblerRegisterYMM src3)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vfmsubaddps_ymm_ymm_ymmm256_ymm, dst, src1, src2, src3));
		}

		public void vfmsubaddps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, AssemblerRegisterYMM src3)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vfmsubaddps_ymm_ymm_ymmm256_ymm, register, register2, in memory, src3));
		}

		public void vfmsubaddps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, AssemblerMemoryOperand src3)
		{
			Register register = dst;
			Register register2 = src1;
			Register register3 = src2;
			MemoryOperand memory = src3.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vfmsubaddps_xmm_xmm_xmm_xmmm128, register, register2, register3, in memory));
		}

		public void vfmsubaddps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, AssemblerMemoryOperand src3)
		{
			Register register = dst;
			Register register2 = src1;
			Register register3 = src2;
			MemoryOperand memory = src3.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vfmsubaddps_ymm_ymm_ymm_ymmm256, register, register2, register3, in memory));
		}

		public void vfmsubpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, AssemblerRegisterXMM src3)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vfmsubpd_xmm_xmm_xmmm128_xmm, dst, src1, src2, src3));
		}

		public void vfmsubpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, AssemblerRegisterXMM src3)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vfmsubpd_xmm_xmm_xmmm128_xmm, register, register2, in memory, src3));
		}

		public void vfmsubpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, AssemblerRegisterYMM src3)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vfmsubpd_ymm_ymm_ymmm256_ymm, dst, src1, src2, src3));
		}

		public void vfmsubpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, AssemblerRegisterYMM src3)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vfmsubpd_ymm_ymm_ymmm256_ymm, register, register2, in memory, src3));
		}

		public void vfmsubpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, AssemblerMemoryOperand src3)
		{
			Register register = dst;
			Register register2 = src1;
			Register register3 = src2;
			MemoryOperand memory = src3.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vfmsubpd_xmm_xmm_xmm_xmmm128, register, register2, register3, in memory));
		}

		public void vfmsubpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, AssemblerMemoryOperand src3)
		{
			Register register = dst;
			Register register2 = src1;
			Register register3 = src2;
			MemoryOperand memory = src3.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vfmsubpd_ymm_ymm_ymm_ymmm256, register, register2, register3, in memory));
		}

		public void vfmsubps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, AssemblerRegisterXMM src3)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vfmsubps_xmm_xmm_xmmm128_xmm, dst, src1, src2, src3));
		}

		public void vfmsubps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, AssemblerRegisterXMM src3)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vfmsubps_xmm_xmm_xmmm128_xmm, register, register2, in memory, src3));
		}

		public void vfmsubps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, AssemblerRegisterYMM src3)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vfmsubps_ymm_ymm_ymmm256_ymm, dst, src1, src2, src3));
		}

		public void vfmsubps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, AssemblerRegisterYMM src3)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vfmsubps_ymm_ymm_ymmm256_ymm, register, register2, in memory, src3));
		}

		public void vfmsubps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, AssemblerMemoryOperand src3)
		{
			Register register = dst;
			Register register2 = src1;
			Register register3 = src2;
			MemoryOperand memory = src3.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vfmsubps_xmm_xmm_xmm_xmmm128, register, register2, register3, in memory));
		}

		public void vfmsubps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, AssemblerMemoryOperand src3)
		{
			Register register = dst;
			Register register2 = src1;
			Register register3 = src2;
			MemoryOperand memory = src3.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vfmsubps_ymm_ymm_ymm_ymmm256, register, register2, register3, in memory));
		}

		public void vfmsubsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, AssemblerRegisterXMM src3)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vfmsubsd_xmm_xmm_xmmm64_xmm, dst, src1, src2, src3));
		}

		public void vfmsubsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, AssemblerRegisterXMM src3)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vfmsubsd_xmm_xmm_xmmm64_xmm, register, register2, in memory, src3));
		}

		public void vfmsubsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, AssemblerMemoryOperand src3)
		{
			Register register = dst;
			Register register2 = src1;
			Register register3 = src2;
			MemoryOperand memory = src3.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vfmsubsd_xmm_xmm_xmm_xmmm64, register, register2, register3, in memory));
		}

		public void vfmsubss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, AssemblerRegisterXMM src3)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vfmsubss_xmm_xmm_xmmm32_xmm, dst, src1, src2, src3));
		}

		public void vfmsubss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, AssemblerRegisterXMM src3)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vfmsubss_xmm_xmm_xmmm32_xmm, register, register2, in memory, src3));
		}

		public void vfmsubss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, AssemblerMemoryOperand src3)
		{
			Register register = dst;
			Register register2 = src1;
			Register register3 = src2;
			MemoryOperand memory = src3.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vfmsubss_xmm_xmm_xmm_xmmm32, register, register2, register3, in memory));
		}

		public void vfmulcph(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfmulcph_xmm_k1z_xmm_xmmm128b32, dst, src1, src2), dst.Flags);
		}

		public void vfmulcph(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfmulcph_ymm_k1z_ymm_ymmm256b32, dst, src1, src2), dst.Flags);
		}

		public void vfmulcph(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfmulcph_zmm_k1z_zmm_zmmm512b32_er, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vfmulcph(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfmulcph_xmm_k1z_xmm_xmmm128b32, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmulcph(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfmulcph_ymm_k1z_ymm_ymmm256b32, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmulcph(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfmulcph_zmm_k1z_zmm_zmmm512b32_er, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfmulcsh(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfmulcsh_xmm_k1z_xmm_xmmm32_er, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vfmulcsh(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfmulcsh_xmm_k1z_xmm_xmmm32_er, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfnmadd132pd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfnmadd132pd_xmm_xmm_xmmm128 : Code.EVEX_Vfnmadd132pd_xmm_k1z_xmm_xmmm128b64);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vfnmadd132pd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfnmadd132pd_ymm_ymm_ymmm256 : Code.EVEX_Vfnmadd132pd_ymm_k1z_ymm_ymmm256b64);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vfnmadd132pd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfnmadd132pd_zmm_k1z_zmm_zmmm512b64_er, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vfnmadd132pd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vfnmadd132pd_xmm_xmm_xmmm128 : Code.EVEX_Vfnmadd132pd_xmm_k1z_xmm_xmmm128b64) : Code.EVEX_Vfnmadd132pd_xmm_k1z_xmm_xmmm128b64);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfnmadd132pd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vfnmadd132pd_ymm_ymm_ymmm256 : Code.EVEX_Vfnmadd132pd_ymm_k1z_ymm_ymmm256b64) : Code.EVEX_Vfnmadd132pd_ymm_k1z_ymm_ymmm256b64);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfnmadd132pd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfnmadd132pd_zmm_k1z_zmm_zmmm512b64_er, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfnmadd132ph(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfnmadd132ph_xmm_k1z_xmm_xmmm128b16, dst, src1, src2), dst.Flags);
		}

		public void vfnmadd132ph(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfnmadd132ph_ymm_k1z_ymm_ymmm256b16, dst, src1, src2), dst.Flags);
		}

		public void vfnmadd132ph(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfnmadd132ph_zmm_k1z_zmm_zmmm512b16_er, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vfnmadd132ph(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfnmadd132ph_xmm_k1z_xmm_xmmm128b16, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfnmadd132ph(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfnmadd132ph_ymm_k1z_ymm_ymmm256b16, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfnmadd132ph(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfnmadd132ph_zmm_k1z_zmm_zmmm512b16_er, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfnmadd132ps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfnmadd132ps_xmm_xmm_xmmm128 : Code.EVEX_Vfnmadd132ps_xmm_k1z_xmm_xmmm128b32);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vfnmadd132ps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfnmadd132ps_ymm_ymm_ymmm256 : Code.EVEX_Vfnmadd132ps_ymm_k1z_ymm_ymmm256b32);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vfnmadd132ps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfnmadd132ps_zmm_k1z_zmm_zmmm512b32_er, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vfnmadd132ps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vfnmadd132ps_xmm_xmm_xmmm128 : Code.EVEX_Vfnmadd132ps_xmm_k1z_xmm_xmmm128b32) : Code.EVEX_Vfnmadd132ps_xmm_k1z_xmm_xmmm128b32);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfnmadd132ps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vfnmadd132ps_ymm_ymm_ymmm256 : Code.EVEX_Vfnmadd132ps_ymm_k1z_ymm_ymmm256b32) : Code.EVEX_Vfnmadd132ps_ymm_k1z_ymm_ymmm256b32);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfnmadd132ps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfnmadd132ps_zmm_k1z_zmm_zmmm512b32_er, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfnmadd132sd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfnmadd132sd_xmm_xmm_xmmm64 : Code.EVEX_Vfnmadd132sd_xmm_k1z_xmm_xmmm64_er);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vfnmadd132sd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfnmadd132sd_xmm_xmm_xmmm64 : Code.EVEX_Vfnmadd132sd_xmm_k1z_xmm_xmmm64_er);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfnmadd132sh(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfnmadd132sh_xmm_k1z_xmm_xmmm16_er, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vfnmadd132sh(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfnmadd132sh_xmm_k1z_xmm_xmmm16_er, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfnmadd132ss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfnmadd132ss_xmm_xmm_xmmm32 : Code.EVEX_Vfnmadd132ss_xmm_k1z_xmm_xmmm32_er);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vfnmadd132ss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfnmadd132ss_xmm_xmm_xmmm32 : Code.EVEX_Vfnmadd132ss_xmm_k1z_xmm_xmmm32_er);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfnmadd213pd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfnmadd213pd_xmm_xmm_xmmm128 : Code.EVEX_Vfnmadd213pd_xmm_k1z_xmm_xmmm128b64);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vfnmadd213pd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfnmadd213pd_ymm_ymm_ymmm256 : Code.EVEX_Vfnmadd213pd_ymm_k1z_ymm_ymmm256b64);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vfnmadd213pd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfnmadd213pd_zmm_k1z_zmm_zmmm512b64_er, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vfnmadd213pd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vfnmadd213pd_xmm_xmm_xmmm128 : Code.EVEX_Vfnmadd213pd_xmm_k1z_xmm_xmmm128b64) : Code.EVEX_Vfnmadd213pd_xmm_k1z_xmm_xmmm128b64);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfnmadd213pd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vfnmadd213pd_ymm_ymm_ymmm256 : Code.EVEX_Vfnmadd213pd_ymm_k1z_ymm_ymmm256b64) : Code.EVEX_Vfnmadd213pd_ymm_k1z_ymm_ymmm256b64);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfnmadd213pd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfnmadd213pd_zmm_k1z_zmm_zmmm512b64_er, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfnmadd213ph(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfnmadd213ph_xmm_k1z_xmm_xmmm128b16, dst, src1, src2), dst.Flags);
		}

		public void vfnmadd213ph(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfnmadd213ph_ymm_k1z_ymm_ymmm256b16, dst, src1, src2), dst.Flags);
		}

		public void vfnmadd213ph(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfnmadd213ph_zmm_k1z_zmm_zmmm512b16_er, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vfnmadd213ph(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfnmadd213ph_xmm_k1z_xmm_xmmm128b16, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfnmadd213ph(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfnmadd213ph_ymm_k1z_ymm_ymmm256b16, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfnmadd213ph(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfnmadd213ph_zmm_k1z_zmm_zmmm512b16_er, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfnmadd213ps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfnmadd213ps_xmm_xmm_xmmm128 : Code.EVEX_Vfnmadd213ps_xmm_k1z_xmm_xmmm128b32);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vfnmadd213ps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfnmadd213ps_ymm_ymm_ymmm256 : Code.EVEX_Vfnmadd213ps_ymm_k1z_ymm_ymmm256b32);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vfnmadd213ps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfnmadd213ps_zmm_k1z_zmm_zmmm512b32_er, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vfnmadd213ps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vfnmadd213ps_xmm_xmm_xmmm128 : Code.EVEX_Vfnmadd213ps_xmm_k1z_xmm_xmmm128b32) : Code.EVEX_Vfnmadd213ps_xmm_k1z_xmm_xmmm128b32);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfnmadd213ps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vfnmadd213ps_ymm_ymm_ymmm256 : Code.EVEX_Vfnmadd213ps_ymm_k1z_ymm_ymmm256b32) : Code.EVEX_Vfnmadd213ps_ymm_k1z_ymm_ymmm256b32);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfnmadd213ps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfnmadd213ps_zmm_k1z_zmm_zmmm512b32_er, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfnmadd213sd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfnmadd213sd_xmm_xmm_xmmm64 : Code.EVEX_Vfnmadd213sd_xmm_k1z_xmm_xmmm64_er);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vfnmadd213sd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfnmadd213sd_xmm_xmm_xmmm64 : Code.EVEX_Vfnmadd213sd_xmm_k1z_xmm_xmmm64_er);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfnmadd213sh(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfnmadd213sh_xmm_k1z_xmm_xmmm16_er, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vfnmadd213sh(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfnmadd213sh_xmm_k1z_xmm_xmmm16_er, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfnmadd213ss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfnmadd213ss_xmm_xmm_xmmm32 : Code.EVEX_Vfnmadd213ss_xmm_k1z_xmm_xmmm32_er);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vfnmadd213ss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfnmadd213ss_xmm_xmm_xmmm32 : Code.EVEX_Vfnmadd213ss_xmm_k1z_xmm_xmmm32_er);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfnmadd231pd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfnmadd231pd_xmm_xmm_xmmm128 : Code.EVEX_Vfnmadd231pd_xmm_k1z_xmm_xmmm128b64);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vfnmadd231pd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfnmadd231pd_ymm_ymm_ymmm256 : Code.EVEX_Vfnmadd231pd_ymm_k1z_ymm_ymmm256b64);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vfnmadd231pd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfnmadd231pd_zmm_k1z_zmm_zmmm512b64_er, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vfnmadd231pd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vfnmadd231pd_xmm_xmm_xmmm128 : Code.EVEX_Vfnmadd231pd_xmm_k1z_xmm_xmmm128b64) : Code.EVEX_Vfnmadd231pd_xmm_k1z_xmm_xmmm128b64);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfnmadd231pd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vfnmadd231pd_ymm_ymm_ymmm256 : Code.EVEX_Vfnmadd231pd_ymm_k1z_ymm_ymmm256b64) : Code.EVEX_Vfnmadd231pd_ymm_k1z_ymm_ymmm256b64);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfnmadd231pd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfnmadd231pd_zmm_k1z_zmm_zmmm512b64_er, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfnmadd231ph(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfnmadd231ph_xmm_k1z_xmm_xmmm128b16, dst, src1, src2), dst.Flags);
		}

		public void vfnmadd231ph(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfnmadd231ph_ymm_k1z_ymm_ymmm256b16, dst, src1, src2), dst.Flags);
		}

		public void vfnmadd231ph(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfnmadd231ph_zmm_k1z_zmm_zmmm512b16_er, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vfnmadd231ph(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfnmadd231ph_xmm_k1z_xmm_xmmm128b16, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfnmadd231ph(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfnmadd231ph_ymm_k1z_ymm_ymmm256b16, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfnmadd231ph(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfnmadd231ph_zmm_k1z_zmm_zmmm512b16_er, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfnmadd231ps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfnmadd231ps_xmm_xmm_xmmm128 : Code.EVEX_Vfnmadd231ps_xmm_k1z_xmm_xmmm128b32);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vfnmadd231ps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfnmadd231ps_ymm_ymm_ymmm256 : Code.EVEX_Vfnmadd231ps_ymm_k1z_ymm_ymmm256b32);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vfnmadd231ps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfnmadd231ps_zmm_k1z_zmm_zmmm512b32_er, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vfnmadd231ps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vfnmadd231ps_xmm_xmm_xmmm128 : Code.EVEX_Vfnmadd231ps_xmm_k1z_xmm_xmmm128b32) : Code.EVEX_Vfnmadd231ps_xmm_k1z_xmm_xmmm128b32);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfnmadd231ps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vfnmadd231ps_ymm_ymm_ymmm256 : Code.EVEX_Vfnmadd231ps_ymm_k1z_ymm_ymmm256b32) : Code.EVEX_Vfnmadd231ps_ymm_k1z_ymm_ymmm256b32);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfnmadd231ps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfnmadd231ps_zmm_k1z_zmm_zmmm512b32_er, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfnmadd231sd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfnmadd231sd_xmm_xmm_xmmm64 : Code.EVEX_Vfnmadd231sd_xmm_k1z_xmm_xmmm64_er);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vfnmadd231sd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfnmadd231sd_xmm_xmm_xmmm64 : Code.EVEX_Vfnmadd231sd_xmm_k1z_xmm_xmmm64_er);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfnmadd231sh(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfnmadd231sh_xmm_k1z_xmm_xmmm16_er, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vfnmadd231sh(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfnmadd231sh_xmm_k1z_xmm_xmmm16_er, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfnmadd231ss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfnmadd231ss_xmm_xmm_xmmm32 : Code.EVEX_Vfnmadd231ss_xmm_k1z_xmm_xmmm32_er);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vfnmadd231ss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfnmadd231ss_xmm_xmm_xmmm32 : Code.EVEX_Vfnmadd231ss_xmm_k1z_xmm_xmmm32_er);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfnmaddpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, AssemblerRegisterXMM src3)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vfnmaddpd_xmm_xmm_xmmm128_xmm, dst, src1, src2, src3));
		}

		public void vfnmaddpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, AssemblerRegisterXMM src3)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vfnmaddpd_xmm_xmm_xmmm128_xmm, register, register2, in memory, src3));
		}

		public void vfnmaddpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, AssemblerRegisterYMM src3)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vfnmaddpd_ymm_ymm_ymmm256_ymm, dst, src1, src2, src3));
		}

		public void vfnmaddpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, AssemblerRegisterYMM src3)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vfnmaddpd_ymm_ymm_ymmm256_ymm, register, register2, in memory, src3));
		}

		public void vfnmaddpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, AssemblerMemoryOperand src3)
		{
			Register register = dst;
			Register register2 = src1;
			Register register3 = src2;
			MemoryOperand memory = src3.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vfnmaddpd_xmm_xmm_xmm_xmmm128, register, register2, register3, in memory));
		}

		public void vfnmaddpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, AssemblerMemoryOperand src3)
		{
			Register register = dst;
			Register register2 = src1;
			Register register3 = src2;
			MemoryOperand memory = src3.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vfnmaddpd_ymm_ymm_ymm_ymmm256, register, register2, register3, in memory));
		}

		public void vfnmaddps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, AssemblerRegisterXMM src3)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vfnmaddps_xmm_xmm_xmmm128_xmm, dst, src1, src2, src3));
		}

		public void vfnmaddps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, AssemblerRegisterXMM src3)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vfnmaddps_xmm_xmm_xmmm128_xmm, register, register2, in memory, src3));
		}

		public void vfnmaddps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, AssemblerRegisterYMM src3)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vfnmaddps_ymm_ymm_ymmm256_ymm, dst, src1, src2, src3));
		}

		public void vfnmaddps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, AssemblerRegisterYMM src3)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vfnmaddps_ymm_ymm_ymmm256_ymm, register, register2, in memory, src3));
		}

		public void vfnmaddps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, AssemblerMemoryOperand src3)
		{
			Register register = dst;
			Register register2 = src1;
			Register register3 = src2;
			MemoryOperand memory = src3.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vfnmaddps_xmm_xmm_xmm_xmmm128, register, register2, register3, in memory));
		}

		public void vfnmaddps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, AssemblerMemoryOperand src3)
		{
			Register register = dst;
			Register register2 = src1;
			Register register3 = src2;
			MemoryOperand memory = src3.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vfnmaddps_ymm_ymm_ymm_ymmm256, register, register2, register3, in memory));
		}

		public void vfnmaddsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, AssemblerRegisterXMM src3)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vfnmaddsd_xmm_xmm_xmmm64_xmm, dst, src1, src2, src3));
		}

		public void vfnmaddsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, AssemblerRegisterXMM src3)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vfnmaddsd_xmm_xmm_xmmm64_xmm, register, register2, in memory, src3));
		}

		public void vfnmaddsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, AssemblerMemoryOperand src3)
		{
			Register register = dst;
			Register register2 = src1;
			Register register3 = src2;
			MemoryOperand memory = src3.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vfnmaddsd_xmm_xmm_xmm_xmmm64, register, register2, register3, in memory));
		}

		public void vfnmaddss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, AssemblerRegisterXMM src3)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vfnmaddss_xmm_xmm_xmmm32_xmm, dst, src1, src2, src3));
		}

		public void vfnmaddss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, AssemblerRegisterXMM src3)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vfnmaddss_xmm_xmm_xmmm32_xmm, register, register2, in memory, src3));
		}

		public void vfnmaddss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, AssemblerMemoryOperand src3)
		{
			Register register = dst;
			Register register2 = src1;
			Register register3 = src2;
			MemoryOperand memory = src3.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vfnmaddss_xmm_xmm_xmm_xmmm32, register, register2, register3, in memory));
		}

		public void vfnmsub132pd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfnmsub132pd_xmm_xmm_xmmm128 : Code.EVEX_Vfnmsub132pd_xmm_k1z_xmm_xmmm128b64);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vfnmsub132pd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfnmsub132pd_ymm_ymm_ymmm256 : Code.EVEX_Vfnmsub132pd_ymm_k1z_ymm_ymmm256b64);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vfnmsub132pd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfnmsub132pd_zmm_k1z_zmm_zmmm512b64_er, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vfnmsub132pd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vfnmsub132pd_xmm_xmm_xmmm128 : Code.EVEX_Vfnmsub132pd_xmm_k1z_xmm_xmmm128b64) : Code.EVEX_Vfnmsub132pd_xmm_k1z_xmm_xmmm128b64);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfnmsub132pd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vfnmsub132pd_ymm_ymm_ymmm256 : Code.EVEX_Vfnmsub132pd_ymm_k1z_ymm_ymmm256b64) : Code.EVEX_Vfnmsub132pd_ymm_k1z_ymm_ymmm256b64);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfnmsub132pd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfnmsub132pd_zmm_k1z_zmm_zmmm512b64_er, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfnmsub132ph(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfnmsub132ph_xmm_k1z_xmm_xmmm128b16, dst, src1, src2), dst.Flags);
		}

		public void vfnmsub132ph(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfnmsub132ph_ymm_k1z_ymm_ymmm256b16, dst, src1, src2), dst.Flags);
		}

		public void vfnmsub132ph(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfnmsub132ph_zmm_k1z_zmm_zmmm512b16_er, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vfnmsub132ph(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfnmsub132ph_xmm_k1z_xmm_xmmm128b16, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfnmsub132ph(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfnmsub132ph_ymm_k1z_ymm_ymmm256b16, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfnmsub132ph(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfnmsub132ph_zmm_k1z_zmm_zmmm512b16_er, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfnmsub132ps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfnmsub132ps_xmm_xmm_xmmm128 : Code.EVEX_Vfnmsub132ps_xmm_k1z_xmm_xmmm128b32);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vfnmsub132ps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfnmsub132ps_ymm_ymm_ymmm256 : Code.EVEX_Vfnmsub132ps_ymm_k1z_ymm_ymmm256b32);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vfnmsub132ps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfnmsub132ps_zmm_k1z_zmm_zmmm512b32_er, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vfnmsub132ps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vfnmsub132ps_xmm_xmm_xmmm128 : Code.EVEX_Vfnmsub132ps_xmm_k1z_xmm_xmmm128b32) : Code.EVEX_Vfnmsub132ps_xmm_k1z_xmm_xmmm128b32);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfnmsub132ps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vfnmsub132ps_ymm_ymm_ymmm256 : Code.EVEX_Vfnmsub132ps_ymm_k1z_ymm_ymmm256b32) : Code.EVEX_Vfnmsub132ps_ymm_k1z_ymm_ymmm256b32);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfnmsub132ps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfnmsub132ps_zmm_k1z_zmm_zmmm512b32_er, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfnmsub132sd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfnmsub132sd_xmm_xmm_xmmm64 : Code.EVEX_Vfnmsub132sd_xmm_k1z_xmm_xmmm64_er);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vfnmsub132sd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfnmsub132sd_xmm_xmm_xmmm64 : Code.EVEX_Vfnmsub132sd_xmm_k1z_xmm_xmmm64_er);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfnmsub132sh(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfnmsub132sh_xmm_k1z_xmm_xmmm16_er, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vfnmsub132sh(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfnmsub132sh_xmm_k1z_xmm_xmmm16_er, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfnmsub132ss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfnmsub132ss_xmm_xmm_xmmm32 : Code.EVEX_Vfnmsub132ss_xmm_k1z_xmm_xmmm32_er);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vfnmsub132ss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfnmsub132ss_xmm_xmm_xmmm32 : Code.EVEX_Vfnmsub132ss_xmm_k1z_xmm_xmmm32_er);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfnmsub213pd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfnmsub213pd_xmm_xmm_xmmm128 : Code.EVEX_Vfnmsub213pd_xmm_k1z_xmm_xmmm128b64);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vfnmsub213pd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfnmsub213pd_ymm_ymm_ymmm256 : Code.EVEX_Vfnmsub213pd_ymm_k1z_ymm_ymmm256b64);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vfnmsub213pd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfnmsub213pd_zmm_k1z_zmm_zmmm512b64_er, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vfnmsub213pd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vfnmsub213pd_xmm_xmm_xmmm128 : Code.EVEX_Vfnmsub213pd_xmm_k1z_xmm_xmmm128b64) : Code.EVEX_Vfnmsub213pd_xmm_k1z_xmm_xmmm128b64);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfnmsub213pd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vfnmsub213pd_ymm_ymm_ymmm256 : Code.EVEX_Vfnmsub213pd_ymm_k1z_ymm_ymmm256b64) : Code.EVEX_Vfnmsub213pd_ymm_k1z_ymm_ymmm256b64);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfnmsub213pd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfnmsub213pd_zmm_k1z_zmm_zmmm512b64_er, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfnmsub213ph(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfnmsub213ph_xmm_k1z_xmm_xmmm128b16, dst, src1, src2), dst.Flags);
		}

		public void vfnmsub213ph(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfnmsub213ph_ymm_k1z_ymm_ymmm256b16, dst, src1, src2), dst.Flags);
		}

		public void vfnmsub213ph(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfnmsub213ph_zmm_k1z_zmm_zmmm512b16_er, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vfnmsub213ph(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfnmsub213ph_xmm_k1z_xmm_xmmm128b16, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfnmsub213ph(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfnmsub213ph_ymm_k1z_ymm_ymmm256b16, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfnmsub213ph(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfnmsub213ph_zmm_k1z_zmm_zmmm512b16_er, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfnmsub213ps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfnmsub213ps_xmm_xmm_xmmm128 : Code.EVEX_Vfnmsub213ps_xmm_k1z_xmm_xmmm128b32);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vfnmsub213ps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfnmsub213ps_ymm_ymm_ymmm256 : Code.EVEX_Vfnmsub213ps_ymm_k1z_ymm_ymmm256b32);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vfnmsub213ps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfnmsub213ps_zmm_k1z_zmm_zmmm512b32_er, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vfnmsub213ps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vfnmsub213ps_xmm_xmm_xmmm128 : Code.EVEX_Vfnmsub213ps_xmm_k1z_xmm_xmmm128b32) : Code.EVEX_Vfnmsub213ps_xmm_k1z_xmm_xmmm128b32);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfnmsub213ps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vfnmsub213ps_ymm_ymm_ymmm256 : Code.EVEX_Vfnmsub213ps_ymm_k1z_ymm_ymmm256b32) : Code.EVEX_Vfnmsub213ps_ymm_k1z_ymm_ymmm256b32);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfnmsub213ps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfnmsub213ps_zmm_k1z_zmm_zmmm512b32_er, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfnmsub213sd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfnmsub213sd_xmm_xmm_xmmm64 : Code.EVEX_Vfnmsub213sd_xmm_k1z_xmm_xmmm64_er);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vfnmsub213sd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfnmsub213sd_xmm_xmm_xmmm64 : Code.EVEX_Vfnmsub213sd_xmm_k1z_xmm_xmmm64_er);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfnmsub213sh(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfnmsub213sh_xmm_k1z_xmm_xmmm16_er, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vfnmsub213sh(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfnmsub213sh_xmm_k1z_xmm_xmmm16_er, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfnmsub213ss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfnmsub213ss_xmm_xmm_xmmm32 : Code.EVEX_Vfnmsub213ss_xmm_k1z_xmm_xmmm32_er);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vfnmsub213ss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfnmsub213ss_xmm_xmm_xmmm32 : Code.EVEX_Vfnmsub213ss_xmm_k1z_xmm_xmmm32_er);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfnmsub231pd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfnmsub231pd_xmm_xmm_xmmm128 : Code.EVEX_Vfnmsub231pd_xmm_k1z_xmm_xmmm128b64);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vfnmsub231pd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfnmsub231pd_ymm_ymm_ymmm256 : Code.EVEX_Vfnmsub231pd_ymm_k1z_ymm_ymmm256b64);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vfnmsub231pd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfnmsub231pd_zmm_k1z_zmm_zmmm512b64_er, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vfnmsub231pd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vfnmsub231pd_xmm_xmm_xmmm128 : Code.EVEX_Vfnmsub231pd_xmm_k1z_xmm_xmmm128b64) : Code.EVEX_Vfnmsub231pd_xmm_k1z_xmm_xmmm128b64);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfnmsub231pd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vfnmsub231pd_ymm_ymm_ymmm256 : Code.EVEX_Vfnmsub231pd_ymm_k1z_ymm_ymmm256b64) : Code.EVEX_Vfnmsub231pd_ymm_k1z_ymm_ymmm256b64);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfnmsub231pd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfnmsub231pd_zmm_k1z_zmm_zmmm512b64_er, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfnmsub231ph(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfnmsub231ph_xmm_k1z_xmm_xmmm128b16, dst, src1, src2), dst.Flags);
		}

		public void vfnmsub231ph(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfnmsub231ph_ymm_k1z_ymm_ymmm256b16, dst, src1, src2), dst.Flags);
		}

		public void vfnmsub231ph(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfnmsub231ph_zmm_k1z_zmm_zmmm512b16_er, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vfnmsub231ph(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfnmsub231ph_xmm_k1z_xmm_xmmm128b16, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfnmsub231ph(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfnmsub231ph_ymm_k1z_ymm_ymmm256b16, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfnmsub231ph(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfnmsub231ph_zmm_k1z_zmm_zmmm512b16_er, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfnmsub231ps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfnmsub231ps_xmm_xmm_xmmm128 : Code.EVEX_Vfnmsub231ps_xmm_k1z_xmm_xmmm128b32);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vfnmsub231ps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfnmsub231ps_ymm_ymm_ymmm256 : Code.EVEX_Vfnmsub231ps_ymm_k1z_ymm_ymmm256b32);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vfnmsub231ps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfnmsub231ps_zmm_k1z_zmm_zmmm512b32_er, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vfnmsub231ps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vfnmsub231ps_xmm_xmm_xmmm128 : Code.EVEX_Vfnmsub231ps_xmm_k1z_xmm_xmmm128b32) : Code.EVEX_Vfnmsub231ps_xmm_k1z_xmm_xmmm128b32);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfnmsub231ps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vfnmsub231ps_ymm_ymm_ymmm256 : Code.EVEX_Vfnmsub231ps_ymm_k1z_ymm_ymmm256b32) : Code.EVEX_Vfnmsub231ps_ymm_k1z_ymm_ymmm256b32);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfnmsub231ps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfnmsub231ps_zmm_k1z_zmm_zmmm512b32_er, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfnmsub231sd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfnmsub231sd_xmm_xmm_xmmm64 : Code.EVEX_Vfnmsub231sd_xmm_k1z_xmm_xmmm64_er);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vfnmsub231sd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfnmsub231sd_xmm_xmm_xmmm64 : Code.EVEX_Vfnmsub231sd_xmm_k1z_xmm_xmmm64_er);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfnmsub231sh(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfnmsub231sh_xmm_k1z_xmm_xmmm16_er, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vfnmsub231sh(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfnmsub231sh_xmm_k1z_xmm_xmmm16_er, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfnmsub231ss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfnmsub231ss_xmm_xmm_xmmm32 : Code.EVEX_Vfnmsub231ss_xmm_k1z_xmm_xmmm32_er);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vfnmsub231ss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vfnmsub231ss_xmm_xmm_xmmm32 : Code.EVEX_Vfnmsub231ss_xmm_k1z_xmm_xmmm32_er);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vfnmsubpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, AssemblerRegisterXMM src3)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vfnmsubpd_xmm_xmm_xmmm128_xmm, dst, src1, src2, src3));
		}

		public void vfnmsubpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, AssemblerRegisterXMM src3)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vfnmsubpd_xmm_xmm_xmmm128_xmm, register, register2, in memory, src3));
		}

		public void vfnmsubpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, AssemblerRegisterYMM src3)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vfnmsubpd_ymm_ymm_ymmm256_ymm, dst, src1, src2, src3));
		}

		public void vfnmsubpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, AssemblerRegisterYMM src3)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vfnmsubpd_ymm_ymm_ymmm256_ymm, register, register2, in memory, src3));
		}

		public void vfnmsubpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, AssemblerMemoryOperand src3)
		{
			Register register = dst;
			Register register2 = src1;
			Register register3 = src2;
			MemoryOperand memory = src3.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vfnmsubpd_xmm_xmm_xmm_xmmm128, register, register2, register3, in memory));
		}

		public void vfnmsubpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, AssemblerMemoryOperand src3)
		{
			Register register = dst;
			Register register2 = src1;
			Register register3 = src2;
			MemoryOperand memory = src3.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vfnmsubpd_ymm_ymm_ymm_ymmm256, register, register2, register3, in memory));
		}

		public void vfnmsubps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, AssemblerRegisterXMM src3)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vfnmsubps_xmm_xmm_xmmm128_xmm, dst, src1, src2, src3));
		}

		public void vfnmsubps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, AssemblerRegisterXMM src3)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vfnmsubps_xmm_xmm_xmmm128_xmm, register, register2, in memory, src3));
		}

		public void vfnmsubps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, AssemblerRegisterYMM src3)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vfnmsubps_ymm_ymm_ymmm256_ymm, dst, src1, src2, src3));
		}

		public void vfnmsubps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, AssemblerRegisterYMM src3)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vfnmsubps_ymm_ymm_ymmm256_ymm, register, register2, in memory, src3));
		}

		public void vfnmsubps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, AssemblerMemoryOperand src3)
		{
			Register register = dst;
			Register register2 = src1;
			Register register3 = src2;
			MemoryOperand memory = src3.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vfnmsubps_xmm_xmm_xmm_xmmm128, register, register2, register3, in memory));
		}

		public void vfnmsubps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, AssemblerMemoryOperand src3)
		{
			Register register = dst;
			Register register2 = src1;
			Register register3 = src2;
			MemoryOperand memory = src3.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vfnmsubps_ymm_ymm_ymm_ymmm256, register, register2, register3, in memory));
		}

		public void vfnmsubsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, AssemblerRegisterXMM src3)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vfnmsubsd_xmm_xmm_xmmm64_xmm, dst, src1, src2, src3));
		}

		public void vfnmsubsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, AssemblerRegisterXMM src3)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vfnmsubsd_xmm_xmm_xmmm64_xmm, register, register2, in memory, src3));
		}

		public void vfnmsubsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, AssemblerMemoryOperand src3)
		{
			Register register = dst;
			Register register2 = src1;
			Register register3 = src2;
			MemoryOperand memory = src3.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vfnmsubsd_xmm_xmm_xmm_xmmm64, register, register2, register3, in memory));
		}

		public void vfnmsubss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, AssemblerRegisterXMM src3)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vfnmsubss_xmm_xmm_xmmm32_xmm, dst, src1, src2, src3));
		}

		public void vfnmsubss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, AssemblerRegisterXMM src3)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vfnmsubss_xmm_xmm_xmmm32_xmm, register, register2, in memory, src3));
		}

		public void vfnmsubss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, AssemblerMemoryOperand src3)
		{
			Register register = dst;
			Register register2 = src1;
			Register register3 = src2;
			MemoryOperand memory = src3.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vfnmsubss_xmm_xmm_xmm_xmmm32, register, register2, register3, in memory));
		}

		public void vfpclasspd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfpclasspd_kr_k1_xmmm128b64_imm8, dst, src1, imm), dst.Flags);
		}

		public void vfpclasspd(AssemblerRegisterK dst, AssemblerRegisterYMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfpclasspd_kr_k1_ymmm256b64_imm8, dst, src1, imm), dst.Flags);
		}

		public void vfpclasspd(AssemblerRegisterK dst, AssemblerRegisterZMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfpclasspd_kr_k1_zmmm512b64_imm8, dst, src1, imm), dst.Flags);
		}

		public void vfpclasspd(AssemblerRegisterK dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Code code;
			if (src1.IsBroadcast)
			{
				code = Code.EVEX_Vfpclasspd_kr_k1_zmmm512b64_imm8;
			}
			else if (src1.Size == MemoryOperandSize.Zword)
			{
				code = Code.EVEX_Vfpclasspd_kr_k1_zmmm512b64_imm8;
			}
			else if (src1.Size == MemoryOperandSize.Yword)
			{
				code = Code.EVEX_Vfpclasspd_kr_k1_ymmm256b64_imm8;
			}
			else
			{
				if (src1.Size != MemoryOperandSize.Xword)
				{
					throw NoOpCodeFoundFor(Mnemonic.Vfpclasspd, dst, src1, imm);
				}
				code = Code.EVEX_Vfpclasspd_kr_k1_xmmm128b64_imm8;
			}
			Code code2 = code;
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, register, in memory, imm), dst.Flags | src1.Flags);
		}

		public void vfpclasspd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfpclasspd_kr_k1_xmmm128b64_imm8, (Register)dst, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vfpclasspd(AssemblerRegisterK dst, AssemblerRegisterYMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfpclasspd_kr_k1_ymmm256b64_imm8, (Register)dst, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vfpclasspd(AssemblerRegisterK dst, AssemblerRegisterZMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfpclasspd_kr_k1_zmmm512b64_imm8, (Register)dst, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vfpclasspd(AssemblerRegisterK dst, AssemblerMemoryOperand src1, byte imm)
		{
			Code code;
			if (src1.IsBroadcast)
			{
				code = Code.EVEX_Vfpclasspd_kr_k1_zmmm512b64_imm8;
			}
			else if (src1.Size == MemoryOperandSize.Zword)
			{
				code = Code.EVEX_Vfpclasspd_kr_k1_zmmm512b64_imm8;
			}
			else if (src1.Size == MemoryOperandSize.Yword)
			{
				code = Code.EVEX_Vfpclasspd_kr_k1_ymmm256b64_imm8;
			}
			else
			{
				if (src1.Size != MemoryOperandSize.Xword)
				{
					throw NoOpCodeFoundFor(Mnemonic.Vfpclasspd, dst, src1, imm);
				}
				code = Code.EVEX_Vfpclasspd_kr_k1_xmmm128b64_imm8;
			}
			Code code2 = code;
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, register, in memory, (uint)imm), dst.Flags | src1.Flags);
		}

		public void vfpclasspdx(AssemblerRegisterK dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfpclasspd_kr_k1_xmmm128b64_imm8, register, in memory, imm), dst.Flags | src1.Flags);
		}

		public void vfpclasspdx(AssemblerRegisterK dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfpclasspd_kr_k1_xmmm128b64_imm8, register, in memory, (uint)imm), dst.Flags | src1.Flags);
		}

		public void vfpclasspdy(AssemblerRegisterK dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfpclasspd_kr_k1_ymmm256b64_imm8, register, in memory, imm), dst.Flags | src1.Flags);
		}

		public void vfpclasspdy(AssemblerRegisterK dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfpclasspd_kr_k1_ymmm256b64_imm8, register, in memory, (uint)imm), dst.Flags | src1.Flags);
		}

		public void vfpclasspdz(AssemblerRegisterK dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfpclasspd_kr_k1_zmmm512b64_imm8, register, in memory, imm), dst.Flags | src1.Flags);
		}

		public void vfpclasspdz(AssemblerRegisterK dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfpclasspd_kr_k1_zmmm512b64_imm8, register, in memory, (uint)imm), dst.Flags | src1.Flags);
		}

		public void vfpclassph(AssemblerRegisterK dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfpclassph_kr_k1_xmmm128b16_imm8, dst, src1, imm), dst.Flags);
		}

		public void vfpclassph(AssemblerRegisterK dst, AssemblerRegisterYMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfpclassph_kr_k1_ymmm256b16_imm8, dst, src1, imm), dst.Flags);
		}

		public void vfpclassph(AssemblerRegisterK dst, AssemblerRegisterZMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfpclassph_kr_k1_zmmm512b16_imm8, dst, src1, imm), dst.Flags);
		}

		public void vfpclassph(AssemblerRegisterK dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Code code;
			if (src1.IsBroadcast)
			{
				code = Code.EVEX_Vfpclassph_kr_k1_zmmm512b16_imm8;
			}
			else if (src1.Size == MemoryOperandSize.Zword)
			{
				code = Code.EVEX_Vfpclassph_kr_k1_zmmm512b16_imm8;
			}
			else if (src1.Size == MemoryOperandSize.Yword)
			{
				code = Code.EVEX_Vfpclassph_kr_k1_ymmm256b16_imm8;
			}
			else
			{
				if (src1.Size != MemoryOperandSize.Xword)
				{
					throw NoOpCodeFoundFor(Mnemonic.Vfpclassph, dst, src1, imm);
				}
				code = Code.EVEX_Vfpclassph_kr_k1_xmmm128b16_imm8;
			}
			Code code2 = code;
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, register, in memory, imm), dst.Flags | src1.Flags);
		}

		public void vfpclassph(AssemblerRegisterK dst, AssemblerRegisterXMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfpclassph_kr_k1_xmmm128b16_imm8, (Register)dst, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vfpclassph(AssemblerRegisterK dst, AssemblerRegisterYMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfpclassph_kr_k1_ymmm256b16_imm8, (Register)dst, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vfpclassph(AssemblerRegisterK dst, AssemblerRegisterZMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfpclassph_kr_k1_zmmm512b16_imm8, (Register)dst, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vfpclassph(AssemblerRegisterK dst, AssemblerMemoryOperand src1, byte imm)
		{
			Code code;
			if (src1.IsBroadcast)
			{
				code = Code.EVEX_Vfpclassph_kr_k1_zmmm512b16_imm8;
			}
			else if (src1.Size == MemoryOperandSize.Zword)
			{
				code = Code.EVEX_Vfpclassph_kr_k1_zmmm512b16_imm8;
			}
			else if (src1.Size == MemoryOperandSize.Yword)
			{
				code = Code.EVEX_Vfpclassph_kr_k1_ymmm256b16_imm8;
			}
			else
			{
				if (src1.Size != MemoryOperandSize.Xword)
				{
					throw NoOpCodeFoundFor(Mnemonic.Vfpclassph, dst, src1, imm);
				}
				code = Code.EVEX_Vfpclassph_kr_k1_xmmm128b16_imm8;
			}
			Code code2 = code;
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, register, in memory, (uint)imm), dst.Flags | src1.Flags);
		}

		public void vfpclassphx(AssemblerRegisterK dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfpclassph_kr_k1_xmmm128b16_imm8, register, in memory, imm), dst.Flags | src1.Flags);
		}

		public void vfpclassphx(AssemblerRegisterK dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfpclassph_kr_k1_xmmm128b16_imm8, register, in memory, (uint)imm), dst.Flags | src1.Flags);
		}

		public void vfpclassphy(AssemblerRegisterK dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfpclassph_kr_k1_ymmm256b16_imm8, register, in memory, imm), dst.Flags | src1.Flags);
		}

		public void vfpclassphy(AssemblerRegisterK dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfpclassph_kr_k1_ymmm256b16_imm8, register, in memory, (uint)imm), dst.Flags | src1.Flags);
		}

		public void vfpclassphz(AssemblerRegisterK dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfpclassph_kr_k1_zmmm512b16_imm8, register, in memory, imm), dst.Flags | src1.Flags);
		}

		public void vfpclassphz(AssemblerRegisterK dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfpclassph_kr_k1_zmmm512b16_imm8, register, in memory, (uint)imm), dst.Flags | src1.Flags);
		}

		public void vfpclassps(AssemblerRegisterK dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfpclassps_kr_k1_xmmm128b32_imm8, dst, src1, imm), dst.Flags);
		}

		public void vfpclassps(AssemblerRegisterK dst, AssemblerRegisterYMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfpclassps_kr_k1_ymmm256b32_imm8, dst, src1, imm), dst.Flags);
		}

		public void vfpclassps(AssemblerRegisterK dst, AssemblerRegisterZMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfpclassps_kr_k1_zmmm512b32_imm8, dst, src1, imm), dst.Flags);
		}

		public void vfpclassps(AssemblerRegisterK dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Code code;
			if (src1.IsBroadcast)
			{
				code = Code.EVEX_Vfpclassps_kr_k1_zmmm512b32_imm8;
			}
			else if (src1.Size == MemoryOperandSize.Zword)
			{
				code = Code.EVEX_Vfpclassps_kr_k1_zmmm512b32_imm8;
			}
			else if (src1.Size == MemoryOperandSize.Yword)
			{
				code = Code.EVEX_Vfpclassps_kr_k1_ymmm256b32_imm8;
			}
			else
			{
				if (src1.Size != MemoryOperandSize.Xword)
				{
					throw NoOpCodeFoundFor(Mnemonic.Vfpclassps, dst, src1, imm);
				}
				code = Code.EVEX_Vfpclassps_kr_k1_xmmm128b32_imm8;
			}
			Code code2 = code;
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, register, in memory, imm), dst.Flags | src1.Flags);
		}

		public void vfpclassps(AssemblerRegisterK dst, AssemblerRegisterXMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfpclassps_kr_k1_xmmm128b32_imm8, (Register)dst, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vfpclassps(AssemblerRegisterK dst, AssemblerRegisterYMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfpclassps_kr_k1_ymmm256b32_imm8, (Register)dst, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vfpclassps(AssemblerRegisterK dst, AssemblerRegisterZMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfpclassps_kr_k1_zmmm512b32_imm8, (Register)dst, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vfpclassps(AssemblerRegisterK dst, AssemblerMemoryOperand src1, byte imm)
		{
			Code code;
			if (src1.IsBroadcast)
			{
				code = Code.EVEX_Vfpclassps_kr_k1_zmmm512b32_imm8;
			}
			else if (src1.Size == MemoryOperandSize.Zword)
			{
				code = Code.EVEX_Vfpclassps_kr_k1_zmmm512b32_imm8;
			}
			else if (src1.Size == MemoryOperandSize.Yword)
			{
				code = Code.EVEX_Vfpclassps_kr_k1_ymmm256b32_imm8;
			}
			else
			{
				if (src1.Size != MemoryOperandSize.Xword)
				{
					throw NoOpCodeFoundFor(Mnemonic.Vfpclassps, dst, src1, imm);
				}
				code = Code.EVEX_Vfpclassps_kr_k1_xmmm128b32_imm8;
			}
			Code code2 = code;
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, register, in memory, (uint)imm), dst.Flags | src1.Flags);
		}

		public void vfpclasspsx(AssemblerRegisterK dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfpclassps_kr_k1_xmmm128b32_imm8, register, in memory, imm), dst.Flags | src1.Flags);
		}

		public void vfpclasspsx(AssemblerRegisterK dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfpclassps_kr_k1_xmmm128b32_imm8, register, in memory, (uint)imm), dst.Flags | src1.Flags);
		}

		public void vfpclasspsy(AssemblerRegisterK dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfpclassps_kr_k1_ymmm256b32_imm8, register, in memory, imm), dst.Flags | src1.Flags);
		}

		public void vfpclasspsy(AssemblerRegisterK dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfpclassps_kr_k1_ymmm256b32_imm8, register, in memory, (uint)imm), dst.Flags | src1.Flags);
		}

		public void vfpclasspsz(AssemblerRegisterK dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfpclassps_kr_k1_zmmm512b32_imm8, register, in memory, imm), dst.Flags | src1.Flags);
		}

		public void vfpclasspsz(AssemblerRegisterK dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfpclassps_kr_k1_zmmm512b32_imm8, register, in memory, (uint)imm), dst.Flags | src1.Flags);
		}

		public void vfpclasssd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfpclasssd_kr_k1_xmmm64_imm8, dst, src1, imm), dst.Flags);
		}

		public void vfpclasssd(AssemblerRegisterK dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfpclasssd_kr_k1_xmmm64_imm8, register, in memory, imm), dst.Flags);
		}

		public void vfpclasssd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfpclasssd_kr_k1_xmmm64_imm8, (Register)dst, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vfpclasssd(AssemblerRegisterK dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfpclasssd_kr_k1_xmmm64_imm8, register, in memory, (uint)imm), dst.Flags);
		}

		public void vfpclasssh(AssemblerRegisterK dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfpclasssh_kr_k1_xmmm16_imm8, dst, src1, imm), dst.Flags);
		}

		public void vfpclasssh(AssemblerRegisterK dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfpclasssh_kr_k1_xmmm16_imm8, register, in memory, imm), dst.Flags);
		}

		public void vfpclasssh(AssemblerRegisterK dst, AssemblerRegisterXMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfpclasssh_kr_k1_xmmm16_imm8, (Register)dst, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vfpclasssh(AssemblerRegisterK dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfpclasssh_kr_k1_xmmm16_imm8, register, in memory, (uint)imm), dst.Flags);
		}

		public void vfpclassss(AssemblerRegisterK dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfpclassss_kr_k1_xmmm32_imm8, dst, src1, imm), dst.Flags);
		}

		public void vfpclassss(AssemblerRegisterK dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfpclassss_kr_k1_xmmm32_imm8, register, in memory, imm), dst.Flags);
		}

		public void vfpclassss(AssemblerRegisterK dst, AssemblerRegisterXMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vfpclassss_kr_k1_xmmm32_imm8, (Register)dst, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vfpclassss(AssemblerRegisterK dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vfpclassss_kr_k1_xmmm32_imm8, register, in memory, (uint)imm), dst.Flags);
		}

		public void vfrczpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.XOP_Vfrczpd_xmm_xmmm128, dst, src));
		}

		public void vfrczpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.XOP_Vfrczpd_ymm_ymmm256, dst, src));
		}

		public void vfrczpd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Vfrczpd_xmm_xmmm128, register, in memory));
		}

		public void vfrczpd(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Vfrczpd_ymm_ymmm256, register, in memory));
		}

		public void vfrczps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.XOP_Vfrczps_xmm_xmmm128, dst, src));
		}

		public void vfrczps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.XOP_Vfrczps_ymm_ymmm256, dst, src));
		}

		public void vfrczps(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Vfrczps_xmm_xmmm128, register, in memory));
		}

		public void vfrczps(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Vfrczps_ymm_ymmm256, register, in memory));
		}

		public void vfrczsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.XOP_Vfrczsd_xmm_xmmm64, dst, src));
		}

		public void vfrczsd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Vfrczsd_xmm_xmmm64, register, in memory));
		}

		public void vfrczss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.XOP_Vfrczss_xmm_xmmm32, dst, src));
		}

		public void vfrczss(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Vfrczss_xmm_xmmm32, register, in memory));
		}

		public void vgatherdpd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vgatherdpd_xmm_k1_vm32x, register, in memory), dst.Flags);
		}

		public void vgatherdpd(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vgatherdpd_ymm_k1_vm32x, register, in memory), dst.Flags);
		}

		public void vgatherdpd(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vgatherdpd_zmm_k1_vm32y, register, in memory), dst.Flags);
		}

		public void vgatherdpd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, AssemblerRegisterXMM src2)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vgatherdpd_xmm_vm32x_xmm, register, in memory, src2));
		}

		public void vgatherdpd(AssemblerRegisterYMM dst, AssemblerMemoryOperand src1, AssemblerRegisterYMM src2)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vgatherdpd_ymm_vm32x_ymm, register, in memory, src2));
		}

		public void vgatherdps(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vgatherdps_xmm_k1_vm32x, register, in memory), dst.Flags);
		}

		public void vgatherdps(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vgatherdps_ymm_k1_vm32y, register, in memory), dst.Flags);
		}

		public void vgatherdps(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vgatherdps_zmm_k1_vm32z, register, in memory), dst.Flags);
		}

		public void vgatherdps(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, AssemblerRegisterXMM src2)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vgatherdps_xmm_vm32x_xmm, register, in memory, src2));
		}

		public void vgatherdps(AssemblerRegisterYMM dst, AssemblerMemoryOperand src1, AssemblerRegisterYMM src2)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vgatherdps_ymm_vm32y_ymm, register, in memory, src2));
		}

		public void vgatherpf0dpd(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vgatherpf0dpd_vm32y_k1, in memory), dst.Flags);
		}

		public void vgatherpf0dps(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vgatherpf0dps_vm32z_k1, in memory), dst.Flags);
		}

		public void vgatherpf0qpd(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vgatherpf0qpd_vm64z_k1, in memory), dst.Flags);
		}

		public void vgatherpf0qps(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vgatherpf0qps_vm64z_k1, in memory), dst.Flags);
		}

		public void vgatherpf1dpd(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vgatherpf1dpd_vm32y_k1, in memory), dst.Flags);
		}

		public void vgatherpf1dps(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vgatherpf1dps_vm32z_k1, in memory), dst.Flags);
		}

		public void vgatherpf1qpd(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vgatherpf1qpd_vm64z_k1, in memory), dst.Flags);
		}

		public void vgatherpf1qps(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vgatherpf1qps_vm64z_k1, in memory), dst.Flags);
		}

		public void vgatherqpd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vgatherqpd_xmm_k1_vm64x, register, in memory), dst.Flags);
		}

		public void vgatherqpd(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vgatherqpd_ymm_k1_vm64y, register, in memory), dst.Flags);
		}

		public void vgatherqpd(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vgatherqpd_zmm_k1_vm64z, register, in memory), dst.Flags);
		}

		public void vgatherqpd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, AssemblerRegisterXMM src2)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vgatherqpd_xmm_vm64x_xmm, register, in memory, src2));
		}

		public void vgatherqpd(AssemblerRegisterYMM dst, AssemblerMemoryOperand src1, AssemblerRegisterYMM src2)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vgatherqpd_ymm_vm64y_ymm, register, in memory, src2));
		}

		public void vgatherqps(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Code code;
			if (src.Index.IsXMM())
			{
				code = Code.EVEX_Vgatherqps_xmm_k1_vm64x;
			}
			else
			{
				if (!src.Index.IsYMM())
				{
					throw NoOpCodeFoundFor(Mnemonic.Vgatherqps, dst, src);
				}
				code = Code.EVEX_Vgatherqps_xmm_k1_vm64y;
			}
			Code code2 = code;
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, register, in memory), dst.Flags);
		}

		public void vgatherqps(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vgatherqps_ymm_k1_vm64z, register, in memory), dst.Flags);
		}

		public void vgatherqps(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, AssemblerRegisterXMM src2)
		{
			Code code;
			if (src1.Index.IsXMM())
			{
				code = Code.VEX_Vgatherqps_xmm_vm64x_xmm;
			}
			else
			{
				if (!src1.Index.IsYMM())
				{
					throw NoOpCodeFoundFor(Mnemonic.Vgatherqps, dst, src1, src2);
				}
				code = Code.VEX_Vgatherqps_xmm_vm64y_xmm;
			}
			Code code2 = code;
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, register, in memory, src2));
		}

		public void vgetexppd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vgetexppd_xmm_k1z_xmmm128b64, dst, src), dst.Flags);
		}

		public void vgetexppd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vgetexppd_ymm_k1z_ymmm256b64, dst, src), dst.Flags);
		}

		public void vgetexppd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vgetexppd_zmm_k1z_zmmm512b64_sae, dst, src), dst.Flags | src.Flags);
		}

		public void vgetexppd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vgetexppd_xmm_k1z_xmmm128b64, register, in memory), dst.Flags | src.Flags);
		}

		public void vgetexppd(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vgetexppd_ymm_k1z_ymmm256b64, register, in memory), dst.Flags | src.Flags);
		}

		public void vgetexppd(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vgetexppd_zmm_k1z_zmmm512b64_sae, register, in memory), dst.Flags | src.Flags);
		}

		public void vgetexpph(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vgetexpph_xmm_k1z_xmmm128b16, dst, src), dst.Flags);
		}

		public void vgetexpph(AssemblerRegisterYMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vgetexpph_ymm_k1z_ymmm256b16, dst, src), dst.Flags);
		}

		public void vgetexpph(AssemblerRegisterZMM dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vgetexpph_zmm_k1z_zmmm512b16_sae, dst, src), dst.Flags | src.Flags);
		}

		public void vgetexpph(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vgetexpph_xmm_k1z_xmmm128b16, register, in memory), dst.Flags | src.Flags);
		}

		public void vgetexpph(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vgetexpph_ymm_k1z_ymmm256b16, register, in memory), dst.Flags | src.Flags);
		}

		public void vgetexpph(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vgetexpph_zmm_k1z_zmmm512b16_sae, register, in memory), dst.Flags | src.Flags);
		}

		public void vgetexpps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vgetexpps_xmm_k1z_xmmm128b32, dst, src), dst.Flags);
		}

		public void vgetexpps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vgetexpps_ymm_k1z_ymmm256b32, dst, src), dst.Flags);
		}

		public void vgetexpps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vgetexpps_zmm_k1z_zmmm512b32_sae, dst, src), dst.Flags | src.Flags);
		}

		public void vgetexpps(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vgetexpps_xmm_k1z_xmmm128b32, register, in memory), dst.Flags | src.Flags);
		}

		public void vgetexpps(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vgetexpps_ymm_k1z_ymmm256b32, register, in memory), dst.Flags | src.Flags);
		}

		public void vgetexpps(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vgetexpps_zmm_k1z_zmmm512b32_sae, register, in memory), dst.Flags | src.Flags);
		}

		public void vgetexpsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vgetexpsd_xmm_k1z_xmm_xmmm64_sae, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vgetexpsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vgetexpsd_xmm_k1z_xmm_xmmm64_sae, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vgetexpsh(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vgetexpsh_xmm_k1z_xmm_xmmm16_sae, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vgetexpsh(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vgetexpsh_xmm_k1z_xmm_xmmm16_sae, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vgetexpss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vgetexpss_xmm_k1z_xmm_xmmm32_sae, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vgetexpss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vgetexpss_xmm_k1z_xmm_xmmm32_sae, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vgetmantpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vgetmantpd_xmm_k1z_xmmm128b64_imm8, dst, src1, imm), dst.Flags);
		}

		public void vgetmantpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vgetmantpd_ymm_k1z_ymmm256b64_imm8, dst, src1, imm), dst.Flags);
		}

		public void vgetmantpd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vgetmantpd_zmm_k1z_zmmm512b64_imm8_sae, dst, src1, imm), dst.Flags | src1.Flags);
		}

		public void vgetmantpd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vgetmantpd_xmm_k1z_xmmm128b64_imm8, register, in memory, imm), dst.Flags | src1.Flags);
		}

		public void vgetmantpd(AssemblerRegisterYMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vgetmantpd_ymm_k1z_ymmm256b64_imm8, register, in memory, imm), dst.Flags | src1.Flags);
		}

		public void vgetmantpd(AssemblerRegisterZMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vgetmantpd_zmm_k1z_zmmm512b64_imm8_sae, register, in memory, imm), dst.Flags | src1.Flags);
		}

		public void vgetmantpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vgetmantpd_xmm_k1z_xmmm128b64_imm8, (Register)dst, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vgetmantpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vgetmantpd_ymm_k1z_ymmm256b64_imm8, (Register)dst, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vgetmantpd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vgetmantpd_zmm_k1z_zmmm512b64_imm8_sae, (Register)dst, (Register)src1, (uint)imm), dst.Flags | src1.Flags);
		}

		public void vgetmantpd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vgetmantpd_xmm_k1z_xmmm128b64_imm8, register, in memory, (uint)imm), dst.Flags | src1.Flags);
		}

		public void vgetmantpd(AssemblerRegisterYMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vgetmantpd_ymm_k1z_ymmm256b64_imm8, register, in memory, (uint)imm), dst.Flags | src1.Flags);
		}

		public void vgetmantpd(AssemblerRegisterZMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vgetmantpd_zmm_k1z_zmmm512b64_imm8_sae, register, in memory, (uint)imm), dst.Flags | src1.Flags);
		}

		public void vgetmantph(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vgetmantph_xmm_k1z_xmmm128b16_imm8, dst, src1, imm), dst.Flags);
		}

		public void vgetmantph(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vgetmantph_ymm_k1z_ymmm256b16_imm8, dst, src1, imm), dst.Flags);
		}

		public void vgetmantph(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vgetmantph_zmm_k1z_zmmm512b16_imm8_sae, dst, src1, imm), dst.Flags | src1.Flags);
		}

		public void vgetmantph(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vgetmantph_xmm_k1z_xmmm128b16_imm8, register, in memory, imm), dst.Flags | src1.Flags);
		}

		public void vgetmantph(AssemblerRegisterYMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vgetmantph_ymm_k1z_ymmm256b16_imm8, register, in memory, imm), dst.Flags | src1.Flags);
		}

		public void vgetmantph(AssemblerRegisterZMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vgetmantph_zmm_k1z_zmmm512b16_imm8_sae, register, in memory, imm), dst.Flags | src1.Flags);
		}

		public void vgetmantph(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vgetmantph_xmm_k1z_xmmm128b16_imm8, (Register)dst, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vgetmantph(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vgetmantph_ymm_k1z_ymmm256b16_imm8, (Register)dst, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vgetmantph(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vgetmantph_zmm_k1z_zmmm512b16_imm8_sae, (Register)dst, (Register)src1, (uint)imm), dst.Flags | src1.Flags);
		}

		public void vgetmantph(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vgetmantph_xmm_k1z_xmmm128b16_imm8, register, in memory, (uint)imm), dst.Flags | src1.Flags);
		}

		public void vgetmantph(AssemblerRegisterYMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vgetmantph_ymm_k1z_ymmm256b16_imm8, register, in memory, (uint)imm), dst.Flags | src1.Flags);
		}

		public void vgetmantph(AssemblerRegisterZMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vgetmantph_zmm_k1z_zmmm512b16_imm8_sae, register, in memory, (uint)imm), dst.Flags | src1.Flags);
		}

		public void vgetmantps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vgetmantps_xmm_k1z_xmmm128b32_imm8, dst, src1, imm), dst.Flags);
		}

		public void vgetmantps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vgetmantps_ymm_k1z_ymmm256b32_imm8, dst, src1, imm), dst.Flags);
		}

		public void vgetmantps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vgetmantps_zmm_k1z_zmmm512b32_imm8_sae, dst, src1, imm), dst.Flags | src1.Flags);
		}

		public void vgetmantps(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vgetmantps_xmm_k1z_xmmm128b32_imm8, register, in memory, imm), dst.Flags | src1.Flags);
		}

		public void vgetmantps(AssemblerRegisterYMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vgetmantps_ymm_k1z_ymmm256b32_imm8, register, in memory, imm), dst.Flags | src1.Flags);
		}

		public void vgetmantps(AssemblerRegisterZMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vgetmantps_zmm_k1z_zmmm512b32_imm8_sae, register, in memory, imm), dst.Flags | src1.Flags);
		}

		public void vgetmantps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vgetmantps_xmm_k1z_xmmm128b32_imm8, (Register)dst, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vgetmantps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vgetmantps_ymm_k1z_ymmm256b32_imm8, (Register)dst, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vgetmantps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vgetmantps_zmm_k1z_zmmm512b32_imm8_sae, (Register)dst, (Register)src1, (uint)imm), dst.Flags | src1.Flags);
		}

		public void vgetmantps(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vgetmantps_xmm_k1z_xmmm128b32_imm8, register, in memory, (uint)imm), dst.Flags | src1.Flags);
		}

		public void vgetmantps(AssemblerRegisterYMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vgetmantps_ymm_k1z_ymmm256b32_imm8, register, in memory, (uint)imm), dst.Flags | src1.Flags);
		}

		public void vgetmantps(AssemblerRegisterZMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vgetmantps_zmm_k1z_zmmm512b32_imm8_sae, register, in memory, (uint)imm), dst.Flags | src1.Flags);
		}

		public void vgetmantsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vgetmantsd_xmm_k1z_xmm_xmmm64_imm8_sae, dst, src1, src2, imm), dst.Flags | src2.Flags);
		}

		public void vgetmantsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vgetmantsd_xmm_k1z_xmm_xmmm64_imm8_sae, register, register2, in memory, imm), dst.Flags | src2.Flags);
		}

		public void vgetmantsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vgetmantsd_xmm_k1z_xmm_xmmm64_imm8_sae, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vgetmantsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vgetmantsd_xmm_k1z_xmm_xmmm64_imm8_sae, register, register2, in memory, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vgetmantsh(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vgetmantsh_xmm_k1z_xmm_xmmm16_imm8_sae, dst, src1, src2, imm), dst.Flags | src2.Flags);
		}

		public void vgetmantsh(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vgetmantsh_xmm_k1z_xmm_xmmm16_imm8_sae, register, register2, in memory, imm), dst.Flags | src2.Flags);
		}

		public void vgetmantsh(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vgetmantsh_xmm_k1z_xmm_xmmm16_imm8_sae, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vgetmantsh(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vgetmantsh_xmm_k1z_xmm_xmmm16_imm8_sae, register, register2, in memory, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vgetmantss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vgetmantss_xmm_k1z_xmm_xmmm32_imm8_sae, dst, src1, src2, imm), dst.Flags | src2.Flags);
		}

		public void vgetmantss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vgetmantss_xmm_k1z_xmm_xmmm32_imm8_sae, register, register2, in memory, imm), dst.Flags | src2.Flags);
		}

		public void vgetmantss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vgetmantss_xmm_k1z_xmm_xmmm32_imm8_sae, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vgetmantss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vgetmantss_xmm_k1z_xmm_xmmm32_imm8_sae, register, register2, in memory, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vgf2p8affineinvqb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, sbyte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vgf2p8affineinvqb_xmm_xmm_xmmm128_imm8 : Code.EVEX_Vgf2p8affineinvqb_xmm_k1z_xmm_xmmm128b64_imm8);
			AddInstruction(Instruction.Create(code, dst, src1, src2, imm), dst.Flags);
		}

		public void vgf2p8affineinvqb(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, sbyte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vgf2p8affineinvqb_ymm_ymm_ymmm256_imm8 : Code.EVEX_Vgf2p8affineinvqb_ymm_k1z_ymm_ymmm256b64_imm8);
			AddInstruction(Instruction.Create(code, dst, src1, src2, imm), dst.Flags);
		}

		public void vgf2p8affineinvqb(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vgf2p8affineinvqb_zmm_k1z_zmm_zmmm512b64_imm8, dst, src1, src2, imm), dst.Flags);
		}

		public void vgf2p8affineinvqb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vgf2p8affineinvqb_xmm_xmm_xmmm128_imm8 : Code.EVEX_Vgf2p8affineinvqb_xmm_k1z_xmm_xmmm128b64_imm8) : Code.EVEX_Vgf2p8affineinvqb_xmm_k1z_xmm_xmmm128b64_imm8);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory, imm), dst.Flags | src2.Flags);
		}

		public void vgf2p8affineinvqb(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vgf2p8affineinvqb_ymm_ymm_ymmm256_imm8 : Code.EVEX_Vgf2p8affineinvqb_ymm_k1z_ymm_ymmm256b64_imm8) : Code.EVEX_Vgf2p8affineinvqb_ymm_k1z_ymm_ymmm256b64_imm8);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory, imm), dst.Flags | src2.Flags);
		}

		public void vgf2p8affineinvqb(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vgf2p8affineinvqb_zmm_k1z_zmm_zmmm512b64_imm8, register, register2, in memory, imm), dst.Flags | src2.Flags);
		}

		public void vgf2p8affineinvqb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, byte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vgf2p8affineinvqb_xmm_xmm_xmmm128_imm8 : Code.EVEX_Vgf2p8affineinvqb_xmm_k1z_xmm_xmmm128b64_imm8);
			AddInstruction(Instruction.Create(code, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags);
		}

		public void vgf2p8affineinvqb(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, byte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vgf2p8affineinvqb_ymm_ymm_ymmm256_imm8 : Code.EVEX_Vgf2p8affineinvqb_ymm_k1z_ymm_ymmm256b64_imm8);
			AddInstruction(Instruction.Create(code, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags);
		}

		public void vgf2p8affineinvqb(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vgf2p8affineinvqb_zmm_k1z_zmm_zmmm512b64_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags);
		}

		public void vgf2p8affineinvqb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vgf2p8affineinvqb_xmm_xmm_xmmm128_imm8 : Code.EVEX_Vgf2p8affineinvqb_xmm_k1z_xmm_xmmm128b64_imm8) : Code.EVEX_Vgf2p8affineinvqb_xmm_k1z_xmm_xmmm128b64_imm8);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vgf2p8affineinvqb(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vgf2p8affineinvqb_ymm_ymm_ymmm256_imm8 : Code.EVEX_Vgf2p8affineinvqb_ymm_k1z_ymm_ymmm256b64_imm8) : Code.EVEX_Vgf2p8affineinvqb_ymm_k1z_ymm_ymmm256b64_imm8);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vgf2p8affineinvqb(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vgf2p8affineinvqb_zmm_k1z_zmm_zmmm512b64_imm8, register, register2, in memory, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vgf2p8affineqb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, sbyte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vgf2p8affineqb_xmm_xmm_xmmm128_imm8 : Code.EVEX_Vgf2p8affineqb_xmm_k1z_xmm_xmmm128b64_imm8);
			AddInstruction(Instruction.Create(code, dst, src1, src2, imm), dst.Flags);
		}

		public void vgf2p8affineqb(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, sbyte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vgf2p8affineqb_ymm_ymm_ymmm256_imm8 : Code.EVEX_Vgf2p8affineqb_ymm_k1z_ymm_ymmm256b64_imm8);
			AddInstruction(Instruction.Create(code, dst, src1, src2, imm), dst.Flags);
		}

		public void vgf2p8affineqb(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vgf2p8affineqb_zmm_k1z_zmm_zmmm512b64_imm8, dst, src1, src2, imm), dst.Flags);
		}

		public void vgf2p8affineqb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vgf2p8affineqb_xmm_xmm_xmmm128_imm8 : Code.EVEX_Vgf2p8affineqb_xmm_k1z_xmm_xmmm128b64_imm8) : Code.EVEX_Vgf2p8affineqb_xmm_k1z_xmm_xmmm128b64_imm8);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory, imm), dst.Flags | src2.Flags);
		}

		public void vgf2p8affineqb(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vgf2p8affineqb_ymm_ymm_ymmm256_imm8 : Code.EVEX_Vgf2p8affineqb_ymm_k1z_ymm_ymmm256b64_imm8) : Code.EVEX_Vgf2p8affineqb_ymm_k1z_ymm_ymmm256b64_imm8);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory, imm), dst.Flags | src2.Flags);
		}

		public void vgf2p8affineqb(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vgf2p8affineqb_zmm_k1z_zmm_zmmm512b64_imm8, register, register2, in memory, imm), dst.Flags | src2.Flags);
		}

		public void vgf2p8affineqb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, byte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vgf2p8affineqb_xmm_xmm_xmmm128_imm8 : Code.EVEX_Vgf2p8affineqb_xmm_k1z_xmm_xmmm128b64_imm8);
			AddInstruction(Instruction.Create(code, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags);
		}

		public void vgf2p8affineqb(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, byte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vgf2p8affineqb_ymm_ymm_ymmm256_imm8 : Code.EVEX_Vgf2p8affineqb_ymm_k1z_ymm_ymmm256b64_imm8);
			AddInstruction(Instruction.Create(code, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags);
		}

		public void vgf2p8affineqb(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vgf2p8affineqb_zmm_k1z_zmm_zmmm512b64_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags);
		}

		public void vgf2p8affineqb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vgf2p8affineqb_xmm_xmm_xmmm128_imm8 : Code.EVEX_Vgf2p8affineqb_xmm_k1z_xmm_xmmm128b64_imm8) : Code.EVEX_Vgf2p8affineqb_xmm_k1z_xmm_xmmm128b64_imm8);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vgf2p8affineqb(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vgf2p8affineqb_ymm_ymm_ymmm256_imm8 : Code.EVEX_Vgf2p8affineqb_ymm_k1z_ymm_ymmm256b64_imm8) : Code.EVEX_Vgf2p8affineqb_ymm_k1z_ymm_ymmm256b64_imm8);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vgf2p8affineqb(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vgf2p8affineqb_zmm_k1z_zmm_zmmm512b64_imm8, register, register2, in memory, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vgf2p8mulb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vgf2p8mulb_xmm_xmm_xmmm128 : Code.EVEX_Vgf2p8mulb_xmm_k1z_xmm_xmmm128);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vgf2p8mulb(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vgf2p8mulb_ymm_ymm_ymmm256 : Code.EVEX_Vgf2p8mulb_ymm_k1z_ymm_ymmm256);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vgf2p8mulb(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vgf2p8mulb_zmm_k1z_zmm_zmmm512, dst, src1, src2), dst.Flags);
		}

		public void vgf2p8mulb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vgf2p8mulb_xmm_xmm_xmmm128 : Code.EVEX_Vgf2p8mulb_xmm_k1z_xmm_xmmm128);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags);
		}

		public void vgf2p8mulb(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vgf2p8mulb_ymm_ymm_ymmm256 : Code.EVEX_Vgf2p8mulb_ymm_k1z_ymm_ymmm256);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags);
		}

		public void vgf2p8mulb(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vgf2p8mulb_zmm_k1z_zmm_zmmm512, register, register2, in memory), dst.Flags);
		}

		public void vhaddpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vhaddpd_xmm_xmm_xmmm128, dst, src1, src2));
		}

		public void vhaddpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vhaddpd_ymm_ymm_ymmm256, dst, src1, src2));
		}

		public void vhaddpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vhaddpd_xmm_xmm_xmmm128, register, register2, in memory));
		}

		public void vhaddpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vhaddpd_ymm_ymm_ymmm256, register, register2, in memory));
		}

		public void vhaddps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vhaddps_xmm_xmm_xmmm128, dst, src1, src2));
		}

		public void vhaddps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vhaddps_ymm_ymm_ymmm256, dst, src1, src2));
		}

		public void vhaddps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vhaddps_xmm_xmm_xmmm128, register, register2, in memory));
		}

		public void vhaddps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vhaddps_ymm_ymm_ymmm256, register, register2, in memory));
		}

		public void vhsubpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vhsubpd_xmm_xmm_xmmm128, dst, src1, src2));
		}

		public void vhsubpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vhsubpd_ymm_ymm_ymmm256, dst, src1, src2));
		}

		public void vhsubpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vhsubpd_xmm_xmm_xmmm128, register, register2, in memory));
		}

		public void vhsubpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vhsubpd_ymm_ymm_ymmm256, register, register2, in memory));
		}

		public void vhsubps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vhsubps_xmm_xmm_xmmm128, dst, src1, src2));
		}

		public void vhsubps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vhsubps_ymm_ymm_ymmm256, dst, src1, src2));
		}

		public void vhsubps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vhsubps_xmm_xmm_xmmm128, register, register2, in memory));
		}

		public void vhsubps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vhsubps_ymm_ymm_ymmm256, register, register2, in memory));
		}

		public void vinsertf128(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterXMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vinsertf128_ymm_ymm_xmmm128_imm8, dst, src1, src2, imm));
		}

		public void vinsertf128(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vinsertf128_ymm_ymm_xmmm128_imm8, register, register2, in memory, imm));
		}

		public void vinsertf128(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterXMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vinsertf128_ymm_ymm_xmmm128_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm));
		}

		public void vinsertf128(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vinsertf128_ymm_ymm_xmmm128_imm8, register, register2, in memory, (uint)imm));
		}

		public void vinsertf32x4(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterXMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vinsertf32x4_ymm_k1z_ymm_xmmm128_imm8, dst, src1, src2, imm), dst.Flags);
		}

		public void vinsertf32x4(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterXMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vinsertf32x4_zmm_k1z_zmm_xmmm128_imm8, dst, src1, src2, imm), dst.Flags);
		}

		public void vinsertf32x4(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vinsertf32x4_ymm_k1z_ymm_xmmm128_imm8, register, register2, in memory, imm), dst.Flags);
		}

		public void vinsertf32x4(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vinsertf32x4_zmm_k1z_zmm_xmmm128_imm8, register, register2, in memory, imm), dst.Flags);
		}

		public void vinsertf32x4(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterXMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vinsertf32x4_ymm_k1z_ymm_xmmm128_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags);
		}

		public void vinsertf32x4(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterXMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vinsertf32x4_zmm_k1z_zmm_xmmm128_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags);
		}

		public void vinsertf32x4(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vinsertf32x4_ymm_k1z_ymm_xmmm128_imm8, register, register2, in memory, (uint)imm), dst.Flags);
		}

		public void vinsertf32x4(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vinsertf32x4_zmm_k1z_zmm_xmmm128_imm8, register, register2, in memory, (uint)imm), dst.Flags);
		}

		public void vinsertf32x8(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterYMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vinsertf32x8_zmm_k1z_zmm_ymmm256_imm8, dst, src1, src2, imm), dst.Flags);
		}

		public void vinsertf32x8(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vinsertf32x8_zmm_k1z_zmm_ymmm256_imm8, register, register2, in memory, imm), dst.Flags);
		}

		public void vinsertf32x8(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterYMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vinsertf32x8_zmm_k1z_zmm_ymmm256_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags);
		}

		public void vinsertf32x8(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vinsertf32x8_zmm_k1z_zmm_ymmm256_imm8, register, register2, in memory, (uint)imm), dst.Flags);
		}

		public void vinsertf64x2(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterXMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vinsertf64x2_ymm_k1z_ymm_xmmm128_imm8, dst, src1, src2, imm), dst.Flags);
		}

		public void vinsertf64x2(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterXMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vinsertf64x2_zmm_k1z_zmm_xmmm128_imm8, dst, src1, src2, imm), dst.Flags);
		}

		public void vinsertf64x2(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vinsertf64x2_ymm_k1z_ymm_xmmm128_imm8, register, register2, in memory, imm), dst.Flags);
		}

		public void vinsertf64x2(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vinsertf64x2_zmm_k1z_zmm_xmmm128_imm8, register, register2, in memory, imm), dst.Flags);
		}

		public void vinsertf64x2(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterXMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vinsertf64x2_ymm_k1z_ymm_xmmm128_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags);
		}

		public void vinsertf64x2(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterXMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vinsertf64x2_zmm_k1z_zmm_xmmm128_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags);
		}

		public void vinsertf64x2(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vinsertf64x2_ymm_k1z_ymm_xmmm128_imm8, register, register2, in memory, (uint)imm), dst.Flags);
		}

		public void vinsertf64x2(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vinsertf64x2_zmm_k1z_zmm_xmmm128_imm8, register, register2, in memory, (uint)imm), dst.Flags);
		}

		public void vinsertf64x4(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterYMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vinsertf64x4_zmm_k1z_zmm_ymmm256_imm8, dst, src1, src2, imm), dst.Flags);
		}

		public void vinsertf64x4(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vinsertf64x4_zmm_k1z_zmm_ymmm256_imm8, register, register2, in memory, imm), dst.Flags);
		}

		public void vinsertf64x4(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterYMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vinsertf64x4_zmm_k1z_zmm_ymmm256_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags);
		}

		public void vinsertf64x4(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vinsertf64x4_zmm_k1z_zmm_ymmm256_imm8, register, register2, in memory, (uint)imm), dst.Flags);
		}

		public void vinserti128(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterXMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vinserti128_ymm_ymm_xmmm128_imm8, dst, src1, src2, imm));
		}

		public void vinserti128(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vinserti128_ymm_ymm_xmmm128_imm8, register, register2, in memory, imm));
		}

		public void vinserti128(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterXMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vinserti128_ymm_ymm_xmmm128_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm));
		}

		public void vinserti128(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vinserti128_ymm_ymm_xmmm128_imm8, register, register2, in memory, (uint)imm));
		}

		public void vinserti32x4(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterXMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vinserti32x4_ymm_k1z_ymm_xmmm128_imm8, dst, src1, src2, imm), dst.Flags);
		}

		public void vinserti32x4(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterXMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vinserti32x4_zmm_k1z_zmm_xmmm128_imm8, dst, src1, src2, imm), dst.Flags);
		}

		public void vinserti32x4(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vinserti32x4_ymm_k1z_ymm_xmmm128_imm8, register, register2, in memory, imm), dst.Flags);
		}

		public void vinserti32x4(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vinserti32x4_zmm_k1z_zmm_xmmm128_imm8, register, register2, in memory, imm), dst.Flags);
		}

		public void vinserti32x4(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterXMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vinserti32x4_ymm_k1z_ymm_xmmm128_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags);
		}

		public void vinserti32x4(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterXMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vinserti32x4_zmm_k1z_zmm_xmmm128_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags);
		}

		public void vinserti32x4(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vinserti32x4_ymm_k1z_ymm_xmmm128_imm8, register, register2, in memory, (uint)imm), dst.Flags);
		}

		public void vinserti32x4(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vinserti32x4_zmm_k1z_zmm_xmmm128_imm8, register, register2, in memory, (uint)imm), dst.Flags);
		}

		public void vinserti32x8(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterYMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vinserti32x8_zmm_k1z_zmm_ymmm256_imm8, dst, src1, src2, imm), dst.Flags);
		}

		public void vinserti32x8(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vinserti32x8_zmm_k1z_zmm_ymmm256_imm8, register, register2, in memory, imm), dst.Flags);
		}

		public void vinserti32x8(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterYMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vinserti32x8_zmm_k1z_zmm_ymmm256_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags);
		}

		public void vinserti32x8(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vinserti32x8_zmm_k1z_zmm_ymmm256_imm8, register, register2, in memory, (uint)imm), dst.Flags);
		}

		public void vinserti64x2(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterXMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vinserti64x2_ymm_k1z_ymm_xmmm128_imm8, dst, src1, src2, imm), dst.Flags);
		}

		public void vinserti64x2(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterXMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vinserti64x2_zmm_k1z_zmm_xmmm128_imm8, dst, src1, src2, imm), dst.Flags);
		}

		public void vinserti64x2(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vinserti64x2_ymm_k1z_ymm_xmmm128_imm8, register, register2, in memory, imm), dst.Flags);
		}

		public void vinserti64x2(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vinserti64x2_zmm_k1z_zmm_xmmm128_imm8, register, register2, in memory, imm), dst.Flags);
		}

		public void vinserti64x2(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterXMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vinserti64x2_ymm_k1z_ymm_xmmm128_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags);
		}

		public void vinserti64x2(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterXMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vinserti64x2_zmm_k1z_zmm_xmmm128_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags);
		}

		public void vinserti64x2(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vinserti64x2_ymm_k1z_ymm_xmmm128_imm8, register, register2, in memory, (uint)imm), dst.Flags);
		}

		public void vinserti64x2(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vinserti64x2_zmm_k1z_zmm_xmmm128_imm8, register, register2, in memory, (uint)imm), dst.Flags);
		}

		public void vinserti64x4(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterYMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vinserti64x4_zmm_k1z_zmm_ymmm256_imm8, dst, src1, src2, imm), dst.Flags);
		}

		public void vinserti64x4(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vinserti64x4_zmm_k1z_zmm_ymmm256_imm8, register, register2, in memory, imm), dst.Flags);
		}

		public void vinserti64x4(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterYMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vinserti64x4_zmm_k1z_zmm_ymmm256_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags);
		}

		public void vinserti64x4(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vinserti64x4_zmm_k1z_zmm_ymmm256_imm8, register, register2, in memory, (uint)imm), dst.Flags);
		}

		public void vinsertps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, sbyte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vinsertps_xmm_xmm_xmmm32_imm8 : Code.EVEX_Vinsertps_xmm_xmm_xmmm32_imm8);
			AddInstruction(Instruction.Create(code, dst, src1, src2, imm));
		}

		public void vinsertps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vinsertps_xmm_xmm_xmmm32_imm8 : Code.EVEX_Vinsertps_xmm_xmm_xmmm32_imm8);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory, imm));
		}

		public void vinsertps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, byte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vinsertps_xmm_xmm_xmmm32_imm8 : Code.EVEX_Vinsertps_xmm_xmm_xmmm32_imm8);
			AddInstruction(Instruction.Create(code, (Register)dst, (Register)src1, (Register)src2, (uint)imm));
		}

		public void vinsertps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vinsertps_xmm_xmm_xmmm32_imm8 : Code.EVEX_Vinsertps_xmm_xmm_xmmm32_imm8);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory, (uint)imm));
		}

		public void vlddqu(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vlddqu_xmm_m128, register, in memory));
		}

		public void vlddqu(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vlddqu_ymm_m256, register, in memory));
		}

		public void vldmxcsr(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vldmxcsr_m32, in memory));
		}

		public void vmaskmovdqu(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.CreateVmaskmovdqu(Bitness, dst, src));
		}

		public void vmaskmovpd(AssemblerMemoryOperand dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vmaskmovpd_m128_xmm_xmm, in memory, src1, src2));
		}

		public void vmaskmovpd(AssemblerMemoryOperand dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vmaskmovpd_m256_ymm_ymm, in memory, src1, src2));
		}

		public void vmaskmovpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vmaskmovpd_xmm_xmm_m128, register, register2, in memory));
		}

		public void vmaskmovpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vmaskmovpd_ymm_ymm_m256, register, register2, in memory));
		}

		public void vmaskmovps(AssemblerMemoryOperand dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vmaskmovps_m128_xmm_xmm, in memory, src1, src2));
		}

		public void vmaskmovps(AssemblerMemoryOperand dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vmaskmovps_m256_ymm_ymm, in memory, src1, src2));
		}

		public void vmaskmovps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vmaskmovps_xmm_xmm_m128, register, register2, in memory));
		}

		public void vmaskmovps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vmaskmovps_ymm_ymm_m256, register, register2, in memory));
		}

		public void vmaxpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vmaxpd_xmm_xmm_xmmm128 : Code.EVEX_Vmaxpd_xmm_k1z_xmm_xmmm128b64);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vmaxpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vmaxpd_ymm_ymm_ymmm256 : Code.EVEX_Vmaxpd_ymm_k1z_ymm_ymmm256b64);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vmaxpd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vmaxpd_zmm_k1z_zmm_zmmm512b64_sae, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vmaxpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vmaxpd_xmm_xmm_xmmm128 : Code.EVEX_Vmaxpd_xmm_k1z_xmm_xmmm128b64) : Code.EVEX_Vmaxpd_xmm_k1z_xmm_xmmm128b64);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vmaxpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vmaxpd_ymm_ymm_ymmm256 : Code.EVEX_Vmaxpd_ymm_k1z_ymm_ymmm256b64) : Code.EVEX_Vmaxpd_ymm_k1z_ymm_ymmm256b64);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vmaxpd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vmaxpd_zmm_k1z_zmm_zmmm512b64_sae, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vmaxph(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vmaxph_xmm_k1z_xmm_xmmm128b16, dst, src1, src2), dst.Flags);
		}

		public void vmaxph(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vmaxph_ymm_k1z_ymm_ymmm256b16, dst, src1, src2), dst.Flags);
		}

		public void vmaxph(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vmaxph_zmm_k1z_zmm_zmmm512b16_sae, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vmaxph(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vmaxph_xmm_k1z_xmm_xmmm128b16, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vmaxph(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vmaxph_ymm_k1z_ymm_ymmm256b16, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vmaxph(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vmaxph_zmm_k1z_zmm_zmmm512b16_sae, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vmaxps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vmaxps_xmm_xmm_xmmm128 : Code.EVEX_Vmaxps_xmm_k1z_xmm_xmmm128b32);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vmaxps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vmaxps_ymm_ymm_ymmm256 : Code.EVEX_Vmaxps_ymm_k1z_ymm_ymmm256b32);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vmaxps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vmaxps_zmm_k1z_zmm_zmmm512b32_sae, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vmaxps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vmaxps_xmm_xmm_xmmm128 : Code.EVEX_Vmaxps_xmm_k1z_xmm_xmmm128b32) : Code.EVEX_Vmaxps_xmm_k1z_xmm_xmmm128b32);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vmaxps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vmaxps_ymm_ymm_ymmm256 : Code.EVEX_Vmaxps_ymm_k1z_ymm_ymmm256b32) : Code.EVEX_Vmaxps_ymm_k1z_ymm_ymmm256b32);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vmaxps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vmaxps_zmm_k1z_zmm_zmmm512b32_sae, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vmaxsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vmaxsd_xmm_xmm_xmmm64 : Code.EVEX_Vmaxsd_xmm_k1z_xmm_xmmm64_sae);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vmaxsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vmaxsd_xmm_xmm_xmmm64 : Code.EVEX_Vmaxsd_xmm_k1z_xmm_xmmm64_sae);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vmaxsh(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vmaxsh_xmm_k1z_xmm_xmmm16_sae, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vmaxsh(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vmaxsh_xmm_k1z_xmm_xmmm16_sae, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vmaxss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vmaxss_xmm_xmm_xmmm32 : Code.EVEX_Vmaxss_xmm_k1z_xmm_xmmm32_sae);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vmaxss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vmaxss_xmm_xmm_xmmm32 : Code.EVEX_Vmaxss_xmm_k1z_xmm_xmmm32_sae);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vmcall()
		{
			AddInstruction(Instruction.Create(Code.Vmcall));
		}

		public void vmclear(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Vmclear_m64, in memory));
		}

		public void vmfunc()
		{
			AddInstruction(Instruction.Create(Code.Vmfunc));
		}

		public void vmgexit()
		{
			AddInstruction(Instruction.Create(Code.Vmgexit));
		}

		public void vminpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vminpd_xmm_xmm_xmmm128 : Code.EVEX_Vminpd_xmm_k1z_xmm_xmmm128b64);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vminpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vminpd_ymm_ymm_ymmm256 : Code.EVEX_Vminpd_ymm_k1z_ymm_ymmm256b64);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vminpd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vminpd_zmm_k1z_zmm_zmmm512b64_sae, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vminpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vminpd_xmm_xmm_xmmm128 : Code.EVEX_Vminpd_xmm_k1z_xmm_xmmm128b64) : Code.EVEX_Vminpd_xmm_k1z_xmm_xmmm128b64);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vminpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vminpd_ymm_ymm_ymmm256 : Code.EVEX_Vminpd_ymm_k1z_ymm_ymmm256b64) : Code.EVEX_Vminpd_ymm_k1z_ymm_ymmm256b64);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vminpd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vminpd_zmm_k1z_zmm_zmmm512b64_sae, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vminph(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vminph_xmm_k1z_xmm_xmmm128b16, dst, src1, src2), dst.Flags);
		}

		public void vminph(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vminph_ymm_k1z_ymm_ymmm256b16, dst, src1, src2), dst.Flags);
		}

		public void vminph(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vminph_zmm_k1z_zmm_zmmm512b16_sae, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vminph(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vminph_xmm_k1z_xmm_xmmm128b16, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vminph(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vminph_ymm_k1z_ymm_ymmm256b16, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vminph(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vminph_zmm_k1z_zmm_zmmm512b16_sae, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vminps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vminps_xmm_xmm_xmmm128 : Code.EVEX_Vminps_xmm_k1z_xmm_xmmm128b32);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vminps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vminps_ymm_ymm_ymmm256 : Code.EVEX_Vminps_ymm_k1z_ymm_ymmm256b32);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vminps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vminps_zmm_k1z_zmm_zmmm512b32_sae, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vminps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vminps_xmm_xmm_xmmm128 : Code.EVEX_Vminps_xmm_k1z_xmm_xmmm128b32) : Code.EVEX_Vminps_xmm_k1z_xmm_xmmm128b32);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vminps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vminps_ymm_ymm_ymmm256 : Code.EVEX_Vminps_ymm_k1z_ymm_ymmm256b32) : Code.EVEX_Vminps_ymm_k1z_ymm_ymmm256b32);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vminps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vminps_zmm_k1z_zmm_zmmm512b32_sae, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vminsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vminsd_xmm_xmm_xmmm64 : Code.EVEX_Vminsd_xmm_k1z_xmm_xmmm64_sae);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vminsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vminsd_xmm_xmm_xmmm64 : Code.EVEX_Vminsd_xmm_k1z_xmm_xmmm64_sae);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vminsh(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vminsh_xmm_k1z_xmm_xmmm16_sae, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vminsh(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vminsh_xmm_k1z_xmm_xmmm16_sae, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vminss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vminss_xmm_xmm_xmmm32 : Code.EVEX_Vminss_xmm_k1z_xmm_xmmm32_sae);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vminss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vminss_xmm_xmm_xmmm32 : Code.EVEX_Vminss_xmm_k1z_xmm_xmmm32_sae);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vmlaunch()
		{
			AddInstruction(Instruction.Create(Code.Vmlaunch));
		}

		public void vmload()
		{
			Code code = ((Bitness != 64) ? ((Bitness >= 32) ? Code.Vmloadd : Code.Vmloadw) : Code.Vmloadq);
			AddInstruction(Instruction.Create(code));
		}

		public void vmmcall()
		{
			AddInstruction(Instruction.Create(Code.Vmmcall));
		}

		public void vmovapd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vmovapd_xmm_xmmm128 : Code.EVEX_Vmovapd_xmm_k1z_xmmm128);
			AddInstruction(Instruction.Create(code, dst, src), dst.Flags);
		}

		public void vmovapd(AssemblerMemoryOperand dst, AssemblerRegisterXMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vmovapd_xmmm128_xmm : Code.EVEX_Vmovapd_xmmm128_k1z_xmm);
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, in memory, src), dst.Flags);
		}

		public void vmovapd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vmovapd_ymm_ymmm256 : Code.EVEX_Vmovapd_ymm_k1z_ymmm256);
			AddInstruction(Instruction.Create(code, dst, src), dst.Flags);
		}

		public void vmovapd(AssemblerMemoryOperand dst, AssemblerRegisterYMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vmovapd_ymmm256_ymm : Code.EVEX_Vmovapd_ymmm256_k1z_ymm);
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, in memory, src), dst.Flags);
		}

		public void vmovapd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vmovapd_zmm_k1z_zmmm512, dst, src), dst.Flags);
		}

		public void vmovapd(AssemblerMemoryOperand dst, AssemblerRegisterZMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vmovapd_zmmm512_k1z_zmm, in memory, src), dst.Flags);
		}

		public void vmovapd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vmovapd_xmm_xmmm128 : Code.EVEX_Vmovapd_xmm_k1z_xmmm128);
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory), dst.Flags);
		}

		public void vmovapd(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vmovapd_ymm_ymmm256 : Code.EVEX_Vmovapd_ymm_k1z_ymmm256);
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory), dst.Flags);
		}

		public void vmovapd(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vmovapd_zmm_k1z_zmmm512, register, in memory), dst.Flags);
		}

		public void vmovaps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vmovaps_xmm_xmmm128 : Code.EVEX_Vmovaps_xmm_k1z_xmmm128);
			AddInstruction(Instruction.Create(code, dst, src), dst.Flags);
		}

		public void vmovaps(AssemblerMemoryOperand dst, AssemblerRegisterXMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vmovaps_xmmm128_xmm : Code.EVEX_Vmovaps_xmmm128_k1z_xmm);
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, in memory, src), dst.Flags);
		}

		public void vmovaps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vmovaps_ymm_ymmm256 : Code.EVEX_Vmovaps_ymm_k1z_ymmm256);
			AddInstruction(Instruction.Create(code, dst, src), dst.Flags);
		}

		public void vmovaps(AssemblerMemoryOperand dst, AssemblerRegisterYMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vmovaps_ymmm256_ymm : Code.EVEX_Vmovaps_ymmm256_k1z_ymm);
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, in memory, src), dst.Flags);
		}

		public void vmovaps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vmovaps_zmm_k1z_zmmm512, dst, src), dst.Flags);
		}

		public void vmovaps(AssemblerMemoryOperand dst, AssemblerRegisterZMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vmovaps_zmmm512_k1z_zmm, in memory, src), dst.Flags);
		}

		public void vmovaps(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vmovaps_xmm_xmmm128 : Code.EVEX_Vmovaps_xmm_k1z_xmmm128);
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory), dst.Flags);
		}

		public void vmovaps(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vmovaps_ymm_ymmm256 : Code.EVEX_Vmovaps_ymm_k1z_ymmm256);
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory), dst.Flags);
		}

		public void vmovaps(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vmovaps_zmm_k1z_zmmm512, register, in memory), dst.Flags);
		}

		public void vmovd(AssemblerRegisterXMM dst, AssemblerRegister32 src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vmovd_xmm_rm32 : Code.EVEX_Vmovd_xmm_rm32);
			AddInstruction(Instruction.Create(code, dst, src));
		}

		public void vmovd(AssemblerRegister32 dst, AssemblerRegisterXMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vmovd_rm32_xmm : Code.EVEX_Vmovd_rm32_xmm);
			AddInstruction(Instruction.Create(code, dst, src));
		}

		public void vmovd(AssemblerMemoryOperand dst, AssemblerRegisterXMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vmovd_rm32_xmm : Code.EVEX_Vmovd_rm32_xmm);
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, in memory, src));
		}

		public void vmovd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vmovd_xmm_rm32 : Code.EVEX_Vmovd_xmm_rm32);
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory));
		}

		public void vmovddup(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vmovddup_xmm_xmmm64 : Code.EVEX_Vmovddup_xmm_k1z_xmmm64);
			AddInstruction(Instruction.Create(code, dst, src), dst.Flags);
		}

		public void vmovddup(AssemblerRegisterYMM dst, AssemblerRegisterYMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vmovddup_ymm_ymmm256 : Code.EVEX_Vmovddup_ymm_k1z_ymmm256);
			AddInstruction(Instruction.Create(code, dst, src), dst.Flags);
		}

		public void vmovddup(AssemblerRegisterZMM dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vmovddup_zmm_k1z_zmmm512, dst, src), dst.Flags);
		}

		public void vmovddup(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vmovddup_xmm_xmmm64 : Code.EVEX_Vmovddup_xmm_k1z_xmmm64);
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory), dst.Flags);
		}

		public void vmovddup(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vmovddup_ymm_ymmm256 : Code.EVEX_Vmovddup_ymm_k1z_ymmm256);
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory), dst.Flags);
		}

		public void vmovddup(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vmovddup_zmm_k1z_zmmm512, register, in memory), dst.Flags);
		}

		public void vmovdqa(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vmovdqa_xmm_xmmm128, dst, src));
		}

		public void vmovdqa(AssemblerMemoryOperand dst, AssemblerRegisterXMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vmovdqa_xmmm128_xmm, in memory, src));
		}

		public void vmovdqa(AssemblerRegisterYMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vmovdqa_ymm_ymmm256, dst, src));
		}

		public void vmovdqa(AssemblerMemoryOperand dst, AssemblerRegisterYMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vmovdqa_ymmm256_ymm, in memory, src));
		}

		public void vmovdqa(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vmovdqa_xmm_xmmm128, register, in memory));
		}

		public void vmovdqa(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vmovdqa_ymm_ymmm256, register, in memory));
		}

		public void vmovdqa32(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vmovdqa32_xmm_k1z_xmmm128, dst, src), dst.Flags);
		}

		public void vmovdqa32(AssemblerMemoryOperand dst, AssemblerRegisterXMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vmovdqa32_xmmm128_k1z_xmm, in memory, src), dst.Flags);
		}

		public void vmovdqa32(AssemblerRegisterYMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vmovdqa32_ymm_k1z_ymmm256, dst, src), dst.Flags);
		}

		public void vmovdqa32(AssemblerMemoryOperand dst, AssemblerRegisterYMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vmovdqa32_ymmm256_k1z_ymm, in memory, src), dst.Flags);
		}

		public void vmovdqa32(AssemblerRegisterZMM dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vmovdqa32_zmm_k1z_zmmm512, dst, src), dst.Flags);
		}

		public void vmovdqa32(AssemblerMemoryOperand dst, AssemblerRegisterZMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vmovdqa32_zmmm512_k1z_zmm, in memory, src), dst.Flags);
		}

		public void vmovdqa32(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vmovdqa32_xmm_k1z_xmmm128, register, in memory), dst.Flags);
		}

		public void vmovdqa32(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vmovdqa32_ymm_k1z_ymmm256, register, in memory), dst.Flags);
		}

		public void vmovdqa32(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vmovdqa32_zmm_k1z_zmmm512, register, in memory), dst.Flags);
		}

		public void vmovdqa64(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vmovdqa64_xmm_k1z_xmmm128, dst, src), dst.Flags);
		}

		public void vmovdqa64(AssemblerMemoryOperand dst, AssemblerRegisterXMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vmovdqa64_xmmm128_k1z_xmm, in memory, src), dst.Flags);
		}

		public void vmovdqa64(AssemblerRegisterYMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vmovdqa64_ymm_k1z_ymmm256, dst, src), dst.Flags);
		}

		public void vmovdqa64(AssemblerMemoryOperand dst, AssemblerRegisterYMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vmovdqa64_ymmm256_k1z_ymm, in memory, src), dst.Flags);
		}

		public void vmovdqa64(AssemblerRegisterZMM dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vmovdqa64_zmm_k1z_zmmm512, dst, src), dst.Flags);
		}

		public void vmovdqa64(AssemblerMemoryOperand dst, AssemblerRegisterZMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vmovdqa64_zmmm512_k1z_zmm, in memory, src), dst.Flags);
		}

		public void vmovdqa64(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vmovdqa64_xmm_k1z_xmmm128, register, in memory), dst.Flags);
		}

		public void vmovdqa64(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vmovdqa64_ymm_k1z_ymmm256, register, in memory), dst.Flags);
		}

		public void vmovdqa64(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vmovdqa64_zmm_k1z_zmmm512, register, in memory), dst.Flags);
		}

		public void vmovdqu(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vmovdqu_xmm_xmmm128, dst, src));
		}

		public void vmovdqu(AssemblerMemoryOperand dst, AssemblerRegisterXMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vmovdqu_xmmm128_xmm, in memory, src));
		}

		public void vmovdqu(AssemblerRegisterYMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vmovdqu_ymm_ymmm256, dst, src));
		}

		public void vmovdqu(AssemblerMemoryOperand dst, AssemblerRegisterYMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vmovdqu_ymmm256_ymm, in memory, src));
		}

		public void vmovdqu(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vmovdqu_xmm_xmmm128, register, in memory));
		}

		public void vmovdqu(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vmovdqu_ymm_ymmm256, register, in memory));
		}

		public void vmovdqu16(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vmovdqu16_xmm_k1z_xmmm128, dst, src), dst.Flags);
		}

		public void vmovdqu16(AssemblerMemoryOperand dst, AssemblerRegisterXMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vmovdqu16_xmmm128_k1z_xmm, in memory, src), dst.Flags);
		}

		public void vmovdqu16(AssemblerRegisterYMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vmovdqu16_ymm_k1z_ymmm256, dst, src), dst.Flags);
		}

		public void vmovdqu16(AssemblerMemoryOperand dst, AssemblerRegisterYMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vmovdqu16_ymmm256_k1z_ymm, in memory, src), dst.Flags);
		}

		public void vmovdqu16(AssemblerRegisterZMM dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vmovdqu16_zmm_k1z_zmmm512, dst, src), dst.Flags);
		}

		public void vmovdqu16(AssemblerMemoryOperand dst, AssemblerRegisterZMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vmovdqu16_zmmm512_k1z_zmm, in memory, src), dst.Flags);
		}

		public void vmovdqu16(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vmovdqu16_xmm_k1z_xmmm128, register, in memory), dst.Flags);
		}

		public void vmovdqu16(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vmovdqu16_ymm_k1z_ymmm256, register, in memory), dst.Flags);
		}

		public void vmovdqu16(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vmovdqu16_zmm_k1z_zmmm512, register, in memory), dst.Flags);
		}

		public void vmovdqu32(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vmovdqu32_xmm_k1z_xmmm128, dst, src), dst.Flags);
		}

		public void vmovdqu32(AssemblerMemoryOperand dst, AssemblerRegisterXMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vmovdqu32_xmmm128_k1z_xmm, in memory, src), dst.Flags);
		}

		public void vmovdqu32(AssemblerRegisterYMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vmovdqu32_ymm_k1z_ymmm256, dst, src), dst.Flags);
		}

		public void vmovdqu32(AssemblerMemoryOperand dst, AssemblerRegisterYMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vmovdqu32_ymmm256_k1z_ymm, in memory, src), dst.Flags);
		}

		public void vmovdqu32(AssemblerRegisterZMM dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vmovdqu32_zmm_k1z_zmmm512, dst, src), dst.Flags);
		}

		public void vmovdqu32(AssemblerMemoryOperand dst, AssemblerRegisterZMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vmovdqu32_zmmm512_k1z_zmm, in memory, src), dst.Flags);
		}

		public void vmovdqu32(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vmovdqu32_xmm_k1z_xmmm128, register, in memory), dst.Flags);
		}

		public void vmovdqu32(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vmovdqu32_ymm_k1z_ymmm256, register, in memory), dst.Flags);
		}

		public void vmovdqu32(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vmovdqu32_zmm_k1z_zmmm512, register, in memory), dst.Flags);
		}

		public void vmovdqu64(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vmovdqu64_xmm_k1z_xmmm128, dst, src), dst.Flags);
		}

		public void vmovdqu64(AssemblerMemoryOperand dst, AssemblerRegisterXMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vmovdqu64_xmmm128_k1z_xmm, in memory, src), dst.Flags);
		}

		public void vmovdqu64(AssemblerRegisterYMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vmovdqu64_ymm_k1z_ymmm256, dst, src), dst.Flags);
		}

		public void vmovdqu64(AssemblerMemoryOperand dst, AssemblerRegisterYMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vmovdqu64_ymmm256_k1z_ymm, in memory, src), dst.Flags);
		}

		public void vmovdqu64(AssemblerRegisterZMM dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vmovdqu64_zmm_k1z_zmmm512, dst, src), dst.Flags);
		}

		public void vmovdqu64(AssemblerMemoryOperand dst, AssemblerRegisterZMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vmovdqu64_zmmm512_k1z_zmm, in memory, src), dst.Flags);
		}

		public void vmovdqu64(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vmovdqu64_xmm_k1z_xmmm128, register, in memory), dst.Flags);
		}

		public void vmovdqu64(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vmovdqu64_ymm_k1z_ymmm256, register, in memory), dst.Flags);
		}

		public void vmovdqu64(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vmovdqu64_zmm_k1z_zmmm512, register, in memory), dst.Flags);
		}

		public void vmovdqu8(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vmovdqu8_xmm_k1z_xmmm128, dst, src), dst.Flags);
		}

		public void vmovdqu8(AssemblerMemoryOperand dst, AssemblerRegisterXMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vmovdqu8_xmmm128_k1z_xmm, in memory, src), dst.Flags);
		}

		public void vmovdqu8(AssemblerRegisterYMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vmovdqu8_ymm_k1z_ymmm256, dst, src), dst.Flags);
		}

		public void vmovdqu8(AssemblerMemoryOperand dst, AssemblerRegisterYMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vmovdqu8_ymmm256_k1z_ymm, in memory, src), dst.Flags);
		}

		public void vmovdqu8(AssemblerRegisterZMM dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vmovdqu8_zmm_k1z_zmmm512, dst, src), dst.Flags);
		}

		public void vmovdqu8(AssemblerMemoryOperand dst, AssemblerRegisterZMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vmovdqu8_zmmm512_k1z_zmm, in memory, src), dst.Flags);
		}

		public void vmovdqu8(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vmovdqu8_xmm_k1z_xmmm128, register, in memory), dst.Flags);
		}

		public void vmovdqu8(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vmovdqu8_ymm_k1z_ymmm256, register, in memory), dst.Flags);
		}

		public void vmovdqu8(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vmovdqu8_zmm_k1z_zmmm512, register, in memory), dst.Flags);
		}

		public void vmovhlps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vmovhlps_xmm_xmm_xmm : Code.EVEX_Vmovhlps_xmm_xmm_xmm);
			AddInstruction(Instruction.Create(code, dst, src1, src2));
		}

		public void vmovhpd(AssemblerMemoryOperand dst, AssemblerRegisterXMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vmovhpd_m64_xmm : Code.EVEX_Vmovhpd_m64_xmm);
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, in memory, src));
		}

		public void vmovhpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vmovhpd_xmm_xmm_m64 : Code.EVEX_Vmovhpd_xmm_xmm_m64);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory));
		}

		public void vmovhps(AssemblerMemoryOperand dst, AssemblerRegisterXMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vmovhps_m64_xmm : Code.EVEX_Vmovhps_m64_xmm);
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, in memory, src));
		}

		public void vmovhps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vmovhps_xmm_xmm_m64 : Code.EVEX_Vmovhps_xmm_xmm_m64);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory));
		}

		public void vmovlhps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vmovlhps_xmm_xmm_xmm : Code.EVEX_Vmovlhps_xmm_xmm_xmm);
			AddInstruction(Instruction.Create(code, dst, src1, src2));
		}

		public void vmovlpd(AssemblerMemoryOperand dst, AssemblerRegisterXMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vmovlpd_m64_xmm : Code.EVEX_Vmovlpd_m64_xmm);
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, in memory, src));
		}

		public void vmovlpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vmovlpd_xmm_xmm_m64 : Code.EVEX_Vmovlpd_xmm_xmm_m64);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory));
		}

		public void vmovlps(AssemblerMemoryOperand dst, AssemblerRegisterXMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vmovlps_m64_xmm : Code.EVEX_Vmovlps_m64_xmm);
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, in memory, src));
		}

		public void vmovlps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vmovlps_xmm_xmm_m64 : Code.EVEX_Vmovlps_xmm_xmm_m64);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory));
		}

		public void vmovmskpd(AssemblerRegister32 dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vmovmskpd_r32_xmm, dst, src));
		}

		public void vmovmskpd(AssemblerRegister64 dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vmovmskpd_r64_xmm, dst, src));
		}

		public void vmovmskpd(AssemblerRegister32 dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vmovmskpd_r32_ymm, dst, src));
		}

		public void vmovmskpd(AssemblerRegister64 dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vmovmskpd_r64_ymm, dst, src));
		}

		public void vmovmskps(AssemblerRegister32 dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vmovmskps_r32_xmm, dst, src));
		}

		public void vmovmskps(AssemblerRegister64 dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vmovmskps_r64_xmm, dst, src));
		}

		public void vmovmskps(AssemblerRegister32 dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vmovmskps_r32_ymm, dst, src));
		}

		public void vmovmskps(AssemblerRegister64 dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vmovmskps_r64_ymm, dst, src));
		}

		public void vmovntdq(AssemblerMemoryOperand dst, AssemblerRegisterXMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vmovntdq_m128_xmm : Code.EVEX_Vmovntdq_m128_xmm);
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, in memory, src));
		}

		public void vmovntdq(AssemblerMemoryOperand dst, AssemblerRegisterYMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vmovntdq_m256_ymm : Code.EVEX_Vmovntdq_m256_ymm);
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, in memory, src));
		}

		public void vmovntdq(AssemblerMemoryOperand dst, AssemblerRegisterZMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vmovntdq_m512_zmm, in memory, src));
		}

		public void vmovntdqa(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vmovntdqa_xmm_m128 : Code.EVEX_Vmovntdqa_xmm_m128);
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory));
		}

		public void vmovntdqa(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vmovntdqa_ymm_m256 : Code.EVEX_Vmovntdqa_ymm_m256);
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory));
		}

		public void vmovntdqa(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vmovntdqa_zmm_m512, register, in memory));
		}

		public void vmovntpd(AssemblerMemoryOperand dst, AssemblerRegisterXMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vmovntpd_m128_xmm : Code.EVEX_Vmovntpd_m128_xmm);
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, in memory, src));
		}

		public void vmovntpd(AssemblerMemoryOperand dst, AssemblerRegisterYMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vmovntpd_m256_ymm : Code.EVEX_Vmovntpd_m256_ymm);
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, in memory, src));
		}

		public void vmovntpd(AssemblerMemoryOperand dst, AssemblerRegisterZMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vmovntpd_m512_zmm, in memory, src));
		}

		public void vmovntps(AssemblerMemoryOperand dst, AssemblerRegisterXMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vmovntps_m128_xmm : Code.EVEX_Vmovntps_m128_xmm);
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, in memory, src));
		}

		public void vmovntps(AssemblerMemoryOperand dst, AssemblerRegisterYMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vmovntps_m256_ymm : Code.EVEX_Vmovntps_m256_ymm);
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, in memory, src));
		}

		public void vmovntps(AssemblerMemoryOperand dst, AssemblerRegisterZMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vmovntps_m512_zmm, in memory, src));
		}

		public void vmovq(AssemblerRegisterXMM dst, AssemblerRegister64 src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vmovq_xmm_rm64 : Code.EVEX_Vmovq_xmm_rm64);
			AddInstruction(Instruction.Create(code, dst, src));
		}

		public void vmovq(AssemblerRegister64 dst, AssemblerRegisterXMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vmovq_rm64_xmm : Code.EVEX_Vmovq_rm64_xmm);
			AddInstruction(Instruction.Create(code, dst, src));
		}

		public void vmovq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vmovq_xmm_xmmm64 : Code.EVEX_Vmovq_xmm_xmmm64);
			AddInstruction(Instruction.Create(code, dst, src));
		}

		public void vmovq(AssemblerMemoryOperand dst, AssemblerRegisterXMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vmovq_xmmm64_xmm : Code.EVEX_Vmovq_xmmm64_xmm);
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, in memory, src));
		}

		public void vmovq(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vmovq_xmm_xmmm64 : Code.EVEX_Vmovq_xmm_xmmm64);
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory));
		}

		public void vmovsd(AssemblerMemoryOperand dst, AssemblerRegisterXMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vmovsd_m64_xmm : Code.EVEX_Vmovsd_m64_k1_xmm);
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, in memory, src), dst.Flags);
		}

		public void vmovsd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vmovsd_xmm_m64 : Code.EVEX_Vmovsd_xmm_k1z_m64);
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory), dst.Flags);
		}

		public void vmovsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vmovsd_xmm_xmm_xmm : Code.EVEX_Vmovsd_xmm_k1z_xmm_xmm);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vmovsh(AssemblerMemoryOperand dst, AssemblerRegisterXMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vmovsh_m16_k1_xmm, in memory, src), dst.Flags);
		}

		public void vmovsh(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vmovsh_xmm_k1z_m16, register, in memory), dst.Flags);
		}

		public void vmovsh(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vmovsh_xmm_k1z_xmm_xmm, dst, src1, src2), dst.Flags);
		}

		public void vmovshdup(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vmovshdup_xmm_xmmm128 : Code.EVEX_Vmovshdup_xmm_k1z_xmmm128);
			AddInstruction(Instruction.Create(code, dst, src), dst.Flags);
		}

		public void vmovshdup(AssemblerRegisterYMM dst, AssemblerRegisterYMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vmovshdup_ymm_ymmm256 : Code.EVEX_Vmovshdup_ymm_k1z_ymmm256);
			AddInstruction(Instruction.Create(code, dst, src), dst.Flags);
		}

		public void vmovshdup(AssemblerRegisterZMM dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vmovshdup_zmm_k1z_zmmm512, dst, src), dst.Flags);
		}

		public void vmovshdup(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vmovshdup_xmm_xmmm128 : Code.EVEX_Vmovshdup_xmm_k1z_xmmm128);
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory), dst.Flags);
		}

		public void vmovshdup(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vmovshdup_ymm_ymmm256 : Code.EVEX_Vmovshdup_ymm_k1z_ymmm256);
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory), dst.Flags);
		}

		public void vmovshdup(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vmovshdup_zmm_k1z_zmmm512, register, in memory), dst.Flags);
		}

		public void vmovsldup(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vmovsldup_xmm_xmmm128 : Code.EVEX_Vmovsldup_xmm_k1z_xmmm128);
			AddInstruction(Instruction.Create(code, dst, src), dst.Flags);
		}

		public void vmovsldup(AssemblerRegisterYMM dst, AssemblerRegisterYMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vmovsldup_ymm_ymmm256 : Code.EVEX_Vmovsldup_ymm_k1z_ymmm256);
			AddInstruction(Instruction.Create(code, dst, src), dst.Flags);
		}

		public void vmovsldup(AssemblerRegisterZMM dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vmovsldup_zmm_k1z_zmmm512, dst, src), dst.Flags);
		}

		public void vmovsldup(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vmovsldup_xmm_xmmm128 : Code.EVEX_Vmovsldup_xmm_k1z_xmmm128);
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory), dst.Flags);
		}

		public void vmovsldup(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vmovsldup_ymm_ymmm256 : Code.EVEX_Vmovsldup_ymm_k1z_ymmm256);
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory), dst.Flags);
		}

		public void vmovsldup(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vmovsldup_zmm_k1z_zmmm512, register, in memory), dst.Flags);
		}

		public void vmovss(AssemblerMemoryOperand dst, AssemblerRegisterXMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vmovss_m32_xmm : Code.EVEX_Vmovss_m32_k1_xmm);
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, in memory, src), dst.Flags);
		}

		public void vmovss(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vmovss_xmm_m32 : Code.EVEX_Vmovss_xmm_k1z_m32);
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory), dst.Flags);
		}

		public void vmovss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vmovss_xmm_xmm_xmm : Code.EVEX_Vmovss_xmm_k1z_xmm_xmm);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vmovupd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vmovupd_xmm_xmmm128 : Code.EVEX_Vmovupd_xmm_k1z_xmmm128);
			AddInstruction(Instruction.Create(code, dst, src), dst.Flags);
		}

		public void vmovupd(AssemblerMemoryOperand dst, AssemblerRegisterXMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vmovupd_xmmm128_xmm : Code.EVEX_Vmovupd_xmmm128_k1z_xmm);
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, in memory, src), dst.Flags);
		}

		public void vmovupd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vmovupd_ymm_ymmm256 : Code.EVEX_Vmovupd_ymm_k1z_ymmm256);
			AddInstruction(Instruction.Create(code, dst, src), dst.Flags);
		}

		public void vmovupd(AssemblerMemoryOperand dst, AssemblerRegisterYMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vmovupd_ymmm256_ymm : Code.EVEX_Vmovupd_ymmm256_k1z_ymm);
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, in memory, src), dst.Flags);
		}

		public void vmovupd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vmovupd_zmm_k1z_zmmm512, dst, src), dst.Flags);
		}

		public void vmovupd(AssemblerMemoryOperand dst, AssemblerRegisterZMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vmovupd_zmmm512_k1z_zmm, in memory, src), dst.Flags);
		}

		public void vmovupd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vmovupd_xmm_xmmm128 : Code.EVEX_Vmovupd_xmm_k1z_xmmm128);
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory), dst.Flags);
		}

		public void vmovupd(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vmovupd_ymm_ymmm256 : Code.EVEX_Vmovupd_ymm_k1z_ymmm256);
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory), dst.Flags);
		}

		public void vmovupd(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vmovupd_zmm_k1z_zmmm512, register, in memory), dst.Flags);
		}

		public void vmovups(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vmovups_xmm_xmmm128 : Code.EVEX_Vmovups_xmm_k1z_xmmm128);
			AddInstruction(Instruction.Create(code, dst, src), dst.Flags);
		}

		public void vmovups(AssemblerMemoryOperand dst, AssemblerRegisterXMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vmovups_xmmm128_xmm : Code.EVEX_Vmovups_xmmm128_k1z_xmm);
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, in memory, src), dst.Flags);
		}

		public void vmovups(AssemblerRegisterYMM dst, AssemblerRegisterYMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vmovups_ymm_ymmm256 : Code.EVEX_Vmovups_ymm_k1z_ymmm256);
			AddInstruction(Instruction.Create(code, dst, src), dst.Flags);
		}

		public void vmovups(AssemblerMemoryOperand dst, AssemblerRegisterYMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vmovups_ymmm256_ymm : Code.EVEX_Vmovups_ymmm256_k1z_ymm);
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, in memory, src), dst.Flags);
		}

		public void vmovups(AssemblerRegisterZMM dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vmovups_zmm_k1z_zmmm512, dst, src), dst.Flags);
		}

		public void vmovups(AssemblerMemoryOperand dst, AssemblerRegisterZMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vmovups_zmmm512_k1z_zmm, in memory, src), dst.Flags);
		}

		public void vmovups(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vmovups_xmm_xmmm128 : Code.EVEX_Vmovups_xmm_k1z_xmmm128);
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory), dst.Flags);
		}

		public void vmovups(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vmovups_ymm_ymmm256 : Code.EVEX_Vmovups_ymm_k1z_ymmm256);
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory), dst.Flags);
		}

		public void vmovups(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vmovups_zmm_k1z_zmmm512, register, in memory), dst.Flags);
		}

		public void vmovw(AssemblerRegisterXMM dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vmovw_xmm_r32m16, dst, src));
		}

		public void vmovw(AssemblerRegisterXMM dst, AssemblerRegister64 src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vmovw_xmm_r64m16, dst, src));
		}

		public void vmovw(AssemblerRegister32 dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vmovw_r32m16_xmm, dst, src));
		}

		public void vmovw(AssemblerRegister64 dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vmovw_r64m16_xmm, dst, src));
		}

		public void vmovw(AssemblerMemoryOperand dst, AssemblerRegisterXMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vmovw_r32m16_xmm, in memory, src));
		}

		public void vmovw(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vmovw_xmm_r32m16, register, in memory));
		}

		public void vmpsadbw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vmpsadbw_xmm_xmm_xmmm128_imm8, dst, src1, src2, imm));
		}

		public void vmpsadbw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vmpsadbw_ymm_ymm_ymmm256_imm8, dst, src1, src2, imm));
		}

		public void vmpsadbw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vmpsadbw_xmm_xmm_xmmm128_imm8, register, register2, in memory, imm));
		}

		public void vmpsadbw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vmpsadbw_ymm_ymm_ymmm256_imm8, register, register2, in memory, imm));
		}

		public void vmpsadbw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vmpsadbw_xmm_xmm_xmmm128_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm));
		}

		public void vmpsadbw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vmpsadbw_ymm_ymm_ymmm256_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm));
		}

		public void vmpsadbw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vmpsadbw_xmm_xmm_xmmm128_imm8, register, register2, in memory, (uint)imm));
		}

		public void vmpsadbw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vmpsadbw_ymm_ymm_ymmm256_imm8, register, register2, in memory, (uint)imm));
		}

		public void vmptrld(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Vmptrld_m64, in memory));
		}

		public void vmptrst(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Vmptrst_m64, in memory));
		}

		public void vmread(AssemblerRegister32 dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.Vmread_rm32_r32, dst, src));
		}

		public void vmread(AssemblerMemoryOperand dst, AssemblerRegister32 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Vmread_rm32_r32, in memory, src));
		}

		public void vmread(AssemblerRegister64 dst, AssemblerRegister64 src)
		{
			AddInstruction(Instruction.Create(Code.Vmread_rm64_r64, dst, src));
		}

		public void vmread(AssemblerMemoryOperand dst, AssemblerRegister64 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Vmread_rm64_r64, in memory, src));
		}

		public void vmresume()
		{
			AddInstruction(Instruction.Create(Code.Vmresume));
		}

		public void vmrun()
		{
			Code code = ((Bitness != 64) ? ((Bitness >= 32) ? Code.Vmrund : Code.Vmrunw) : Code.Vmrunq);
			AddInstruction(Instruction.Create(code));
		}

		public void vmsave()
		{
			Code code = ((Bitness != 64) ? ((Bitness >= 32) ? Code.Vmsaved : Code.Vmsavew) : Code.Vmsaveq);
			AddInstruction(Instruction.Create(code));
		}

		public void vmulpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vmulpd_xmm_xmm_xmmm128 : Code.EVEX_Vmulpd_xmm_k1z_xmm_xmmm128b64);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vmulpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vmulpd_ymm_ymm_ymmm256 : Code.EVEX_Vmulpd_ymm_k1z_ymm_ymmm256b64);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vmulpd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vmulpd_zmm_k1z_zmm_zmmm512b64_er, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vmulpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vmulpd_xmm_xmm_xmmm128 : Code.EVEX_Vmulpd_xmm_k1z_xmm_xmmm128b64) : Code.EVEX_Vmulpd_xmm_k1z_xmm_xmmm128b64);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vmulpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vmulpd_ymm_ymm_ymmm256 : Code.EVEX_Vmulpd_ymm_k1z_ymm_ymmm256b64) : Code.EVEX_Vmulpd_ymm_k1z_ymm_ymmm256b64);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vmulpd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vmulpd_zmm_k1z_zmm_zmmm512b64_er, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vmulph(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vmulph_xmm_k1z_xmm_xmmm128b16, dst, src1, src2), dst.Flags);
		}

		public void vmulph(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vmulph_ymm_k1z_ymm_ymmm256b16, dst, src1, src2), dst.Flags);
		}

		public void vmulph(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vmulph_zmm_k1z_zmm_zmmm512b16_er, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vmulph(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vmulph_xmm_k1z_xmm_xmmm128b16, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vmulph(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vmulph_ymm_k1z_ymm_ymmm256b16, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vmulph(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vmulph_zmm_k1z_zmm_zmmm512b16_er, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vmulps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vmulps_xmm_xmm_xmmm128 : Code.EVEX_Vmulps_xmm_k1z_xmm_xmmm128b32);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vmulps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vmulps_ymm_ymm_ymmm256 : Code.EVEX_Vmulps_ymm_k1z_ymm_ymmm256b32);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vmulps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vmulps_zmm_k1z_zmm_zmmm512b32_er, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vmulps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vmulps_xmm_xmm_xmmm128 : Code.EVEX_Vmulps_xmm_k1z_xmm_xmmm128b32) : Code.EVEX_Vmulps_xmm_k1z_xmm_xmmm128b32);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vmulps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vmulps_ymm_ymm_ymmm256 : Code.EVEX_Vmulps_ymm_k1z_ymm_ymmm256b32) : Code.EVEX_Vmulps_ymm_k1z_ymm_ymmm256b32);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vmulps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vmulps_zmm_k1z_zmm_zmmm512b32_er, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vmulsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vmulsd_xmm_xmm_xmmm64 : Code.EVEX_Vmulsd_xmm_k1z_xmm_xmmm64_er);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vmulsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vmulsd_xmm_xmm_xmmm64 : Code.EVEX_Vmulsd_xmm_k1z_xmm_xmmm64_er);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vmulsh(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vmulsh_xmm_k1z_xmm_xmmm16_er, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vmulsh(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vmulsh_xmm_k1z_xmm_xmmm16_er, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vmulss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vmulss_xmm_xmm_xmmm32 : Code.EVEX_Vmulss_xmm_k1z_xmm_xmmm32_er);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vmulss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vmulss_xmm_xmm_xmmm32 : Code.EVEX_Vmulss_xmm_k1z_xmm_xmmm32_er);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vmwrite(AssemblerRegister32 dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.Vmwrite_r32_rm32, dst, src));
		}

		public void vmwrite(AssemblerRegister64 dst, AssemblerRegister64 src)
		{
			AddInstruction(Instruction.Create(Code.Vmwrite_r64_rm64, dst, src));
		}

		public void vmwrite(AssemblerRegister32 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Vmwrite_r32_rm32, register, in memory));
		}

		public void vmwrite(AssemblerRegister64 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Vmwrite_r64_rm64, register, in memory));
		}

		public void vmxoff()
		{
			AddInstruction(Instruction.Create(Code.Vmxoff));
		}

		public void vmxon(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Vmxon_m64, in memory));
		}

		public void vorpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vorpd_xmm_xmm_xmmm128 : Code.EVEX_Vorpd_xmm_k1z_xmm_xmmm128b64);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vorpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vorpd_ymm_ymm_ymmm256 : Code.EVEX_Vorpd_ymm_k1z_ymm_ymmm256b64);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vorpd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vorpd_zmm_k1z_zmm_zmmm512b64, dst, src1, src2), dst.Flags);
		}

		public void vorpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vorpd_xmm_xmm_xmmm128 : Code.EVEX_Vorpd_xmm_k1z_xmm_xmmm128b64) : Code.EVEX_Vorpd_xmm_k1z_xmm_xmmm128b64);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vorpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vorpd_ymm_ymm_ymmm256 : Code.EVEX_Vorpd_ymm_k1z_ymm_ymmm256b64) : Code.EVEX_Vorpd_ymm_k1z_ymm_ymmm256b64);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vorpd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vorpd_zmm_k1z_zmm_zmmm512b64, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vorps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vorps_xmm_xmm_xmmm128 : Code.EVEX_Vorps_xmm_k1z_xmm_xmmm128b32);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vorps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vorps_ymm_ymm_ymmm256 : Code.EVEX_Vorps_ymm_k1z_ymm_ymmm256b32);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vorps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vorps_zmm_k1z_zmm_zmmm512b32, dst, src1, src2), dst.Flags);
		}

		public void vorps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vorps_xmm_xmm_xmmm128 : Code.EVEX_Vorps_xmm_k1z_xmm_xmmm128b32) : Code.EVEX_Vorps_xmm_k1z_xmm_xmmm128b32);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vorps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vorps_ymm_ymm_ymmm256 : Code.EVEX_Vorps_ymm_k1z_ymm_ymmm256b32) : Code.EVEX_Vorps_ymm_k1z_ymm_ymmm256b32);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vorps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vorps_zmm_k1z_zmm_zmmm512b32, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vp2intersectd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vp2intersectd_kp1_xmm_xmmm128b32, dst, src1, src2));
		}

		public void vp2intersectd(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vp2intersectd_kp1_ymm_ymmm256b32, dst, src1, src2));
		}

		public void vp2intersectd(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vp2intersectd_kp1_zmm_zmmm512b32, dst, src1, src2));
		}

		public void vp2intersectd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vp2intersectd_kp1_xmm_xmmm128b32, register, register2, in memory), src2.Flags);
		}

		public void vp2intersectd(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vp2intersectd_kp1_ymm_ymmm256b32, register, register2, in memory), src2.Flags);
		}

		public void vp2intersectd(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vp2intersectd_kp1_zmm_zmmm512b32, register, register2, in memory), src2.Flags);
		}

		public void vp2intersectq(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vp2intersectq_kp1_xmm_xmmm128b64, dst, src1, src2));
		}

		public void vp2intersectq(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vp2intersectq_kp1_ymm_ymmm256b64, dst, src1, src2));
		}

		public void vp2intersectq(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vp2intersectq_kp1_zmm_zmmm512b64, dst, src1, src2));
		}

		public void vp2intersectq(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vp2intersectq_kp1_xmm_xmmm128b64, register, register2, in memory), src2.Flags);
		}

		public void vp2intersectq(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vp2intersectq_kp1_ymm_ymmm256b64, register, register2, in memory), src2.Flags);
		}

		public void vp2intersectq(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vp2intersectq_kp1_zmm_zmmm512b64, register, register2, in memory), src2.Flags);
		}

		public void vp4dpwssd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vp4dpwssd_zmm_k1z_zmmp3_m128, register, register2, in memory), dst.Flags);
		}

		public void vp4dpwssds(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vp4dpwssds_zmm_k1z_zmmp3_m128, register, register2, in memory), dst.Flags);
		}

		public void vpabsb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpabsb_xmm_xmmm128 : Code.EVEX_Vpabsb_xmm_k1z_xmmm128);
			AddInstruction(Instruction.Create(code, dst, src), dst.Flags);
		}

		public void vpabsb(AssemblerRegisterYMM dst, AssemblerRegisterYMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpabsb_ymm_ymmm256 : Code.EVEX_Vpabsb_ymm_k1z_ymmm256);
			AddInstruction(Instruction.Create(code, dst, src), dst.Flags);
		}

		public void vpabsb(AssemblerRegisterZMM dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpabsb_zmm_k1z_zmmm512, dst, src), dst.Flags);
		}

		public void vpabsb(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpabsb_xmm_xmmm128 : Code.EVEX_Vpabsb_xmm_k1z_xmmm128);
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory), dst.Flags);
		}

		public void vpabsb(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpabsb_ymm_ymmm256 : Code.EVEX_Vpabsb_ymm_k1z_ymmm256);
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory), dst.Flags);
		}

		public void vpabsb(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpabsb_zmm_k1z_zmmm512, register, in memory), dst.Flags);
		}

		public void vpabsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpabsd_xmm_xmmm128 : Code.EVEX_Vpabsd_xmm_k1z_xmmm128b32);
			AddInstruction(Instruction.Create(code, dst, src), dst.Flags);
		}

		public void vpabsd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpabsd_ymm_ymmm256 : Code.EVEX_Vpabsd_ymm_k1z_ymmm256b32);
			AddInstruction(Instruction.Create(code, dst, src), dst.Flags);
		}

		public void vpabsd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpabsd_zmm_k1z_zmmm512b32, dst, src), dst.Flags);
		}

		public void vpabsd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Code code = ((!src.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vpabsd_xmm_xmmm128 : Code.EVEX_Vpabsd_xmm_k1z_xmmm128b32) : Code.EVEX_Vpabsd_xmm_k1z_xmmm128b32);
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory), dst.Flags | src.Flags);
		}

		public void vpabsd(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Code code = ((!src.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vpabsd_ymm_ymmm256 : Code.EVEX_Vpabsd_ymm_k1z_ymmm256b32) : Code.EVEX_Vpabsd_ymm_k1z_ymmm256b32);
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory), dst.Flags | src.Flags);
		}

		public void vpabsd(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpabsd_zmm_k1z_zmmm512b32, register, in memory), dst.Flags | src.Flags);
		}

		public void vpabsq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpabsq_xmm_k1z_xmmm128b64, dst, src), dst.Flags);
		}

		public void vpabsq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpabsq_ymm_k1z_ymmm256b64, dst, src), dst.Flags);
		}

		public void vpabsq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpabsq_zmm_k1z_zmmm512b64, dst, src), dst.Flags);
		}

		public void vpabsq(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpabsq_xmm_k1z_xmmm128b64, register, in memory), dst.Flags | src.Flags);
		}

		public void vpabsq(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpabsq_ymm_k1z_ymmm256b64, register, in memory), dst.Flags | src.Flags);
		}

		public void vpabsq(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpabsq_zmm_k1z_zmmm512b64, register, in memory), dst.Flags | src.Flags);
		}

		public void vpabsw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpabsw_xmm_xmmm128 : Code.EVEX_Vpabsw_xmm_k1z_xmmm128);
			AddInstruction(Instruction.Create(code, dst, src), dst.Flags);
		}

		public void vpabsw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpabsw_ymm_ymmm256 : Code.EVEX_Vpabsw_ymm_k1z_ymmm256);
			AddInstruction(Instruction.Create(code, dst, src), dst.Flags);
		}

		public void vpabsw(AssemblerRegisterZMM dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpabsw_zmm_k1z_zmmm512, dst, src), dst.Flags);
		}

		public void vpabsw(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpabsw_xmm_xmmm128 : Code.EVEX_Vpabsw_xmm_k1z_xmmm128);
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory), dst.Flags);
		}

		public void vpabsw(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpabsw_ymm_ymmm256 : Code.EVEX_Vpabsw_ymm_k1z_ymmm256);
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory), dst.Flags);
		}

		public void vpabsw(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpabsw_zmm_k1z_zmmm512, register, in memory), dst.Flags);
		}

		public void vpackssdw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpackssdw_xmm_xmm_xmmm128 : Code.EVEX_Vpackssdw_xmm_k1z_xmm_xmmm128b32);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpackssdw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpackssdw_ymm_ymm_ymmm256 : Code.EVEX_Vpackssdw_ymm_k1z_ymm_ymmm256b32);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpackssdw(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpackssdw_zmm_k1z_zmm_zmmm512b32, dst, src1, src2), dst.Flags);
		}

		public void vpackssdw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vpackssdw_xmm_xmm_xmmm128 : Code.EVEX_Vpackssdw_xmm_k1z_xmm_xmmm128b32) : Code.EVEX_Vpackssdw_xmm_k1z_xmm_xmmm128b32);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpackssdw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vpackssdw_ymm_ymm_ymmm256 : Code.EVEX_Vpackssdw_ymm_k1z_ymm_ymmm256b32) : Code.EVEX_Vpackssdw_ymm_k1z_ymm_ymmm256b32);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpackssdw(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpackssdw_zmm_k1z_zmm_zmmm512b32, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpacksswb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpacksswb_xmm_xmm_xmmm128 : Code.EVEX_Vpacksswb_xmm_k1z_xmm_xmmm128);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpacksswb(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpacksswb_ymm_ymm_ymmm256 : Code.EVEX_Vpacksswb_ymm_k1z_ymm_ymmm256);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpacksswb(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpacksswb_zmm_k1z_zmm_zmmm512, dst, src1, src2), dst.Flags);
		}

		public void vpacksswb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpacksswb_xmm_xmm_xmmm128 : Code.EVEX_Vpacksswb_xmm_k1z_xmm_xmmm128);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags);
		}

		public void vpacksswb(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpacksswb_ymm_ymm_ymmm256 : Code.EVEX_Vpacksswb_ymm_k1z_ymm_ymmm256);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags);
		}

		public void vpacksswb(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpacksswb_zmm_k1z_zmm_zmmm512, register, register2, in memory), dst.Flags);
		}

		public void vpackusdw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpackusdw_xmm_xmm_xmmm128 : Code.EVEX_Vpackusdw_xmm_k1z_xmm_xmmm128b32);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpackusdw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpackusdw_ymm_ymm_ymmm256 : Code.EVEX_Vpackusdw_ymm_k1z_ymm_ymmm256b32);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpackusdw(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpackusdw_zmm_k1z_zmm_zmmm512b32, dst, src1, src2), dst.Flags);
		}

		public void vpackusdw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vpackusdw_xmm_xmm_xmmm128 : Code.EVEX_Vpackusdw_xmm_k1z_xmm_xmmm128b32) : Code.EVEX_Vpackusdw_xmm_k1z_xmm_xmmm128b32);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpackusdw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vpackusdw_ymm_ymm_ymmm256 : Code.EVEX_Vpackusdw_ymm_k1z_ymm_ymmm256b32) : Code.EVEX_Vpackusdw_ymm_k1z_ymm_ymmm256b32);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpackusdw(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpackusdw_zmm_k1z_zmm_zmmm512b32, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpackuswb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpackuswb_xmm_xmm_xmmm128 : Code.EVEX_Vpackuswb_xmm_k1z_xmm_xmmm128);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpackuswb(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpackuswb_ymm_ymm_ymmm256 : Code.EVEX_Vpackuswb_ymm_k1z_ymm_ymmm256);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpackuswb(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpackuswb_zmm_k1z_zmm_zmmm512, dst, src1, src2), dst.Flags);
		}

		public void vpackuswb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpackuswb_xmm_xmm_xmmm128 : Code.EVEX_Vpackuswb_xmm_k1z_xmm_xmmm128);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags);
		}

		public void vpackuswb(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpackuswb_ymm_ymm_ymmm256 : Code.EVEX_Vpackuswb_ymm_k1z_ymm_ymmm256);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags);
		}

		public void vpackuswb(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpackuswb_zmm_k1z_zmm_zmmm512, register, register2, in memory), dst.Flags);
		}

		public void vpaddb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpaddb_xmm_xmm_xmmm128 : Code.EVEX_Vpaddb_xmm_k1z_xmm_xmmm128);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpaddb(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpaddb_ymm_ymm_ymmm256 : Code.EVEX_Vpaddb_ymm_k1z_ymm_ymmm256);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpaddb(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpaddb_zmm_k1z_zmm_zmmm512, dst, src1, src2), dst.Flags);
		}

		public void vpaddb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpaddb_xmm_xmm_xmmm128 : Code.EVEX_Vpaddb_xmm_k1z_xmm_xmmm128);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags);
		}

		public void vpaddb(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpaddb_ymm_ymm_ymmm256 : Code.EVEX_Vpaddb_ymm_k1z_ymm_ymmm256);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags);
		}

		public void vpaddb(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpaddb_zmm_k1z_zmm_zmmm512, register, register2, in memory), dst.Flags);
		}

		public void vpaddd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpaddd_xmm_xmm_xmmm128 : Code.EVEX_Vpaddd_xmm_k1z_xmm_xmmm128b32);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpaddd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpaddd_ymm_ymm_ymmm256 : Code.EVEX_Vpaddd_ymm_k1z_ymm_ymmm256b32);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpaddd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpaddd_zmm_k1z_zmm_zmmm512b32, dst, src1, src2), dst.Flags);
		}

		public void vpaddd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vpaddd_xmm_xmm_xmmm128 : Code.EVEX_Vpaddd_xmm_k1z_xmm_xmmm128b32) : Code.EVEX_Vpaddd_xmm_k1z_xmm_xmmm128b32);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpaddd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vpaddd_ymm_ymm_ymmm256 : Code.EVEX_Vpaddd_ymm_k1z_ymm_ymmm256b32) : Code.EVEX_Vpaddd_ymm_k1z_ymm_ymmm256b32);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpaddd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpaddd_zmm_k1z_zmm_zmmm512b32, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpaddq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpaddq_xmm_xmm_xmmm128 : Code.EVEX_Vpaddq_xmm_k1z_xmm_xmmm128b64);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpaddq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpaddq_ymm_ymm_ymmm256 : Code.EVEX_Vpaddq_ymm_k1z_ymm_ymmm256b64);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpaddq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpaddq_zmm_k1z_zmm_zmmm512b64, dst, src1, src2), dst.Flags);
		}

		public void vpaddq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vpaddq_xmm_xmm_xmmm128 : Code.EVEX_Vpaddq_xmm_k1z_xmm_xmmm128b64) : Code.EVEX_Vpaddq_xmm_k1z_xmm_xmmm128b64);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpaddq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vpaddq_ymm_ymm_ymmm256 : Code.EVEX_Vpaddq_ymm_k1z_ymm_ymmm256b64) : Code.EVEX_Vpaddq_ymm_k1z_ymm_ymmm256b64);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpaddq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpaddq_zmm_k1z_zmm_zmmm512b64, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpaddsb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpaddsb_xmm_xmm_xmmm128 : Code.EVEX_Vpaddsb_xmm_k1z_xmm_xmmm128);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpaddsb(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpaddsb_ymm_ymm_ymmm256 : Code.EVEX_Vpaddsb_ymm_k1z_ymm_ymmm256);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpaddsb(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpaddsb_zmm_k1z_zmm_zmmm512, dst, src1, src2), dst.Flags);
		}

		public void vpaddsb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpaddsb_xmm_xmm_xmmm128 : Code.EVEX_Vpaddsb_xmm_k1z_xmm_xmmm128);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags);
		}

		public void vpaddsb(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpaddsb_ymm_ymm_ymmm256 : Code.EVEX_Vpaddsb_ymm_k1z_ymm_ymmm256);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags);
		}

		public void vpaddsb(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpaddsb_zmm_k1z_zmm_zmmm512, register, register2, in memory), dst.Flags);
		}

		public void vpaddsw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpaddsw_xmm_xmm_xmmm128 : Code.EVEX_Vpaddsw_xmm_k1z_xmm_xmmm128);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpaddsw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpaddsw_ymm_ymm_ymmm256 : Code.EVEX_Vpaddsw_ymm_k1z_ymm_ymmm256);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpaddsw(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpaddsw_zmm_k1z_zmm_zmmm512, dst, src1, src2), dst.Flags);
		}

		public void vpaddsw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpaddsw_xmm_xmm_xmmm128 : Code.EVEX_Vpaddsw_xmm_k1z_xmm_xmmm128);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags);
		}

		public void vpaddsw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpaddsw_ymm_ymm_ymmm256 : Code.EVEX_Vpaddsw_ymm_k1z_ymm_ymmm256);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags);
		}

		public void vpaddsw(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpaddsw_zmm_k1z_zmm_zmmm512, register, register2, in memory), dst.Flags);
		}

		public void vpaddusb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpaddusb_xmm_xmm_xmmm128 : Code.EVEX_Vpaddusb_xmm_k1z_xmm_xmmm128);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpaddusb(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpaddusb_ymm_ymm_ymmm256 : Code.EVEX_Vpaddusb_ymm_k1z_ymm_ymmm256);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpaddusb(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpaddusb_zmm_k1z_zmm_zmmm512, dst, src1, src2), dst.Flags);
		}

		public void vpaddusb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpaddusb_xmm_xmm_xmmm128 : Code.EVEX_Vpaddusb_xmm_k1z_xmm_xmmm128);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags);
		}

		public void vpaddusb(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpaddusb_ymm_ymm_ymmm256 : Code.EVEX_Vpaddusb_ymm_k1z_ymm_ymmm256);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags);
		}

		public void vpaddusb(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpaddusb_zmm_k1z_zmm_zmmm512, register, register2, in memory), dst.Flags);
		}

		public void vpaddusw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpaddusw_xmm_xmm_xmmm128 : Code.EVEX_Vpaddusw_xmm_k1z_xmm_xmmm128);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpaddusw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpaddusw_ymm_ymm_ymmm256 : Code.EVEX_Vpaddusw_ymm_k1z_ymm_ymmm256);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpaddusw(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpaddusw_zmm_k1z_zmm_zmmm512, dst, src1, src2), dst.Flags);
		}

		public void vpaddusw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpaddusw_xmm_xmm_xmmm128 : Code.EVEX_Vpaddusw_xmm_k1z_xmm_xmmm128);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags);
		}

		public void vpaddusw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpaddusw_ymm_ymm_ymmm256 : Code.EVEX_Vpaddusw_ymm_k1z_ymm_ymmm256);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags);
		}

		public void vpaddusw(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpaddusw_zmm_k1z_zmm_zmmm512, register, register2, in memory), dst.Flags);
		}

		public void vpaddw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpaddw_xmm_xmm_xmmm128 : Code.EVEX_Vpaddw_xmm_k1z_xmm_xmmm128);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpaddw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpaddw_ymm_ymm_ymmm256 : Code.EVEX_Vpaddw_ymm_k1z_ymm_ymmm256);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpaddw(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpaddw_zmm_k1z_zmm_zmmm512, dst, src1, src2), dst.Flags);
		}

		public void vpaddw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpaddw_xmm_xmm_xmmm128 : Code.EVEX_Vpaddw_xmm_k1z_xmm_xmmm128);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags);
		}

		public void vpaddw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpaddw_ymm_ymm_ymmm256 : Code.EVEX_Vpaddw_ymm_k1z_ymm_ymmm256);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags);
		}

		public void vpaddw(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpaddw_zmm_k1z_zmm_zmmm512, register, register2, in memory), dst.Flags);
		}

		public void vpalignr(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, sbyte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpalignr_xmm_xmm_xmmm128_imm8 : Code.EVEX_Vpalignr_xmm_k1z_xmm_xmmm128_imm8);
			AddInstruction(Instruction.Create(code, dst, src1, src2, imm), dst.Flags);
		}

		public void vpalignr(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, sbyte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpalignr_ymm_ymm_ymmm256_imm8 : Code.EVEX_Vpalignr_ymm_k1z_ymm_ymmm256_imm8);
			AddInstruction(Instruction.Create(code, dst, src1, src2, imm), dst.Flags);
		}

		public void vpalignr(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpalignr_zmm_k1z_zmm_zmmm512_imm8, dst, src1, src2, imm), dst.Flags);
		}

		public void vpalignr(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpalignr_xmm_xmm_xmmm128_imm8 : Code.EVEX_Vpalignr_xmm_k1z_xmm_xmmm128_imm8);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory, imm), dst.Flags);
		}

		public void vpalignr(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpalignr_ymm_ymm_ymmm256_imm8 : Code.EVEX_Vpalignr_ymm_k1z_ymm_ymmm256_imm8);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory, imm), dst.Flags);
		}

		public void vpalignr(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpalignr_zmm_k1z_zmm_zmmm512_imm8, register, register2, in memory, imm), dst.Flags);
		}

		public void vpalignr(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, byte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpalignr_xmm_xmm_xmmm128_imm8 : Code.EVEX_Vpalignr_xmm_k1z_xmm_xmmm128_imm8);
			AddInstruction(Instruction.Create(code, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags);
		}

		public void vpalignr(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, byte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpalignr_ymm_ymm_ymmm256_imm8 : Code.EVEX_Vpalignr_ymm_k1z_ymm_ymmm256_imm8);
			AddInstruction(Instruction.Create(code, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags);
		}

		public void vpalignr(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpalignr_zmm_k1z_zmm_zmmm512_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags);
		}

		public void vpalignr(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpalignr_xmm_xmm_xmmm128_imm8 : Code.EVEX_Vpalignr_xmm_k1z_xmm_xmmm128_imm8);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory, (uint)imm), dst.Flags);
		}

		public void vpalignr(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpalignr_ymm_ymm_ymmm256_imm8 : Code.EVEX_Vpalignr_ymm_k1z_ymm_ymmm256_imm8);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory, (uint)imm), dst.Flags);
		}

		public void vpalignr(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpalignr_zmm_k1z_zmm_zmmm512_imm8, register, register2, in memory, (uint)imm), dst.Flags);
		}

		public void vpand(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vpand_xmm_xmm_xmmm128, dst, src1, src2));
		}

		public void vpand(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vpand_ymm_ymm_ymmm256, dst, src1, src2));
		}

		public void vpand(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vpand_xmm_xmm_xmmm128, register, register2, in memory));
		}

		public void vpand(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vpand_ymm_ymm_ymmm256, register, register2, in memory));
		}

		public void vpandd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpandd_xmm_k1z_xmm_xmmm128b32, dst, src1, src2), dst.Flags);
		}

		public void vpandd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpandd_ymm_k1z_ymm_ymmm256b32, dst, src1, src2), dst.Flags);
		}

		public void vpandd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpandd_zmm_k1z_zmm_zmmm512b32, dst, src1, src2), dst.Flags);
		}

		public void vpandd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpandd_xmm_k1z_xmm_xmmm128b32, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpandd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpandd_ymm_k1z_ymm_ymmm256b32, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpandd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpandd_zmm_k1z_zmm_zmmm512b32, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpandn(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vpandn_xmm_xmm_xmmm128, dst, src1, src2));
		}

		public void vpandn(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vpandn_ymm_ymm_ymmm256, dst, src1, src2));
		}

		public void vpandn(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vpandn_xmm_xmm_xmmm128, register, register2, in memory));
		}

		public void vpandn(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vpandn_ymm_ymm_ymmm256, register, register2, in memory));
		}

		public void vpandnd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpandnd_xmm_k1z_xmm_xmmm128b32, dst, src1, src2), dst.Flags);
		}

		public void vpandnd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpandnd_ymm_k1z_ymm_ymmm256b32, dst, src1, src2), dst.Flags);
		}

		public void vpandnd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpandnd_zmm_k1z_zmm_zmmm512b32, dst, src1, src2), dst.Flags);
		}

		public void vpandnd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpandnd_xmm_k1z_xmm_xmmm128b32, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpandnd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpandnd_ymm_k1z_ymm_ymmm256b32, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpandnd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpandnd_zmm_k1z_zmm_zmmm512b32, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpandnq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpandnq_xmm_k1z_xmm_xmmm128b64, dst, src1, src2), dst.Flags);
		}

		public void vpandnq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpandnq_ymm_k1z_ymm_ymmm256b64, dst, src1, src2), dst.Flags);
		}

		public void vpandnq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpandnq_zmm_k1z_zmm_zmmm512b64, dst, src1, src2), dst.Flags);
		}

		public void vpandnq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpandnq_xmm_k1z_xmm_xmmm128b64, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpandnq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpandnq_ymm_k1z_ymm_ymmm256b64, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpandnq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpandnq_zmm_k1z_zmm_zmmm512b64, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpandq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpandq_xmm_k1z_xmm_xmmm128b64, dst, src1, src2), dst.Flags);
		}

		public void vpandq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpandq_ymm_k1z_ymm_ymmm256b64, dst, src1, src2), dst.Flags);
		}

		public void vpandq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpandq_zmm_k1z_zmm_zmmm512b64, dst, src1, src2), dst.Flags);
		}

		public void vpandq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpandq_xmm_k1z_xmm_xmmm128b64, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpandq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpandq_ymm_k1z_ymm_ymmm256b64, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpandq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpandq_zmm_k1z_zmm_zmmm512b64, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpavgb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpavgb_xmm_xmm_xmmm128 : Code.EVEX_Vpavgb_xmm_k1z_xmm_xmmm128);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpavgb(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpavgb_ymm_ymm_ymmm256 : Code.EVEX_Vpavgb_ymm_k1z_ymm_ymmm256);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpavgb(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpavgb_zmm_k1z_zmm_zmmm512, dst, src1, src2), dst.Flags);
		}

		public void vpavgb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpavgb_xmm_xmm_xmmm128 : Code.EVEX_Vpavgb_xmm_k1z_xmm_xmmm128);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags);
		}

		public void vpavgb(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpavgb_ymm_ymm_ymmm256 : Code.EVEX_Vpavgb_ymm_k1z_ymm_ymmm256);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags);
		}

		public void vpavgb(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpavgb_zmm_k1z_zmm_zmmm512, register, register2, in memory), dst.Flags);
		}

		public void vpavgw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpavgw_xmm_xmm_xmmm128 : Code.EVEX_Vpavgw_xmm_k1z_xmm_xmmm128);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpavgw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpavgw_ymm_ymm_ymmm256 : Code.EVEX_Vpavgw_ymm_k1z_ymm_ymmm256);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpavgw(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpavgw_zmm_k1z_zmm_zmmm512, dst, src1, src2), dst.Flags);
		}

		public void vpavgw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpavgw_xmm_xmm_xmmm128 : Code.EVEX_Vpavgw_xmm_k1z_xmm_xmmm128);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags);
		}

		public void vpavgw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpavgw_ymm_ymm_ymmm256 : Code.EVEX_Vpavgw_ymm_k1z_ymm_ymmm256);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags);
		}

		public void vpavgw(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpavgw_zmm_k1z_zmm_zmmm512, register, register2, in memory), dst.Flags);
		}

		public void vpblendd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vpblendd_xmm_xmm_xmmm128_imm8, dst, src1, src2, imm));
		}

		public void vpblendd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vpblendd_ymm_ymm_ymmm256_imm8, dst, src1, src2, imm));
		}

		public void vpblendd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vpblendd_xmm_xmm_xmmm128_imm8, register, register2, in memory, imm));
		}

		public void vpblendd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vpblendd_ymm_ymm_ymmm256_imm8, register, register2, in memory, imm));
		}

		public void vpblendd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vpblendd_xmm_xmm_xmmm128_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm));
		}

		public void vpblendd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vpblendd_ymm_ymm_ymmm256_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm));
		}

		public void vpblendd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vpblendd_xmm_xmm_xmmm128_imm8, register, register2, in memory, (uint)imm));
		}

		public void vpblendd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vpblendd_ymm_ymm_ymmm256_imm8, register, register2, in memory, (uint)imm));
		}

		public void vpblendmb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpblendmb_xmm_k1z_xmm_xmmm128, dst, src1, src2), dst.Flags);
		}

		public void vpblendmb(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpblendmb_ymm_k1z_ymm_ymmm256, dst, src1, src2), dst.Flags);
		}

		public void vpblendmb(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpblendmb_zmm_k1z_zmm_zmmm512, dst, src1, src2), dst.Flags);
		}

		public void vpblendmb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpblendmb_xmm_k1z_xmm_xmmm128, register, register2, in memory), dst.Flags);
		}

		public void vpblendmb(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpblendmb_ymm_k1z_ymm_ymmm256, register, register2, in memory), dst.Flags);
		}

		public void vpblendmb(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpblendmb_zmm_k1z_zmm_zmmm512, register, register2, in memory), dst.Flags);
		}

		public void vpblendmd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpblendmd_xmm_k1z_xmm_xmmm128b32, dst, src1, src2), dst.Flags);
		}

		public void vpblendmd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpblendmd_ymm_k1z_ymm_ymmm256b32, dst, src1, src2), dst.Flags);
		}

		public void vpblendmd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpblendmd_zmm_k1z_zmm_zmmm512b32, dst, src1, src2), dst.Flags);
		}

		public void vpblendmd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpblendmd_xmm_k1z_xmm_xmmm128b32, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpblendmd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpblendmd_ymm_k1z_ymm_ymmm256b32, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpblendmd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpblendmd_zmm_k1z_zmm_zmmm512b32, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpblendmq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpblendmq_xmm_k1z_xmm_xmmm128b64, dst, src1, src2), dst.Flags);
		}

		public void vpblendmq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpblendmq_ymm_k1z_ymm_ymmm256b64, dst, src1, src2), dst.Flags);
		}

		public void vpblendmq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpblendmq_zmm_k1z_zmm_zmmm512b64, dst, src1, src2), dst.Flags);
		}

		public void vpblendmq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpblendmq_xmm_k1z_xmm_xmmm128b64, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpblendmq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpblendmq_ymm_k1z_ymm_ymmm256b64, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpblendmq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpblendmq_zmm_k1z_zmm_zmmm512b64, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpblendmw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpblendmw_xmm_k1z_xmm_xmmm128, dst, src1, src2), dst.Flags);
		}

		public void vpblendmw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpblendmw_ymm_k1z_ymm_ymmm256, dst, src1, src2), dst.Flags);
		}

		public void vpblendmw(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpblendmw_zmm_k1z_zmm_zmmm512, dst, src1, src2), dst.Flags);
		}

		public void vpblendmw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpblendmw_xmm_k1z_xmm_xmmm128, register, register2, in memory), dst.Flags);
		}

		public void vpblendmw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpblendmw_ymm_k1z_ymm_ymmm256, register, register2, in memory), dst.Flags);
		}

		public void vpblendmw(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpblendmw_zmm_k1z_zmm_zmmm512, register, register2, in memory), dst.Flags);
		}

		public void vpblendvb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, AssemblerRegisterXMM src3)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vpblendvb_xmm_xmm_xmmm128_xmm, dst, src1, src2, src3));
		}

		public void vpblendvb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, AssemblerRegisterXMM src3)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vpblendvb_xmm_xmm_xmmm128_xmm, register, register2, in memory, src3));
		}

		public void vpblendvb(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, AssemblerRegisterYMM src3)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vpblendvb_ymm_ymm_ymmm256_ymm, dst, src1, src2, src3));
		}

		public void vpblendvb(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, AssemblerRegisterYMM src3)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vpblendvb_ymm_ymm_ymmm256_ymm, register, register2, in memory, src3));
		}

		public void vpblendw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vpblendw_xmm_xmm_xmmm128_imm8, dst, src1, src2, imm));
		}

		public void vpblendw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vpblendw_ymm_ymm_ymmm256_imm8, dst, src1, src2, imm));
		}

		public void vpblendw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vpblendw_xmm_xmm_xmmm128_imm8, register, register2, in memory, imm));
		}

		public void vpblendw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vpblendw_ymm_ymm_ymmm256_imm8, register, register2, in memory, imm));
		}

		public void vpblendw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vpblendw_xmm_xmm_xmmm128_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm));
		}

		public void vpblendw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vpblendw_ymm_ymm_ymmm256_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm));
		}

		public void vpblendw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vpblendw_xmm_xmm_xmmm128_imm8, register, register2, in memory, (uint)imm));
		}

		public void vpblendw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vpblendw_ymm_ymm_ymmm256_imm8, register, register2, in memory, (uint)imm));
		}

		public void vpbroadcastb(AssemblerRegisterXMM dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpbroadcastb_xmm_k1z_r32, dst, src), dst.Flags);
		}

		public void vpbroadcastb(AssemblerRegisterYMM dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpbroadcastb_ymm_k1z_r32, dst, src), dst.Flags);
		}

		public void vpbroadcastb(AssemblerRegisterZMM dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpbroadcastb_zmm_k1z_r32, dst, src), dst.Flags);
		}

		public void vpbroadcastb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpbroadcastb_xmm_xmmm8 : Code.EVEX_Vpbroadcastb_xmm_k1z_xmmm8);
			AddInstruction(Instruction.Create(code, dst, src), dst.Flags);
		}

		public void vpbroadcastb(AssemblerRegisterYMM dst, AssemblerRegisterXMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpbroadcastb_ymm_xmmm8 : Code.EVEX_Vpbroadcastb_ymm_k1z_xmmm8);
			AddInstruction(Instruction.Create(code, dst, src), dst.Flags);
		}

		public void vpbroadcastb(AssemblerRegisterZMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpbroadcastb_zmm_k1z_xmmm8, dst, src), dst.Flags);
		}

		public void vpbroadcastb(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpbroadcastb_xmm_xmmm8 : Code.EVEX_Vpbroadcastb_xmm_k1z_xmmm8);
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory), dst.Flags);
		}

		public void vpbroadcastb(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpbroadcastb_ymm_xmmm8 : Code.EVEX_Vpbroadcastb_ymm_k1z_xmmm8);
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory), dst.Flags);
		}

		public void vpbroadcastb(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpbroadcastb_zmm_k1z_xmmm8, register, in memory), dst.Flags);
		}

		public void vpbroadcastd(AssemblerRegisterXMM dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpbroadcastd_xmm_k1z_r32, dst, src), dst.Flags);
		}

		public void vpbroadcastd(AssemblerRegisterYMM dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpbroadcastd_ymm_k1z_r32, dst, src), dst.Flags);
		}

		public void vpbroadcastd(AssemblerRegisterZMM dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpbroadcastd_zmm_k1z_r32, dst, src), dst.Flags);
		}

		public void vpbroadcastd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpbroadcastd_xmm_xmmm32 : Code.EVEX_Vpbroadcastd_xmm_k1z_xmmm32);
			AddInstruction(Instruction.Create(code, dst, src), dst.Flags);
		}

		public void vpbroadcastd(AssemblerRegisterYMM dst, AssemblerRegisterXMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpbroadcastd_ymm_xmmm32 : Code.EVEX_Vpbroadcastd_ymm_k1z_xmmm32);
			AddInstruction(Instruction.Create(code, dst, src), dst.Flags);
		}

		public void vpbroadcastd(AssemblerRegisterZMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpbroadcastd_zmm_k1z_xmmm32, dst, src), dst.Flags);
		}

		public void vpbroadcastd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpbroadcastd_xmm_xmmm32 : Code.EVEX_Vpbroadcastd_xmm_k1z_xmmm32);
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory), dst.Flags);
		}

		public void vpbroadcastd(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpbroadcastd_ymm_xmmm32 : Code.EVEX_Vpbroadcastd_ymm_k1z_xmmm32);
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory), dst.Flags);
		}

		public void vpbroadcastd(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpbroadcastd_zmm_k1z_xmmm32, register, in memory), dst.Flags);
		}

		public void vpbroadcastmb2q(AssemblerRegisterXMM dst, AssemblerRegisterK src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpbroadcastmb2q_xmm_kr, dst, src));
		}

		public void vpbroadcastmb2q(AssemblerRegisterYMM dst, AssemblerRegisterK src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpbroadcastmb2q_ymm_kr, dst, src));
		}

		public void vpbroadcastmb2q(AssemblerRegisterZMM dst, AssemblerRegisterK src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpbroadcastmb2q_zmm_kr, dst, src));
		}

		public void vpbroadcastmw2d(AssemblerRegisterXMM dst, AssemblerRegisterK src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpbroadcastmw2d_xmm_kr, dst, src));
		}

		public void vpbroadcastmw2d(AssemblerRegisterYMM dst, AssemblerRegisterK src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpbroadcastmw2d_ymm_kr, dst, src));
		}

		public void vpbroadcastmw2d(AssemblerRegisterZMM dst, AssemblerRegisterK src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpbroadcastmw2d_zmm_kr, dst, src));
		}

		public void vpbroadcastq(AssemblerRegisterXMM dst, AssemblerRegister64 src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpbroadcastq_xmm_k1z_r64, dst, src), dst.Flags);
		}

		public void vpbroadcastq(AssemblerRegisterYMM dst, AssemblerRegister64 src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpbroadcastq_ymm_k1z_r64, dst, src), dst.Flags);
		}

		public void vpbroadcastq(AssemblerRegisterZMM dst, AssemblerRegister64 src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpbroadcastq_zmm_k1z_r64, dst, src), dst.Flags);
		}

		public void vpbroadcastq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpbroadcastq_xmm_xmmm64 : Code.EVEX_Vpbroadcastq_xmm_k1z_xmmm64);
			AddInstruction(Instruction.Create(code, dst, src), dst.Flags);
		}

		public void vpbroadcastq(AssemblerRegisterYMM dst, AssemblerRegisterXMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpbroadcastq_ymm_xmmm64 : Code.EVEX_Vpbroadcastq_ymm_k1z_xmmm64);
			AddInstruction(Instruction.Create(code, dst, src), dst.Flags);
		}

		public void vpbroadcastq(AssemblerRegisterZMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpbroadcastq_zmm_k1z_xmmm64, dst, src), dst.Flags);
		}

		public void vpbroadcastq(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpbroadcastq_xmm_xmmm64 : Code.EVEX_Vpbroadcastq_xmm_k1z_xmmm64);
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory), dst.Flags);
		}

		public void vpbroadcastq(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpbroadcastq_ymm_xmmm64 : Code.EVEX_Vpbroadcastq_ymm_k1z_xmmm64);
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory), dst.Flags);
		}

		public void vpbroadcastq(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpbroadcastq_zmm_k1z_xmmm64, register, in memory), dst.Flags);
		}

		public void vpbroadcastw(AssemblerRegisterXMM dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpbroadcastw_xmm_k1z_r32, dst, src), dst.Flags);
		}

		public void vpbroadcastw(AssemblerRegisterYMM dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpbroadcastw_ymm_k1z_r32, dst, src), dst.Flags);
		}

		public void vpbroadcastw(AssemblerRegisterZMM dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpbroadcastw_zmm_k1z_r32, dst, src), dst.Flags);
		}

		public void vpbroadcastw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpbroadcastw_xmm_xmmm16 : Code.EVEX_Vpbroadcastw_xmm_k1z_xmmm16);
			AddInstruction(Instruction.Create(code, dst, src), dst.Flags);
		}

		public void vpbroadcastw(AssemblerRegisterYMM dst, AssemblerRegisterXMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpbroadcastw_ymm_xmmm16 : Code.EVEX_Vpbroadcastw_ymm_k1z_xmmm16);
			AddInstruction(Instruction.Create(code, dst, src), dst.Flags);
		}

		public void vpbroadcastw(AssemblerRegisterZMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpbroadcastw_zmm_k1z_xmmm16, dst, src), dst.Flags);
		}

		public void vpbroadcastw(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpbroadcastw_xmm_xmmm16 : Code.EVEX_Vpbroadcastw_xmm_k1z_xmmm16);
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory), dst.Flags);
		}

		public void vpbroadcastw(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpbroadcastw_ymm_xmmm16 : Code.EVEX_Vpbroadcastw_ymm_k1z_xmmm16);
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory), dst.Flags);
		}

		public void vpbroadcastw(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpbroadcastw_zmm_k1z_xmmm16, register, in memory), dst.Flags);
		}

		public void vpclmulhqhqdq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpclmulqdq(dst, src1, src2, 17);
		}

		public void vpclmulhqhqdq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vpclmulqdq(dst, src1, src2, 17);
		}

		public void vpclmulhqhqdq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vpclmulqdq(dst, src1, src2, 17);
		}

		public void vpclmulhqhqdq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpclmulqdq(dst, src1, src2, 17);
		}

		public void vpclmulhqhqdq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vpclmulqdq(dst, src1, src2, 17);
		}

		public void vpclmulhqhqdq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vpclmulqdq(dst, src1, src2, 17);
		}

		public void vpclmulhqlqdq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpclmulqdq(dst, src1, src2, 1);
		}

		public void vpclmulhqlqdq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vpclmulqdq(dst, src1, src2, 1);
		}

		public void vpclmulhqlqdq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vpclmulqdq(dst, src1, src2, 1);
		}

		public void vpclmulhqlqdq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpclmulqdq(dst, src1, src2, 1);
		}

		public void vpclmulhqlqdq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vpclmulqdq(dst, src1, src2, 1);
		}

		public void vpclmulhqlqdq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vpclmulqdq(dst, src1, src2, 1);
		}

		public void vpclmullqhqdq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpclmulqdq(dst, src1, src2, 16);
		}

		public void vpclmullqhqdq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vpclmulqdq(dst, src1, src2, 16);
		}

		public void vpclmullqhqdq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vpclmulqdq(dst, src1, src2, 16);
		}

		public void vpclmullqhqdq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpclmulqdq(dst, src1, src2, 16);
		}

		public void vpclmullqhqdq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vpclmulqdq(dst, src1, src2, 16);
		}

		public void vpclmullqhqdq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vpclmulqdq(dst, src1, src2, 16);
		}

		public void vpclmullqlqdq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpclmulqdq(dst, src1, src2, 0);
		}

		public void vpclmullqlqdq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vpclmulqdq(dst, src1, src2, 0);
		}

		public void vpclmullqlqdq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vpclmulqdq(dst, src1, src2, 0);
		}

		public void vpclmullqlqdq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpclmulqdq(dst, src1, src2, 0);
		}

		public void vpclmullqlqdq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vpclmulqdq(dst, src1, src2, 0);
		}

		public void vpclmullqlqdq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vpclmulqdq(dst, src1, src2, 0);
		}

		public void vpclmulqdq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, sbyte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpclmulqdq_xmm_xmm_xmmm128_imm8 : Code.EVEX_Vpclmulqdq_xmm_xmm_xmmm128_imm8);
			AddInstruction(Instruction.Create(code, dst, src1, src2, imm));
		}

		public void vpclmulqdq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, sbyte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpclmulqdq_ymm_ymm_ymmm256_imm8 : Code.EVEX_Vpclmulqdq_ymm_ymm_ymmm256_imm8);
			AddInstruction(Instruction.Create(code, dst, src1, src2, imm));
		}

		public void vpclmulqdq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpclmulqdq_zmm_zmm_zmmm512_imm8, dst, src1, src2, imm));
		}

		public void vpclmulqdq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpclmulqdq_xmm_xmm_xmmm128_imm8 : Code.EVEX_Vpclmulqdq_xmm_xmm_xmmm128_imm8);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory, imm));
		}

		public void vpclmulqdq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpclmulqdq_ymm_ymm_ymmm256_imm8 : Code.EVEX_Vpclmulqdq_ymm_ymm_ymmm256_imm8);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory, imm));
		}

		public void vpclmulqdq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpclmulqdq_zmm_zmm_zmmm512_imm8, register, register2, in memory, imm));
		}

		public void vpclmulqdq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, byte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpclmulqdq_xmm_xmm_xmmm128_imm8 : Code.EVEX_Vpclmulqdq_xmm_xmm_xmmm128_imm8);
			AddInstruction(Instruction.Create(code, (Register)dst, (Register)src1, (Register)src2, (uint)imm));
		}

		public void vpclmulqdq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, byte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpclmulqdq_ymm_ymm_ymmm256_imm8 : Code.EVEX_Vpclmulqdq_ymm_ymm_ymmm256_imm8);
			AddInstruction(Instruction.Create(code, (Register)dst, (Register)src1, (Register)src2, (uint)imm));
		}

		public void vpclmulqdq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpclmulqdq_zmm_zmm_zmmm512_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm));
		}

		public void vpclmulqdq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpclmulqdq_xmm_xmm_xmmm128_imm8 : Code.EVEX_Vpclmulqdq_xmm_xmm_xmmm128_imm8);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory, (uint)imm));
		}

		public void vpclmulqdq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpclmulqdq_ymm_ymm_ymmm256_imm8 : Code.EVEX_Vpclmulqdq_ymm_ymm_ymmm256_imm8);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory, (uint)imm));
		}

		public void vpclmulqdq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpclmulqdq_zmm_zmm_zmmm512_imm8, register, register2, in memory, (uint)imm));
		}

		public void vpcmov(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, AssemblerRegisterXMM src3)
		{
			AddInstruction(Instruction.Create(Code.XOP_Vpcmov_xmm_xmm_xmmm128_xmm, dst, src1, src2, src3));
		}

		public void vpcmov(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, AssemblerRegisterXMM src3)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Vpcmov_xmm_xmm_xmmm128_xmm, register, register2, in memory, src3));
		}

		public void vpcmov(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, AssemblerRegisterYMM src3)
		{
			AddInstruction(Instruction.Create(Code.XOP_Vpcmov_ymm_ymm_ymmm256_ymm, dst, src1, src2, src3));
		}

		public void vpcmov(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, AssemblerRegisterYMM src3)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Vpcmov_ymm_ymm_ymmm256_ymm, register, register2, in memory, src3));
		}

		public void vpcmov(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, AssemblerMemoryOperand src3)
		{
			Register register = dst;
			Register register2 = src1;
			Register register3 = src2;
			MemoryOperand memory = src3.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Vpcmov_xmm_xmm_xmm_xmmm128, register, register2, register3, in memory));
		}

		public void vpcmov(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, AssemblerMemoryOperand src3)
		{
			Register register = dst;
			Register register2 = src1;
			Register register3 = src2;
			MemoryOperand memory = src3.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Vpcmov_ymm_ymm_ymm_ymmm256, register, register2, register3, in memory));
		}

		public void vpcmpb(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpb_kr_k1_xmm_xmmm128_imm8, dst, src1, src2, imm), dst.Flags);
		}

		public void vpcmpb(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpb_kr_k1_ymm_ymmm256_imm8, dst, src1, src2, imm), dst.Flags);
		}

		public void vpcmpb(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpb_kr_k1_zmm_zmmm512_imm8, dst, src1, src2, imm), dst.Flags);
		}

		public void vpcmpb(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpb_kr_k1_xmm_xmmm128_imm8, register, register2, in memory, imm), dst.Flags);
		}

		public void vpcmpb(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpb_kr_k1_ymm_ymmm256_imm8, register, register2, in memory, imm), dst.Flags);
		}

		public void vpcmpb(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpb_kr_k1_zmm_zmmm512_imm8, register, register2, in memory, imm), dst.Flags);
		}

		public void vpcmpb(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpb_kr_k1_xmm_xmmm128_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags);
		}

		public void vpcmpb(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpb_kr_k1_ymm_ymmm256_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags);
		}

		public void vpcmpb(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpb_kr_k1_zmm_zmmm512_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags);
		}

		public void vpcmpb(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpb_kr_k1_xmm_xmmm128_imm8, register, register2, in memory, (uint)imm), dst.Flags);
		}

		public void vpcmpb(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpb_kr_k1_ymm_ymmm256_imm8, register, register2, in memory, (uint)imm), dst.Flags);
		}

		public void vpcmpb(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpb_kr_k1_zmm_zmmm512_imm8, register, register2, in memory, (uint)imm), dst.Flags);
		}

		public void vpcmpd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpd_kr_k1_xmm_xmmm128b32_imm8, dst, src1, src2, imm), dst.Flags);
		}

		public void vpcmpd(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpd_kr_k1_ymm_ymmm256b32_imm8, dst, src1, src2, imm), dst.Flags);
		}

		public void vpcmpd(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpd_kr_k1_zmm_zmmm512b32_imm8, dst, src1, src2, imm), dst.Flags);
		}

		public void vpcmpd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpd_kr_k1_xmm_xmmm128b32_imm8, register, register2, in memory, imm), dst.Flags | src2.Flags);
		}

		public void vpcmpd(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpd_kr_k1_ymm_ymmm256b32_imm8, register, register2, in memory, imm), dst.Flags | src2.Flags);
		}

		public void vpcmpd(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpd_kr_k1_zmm_zmmm512b32_imm8, register, register2, in memory, imm), dst.Flags | src2.Flags);
		}

		public void vpcmpd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpd_kr_k1_xmm_xmmm128b32_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags);
		}

		public void vpcmpd(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpd_kr_k1_ymm_ymmm256b32_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags);
		}

		public void vpcmpd(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpd_kr_k1_zmm_zmmm512b32_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags);
		}

		public void vpcmpd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpd_kr_k1_xmm_xmmm128b32_imm8, register, register2, in memory, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vpcmpd(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpd_kr_k1_ymm_ymmm256b32_imm8, register, register2, in memory, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vpcmpd(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpd_kr_k1_zmm_zmmm512b32_imm8, register, register2, in memory, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vpcmpeqb(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpeqb_kr_k1_xmm_xmmm128, dst, src1, src2), dst.Flags);
		}

		public void vpcmpeqb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vpcmpeqb_xmm_xmm_xmmm128, dst, src1, src2));
		}

		public void vpcmpeqb(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpeqb_kr_k1_ymm_ymmm256, dst, src1, src2), dst.Flags);
		}

		public void vpcmpeqb(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vpcmpeqb_ymm_ymm_ymmm256, dst, src1, src2));
		}

		public void vpcmpeqb(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpeqb_kr_k1_zmm_zmmm512, dst, src1, src2), dst.Flags);
		}

		public void vpcmpeqb(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpeqb_kr_k1_xmm_xmmm128, register, register2, in memory), dst.Flags);
		}

		public void vpcmpeqb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vpcmpeqb_xmm_xmm_xmmm128, register, register2, in memory));
		}

		public void vpcmpeqb(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpeqb_kr_k1_ymm_ymmm256, register, register2, in memory), dst.Flags);
		}

		public void vpcmpeqb(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vpcmpeqb_ymm_ymm_ymmm256, register, register2, in memory));
		}

		public void vpcmpeqb(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpeqb_kr_k1_zmm_zmmm512, register, register2, in memory), dst.Flags);
		}

		public void vpcmpeqd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpeqd_kr_k1_xmm_xmmm128b32, dst, src1, src2), dst.Flags);
		}

		public void vpcmpeqd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vpcmpeqd_xmm_xmm_xmmm128, dst, src1, src2));
		}

		public void vpcmpeqd(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpeqd_kr_k1_ymm_ymmm256b32, dst, src1, src2), dst.Flags);
		}

		public void vpcmpeqd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vpcmpeqd_ymm_ymm_ymmm256, dst, src1, src2));
		}

		public void vpcmpeqd(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpeqd_kr_k1_zmm_zmmm512b32, dst, src1, src2), dst.Flags);
		}

		public void vpcmpeqd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpeqd_kr_k1_xmm_xmmm128b32, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpcmpeqd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vpcmpeqd_xmm_xmm_xmmm128, register, register2, in memory));
		}

		public void vpcmpeqd(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpeqd_kr_k1_ymm_ymmm256b32, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpcmpeqd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vpcmpeqd_ymm_ymm_ymmm256, register, register2, in memory));
		}

		public void vpcmpeqd(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpeqd_kr_k1_zmm_zmmm512b32, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpcmpeqq(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpeqq_kr_k1_xmm_xmmm128b64, dst, src1, src2), dst.Flags);
		}

		public void vpcmpeqq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vpcmpeqq_xmm_xmm_xmmm128, dst, src1, src2));
		}

		public void vpcmpeqq(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpeqq_kr_k1_ymm_ymmm256b64, dst, src1, src2), dst.Flags);
		}

		public void vpcmpeqq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vpcmpeqq_ymm_ymm_ymmm256, dst, src1, src2));
		}

		public void vpcmpeqq(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpeqq_kr_k1_zmm_zmmm512b64, dst, src1, src2), dst.Flags);
		}

		public void vpcmpeqq(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpeqq_kr_k1_xmm_xmmm128b64, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpcmpeqq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vpcmpeqq_xmm_xmm_xmmm128, register, register2, in memory));
		}

		public void vpcmpeqq(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpeqq_kr_k1_ymm_ymmm256b64, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpcmpeqq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vpcmpeqq_ymm_ymm_ymmm256, register, register2, in memory));
		}

		public void vpcmpeqq(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpeqq_kr_k1_zmm_zmmm512b64, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpcmpequb(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcmpub(dst, src1, src2, 0);
		}

		public void vpcmpequb(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vpcmpub(dst, src1, src2, 0);
		}

		public void vpcmpequb(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vpcmpub(dst, src1, src2, 0);
		}

		public void vpcmpequb(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpub(dst, src1, src2, 0);
		}

		public void vpcmpequb(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpub(dst, src1, src2, 0);
		}

		public void vpcmpequb(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpub(dst, src1, src2, 0);
		}

		public void vpcmpequd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcmpud(dst, src1, src2, 0);
		}

		public void vpcmpequd(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vpcmpud(dst, src1, src2, 0);
		}

		public void vpcmpequd(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vpcmpud(dst, src1, src2, 0);
		}

		public void vpcmpequd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpud(dst, src1, src2, 0);
		}

		public void vpcmpequd(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpud(dst, src1, src2, 0);
		}

		public void vpcmpequd(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpud(dst, src1, src2, 0);
		}

		public void vpcmpequq(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcmpuq(dst, src1, src2, 0);
		}

		public void vpcmpequq(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vpcmpuq(dst, src1, src2, 0);
		}

		public void vpcmpequq(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vpcmpuq(dst, src1, src2, 0);
		}

		public void vpcmpequq(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpuq(dst, src1, src2, 0);
		}

		public void vpcmpequq(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpuq(dst, src1, src2, 0);
		}

		public void vpcmpequq(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpuq(dst, src1, src2, 0);
		}

		public void vpcmpequw(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcmpuw(dst, src1, src2, 0);
		}

		public void vpcmpequw(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vpcmpuw(dst, src1, src2, 0);
		}

		public void vpcmpequw(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vpcmpuw(dst, src1, src2, 0);
		}

		public void vpcmpequw(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpuw(dst, src1, src2, 0);
		}

		public void vpcmpequw(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpuw(dst, src1, src2, 0);
		}

		public void vpcmpequw(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpuw(dst, src1, src2, 0);
		}

		public void vpcmpeqw(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpeqw_kr_k1_xmm_xmmm128, dst, src1, src2), dst.Flags);
		}

		public void vpcmpeqw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vpcmpeqw_xmm_xmm_xmmm128, dst, src1, src2));
		}

		public void vpcmpeqw(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpeqw_kr_k1_ymm_ymmm256, dst, src1, src2), dst.Flags);
		}

		public void vpcmpeqw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vpcmpeqw_ymm_ymm_ymmm256, dst, src1, src2));
		}

		public void vpcmpeqw(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpeqw_kr_k1_zmm_zmmm512, dst, src1, src2), dst.Flags);
		}

		public void vpcmpeqw(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpeqw_kr_k1_xmm_xmmm128, register, register2, in memory), dst.Flags);
		}

		public void vpcmpeqw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vpcmpeqw_xmm_xmm_xmmm128, register, register2, in memory));
		}

		public void vpcmpeqw(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpeqw_kr_k1_ymm_ymmm256, register, register2, in memory), dst.Flags);
		}

		public void vpcmpeqw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vpcmpeqw_ymm_ymm_ymmm256, register, register2, in memory));
		}

		public void vpcmpeqw(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpeqw_kr_k1_zmm_zmmm512, register, register2, in memory), dst.Flags);
		}

		public void vpcmpestri(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vpcmpestri_xmm_xmmm128_imm8, dst, src1, imm));
		}

		public void vpcmpestri(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vpcmpestri_xmm_xmmm128_imm8, register, in memory, imm));
		}

		public void vpcmpestri(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vpcmpestri_xmm_xmmm128_imm8, (Register)dst, (Register)src1, (uint)imm));
		}

		public void vpcmpestri(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vpcmpestri_xmm_xmmm128_imm8, register, in memory, (uint)imm));
		}

		public void vpcmpestri64(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vpcmpestri64_xmm_xmmm128_imm8, dst, src1, imm));
		}

		public void vpcmpestri64(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vpcmpestri64_xmm_xmmm128_imm8, register, in memory, imm));
		}

		public void vpcmpestri64(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vpcmpestri64_xmm_xmmm128_imm8, (Register)dst, (Register)src1, (uint)imm));
		}

		public void vpcmpestri64(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vpcmpestri64_xmm_xmmm128_imm8, register, in memory, (uint)imm));
		}

		public void vpcmpestrm(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vpcmpestrm_xmm_xmmm128_imm8, dst, src1, imm));
		}

		public void vpcmpestrm(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vpcmpestrm_xmm_xmmm128_imm8, register, in memory, imm));
		}

		public void vpcmpestrm(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vpcmpestrm_xmm_xmmm128_imm8, (Register)dst, (Register)src1, (uint)imm));
		}

		public void vpcmpestrm(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vpcmpestrm_xmm_xmmm128_imm8, register, in memory, (uint)imm));
		}

		public void vpcmpestrm64(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vpcmpestrm64_xmm_xmmm128_imm8, dst, src1, imm));
		}

		public void vpcmpestrm64(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vpcmpestrm64_xmm_xmmm128_imm8, register, in memory, imm));
		}

		public void vpcmpestrm64(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vpcmpestrm64_xmm_xmmm128_imm8, (Register)dst, (Register)src1, (uint)imm));
		}

		public void vpcmpestrm64(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vpcmpestrm64_xmm_xmmm128_imm8, register, in memory, (uint)imm));
		}

		public void vpcmpfalseb(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcmpb(dst, src1, src2, 3);
		}

		public void vpcmpfalseb(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vpcmpb(dst, src1, src2, 3);
		}

		public void vpcmpfalseb(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vpcmpb(dst, src1, src2, 3);
		}

		public void vpcmpfalseb(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpb(dst, src1, src2, 3);
		}

		public void vpcmpfalseb(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpb(dst, src1, src2, 3);
		}

		public void vpcmpfalseb(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpb(dst, src1, src2, 3);
		}

		public void vpcmpfalsed(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcmpd(dst, src1, src2, 3);
		}

		public void vpcmpfalsed(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vpcmpd(dst, src1, src2, 3);
		}

		public void vpcmpfalsed(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vpcmpd(dst, src1, src2, 3);
		}

		public void vpcmpfalsed(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpd(dst, src1, src2, 3);
		}

		public void vpcmpfalsed(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpd(dst, src1, src2, 3);
		}

		public void vpcmpfalsed(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpd(dst, src1, src2, 3);
		}

		public void vpcmpfalseq(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcmpq(dst, src1, src2, 3);
		}

		public void vpcmpfalseq(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vpcmpq(dst, src1, src2, 3);
		}

		public void vpcmpfalseq(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vpcmpq(dst, src1, src2, 3);
		}

		public void vpcmpfalseq(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpq(dst, src1, src2, 3);
		}

		public void vpcmpfalseq(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpq(dst, src1, src2, 3);
		}

		public void vpcmpfalseq(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpq(dst, src1, src2, 3);
		}

		public void vpcmpfalseub(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcmpub(dst, src1, src2, 3);
		}

		public void vpcmpfalseub(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vpcmpub(dst, src1, src2, 3);
		}

		public void vpcmpfalseub(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vpcmpub(dst, src1, src2, 3);
		}

		public void vpcmpfalseub(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpub(dst, src1, src2, 3);
		}

		public void vpcmpfalseub(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpub(dst, src1, src2, 3);
		}

		public void vpcmpfalseub(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpub(dst, src1, src2, 3);
		}

		public void vpcmpfalseud(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcmpud(dst, src1, src2, 3);
		}

		public void vpcmpfalseud(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vpcmpud(dst, src1, src2, 3);
		}

		public void vpcmpfalseud(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vpcmpud(dst, src1, src2, 3);
		}

		public void vpcmpfalseud(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpud(dst, src1, src2, 3);
		}

		public void vpcmpfalseud(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpud(dst, src1, src2, 3);
		}

		public void vpcmpfalseud(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpud(dst, src1, src2, 3);
		}

		public void vpcmpfalseuq(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcmpuq(dst, src1, src2, 3);
		}

		public void vpcmpfalseuq(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vpcmpuq(dst, src1, src2, 3);
		}

		public void vpcmpfalseuq(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vpcmpuq(dst, src1, src2, 3);
		}

		public void vpcmpfalseuq(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpuq(dst, src1, src2, 3);
		}

		public void vpcmpfalseuq(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpuq(dst, src1, src2, 3);
		}

		public void vpcmpfalseuq(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpuq(dst, src1, src2, 3);
		}

		public void vpcmpfalseuw(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcmpuw(dst, src1, src2, 3);
		}

		public void vpcmpfalseuw(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vpcmpuw(dst, src1, src2, 3);
		}

		public void vpcmpfalseuw(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vpcmpuw(dst, src1, src2, 3);
		}

		public void vpcmpfalseuw(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpuw(dst, src1, src2, 3);
		}

		public void vpcmpfalseuw(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpuw(dst, src1, src2, 3);
		}

		public void vpcmpfalseuw(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpuw(dst, src1, src2, 3);
		}

		public void vpcmpfalsew(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcmpw(dst, src1, src2, 3);
		}

		public void vpcmpfalsew(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vpcmpw(dst, src1, src2, 3);
		}

		public void vpcmpfalsew(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vpcmpw(dst, src1, src2, 3);
		}

		public void vpcmpfalsew(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpw(dst, src1, src2, 3);
		}

		public void vpcmpfalsew(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpw(dst, src1, src2, 3);
		}

		public void vpcmpfalsew(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpw(dst, src1, src2, 3);
		}

		public void vpcmpgtb(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpgtb_kr_k1_xmm_xmmm128, dst, src1, src2), dst.Flags);
		}

		public void vpcmpgtb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vpcmpgtb_xmm_xmm_xmmm128, dst, src1, src2));
		}

		public void vpcmpgtb(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpgtb_kr_k1_ymm_ymmm256, dst, src1, src2), dst.Flags);
		}

		public void vpcmpgtb(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vpcmpgtb_ymm_ymm_ymmm256, dst, src1, src2));
		}

		public void vpcmpgtb(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpgtb_kr_k1_zmm_zmmm512, dst, src1, src2), dst.Flags);
		}

		public void vpcmpgtb(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpgtb_kr_k1_xmm_xmmm128, register, register2, in memory), dst.Flags);
		}

		public void vpcmpgtb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vpcmpgtb_xmm_xmm_xmmm128, register, register2, in memory));
		}

		public void vpcmpgtb(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpgtb_kr_k1_ymm_ymmm256, register, register2, in memory), dst.Flags);
		}

		public void vpcmpgtb(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vpcmpgtb_ymm_ymm_ymmm256, register, register2, in memory));
		}

		public void vpcmpgtb(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpgtb_kr_k1_zmm_zmmm512, register, register2, in memory), dst.Flags);
		}

		public void vpcmpgtd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpgtd_kr_k1_xmm_xmmm128b32, dst, src1, src2), dst.Flags);
		}

		public void vpcmpgtd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vpcmpgtd_xmm_xmm_xmmm128, dst, src1, src2));
		}

		public void vpcmpgtd(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpgtd_kr_k1_ymm_ymmm256b32, dst, src1, src2), dst.Flags);
		}

		public void vpcmpgtd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vpcmpgtd_ymm_ymm_ymmm256, dst, src1, src2));
		}

		public void vpcmpgtd(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpgtd_kr_k1_zmm_zmmm512b32, dst, src1, src2), dst.Flags);
		}

		public void vpcmpgtd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpgtd_kr_k1_xmm_xmmm128b32, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpcmpgtd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vpcmpgtd_xmm_xmm_xmmm128, register, register2, in memory));
		}

		public void vpcmpgtd(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpgtd_kr_k1_ymm_ymmm256b32, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpcmpgtd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vpcmpgtd_ymm_ymm_ymmm256, register, register2, in memory));
		}

		public void vpcmpgtd(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpgtd_kr_k1_zmm_zmmm512b32, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpcmpgtq(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpgtq_kr_k1_xmm_xmmm128b64, dst, src1, src2), dst.Flags);
		}

		public void vpcmpgtq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vpcmpgtq_xmm_xmm_xmmm128, dst, src1, src2));
		}

		public void vpcmpgtq(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpgtq_kr_k1_ymm_ymmm256b64, dst, src1, src2), dst.Flags);
		}

		public void vpcmpgtq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vpcmpgtq_ymm_ymm_ymmm256, dst, src1, src2));
		}

		public void vpcmpgtq(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpgtq_kr_k1_zmm_zmmm512b64, dst, src1, src2), dst.Flags);
		}

		public void vpcmpgtq(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpgtq_kr_k1_xmm_xmmm128b64, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpcmpgtq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vpcmpgtq_xmm_xmm_xmmm128, register, register2, in memory));
		}

		public void vpcmpgtq(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpgtq_kr_k1_ymm_ymmm256b64, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpcmpgtq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vpcmpgtq_ymm_ymm_ymmm256, register, register2, in memory));
		}

		public void vpcmpgtq(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpgtq_kr_k1_zmm_zmmm512b64, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpcmpgtw(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpgtw_kr_k1_xmm_xmmm128, dst, src1, src2), dst.Flags);
		}

		public void vpcmpgtw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vpcmpgtw_xmm_xmm_xmmm128, dst, src1, src2));
		}

		public void vpcmpgtw(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpgtw_kr_k1_ymm_ymmm256, dst, src1, src2), dst.Flags);
		}

		public void vpcmpgtw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vpcmpgtw_ymm_ymm_ymmm256, dst, src1, src2));
		}

		public void vpcmpgtw(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpgtw_kr_k1_zmm_zmmm512, dst, src1, src2), dst.Flags);
		}

		public void vpcmpgtw(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpgtw_kr_k1_xmm_xmmm128, register, register2, in memory), dst.Flags);
		}

		public void vpcmpgtw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vpcmpgtw_xmm_xmm_xmmm128, register, register2, in memory));
		}

		public void vpcmpgtw(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpgtw_kr_k1_ymm_ymmm256, register, register2, in memory), dst.Flags);
		}

		public void vpcmpgtw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vpcmpgtw_ymm_ymm_ymmm256, register, register2, in memory));
		}

		public void vpcmpgtw(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpgtw_kr_k1_zmm_zmmm512, register, register2, in memory), dst.Flags);
		}

		public void vpcmpistri(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vpcmpistri_xmm_xmmm128_imm8, dst, src1, imm));
		}

		public void vpcmpistri(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vpcmpistri_xmm_xmmm128_imm8, register, in memory, imm));
		}

		public void vpcmpistri(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vpcmpistri_xmm_xmmm128_imm8, (Register)dst, (Register)src1, (uint)imm));
		}

		public void vpcmpistri(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vpcmpistri_xmm_xmmm128_imm8, register, in memory, (uint)imm));
		}

		public void vpcmpistrm(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vpcmpistrm_xmm_xmmm128_imm8, dst, src1, imm));
		}

		public void vpcmpistrm(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vpcmpistrm_xmm_xmmm128_imm8, register, in memory, imm));
		}

		public void vpcmpistrm(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vpcmpistrm_xmm_xmmm128_imm8, (Register)dst, (Register)src1, (uint)imm));
		}

		public void vpcmpistrm(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vpcmpistrm_xmm_xmmm128_imm8, register, in memory, (uint)imm));
		}

		public void vpcmpleb(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcmpb(dst, src1, src2, 2);
		}

		public void vpcmpleb(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vpcmpb(dst, src1, src2, 2);
		}

		public void vpcmpleb(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vpcmpb(dst, src1, src2, 2);
		}

		public void vpcmpleb(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpb(dst, src1, src2, 2);
		}

		public void vpcmpleb(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpb(dst, src1, src2, 2);
		}

		public void vpcmpleb(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpb(dst, src1, src2, 2);
		}

		public void vpcmpled(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcmpd(dst, src1, src2, 2);
		}

		public void vpcmpled(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vpcmpd(dst, src1, src2, 2);
		}

		public void vpcmpled(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vpcmpd(dst, src1, src2, 2);
		}

		public void vpcmpled(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpd(dst, src1, src2, 2);
		}

		public void vpcmpled(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpd(dst, src1, src2, 2);
		}

		public void vpcmpled(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpd(dst, src1, src2, 2);
		}

		public void vpcmpleq(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcmpq(dst, src1, src2, 2);
		}

		public void vpcmpleq(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vpcmpq(dst, src1, src2, 2);
		}

		public void vpcmpleq(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vpcmpq(dst, src1, src2, 2);
		}

		public void vpcmpleq(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpq(dst, src1, src2, 2);
		}

		public void vpcmpleq(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpq(dst, src1, src2, 2);
		}

		public void vpcmpleq(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpq(dst, src1, src2, 2);
		}

		public void vpcmpleub(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcmpub(dst, src1, src2, 2);
		}

		public void vpcmpleub(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vpcmpub(dst, src1, src2, 2);
		}

		public void vpcmpleub(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vpcmpub(dst, src1, src2, 2);
		}

		public void vpcmpleub(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpub(dst, src1, src2, 2);
		}

		public void vpcmpleub(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpub(dst, src1, src2, 2);
		}

		public void vpcmpleub(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpub(dst, src1, src2, 2);
		}

		public void vpcmpleud(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcmpud(dst, src1, src2, 2);
		}

		public void vpcmpleud(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vpcmpud(dst, src1, src2, 2);
		}

		public void vpcmpleud(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vpcmpud(dst, src1, src2, 2);
		}

		public void vpcmpleud(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpud(dst, src1, src2, 2);
		}

		public void vpcmpleud(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpud(dst, src1, src2, 2);
		}

		public void vpcmpleud(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpud(dst, src1, src2, 2);
		}

		public void vpcmpleuq(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcmpuq(dst, src1, src2, 2);
		}

		public void vpcmpleuq(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vpcmpuq(dst, src1, src2, 2);
		}

		public void vpcmpleuq(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vpcmpuq(dst, src1, src2, 2);
		}

		public void vpcmpleuq(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpuq(dst, src1, src2, 2);
		}

		public void vpcmpleuq(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpuq(dst, src1, src2, 2);
		}

		public void vpcmpleuq(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpuq(dst, src1, src2, 2);
		}

		public void vpcmpleuw(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcmpuw(dst, src1, src2, 2);
		}

		public void vpcmpleuw(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vpcmpuw(dst, src1, src2, 2);
		}

		public void vpcmpleuw(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vpcmpuw(dst, src1, src2, 2);
		}

		public void vpcmpleuw(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpuw(dst, src1, src2, 2);
		}

		public void vpcmpleuw(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpuw(dst, src1, src2, 2);
		}

		public void vpcmpleuw(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpuw(dst, src1, src2, 2);
		}

		public void vpcmplew(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcmpw(dst, src1, src2, 2);
		}

		public void vpcmplew(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vpcmpw(dst, src1, src2, 2);
		}

		public void vpcmplew(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vpcmpw(dst, src1, src2, 2);
		}

		public void vpcmplew(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpw(dst, src1, src2, 2);
		}

		public void vpcmplew(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpw(dst, src1, src2, 2);
		}

		public void vpcmplew(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpw(dst, src1, src2, 2);
		}

		public void vpcmpltb(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcmpb(dst, src1, src2, 1);
		}

		public void vpcmpltb(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vpcmpb(dst, src1, src2, 1);
		}

		public void vpcmpltb(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vpcmpb(dst, src1, src2, 1);
		}

		public void vpcmpltb(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpb(dst, src1, src2, 1);
		}

		public void vpcmpltb(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpb(dst, src1, src2, 1);
		}

		public void vpcmpltb(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpb(dst, src1, src2, 1);
		}

		public void vpcmpltd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcmpd(dst, src1, src2, 1);
		}

		public void vpcmpltd(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vpcmpd(dst, src1, src2, 1);
		}

		public void vpcmpltd(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vpcmpd(dst, src1, src2, 1);
		}

		public void vpcmpltd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpd(dst, src1, src2, 1);
		}

		public void vpcmpltd(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpd(dst, src1, src2, 1);
		}

		public void vpcmpltd(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpd(dst, src1, src2, 1);
		}

		public void vpcmpltq(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcmpq(dst, src1, src2, 1);
		}

		public void vpcmpltq(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vpcmpq(dst, src1, src2, 1);
		}

		public void vpcmpltq(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vpcmpq(dst, src1, src2, 1);
		}

		public void vpcmpltq(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpq(dst, src1, src2, 1);
		}

		public void vpcmpltq(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpq(dst, src1, src2, 1);
		}

		public void vpcmpltq(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpq(dst, src1, src2, 1);
		}

		public void vpcmpltub(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcmpub(dst, src1, src2, 1);
		}

		public void vpcmpltub(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vpcmpub(dst, src1, src2, 1);
		}

		public void vpcmpltub(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vpcmpub(dst, src1, src2, 1);
		}

		public void vpcmpltub(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpub(dst, src1, src2, 1);
		}

		public void vpcmpltub(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpub(dst, src1, src2, 1);
		}

		public void vpcmpltub(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpub(dst, src1, src2, 1);
		}

		public void vpcmpltud(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcmpud(dst, src1, src2, 1);
		}

		public void vpcmpltud(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vpcmpud(dst, src1, src2, 1);
		}

		public void vpcmpltud(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vpcmpud(dst, src1, src2, 1);
		}

		public void vpcmpltud(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpud(dst, src1, src2, 1);
		}

		public void vpcmpltud(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpud(dst, src1, src2, 1);
		}

		public void vpcmpltud(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpud(dst, src1, src2, 1);
		}

		public void vpcmpltuq(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcmpuq(dst, src1, src2, 1);
		}

		public void vpcmpltuq(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vpcmpuq(dst, src1, src2, 1);
		}

		public void vpcmpltuq(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vpcmpuq(dst, src1, src2, 1);
		}

		public void vpcmpltuq(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpuq(dst, src1, src2, 1);
		}

		public void vpcmpltuq(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpuq(dst, src1, src2, 1);
		}

		public void vpcmpltuq(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpuq(dst, src1, src2, 1);
		}

		public void vpcmpltuw(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcmpuw(dst, src1, src2, 1);
		}

		public void vpcmpltuw(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vpcmpuw(dst, src1, src2, 1);
		}

		public void vpcmpltuw(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vpcmpuw(dst, src1, src2, 1);
		}

		public void vpcmpltuw(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpuw(dst, src1, src2, 1);
		}

		public void vpcmpltuw(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpuw(dst, src1, src2, 1);
		}

		public void vpcmpltuw(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpuw(dst, src1, src2, 1);
		}

		public void vpcmpltw(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcmpw(dst, src1, src2, 1);
		}

		public void vpcmpltw(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vpcmpw(dst, src1, src2, 1);
		}

		public void vpcmpltw(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vpcmpw(dst, src1, src2, 1);
		}

		public void vpcmpltw(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpw(dst, src1, src2, 1);
		}

		public void vpcmpltw(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpw(dst, src1, src2, 1);
		}

		public void vpcmpltw(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpw(dst, src1, src2, 1);
		}

		public void vpcmpneqb(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcmpb(dst, src1, src2, 4);
		}

		public void vpcmpneqb(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vpcmpb(dst, src1, src2, 4);
		}

		public void vpcmpneqb(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vpcmpb(dst, src1, src2, 4);
		}

		public void vpcmpneqb(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpb(dst, src1, src2, 4);
		}

		public void vpcmpneqb(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpb(dst, src1, src2, 4);
		}

		public void vpcmpneqb(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpb(dst, src1, src2, 4);
		}

		public void vpcmpneqd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcmpd(dst, src1, src2, 4);
		}

		public void vpcmpneqd(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vpcmpd(dst, src1, src2, 4);
		}

		public void vpcmpneqd(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vpcmpd(dst, src1, src2, 4);
		}

		public void vpcmpneqd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpd(dst, src1, src2, 4);
		}

		public void vpcmpneqd(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpd(dst, src1, src2, 4);
		}

		public void vpcmpneqd(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpd(dst, src1, src2, 4);
		}

		public void vpcmpneqq(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcmpq(dst, src1, src2, 4);
		}

		public void vpcmpneqq(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vpcmpq(dst, src1, src2, 4);
		}

		public void vpcmpneqq(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vpcmpq(dst, src1, src2, 4);
		}

		public void vpcmpneqq(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpq(dst, src1, src2, 4);
		}

		public void vpcmpneqq(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpq(dst, src1, src2, 4);
		}

		public void vpcmpneqq(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpq(dst, src1, src2, 4);
		}

		public void vpcmpnequb(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcmpub(dst, src1, src2, 4);
		}

		public void vpcmpnequb(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vpcmpub(dst, src1, src2, 4);
		}

		public void vpcmpnequb(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vpcmpub(dst, src1, src2, 4);
		}

		public void vpcmpnequb(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpub(dst, src1, src2, 4);
		}

		public void vpcmpnequb(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpub(dst, src1, src2, 4);
		}

		public void vpcmpnequb(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpub(dst, src1, src2, 4);
		}

		public void vpcmpnequd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcmpud(dst, src1, src2, 4);
		}

		public void vpcmpnequd(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vpcmpud(dst, src1, src2, 4);
		}

		public void vpcmpnequd(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vpcmpud(dst, src1, src2, 4);
		}

		public void vpcmpnequd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpud(dst, src1, src2, 4);
		}

		public void vpcmpnequd(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpud(dst, src1, src2, 4);
		}

		public void vpcmpnequd(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpud(dst, src1, src2, 4);
		}

		public void vpcmpnequq(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcmpuq(dst, src1, src2, 4);
		}

		public void vpcmpnequq(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vpcmpuq(dst, src1, src2, 4);
		}

		public void vpcmpnequq(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vpcmpuq(dst, src1, src2, 4);
		}

		public void vpcmpnequq(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpuq(dst, src1, src2, 4);
		}

		public void vpcmpnequq(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpuq(dst, src1, src2, 4);
		}

		public void vpcmpnequq(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpuq(dst, src1, src2, 4);
		}

		public void vpcmpnequw(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcmpuw(dst, src1, src2, 4);
		}

		public void vpcmpnequw(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vpcmpuw(dst, src1, src2, 4);
		}

		public void vpcmpnequw(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vpcmpuw(dst, src1, src2, 4);
		}

		public void vpcmpnequw(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpuw(dst, src1, src2, 4);
		}

		public void vpcmpnequw(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpuw(dst, src1, src2, 4);
		}

		public void vpcmpnequw(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpuw(dst, src1, src2, 4);
		}

		public void vpcmpneqw(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcmpw(dst, src1, src2, 4);
		}

		public void vpcmpneqw(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vpcmpw(dst, src1, src2, 4);
		}

		public void vpcmpneqw(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vpcmpw(dst, src1, src2, 4);
		}

		public void vpcmpneqw(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpw(dst, src1, src2, 4);
		}

		public void vpcmpneqw(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpw(dst, src1, src2, 4);
		}

		public void vpcmpneqw(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpw(dst, src1, src2, 4);
		}

		public void vpcmpnleb(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcmpb(dst, src1, src2, 6);
		}

		public void vpcmpnleb(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vpcmpb(dst, src1, src2, 6);
		}

		public void vpcmpnleb(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vpcmpb(dst, src1, src2, 6);
		}

		public void vpcmpnleb(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpb(dst, src1, src2, 6);
		}

		public void vpcmpnleb(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpb(dst, src1, src2, 6);
		}

		public void vpcmpnleb(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpb(dst, src1, src2, 6);
		}

		public void vpcmpnled(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcmpd(dst, src1, src2, 6);
		}

		public void vpcmpnled(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vpcmpd(dst, src1, src2, 6);
		}

		public void vpcmpnled(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vpcmpd(dst, src1, src2, 6);
		}

		public void vpcmpnled(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpd(dst, src1, src2, 6);
		}

		public void vpcmpnled(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpd(dst, src1, src2, 6);
		}

		public void vpcmpnled(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpd(dst, src1, src2, 6);
		}

		public void vpcmpnleq(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcmpq(dst, src1, src2, 6);
		}

		public void vpcmpnleq(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vpcmpq(dst, src1, src2, 6);
		}

		public void vpcmpnleq(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vpcmpq(dst, src1, src2, 6);
		}

		public void vpcmpnleq(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpq(dst, src1, src2, 6);
		}

		public void vpcmpnleq(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpq(dst, src1, src2, 6);
		}

		public void vpcmpnleq(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpq(dst, src1, src2, 6);
		}

		public void vpcmpnleub(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcmpub(dst, src1, src2, 6);
		}

		public void vpcmpnleub(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vpcmpub(dst, src1, src2, 6);
		}

		public void vpcmpnleub(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vpcmpub(dst, src1, src2, 6);
		}

		public void vpcmpnleub(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpub(dst, src1, src2, 6);
		}

		public void vpcmpnleub(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpub(dst, src1, src2, 6);
		}

		public void vpcmpnleub(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpub(dst, src1, src2, 6);
		}

		public void vpcmpnleud(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcmpud(dst, src1, src2, 6);
		}

		public void vpcmpnleud(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vpcmpud(dst, src1, src2, 6);
		}

		public void vpcmpnleud(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vpcmpud(dst, src1, src2, 6);
		}

		public void vpcmpnleud(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpud(dst, src1, src2, 6);
		}

		public void vpcmpnleud(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpud(dst, src1, src2, 6);
		}

		public void vpcmpnleud(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpud(dst, src1, src2, 6);
		}

		public void vpcmpnleuq(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcmpuq(dst, src1, src2, 6);
		}

		public void vpcmpnleuq(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vpcmpuq(dst, src1, src2, 6);
		}

		public void vpcmpnleuq(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vpcmpuq(dst, src1, src2, 6);
		}

		public void vpcmpnleuq(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpuq(dst, src1, src2, 6);
		}

		public void vpcmpnleuq(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpuq(dst, src1, src2, 6);
		}

		public void vpcmpnleuq(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpuq(dst, src1, src2, 6);
		}

		public void vpcmpnleuw(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcmpuw(dst, src1, src2, 6);
		}

		public void vpcmpnleuw(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vpcmpuw(dst, src1, src2, 6);
		}

		public void vpcmpnleuw(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vpcmpuw(dst, src1, src2, 6);
		}

		public void vpcmpnleuw(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpuw(dst, src1, src2, 6);
		}

		public void vpcmpnleuw(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpuw(dst, src1, src2, 6);
		}

		public void vpcmpnleuw(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpuw(dst, src1, src2, 6);
		}

		public void vpcmpnlew(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcmpw(dst, src1, src2, 6);
		}

		public void vpcmpnlew(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vpcmpw(dst, src1, src2, 6);
		}

		public void vpcmpnlew(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vpcmpw(dst, src1, src2, 6);
		}

		public void vpcmpnlew(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpw(dst, src1, src2, 6);
		}

		public void vpcmpnlew(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpw(dst, src1, src2, 6);
		}

		public void vpcmpnlew(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpw(dst, src1, src2, 6);
		}

		public void vpcmpnltb(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcmpb(dst, src1, src2, 5);
		}

		public void vpcmpnltb(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vpcmpb(dst, src1, src2, 5);
		}

		public void vpcmpnltb(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vpcmpb(dst, src1, src2, 5);
		}

		public void vpcmpnltb(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpb(dst, src1, src2, 5);
		}

		public void vpcmpnltb(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpb(dst, src1, src2, 5);
		}

		public void vpcmpnltb(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpb(dst, src1, src2, 5);
		}

		public void vpcmpnltd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcmpd(dst, src1, src2, 5);
		}

		public void vpcmpnltd(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vpcmpd(dst, src1, src2, 5);
		}

		public void vpcmpnltd(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vpcmpd(dst, src1, src2, 5);
		}

		public void vpcmpnltd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpd(dst, src1, src2, 5);
		}

		public void vpcmpnltd(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpd(dst, src1, src2, 5);
		}

		public void vpcmpnltd(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpd(dst, src1, src2, 5);
		}

		public void vpcmpnltq(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcmpq(dst, src1, src2, 5);
		}

		public void vpcmpnltq(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vpcmpq(dst, src1, src2, 5);
		}

		public void vpcmpnltq(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vpcmpq(dst, src1, src2, 5);
		}

		public void vpcmpnltq(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpq(dst, src1, src2, 5);
		}

		public void vpcmpnltq(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpq(dst, src1, src2, 5);
		}

		public void vpcmpnltq(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpq(dst, src1, src2, 5);
		}

		public void vpcmpnltub(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcmpub(dst, src1, src2, 5);
		}

		public void vpcmpnltub(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vpcmpub(dst, src1, src2, 5);
		}

		public void vpcmpnltub(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vpcmpub(dst, src1, src2, 5);
		}

		public void vpcmpnltub(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpub(dst, src1, src2, 5);
		}

		public void vpcmpnltub(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpub(dst, src1, src2, 5);
		}

		public void vpcmpnltub(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpub(dst, src1, src2, 5);
		}

		public void vpcmpnltud(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcmpud(dst, src1, src2, 5);
		}

		public void vpcmpnltud(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vpcmpud(dst, src1, src2, 5);
		}

		public void vpcmpnltud(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vpcmpud(dst, src1, src2, 5);
		}

		public void vpcmpnltud(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpud(dst, src1, src2, 5);
		}

		public void vpcmpnltud(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpud(dst, src1, src2, 5);
		}

		public void vpcmpnltud(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpud(dst, src1, src2, 5);
		}

		public void vpcmpnltuq(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcmpuq(dst, src1, src2, 5);
		}

		public void vpcmpnltuq(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vpcmpuq(dst, src1, src2, 5);
		}

		public void vpcmpnltuq(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vpcmpuq(dst, src1, src2, 5);
		}

		public void vpcmpnltuq(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpuq(dst, src1, src2, 5);
		}

		public void vpcmpnltuq(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpuq(dst, src1, src2, 5);
		}

		public void vpcmpnltuq(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpuq(dst, src1, src2, 5);
		}

		public void vpcmpnltuw(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcmpuw(dst, src1, src2, 5);
		}

		public void vpcmpnltuw(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vpcmpuw(dst, src1, src2, 5);
		}

		public void vpcmpnltuw(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vpcmpuw(dst, src1, src2, 5);
		}

		public void vpcmpnltuw(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpuw(dst, src1, src2, 5);
		}

		public void vpcmpnltuw(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpuw(dst, src1, src2, 5);
		}

		public void vpcmpnltuw(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpuw(dst, src1, src2, 5);
		}

		public void vpcmpnltw(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcmpw(dst, src1, src2, 5);
		}

		public void vpcmpnltw(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vpcmpw(dst, src1, src2, 5);
		}

		public void vpcmpnltw(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vpcmpw(dst, src1, src2, 5);
		}

		public void vpcmpnltw(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpw(dst, src1, src2, 5);
		}

		public void vpcmpnltw(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpw(dst, src1, src2, 5);
		}

		public void vpcmpnltw(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpw(dst, src1, src2, 5);
		}

		public void vpcmpq(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpq_kr_k1_xmm_xmmm128b64_imm8, dst, src1, src2, imm), dst.Flags);
		}

		public void vpcmpq(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpq_kr_k1_ymm_ymmm256b64_imm8, dst, src1, src2, imm), dst.Flags);
		}

		public void vpcmpq(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpq_kr_k1_zmm_zmmm512b64_imm8, dst, src1, src2, imm), dst.Flags);
		}

		public void vpcmpq(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpq_kr_k1_xmm_xmmm128b64_imm8, register, register2, in memory, imm), dst.Flags | src2.Flags);
		}

		public void vpcmpq(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpq_kr_k1_ymm_ymmm256b64_imm8, register, register2, in memory, imm), dst.Flags | src2.Flags);
		}

		public void vpcmpq(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpq_kr_k1_zmm_zmmm512b64_imm8, register, register2, in memory, imm), dst.Flags | src2.Flags);
		}

		public void vpcmpq(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpq_kr_k1_xmm_xmmm128b64_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags);
		}

		public void vpcmpq(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpq_kr_k1_ymm_ymmm256b64_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags);
		}

		public void vpcmpq(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpq_kr_k1_zmm_zmmm512b64_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags);
		}

		public void vpcmpq(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpq_kr_k1_xmm_xmmm128b64_imm8, register, register2, in memory, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vpcmpq(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpq_kr_k1_ymm_ymmm256b64_imm8, register, register2, in memory, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vpcmpq(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpq_kr_k1_zmm_zmmm512b64_imm8, register, register2, in memory, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vpcmptrueb(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcmpb(dst, src1, src2, 7);
		}

		public void vpcmptrueb(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vpcmpb(dst, src1, src2, 7);
		}

		public void vpcmptrueb(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vpcmpb(dst, src1, src2, 7);
		}

		public void vpcmptrueb(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpb(dst, src1, src2, 7);
		}

		public void vpcmptrueb(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpb(dst, src1, src2, 7);
		}

		public void vpcmptrueb(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpb(dst, src1, src2, 7);
		}

		public void vpcmptrued(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcmpd(dst, src1, src2, 7);
		}

		public void vpcmptrued(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vpcmpd(dst, src1, src2, 7);
		}

		public void vpcmptrued(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vpcmpd(dst, src1, src2, 7);
		}

		public void vpcmptrued(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpd(dst, src1, src2, 7);
		}

		public void vpcmptrued(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpd(dst, src1, src2, 7);
		}

		public void vpcmptrued(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpd(dst, src1, src2, 7);
		}

		public void vpcmptrueq(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcmpq(dst, src1, src2, 7);
		}

		public void vpcmptrueq(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vpcmpq(dst, src1, src2, 7);
		}

		public void vpcmptrueq(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vpcmpq(dst, src1, src2, 7);
		}

		public void vpcmptrueq(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpq(dst, src1, src2, 7);
		}

		public void vpcmptrueq(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpq(dst, src1, src2, 7);
		}

		public void vpcmptrueq(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpq(dst, src1, src2, 7);
		}

		public void vpcmptrueub(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcmpub(dst, src1, src2, 7);
		}

		public void vpcmptrueub(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vpcmpub(dst, src1, src2, 7);
		}

		public void vpcmptrueub(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vpcmpub(dst, src1, src2, 7);
		}

		public void vpcmptrueub(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpub(dst, src1, src2, 7);
		}

		public void vpcmptrueub(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpub(dst, src1, src2, 7);
		}

		public void vpcmptrueub(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpub(dst, src1, src2, 7);
		}

		public void vpcmptrueud(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcmpud(dst, src1, src2, 7);
		}

		public void vpcmptrueud(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vpcmpud(dst, src1, src2, 7);
		}

		public void vpcmptrueud(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vpcmpud(dst, src1, src2, 7);
		}

		public void vpcmptrueud(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpud(dst, src1, src2, 7);
		}

		public void vpcmptrueud(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpud(dst, src1, src2, 7);
		}

		public void vpcmptrueud(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpud(dst, src1, src2, 7);
		}

		public void vpcmptrueuq(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcmpuq(dst, src1, src2, 7);
		}

		public void vpcmptrueuq(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vpcmpuq(dst, src1, src2, 7);
		}

		public void vpcmptrueuq(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vpcmpuq(dst, src1, src2, 7);
		}

		public void vpcmptrueuq(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpuq(dst, src1, src2, 7);
		}

		public void vpcmptrueuq(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpuq(dst, src1, src2, 7);
		}

		public void vpcmptrueuq(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpuq(dst, src1, src2, 7);
		}

		public void vpcmptrueuw(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcmpuw(dst, src1, src2, 7);
		}

		public void vpcmptrueuw(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vpcmpuw(dst, src1, src2, 7);
		}

		public void vpcmptrueuw(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vpcmpuw(dst, src1, src2, 7);
		}

		public void vpcmptrueuw(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpuw(dst, src1, src2, 7);
		}

		public void vpcmptrueuw(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpuw(dst, src1, src2, 7);
		}

		public void vpcmptrueuw(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpuw(dst, src1, src2, 7);
		}

		public void vpcmptruew(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcmpw(dst, src1, src2, 7);
		}

		public void vpcmptruew(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			vpcmpw(dst, src1, src2, 7);
		}

		public void vpcmptruew(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			vpcmpw(dst, src1, src2, 7);
		}

		public void vpcmptruew(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpw(dst, src1, src2, 7);
		}

		public void vpcmptruew(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpw(dst, src1, src2, 7);
		}

		public void vpcmptruew(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			vpcmpw(dst, src1, src2, 7);
		}

		public void vpcmpub(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpub_kr_k1_xmm_xmmm128_imm8, dst, src1, src2, imm), dst.Flags);
		}

		public void vpcmpub(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpub_kr_k1_ymm_ymmm256_imm8, dst, src1, src2, imm), dst.Flags);
		}

		public void vpcmpub(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpub_kr_k1_zmm_zmmm512_imm8, dst, src1, src2, imm), dst.Flags);
		}

		public void vpcmpub(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpub_kr_k1_xmm_xmmm128_imm8, register, register2, in memory, imm), dst.Flags);
		}

		public void vpcmpub(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpub_kr_k1_ymm_ymmm256_imm8, register, register2, in memory, imm), dst.Flags);
		}

		public void vpcmpub(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpub_kr_k1_zmm_zmmm512_imm8, register, register2, in memory, imm), dst.Flags);
		}

		public void vpcmpub(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpub_kr_k1_xmm_xmmm128_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags);
		}

		public void vpcmpub(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpub_kr_k1_ymm_ymmm256_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags);
		}

		public void vpcmpub(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpub_kr_k1_zmm_zmmm512_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags);
		}

		public void vpcmpub(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpub_kr_k1_xmm_xmmm128_imm8, register, register2, in memory, (uint)imm), dst.Flags);
		}

		public void vpcmpub(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpub_kr_k1_ymm_ymmm256_imm8, register, register2, in memory, (uint)imm), dst.Flags);
		}

		public void vpcmpub(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpub_kr_k1_zmm_zmmm512_imm8, register, register2, in memory, (uint)imm), dst.Flags);
		}

		public void vpcmpud(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpud_kr_k1_xmm_xmmm128b32_imm8, dst, src1, src2, imm), dst.Flags);
		}

		public void vpcmpud(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpud_kr_k1_ymm_ymmm256b32_imm8, dst, src1, src2, imm), dst.Flags);
		}

		public void vpcmpud(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpud_kr_k1_zmm_zmmm512b32_imm8, dst, src1, src2, imm), dst.Flags);
		}

		public void vpcmpud(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpud_kr_k1_xmm_xmmm128b32_imm8, register, register2, in memory, imm), dst.Flags | src2.Flags);
		}

		public void vpcmpud(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpud_kr_k1_ymm_ymmm256b32_imm8, register, register2, in memory, imm), dst.Flags | src2.Flags);
		}

		public void vpcmpud(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpud_kr_k1_zmm_zmmm512b32_imm8, register, register2, in memory, imm), dst.Flags | src2.Flags);
		}

		public void vpcmpud(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpud_kr_k1_xmm_xmmm128b32_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags);
		}

		public void vpcmpud(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpud_kr_k1_ymm_ymmm256b32_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags);
		}

		public void vpcmpud(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpud_kr_k1_zmm_zmmm512b32_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags);
		}

		public void vpcmpud(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpud_kr_k1_xmm_xmmm128b32_imm8, register, register2, in memory, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vpcmpud(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpud_kr_k1_ymm_ymmm256b32_imm8, register, register2, in memory, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vpcmpud(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpud_kr_k1_zmm_zmmm512b32_imm8, register, register2, in memory, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vpcmpuq(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpuq_kr_k1_xmm_xmmm128b64_imm8, dst, src1, src2, imm), dst.Flags);
		}

		public void vpcmpuq(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpuq_kr_k1_ymm_ymmm256b64_imm8, dst, src1, src2, imm), dst.Flags);
		}

		public void vpcmpuq(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpuq_kr_k1_zmm_zmmm512b64_imm8, dst, src1, src2, imm), dst.Flags);
		}

		public void vpcmpuq(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpuq_kr_k1_xmm_xmmm128b64_imm8, register, register2, in memory, imm), dst.Flags | src2.Flags);
		}

		public void vpcmpuq(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpuq_kr_k1_ymm_ymmm256b64_imm8, register, register2, in memory, imm), dst.Flags | src2.Flags);
		}

		public void vpcmpuq(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpuq_kr_k1_zmm_zmmm512b64_imm8, register, register2, in memory, imm), dst.Flags | src2.Flags);
		}

		public void vpcmpuq(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpuq_kr_k1_xmm_xmmm128b64_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags);
		}

		public void vpcmpuq(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpuq_kr_k1_ymm_ymmm256b64_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags);
		}

		public void vpcmpuq(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpuq_kr_k1_zmm_zmmm512b64_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags);
		}

		public void vpcmpuq(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpuq_kr_k1_xmm_xmmm128b64_imm8, register, register2, in memory, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vpcmpuq(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpuq_kr_k1_ymm_ymmm256b64_imm8, register, register2, in memory, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vpcmpuq(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpuq_kr_k1_zmm_zmmm512b64_imm8, register, register2, in memory, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vpcmpuw(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpuw_kr_k1_xmm_xmmm128_imm8, dst, src1, src2, imm), dst.Flags);
		}

		public void vpcmpuw(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpuw_kr_k1_ymm_ymmm256_imm8, dst, src1, src2, imm), dst.Flags);
		}

		public void vpcmpuw(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpuw_kr_k1_zmm_zmmm512_imm8, dst, src1, src2, imm), dst.Flags);
		}

		public void vpcmpuw(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpuw_kr_k1_xmm_xmmm128_imm8, register, register2, in memory, imm), dst.Flags);
		}

		public void vpcmpuw(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpuw_kr_k1_ymm_ymmm256_imm8, register, register2, in memory, imm), dst.Flags);
		}

		public void vpcmpuw(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpuw_kr_k1_zmm_zmmm512_imm8, register, register2, in memory, imm), dst.Flags);
		}

		public void vpcmpuw(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpuw_kr_k1_xmm_xmmm128_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags);
		}

		public void vpcmpuw(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpuw_kr_k1_ymm_ymmm256_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags);
		}

		public void vpcmpuw(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpuw_kr_k1_zmm_zmmm512_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags);
		}

		public void vpcmpuw(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpuw_kr_k1_xmm_xmmm128_imm8, register, register2, in memory, (uint)imm), dst.Flags);
		}

		public void vpcmpuw(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpuw_kr_k1_ymm_ymmm256_imm8, register, register2, in memory, (uint)imm), dst.Flags);
		}

		public void vpcmpuw(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpuw_kr_k1_zmm_zmmm512_imm8, register, register2, in memory, (uint)imm), dst.Flags);
		}

		public void vpcmpw(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpw_kr_k1_xmm_xmmm128_imm8, dst, src1, src2, imm), dst.Flags);
		}

		public void vpcmpw(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpw_kr_k1_ymm_ymmm256_imm8, dst, src1, src2, imm), dst.Flags);
		}

		public void vpcmpw(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpw_kr_k1_zmm_zmmm512_imm8, dst, src1, src2, imm), dst.Flags);
		}

		public void vpcmpw(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpw_kr_k1_xmm_xmmm128_imm8, register, register2, in memory, imm), dst.Flags);
		}

		public void vpcmpw(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpw_kr_k1_ymm_ymmm256_imm8, register, register2, in memory, imm), dst.Flags);
		}

		public void vpcmpw(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpw_kr_k1_zmm_zmmm512_imm8, register, register2, in memory, imm), dst.Flags);
		}

		public void vpcmpw(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpw_kr_k1_xmm_xmmm128_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags);
		}

		public void vpcmpw(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpw_kr_k1_ymm_ymmm256_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags);
		}

		public void vpcmpw(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpw_kr_k1_zmm_zmmm512_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags);
		}

		public void vpcmpw(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpw_kr_k1_xmm_xmmm128_imm8, register, register2, in memory, (uint)imm), dst.Flags);
		}

		public void vpcmpw(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpw_kr_k1_ymm_ymmm256_imm8, register, register2, in memory, (uint)imm), dst.Flags);
		}

		public void vpcmpw(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpcmpw_kr_k1_zmm_zmmm512_imm8, register, register2, in memory, (uint)imm), dst.Flags);
		}

		public void vpcomb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.XOP_Vpcomb_xmm_xmm_xmmm128_imm8, dst, src1, src2, imm));
		}

		public void vpcomb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Vpcomb_xmm_xmm_xmmm128_imm8, register, register2, in memory, imm));
		}

		public void vpcomb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.XOP_Vpcomb_xmm_xmm_xmmm128_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm));
		}

		public void vpcomb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Vpcomb_xmm_xmm_xmmm128_imm8, register, register2, in memory, (uint)imm));
		}

		public void vpcomd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.XOP_Vpcomd_xmm_xmm_xmmm128_imm8, dst, src1, src2, imm));
		}

		public void vpcomd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Vpcomd_xmm_xmm_xmmm128_imm8, register, register2, in memory, imm));
		}

		public void vpcomd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.XOP_Vpcomd_xmm_xmm_xmmm128_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm));
		}

		public void vpcomd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Vpcomd_xmm_xmm_xmmm128_imm8, register, register2, in memory, (uint)imm));
		}

		public void vpcomeqb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcomb(dst, src1, src2, 4);
		}

		public void vpcomeqb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcomb(dst, src1, src2, 4);
		}

		public void vpcomeqd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcomd(dst, src1, src2, 4);
		}

		public void vpcomeqd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcomd(dst, src1, src2, 4);
		}

		public void vpcomeqq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcomq(dst, src1, src2, 4);
		}

		public void vpcomeqq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcomq(dst, src1, src2, 4);
		}

		public void vpcomequb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcomub(dst, src1, src2, 4);
		}

		public void vpcomequb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcomub(dst, src1, src2, 4);
		}

		public void vpcomequd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcomud(dst, src1, src2, 4);
		}

		public void vpcomequd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcomud(dst, src1, src2, 4);
		}

		public void vpcomequq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcomuq(dst, src1, src2, 4);
		}

		public void vpcomequq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcomuq(dst, src1, src2, 4);
		}

		public void vpcomequw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcomuw(dst, src1, src2, 4);
		}

		public void vpcomequw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcomuw(dst, src1, src2, 4);
		}

		public void vpcomeqw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcomw(dst, src1, src2, 4);
		}

		public void vpcomeqw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcomw(dst, src1, src2, 4);
		}

		public void vpcomfalseb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcomb(dst, src1, src2, 6);
		}

		public void vpcomfalseb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcomb(dst, src1, src2, 6);
		}

		public void vpcomfalsed(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcomd(dst, src1, src2, 6);
		}

		public void vpcomfalsed(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcomd(dst, src1, src2, 6);
		}

		public void vpcomfalseq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcomq(dst, src1, src2, 6);
		}

		public void vpcomfalseq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcomq(dst, src1, src2, 6);
		}

		public void vpcomfalseub(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcomub(dst, src1, src2, 6);
		}

		public void vpcomfalseub(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcomub(dst, src1, src2, 6);
		}

		public void vpcomfalseud(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcomud(dst, src1, src2, 6);
		}

		public void vpcomfalseud(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcomud(dst, src1, src2, 6);
		}

		public void vpcomfalseuq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcomuq(dst, src1, src2, 6);
		}

		public void vpcomfalseuq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcomuq(dst, src1, src2, 6);
		}

		public void vpcomfalseuw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcomuw(dst, src1, src2, 6);
		}

		public void vpcomfalseuw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcomuw(dst, src1, src2, 6);
		}

		public void vpcomfalsew(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcomw(dst, src1, src2, 6);
		}

		public void vpcomfalsew(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcomw(dst, src1, src2, 6);
		}

		public void vpcomgeb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcomb(dst, src1, src2, 3);
		}

		public void vpcomgeb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcomb(dst, src1, src2, 3);
		}

		public void vpcomged(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcomd(dst, src1, src2, 3);
		}

		public void vpcomged(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcomd(dst, src1, src2, 3);
		}

		public void vpcomgeq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcomq(dst, src1, src2, 3);
		}

		public void vpcomgeq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcomq(dst, src1, src2, 3);
		}

		public void vpcomgeub(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcomub(dst, src1, src2, 3);
		}

		public void vpcomgeub(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcomub(dst, src1, src2, 3);
		}

		public void vpcomgeud(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcomud(dst, src1, src2, 3);
		}

		public void vpcomgeud(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcomud(dst, src1, src2, 3);
		}

		public void vpcomgeuq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcomuq(dst, src1, src2, 3);
		}

		public void vpcomgeuq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcomuq(dst, src1, src2, 3);
		}

		public void vpcomgeuw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcomuw(dst, src1, src2, 3);
		}

		public void vpcomgeuw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcomuw(dst, src1, src2, 3);
		}

		public void vpcomgew(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcomw(dst, src1, src2, 3);
		}

		public void vpcomgew(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcomw(dst, src1, src2, 3);
		}

		public void vpcomgtb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcomb(dst, src1, src2, 2);
		}

		public void vpcomgtb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcomb(dst, src1, src2, 2);
		}

		public void vpcomgtd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcomd(dst, src1, src2, 2);
		}

		public void vpcomgtd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcomd(dst, src1, src2, 2);
		}

		public void vpcomgtq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcomq(dst, src1, src2, 2);
		}

		public void vpcomgtq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcomq(dst, src1, src2, 2);
		}

		public void vpcomgtub(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcomub(dst, src1, src2, 2);
		}

		public void vpcomgtub(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcomub(dst, src1, src2, 2);
		}

		public void vpcomgtud(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcomud(dst, src1, src2, 2);
		}

		public void vpcomgtud(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcomud(dst, src1, src2, 2);
		}

		public void vpcomgtuq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcomuq(dst, src1, src2, 2);
		}

		public void vpcomgtuq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcomuq(dst, src1, src2, 2);
		}

		public void vpcomgtuw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcomuw(dst, src1, src2, 2);
		}

		public void vpcomgtuw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcomuw(dst, src1, src2, 2);
		}

		public void vpcomgtw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcomw(dst, src1, src2, 2);
		}

		public void vpcomgtw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcomw(dst, src1, src2, 2);
		}

		public void vpcomleb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcomb(dst, src1, src2, 1);
		}

		public void vpcomleb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcomb(dst, src1, src2, 1);
		}

		public void vpcomled(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcomd(dst, src1, src2, 1);
		}

		public void vpcomled(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcomd(dst, src1, src2, 1);
		}

		public void vpcomleq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcomq(dst, src1, src2, 1);
		}

		public void vpcomleq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcomq(dst, src1, src2, 1);
		}

		public void vpcomleub(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcomub(dst, src1, src2, 1);
		}

		public void vpcomleub(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcomub(dst, src1, src2, 1);
		}

		public void vpcomleud(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcomud(dst, src1, src2, 1);
		}

		public void vpcomleud(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcomud(dst, src1, src2, 1);
		}

		public void vpcomleuq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcomuq(dst, src1, src2, 1);
		}

		public void vpcomleuq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcomuq(dst, src1, src2, 1);
		}

		public void vpcomleuw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcomuw(dst, src1, src2, 1);
		}

		public void vpcomleuw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcomuw(dst, src1, src2, 1);
		}

		public void vpcomlew(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcomw(dst, src1, src2, 1);
		}

		public void vpcomlew(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcomw(dst, src1, src2, 1);
		}

		public void vpcomltb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcomb(dst, src1, src2, 0);
		}

		public void vpcomltb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcomb(dst, src1, src2, 0);
		}

		public void vpcomltd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcomd(dst, src1, src2, 0);
		}

		public void vpcomltd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcomd(dst, src1, src2, 0);
		}

		public void vpcomltq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcomq(dst, src1, src2, 0);
		}

		public void vpcomltq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcomq(dst, src1, src2, 0);
		}

		public void vpcomltub(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcomub(dst, src1, src2, 0);
		}

		public void vpcomltub(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcomub(dst, src1, src2, 0);
		}

		public void vpcomltud(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcomud(dst, src1, src2, 0);
		}

		public void vpcomltud(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcomud(dst, src1, src2, 0);
		}

		public void vpcomltuq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcomuq(dst, src1, src2, 0);
		}

		public void vpcomltuq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcomuq(dst, src1, src2, 0);
		}

		public void vpcomltuw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcomuw(dst, src1, src2, 0);
		}

		public void vpcomltuw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcomuw(dst, src1, src2, 0);
		}

		public void vpcomltw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcomw(dst, src1, src2, 0);
		}

		public void vpcomltw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcomw(dst, src1, src2, 0);
		}

		public void vpcomneqb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcomb(dst, src1, src2, 5);
		}

		public void vpcomneqb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcomb(dst, src1, src2, 5);
		}

		public void vpcomneqd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcomd(dst, src1, src2, 5);
		}

		public void vpcomneqd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcomd(dst, src1, src2, 5);
		}

		public void vpcomneqq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcomq(dst, src1, src2, 5);
		}

		public void vpcomneqq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcomq(dst, src1, src2, 5);
		}

		public void vpcomnequb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcomub(dst, src1, src2, 5);
		}

		public void vpcomnequb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcomub(dst, src1, src2, 5);
		}

		public void vpcomnequd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcomud(dst, src1, src2, 5);
		}

		public void vpcomnequd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcomud(dst, src1, src2, 5);
		}

		public void vpcomnequq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcomuq(dst, src1, src2, 5);
		}

		public void vpcomnequq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcomuq(dst, src1, src2, 5);
		}

		public void vpcomnequw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcomuw(dst, src1, src2, 5);
		}

		public void vpcomnequw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcomuw(dst, src1, src2, 5);
		}

		public void vpcomneqw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcomw(dst, src1, src2, 5);
		}

		public void vpcomneqw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcomw(dst, src1, src2, 5);
		}

		public void vpcompressb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpcompressb_xmmm128_k1z_xmm, dst, src), dst.Flags);
		}

		public void vpcompressb(AssemblerMemoryOperand dst, AssemblerRegisterXMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpcompressb_xmmm128_k1z_xmm, in memory, src), dst.Flags);
		}

		public void vpcompressb(AssemblerRegisterYMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpcompressb_ymmm256_k1z_ymm, dst, src), dst.Flags);
		}

		public void vpcompressb(AssemblerMemoryOperand dst, AssemblerRegisterYMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpcompressb_ymmm256_k1z_ymm, in memory, src), dst.Flags);
		}

		public void vpcompressb(AssemblerRegisterZMM dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpcompressb_zmmm512_k1z_zmm, dst, src), dst.Flags);
		}

		public void vpcompressb(AssemblerMemoryOperand dst, AssemblerRegisterZMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpcompressb_zmmm512_k1z_zmm, in memory, src), dst.Flags);
		}

		public void vpcompressd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpcompressd_xmmm128_k1z_xmm, dst, src), dst.Flags);
		}

		public void vpcompressd(AssemblerMemoryOperand dst, AssemblerRegisterXMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpcompressd_xmmm128_k1z_xmm, in memory, src), dst.Flags);
		}

		public void vpcompressd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpcompressd_ymmm256_k1z_ymm, dst, src), dst.Flags);
		}

		public void vpcompressd(AssemblerMemoryOperand dst, AssemblerRegisterYMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpcompressd_ymmm256_k1z_ymm, in memory, src), dst.Flags);
		}

		public void vpcompressd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpcompressd_zmmm512_k1z_zmm, dst, src), dst.Flags);
		}

		public void vpcompressd(AssemblerMemoryOperand dst, AssemblerRegisterZMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpcompressd_zmmm512_k1z_zmm, in memory, src), dst.Flags);
		}

		public void vpcompressq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpcompressq_xmmm128_k1z_xmm, dst, src), dst.Flags);
		}

		public void vpcompressq(AssemblerMemoryOperand dst, AssemblerRegisterXMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpcompressq_xmmm128_k1z_xmm, in memory, src), dst.Flags);
		}

		public void vpcompressq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpcompressq_ymmm256_k1z_ymm, dst, src), dst.Flags);
		}

		public void vpcompressq(AssemblerMemoryOperand dst, AssemblerRegisterYMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpcompressq_ymmm256_k1z_ymm, in memory, src), dst.Flags);
		}

		public void vpcompressq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpcompressq_zmmm512_k1z_zmm, dst, src), dst.Flags);
		}

		public void vpcompressq(AssemblerMemoryOperand dst, AssemblerRegisterZMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpcompressq_zmmm512_k1z_zmm, in memory, src), dst.Flags);
		}

		public void vpcompressw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpcompressw_xmmm128_k1z_xmm, dst, src), dst.Flags);
		}

		public void vpcompressw(AssemblerMemoryOperand dst, AssemblerRegisterXMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpcompressw_xmmm128_k1z_xmm, in memory, src), dst.Flags);
		}

		public void vpcompressw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpcompressw_ymmm256_k1z_ymm, dst, src), dst.Flags);
		}

		public void vpcompressw(AssemblerMemoryOperand dst, AssemblerRegisterYMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpcompressw_ymmm256_k1z_ymm, in memory, src), dst.Flags);
		}

		public void vpcompressw(AssemblerRegisterZMM dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpcompressw_zmmm512_k1z_zmm, dst, src), dst.Flags);
		}

		public void vpcompressw(AssemblerMemoryOperand dst, AssemblerRegisterZMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpcompressw_zmmm512_k1z_zmm, in memory, src), dst.Flags);
		}

		public void vpcomq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.XOP_Vpcomq_xmm_xmm_xmmm128_imm8, dst, src1, src2, imm));
		}

		public void vpcomq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Vpcomq_xmm_xmm_xmmm128_imm8, register, register2, in memory, imm));
		}

		public void vpcomq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.XOP_Vpcomq_xmm_xmm_xmmm128_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm));
		}

		public void vpcomq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Vpcomq_xmm_xmm_xmmm128_imm8, register, register2, in memory, (uint)imm));
		}

		public void vpcomtrueb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcomb(dst, src1, src2, 7);
		}

		public void vpcomtrueb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcomb(dst, src1, src2, 7);
		}

		public void vpcomtrued(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcomd(dst, src1, src2, 7);
		}

		public void vpcomtrued(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcomd(dst, src1, src2, 7);
		}

		public void vpcomtrueq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcomq(dst, src1, src2, 7);
		}

		public void vpcomtrueq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcomq(dst, src1, src2, 7);
		}

		public void vpcomtrueub(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcomub(dst, src1, src2, 7);
		}

		public void vpcomtrueub(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcomub(dst, src1, src2, 7);
		}

		public void vpcomtrueud(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcomud(dst, src1, src2, 7);
		}

		public void vpcomtrueud(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcomud(dst, src1, src2, 7);
		}

		public void vpcomtrueuq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcomuq(dst, src1, src2, 7);
		}

		public void vpcomtrueuq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcomuq(dst, src1, src2, 7);
		}

		public void vpcomtrueuw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcomuw(dst, src1, src2, 7);
		}

		public void vpcomtrueuw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcomuw(dst, src1, src2, 7);
		}

		public void vpcomtruew(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			vpcomw(dst, src1, src2, 7);
		}

		public void vpcomtruew(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			vpcomw(dst, src1, src2, 7);
		}

		public void vpcomub(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.XOP_Vpcomub_xmm_xmm_xmmm128_imm8, dst, src1, src2, imm));
		}

		public void vpcomub(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Vpcomub_xmm_xmm_xmmm128_imm8, register, register2, in memory, imm));
		}

		public void vpcomub(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.XOP_Vpcomub_xmm_xmm_xmmm128_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm));
		}

		public void vpcomub(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Vpcomub_xmm_xmm_xmmm128_imm8, register, register2, in memory, (uint)imm));
		}

		public void vpcomud(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.XOP_Vpcomud_xmm_xmm_xmmm128_imm8, dst, src1, src2, imm));
		}

		public void vpcomud(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Vpcomud_xmm_xmm_xmmm128_imm8, register, register2, in memory, imm));
		}

		public void vpcomud(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.XOP_Vpcomud_xmm_xmm_xmmm128_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm));
		}

		public void vpcomud(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Vpcomud_xmm_xmm_xmmm128_imm8, register, register2, in memory, (uint)imm));
		}

		public void vpcomuq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.XOP_Vpcomuq_xmm_xmm_xmmm128_imm8, dst, src1, src2, imm));
		}

		public void vpcomuq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Vpcomuq_xmm_xmm_xmmm128_imm8, register, register2, in memory, imm));
		}

		public void vpcomuq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.XOP_Vpcomuq_xmm_xmm_xmmm128_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm));
		}

		public void vpcomuq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Vpcomuq_xmm_xmm_xmmm128_imm8, register, register2, in memory, (uint)imm));
		}

		public void vpcomuw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.XOP_Vpcomuw_xmm_xmm_xmmm128_imm8, dst, src1, src2, imm));
		}

		public void vpcomuw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Vpcomuw_xmm_xmm_xmmm128_imm8, register, register2, in memory, imm));
		}

		public void vpcomuw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.XOP_Vpcomuw_xmm_xmm_xmmm128_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm));
		}

		public void vpcomuw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Vpcomuw_xmm_xmm_xmmm128_imm8, register, register2, in memory, (uint)imm));
		}

		public void vpcomw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.XOP_Vpcomw_xmm_xmm_xmmm128_imm8, dst, src1, src2, imm));
		}

		public void vpcomw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Vpcomw_xmm_xmm_xmmm128_imm8, register, register2, in memory, imm));
		}

		public void vpcomw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.XOP_Vpcomw_xmm_xmm_xmmm128_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm));
		}

		public void vpcomw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Vpcomw_xmm_xmm_xmmm128_imm8, register, register2, in memory, (uint)imm));
		}

		public void vpconflictd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpconflictd_xmm_k1z_xmmm128b32, dst, src), dst.Flags);
		}

		public void vpconflictd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpconflictd_ymm_k1z_ymmm256b32, dst, src), dst.Flags);
		}

		public void vpconflictd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpconflictd_zmm_k1z_zmmm512b32, dst, src), dst.Flags);
		}

		public void vpconflictd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpconflictd_xmm_k1z_xmmm128b32, register, in memory), dst.Flags | src.Flags);
		}

		public void vpconflictd(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpconflictd_ymm_k1z_ymmm256b32, register, in memory), dst.Flags | src.Flags);
		}

		public void vpconflictd(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpconflictd_zmm_k1z_zmmm512b32, register, in memory), dst.Flags | src.Flags);
		}

		public void vpconflictq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpconflictq_xmm_k1z_xmmm128b64, dst, src), dst.Flags);
		}

		public void vpconflictq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpconflictq_ymm_k1z_ymmm256b64, dst, src), dst.Flags);
		}

		public void vpconflictq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpconflictq_zmm_k1z_zmmm512b64, dst, src), dst.Flags);
		}

		public void vpconflictq(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpconflictq_xmm_k1z_xmmm128b64, register, in memory), dst.Flags | src.Flags);
		}

		public void vpconflictq(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpconflictq_ymm_k1z_ymmm256b64, register, in memory), dst.Flags | src.Flags);
		}

		public void vpconflictq(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpconflictq_zmm_k1z_zmmm512b64, register, in memory), dst.Flags | src.Flags);
		}

		public void vpdpbssd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vpdpbssd_xmm_xmm_xmmm128, dst, src1, src2));
		}

		public void vpdpbssd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vpdpbssd_ymm_ymm_ymmm256, dst, src1, src2));
		}

		public void vpdpbssd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vpdpbssd_xmm_xmm_xmmm128, register, register2, in memory));
		}

		public void vpdpbssd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vpdpbssd_ymm_ymm_ymmm256, register, register2, in memory));
		}

		public void vpdpbssds(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vpdpbssds_xmm_xmm_xmmm128, dst, src1, src2));
		}

		public void vpdpbssds(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vpdpbssds_ymm_ymm_ymmm256, dst, src1, src2));
		}

		public void vpdpbssds(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vpdpbssds_xmm_xmm_xmmm128, register, register2, in memory));
		}

		public void vpdpbssds(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vpdpbssds_ymm_ymm_ymmm256, register, register2, in memory));
		}

		public void vpdpbsud(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vpdpbsud_xmm_xmm_xmmm128, dst, src1, src2));
		}

		public void vpdpbsud(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vpdpbsud_ymm_ymm_ymmm256, dst, src1, src2));
		}

		public void vpdpbsud(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vpdpbsud_xmm_xmm_xmmm128, register, register2, in memory));
		}

		public void vpdpbsud(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vpdpbsud_ymm_ymm_ymmm256, register, register2, in memory));
		}

		public void vpdpbsuds(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vpdpbsuds_xmm_xmm_xmmm128, dst, src1, src2));
		}

		public void vpdpbsuds(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vpdpbsuds_ymm_ymm_ymmm256, dst, src1, src2));
		}

		public void vpdpbsuds(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vpdpbsuds_xmm_xmm_xmmm128, register, register2, in memory));
		}

		public void vpdpbsuds(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vpdpbsuds_ymm_ymm_ymmm256, register, register2, in memory));
		}

		public void vpdpbusd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpdpbusd_xmm_xmm_xmmm128 : Code.EVEX_Vpdpbusd_xmm_k1z_xmm_xmmm128b32);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpdpbusd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpdpbusd_ymm_ymm_ymmm256 : Code.EVEX_Vpdpbusd_ymm_k1z_ymm_ymmm256b32);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpdpbusd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpdpbusd_zmm_k1z_zmm_zmmm512b32, dst, src1, src2), dst.Flags);
		}

		public void vpdpbusd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vpdpbusd_xmm_xmm_xmmm128 : Code.EVEX_Vpdpbusd_xmm_k1z_xmm_xmmm128b32) : Code.EVEX_Vpdpbusd_xmm_k1z_xmm_xmmm128b32);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpdpbusd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vpdpbusd_ymm_ymm_ymmm256 : Code.EVEX_Vpdpbusd_ymm_k1z_ymm_ymmm256b32) : Code.EVEX_Vpdpbusd_ymm_k1z_ymm_ymmm256b32);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpdpbusd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpdpbusd_zmm_k1z_zmm_zmmm512b32, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpdpbusds(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpdpbusds_xmm_xmm_xmmm128 : Code.EVEX_Vpdpbusds_xmm_k1z_xmm_xmmm128b32);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpdpbusds(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpdpbusds_ymm_ymm_ymmm256 : Code.EVEX_Vpdpbusds_ymm_k1z_ymm_ymmm256b32);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpdpbusds(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpdpbusds_zmm_k1z_zmm_zmmm512b32, dst, src1, src2), dst.Flags);
		}

		public void vpdpbusds(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vpdpbusds_xmm_xmm_xmmm128 : Code.EVEX_Vpdpbusds_xmm_k1z_xmm_xmmm128b32) : Code.EVEX_Vpdpbusds_xmm_k1z_xmm_xmmm128b32);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpdpbusds(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vpdpbusds_ymm_ymm_ymmm256 : Code.EVEX_Vpdpbusds_ymm_k1z_ymm_ymmm256b32) : Code.EVEX_Vpdpbusds_ymm_k1z_ymm_ymmm256b32);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpdpbusds(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpdpbusds_zmm_k1z_zmm_zmmm512b32, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpdpbuud(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vpdpbuud_xmm_xmm_xmmm128, dst, src1, src2));
		}

		public void vpdpbuud(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vpdpbuud_ymm_ymm_ymmm256, dst, src1, src2));
		}

		public void vpdpbuud(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vpdpbuud_xmm_xmm_xmmm128, register, register2, in memory));
		}

		public void vpdpbuud(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vpdpbuud_ymm_ymm_ymmm256, register, register2, in memory));
		}

		public void vpdpbuuds(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vpdpbuuds_xmm_xmm_xmmm128, dst, src1, src2));
		}

		public void vpdpbuuds(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vpdpbuuds_ymm_ymm_ymmm256, dst, src1, src2));
		}

		public void vpdpbuuds(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vpdpbuuds_xmm_xmm_xmmm128, register, register2, in memory));
		}

		public void vpdpbuuds(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vpdpbuuds_ymm_ymm_ymmm256, register, register2, in memory));
		}

		public void vpdpwssd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpdpwssd_xmm_xmm_xmmm128 : Code.EVEX_Vpdpwssd_xmm_k1z_xmm_xmmm128b32);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpdpwssd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpdpwssd_ymm_ymm_ymmm256 : Code.EVEX_Vpdpwssd_ymm_k1z_ymm_ymmm256b32);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpdpwssd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpdpwssd_zmm_k1z_zmm_zmmm512b32, dst, src1, src2), dst.Flags);
		}

		public void vpdpwssd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vpdpwssd_xmm_xmm_xmmm128 : Code.EVEX_Vpdpwssd_xmm_k1z_xmm_xmmm128b32) : Code.EVEX_Vpdpwssd_xmm_k1z_xmm_xmmm128b32);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpdpwssd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vpdpwssd_ymm_ymm_ymmm256 : Code.EVEX_Vpdpwssd_ymm_k1z_ymm_ymmm256b32) : Code.EVEX_Vpdpwssd_ymm_k1z_ymm_ymmm256b32);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpdpwssd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpdpwssd_zmm_k1z_zmm_zmmm512b32, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpdpwssds(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpdpwssds_xmm_xmm_xmmm128 : Code.EVEX_Vpdpwssds_xmm_k1z_xmm_xmmm128b32);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpdpwssds(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpdpwssds_ymm_ymm_ymmm256 : Code.EVEX_Vpdpwssds_ymm_k1z_ymm_ymmm256b32);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpdpwssds(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpdpwssds_zmm_k1z_zmm_zmmm512b32, dst, src1, src2), dst.Flags);
		}

		public void vpdpwssds(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vpdpwssds_xmm_xmm_xmmm128 : Code.EVEX_Vpdpwssds_xmm_k1z_xmm_xmmm128b32) : Code.EVEX_Vpdpwssds_xmm_k1z_xmm_xmmm128b32);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpdpwssds(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vpdpwssds_ymm_ymm_ymmm256 : Code.EVEX_Vpdpwssds_ymm_k1z_ymm_ymmm256b32) : Code.EVEX_Vpdpwssds_ymm_k1z_ymm_ymmm256b32);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpdpwssds(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpdpwssds_zmm_k1z_zmm_zmmm512b32, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vperm2f128(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vperm2f128_ymm_ymm_ymmm256_imm8, dst, src1, src2, imm));
		}

		public void vperm2f128(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vperm2f128_ymm_ymm_ymmm256_imm8, register, register2, in memory, imm));
		}

		public void vperm2f128(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vperm2f128_ymm_ymm_ymmm256_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm));
		}

		public void vperm2f128(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vperm2f128_ymm_ymm_ymmm256_imm8, register, register2, in memory, (uint)imm));
		}

		public void vperm2i128(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vperm2i128_ymm_ymm_ymmm256_imm8, dst, src1, src2, imm));
		}

		public void vperm2i128(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vperm2i128_ymm_ymm_ymmm256_imm8, register, register2, in memory, imm));
		}

		public void vperm2i128(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vperm2i128_ymm_ymm_ymmm256_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm));
		}

		public void vperm2i128(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vperm2i128_ymm_ymm_ymmm256_imm8, register, register2, in memory, (uint)imm));
		}

		public void vpermb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpermb_xmm_k1z_xmm_xmmm128, dst, src1, src2), dst.Flags);
		}

		public void vpermb(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpermb_ymm_k1z_ymm_ymmm256, dst, src1, src2), dst.Flags);
		}

		public void vpermb(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpermb_zmm_k1z_zmm_zmmm512, dst, src1, src2), dst.Flags);
		}

		public void vpermb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpermb_xmm_k1z_xmm_xmmm128, register, register2, in memory), dst.Flags);
		}

		public void vpermb(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpermb_ymm_k1z_ymm_ymmm256, register, register2, in memory), dst.Flags);
		}

		public void vpermb(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpermb_zmm_k1z_zmm_zmmm512, register, register2, in memory), dst.Flags);
		}

		public void vpermd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpermd_ymm_ymm_ymmm256 : Code.EVEX_Vpermd_ymm_k1z_ymm_ymmm256b32);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpermd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpermd_zmm_k1z_zmm_zmmm512b32, dst, src1, src2), dst.Flags);
		}

		public void vpermd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vpermd_ymm_ymm_ymmm256 : Code.EVEX_Vpermd_ymm_k1z_ymm_ymmm256b32) : Code.EVEX_Vpermd_ymm_k1z_ymm_ymmm256b32);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpermd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpermd_zmm_k1z_zmm_zmmm512b32, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpermi2b(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpermi2b_xmm_k1z_xmm_xmmm128, dst, src1, src2), dst.Flags);
		}

		public void vpermi2b(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpermi2b_ymm_k1z_ymm_ymmm256, dst, src1, src2), dst.Flags);
		}

		public void vpermi2b(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpermi2b_zmm_k1z_zmm_zmmm512, dst, src1, src2), dst.Flags);
		}

		public void vpermi2b(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpermi2b_xmm_k1z_xmm_xmmm128, register, register2, in memory), dst.Flags);
		}

		public void vpermi2b(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpermi2b_ymm_k1z_ymm_ymmm256, register, register2, in memory), dst.Flags);
		}

		public void vpermi2b(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpermi2b_zmm_k1z_zmm_zmmm512, register, register2, in memory), dst.Flags);
		}

		public void vpermi2d(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpermi2d_xmm_k1z_xmm_xmmm128b32, dst, src1, src2), dst.Flags);
		}

		public void vpermi2d(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpermi2d_ymm_k1z_ymm_ymmm256b32, dst, src1, src2), dst.Flags);
		}

		public void vpermi2d(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpermi2d_zmm_k1z_zmm_zmmm512b32, dst, src1, src2), dst.Flags);
		}

		public void vpermi2d(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpermi2d_xmm_k1z_xmm_xmmm128b32, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpermi2d(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpermi2d_ymm_k1z_ymm_ymmm256b32, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpermi2d(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpermi2d_zmm_k1z_zmm_zmmm512b32, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpermi2pd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpermi2pd_xmm_k1z_xmm_xmmm128b64, dst, src1, src2), dst.Flags);
		}

		public void vpermi2pd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpermi2pd_ymm_k1z_ymm_ymmm256b64, dst, src1, src2), dst.Flags);
		}

		public void vpermi2pd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpermi2pd_zmm_k1z_zmm_zmmm512b64, dst, src1, src2), dst.Flags);
		}

		public void vpermi2pd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpermi2pd_xmm_k1z_xmm_xmmm128b64, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpermi2pd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpermi2pd_ymm_k1z_ymm_ymmm256b64, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpermi2pd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpermi2pd_zmm_k1z_zmm_zmmm512b64, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpermi2ps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpermi2ps_xmm_k1z_xmm_xmmm128b32, dst, src1, src2), dst.Flags);
		}

		public void vpermi2ps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpermi2ps_ymm_k1z_ymm_ymmm256b32, dst, src1, src2), dst.Flags);
		}

		public void vpermi2ps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpermi2ps_zmm_k1z_zmm_zmmm512b32, dst, src1, src2), dst.Flags);
		}

		public void vpermi2ps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpermi2ps_xmm_k1z_xmm_xmmm128b32, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpermi2ps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpermi2ps_ymm_k1z_ymm_ymmm256b32, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpermi2ps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpermi2ps_zmm_k1z_zmm_zmmm512b32, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpermi2q(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpermi2q_xmm_k1z_xmm_xmmm128b64, dst, src1, src2), dst.Flags);
		}

		public void vpermi2q(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpermi2q_ymm_k1z_ymm_ymmm256b64, dst, src1, src2), dst.Flags);
		}

		public void vpermi2q(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpermi2q_zmm_k1z_zmm_zmmm512b64, dst, src1, src2), dst.Flags);
		}

		public void vpermi2q(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpermi2q_xmm_k1z_xmm_xmmm128b64, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpermi2q(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpermi2q_ymm_k1z_ymm_ymmm256b64, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpermi2q(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpermi2q_zmm_k1z_zmm_zmmm512b64, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpermi2w(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpermi2w_xmm_k1z_xmm_xmmm128, dst, src1, src2), dst.Flags);
		}

		public void vpermi2w(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpermi2w_ymm_k1z_ymm_ymmm256, dst, src1, src2), dst.Flags);
		}

		public void vpermi2w(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpermi2w_zmm_k1z_zmm_zmmm512, dst, src1, src2), dst.Flags);
		}

		public void vpermi2w(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpermi2w_xmm_k1z_xmm_xmmm128, register, register2, in memory), dst.Flags);
		}

		public void vpermi2w(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpermi2w_ymm_k1z_ymm_ymmm256, register, register2, in memory), dst.Flags);
		}

		public void vpermi2w(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpermi2w_zmm_k1z_zmm_zmmm512, register, register2, in memory), dst.Flags);
		}

		public void vpermil2pd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, AssemblerRegisterXMM src3, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vpermil2pd_xmm_xmm_xmmm128_xmm_imm4, dst, src1, src2, src3, imm));
		}

		public void vpermil2pd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, AssemblerRegisterXMM src3, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vpermil2pd_xmm_xmm_xmmm128_xmm_imm4, register, register2, in memory, src3, imm));
		}

		public void vpermil2pd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, AssemblerRegisterYMM src3, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vpermil2pd_ymm_ymm_ymmm256_ymm_imm4, dst, src1, src2, src3, imm));
		}

		public void vpermil2pd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, AssemblerRegisterYMM src3, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vpermil2pd_ymm_ymm_ymmm256_ymm_imm4, register, register2, in memory, src3, imm));
		}

		public void vpermil2pd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, AssemblerMemoryOperand src3, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			Register register3 = src2;
			MemoryOperand memory = src3.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vpermil2pd_xmm_xmm_xmm_xmmm128_imm4, register, register2, register3, in memory, imm));
		}

		public void vpermil2pd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, AssemblerMemoryOperand src3, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			Register register3 = src2;
			MemoryOperand memory = src3.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vpermil2pd_ymm_ymm_ymm_ymmm256_imm4, register, register2, register3, in memory, imm));
		}

		public void vpermil2pd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, AssemblerRegisterXMM src3, byte imm)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vpermil2pd_xmm_xmm_xmmm128_xmm_imm4, (Register)dst, (Register)src1, (Register)src2, (Register)src3, (uint)imm));
		}

		public void vpermil2pd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, AssemblerRegisterXMM src3, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vpermil2pd_xmm_xmm_xmmm128_xmm_imm4, register, register2, in memory, (Register)src3, (uint)imm));
		}

		public void vpermil2pd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, AssemblerRegisterYMM src3, byte imm)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vpermil2pd_ymm_ymm_ymmm256_ymm_imm4, (Register)dst, (Register)src1, (Register)src2, (Register)src3, (uint)imm));
		}

		public void vpermil2pd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, AssemblerRegisterYMM src3, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vpermil2pd_ymm_ymm_ymmm256_ymm_imm4, register, register2, in memory, (Register)src3, (uint)imm));
		}

		public void vpermil2pd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, AssemblerMemoryOperand src3, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			Register register3 = src2;
			MemoryOperand memory = src3.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vpermil2pd_xmm_xmm_xmm_xmmm128_imm4, register, register2, register3, in memory, (uint)imm));
		}

		public void vpermil2pd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, AssemblerMemoryOperand src3, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			Register register3 = src2;
			MemoryOperand memory = src3.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vpermil2pd_ymm_ymm_ymm_ymmm256_imm4, register, register2, register3, in memory, (uint)imm));
		}

		public void vpermil2ps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, AssemblerRegisterXMM src3, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vpermil2ps_xmm_xmm_xmmm128_xmm_imm4, dst, src1, src2, src3, imm));
		}

		public void vpermil2ps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, AssemblerRegisterXMM src3, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vpermil2ps_xmm_xmm_xmmm128_xmm_imm4, register, register2, in memory, src3, imm));
		}

		public void vpermil2ps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, AssemblerRegisterYMM src3, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vpermil2ps_ymm_ymm_ymmm256_ymm_imm4, dst, src1, src2, src3, imm));
		}

		public void vpermil2ps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, AssemblerRegisterYMM src3, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vpermil2ps_ymm_ymm_ymmm256_ymm_imm4, register, register2, in memory, src3, imm));
		}

		public void vpermil2ps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, AssemblerMemoryOperand src3, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			Register register3 = src2;
			MemoryOperand memory = src3.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vpermil2ps_xmm_xmm_xmm_xmmm128_imm4, register, register2, register3, in memory, imm));
		}

		public void vpermil2ps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, AssemblerMemoryOperand src3, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			Register register3 = src2;
			MemoryOperand memory = src3.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vpermil2ps_ymm_ymm_ymm_ymmm256_imm4, register, register2, register3, in memory, imm));
		}

		public void vpermil2ps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, AssemblerRegisterXMM src3, byte imm)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vpermil2ps_xmm_xmm_xmmm128_xmm_imm4, (Register)dst, (Register)src1, (Register)src2, (Register)src3, (uint)imm));
		}

		public void vpermil2ps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, AssemblerRegisterXMM src3, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vpermil2ps_xmm_xmm_xmmm128_xmm_imm4, register, register2, in memory, (Register)src3, (uint)imm));
		}

		public void vpermil2ps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, AssemblerRegisterYMM src3, byte imm)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vpermil2ps_ymm_ymm_ymmm256_ymm_imm4, (Register)dst, (Register)src1, (Register)src2, (Register)src3, (uint)imm));
		}

		public void vpermil2ps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, AssemblerRegisterYMM src3, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vpermil2ps_ymm_ymm_ymmm256_ymm_imm4, register, register2, in memory, (Register)src3, (uint)imm));
		}

		public void vpermil2ps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, AssemblerMemoryOperand src3, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			Register register3 = src2;
			MemoryOperand memory = src3.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vpermil2ps_xmm_xmm_xmm_xmmm128_imm4, register, register2, register3, in memory, (uint)imm));
		}

		public void vpermil2ps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, AssemblerMemoryOperand src3, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			Register register3 = src2;
			MemoryOperand memory = src3.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vpermil2ps_ymm_ymm_ymm_ymmm256_imm4, register, register2, register3, in memory, (uint)imm));
		}

		public void vpermilpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpermilpd_xmm_xmm_xmmm128 : Code.EVEX_Vpermilpd_xmm_k1z_xmm_xmmm128b64);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpermilpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpermilpd_ymm_ymm_ymmm256 : Code.EVEX_Vpermilpd_ymm_k1z_ymm_ymmm256b64);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpermilpd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpermilpd_zmm_k1z_zmm_zmmm512b64, dst, src1, src2), dst.Flags);
		}

		public void vpermilpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vpermilpd_xmm_xmm_xmmm128 : Code.EVEX_Vpermilpd_xmm_k1z_xmm_xmmm128b64) : Code.EVEX_Vpermilpd_xmm_k1z_xmm_xmmm128b64);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpermilpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vpermilpd_ymm_ymm_ymmm256 : Code.EVEX_Vpermilpd_ymm_k1z_ymm_ymmm256b64) : Code.EVEX_Vpermilpd_ymm_k1z_ymm_ymmm256b64);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpermilpd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpermilpd_zmm_k1z_zmm_zmmm512b64, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpermilpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpermilpd_xmm_xmmm128_imm8 : Code.EVEX_Vpermilpd_xmm_k1z_xmmm128b64_imm8);
			AddInstruction(Instruction.Create(code, dst, src1, imm), dst.Flags);
		}

		public void vpermilpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, sbyte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpermilpd_ymm_ymmm256_imm8 : Code.EVEX_Vpermilpd_ymm_k1z_ymmm256b64_imm8);
			AddInstruction(Instruction.Create(code, dst, src1, imm), dst.Flags);
		}

		public void vpermilpd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpermilpd_zmm_k1z_zmmm512b64_imm8, dst, src1, imm), dst.Flags);
		}

		public void vpermilpd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Code code = ((!src1.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vpermilpd_xmm_xmmm128_imm8 : Code.EVEX_Vpermilpd_xmm_k1z_xmmm128b64_imm8) : Code.EVEX_Vpermilpd_xmm_k1z_xmmm128b64_imm8);
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory, imm), dst.Flags | src1.Flags);
		}

		public void vpermilpd(AssemblerRegisterYMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Code code = ((!src1.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vpermilpd_ymm_ymmm256_imm8 : Code.EVEX_Vpermilpd_ymm_k1z_ymmm256b64_imm8) : Code.EVEX_Vpermilpd_ymm_k1z_ymmm256b64_imm8);
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory, imm), dst.Flags | src1.Flags);
		}

		public void vpermilpd(AssemblerRegisterZMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpermilpd_zmm_k1z_zmmm512b64_imm8, register, in memory, imm), dst.Flags | src1.Flags);
		}

		public void vpermilpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, byte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpermilpd_xmm_xmmm128_imm8 : Code.EVEX_Vpermilpd_xmm_k1z_xmmm128b64_imm8);
			AddInstruction(Instruction.Create(code, (Register)dst, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vpermilpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, byte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpermilpd_ymm_ymmm256_imm8 : Code.EVEX_Vpermilpd_ymm_k1z_ymmm256b64_imm8);
			AddInstruction(Instruction.Create(code, (Register)dst, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vpermilpd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpermilpd_zmm_k1z_zmmm512b64_imm8, (Register)dst, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vpermilpd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Code code = ((!src1.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vpermilpd_xmm_xmmm128_imm8 : Code.EVEX_Vpermilpd_xmm_k1z_xmmm128b64_imm8) : Code.EVEX_Vpermilpd_xmm_k1z_xmmm128b64_imm8);
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory, (uint)imm), dst.Flags | src1.Flags);
		}

		public void vpermilpd(AssemblerRegisterYMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Code code = ((!src1.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vpermilpd_ymm_ymmm256_imm8 : Code.EVEX_Vpermilpd_ymm_k1z_ymmm256b64_imm8) : Code.EVEX_Vpermilpd_ymm_k1z_ymmm256b64_imm8);
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory, (uint)imm), dst.Flags | src1.Flags);
		}

		public void vpermilpd(AssemblerRegisterZMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpermilpd_zmm_k1z_zmmm512b64_imm8, register, in memory, (uint)imm), dst.Flags | src1.Flags);
		}

		public void vpermilps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpermilps_xmm_xmm_xmmm128 : Code.EVEX_Vpermilps_xmm_k1z_xmm_xmmm128b32);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpermilps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpermilps_ymm_ymm_ymmm256 : Code.EVEX_Vpermilps_ymm_k1z_ymm_ymmm256b32);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpermilps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpermilps_zmm_k1z_zmm_zmmm512b32, dst, src1, src2), dst.Flags);
		}

		public void vpermilps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vpermilps_xmm_xmm_xmmm128 : Code.EVEX_Vpermilps_xmm_k1z_xmm_xmmm128b32) : Code.EVEX_Vpermilps_xmm_k1z_xmm_xmmm128b32);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpermilps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vpermilps_ymm_ymm_ymmm256 : Code.EVEX_Vpermilps_ymm_k1z_ymm_ymmm256b32) : Code.EVEX_Vpermilps_ymm_k1z_ymm_ymmm256b32);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpermilps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpermilps_zmm_k1z_zmm_zmmm512b32, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpermilps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpermilps_xmm_xmmm128_imm8 : Code.EVEX_Vpermilps_xmm_k1z_xmmm128b32_imm8);
			AddInstruction(Instruction.Create(code, dst, src1, imm), dst.Flags);
		}

		public void vpermilps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, sbyte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpermilps_ymm_ymmm256_imm8 : Code.EVEX_Vpermilps_ymm_k1z_ymmm256b32_imm8);
			AddInstruction(Instruction.Create(code, dst, src1, imm), dst.Flags);
		}

		public void vpermilps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpermilps_zmm_k1z_zmmm512b32_imm8, dst, src1, imm), dst.Flags);
		}

		public void vpermilps(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Code code = ((!src1.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vpermilps_xmm_xmmm128_imm8 : Code.EVEX_Vpermilps_xmm_k1z_xmmm128b32_imm8) : Code.EVEX_Vpermilps_xmm_k1z_xmmm128b32_imm8);
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory, imm), dst.Flags | src1.Flags);
		}

		public void vpermilps(AssemblerRegisterYMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Code code = ((!src1.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vpermilps_ymm_ymmm256_imm8 : Code.EVEX_Vpermilps_ymm_k1z_ymmm256b32_imm8) : Code.EVEX_Vpermilps_ymm_k1z_ymmm256b32_imm8);
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory, imm), dst.Flags | src1.Flags);
		}

		public void vpermilps(AssemblerRegisterZMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpermilps_zmm_k1z_zmmm512b32_imm8, register, in memory, imm), dst.Flags | src1.Flags);
		}

		public void vpermilps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, byte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpermilps_xmm_xmmm128_imm8 : Code.EVEX_Vpermilps_xmm_k1z_xmmm128b32_imm8);
			AddInstruction(Instruction.Create(code, (Register)dst, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vpermilps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, byte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpermilps_ymm_ymmm256_imm8 : Code.EVEX_Vpermilps_ymm_k1z_ymmm256b32_imm8);
			AddInstruction(Instruction.Create(code, (Register)dst, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vpermilps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpermilps_zmm_k1z_zmmm512b32_imm8, (Register)dst, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vpermilps(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Code code = ((!src1.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vpermilps_xmm_xmmm128_imm8 : Code.EVEX_Vpermilps_xmm_k1z_xmmm128b32_imm8) : Code.EVEX_Vpermilps_xmm_k1z_xmmm128b32_imm8);
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory, (uint)imm), dst.Flags | src1.Flags);
		}

		public void vpermilps(AssemblerRegisterYMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Code code = ((!src1.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vpermilps_ymm_ymmm256_imm8 : Code.EVEX_Vpermilps_ymm_k1z_ymmm256b32_imm8) : Code.EVEX_Vpermilps_ymm_k1z_ymmm256b32_imm8);
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory, (uint)imm), dst.Flags | src1.Flags);
		}

		public void vpermilps(AssemblerRegisterZMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpermilps_zmm_k1z_zmmm512b32_imm8, register, in memory, (uint)imm), dst.Flags | src1.Flags);
		}

		public void vpermpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpermpd_ymm_k1z_ymm_ymmm256b64, dst, src1, src2), dst.Flags);
		}

		public void vpermpd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpermpd_zmm_k1z_zmm_zmmm512b64, dst, src1, src2), dst.Flags);
		}

		public void vpermpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpermpd_ymm_k1z_ymm_ymmm256b64, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpermpd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpermpd_zmm_k1z_zmm_zmmm512b64, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpermpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, sbyte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpermpd_ymm_ymmm256_imm8 : Code.EVEX_Vpermpd_ymm_k1z_ymmm256b64_imm8);
			AddInstruction(Instruction.Create(code, dst, src1, imm), dst.Flags);
		}

		public void vpermpd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpermpd_zmm_k1z_zmmm512b64_imm8, dst, src1, imm), dst.Flags);
		}

		public void vpermpd(AssemblerRegisterYMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Code code = ((!src1.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vpermpd_ymm_ymmm256_imm8 : Code.EVEX_Vpermpd_ymm_k1z_ymmm256b64_imm8) : Code.EVEX_Vpermpd_ymm_k1z_ymmm256b64_imm8);
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory, imm), dst.Flags | src1.Flags);
		}

		public void vpermpd(AssemblerRegisterZMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpermpd_zmm_k1z_zmmm512b64_imm8, register, in memory, imm), dst.Flags | src1.Flags);
		}

		public void vpermpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, byte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpermpd_ymm_ymmm256_imm8 : Code.EVEX_Vpermpd_ymm_k1z_ymmm256b64_imm8);
			AddInstruction(Instruction.Create(code, (Register)dst, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vpermpd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpermpd_zmm_k1z_zmmm512b64_imm8, (Register)dst, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vpermpd(AssemblerRegisterYMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Code code = ((!src1.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vpermpd_ymm_ymmm256_imm8 : Code.EVEX_Vpermpd_ymm_k1z_ymmm256b64_imm8) : Code.EVEX_Vpermpd_ymm_k1z_ymmm256b64_imm8);
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory, (uint)imm), dst.Flags | src1.Flags);
		}

		public void vpermpd(AssemblerRegisterZMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpermpd_zmm_k1z_zmmm512b64_imm8, register, in memory, (uint)imm), dst.Flags | src1.Flags);
		}

		public void vpermps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpermps_ymm_ymm_ymmm256 : Code.EVEX_Vpermps_ymm_k1z_ymm_ymmm256b32);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpermps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpermps_zmm_k1z_zmm_zmmm512b32, dst, src1, src2), dst.Flags);
		}

		public void vpermps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vpermps_ymm_ymm_ymmm256 : Code.EVEX_Vpermps_ymm_k1z_ymm_ymmm256b32) : Code.EVEX_Vpermps_ymm_k1z_ymm_ymmm256b32);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpermps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpermps_zmm_k1z_zmm_zmmm512b32, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpermq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpermq_ymm_k1z_ymm_ymmm256b64, dst, src1, src2), dst.Flags);
		}

		public void vpermq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpermq_zmm_k1z_zmm_zmmm512b64, dst, src1, src2), dst.Flags);
		}

		public void vpermq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpermq_ymm_k1z_ymm_ymmm256b64, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpermq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpermq_zmm_k1z_zmm_zmmm512b64, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpermq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, sbyte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpermq_ymm_ymmm256_imm8 : Code.EVEX_Vpermq_ymm_k1z_ymmm256b64_imm8);
			AddInstruction(Instruction.Create(code, dst, src1, imm), dst.Flags);
		}

		public void vpermq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpermq_zmm_k1z_zmmm512b64_imm8, dst, src1, imm), dst.Flags);
		}

		public void vpermq(AssemblerRegisterYMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Code code = ((!src1.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vpermq_ymm_ymmm256_imm8 : Code.EVEX_Vpermq_ymm_k1z_ymmm256b64_imm8) : Code.EVEX_Vpermq_ymm_k1z_ymmm256b64_imm8);
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory, imm), dst.Flags | src1.Flags);
		}

		public void vpermq(AssemblerRegisterZMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpermq_zmm_k1z_zmmm512b64_imm8, register, in memory, imm), dst.Flags | src1.Flags);
		}

		public void vpermq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, byte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpermq_ymm_ymmm256_imm8 : Code.EVEX_Vpermq_ymm_k1z_ymmm256b64_imm8);
			AddInstruction(Instruction.Create(code, (Register)dst, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vpermq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpermq_zmm_k1z_zmmm512b64_imm8, (Register)dst, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vpermq(AssemblerRegisterYMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Code code = ((!src1.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vpermq_ymm_ymmm256_imm8 : Code.EVEX_Vpermq_ymm_k1z_ymmm256b64_imm8) : Code.EVEX_Vpermq_ymm_k1z_ymmm256b64_imm8);
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory, (uint)imm), dst.Flags | src1.Flags);
		}

		public void vpermq(AssemblerRegisterZMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpermq_zmm_k1z_zmmm512b64_imm8, register, in memory, (uint)imm), dst.Flags | src1.Flags);
		}

		public void vpermt2b(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpermt2b_xmm_k1z_xmm_xmmm128, dst, src1, src2), dst.Flags);
		}

		public void vpermt2b(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpermt2b_ymm_k1z_ymm_ymmm256, dst, src1, src2), dst.Flags);
		}

		public void vpermt2b(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpermt2b_zmm_k1z_zmm_zmmm512, dst, src1, src2), dst.Flags);
		}

		public void vpermt2b(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpermt2b_xmm_k1z_xmm_xmmm128, register, register2, in memory), dst.Flags);
		}

		public void vpermt2b(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpermt2b_ymm_k1z_ymm_ymmm256, register, register2, in memory), dst.Flags);
		}

		public void vpermt2b(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpermt2b_zmm_k1z_zmm_zmmm512, register, register2, in memory), dst.Flags);
		}

		public void vpermt2d(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpermt2d_xmm_k1z_xmm_xmmm128b32, dst, src1, src2), dst.Flags);
		}

		public void vpermt2d(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpermt2d_ymm_k1z_ymm_ymmm256b32, dst, src1, src2), dst.Flags);
		}

		public void vpermt2d(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpermt2d_zmm_k1z_zmm_zmmm512b32, dst, src1, src2), dst.Flags);
		}

		public void vpermt2d(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpermt2d_xmm_k1z_xmm_xmmm128b32, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpermt2d(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpermt2d_ymm_k1z_ymm_ymmm256b32, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpermt2d(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpermt2d_zmm_k1z_zmm_zmmm512b32, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpermt2pd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpermt2pd_xmm_k1z_xmm_xmmm128b64, dst, src1, src2), dst.Flags);
		}

		public void vpermt2pd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpermt2pd_ymm_k1z_ymm_ymmm256b64, dst, src1, src2), dst.Flags);
		}

		public void vpermt2pd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpermt2pd_zmm_k1z_zmm_zmmm512b64, dst, src1, src2), dst.Flags);
		}

		public void vpermt2pd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpermt2pd_xmm_k1z_xmm_xmmm128b64, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpermt2pd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpermt2pd_ymm_k1z_ymm_ymmm256b64, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpermt2pd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpermt2pd_zmm_k1z_zmm_zmmm512b64, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpermt2ps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpermt2ps_xmm_k1z_xmm_xmmm128b32, dst, src1, src2), dst.Flags);
		}

		public void vpermt2ps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpermt2ps_ymm_k1z_ymm_ymmm256b32, dst, src1, src2), dst.Flags);
		}

		public void vpermt2ps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpermt2ps_zmm_k1z_zmm_zmmm512b32, dst, src1, src2), dst.Flags);
		}

		public void vpermt2ps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpermt2ps_xmm_k1z_xmm_xmmm128b32, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpermt2ps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpermt2ps_ymm_k1z_ymm_ymmm256b32, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpermt2ps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpermt2ps_zmm_k1z_zmm_zmmm512b32, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpermt2q(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpermt2q_xmm_k1z_xmm_xmmm128b64, dst, src1, src2), dst.Flags);
		}

		public void vpermt2q(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpermt2q_ymm_k1z_ymm_ymmm256b64, dst, src1, src2), dst.Flags);
		}

		public void vpermt2q(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpermt2q_zmm_k1z_zmm_zmmm512b64, dst, src1, src2), dst.Flags);
		}

		public void vpermt2q(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpermt2q_xmm_k1z_xmm_xmmm128b64, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpermt2q(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpermt2q_ymm_k1z_ymm_ymmm256b64, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpermt2q(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpermt2q_zmm_k1z_zmm_zmmm512b64, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpermt2w(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpermt2w_xmm_k1z_xmm_xmmm128, dst, src1, src2), dst.Flags);
		}

		public void vpermt2w(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpermt2w_ymm_k1z_ymm_ymmm256, dst, src1, src2), dst.Flags);
		}

		public void vpermt2w(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpermt2w_zmm_k1z_zmm_zmmm512, dst, src1, src2), dst.Flags);
		}

		public void vpermt2w(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpermt2w_xmm_k1z_xmm_xmmm128, register, register2, in memory), dst.Flags);
		}

		public void vpermt2w(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpermt2w_ymm_k1z_ymm_ymmm256, register, register2, in memory), dst.Flags);
		}

		public void vpermt2w(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpermt2w_zmm_k1z_zmm_zmmm512, register, register2, in memory), dst.Flags);
		}

		public void vpermw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpermw_xmm_k1z_xmm_xmmm128, dst, src1, src2), dst.Flags);
		}

		public void vpermw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpermw_ymm_k1z_ymm_ymmm256, dst, src1, src2), dst.Flags);
		}

		public void vpermw(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpermw_zmm_k1z_zmm_zmmm512, dst, src1, src2), dst.Flags);
		}

		public void vpermw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpermw_xmm_k1z_xmm_xmmm128, register, register2, in memory), dst.Flags);
		}

		public void vpermw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpermw_ymm_k1z_ymm_ymmm256, register, register2, in memory), dst.Flags);
		}

		public void vpermw(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpermw_zmm_k1z_zmm_zmmm512, register, register2, in memory), dst.Flags);
		}

		public void vpexpandb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpexpandb_xmm_k1z_xmmm128, dst, src), dst.Flags);
		}

		public void vpexpandb(AssemblerRegisterYMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpexpandb_ymm_k1z_ymmm256, dst, src), dst.Flags);
		}

		public void vpexpandb(AssemblerRegisterZMM dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpexpandb_zmm_k1z_zmmm512, dst, src), dst.Flags);
		}

		public void vpexpandb(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpexpandb_xmm_k1z_xmmm128, register, in memory), dst.Flags);
		}

		public void vpexpandb(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpexpandb_ymm_k1z_ymmm256, register, in memory), dst.Flags);
		}

		public void vpexpandb(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpexpandb_zmm_k1z_zmmm512, register, in memory), dst.Flags);
		}

		public void vpexpandd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpexpandd_xmm_k1z_xmmm128, dst, src), dst.Flags);
		}

		public void vpexpandd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpexpandd_ymm_k1z_ymmm256, dst, src), dst.Flags);
		}

		public void vpexpandd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpexpandd_zmm_k1z_zmmm512, dst, src), dst.Flags);
		}

		public void vpexpandd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpexpandd_xmm_k1z_xmmm128, register, in memory), dst.Flags);
		}

		public void vpexpandd(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpexpandd_ymm_k1z_ymmm256, register, in memory), dst.Flags);
		}

		public void vpexpandd(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpexpandd_zmm_k1z_zmmm512, register, in memory), dst.Flags);
		}

		public void vpexpandq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpexpandq_xmm_k1z_xmmm128, dst, src), dst.Flags);
		}

		public void vpexpandq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpexpandq_ymm_k1z_ymmm256, dst, src), dst.Flags);
		}

		public void vpexpandq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpexpandq_zmm_k1z_zmmm512, dst, src), dst.Flags);
		}

		public void vpexpandq(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpexpandq_xmm_k1z_xmmm128, register, in memory), dst.Flags);
		}

		public void vpexpandq(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpexpandq_ymm_k1z_ymmm256, register, in memory), dst.Flags);
		}

		public void vpexpandq(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpexpandq_zmm_k1z_zmmm512, register, in memory), dst.Flags);
		}

		public void vpexpandw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpexpandw_xmm_k1z_xmmm128, dst, src), dst.Flags);
		}

		public void vpexpandw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpexpandw_ymm_k1z_ymmm256, dst, src), dst.Flags);
		}

		public void vpexpandw(AssemblerRegisterZMM dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpexpandw_zmm_k1z_zmmm512, dst, src), dst.Flags);
		}

		public void vpexpandw(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpexpandw_xmm_k1z_xmmm128, register, in memory), dst.Flags);
		}

		public void vpexpandw(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpexpandw_ymm_k1z_ymmm256, register, in memory), dst.Flags);
		}

		public void vpexpandw(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpexpandw_zmm_k1z_zmmm512, register, in memory), dst.Flags);
		}

		public void vpextrb(AssemblerRegister32 dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpextrb_r32m8_xmm_imm8 : Code.EVEX_Vpextrb_r32m8_xmm_imm8);
			AddInstruction(Instruction.Create(code, dst, src1, imm));
		}

		public void vpextrb(AssemblerRegister64 dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpextrb_r64m8_xmm_imm8 : Code.EVEX_Vpextrb_r64m8_xmm_imm8);
			AddInstruction(Instruction.Create(code, dst, src1, imm));
		}

		public void vpextrb(AssemblerMemoryOperand dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpextrb_r32m8_xmm_imm8 : Code.EVEX_Vpextrb_r32m8_xmm_imm8);
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, in memory, src1, imm));
		}

		public void vpextrb(AssemblerRegister32 dst, AssemblerRegisterXMM src1, byte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpextrb_r32m8_xmm_imm8 : Code.EVEX_Vpextrb_r32m8_xmm_imm8);
			AddInstruction(Instruction.Create(code, (Register)dst, (Register)src1, (uint)imm));
		}

		public void vpextrb(AssemblerRegister64 dst, AssemblerRegisterXMM src1, byte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpextrb_r64m8_xmm_imm8 : Code.EVEX_Vpextrb_r64m8_xmm_imm8);
			AddInstruction(Instruction.Create(code, (Register)dst, (Register)src1, (uint)imm));
		}

		public void vpextrb(AssemblerMemoryOperand dst, AssemblerRegisterXMM src1, byte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpextrb_r32m8_xmm_imm8 : Code.EVEX_Vpextrb_r32m8_xmm_imm8);
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, in memory, (Register)src1, (uint)imm));
		}

		public void vpextrd(AssemblerRegister32 dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpextrd_rm32_xmm_imm8 : Code.EVEX_Vpextrd_rm32_xmm_imm8);
			AddInstruction(Instruction.Create(code, dst, src1, imm));
		}

		public void vpextrd(AssemblerMemoryOperand dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpextrd_rm32_xmm_imm8 : Code.EVEX_Vpextrd_rm32_xmm_imm8);
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, in memory, src1, imm));
		}

		public void vpextrd(AssemblerRegister32 dst, AssemblerRegisterXMM src1, byte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpextrd_rm32_xmm_imm8 : Code.EVEX_Vpextrd_rm32_xmm_imm8);
			AddInstruction(Instruction.Create(code, (Register)dst, (Register)src1, (uint)imm));
		}

		public void vpextrd(AssemblerMemoryOperand dst, AssemblerRegisterXMM src1, byte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpextrd_rm32_xmm_imm8 : Code.EVEX_Vpextrd_rm32_xmm_imm8);
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, in memory, (Register)src1, (uint)imm));
		}

		public void vpextrq(AssemblerRegister64 dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpextrq_rm64_xmm_imm8 : Code.EVEX_Vpextrq_rm64_xmm_imm8);
			AddInstruction(Instruction.Create(code, dst, src1, imm));
		}

		public void vpextrq(AssemblerMemoryOperand dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpextrq_rm64_xmm_imm8 : Code.EVEX_Vpextrq_rm64_xmm_imm8);
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, in memory, src1, imm));
		}

		public void vpextrq(AssemblerRegister64 dst, AssemblerRegisterXMM src1, byte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpextrq_rm64_xmm_imm8 : Code.EVEX_Vpextrq_rm64_xmm_imm8);
			AddInstruction(Instruction.Create(code, (Register)dst, (Register)src1, (uint)imm));
		}

		public void vpextrq(AssemblerMemoryOperand dst, AssemblerRegisterXMM src1, byte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpextrq_rm64_xmm_imm8 : Code.EVEX_Vpextrq_rm64_xmm_imm8);
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, in memory, (Register)src1, (uint)imm));
		}

		public void vpextrw(AssemblerRegister32 dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpextrw_r32_xmm_imm8 : Code.EVEX_Vpextrw_r32_xmm_imm8);
			AddInstruction(Instruction.Create(code, dst, src1, imm));
		}

		public void vpextrw(AssemblerRegister64 dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpextrw_r64_xmm_imm8 : Code.EVEX_Vpextrw_r64_xmm_imm8);
			AddInstruction(Instruction.Create(code, dst, src1, imm));
		}

		public void vpextrw(AssemblerMemoryOperand dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpextrw_r32m16_xmm_imm8 : Code.EVEX_Vpextrw_r32m16_xmm_imm8);
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, in memory, src1, imm));
		}

		public void vpextrw(AssemblerRegister32 dst, AssemblerRegisterXMM src1, byte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpextrw_r32_xmm_imm8 : Code.EVEX_Vpextrw_r32_xmm_imm8);
			AddInstruction(Instruction.Create(code, (Register)dst, (Register)src1, (uint)imm));
		}

		public void vpextrw(AssemblerRegister64 dst, AssemblerRegisterXMM src1, byte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpextrw_r64_xmm_imm8 : Code.EVEX_Vpextrw_r64_xmm_imm8);
			AddInstruction(Instruction.Create(code, (Register)dst, (Register)src1, (uint)imm));
		}

		public void vpextrw(AssemblerMemoryOperand dst, AssemblerRegisterXMM src1, byte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpextrw_r32m16_xmm_imm8 : Code.EVEX_Vpextrw_r32m16_xmm_imm8);
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, in memory, (Register)src1, (uint)imm));
		}

		public void vpgatherdd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpgatherdd_xmm_k1_vm32x, register, in memory), dst.Flags);
		}

		public void vpgatherdd(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpgatherdd_ymm_k1_vm32y, register, in memory), dst.Flags);
		}

		public void vpgatherdd(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpgatherdd_zmm_k1_vm32z, register, in memory), dst.Flags);
		}

		public void vpgatherdd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, AssemblerRegisterXMM src2)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vpgatherdd_xmm_vm32x_xmm, register, in memory, src2));
		}

		public void vpgatherdd(AssemblerRegisterYMM dst, AssemblerMemoryOperand src1, AssemblerRegisterYMM src2)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vpgatherdd_ymm_vm32y_ymm, register, in memory, src2));
		}

		public void vpgatherdq(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpgatherdq_xmm_k1_vm32x, register, in memory), dst.Flags);
		}

		public void vpgatherdq(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpgatherdq_ymm_k1_vm32x, register, in memory), dst.Flags);
		}

		public void vpgatherdq(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpgatherdq_zmm_k1_vm32y, register, in memory), dst.Flags);
		}

		public void vpgatherdq(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, AssemblerRegisterXMM src2)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vpgatherdq_xmm_vm32x_xmm, register, in memory, src2));
		}

		public void vpgatherdq(AssemblerRegisterYMM dst, AssemblerMemoryOperand src1, AssemblerRegisterYMM src2)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vpgatherdq_ymm_vm32x_ymm, register, in memory, src2));
		}

		public void vpgatherqd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Code code;
			if (src.Index.IsXMM())
			{
				code = Code.EVEX_Vpgatherqd_xmm_k1_vm64x;
			}
			else
			{
				if (!src.Index.IsYMM())
				{
					throw NoOpCodeFoundFor(Mnemonic.Vpgatherqd, dst, src);
				}
				code = Code.EVEX_Vpgatherqd_xmm_k1_vm64y;
			}
			Code code2 = code;
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, register, in memory), dst.Flags);
		}

		public void vpgatherqd(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpgatherqd_ymm_k1_vm64z, register, in memory), dst.Flags);
		}

		public void vpgatherqd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, AssemblerRegisterXMM src2)
		{
			Code code;
			if (src1.Index.IsXMM())
			{
				code = Code.VEX_Vpgatherqd_xmm_vm64x_xmm;
			}
			else
			{
				if (!src1.Index.IsYMM())
				{
					throw NoOpCodeFoundFor(Mnemonic.Vpgatherqd, dst, src1, src2);
				}
				code = Code.VEX_Vpgatherqd_xmm_vm64y_xmm;
			}
			Code code2 = code;
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, register, in memory, src2));
		}

		public void vpgatherqq(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpgatherqq_xmm_k1_vm64x, register, in memory), dst.Flags);
		}

		public void vpgatherqq(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpgatherqq_ymm_k1_vm64y, register, in memory), dst.Flags);
		}

		public void vpgatherqq(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpgatherqq_zmm_k1_vm64z, register, in memory), dst.Flags);
		}

		public void vpgatherqq(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, AssemblerRegisterXMM src2)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vpgatherqq_xmm_vm64x_xmm, register, in memory, src2));
		}

		public void vpgatherqq(AssemblerRegisterYMM dst, AssemblerMemoryOperand src1, AssemblerRegisterYMM src2)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vpgatherqq_ymm_vm64y_ymm, register, in memory, src2));
		}

		public void vphaddbd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.XOP_Vphaddbd_xmm_xmmm128, dst, src));
		}

		public void vphaddbd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Vphaddbd_xmm_xmmm128, register, in memory));
		}

		public void vphaddbq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.XOP_Vphaddbq_xmm_xmmm128, dst, src));
		}

		public void vphaddbq(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Vphaddbq_xmm_xmmm128, register, in memory));
		}

		public void vphaddbw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.XOP_Vphaddbw_xmm_xmmm128, dst, src));
		}

		public void vphaddbw(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Vphaddbw_xmm_xmmm128, register, in memory));
		}

		public void vphaddd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vphaddd_xmm_xmm_xmmm128, dst, src1, src2));
		}

		public void vphaddd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vphaddd_ymm_ymm_ymmm256, dst, src1, src2));
		}

		public void vphaddd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vphaddd_xmm_xmm_xmmm128, register, register2, in memory));
		}

		public void vphaddd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vphaddd_ymm_ymm_ymmm256, register, register2, in memory));
		}

		public void vphadddq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.XOP_Vphadddq_xmm_xmmm128, dst, src));
		}

		public void vphadddq(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Vphadddq_xmm_xmmm128, register, in memory));
		}

		public void vphaddsw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vphaddsw_xmm_xmm_xmmm128, dst, src1, src2));
		}

		public void vphaddsw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vphaddsw_ymm_ymm_ymmm256, dst, src1, src2));
		}

		public void vphaddsw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vphaddsw_xmm_xmm_xmmm128, register, register2, in memory));
		}

		public void vphaddsw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vphaddsw_ymm_ymm_ymmm256, register, register2, in memory));
		}

		public void vphaddubd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.XOP_Vphaddubd_xmm_xmmm128, dst, src));
		}

		public void vphaddubd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Vphaddubd_xmm_xmmm128, register, in memory));
		}

		public void vphaddubq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.XOP_Vphaddubq_xmm_xmmm128, dst, src));
		}

		public void vphaddubq(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Vphaddubq_xmm_xmmm128, register, in memory));
		}

		public void vphaddubw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.XOP_Vphaddubw_xmm_xmmm128, dst, src));
		}

		public void vphaddubw(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Vphaddubw_xmm_xmmm128, register, in memory));
		}

		public void vphaddudq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.XOP_Vphaddudq_xmm_xmmm128, dst, src));
		}

		public void vphaddudq(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Vphaddudq_xmm_xmmm128, register, in memory));
		}

		public void vphadduwd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.XOP_Vphadduwd_xmm_xmmm128, dst, src));
		}

		public void vphadduwd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Vphadduwd_xmm_xmmm128, register, in memory));
		}

		public void vphadduwq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.XOP_Vphadduwq_xmm_xmmm128, dst, src));
		}

		public void vphadduwq(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Vphadduwq_xmm_xmmm128, register, in memory));
		}

		public void vphaddw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vphaddw_xmm_xmm_xmmm128, dst, src1, src2));
		}

		public void vphaddw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vphaddw_ymm_ymm_ymmm256, dst, src1, src2));
		}

		public void vphaddw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vphaddw_xmm_xmm_xmmm128, register, register2, in memory));
		}

		public void vphaddw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vphaddw_ymm_ymm_ymmm256, register, register2, in memory));
		}

		public void vphaddwd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.XOP_Vphaddwd_xmm_xmmm128, dst, src));
		}

		public void vphaddwd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Vphaddwd_xmm_xmmm128, register, in memory));
		}

		public void vphaddwq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.XOP_Vphaddwq_xmm_xmmm128, dst, src));
		}

		public void vphaddwq(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Vphaddwq_xmm_xmmm128, register, in memory));
		}

		public void vphminposuw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vphminposuw_xmm_xmmm128, dst, src));
		}

		public void vphminposuw(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vphminposuw_xmm_xmmm128, register, in memory));
		}

		public void vphsubbw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.XOP_Vphsubbw_xmm_xmmm128, dst, src));
		}

		public void vphsubbw(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Vphsubbw_xmm_xmmm128, register, in memory));
		}

		public void vphsubd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vphsubd_xmm_xmm_xmmm128, dst, src1, src2));
		}

		public void vphsubd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vphsubd_ymm_ymm_ymmm256, dst, src1, src2));
		}

		public void vphsubd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vphsubd_xmm_xmm_xmmm128, register, register2, in memory));
		}

		public void vphsubd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vphsubd_ymm_ymm_ymmm256, register, register2, in memory));
		}

		public void vphsubdq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.XOP_Vphsubdq_xmm_xmmm128, dst, src));
		}

		public void vphsubdq(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Vphsubdq_xmm_xmmm128, register, in memory));
		}

		public void vphsubsw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vphsubsw_xmm_xmm_xmmm128, dst, src1, src2));
		}

		public void vphsubsw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vphsubsw_ymm_ymm_ymmm256, dst, src1, src2));
		}

		public void vphsubsw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vphsubsw_xmm_xmm_xmmm128, register, register2, in memory));
		}

		public void vphsubsw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vphsubsw_ymm_ymm_ymmm256, register, register2, in memory));
		}

		public void vphsubw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vphsubw_xmm_xmm_xmmm128, dst, src1, src2));
		}

		public void vphsubw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vphsubw_ymm_ymm_ymmm256, dst, src1, src2));
		}

		public void vphsubw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vphsubw_xmm_xmm_xmmm128, register, register2, in memory));
		}

		public void vphsubw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vphsubw_ymm_ymm_ymmm256, register, register2, in memory));
		}

		public void vphsubwd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.XOP_Vphsubwd_xmm_xmmm128, dst, src));
		}

		public void vphsubwd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Vphsubwd_xmm_xmmm128, register, in memory));
		}

		public void vpinsrb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegister32 src2, sbyte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpinsrb_xmm_xmm_r32m8_imm8 : Code.EVEX_Vpinsrb_xmm_xmm_r32m8_imm8);
			AddInstruction(Instruction.Create(code, dst, src1, src2, imm));
		}

		public void vpinsrb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegister64 src2, sbyte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpinsrb_xmm_xmm_r64m8_imm8 : Code.EVEX_Vpinsrb_xmm_xmm_r64m8_imm8);
			AddInstruction(Instruction.Create(code, dst, src1, src2, imm));
		}

		public void vpinsrb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpinsrb_xmm_xmm_r32m8_imm8 : Code.EVEX_Vpinsrb_xmm_xmm_r32m8_imm8);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory, imm));
		}

		public void vpinsrb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegister32 src2, byte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpinsrb_xmm_xmm_r32m8_imm8 : Code.EVEX_Vpinsrb_xmm_xmm_r32m8_imm8);
			AddInstruction(Instruction.Create(code, (Register)dst, (Register)src1, (Register)src2, (uint)imm));
		}

		public void vpinsrb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegister64 src2, byte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpinsrb_xmm_xmm_r64m8_imm8 : Code.EVEX_Vpinsrb_xmm_xmm_r64m8_imm8);
			AddInstruction(Instruction.Create(code, (Register)dst, (Register)src1, (Register)src2, (uint)imm));
		}

		public void vpinsrb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpinsrb_xmm_xmm_r32m8_imm8 : Code.EVEX_Vpinsrb_xmm_xmm_r32m8_imm8);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory, (uint)imm));
		}

		public void vpinsrd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegister32 src2, sbyte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpinsrd_xmm_xmm_rm32_imm8 : Code.EVEX_Vpinsrd_xmm_xmm_rm32_imm8);
			AddInstruction(Instruction.Create(code, dst, src1, src2, imm));
		}

		public void vpinsrd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpinsrd_xmm_xmm_rm32_imm8 : Code.EVEX_Vpinsrd_xmm_xmm_rm32_imm8);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory, imm));
		}

		public void vpinsrd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegister32 src2, byte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpinsrd_xmm_xmm_rm32_imm8 : Code.EVEX_Vpinsrd_xmm_xmm_rm32_imm8);
			AddInstruction(Instruction.Create(code, (Register)dst, (Register)src1, (Register)src2, (uint)imm));
		}

		public void vpinsrd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpinsrd_xmm_xmm_rm32_imm8 : Code.EVEX_Vpinsrd_xmm_xmm_rm32_imm8);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory, (uint)imm));
		}

		public void vpinsrq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegister64 src2, sbyte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpinsrq_xmm_xmm_rm64_imm8 : Code.EVEX_Vpinsrq_xmm_xmm_rm64_imm8);
			AddInstruction(Instruction.Create(code, dst, src1, src2, imm));
		}

		public void vpinsrq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpinsrq_xmm_xmm_rm64_imm8 : Code.EVEX_Vpinsrq_xmm_xmm_rm64_imm8);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory, imm));
		}

		public void vpinsrq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegister64 src2, byte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpinsrq_xmm_xmm_rm64_imm8 : Code.EVEX_Vpinsrq_xmm_xmm_rm64_imm8);
			AddInstruction(Instruction.Create(code, (Register)dst, (Register)src1, (Register)src2, (uint)imm));
		}

		public void vpinsrq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpinsrq_xmm_xmm_rm64_imm8 : Code.EVEX_Vpinsrq_xmm_xmm_rm64_imm8);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory, (uint)imm));
		}

		public void vpinsrw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegister32 src2, sbyte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpinsrw_xmm_xmm_r32m16_imm8 : Code.EVEX_Vpinsrw_xmm_xmm_r32m16_imm8);
			AddInstruction(Instruction.Create(code, dst, src1, src2, imm));
		}

		public void vpinsrw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegister64 src2, sbyte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpinsrw_xmm_xmm_r64m16_imm8 : Code.EVEX_Vpinsrw_xmm_xmm_r64m16_imm8);
			AddInstruction(Instruction.Create(code, dst, src1, src2, imm));
		}

		public void vpinsrw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpinsrw_xmm_xmm_r32m16_imm8 : Code.EVEX_Vpinsrw_xmm_xmm_r32m16_imm8);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory, imm));
		}

		public void vpinsrw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegister32 src2, byte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpinsrw_xmm_xmm_r32m16_imm8 : Code.EVEX_Vpinsrw_xmm_xmm_r32m16_imm8);
			AddInstruction(Instruction.Create(code, (Register)dst, (Register)src1, (Register)src2, (uint)imm));
		}

		public void vpinsrw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegister64 src2, byte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpinsrw_xmm_xmm_r64m16_imm8 : Code.EVEX_Vpinsrw_xmm_xmm_r64m16_imm8);
			AddInstruction(Instruction.Create(code, (Register)dst, (Register)src1, (Register)src2, (uint)imm));
		}

		public void vpinsrw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpinsrw_xmm_xmm_r32m16_imm8 : Code.EVEX_Vpinsrw_xmm_xmm_r32m16_imm8);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory, (uint)imm));
		}

		public void vplzcntd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vplzcntd_xmm_k1z_xmmm128b32, dst, src), dst.Flags);
		}

		public void vplzcntd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vplzcntd_ymm_k1z_ymmm256b32, dst, src), dst.Flags);
		}

		public void vplzcntd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vplzcntd_zmm_k1z_zmmm512b32, dst, src), dst.Flags);
		}

		public void vplzcntd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vplzcntd_xmm_k1z_xmmm128b32, register, in memory), dst.Flags | src.Flags);
		}

		public void vplzcntd(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vplzcntd_ymm_k1z_ymmm256b32, register, in memory), dst.Flags | src.Flags);
		}

		public void vplzcntd(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vplzcntd_zmm_k1z_zmmm512b32, register, in memory), dst.Flags | src.Flags);
		}

		public void vplzcntq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vplzcntq_xmm_k1z_xmmm128b64, dst, src), dst.Flags);
		}

		public void vplzcntq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vplzcntq_ymm_k1z_ymmm256b64, dst, src), dst.Flags);
		}

		public void vplzcntq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vplzcntq_zmm_k1z_zmmm512b64, dst, src), dst.Flags);
		}

		public void vplzcntq(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vplzcntq_xmm_k1z_xmmm128b64, register, in memory), dst.Flags | src.Flags);
		}

		public void vplzcntq(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vplzcntq_ymm_k1z_ymmm256b64, register, in memory), dst.Flags | src.Flags);
		}

		public void vplzcntq(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vplzcntq_zmm_k1z_zmmm512b64, register, in memory), dst.Flags | src.Flags);
		}

		public void vpmacsdd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, AssemblerRegisterXMM src3)
		{
			AddInstruction(Instruction.Create(Code.XOP_Vpmacsdd_xmm_xmm_xmmm128_xmm, dst, src1, src2, src3));
		}

		public void vpmacsdd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, AssemblerRegisterXMM src3)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Vpmacsdd_xmm_xmm_xmmm128_xmm, register, register2, in memory, src3));
		}

		public void vpmacsdqh(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, AssemblerRegisterXMM src3)
		{
			AddInstruction(Instruction.Create(Code.XOP_Vpmacsdqh_xmm_xmm_xmmm128_xmm, dst, src1, src2, src3));
		}

		public void vpmacsdqh(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, AssemblerRegisterXMM src3)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Vpmacsdqh_xmm_xmm_xmmm128_xmm, register, register2, in memory, src3));
		}

		public void vpmacsdql(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, AssemblerRegisterXMM src3)
		{
			AddInstruction(Instruction.Create(Code.XOP_Vpmacsdql_xmm_xmm_xmmm128_xmm, dst, src1, src2, src3));
		}

		public void vpmacsdql(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, AssemblerRegisterXMM src3)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Vpmacsdql_xmm_xmm_xmmm128_xmm, register, register2, in memory, src3));
		}

		public void vpmacssdd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, AssemblerRegisterXMM src3)
		{
			AddInstruction(Instruction.Create(Code.XOP_Vpmacssdd_xmm_xmm_xmmm128_xmm, dst, src1, src2, src3));
		}

		public void vpmacssdd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, AssemblerRegisterXMM src3)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Vpmacssdd_xmm_xmm_xmmm128_xmm, register, register2, in memory, src3));
		}

		public void vpmacssdqh(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, AssemblerRegisterXMM src3)
		{
			AddInstruction(Instruction.Create(Code.XOP_Vpmacssdqh_xmm_xmm_xmmm128_xmm, dst, src1, src2, src3));
		}

		public void vpmacssdqh(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, AssemblerRegisterXMM src3)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Vpmacssdqh_xmm_xmm_xmmm128_xmm, register, register2, in memory, src3));
		}

		public void vpmacssdql(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, AssemblerRegisterXMM src3)
		{
			AddInstruction(Instruction.Create(Code.XOP_Vpmacssdql_xmm_xmm_xmmm128_xmm, dst, src1, src2, src3));
		}

		public void vpmacssdql(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, AssemblerRegisterXMM src3)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Vpmacssdql_xmm_xmm_xmmm128_xmm, register, register2, in memory, src3));
		}

		public void vpmacsswd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, AssemblerRegisterXMM src3)
		{
			AddInstruction(Instruction.Create(Code.XOP_Vpmacsswd_xmm_xmm_xmmm128_xmm, dst, src1, src2, src3));
		}

		public void vpmacsswd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, AssemblerRegisterXMM src3)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Vpmacsswd_xmm_xmm_xmmm128_xmm, register, register2, in memory, src3));
		}

		public void vpmacssww(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, AssemblerRegisterXMM src3)
		{
			AddInstruction(Instruction.Create(Code.XOP_Vpmacssww_xmm_xmm_xmmm128_xmm, dst, src1, src2, src3));
		}

		public void vpmacssww(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, AssemblerRegisterXMM src3)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Vpmacssww_xmm_xmm_xmmm128_xmm, register, register2, in memory, src3));
		}

		public void vpmacswd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, AssemblerRegisterXMM src3)
		{
			AddInstruction(Instruction.Create(Code.XOP_Vpmacswd_xmm_xmm_xmmm128_xmm, dst, src1, src2, src3));
		}

		public void vpmacswd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, AssemblerRegisterXMM src3)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Vpmacswd_xmm_xmm_xmmm128_xmm, register, register2, in memory, src3));
		}

		public void vpmacsww(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, AssemblerRegisterXMM src3)
		{
			AddInstruction(Instruction.Create(Code.XOP_Vpmacsww_xmm_xmm_xmmm128_xmm, dst, src1, src2, src3));
		}

		public void vpmacsww(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, AssemblerRegisterXMM src3)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Vpmacsww_xmm_xmm_xmmm128_xmm, register, register2, in memory, src3));
		}

		public void vpmadcsswd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, AssemblerRegisterXMM src3)
		{
			AddInstruction(Instruction.Create(Code.XOP_Vpmadcsswd_xmm_xmm_xmmm128_xmm, dst, src1, src2, src3));
		}

		public void vpmadcsswd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, AssemblerRegisterXMM src3)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Vpmadcsswd_xmm_xmm_xmmm128_xmm, register, register2, in memory, src3));
		}

		public void vpmadcswd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, AssemblerRegisterXMM src3)
		{
			AddInstruction(Instruction.Create(Code.XOP_Vpmadcswd_xmm_xmm_xmmm128_xmm, dst, src1, src2, src3));
		}

		public void vpmadcswd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, AssemblerRegisterXMM src3)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Vpmadcswd_xmm_xmm_xmmm128_xmm, register, register2, in memory, src3));
		}

		public void vpmadd52huq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpmadd52huq_xmm_xmm_xmmm128 : Code.EVEX_Vpmadd52huq_xmm_k1z_xmm_xmmm128b64);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpmadd52huq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpmadd52huq_ymm_ymm_ymmm256 : Code.EVEX_Vpmadd52huq_ymm_k1z_ymm_ymmm256b64);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpmadd52huq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmadd52huq_zmm_k1z_zmm_zmmm512b64, dst, src1, src2), dst.Flags);
		}

		public void vpmadd52huq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vpmadd52huq_xmm_xmm_xmmm128 : Code.EVEX_Vpmadd52huq_xmm_k1z_xmm_xmmm128b64) : Code.EVEX_Vpmadd52huq_xmm_k1z_xmm_xmmm128b64);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpmadd52huq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vpmadd52huq_ymm_ymm_ymmm256 : Code.EVEX_Vpmadd52huq_ymm_k1z_ymm_ymmm256b64) : Code.EVEX_Vpmadd52huq_ymm_k1z_ymm_ymmm256b64);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpmadd52huq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpmadd52huq_zmm_k1z_zmm_zmmm512b64, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpmadd52luq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpmadd52luq_xmm_xmm_xmmm128 : Code.EVEX_Vpmadd52luq_xmm_k1z_xmm_xmmm128b64);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpmadd52luq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpmadd52luq_ymm_ymm_ymmm256 : Code.EVEX_Vpmadd52luq_ymm_k1z_ymm_ymmm256b64);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpmadd52luq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmadd52luq_zmm_k1z_zmm_zmmm512b64, dst, src1, src2), dst.Flags);
		}

		public void vpmadd52luq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vpmadd52luq_xmm_xmm_xmmm128 : Code.EVEX_Vpmadd52luq_xmm_k1z_xmm_xmmm128b64) : Code.EVEX_Vpmadd52luq_xmm_k1z_xmm_xmmm128b64);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpmadd52luq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vpmadd52luq_ymm_ymm_ymmm256 : Code.EVEX_Vpmadd52luq_ymm_k1z_ymm_ymmm256b64) : Code.EVEX_Vpmadd52luq_ymm_k1z_ymm_ymmm256b64);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpmadd52luq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpmadd52luq_zmm_k1z_zmm_zmmm512b64, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpmaddubsw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpmaddubsw_xmm_xmm_xmmm128 : Code.EVEX_Vpmaddubsw_xmm_k1z_xmm_xmmm128);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpmaddubsw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpmaddubsw_ymm_ymm_ymmm256 : Code.EVEX_Vpmaddubsw_ymm_k1z_ymm_ymmm256);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpmaddubsw(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmaddubsw_zmm_k1z_zmm_zmmm512, dst, src1, src2), dst.Flags);
		}

		public void vpmaddubsw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpmaddubsw_xmm_xmm_xmmm128 : Code.EVEX_Vpmaddubsw_xmm_k1z_xmm_xmmm128);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags);
		}

		public void vpmaddubsw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpmaddubsw_ymm_ymm_ymmm256 : Code.EVEX_Vpmaddubsw_ymm_k1z_ymm_ymmm256);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags);
		}

		public void vpmaddubsw(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpmaddubsw_zmm_k1z_zmm_zmmm512, register, register2, in memory), dst.Flags);
		}

		public void vpmaddwd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpmaddwd_xmm_xmm_xmmm128 : Code.EVEX_Vpmaddwd_xmm_k1z_xmm_xmmm128);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpmaddwd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpmaddwd_ymm_ymm_ymmm256 : Code.EVEX_Vpmaddwd_ymm_k1z_ymm_ymmm256);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpmaddwd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmaddwd_zmm_k1z_zmm_zmmm512, dst, src1, src2), dst.Flags);
		}

		public void vpmaddwd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpmaddwd_xmm_xmm_xmmm128 : Code.EVEX_Vpmaddwd_xmm_k1z_xmm_xmmm128);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags);
		}

		public void vpmaddwd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpmaddwd_ymm_ymm_ymmm256 : Code.EVEX_Vpmaddwd_ymm_k1z_ymm_ymmm256);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags);
		}

		public void vpmaddwd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpmaddwd_zmm_k1z_zmm_zmmm512, register, register2, in memory), dst.Flags);
		}

		public void vpmaskmovd(AssemblerMemoryOperand dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vpmaskmovd_m128_xmm_xmm, in memory, src1, src2));
		}

		public void vpmaskmovd(AssemblerMemoryOperand dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vpmaskmovd_m256_ymm_ymm, in memory, src1, src2));
		}

		public void vpmaskmovd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vpmaskmovd_xmm_xmm_m128, register, register2, in memory));
		}

		public void vpmaskmovd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vpmaskmovd_ymm_ymm_m256, register, register2, in memory));
		}

		public void vpmaskmovq(AssemblerMemoryOperand dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vpmaskmovq_m128_xmm_xmm, in memory, src1, src2));
		}

		public void vpmaskmovq(AssemblerMemoryOperand dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vpmaskmovq_m256_ymm_ymm, in memory, src1, src2));
		}

		public void vpmaskmovq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vpmaskmovq_xmm_xmm_m128, register, register2, in memory));
		}

		public void vpmaskmovq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vpmaskmovq_ymm_ymm_m256, register, register2, in memory));
		}

		public void vpmaxsb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpmaxsb_xmm_xmm_xmmm128 : Code.EVEX_Vpmaxsb_xmm_k1z_xmm_xmmm128);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpmaxsb(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpmaxsb_ymm_ymm_ymmm256 : Code.EVEX_Vpmaxsb_ymm_k1z_ymm_ymmm256);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpmaxsb(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmaxsb_zmm_k1z_zmm_zmmm512, dst, src1, src2), dst.Flags);
		}

		public void vpmaxsb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpmaxsb_xmm_xmm_xmmm128 : Code.EVEX_Vpmaxsb_xmm_k1z_xmm_xmmm128);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags);
		}

		public void vpmaxsb(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpmaxsb_ymm_ymm_ymmm256 : Code.EVEX_Vpmaxsb_ymm_k1z_ymm_ymmm256);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags);
		}

		public void vpmaxsb(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpmaxsb_zmm_k1z_zmm_zmmm512, register, register2, in memory), dst.Flags);
		}

		public void vpmaxsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpmaxsd_xmm_xmm_xmmm128 : Code.EVEX_Vpmaxsd_xmm_k1z_xmm_xmmm128b32);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpmaxsd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpmaxsd_ymm_ymm_ymmm256 : Code.EVEX_Vpmaxsd_ymm_k1z_ymm_ymmm256b32);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpmaxsd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmaxsd_zmm_k1z_zmm_zmmm512b32, dst, src1, src2), dst.Flags);
		}

		public void vpmaxsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vpmaxsd_xmm_xmm_xmmm128 : Code.EVEX_Vpmaxsd_xmm_k1z_xmm_xmmm128b32) : Code.EVEX_Vpmaxsd_xmm_k1z_xmm_xmmm128b32);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpmaxsd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vpmaxsd_ymm_ymm_ymmm256 : Code.EVEX_Vpmaxsd_ymm_k1z_ymm_ymmm256b32) : Code.EVEX_Vpmaxsd_ymm_k1z_ymm_ymmm256b32);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpmaxsd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpmaxsd_zmm_k1z_zmm_zmmm512b32, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpmaxsq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmaxsq_xmm_k1z_xmm_xmmm128b64, dst, src1, src2), dst.Flags);
		}

		public void vpmaxsq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmaxsq_ymm_k1z_ymm_ymmm256b64, dst, src1, src2), dst.Flags);
		}

		public void vpmaxsq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmaxsq_zmm_k1z_zmm_zmmm512b64, dst, src1, src2), dst.Flags);
		}

		public void vpmaxsq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpmaxsq_xmm_k1z_xmm_xmmm128b64, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpmaxsq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpmaxsq_ymm_k1z_ymm_ymmm256b64, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpmaxsq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpmaxsq_zmm_k1z_zmm_zmmm512b64, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpmaxsw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpmaxsw_xmm_xmm_xmmm128 : Code.EVEX_Vpmaxsw_xmm_k1z_xmm_xmmm128);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpmaxsw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpmaxsw_ymm_ymm_ymmm256 : Code.EVEX_Vpmaxsw_ymm_k1z_ymm_ymmm256);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpmaxsw(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmaxsw_zmm_k1z_zmm_zmmm512, dst, src1, src2), dst.Flags);
		}

		public void vpmaxsw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpmaxsw_xmm_xmm_xmmm128 : Code.EVEX_Vpmaxsw_xmm_k1z_xmm_xmmm128);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags);
		}

		public void vpmaxsw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpmaxsw_ymm_ymm_ymmm256 : Code.EVEX_Vpmaxsw_ymm_k1z_ymm_ymmm256);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags);
		}

		public void vpmaxsw(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpmaxsw_zmm_k1z_zmm_zmmm512, register, register2, in memory), dst.Flags);
		}

		public void vpmaxub(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpmaxub_xmm_xmm_xmmm128 : Code.EVEX_Vpmaxub_xmm_k1z_xmm_xmmm128);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpmaxub(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpmaxub_ymm_ymm_ymmm256 : Code.EVEX_Vpmaxub_ymm_k1z_ymm_ymmm256);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpmaxub(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmaxub_zmm_k1z_zmm_zmmm512, dst, src1, src2), dst.Flags);
		}

		public void vpmaxub(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpmaxub_xmm_xmm_xmmm128 : Code.EVEX_Vpmaxub_xmm_k1z_xmm_xmmm128);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags);
		}

		public void vpmaxub(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpmaxub_ymm_ymm_ymmm256 : Code.EVEX_Vpmaxub_ymm_k1z_ymm_ymmm256);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags);
		}

		public void vpmaxub(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpmaxub_zmm_k1z_zmm_zmmm512, register, register2, in memory), dst.Flags);
		}

		public void vpmaxud(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpmaxud_xmm_xmm_xmmm128 : Code.EVEX_Vpmaxud_xmm_k1z_xmm_xmmm128b32);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpmaxud(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpmaxud_ymm_ymm_ymmm256 : Code.EVEX_Vpmaxud_ymm_k1z_ymm_ymmm256b32);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpmaxud(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmaxud_zmm_k1z_zmm_zmmm512b32, dst, src1, src2), dst.Flags);
		}

		public void vpmaxud(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vpmaxud_xmm_xmm_xmmm128 : Code.EVEX_Vpmaxud_xmm_k1z_xmm_xmmm128b32) : Code.EVEX_Vpmaxud_xmm_k1z_xmm_xmmm128b32);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpmaxud(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vpmaxud_ymm_ymm_ymmm256 : Code.EVEX_Vpmaxud_ymm_k1z_ymm_ymmm256b32) : Code.EVEX_Vpmaxud_ymm_k1z_ymm_ymmm256b32);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpmaxud(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpmaxud_zmm_k1z_zmm_zmmm512b32, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpmaxuq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmaxuq_xmm_k1z_xmm_xmmm128b64, dst, src1, src2), dst.Flags);
		}

		public void vpmaxuq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmaxuq_ymm_k1z_ymm_ymmm256b64, dst, src1, src2), dst.Flags);
		}

		public void vpmaxuq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmaxuq_zmm_k1z_zmm_zmmm512b64, dst, src1, src2), dst.Flags);
		}

		public void vpmaxuq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpmaxuq_xmm_k1z_xmm_xmmm128b64, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpmaxuq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpmaxuq_ymm_k1z_ymm_ymmm256b64, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpmaxuq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpmaxuq_zmm_k1z_zmm_zmmm512b64, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpmaxuw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpmaxuw_xmm_xmm_xmmm128 : Code.EVEX_Vpmaxuw_xmm_k1z_xmm_xmmm128);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpmaxuw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpmaxuw_ymm_ymm_ymmm256 : Code.EVEX_Vpmaxuw_ymm_k1z_ymm_ymmm256);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpmaxuw(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmaxuw_zmm_k1z_zmm_zmmm512, dst, src1, src2), dst.Flags);
		}

		public void vpmaxuw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpmaxuw_xmm_xmm_xmmm128 : Code.EVEX_Vpmaxuw_xmm_k1z_xmm_xmmm128);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags);
		}

		public void vpmaxuw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpmaxuw_ymm_ymm_ymmm256 : Code.EVEX_Vpmaxuw_ymm_k1z_ymm_ymmm256);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags);
		}

		public void vpmaxuw(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpmaxuw_zmm_k1z_zmm_zmmm512, register, register2, in memory), dst.Flags);
		}

		public void vpminsb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpminsb_xmm_xmm_xmmm128 : Code.EVEX_Vpminsb_xmm_k1z_xmm_xmmm128);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpminsb(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpminsb_ymm_ymm_ymmm256 : Code.EVEX_Vpminsb_ymm_k1z_ymm_ymmm256);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpminsb(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpminsb_zmm_k1z_zmm_zmmm512, dst, src1, src2), dst.Flags);
		}

		public void vpminsb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpminsb_xmm_xmm_xmmm128 : Code.EVEX_Vpminsb_xmm_k1z_xmm_xmmm128);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags);
		}

		public void vpminsb(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpminsb_ymm_ymm_ymmm256 : Code.EVEX_Vpminsb_ymm_k1z_ymm_ymmm256);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags);
		}

		public void vpminsb(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpminsb_zmm_k1z_zmm_zmmm512, register, register2, in memory), dst.Flags);
		}

		public void vpminsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpminsd_xmm_xmm_xmmm128 : Code.EVEX_Vpminsd_xmm_k1z_xmm_xmmm128b32);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpminsd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpminsd_ymm_ymm_ymmm256 : Code.EVEX_Vpminsd_ymm_k1z_ymm_ymmm256b32);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpminsd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpminsd_zmm_k1z_zmm_zmmm512b32, dst, src1, src2), dst.Flags);
		}

		public void vpminsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vpminsd_xmm_xmm_xmmm128 : Code.EVEX_Vpminsd_xmm_k1z_xmm_xmmm128b32) : Code.EVEX_Vpminsd_xmm_k1z_xmm_xmmm128b32);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpminsd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vpminsd_ymm_ymm_ymmm256 : Code.EVEX_Vpminsd_ymm_k1z_ymm_ymmm256b32) : Code.EVEX_Vpminsd_ymm_k1z_ymm_ymmm256b32);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpminsd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpminsd_zmm_k1z_zmm_zmmm512b32, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpminsq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpminsq_xmm_k1z_xmm_xmmm128b64, dst, src1, src2), dst.Flags);
		}

		public void vpminsq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpminsq_ymm_k1z_ymm_ymmm256b64, dst, src1, src2), dst.Flags);
		}

		public void vpminsq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpminsq_zmm_k1z_zmm_zmmm512b64, dst, src1, src2), dst.Flags);
		}

		public void vpminsq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpminsq_xmm_k1z_xmm_xmmm128b64, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpminsq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpminsq_ymm_k1z_ymm_ymmm256b64, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpminsq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpminsq_zmm_k1z_zmm_zmmm512b64, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpminsw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpminsw_xmm_xmm_xmmm128 : Code.EVEX_Vpminsw_xmm_k1z_xmm_xmmm128);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpminsw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpminsw_ymm_ymm_ymmm256 : Code.EVEX_Vpminsw_ymm_k1z_ymm_ymmm256);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpminsw(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpminsw_zmm_k1z_zmm_zmmm512, dst, src1, src2), dst.Flags);
		}

		public void vpminsw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpminsw_xmm_xmm_xmmm128 : Code.EVEX_Vpminsw_xmm_k1z_xmm_xmmm128);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags);
		}

		public void vpminsw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpminsw_ymm_ymm_ymmm256 : Code.EVEX_Vpminsw_ymm_k1z_ymm_ymmm256);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags);
		}

		public void vpminsw(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpminsw_zmm_k1z_zmm_zmmm512, register, register2, in memory), dst.Flags);
		}

		public void vpminub(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpminub_xmm_xmm_xmmm128 : Code.EVEX_Vpminub_xmm_k1z_xmm_xmmm128);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpminub(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpminub_ymm_ymm_ymmm256 : Code.EVEX_Vpminub_ymm_k1z_ymm_ymmm256);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpminub(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpminub_zmm_k1z_zmm_zmmm512, dst, src1, src2), dst.Flags);
		}

		public void vpminub(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpminub_xmm_xmm_xmmm128 : Code.EVEX_Vpminub_xmm_k1z_xmm_xmmm128);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags);
		}

		public void vpminub(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpminub_ymm_ymm_ymmm256 : Code.EVEX_Vpminub_ymm_k1z_ymm_ymmm256);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags);
		}

		public void vpminub(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpminub_zmm_k1z_zmm_zmmm512, register, register2, in memory), dst.Flags);
		}

		public void vpminud(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpminud_xmm_xmm_xmmm128 : Code.EVEX_Vpminud_xmm_k1z_xmm_xmmm128b32);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpminud(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpminud_ymm_ymm_ymmm256 : Code.EVEX_Vpminud_ymm_k1z_ymm_ymmm256b32);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpminud(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpminud_zmm_k1z_zmm_zmmm512b32, dst, src1, src2), dst.Flags);
		}

		public void vpminud(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vpminud_xmm_xmm_xmmm128 : Code.EVEX_Vpminud_xmm_k1z_xmm_xmmm128b32) : Code.EVEX_Vpminud_xmm_k1z_xmm_xmmm128b32);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpminud(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vpminud_ymm_ymm_ymmm256 : Code.EVEX_Vpminud_ymm_k1z_ymm_ymmm256b32) : Code.EVEX_Vpminud_ymm_k1z_ymm_ymmm256b32);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpminud(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpminud_zmm_k1z_zmm_zmmm512b32, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpminuq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpminuq_xmm_k1z_xmm_xmmm128b64, dst, src1, src2), dst.Flags);
		}

		public void vpminuq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpminuq_ymm_k1z_ymm_ymmm256b64, dst, src1, src2), dst.Flags);
		}

		public void vpminuq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpminuq_zmm_k1z_zmm_zmmm512b64, dst, src1, src2), dst.Flags);
		}

		public void vpminuq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpminuq_xmm_k1z_xmm_xmmm128b64, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpminuq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpminuq_ymm_k1z_ymm_ymmm256b64, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpminuq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpminuq_zmm_k1z_zmm_zmmm512b64, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpminuw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpminuw_xmm_xmm_xmmm128 : Code.EVEX_Vpminuw_xmm_k1z_xmm_xmmm128);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpminuw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpminuw_ymm_ymm_ymmm256 : Code.EVEX_Vpminuw_ymm_k1z_ymm_ymmm256);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpminuw(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpminuw_zmm_k1z_zmm_zmmm512, dst, src1, src2), dst.Flags);
		}

		public void vpminuw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpminuw_xmm_xmm_xmmm128 : Code.EVEX_Vpminuw_xmm_k1z_xmm_xmmm128);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags);
		}

		public void vpminuw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpminuw_ymm_ymm_ymmm256 : Code.EVEX_Vpminuw_ymm_k1z_ymm_ymmm256);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags);
		}

		public void vpminuw(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpminuw_zmm_k1z_zmm_zmmm512, register, register2, in memory), dst.Flags);
		}

		public void vpmovb2m(AssemblerRegisterK dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovb2m_kr_xmm, dst, src));
		}

		public void vpmovb2m(AssemblerRegisterK dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovb2m_kr_ymm, dst, src));
		}

		public void vpmovb2m(AssemblerRegisterK dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovb2m_kr_zmm, dst, src));
		}

		public void vpmovd2m(AssemblerRegisterK dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovd2m_kr_xmm, dst, src));
		}

		public void vpmovd2m(AssemblerRegisterK dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovd2m_kr_ymm, dst, src));
		}

		public void vpmovd2m(AssemblerRegisterK dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovd2m_kr_zmm, dst, src));
		}

		public void vpmovdb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovdb_xmmm32_k1z_xmm, dst, src), dst.Flags);
		}

		public void vpmovdb(AssemblerMemoryOperand dst, AssemblerRegisterXMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovdb_xmmm32_k1z_xmm, in memory, src), dst.Flags);
		}

		public void vpmovdb(AssemblerRegisterXMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovdb_xmmm64_k1z_ymm, dst, src), dst.Flags);
		}

		public void vpmovdb(AssemblerMemoryOperand dst, AssemblerRegisterYMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovdb_xmmm64_k1z_ymm, in memory, src), dst.Flags);
		}

		public void vpmovdb(AssemblerRegisterXMM dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovdb_xmmm128_k1z_zmm, dst, src), dst.Flags);
		}

		public void vpmovdb(AssemblerMemoryOperand dst, AssemblerRegisterZMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovdb_xmmm128_k1z_zmm, in memory, src), dst.Flags);
		}

		public void vpmovdw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovdw_xmmm64_k1z_xmm, dst, src), dst.Flags);
		}

		public void vpmovdw(AssemblerMemoryOperand dst, AssemblerRegisterXMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovdw_xmmm64_k1z_xmm, in memory, src), dst.Flags);
		}

		public void vpmovdw(AssemblerRegisterXMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovdw_xmmm128_k1z_ymm, dst, src), dst.Flags);
		}

		public void vpmovdw(AssemblerMemoryOperand dst, AssemblerRegisterYMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovdw_xmmm128_k1z_ymm, in memory, src), dst.Flags);
		}

		public void vpmovdw(AssemblerRegisterYMM dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovdw_ymmm256_k1z_zmm, dst, src), dst.Flags);
		}

		public void vpmovdw(AssemblerMemoryOperand dst, AssemblerRegisterZMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovdw_ymmm256_k1z_zmm, in memory, src), dst.Flags);
		}

		public void vpmovm2b(AssemblerRegisterXMM dst, AssemblerRegisterK src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovm2b_xmm_kr, dst, src));
		}

		public void vpmovm2b(AssemblerRegisterYMM dst, AssemblerRegisterK src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovm2b_ymm_kr, dst, src));
		}

		public void vpmovm2b(AssemblerRegisterZMM dst, AssemblerRegisterK src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovm2b_zmm_kr, dst, src));
		}

		public void vpmovm2d(AssemblerRegisterXMM dst, AssemblerRegisterK src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovm2d_xmm_kr, dst, src));
		}

		public void vpmovm2d(AssemblerRegisterYMM dst, AssemblerRegisterK src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovm2d_ymm_kr, dst, src));
		}

		public void vpmovm2d(AssemblerRegisterZMM dst, AssemblerRegisterK src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovm2d_zmm_kr, dst, src));
		}

		public void vpmovm2q(AssemblerRegisterXMM dst, AssemblerRegisterK src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovm2q_xmm_kr, dst, src));
		}

		public void vpmovm2q(AssemblerRegisterYMM dst, AssemblerRegisterK src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovm2q_ymm_kr, dst, src));
		}

		public void vpmovm2q(AssemblerRegisterZMM dst, AssemblerRegisterK src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovm2q_zmm_kr, dst, src));
		}

		public void vpmovm2w(AssemblerRegisterXMM dst, AssemblerRegisterK src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovm2w_xmm_kr, dst, src));
		}

		public void vpmovm2w(AssemblerRegisterYMM dst, AssemblerRegisterK src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovm2w_ymm_kr, dst, src));
		}

		public void vpmovm2w(AssemblerRegisterZMM dst, AssemblerRegisterK src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovm2w_zmm_kr, dst, src));
		}

		public void vpmovmskb(AssemblerRegister32 dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vpmovmskb_r32_xmm, dst, src));
		}

		public void vpmovmskb(AssemblerRegister64 dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vpmovmskb_r64_xmm, dst, src));
		}

		public void vpmovmskb(AssemblerRegister32 dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vpmovmskb_r32_ymm, dst, src));
		}

		public void vpmovmskb(AssemblerRegister64 dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vpmovmskb_r64_ymm, dst, src));
		}

		public void vpmovq2m(AssemblerRegisterK dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovq2m_kr_xmm, dst, src));
		}

		public void vpmovq2m(AssemblerRegisterK dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovq2m_kr_ymm, dst, src));
		}

		public void vpmovq2m(AssemblerRegisterK dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovq2m_kr_zmm, dst, src));
		}

		public void vpmovqb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovqb_xmmm16_k1z_xmm, dst, src), dst.Flags);
		}

		public void vpmovqb(AssemblerMemoryOperand dst, AssemblerRegisterXMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovqb_xmmm16_k1z_xmm, in memory, src), dst.Flags);
		}

		public void vpmovqb(AssemblerRegisterXMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovqb_xmmm32_k1z_ymm, dst, src), dst.Flags);
		}

		public void vpmovqb(AssemblerMemoryOperand dst, AssemblerRegisterYMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovqb_xmmm32_k1z_ymm, in memory, src), dst.Flags);
		}

		public void vpmovqb(AssemblerRegisterXMM dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovqb_xmmm64_k1z_zmm, dst, src), dst.Flags);
		}

		public void vpmovqb(AssemblerMemoryOperand dst, AssemblerRegisterZMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovqb_xmmm64_k1z_zmm, in memory, src), dst.Flags);
		}

		public void vpmovqd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovqd_xmmm64_k1z_xmm, dst, src), dst.Flags);
		}

		public void vpmovqd(AssemblerMemoryOperand dst, AssemblerRegisterXMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovqd_xmmm64_k1z_xmm, in memory, src), dst.Flags);
		}

		public void vpmovqd(AssemblerRegisterXMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovqd_xmmm128_k1z_ymm, dst, src), dst.Flags);
		}

		public void vpmovqd(AssemblerMemoryOperand dst, AssemblerRegisterYMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovqd_xmmm128_k1z_ymm, in memory, src), dst.Flags);
		}

		public void vpmovqd(AssemblerRegisterYMM dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovqd_ymmm256_k1z_zmm, dst, src), dst.Flags);
		}

		public void vpmovqd(AssemblerMemoryOperand dst, AssemblerRegisterZMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovqd_ymmm256_k1z_zmm, in memory, src), dst.Flags);
		}

		public void vpmovqw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovqw_xmmm32_k1z_xmm, dst, src), dst.Flags);
		}

		public void vpmovqw(AssemblerMemoryOperand dst, AssemblerRegisterXMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovqw_xmmm32_k1z_xmm, in memory, src), dst.Flags);
		}

		public void vpmovqw(AssemblerRegisterXMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovqw_xmmm64_k1z_ymm, dst, src), dst.Flags);
		}

		public void vpmovqw(AssemblerMemoryOperand dst, AssemblerRegisterYMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovqw_xmmm64_k1z_ymm, in memory, src), dst.Flags);
		}

		public void vpmovqw(AssemblerRegisterXMM dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovqw_xmmm128_k1z_zmm, dst, src), dst.Flags);
		}

		public void vpmovqw(AssemblerMemoryOperand dst, AssemblerRegisterZMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovqw_xmmm128_k1z_zmm, in memory, src), dst.Flags);
		}

		public void vpmovsdb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovsdb_xmmm32_k1z_xmm, dst, src), dst.Flags);
		}

		public void vpmovsdb(AssemblerMemoryOperand dst, AssemblerRegisterXMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovsdb_xmmm32_k1z_xmm, in memory, src), dst.Flags);
		}

		public void vpmovsdb(AssemblerRegisterXMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovsdb_xmmm64_k1z_ymm, dst, src), dst.Flags);
		}

		public void vpmovsdb(AssemblerMemoryOperand dst, AssemblerRegisterYMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovsdb_xmmm64_k1z_ymm, in memory, src), dst.Flags);
		}

		public void vpmovsdb(AssemblerRegisterXMM dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovsdb_xmmm128_k1z_zmm, dst, src), dst.Flags);
		}

		public void vpmovsdb(AssemblerMemoryOperand dst, AssemblerRegisterZMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovsdb_xmmm128_k1z_zmm, in memory, src), dst.Flags);
		}

		public void vpmovsdw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovsdw_xmmm64_k1z_xmm, dst, src), dst.Flags);
		}

		public void vpmovsdw(AssemblerMemoryOperand dst, AssemblerRegisterXMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovsdw_xmmm64_k1z_xmm, in memory, src), dst.Flags);
		}

		public void vpmovsdw(AssemblerRegisterXMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovsdw_xmmm128_k1z_ymm, dst, src), dst.Flags);
		}

		public void vpmovsdw(AssemblerMemoryOperand dst, AssemblerRegisterYMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovsdw_xmmm128_k1z_ymm, in memory, src), dst.Flags);
		}

		public void vpmovsdw(AssemblerRegisterYMM dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovsdw_ymmm256_k1z_zmm, dst, src), dst.Flags);
		}

		public void vpmovsdw(AssemblerMemoryOperand dst, AssemblerRegisterZMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovsdw_ymmm256_k1z_zmm, in memory, src), dst.Flags);
		}

		public void vpmovsqb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovsqb_xmmm16_k1z_xmm, dst, src), dst.Flags);
		}

		public void vpmovsqb(AssemblerMemoryOperand dst, AssemblerRegisterXMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovsqb_xmmm16_k1z_xmm, in memory, src), dst.Flags);
		}

		public void vpmovsqb(AssemblerRegisterXMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovsqb_xmmm32_k1z_ymm, dst, src), dst.Flags);
		}

		public void vpmovsqb(AssemblerMemoryOperand dst, AssemblerRegisterYMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovsqb_xmmm32_k1z_ymm, in memory, src), dst.Flags);
		}

		public void vpmovsqb(AssemblerRegisterXMM dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovsqb_xmmm64_k1z_zmm, dst, src), dst.Flags);
		}

		public void vpmovsqb(AssemblerMemoryOperand dst, AssemblerRegisterZMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovsqb_xmmm64_k1z_zmm, in memory, src), dst.Flags);
		}

		public void vpmovsqd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovsqd_xmmm64_k1z_xmm, dst, src), dst.Flags);
		}

		public void vpmovsqd(AssemblerMemoryOperand dst, AssemblerRegisterXMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovsqd_xmmm64_k1z_xmm, in memory, src), dst.Flags);
		}

		public void vpmovsqd(AssemblerRegisterXMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovsqd_xmmm128_k1z_ymm, dst, src), dst.Flags);
		}

		public void vpmovsqd(AssemblerMemoryOperand dst, AssemblerRegisterYMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovsqd_xmmm128_k1z_ymm, in memory, src), dst.Flags);
		}

		public void vpmovsqd(AssemblerRegisterYMM dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovsqd_ymmm256_k1z_zmm, dst, src), dst.Flags);
		}

		public void vpmovsqd(AssemblerMemoryOperand dst, AssemblerRegisterZMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovsqd_ymmm256_k1z_zmm, in memory, src), dst.Flags);
		}

		public void vpmovsqw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovsqw_xmmm32_k1z_xmm, dst, src), dst.Flags);
		}

		public void vpmovsqw(AssemblerMemoryOperand dst, AssemblerRegisterXMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovsqw_xmmm32_k1z_xmm, in memory, src), dst.Flags);
		}

		public void vpmovsqw(AssemblerRegisterXMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovsqw_xmmm64_k1z_ymm, dst, src), dst.Flags);
		}

		public void vpmovsqw(AssemblerMemoryOperand dst, AssemblerRegisterYMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovsqw_xmmm64_k1z_ymm, in memory, src), dst.Flags);
		}

		public void vpmovsqw(AssemblerRegisterXMM dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovsqw_xmmm128_k1z_zmm, dst, src), dst.Flags);
		}

		public void vpmovsqw(AssemblerMemoryOperand dst, AssemblerRegisterZMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovsqw_xmmm128_k1z_zmm, in memory, src), dst.Flags);
		}

		public void vpmovswb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovswb_xmmm64_k1z_xmm, dst, src), dst.Flags);
		}

		public void vpmovswb(AssemblerMemoryOperand dst, AssemblerRegisterXMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovswb_xmmm64_k1z_xmm, in memory, src), dst.Flags);
		}

		public void vpmovswb(AssemblerRegisterXMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovswb_xmmm128_k1z_ymm, dst, src), dst.Flags);
		}

		public void vpmovswb(AssemblerMemoryOperand dst, AssemblerRegisterYMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovswb_xmmm128_k1z_ymm, in memory, src), dst.Flags);
		}

		public void vpmovswb(AssemblerRegisterYMM dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovswb_ymmm256_k1z_zmm, dst, src), dst.Flags);
		}

		public void vpmovswb(AssemblerMemoryOperand dst, AssemblerRegisterZMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovswb_ymmm256_k1z_zmm, in memory, src), dst.Flags);
		}

		public void vpmovsxbd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpmovsxbd_xmm_xmmm32 : Code.EVEX_Vpmovsxbd_xmm_k1z_xmmm32);
			AddInstruction(Instruction.Create(code, dst, src), dst.Flags);
		}

		public void vpmovsxbd(AssemblerRegisterYMM dst, AssemblerRegisterXMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpmovsxbd_ymm_xmmm64 : Code.EVEX_Vpmovsxbd_ymm_k1z_xmmm64);
			AddInstruction(Instruction.Create(code, dst, src), dst.Flags);
		}

		public void vpmovsxbd(AssemblerRegisterZMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovsxbd_zmm_k1z_xmmm128, dst, src), dst.Flags);
		}

		public void vpmovsxbd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpmovsxbd_xmm_xmmm32 : Code.EVEX_Vpmovsxbd_xmm_k1z_xmmm32);
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory), dst.Flags);
		}

		public void vpmovsxbd(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpmovsxbd_ymm_xmmm64 : Code.EVEX_Vpmovsxbd_ymm_k1z_xmmm64);
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory), dst.Flags);
		}

		public void vpmovsxbd(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovsxbd_zmm_k1z_xmmm128, register, in memory), dst.Flags);
		}

		public void vpmovsxbq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpmovsxbq_xmm_xmmm16 : Code.EVEX_Vpmovsxbq_xmm_k1z_xmmm16);
			AddInstruction(Instruction.Create(code, dst, src), dst.Flags);
		}

		public void vpmovsxbq(AssemblerRegisterYMM dst, AssemblerRegisterXMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpmovsxbq_ymm_xmmm32 : Code.EVEX_Vpmovsxbq_ymm_k1z_xmmm32);
			AddInstruction(Instruction.Create(code, dst, src), dst.Flags);
		}

		public void vpmovsxbq(AssemblerRegisterZMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovsxbq_zmm_k1z_xmmm64, dst, src), dst.Flags);
		}

		public void vpmovsxbq(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpmovsxbq_xmm_xmmm16 : Code.EVEX_Vpmovsxbq_xmm_k1z_xmmm16);
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory), dst.Flags);
		}

		public void vpmovsxbq(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpmovsxbq_ymm_xmmm32 : Code.EVEX_Vpmovsxbq_ymm_k1z_xmmm32);
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory), dst.Flags);
		}

		public void vpmovsxbq(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovsxbq_zmm_k1z_xmmm64, register, in memory), dst.Flags);
		}

		public void vpmovsxbw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpmovsxbw_xmm_xmmm64 : Code.EVEX_Vpmovsxbw_xmm_k1z_xmmm64);
			AddInstruction(Instruction.Create(code, dst, src), dst.Flags);
		}

		public void vpmovsxbw(AssemblerRegisterYMM dst, AssemblerRegisterXMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpmovsxbw_ymm_xmmm128 : Code.EVEX_Vpmovsxbw_ymm_k1z_xmmm128);
			AddInstruction(Instruction.Create(code, dst, src), dst.Flags);
		}

		public void vpmovsxbw(AssemblerRegisterZMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovsxbw_zmm_k1z_ymmm256, dst, src), dst.Flags);
		}

		public void vpmovsxbw(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpmovsxbw_xmm_xmmm64 : Code.EVEX_Vpmovsxbw_xmm_k1z_xmmm64);
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory), dst.Flags);
		}

		public void vpmovsxbw(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpmovsxbw_ymm_xmmm128 : Code.EVEX_Vpmovsxbw_ymm_k1z_xmmm128);
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory), dst.Flags);
		}

		public void vpmovsxbw(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovsxbw_zmm_k1z_ymmm256, register, in memory), dst.Flags);
		}

		public void vpmovsxdq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpmovsxdq_xmm_xmmm64 : Code.EVEX_Vpmovsxdq_xmm_k1z_xmmm64);
			AddInstruction(Instruction.Create(code, dst, src), dst.Flags);
		}

		public void vpmovsxdq(AssemblerRegisterYMM dst, AssemblerRegisterXMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpmovsxdq_ymm_xmmm128 : Code.EVEX_Vpmovsxdq_ymm_k1z_xmmm128);
			AddInstruction(Instruction.Create(code, dst, src), dst.Flags);
		}

		public void vpmovsxdq(AssemblerRegisterZMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovsxdq_zmm_k1z_ymmm256, dst, src), dst.Flags);
		}

		public void vpmovsxdq(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpmovsxdq_xmm_xmmm64 : Code.EVEX_Vpmovsxdq_xmm_k1z_xmmm64);
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory), dst.Flags);
		}

		public void vpmovsxdq(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpmovsxdq_ymm_xmmm128 : Code.EVEX_Vpmovsxdq_ymm_k1z_xmmm128);
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory), dst.Flags);
		}

		public void vpmovsxdq(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovsxdq_zmm_k1z_ymmm256, register, in memory), dst.Flags);
		}

		public void vpmovsxwd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpmovsxwd_xmm_xmmm64 : Code.EVEX_Vpmovsxwd_xmm_k1z_xmmm64);
			AddInstruction(Instruction.Create(code, dst, src), dst.Flags);
		}

		public void vpmovsxwd(AssemblerRegisterYMM dst, AssemblerRegisterXMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpmovsxwd_ymm_xmmm128 : Code.EVEX_Vpmovsxwd_ymm_k1z_xmmm128);
			AddInstruction(Instruction.Create(code, dst, src), dst.Flags);
		}

		public void vpmovsxwd(AssemblerRegisterZMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovsxwd_zmm_k1z_ymmm256, dst, src), dst.Flags);
		}

		public void vpmovsxwd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpmovsxwd_xmm_xmmm64 : Code.EVEX_Vpmovsxwd_xmm_k1z_xmmm64);
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory), dst.Flags);
		}

		public void vpmovsxwd(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpmovsxwd_ymm_xmmm128 : Code.EVEX_Vpmovsxwd_ymm_k1z_xmmm128);
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory), dst.Flags);
		}

		public void vpmovsxwd(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovsxwd_zmm_k1z_ymmm256, register, in memory), dst.Flags);
		}

		public void vpmovsxwq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpmovsxwq_xmm_xmmm32 : Code.EVEX_Vpmovsxwq_xmm_k1z_xmmm32);
			AddInstruction(Instruction.Create(code, dst, src), dst.Flags);
		}

		public void vpmovsxwq(AssemblerRegisterYMM dst, AssemblerRegisterXMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpmovsxwq_ymm_xmmm64 : Code.EVEX_Vpmovsxwq_ymm_k1z_xmmm64);
			AddInstruction(Instruction.Create(code, dst, src), dst.Flags);
		}

		public void vpmovsxwq(AssemblerRegisterZMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovsxwq_zmm_k1z_xmmm128, dst, src), dst.Flags);
		}

		public void vpmovsxwq(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpmovsxwq_xmm_xmmm32 : Code.EVEX_Vpmovsxwq_xmm_k1z_xmmm32);
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory), dst.Flags);
		}

		public void vpmovsxwq(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpmovsxwq_ymm_xmmm64 : Code.EVEX_Vpmovsxwq_ymm_k1z_xmmm64);
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory), dst.Flags);
		}

		public void vpmovsxwq(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovsxwq_zmm_k1z_xmmm128, register, in memory), dst.Flags);
		}

		public void vpmovusdb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovusdb_xmmm32_k1z_xmm, dst, src), dst.Flags);
		}

		public void vpmovusdb(AssemblerMemoryOperand dst, AssemblerRegisterXMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovusdb_xmmm32_k1z_xmm, in memory, src), dst.Flags);
		}

		public void vpmovusdb(AssemblerRegisterXMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovusdb_xmmm64_k1z_ymm, dst, src), dst.Flags);
		}

		public void vpmovusdb(AssemblerMemoryOperand dst, AssemblerRegisterYMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovusdb_xmmm64_k1z_ymm, in memory, src), dst.Flags);
		}

		public void vpmovusdb(AssemblerRegisterXMM dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovusdb_xmmm128_k1z_zmm, dst, src), dst.Flags);
		}

		public void vpmovusdb(AssemblerMemoryOperand dst, AssemblerRegisterZMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovusdb_xmmm128_k1z_zmm, in memory, src), dst.Flags);
		}

		public void vpmovusdw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovusdw_xmmm64_k1z_xmm, dst, src), dst.Flags);
		}

		public void vpmovusdw(AssemblerMemoryOperand dst, AssemblerRegisterXMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovusdw_xmmm64_k1z_xmm, in memory, src), dst.Flags);
		}

		public void vpmovusdw(AssemblerRegisterXMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovusdw_xmmm128_k1z_ymm, dst, src), dst.Flags);
		}

		public void vpmovusdw(AssemblerMemoryOperand dst, AssemblerRegisterYMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovusdw_xmmm128_k1z_ymm, in memory, src), dst.Flags);
		}

		public void vpmovusdw(AssemblerRegisterYMM dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovusdw_ymmm256_k1z_zmm, dst, src), dst.Flags);
		}

		public void vpmovusdw(AssemblerMemoryOperand dst, AssemblerRegisterZMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovusdw_ymmm256_k1z_zmm, in memory, src), dst.Flags);
		}

		public void vpmovusqb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovusqb_xmmm16_k1z_xmm, dst, src), dst.Flags);
		}

		public void vpmovusqb(AssemblerMemoryOperand dst, AssemblerRegisterXMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovusqb_xmmm16_k1z_xmm, in memory, src), dst.Flags);
		}

		public void vpmovusqb(AssemblerRegisterXMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovusqb_xmmm32_k1z_ymm, dst, src), dst.Flags);
		}

		public void vpmovusqb(AssemblerMemoryOperand dst, AssemblerRegisterYMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovusqb_xmmm32_k1z_ymm, in memory, src), dst.Flags);
		}

		public void vpmovusqb(AssemblerRegisterXMM dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovusqb_xmmm64_k1z_zmm, dst, src), dst.Flags);
		}

		public void vpmovusqb(AssemblerMemoryOperand dst, AssemblerRegisterZMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovusqb_xmmm64_k1z_zmm, in memory, src), dst.Flags);
		}

		public void vpmovusqd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovusqd_xmmm64_k1z_xmm, dst, src), dst.Flags);
		}

		public void vpmovusqd(AssemblerMemoryOperand dst, AssemblerRegisterXMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovusqd_xmmm64_k1z_xmm, in memory, src), dst.Flags);
		}

		public void vpmovusqd(AssemblerRegisterXMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovusqd_xmmm128_k1z_ymm, dst, src), dst.Flags);
		}

		public void vpmovusqd(AssemblerMemoryOperand dst, AssemblerRegisterYMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovusqd_xmmm128_k1z_ymm, in memory, src), dst.Flags);
		}

		public void vpmovusqd(AssemblerRegisterYMM dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovusqd_ymmm256_k1z_zmm, dst, src), dst.Flags);
		}

		public void vpmovusqd(AssemblerMemoryOperand dst, AssemblerRegisterZMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovusqd_ymmm256_k1z_zmm, in memory, src), dst.Flags);
		}

		public void vpmovusqw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovusqw_xmmm32_k1z_xmm, dst, src), dst.Flags);
		}

		public void vpmovusqw(AssemblerMemoryOperand dst, AssemblerRegisterXMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovusqw_xmmm32_k1z_xmm, in memory, src), dst.Flags);
		}

		public void vpmovusqw(AssemblerRegisterXMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovusqw_xmmm64_k1z_ymm, dst, src), dst.Flags);
		}

		public void vpmovusqw(AssemblerMemoryOperand dst, AssemblerRegisterYMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovusqw_xmmm64_k1z_ymm, in memory, src), dst.Flags);
		}

		public void vpmovusqw(AssemblerRegisterXMM dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovusqw_xmmm128_k1z_zmm, dst, src), dst.Flags);
		}

		public void vpmovusqw(AssemblerMemoryOperand dst, AssemblerRegisterZMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovusqw_xmmm128_k1z_zmm, in memory, src), dst.Flags);
		}

		public void vpmovuswb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovuswb_xmmm64_k1z_xmm, dst, src), dst.Flags);
		}

		public void vpmovuswb(AssemblerMemoryOperand dst, AssemblerRegisterXMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovuswb_xmmm64_k1z_xmm, in memory, src), dst.Flags);
		}

		public void vpmovuswb(AssemblerRegisterXMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovuswb_xmmm128_k1z_ymm, dst, src), dst.Flags);
		}

		public void vpmovuswb(AssemblerMemoryOperand dst, AssemblerRegisterYMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovuswb_xmmm128_k1z_ymm, in memory, src), dst.Flags);
		}

		public void vpmovuswb(AssemblerRegisterYMM dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovuswb_ymmm256_k1z_zmm, dst, src), dst.Flags);
		}

		public void vpmovuswb(AssemblerMemoryOperand dst, AssemblerRegisterZMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovuswb_ymmm256_k1z_zmm, in memory, src), dst.Flags);
		}

		public void vpmovw2m(AssemblerRegisterK dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovw2m_kr_xmm, dst, src));
		}

		public void vpmovw2m(AssemblerRegisterK dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovw2m_kr_ymm, dst, src));
		}

		public void vpmovw2m(AssemblerRegisterK dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovw2m_kr_zmm, dst, src));
		}

		public void vpmovwb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovwb_xmmm64_k1z_xmm, dst, src), dst.Flags);
		}

		public void vpmovwb(AssemblerMemoryOperand dst, AssemblerRegisterXMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovwb_xmmm64_k1z_xmm, in memory, src), dst.Flags);
		}

		public void vpmovwb(AssemblerRegisterXMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovwb_xmmm128_k1z_ymm, dst, src), dst.Flags);
		}

		public void vpmovwb(AssemblerMemoryOperand dst, AssemblerRegisterYMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovwb_xmmm128_k1z_ymm, in memory, src), dst.Flags);
		}

		public void vpmovwb(AssemblerRegisterYMM dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovwb_ymmm256_k1z_zmm, dst, src), dst.Flags);
		}

		public void vpmovwb(AssemblerMemoryOperand dst, AssemblerRegisterZMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovwb_ymmm256_k1z_zmm, in memory, src), dst.Flags);
		}

		public void vpmovzxbd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpmovzxbd_xmm_xmmm32 : Code.EVEX_Vpmovzxbd_xmm_k1z_xmmm32);
			AddInstruction(Instruction.Create(code, dst, src), dst.Flags);
		}

		public void vpmovzxbd(AssemblerRegisterYMM dst, AssemblerRegisterXMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpmovzxbd_ymm_xmmm64 : Code.EVEX_Vpmovzxbd_ymm_k1z_xmmm64);
			AddInstruction(Instruction.Create(code, dst, src), dst.Flags);
		}

		public void vpmovzxbd(AssemblerRegisterZMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovzxbd_zmm_k1z_xmmm128, dst, src), dst.Flags);
		}

		public void vpmovzxbd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpmovzxbd_xmm_xmmm32 : Code.EVEX_Vpmovzxbd_xmm_k1z_xmmm32);
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory), dst.Flags);
		}

		public void vpmovzxbd(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpmovzxbd_ymm_xmmm64 : Code.EVEX_Vpmovzxbd_ymm_k1z_xmmm64);
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory), dst.Flags);
		}

		public void vpmovzxbd(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovzxbd_zmm_k1z_xmmm128, register, in memory), dst.Flags);
		}

		public void vpmovzxbq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpmovzxbq_xmm_xmmm16 : Code.EVEX_Vpmovzxbq_xmm_k1z_xmmm16);
			AddInstruction(Instruction.Create(code, dst, src), dst.Flags);
		}

		public void vpmovzxbq(AssemblerRegisterYMM dst, AssemblerRegisterXMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpmovzxbq_ymm_xmmm32 : Code.EVEX_Vpmovzxbq_ymm_k1z_xmmm32);
			AddInstruction(Instruction.Create(code, dst, src), dst.Flags);
		}

		public void vpmovzxbq(AssemblerRegisterZMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovzxbq_zmm_k1z_xmmm64, dst, src), dst.Flags);
		}

		public void vpmovzxbq(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpmovzxbq_xmm_xmmm16 : Code.EVEX_Vpmovzxbq_xmm_k1z_xmmm16);
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory), dst.Flags);
		}

		public void vpmovzxbq(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpmovzxbq_ymm_xmmm32 : Code.EVEX_Vpmovzxbq_ymm_k1z_xmmm32);
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory), dst.Flags);
		}

		public void vpmovzxbq(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovzxbq_zmm_k1z_xmmm64, register, in memory), dst.Flags);
		}

		public void vpmovzxbw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpmovzxbw_xmm_xmmm64 : Code.EVEX_Vpmovzxbw_xmm_k1z_xmmm64);
			AddInstruction(Instruction.Create(code, dst, src), dst.Flags);
		}

		public void vpmovzxbw(AssemblerRegisterYMM dst, AssemblerRegisterXMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpmovzxbw_ymm_xmmm128 : Code.EVEX_Vpmovzxbw_ymm_k1z_xmmm128);
			AddInstruction(Instruction.Create(code, dst, src), dst.Flags);
		}

		public void vpmovzxbw(AssemblerRegisterZMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovzxbw_zmm_k1z_ymmm256, dst, src), dst.Flags);
		}

		public void vpmovzxbw(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpmovzxbw_xmm_xmmm64 : Code.EVEX_Vpmovzxbw_xmm_k1z_xmmm64);
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory), dst.Flags);
		}

		public void vpmovzxbw(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpmovzxbw_ymm_xmmm128 : Code.EVEX_Vpmovzxbw_ymm_k1z_xmmm128);
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory), dst.Flags);
		}

		public void vpmovzxbw(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovzxbw_zmm_k1z_ymmm256, register, in memory), dst.Flags);
		}

		public void vpmovzxdq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpmovzxdq_xmm_xmmm64 : Code.EVEX_Vpmovzxdq_xmm_k1z_xmmm64);
			AddInstruction(Instruction.Create(code, dst, src), dst.Flags);
		}

		public void vpmovzxdq(AssemblerRegisterYMM dst, AssemblerRegisterXMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpmovzxdq_ymm_xmmm128 : Code.EVEX_Vpmovzxdq_ymm_k1z_xmmm128);
			AddInstruction(Instruction.Create(code, dst, src), dst.Flags);
		}

		public void vpmovzxdq(AssemblerRegisterZMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovzxdq_zmm_k1z_ymmm256, dst, src), dst.Flags);
		}

		public void vpmovzxdq(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpmovzxdq_xmm_xmmm64 : Code.EVEX_Vpmovzxdq_xmm_k1z_xmmm64);
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory), dst.Flags);
		}

		public void vpmovzxdq(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpmovzxdq_ymm_xmmm128 : Code.EVEX_Vpmovzxdq_ymm_k1z_xmmm128);
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory), dst.Flags);
		}

		public void vpmovzxdq(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovzxdq_zmm_k1z_ymmm256, register, in memory), dst.Flags);
		}

		public void vpmovzxwd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpmovzxwd_xmm_xmmm64 : Code.EVEX_Vpmovzxwd_xmm_k1z_xmmm64);
			AddInstruction(Instruction.Create(code, dst, src), dst.Flags);
		}

		public void vpmovzxwd(AssemblerRegisterYMM dst, AssemblerRegisterXMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpmovzxwd_ymm_xmmm128 : Code.EVEX_Vpmovzxwd_ymm_k1z_xmmm128);
			AddInstruction(Instruction.Create(code, dst, src), dst.Flags);
		}

		public void vpmovzxwd(AssemblerRegisterZMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovzxwd_zmm_k1z_ymmm256, dst, src), dst.Flags);
		}

		public void vpmovzxwd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpmovzxwd_xmm_xmmm64 : Code.EVEX_Vpmovzxwd_xmm_k1z_xmmm64);
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory), dst.Flags);
		}

		public void vpmovzxwd(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpmovzxwd_ymm_xmmm128 : Code.EVEX_Vpmovzxwd_ymm_k1z_xmmm128);
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory), dst.Flags);
		}

		public void vpmovzxwd(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovzxwd_zmm_k1z_ymmm256, register, in memory), dst.Flags);
		}

		public void vpmovzxwq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpmovzxwq_xmm_xmmm32 : Code.EVEX_Vpmovzxwq_xmm_k1z_xmmm32);
			AddInstruction(Instruction.Create(code, dst, src), dst.Flags);
		}

		public void vpmovzxwq(AssemblerRegisterYMM dst, AssemblerRegisterXMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpmovzxwq_ymm_xmmm64 : Code.EVEX_Vpmovzxwq_ymm_k1z_xmmm64);
			AddInstruction(Instruction.Create(code, dst, src), dst.Flags);
		}

		public void vpmovzxwq(AssemblerRegisterZMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovzxwq_zmm_k1z_xmmm128, dst, src), dst.Flags);
		}

		public void vpmovzxwq(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpmovzxwq_xmm_xmmm32 : Code.EVEX_Vpmovzxwq_xmm_k1z_xmmm32);
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory), dst.Flags);
		}

		public void vpmovzxwq(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpmovzxwq_ymm_xmmm64 : Code.EVEX_Vpmovzxwq_ymm_k1z_xmmm64);
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory), dst.Flags);
		}

		public void vpmovzxwq(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpmovzxwq_zmm_k1z_xmmm128, register, in memory), dst.Flags);
		}

		public void vpmuldq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpmuldq_xmm_xmm_xmmm128 : Code.EVEX_Vpmuldq_xmm_k1z_xmm_xmmm128b64);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpmuldq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpmuldq_ymm_ymm_ymmm256 : Code.EVEX_Vpmuldq_ymm_k1z_ymm_ymmm256b64);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpmuldq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmuldq_zmm_k1z_zmm_zmmm512b64, dst, src1, src2), dst.Flags);
		}

		public void vpmuldq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vpmuldq_xmm_xmm_xmmm128 : Code.EVEX_Vpmuldq_xmm_k1z_xmm_xmmm128b64) : Code.EVEX_Vpmuldq_xmm_k1z_xmm_xmmm128b64);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpmuldq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vpmuldq_ymm_ymm_ymmm256 : Code.EVEX_Vpmuldq_ymm_k1z_ymm_ymmm256b64) : Code.EVEX_Vpmuldq_ymm_k1z_ymm_ymmm256b64);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpmuldq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpmuldq_zmm_k1z_zmm_zmmm512b64, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpmulhrsw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpmulhrsw_xmm_xmm_xmmm128 : Code.EVEX_Vpmulhrsw_xmm_k1z_xmm_xmmm128);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpmulhrsw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpmulhrsw_ymm_ymm_ymmm256 : Code.EVEX_Vpmulhrsw_ymm_k1z_ymm_ymmm256);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpmulhrsw(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmulhrsw_zmm_k1z_zmm_zmmm512, dst, src1, src2), dst.Flags);
		}

		public void vpmulhrsw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpmulhrsw_xmm_xmm_xmmm128 : Code.EVEX_Vpmulhrsw_xmm_k1z_xmm_xmmm128);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags);
		}

		public void vpmulhrsw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpmulhrsw_ymm_ymm_ymmm256 : Code.EVEX_Vpmulhrsw_ymm_k1z_ymm_ymmm256);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags);
		}

		public void vpmulhrsw(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpmulhrsw_zmm_k1z_zmm_zmmm512, register, register2, in memory), dst.Flags);
		}

		public void vpmulhuw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpmulhuw_xmm_xmm_xmmm128 : Code.EVEX_Vpmulhuw_xmm_k1z_xmm_xmmm128);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpmulhuw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpmulhuw_ymm_ymm_ymmm256 : Code.EVEX_Vpmulhuw_ymm_k1z_ymm_ymmm256);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpmulhuw(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmulhuw_zmm_k1z_zmm_zmmm512, dst, src1, src2), dst.Flags);
		}

		public void vpmulhuw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpmulhuw_xmm_xmm_xmmm128 : Code.EVEX_Vpmulhuw_xmm_k1z_xmm_xmmm128);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags);
		}

		public void vpmulhuw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpmulhuw_ymm_ymm_ymmm256 : Code.EVEX_Vpmulhuw_ymm_k1z_ymm_ymmm256);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags);
		}

		public void vpmulhuw(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpmulhuw_zmm_k1z_zmm_zmmm512, register, register2, in memory), dst.Flags);
		}

		public void vpmulhw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpmulhw_xmm_xmm_xmmm128 : Code.EVEX_Vpmulhw_xmm_k1z_xmm_xmmm128);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpmulhw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpmulhw_ymm_ymm_ymmm256 : Code.EVEX_Vpmulhw_ymm_k1z_ymm_ymmm256);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpmulhw(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmulhw_zmm_k1z_zmm_zmmm512, dst, src1, src2), dst.Flags);
		}

		public void vpmulhw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpmulhw_xmm_xmm_xmmm128 : Code.EVEX_Vpmulhw_xmm_k1z_xmm_xmmm128);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags);
		}

		public void vpmulhw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpmulhw_ymm_ymm_ymmm256 : Code.EVEX_Vpmulhw_ymm_k1z_ymm_ymmm256);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags);
		}

		public void vpmulhw(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpmulhw_zmm_k1z_zmm_zmmm512, register, register2, in memory), dst.Flags);
		}

		public void vpmulld(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpmulld_xmm_xmm_xmmm128 : Code.EVEX_Vpmulld_xmm_k1z_xmm_xmmm128b32);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpmulld(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpmulld_ymm_ymm_ymmm256 : Code.EVEX_Vpmulld_ymm_k1z_ymm_ymmm256b32);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpmulld(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmulld_zmm_k1z_zmm_zmmm512b32, dst, src1, src2), dst.Flags);
		}

		public void vpmulld(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vpmulld_xmm_xmm_xmmm128 : Code.EVEX_Vpmulld_xmm_k1z_xmm_xmmm128b32) : Code.EVEX_Vpmulld_xmm_k1z_xmm_xmmm128b32);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpmulld(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vpmulld_ymm_ymm_ymmm256 : Code.EVEX_Vpmulld_ymm_k1z_ymm_ymmm256b32) : Code.EVEX_Vpmulld_ymm_k1z_ymm_ymmm256b32);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpmulld(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpmulld_zmm_k1z_zmm_zmmm512b32, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpmullq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmullq_xmm_k1z_xmm_xmmm128b64, dst, src1, src2), dst.Flags);
		}

		public void vpmullq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmullq_ymm_k1z_ymm_ymmm256b64, dst, src1, src2), dst.Flags);
		}

		public void vpmullq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmullq_zmm_k1z_zmm_zmmm512b64, dst, src1, src2), dst.Flags);
		}

		public void vpmullq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpmullq_xmm_k1z_xmm_xmmm128b64, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpmullq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpmullq_ymm_k1z_ymm_ymmm256b64, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpmullq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpmullq_zmm_k1z_zmm_zmmm512b64, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpmullw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpmullw_xmm_xmm_xmmm128 : Code.EVEX_Vpmullw_xmm_k1z_xmm_xmmm128);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpmullw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpmullw_ymm_ymm_ymmm256 : Code.EVEX_Vpmullw_ymm_k1z_ymm_ymmm256);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpmullw(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmullw_zmm_k1z_zmm_zmmm512, dst, src1, src2), dst.Flags);
		}

		public void vpmullw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpmullw_xmm_xmm_xmmm128 : Code.EVEX_Vpmullw_xmm_k1z_xmm_xmmm128);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags);
		}

		public void vpmullw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpmullw_ymm_ymm_ymmm256 : Code.EVEX_Vpmullw_ymm_k1z_ymm_ymmm256);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags);
		}

		public void vpmullw(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpmullw_zmm_k1z_zmm_zmmm512, register, register2, in memory), dst.Flags);
		}

		public void vpmultishiftqb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmultishiftqb_xmm_k1z_xmm_xmmm128b64, dst, src1, src2), dst.Flags);
		}

		public void vpmultishiftqb(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmultishiftqb_ymm_k1z_ymm_ymmm256b64, dst, src1, src2), dst.Flags);
		}

		public void vpmultishiftqb(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmultishiftqb_zmm_k1z_zmm_zmmm512b64, dst, src1, src2), dst.Flags);
		}

		public void vpmultishiftqb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpmultishiftqb_xmm_k1z_xmm_xmmm128b64, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpmultishiftqb(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpmultishiftqb_ymm_k1z_ymm_ymmm256b64, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpmultishiftqb(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpmultishiftqb_zmm_k1z_zmm_zmmm512b64, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpmuludq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpmuludq_xmm_xmm_xmmm128 : Code.EVEX_Vpmuludq_xmm_k1z_xmm_xmmm128b64);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpmuludq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpmuludq_ymm_ymm_ymmm256 : Code.EVEX_Vpmuludq_ymm_k1z_ymm_ymmm256b64);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpmuludq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpmuludq_zmm_k1z_zmm_zmmm512b64, dst, src1, src2), dst.Flags);
		}

		public void vpmuludq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vpmuludq_xmm_xmm_xmmm128 : Code.EVEX_Vpmuludq_xmm_k1z_xmm_xmmm128b64) : Code.EVEX_Vpmuludq_xmm_k1z_xmm_xmmm128b64);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpmuludq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vpmuludq_ymm_ymm_ymmm256 : Code.EVEX_Vpmuludq_ymm_k1z_ymm_ymmm256b64) : Code.EVEX_Vpmuludq_ymm_k1z_ymm_ymmm256b64);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpmuludq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpmuludq_zmm_k1z_zmm_zmmm512b64, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpopcntb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpopcntb_xmm_k1z_xmmm128, dst, src), dst.Flags);
		}

		public void vpopcntb(AssemblerRegisterYMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpopcntb_ymm_k1z_ymmm256, dst, src), dst.Flags);
		}

		public void vpopcntb(AssemblerRegisterZMM dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpopcntb_zmm_k1z_zmmm512, dst, src), dst.Flags);
		}

		public void vpopcntb(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpopcntb_xmm_k1z_xmmm128, register, in memory), dst.Flags);
		}

		public void vpopcntb(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpopcntb_ymm_k1z_ymmm256, register, in memory), dst.Flags);
		}

		public void vpopcntb(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpopcntb_zmm_k1z_zmmm512, register, in memory), dst.Flags);
		}

		public void vpopcntd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpopcntd_xmm_k1z_xmmm128b32, dst, src), dst.Flags);
		}

		public void vpopcntd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpopcntd_ymm_k1z_ymmm256b32, dst, src), dst.Flags);
		}

		public void vpopcntd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpopcntd_zmm_k1z_zmmm512b32, dst, src), dst.Flags);
		}

		public void vpopcntd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpopcntd_xmm_k1z_xmmm128b32, register, in memory), dst.Flags | src.Flags);
		}

		public void vpopcntd(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpopcntd_ymm_k1z_ymmm256b32, register, in memory), dst.Flags | src.Flags);
		}

		public void vpopcntd(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpopcntd_zmm_k1z_zmmm512b32, register, in memory), dst.Flags | src.Flags);
		}

		public void vpopcntq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpopcntq_xmm_k1z_xmmm128b64, dst, src), dst.Flags);
		}

		public void vpopcntq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpopcntq_ymm_k1z_ymmm256b64, dst, src), dst.Flags);
		}

		public void vpopcntq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpopcntq_zmm_k1z_zmmm512b64, dst, src), dst.Flags);
		}

		public void vpopcntq(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpopcntq_xmm_k1z_xmmm128b64, register, in memory), dst.Flags | src.Flags);
		}

		public void vpopcntq(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpopcntq_ymm_k1z_ymmm256b64, register, in memory), dst.Flags | src.Flags);
		}

		public void vpopcntq(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpopcntq_zmm_k1z_zmmm512b64, register, in memory), dst.Flags | src.Flags);
		}

		public void vpopcntw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpopcntw_xmm_k1z_xmmm128, dst, src), dst.Flags);
		}

		public void vpopcntw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpopcntw_ymm_k1z_ymmm256, dst, src), dst.Flags);
		}

		public void vpopcntw(AssemblerRegisterZMM dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpopcntw_zmm_k1z_zmmm512, dst, src), dst.Flags);
		}

		public void vpopcntw(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpopcntw_xmm_k1z_xmmm128, register, in memory), dst.Flags);
		}

		public void vpopcntw(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpopcntw_ymm_k1z_ymmm256, register, in memory), dst.Flags);
		}

		public void vpopcntw(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpopcntw_zmm_k1z_zmmm512, register, in memory), dst.Flags);
		}

		public void vpor(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vpor_xmm_xmm_xmmm128, dst, src1, src2));
		}

		public void vpor(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vpor_ymm_ymm_ymmm256, dst, src1, src2));
		}

		public void vpor(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vpor_xmm_xmm_xmmm128, register, register2, in memory));
		}

		public void vpor(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vpor_ymm_ymm_ymmm256, register, register2, in memory));
		}

		public void vpord(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpord_xmm_k1z_xmm_xmmm128b32, dst, src1, src2), dst.Flags);
		}

		public void vpord(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpord_ymm_k1z_ymm_ymmm256b32, dst, src1, src2), dst.Flags);
		}

		public void vpord(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpord_zmm_k1z_zmm_zmmm512b32, dst, src1, src2), dst.Flags);
		}

		public void vpord(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpord_xmm_k1z_xmm_xmmm128b32, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpord(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpord_ymm_k1z_ymm_ymmm256b32, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpord(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpord_zmm_k1z_zmm_zmmm512b32, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vporq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vporq_xmm_k1z_xmm_xmmm128b64, dst, src1, src2), dst.Flags);
		}

		public void vporq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vporq_ymm_k1z_ymm_ymmm256b64, dst, src1, src2), dst.Flags);
		}

		public void vporq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vporq_zmm_k1z_zmm_zmmm512b64, dst, src1, src2), dst.Flags);
		}

		public void vporq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vporq_xmm_k1z_xmm_xmmm128b64, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vporq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vporq_ymm_k1z_ymm_ymmm256b64, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vporq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vporq_zmm_k1z_zmm_zmmm512b64, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpperm(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, AssemblerRegisterXMM src3)
		{
			AddInstruction(Instruction.Create(Code.XOP_Vpperm_xmm_xmm_xmmm128_xmm, dst, src1, src2, src3));
		}

		public void vpperm(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, AssemblerRegisterXMM src3)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Vpperm_xmm_xmm_xmmm128_xmm, register, register2, in memory, src3));
		}

		public void vpperm(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, AssemblerMemoryOperand src3)
		{
			Register register = dst;
			Register register2 = src1;
			Register register3 = src2;
			MemoryOperand memory = src3.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Vpperm_xmm_xmm_xmm_xmmm128, register, register2, register3, in memory));
		}

		public void vprold(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vprold_xmm_k1z_xmmm128b32_imm8, dst, src1, imm), dst.Flags);
		}

		public void vprold(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vprold_ymm_k1z_ymmm256b32_imm8, dst, src1, imm), dst.Flags);
		}

		public void vprold(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vprold_zmm_k1z_zmmm512b32_imm8, dst, src1, imm), dst.Flags);
		}

		public void vprold(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vprold_xmm_k1z_xmmm128b32_imm8, register, in memory, imm), dst.Flags | src1.Flags);
		}

		public void vprold(AssemblerRegisterYMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vprold_ymm_k1z_ymmm256b32_imm8, register, in memory, imm), dst.Flags | src1.Flags);
		}

		public void vprold(AssemblerRegisterZMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vprold_zmm_k1z_zmmm512b32_imm8, register, in memory, imm), dst.Flags | src1.Flags);
		}

		public void vprold(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vprold_xmm_k1z_xmmm128b32_imm8, (Register)dst, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vprold(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vprold_ymm_k1z_ymmm256b32_imm8, (Register)dst, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vprold(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vprold_zmm_k1z_zmmm512b32_imm8, (Register)dst, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vprold(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vprold_xmm_k1z_xmmm128b32_imm8, register, in memory, (uint)imm), dst.Flags | src1.Flags);
		}

		public void vprold(AssemblerRegisterYMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vprold_ymm_k1z_ymmm256b32_imm8, register, in memory, (uint)imm), dst.Flags | src1.Flags);
		}

		public void vprold(AssemblerRegisterZMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vprold_zmm_k1z_zmmm512b32_imm8, register, in memory, (uint)imm), dst.Flags | src1.Flags);
		}

		public void vprolq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vprolq_xmm_k1z_xmmm128b64_imm8, dst, src1, imm), dst.Flags);
		}

		public void vprolq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vprolq_ymm_k1z_ymmm256b64_imm8, dst, src1, imm), dst.Flags);
		}

		public void vprolq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vprolq_zmm_k1z_zmmm512b64_imm8, dst, src1, imm), dst.Flags);
		}

		public void vprolq(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vprolq_xmm_k1z_xmmm128b64_imm8, register, in memory, imm), dst.Flags | src1.Flags);
		}

		public void vprolq(AssemblerRegisterYMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vprolq_ymm_k1z_ymmm256b64_imm8, register, in memory, imm), dst.Flags | src1.Flags);
		}

		public void vprolq(AssemblerRegisterZMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vprolq_zmm_k1z_zmmm512b64_imm8, register, in memory, imm), dst.Flags | src1.Flags);
		}

		public void vprolq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vprolq_xmm_k1z_xmmm128b64_imm8, (Register)dst, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vprolq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vprolq_ymm_k1z_ymmm256b64_imm8, (Register)dst, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vprolq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vprolq_zmm_k1z_zmmm512b64_imm8, (Register)dst, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vprolq(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vprolq_xmm_k1z_xmmm128b64_imm8, register, in memory, (uint)imm), dst.Flags | src1.Flags);
		}

		public void vprolq(AssemblerRegisterYMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vprolq_ymm_k1z_ymmm256b64_imm8, register, in memory, (uint)imm), dst.Flags | src1.Flags);
		}

		public void vprolq(AssemblerRegisterZMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vprolq_zmm_k1z_zmmm512b64_imm8, register, in memory, (uint)imm), dst.Flags | src1.Flags);
		}

		public void vprolvd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vprolvd_xmm_k1z_xmm_xmmm128b32, dst, src1, src2), dst.Flags);
		}

		public void vprolvd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vprolvd_ymm_k1z_ymm_ymmm256b32, dst, src1, src2), dst.Flags);
		}

		public void vprolvd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vprolvd_zmm_k1z_zmm_zmmm512b32, dst, src1, src2), dst.Flags);
		}

		public void vprolvd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vprolvd_xmm_k1z_xmm_xmmm128b32, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vprolvd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vprolvd_ymm_k1z_ymm_ymmm256b32, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vprolvd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vprolvd_zmm_k1z_zmm_zmmm512b32, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vprolvq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vprolvq_xmm_k1z_xmm_xmmm128b64, dst, src1, src2), dst.Flags);
		}

		public void vprolvq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vprolvq_ymm_k1z_ymm_ymmm256b64, dst, src1, src2), dst.Flags);
		}

		public void vprolvq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vprolvq_zmm_k1z_zmm_zmmm512b64, dst, src1, src2), dst.Flags);
		}

		public void vprolvq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vprolvq_xmm_k1z_xmm_xmmm128b64, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vprolvq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vprolvq_ymm_k1z_ymm_ymmm256b64, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vprolvq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vprolvq_zmm_k1z_zmm_zmmm512b64, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vprord(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vprord_xmm_k1z_xmmm128b32_imm8, dst, src1, imm), dst.Flags);
		}

		public void vprord(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vprord_ymm_k1z_ymmm256b32_imm8, dst, src1, imm), dst.Flags);
		}

		public void vprord(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vprord_zmm_k1z_zmmm512b32_imm8, dst, src1, imm), dst.Flags);
		}

		public void vprord(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vprord_xmm_k1z_xmmm128b32_imm8, register, in memory, imm), dst.Flags | src1.Flags);
		}

		public void vprord(AssemblerRegisterYMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vprord_ymm_k1z_ymmm256b32_imm8, register, in memory, imm), dst.Flags | src1.Flags);
		}

		public void vprord(AssemblerRegisterZMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vprord_zmm_k1z_zmmm512b32_imm8, register, in memory, imm), dst.Flags | src1.Flags);
		}

		public void vprord(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vprord_xmm_k1z_xmmm128b32_imm8, (Register)dst, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vprord(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vprord_ymm_k1z_ymmm256b32_imm8, (Register)dst, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vprord(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vprord_zmm_k1z_zmmm512b32_imm8, (Register)dst, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vprord(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vprord_xmm_k1z_xmmm128b32_imm8, register, in memory, (uint)imm), dst.Flags | src1.Flags);
		}

		public void vprord(AssemblerRegisterYMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vprord_ymm_k1z_ymmm256b32_imm8, register, in memory, (uint)imm), dst.Flags | src1.Flags);
		}

		public void vprord(AssemblerRegisterZMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vprord_zmm_k1z_zmmm512b32_imm8, register, in memory, (uint)imm), dst.Flags | src1.Flags);
		}

		public void vprorq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vprorq_xmm_k1z_xmmm128b64_imm8, dst, src1, imm), dst.Flags);
		}

		public void vprorq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vprorq_ymm_k1z_ymmm256b64_imm8, dst, src1, imm), dst.Flags);
		}

		public void vprorq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vprorq_zmm_k1z_zmmm512b64_imm8, dst, src1, imm), dst.Flags);
		}

		public void vprorq(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vprorq_xmm_k1z_xmmm128b64_imm8, register, in memory, imm), dst.Flags | src1.Flags);
		}

		public void vprorq(AssemblerRegisterYMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vprorq_ymm_k1z_ymmm256b64_imm8, register, in memory, imm), dst.Flags | src1.Flags);
		}

		public void vprorq(AssemblerRegisterZMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vprorq_zmm_k1z_zmmm512b64_imm8, register, in memory, imm), dst.Flags | src1.Flags);
		}

		public void vprorq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vprorq_xmm_k1z_xmmm128b64_imm8, (Register)dst, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vprorq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vprorq_ymm_k1z_ymmm256b64_imm8, (Register)dst, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vprorq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vprorq_zmm_k1z_zmmm512b64_imm8, (Register)dst, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vprorq(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vprorq_xmm_k1z_xmmm128b64_imm8, register, in memory, (uint)imm), dst.Flags | src1.Flags);
		}

		public void vprorq(AssemblerRegisterYMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vprorq_ymm_k1z_ymmm256b64_imm8, register, in memory, (uint)imm), dst.Flags | src1.Flags);
		}

		public void vprorq(AssemblerRegisterZMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vprorq_zmm_k1z_zmmm512b64_imm8, register, in memory, (uint)imm), dst.Flags | src1.Flags);
		}

		public void vprorvd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vprorvd_xmm_k1z_xmm_xmmm128b32, dst, src1, src2), dst.Flags);
		}

		public void vprorvd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vprorvd_ymm_k1z_ymm_ymmm256b32, dst, src1, src2), dst.Flags);
		}

		public void vprorvd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vprorvd_zmm_k1z_zmm_zmmm512b32, dst, src1, src2), dst.Flags);
		}

		public void vprorvd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vprorvd_xmm_k1z_xmm_xmmm128b32, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vprorvd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vprorvd_ymm_k1z_ymm_ymmm256b32, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vprorvd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vprorvd_zmm_k1z_zmm_zmmm512b32, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vprorvq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vprorvq_xmm_k1z_xmm_xmmm128b64, dst, src1, src2), dst.Flags);
		}

		public void vprorvq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vprorvq_ymm_k1z_ymm_ymmm256b64, dst, src1, src2), dst.Flags);
		}

		public void vprorvq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vprorvq_zmm_k1z_zmm_zmmm512b64, dst, src1, src2), dst.Flags);
		}

		public void vprorvq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vprorvq_xmm_k1z_xmm_xmmm128b64, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vprorvq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vprorvq_ymm_k1z_ymm_ymmm256b64, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vprorvq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vprorvq_zmm_k1z_zmm_zmmm512b64, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vprotb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.XOP_Vprotb_xmm_xmmm128_xmm, dst, src1, src2));
		}

		public void vprotb(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, AssemblerRegisterXMM src2)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Vprotb_xmm_xmmm128_xmm, register, in memory, src2));
		}

		public void vprotb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Vprotb_xmm_xmm_xmmm128, register, register2, in memory));
		}

		public void vprotb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.XOP_Vprotb_xmm_xmmm128_imm8, dst, src1, imm));
		}

		public void vprotb(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Vprotb_xmm_xmmm128_imm8, register, in memory, imm));
		}

		public void vprotb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.XOP_Vprotb_xmm_xmmm128_imm8, (Register)dst, (Register)src1, (uint)imm));
		}

		public void vprotb(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Vprotb_xmm_xmmm128_imm8, register, in memory, (uint)imm));
		}

		public void vprotd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.XOP_Vprotd_xmm_xmmm128_xmm, dst, src1, src2));
		}

		public void vprotd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, AssemblerRegisterXMM src2)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Vprotd_xmm_xmmm128_xmm, register, in memory, src2));
		}

		public void vprotd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Vprotd_xmm_xmm_xmmm128, register, register2, in memory));
		}

		public void vprotd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.XOP_Vprotd_xmm_xmmm128_imm8, dst, src1, imm));
		}

		public void vprotd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Vprotd_xmm_xmmm128_imm8, register, in memory, imm));
		}

		public void vprotd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.XOP_Vprotd_xmm_xmmm128_imm8, (Register)dst, (Register)src1, (uint)imm));
		}

		public void vprotd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Vprotd_xmm_xmmm128_imm8, register, in memory, (uint)imm));
		}

		public void vprotq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.XOP_Vprotq_xmm_xmmm128_xmm, dst, src1, src2));
		}

		public void vprotq(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, AssemblerRegisterXMM src2)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Vprotq_xmm_xmmm128_xmm, register, in memory, src2));
		}

		public void vprotq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Vprotq_xmm_xmm_xmmm128, register, register2, in memory));
		}

		public void vprotq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.XOP_Vprotq_xmm_xmmm128_imm8, dst, src1, imm));
		}

		public void vprotq(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Vprotq_xmm_xmmm128_imm8, register, in memory, imm));
		}

		public void vprotq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.XOP_Vprotq_xmm_xmmm128_imm8, (Register)dst, (Register)src1, (uint)imm));
		}

		public void vprotq(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Vprotq_xmm_xmmm128_imm8, register, in memory, (uint)imm));
		}

		public void vprotw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.XOP_Vprotw_xmm_xmmm128_xmm, dst, src1, src2));
		}

		public void vprotw(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, AssemblerRegisterXMM src2)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Vprotw_xmm_xmmm128_xmm, register, in memory, src2));
		}

		public void vprotw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Vprotw_xmm_xmm_xmmm128, register, register2, in memory));
		}

		public void vprotw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.XOP_Vprotw_xmm_xmmm128_imm8, dst, src1, imm));
		}

		public void vprotw(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Vprotw_xmm_xmmm128_imm8, register, in memory, imm));
		}

		public void vprotw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.XOP_Vprotw_xmm_xmmm128_imm8, (Register)dst, (Register)src1, (uint)imm));
		}

		public void vprotw(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Vprotw_xmm_xmmm128_imm8, register, in memory, (uint)imm));
		}

		public void vpsadbw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpsadbw_xmm_xmm_xmmm128 : Code.EVEX_Vpsadbw_xmm_xmm_xmmm128);
			AddInstruction(Instruction.Create(code, dst, src1, src2));
		}

		public void vpsadbw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpsadbw_ymm_ymm_ymmm256 : Code.EVEX_Vpsadbw_ymm_ymm_ymmm256);
			AddInstruction(Instruction.Create(code, dst, src1, src2));
		}

		public void vpsadbw(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpsadbw_zmm_zmm_zmmm512, dst, src1, src2));
		}

		public void vpsadbw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpsadbw_xmm_xmm_xmmm128 : Code.EVEX_Vpsadbw_xmm_xmm_xmmm128);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory));
		}

		public void vpsadbw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpsadbw_ymm_ymm_ymmm256 : Code.EVEX_Vpsadbw_ymm_ymm_ymmm256);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory));
		}

		public void vpsadbw(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpsadbw_zmm_zmm_zmmm512, register, register2, in memory));
		}

		public void vpscatterdd(AssemblerMemoryOperand dst, AssemblerRegisterXMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpscatterdd_vm32x_k1_xmm, in memory, src), dst.Flags);
		}

		public void vpscatterdd(AssemblerMemoryOperand dst, AssemblerRegisterYMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpscatterdd_vm32y_k1_ymm, in memory, src), dst.Flags);
		}

		public void vpscatterdd(AssemblerMemoryOperand dst, AssemblerRegisterZMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpscatterdd_vm32z_k1_zmm, in memory, src), dst.Flags);
		}

		public void vpscatterdq(AssemblerMemoryOperand dst, AssemblerRegisterXMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpscatterdq_vm32x_k1_xmm, in memory, src), dst.Flags);
		}

		public void vpscatterdq(AssemblerMemoryOperand dst, AssemblerRegisterYMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpscatterdq_vm32x_k1_ymm, in memory, src), dst.Flags);
		}

		public void vpscatterdq(AssemblerMemoryOperand dst, AssemblerRegisterZMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpscatterdq_vm32y_k1_zmm, in memory, src), dst.Flags);
		}

		public void vpscatterqd(AssemblerMemoryOperand dst, AssemblerRegisterXMM src)
		{
			Code code;
			if (dst.Index.IsXMM())
			{
				code = Code.EVEX_Vpscatterqd_vm64x_k1_xmm;
			}
			else
			{
				if (!dst.Index.IsYMM())
				{
					throw NoOpCodeFoundFor(Mnemonic.Vpscatterqd, dst, src);
				}
				code = Code.EVEX_Vpscatterqd_vm64y_k1_xmm;
			}
			Code code2 = code;
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, in memory, src), dst.Flags);
		}

		public void vpscatterqd(AssemblerMemoryOperand dst, AssemblerRegisterYMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpscatterqd_vm64z_k1_ymm, in memory, src), dst.Flags);
		}

		public void vpscatterqq(AssemblerMemoryOperand dst, AssemblerRegisterXMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpscatterqq_vm64x_k1_xmm, in memory, src), dst.Flags);
		}

		public void vpscatterqq(AssemblerMemoryOperand dst, AssemblerRegisterYMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpscatterqq_vm64y_k1_ymm, in memory, src), dst.Flags);
		}

		public void vpscatterqq(AssemblerMemoryOperand dst, AssemblerRegisterZMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpscatterqq_vm64z_k1_zmm, in memory, src), dst.Flags);
		}

		public void vpshab(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.XOP_Vpshab_xmm_xmmm128_xmm, dst, src1, src2));
		}

		public void vpshab(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, AssemblerRegisterXMM src2)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Vpshab_xmm_xmmm128_xmm, register, in memory, src2));
		}

		public void vpshab(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Vpshab_xmm_xmm_xmmm128, register, register2, in memory));
		}

		public void vpshad(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.XOP_Vpshad_xmm_xmmm128_xmm, dst, src1, src2));
		}

		public void vpshad(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, AssemblerRegisterXMM src2)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Vpshad_xmm_xmmm128_xmm, register, in memory, src2));
		}

		public void vpshad(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Vpshad_xmm_xmm_xmmm128, register, register2, in memory));
		}

		public void vpshaq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.XOP_Vpshaq_xmm_xmmm128_xmm, dst, src1, src2));
		}

		public void vpshaq(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, AssemblerRegisterXMM src2)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Vpshaq_xmm_xmmm128_xmm, register, in memory, src2));
		}

		public void vpshaq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Vpshaq_xmm_xmm_xmmm128, register, register2, in memory));
		}

		public void vpshaw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.XOP_Vpshaw_xmm_xmmm128_xmm, dst, src1, src2));
		}

		public void vpshaw(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, AssemblerRegisterXMM src2)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Vpshaw_xmm_xmmm128_xmm, register, in memory, src2));
		}

		public void vpshaw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Vpshaw_xmm_xmm_xmmm128, register, register2, in memory));
		}

		public void vpshlb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.XOP_Vpshlb_xmm_xmmm128_xmm, dst, src1, src2));
		}

		public void vpshlb(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, AssemblerRegisterXMM src2)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Vpshlb_xmm_xmmm128_xmm, register, in memory, src2));
		}

		public void vpshlb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Vpshlb_xmm_xmm_xmmm128, register, register2, in memory));
		}

		public void vpshld(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.XOP_Vpshld_xmm_xmmm128_xmm, dst, src1, src2));
		}

		public void vpshld(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, AssemblerRegisterXMM src2)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Vpshld_xmm_xmmm128_xmm, register, in memory, src2));
		}

		public void vpshld(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Vpshld_xmm_xmm_xmmm128, register, register2, in memory));
		}

		public void vpshldd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpshldd_xmm_k1z_xmm_xmmm128b32_imm8, dst, src1, src2, imm), dst.Flags);
		}

		public void vpshldd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpshldd_ymm_k1z_ymm_ymmm256b32_imm8, dst, src1, src2, imm), dst.Flags);
		}

		public void vpshldd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpshldd_zmm_k1z_zmm_zmmm512b32_imm8, dst, src1, src2, imm), dst.Flags);
		}

		public void vpshldd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpshldd_xmm_k1z_xmm_xmmm128b32_imm8, register, register2, in memory, imm), dst.Flags | src2.Flags);
		}

		public void vpshldd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpshldd_ymm_k1z_ymm_ymmm256b32_imm8, register, register2, in memory, imm), dst.Flags | src2.Flags);
		}

		public void vpshldd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpshldd_zmm_k1z_zmm_zmmm512b32_imm8, register, register2, in memory, imm), dst.Flags | src2.Flags);
		}

		public void vpshldd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpshldd_xmm_k1z_xmm_xmmm128b32_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags);
		}

		public void vpshldd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpshldd_ymm_k1z_ymm_ymmm256b32_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags);
		}

		public void vpshldd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpshldd_zmm_k1z_zmm_zmmm512b32_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags);
		}

		public void vpshldd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpshldd_xmm_k1z_xmm_xmmm128b32_imm8, register, register2, in memory, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vpshldd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpshldd_ymm_k1z_ymm_ymmm256b32_imm8, register, register2, in memory, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vpshldd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpshldd_zmm_k1z_zmm_zmmm512b32_imm8, register, register2, in memory, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vpshldq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpshldq_xmm_k1z_xmm_xmmm128b64_imm8, dst, src1, src2, imm), dst.Flags);
		}

		public void vpshldq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpshldq_ymm_k1z_ymm_ymmm256b64_imm8, dst, src1, src2, imm), dst.Flags);
		}

		public void vpshldq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpshldq_zmm_k1z_zmm_zmmm512b64_imm8, dst, src1, src2, imm), dst.Flags);
		}

		public void vpshldq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpshldq_xmm_k1z_xmm_xmmm128b64_imm8, register, register2, in memory, imm), dst.Flags | src2.Flags);
		}

		public void vpshldq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpshldq_ymm_k1z_ymm_ymmm256b64_imm8, register, register2, in memory, imm), dst.Flags | src2.Flags);
		}

		public void vpshldq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpshldq_zmm_k1z_zmm_zmmm512b64_imm8, register, register2, in memory, imm), dst.Flags | src2.Flags);
		}

		public void vpshldq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpshldq_xmm_k1z_xmm_xmmm128b64_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags);
		}

		public void vpshldq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpshldq_ymm_k1z_ymm_ymmm256b64_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags);
		}

		public void vpshldq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpshldq_zmm_k1z_zmm_zmmm512b64_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags);
		}

		public void vpshldq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpshldq_xmm_k1z_xmm_xmmm128b64_imm8, register, register2, in memory, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vpshldq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpshldq_ymm_k1z_ymm_ymmm256b64_imm8, register, register2, in memory, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vpshldq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpshldq_zmm_k1z_zmm_zmmm512b64_imm8, register, register2, in memory, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vpshldvd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpshldvd_xmm_k1z_xmm_xmmm128b32, dst, src1, src2), dst.Flags);
		}

		public void vpshldvd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpshldvd_ymm_k1z_ymm_ymmm256b32, dst, src1, src2), dst.Flags);
		}

		public void vpshldvd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpshldvd_zmm_k1z_zmm_zmmm512b32, dst, src1, src2), dst.Flags);
		}

		public void vpshldvd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpshldvd_xmm_k1z_xmm_xmmm128b32, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpshldvd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpshldvd_ymm_k1z_ymm_ymmm256b32, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpshldvd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpshldvd_zmm_k1z_zmm_zmmm512b32, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpshldvq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpshldvq_xmm_k1z_xmm_xmmm128b64, dst, src1, src2), dst.Flags);
		}

		public void vpshldvq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpshldvq_ymm_k1z_ymm_ymmm256b64, dst, src1, src2), dst.Flags);
		}

		public void vpshldvq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpshldvq_zmm_k1z_zmm_zmmm512b64, dst, src1, src2), dst.Flags);
		}

		public void vpshldvq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpshldvq_xmm_k1z_xmm_xmmm128b64, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpshldvq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpshldvq_ymm_k1z_ymm_ymmm256b64, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpshldvq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpshldvq_zmm_k1z_zmm_zmmm512b64, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpshldvw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpshldvw_xmm_k1z_xmm_xmmm128, dst, src1, src2), dst.Flags);
		}

		public void vpshldvw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpshldvw_ymm_k1z_ymm_ymmm256, dst, src1, src2), dst.Flags);
		}

		public void vpshldvw(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpshldvw_zmm_k1z_zmm_zmmm512, dst, src1, src2), dst.Flags);
		}

		public void vpshldvw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpshldvw_xmm_k1z_xmm_xmmm128, register, register2, in memory), dst.Flags);
		}

		public void vpshldvw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpshldvw_ymm_k1z_ymm_ymmm256, register, register2, in memory), dst.Flags);
		}

		public void vpshldvw(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpshldvw_zmm_k1z_zmm_zmmm512, register, register2, in memory), dst.Flags);
		}

		public void vpshldw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpshldw_xmm_k1z_xmm_xmmm128_imm8, dst, src1, src2, imm), dst.Flags);
		}

		public void vpshldw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpshldw_ymm_k1z_ymm_ymmm256_imm8, dst, src1, src2, imm), dst.Flags);
		}

		public void vpshldw(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpshldw_zmm_k1z_zmm_zmmm512_imm8, dst, src1, src2, imm), dst.Flags);
		}

		public void vpshldw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpshldw_xmm_k1z_xmm_xmmm128_imm8, register, register2, in memory, imm), dst.Flags);
		}

		public void vpshldw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpshldw_ymm_k1z_ymm_ymmm256_imm8, register, register2, in memory, imm), dst.Flags);
		}

		public void vpshldw(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpshldw_zmm_k1z_zmm_zmmm512_imm8, register, register2, in memory, imm), dst.Flags);
		}

		public void vpshldw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpshldw_xmm_k1z_xmm_xmmm128_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags);
		}

		public void vpshldw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpshldw_ymm_k1z_ymm_ymmm256_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags);
		}

		public void vpshldw(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpshldw_zmm_k1z_zmm_zmmm512_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags);
		}

		public void vpshldw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpshldw_xmm_k1z_xmm_xmmm128_imm8, register, register2, in memory, (uint)imm), dst.Flags);
		}

		public void vpshldw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpshldw_ymm_k1z_ymm_ymmm256_imm8, register, register2, in memory, (uint)imm), dst.Flags);
		}

		public void vpshldw(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpshldw_zmm_k1z_zmm_zmmm512_imm8, register, register2, in memory, (uint)imm), dst.Flags);
		}

		public void vpshlq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.XOP_Vpshlq_xmm_xmmm128_xmm, dst, src1, src2));
		}

		public void vpshlq(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, AssemblerRegisterXMM src2)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Vpshlq_xmm_xmmm128_xmm, register, in memory, src2));
		}

		public void vpshlq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Vpshlq_xmm_xmm_xmmm128, register, register2, in memory));
		}

		public void vpshlw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.XOP_Vpshlw_xmm_xmmm128_xmm, dst, src1, src2));
		}

		public void vpshlw(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, AssemblerRegisterXMM src2)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Vpshlw_xmm_xmmm128_xmm, register, in memory, src2));
		}

		public void vpshlw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.XOP_Vpshlw_xmm_xmm_xmmm128, register, register2, in memory));
		}

		public void vpshrdd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpshrdd_xmm_k1z_xmm_xmmm128b32_imm8, dst, src1, src2, imm), dst.Flags);
		}

		public void vpshrdd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpshrdd_ymm_k1z_ymm_ymmm256b32_imm8, dst, src1, src2, imm), dst.Flags);
		}

		public void vpshrdd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpshrdd_zmm_k1z_zmm_zmmm512b32_imm8, dst, src1, src2, imm), dst.Flags);
		}

		public void vpshrdd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpshrdd_xmm_k1z_xmm_xmmm128b32_imm8, register, register2, in memory, imm), dst.Flags | src2.Flags);
		}

		public void vpshrdd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpshrdd_ymm_k1z_ymm_ymmm256b32_imm8, register, register2, in memory, imm), dst.Flags | src2.Flags);
		}

		public void vpshrdd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpshrdd_zmm_k1z_zmm_zmmm512b32_imm8, register, register2, in memory, imm), dst.Flags | src2.Flags);
		}

		public void vpshrdd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpshrdd_xmm_k1z_xmm_xmmm128b32_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags);
		}

		public void vpshrdd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpshrdd_ymm_k1z_ymm_ymmm256b32_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags);
		}

		public void vpshrdd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpshrdd_zmm_k1z_zmm_zmmm512b32_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags);
		}

		public void vpshrdd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpshrdd_xmm_k1z_xmm_xmmm128b32_imm8, register, register2, in memory, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vpshrdd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpshrdd_ymm_k1z_ymm_ymmm256b32_imm8, register, register2, in memory, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vpshrdd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpshrdd_zmm_k1z_zmm_zmmm512b32_imm8, register, register2, in memory, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vpshrdq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpshrdq_xmm_k1z_xmm_xmmm128b64_imm8, dst, src1, src2, imm), dst.Flags);
		}

		public void vpshrdq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpshrdq_ymm_k1z_ymm_ymmm256b64_imm8, dst, src1, src2, imm), dst.Flags);
		}

		public void vpshrdq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpshrdq_zmm_k1z_zmm_zmmm512b64_imm8, dst, src1, src2, imm), dst.Flags);
		}

		public void vpshrdq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpshrdq_xmm_k1z_xmm_xmmm128b64_imm8, register, register2, in memory, imm), dst.Flags | src2.Flags);
		}

		public void vpshrdq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpshrdq_ymm_k1z_ymm_ymmm256b64_imm8, register, register2, in memory, imm), dst.Flags | src2.Flags);
		}

		public void vpshrdq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpshrdq_zmm_k1z_zmm_zmmm512b64_imm8, register, register2, in memory, imm), dst.Flags | src2.Flags);
		}

		public void vpshrdq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpshrdq_xmm_k1z_xmm_xmmm128b64_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags);
		}

		public void vpshrdq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpshrdq_ymm_k1z_ymm_ymmm256b64_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags);
		}

		public void vpshrdq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpshrdq_zmm_k1z_zmm_zmmm512b64_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags);
		}

		public void vpshrdq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpshrdq_xmm_k1z_xmm_xmmm128b64_imm8, register, register2, in memory, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vpshrdq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpshrdq_ymm_k1z_ymm_ymmm256b64_imm8, register, register2, in memory, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vpshrdq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpshrdq_zmm_k1z_zmm_zmmm512b64_imm8, register, register2, in memory, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vpshrdvd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpshrdvd_xmm_k1z_xmm_xmmm128b32, dst, src1, src2), dst.Flags);
		}

		public void vpshrdvd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpshrdvd_ymm_k1z_ymm_ymmm256b32, dst, src1, src2), dst.Flags);
		}

		public void vpshrdvd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpshrdvd_zmm_k1z_zmm_zmmm512b32, dst, src1, src2), dst.Flags);
		}

		public void vpshrdvd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpshrdvd_xmm_k1z_xmm_xmmm128b32, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpshrdvd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpshrdvd_ymm_k1z_ymm_ymmm256b32, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpshrdvd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpshrdvd_zmm_k1z_zmm_zmmm512b32, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpshrdvq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpshrdvq_xmm_k1z_xmm_xmmm128b64, dst, src1, src2), dst.Flags);
		}

		public void vpshrdvq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpshrdvq_ymm_k1z_ymm_ymmm256b64, dst, src1, src2), dst.Flags);
		}

		public void vpshrdvq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpshrdvq_zmm_k1z_zmm_zmmm512b64, dst, src1, src2), dst.Flags);
		}

		public void vpshrdvq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpshrdvq_xmm_k1z_xmm_xmmm128b64, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpshrdvq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpshrdvq_ymm_k1z_ymm_ymmm256b64, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpshrdvq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpshrdvq_zmm_k1z_zmm_zmmm512b64, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpshrdvw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpshrdvw_xmm_k1z_xmm_xmmm128, dst, src1, src2), dst.Flags);
		}

		public void vpshrdvw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpshrdvw_ymm_k1z_ymm_ymmm256, dst, src1, src2), dst.Flags);
		}

		public void vpshrdvw(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpshrdvw_zmm_k1z_zmm_zmmm512, dst, src1, src2), dst.Flags);
		}

		public void vpshrdvw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpshrdvw_xmm_k1z_xmm_xmmm128, register, register2, in memory), dst.Flags);
		}

		public void vpshrdvw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpshrdvw_ymm_k1z_ymm_ymmm256, register, register2, in memory), dst.Flags);
		}

		public void vpshrdvw(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpshrdvw_zmm_k1z_zmm_zmmm512, register, register2, in memory), dst.Flags);
		}

		public void vpshrdw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpshrdw_xmm_k1z_xmm_xmmm128_imm8, dst, src1, src2, imm), dst.Flags);
		}

		public void vpshrdw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpshrdw_ymm_k1z_ymm_ymmm256_imm8, dst, src1, src2, imm), dst.Flags);
		}

		public void vpshrdw(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpshrdw_zmm_k1z_zmm_zmmm512_imm8, dst, src1, src2, imm), dst.Flags);
		}

		public void vpshrdw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpshrdw_xmm_k1z_xmm_xmmm128_imm8, register, register2, in memory, imm), dst.Flags);
		}

		public void vpshrdw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpshrdw_ymm_k1z_ymm_ymmm256_imm8, register, register2, in memory, imm), dst.Flags);
		}

		public void vpshrdw(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpshrdw_zmm_k1z_zmm_zmmm512_imm8, register, register2, in memory, imm), dst.Flags);
		}

		public void vpshrdw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpshrdw_xmm_k1z_xmm_xmmm128_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags);
		}

		public void vpshrdw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpshrdw_ymm_k1z_ymm_ymmm256_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags);
		}

		public void vpshrdw(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpshrdw_zmm_k1z_zmm_zmmm512_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags);
		}

		public void vpshrdw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpshrdw_xmm_k1z_xmm_xmmm128_imm8, register, register2, in memory, (uint)imm), dst.Flags);
		}

		public void vpshrdw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpshrdw_ymm_k1z_ymm_ymmm256_imm8, register, register2, in memory, (uint)imm), dst.Flags);
		}

		public void vpshrdw(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpshrdw_zmm_k1z_zmm_zmmm512_imm8, register, register2, in memory, (uint)imm), dst.Flags);
		}

		public void vpshufb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpshufb_xmm_xmm_xmmm128 : Code.EVEX_Vpshufb_xmm_k1z_xmm_xmmm128);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpshufb(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpshufb_ymm_ymm_ymmm256 : Code.EVEX_Vpshufb_ymm_k1z_ymm_ymmm256);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpshufb(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpshufb_zmm_k1z_zmm_zmmm512, dst, src1, src2), dst.Flags);
		}

		public void vpshufb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpshufb_xmm_xmm_xmmm128 : Code.EVEX_Vpshufb_xmm_k1z_xmm_xmmm128);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags);
		}

		public void vpshufb(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpshufb_ymm_ymm_ymmm256 : Code.EVEX_Vpshufb_ymm_k1z_ymm_ymmm256);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags);
		}

		public void vpshufb(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpshufb_zmm_k1z_zmm_zmmm512, register, register2, in memory), dst.Flags);
		}

		public void vpshufbitqmb(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpshufbitqmb_kr_k1_xmm_xmmm128, dst, src1, src2), dst.Flags);
		}

		public void vpshufbitqmb(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpshufbitqmb_kr_k1_ymm_ymmm256, dst, src1, src2), dst.Flags);
		}

		public void vpshufbitqmb(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpshufbitqmb_kr_k1_zmm_zmmm512, dst, src1, src2), dst.Flags);
		}

		public void vpshufbitqmb(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpshufbitqmb_kr_k1_xmm_xmmm128, register, register2, in memory), dst.Flags);
		}

		public void vpshufbitqmb(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpshufbitqmb_kr_k1_ymm_ymmm256, register, register2, in memory), dst.Flags);
		}

		public void vpshufbitqmb(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpshufbitqmb_kr_k1_zmm_zmmm512, register, register2, in memory), dst.Flags);
		}

		public void vpshufd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpshufd_xmm_xmmm128_imm8 : Code.EVEX_Vpshufd_xmm_k1z_xmmm128b32_imm8);
			AddInstruction(Instruction.Create(code, dst, src1, imm), dst.Flags);
		}

		public void vpshufd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, sbyte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpshufd_ymm_ymmm256_imm8 : Code.EVEX_Vpshufd_ymm_k1z_ymmm256b32_imm8);
			AddInstruction(Instruction.Create(code, dst, src1, imm), dst.Flags);
		}

		public void vpshufd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpshufd_zmm_k1z_zmmm512b32_imm8, dst, src1, imm), dst.Flags);
		}

		public void vpshufd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Code code = ((!src1.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vpshufd_xmm_xmmm128_imm8 : Code.EVEX_Vpshufd_xmm_k1z_xmmm128b32_imm8) : Code.EVEX_Vpshufd_xmm_k1z_xmmm128b32_imm8);
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory, imm), dst.Flags | src1.Flags);
		}

		public void vpshufd(AssemblerRegisterYMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Code code = ((!src1.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vpshufd_ymm_ymmm256_imm8 : Code.EVEX_Vpshufd_ymm_k1z_ymmm256b32_imm8) : Code.EVEX_Vpshufd_ymm_k1z_ymmm256b32_imm8);
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory, imm), dst.Flags | src1.Flags);
		}

		public void vpshufd(AssemblerRegisterZMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpshufd_zmm_k1z_zmmm512b32_imm8, register, in memory, imm), dst.Flags | src1.Flags);
		}

		public void vpshufd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, byte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpshufd_xmm_xmmm128_imm8 : Code.EVEX_Vpshufd_xmm_k1z_xmmm128b32_imm8);
			AddInstruction(Instruction.Create(code, (Register)dst, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vpshufd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, byte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpshufd_ymm_ymmm256_imm8 : Code.EVEX_Vpshufd_ymm_k1z_ymmm256b32_imm8);
			AddInstruction(Instruction.Create(code, (Register)dst, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vpshufd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpshufd_zmm_k1z_zmmm512b32_imm8, (Register)dst, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vpshufd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Code code = ((!src1.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vpshufd_xmm_xmmm128_imm8 : Code.EVEX_Vpshufd_xmm_k1z_xmmm128b32_imm8) : Code.EVEX_Vpshufd_xmm_k1z_xmmm128b32_imm8);
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory, (uint)imm), dst.Flags | src1.Flags);
		}

		public void vpshufd(AssemblerRegisterYMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Code code = ((!src1.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vpshufd_ymm_ymmm256_imm8 : Code.EVEX_Vpshufd_ymm_k1z_ymmm256b32_imm8) : Code.EVEX_Vpshufd_ymm_k1z_ymmm256b32_imm8);
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory, (uint)imm), dst.Flags | src1.Flags);
		}

		public void vpshufd(AssemblerRegisterZMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpshufd_zmm_k1z_zmmm512b32_imm8, register, in memory, (uint)imm), dst.Flags | src1.Flags);
		}

		public void vpshufhw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpshufhw_xmm_xmmm128_imm8 : Code.EVEX_Vpshufhw_xmm_k1z_xmmm128_imm8);
			AddInstruction(Instruction.Create(code, dst, src1, imm), dst.Flags);
		}

		public void vpshufhw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, sbyte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpshufhw_ymm_ymmm256_imm8 : Code.EVEX_Vpshufhw_ymm_k1z_ymmm256_imm8);
			AddInstruction(Instruction.Create(code, dst, src1, imm), dst.Flags);
		}

		public void vpshufhw(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpshufhw_zmm_k1z_zmmm512_imm8, dst, src1, imm), dst.Flags);
		}

		public void vpshufhw(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpshufhw_xmm_xmmm128_imm8 : Code.EVEX_Vpshufhw_xmm_k1z_xmmm128_imm8);
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory, imm), dst.Flags);
		}

		public void vpshufhw(AssemblerRegisterYMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpshufhw_ymm_ymmm256_imm8 : Code.EVEX_Vpshufhw_ymm_k1z_ymmm256_imm8);
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory, imm), dst.Flags);
		}

		public void vpshufhw(AssemblerRegisterZMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpshufhw_zmm_k1z_zmmm512_imm8, register, in memory, imm), dst.Flags);
		}

		public void vpshufhw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, byte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpshufhw_xmm_xmmm128_imm8 : Code.EVEX_Vpshufhw_xmm_k1z_xmmm128_imm8);
			AddInstruction(Instruction.Create(code, (Register)dst, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vpshufhw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, byte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpshufhw_ymm_ymmm256_imm8 : Code.EVEX_Vpshufhw_ymm_k1z_ymmm256_imm8);
			AddInstruction(Instruction.Create(code, (Register)dst, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vpshufhw(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpshufhw_zmm_k1z_zmmm512_imm8, (Register)dst, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vpshufhw(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpshufhw_xmm_xmmm128_imm8 : Code.EVEX_Vpshufhw_xmm_k1z_xmmm128_imm8);
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory, (uint)imm), dst.Flags);
		}

		public void vpshufhw(AssemblerRegisterYMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpshufhw_ymm_ymmm256_imm8 : Code.EVEX_Vpshufhw_ymm_k1z_ymmm256_imm8);
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory, (uint)imm), dst.Flags);
		}

		public void vpshufhw(AssemblerRegisterZMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpshufhw_zmm_k1z_zmmm512_imm8, register, in memory, (uint)imm), dst.Flags);
		}

		public void vpshuflw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpshuflw_xmm_xmmm128_imm8 : Code.EVEX_Vpshuflw_xmm_k1z_xmmm128_imm8);
			AddInstruction(Instruction.Create(code, dst, src1, imm), dst.Flags);
		}

		public void vpshuflw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, sbyte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpshuflw_ymm_ymmm256_imm8 : Code.EVEX_Vpshuflw_ymm_k1z_ymmm256_imm8);
			AddInstruction(Instruction.Create(code, dst, src1, imm), dst.Flags);
		}

		public void vpshuflw(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpshuflw_zmm_k1z_zmmm512_imm8, dst, src1, imm), dst.Flags);
		}

		public void vpshuflw(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpshuflw_xmm_xmmm128_imm8 : Code.EVEX_Vpshuflw_xmm_k1z_xmmm128_imm8);
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory, imm), dst.Flags);
		}

		public void vpshuflw(AssemblerRegisterYMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpshuflw_ymm_ymmm256_imm8 : Code.EVEX_Vpshuflw_ymm_k1z_ymmm256_imm8);
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory, imm), dst.Flags);
		}

		public void vpshuflw(AssemblerRegisterZMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpshuflw_zmm_k1z_zmmm512_imm8, register, in memory, imm), dst.Flags);
		}

		public void vpshuflw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, byte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpshuflw_xmm_xmmm128_imm8 : Code.EVEX_Vpshuflw_xmm_k1z_xmmm128_imm8);
			AddInstruction(Instruction.Create(code, (Register)dst, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vpshuflw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, byte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpshuflw_ymm_ymmm256_imm8 : Code.EVEX_Vpshuflw_ymm_k1z_ymmm256_imm8);
			AddInstruction(Instruction.Create(code, (Register)dst, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vpshuflw(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpshuflw_zmm_k1z_zmmm512_imm8, (Register)dst, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vpshuflw(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpshuflw_xmm_xmmm128_imm8 : Code.EVEX_Vpshuflw_xmm_k1z_xmmm128_imm8);
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory, (uint)imm), dst.Flags);
		}

		public void vpshuflw(AssemblerRegisterYMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpshuflw_ymm_ymmm256_imm8 : Code.EVEX_Vpshuflw_ymm_k1z_ymmm256_imm8);
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory, (uint)imm), dst.Flags);
		}

		public void vpshuflw(AssemblerRegisterZMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpshuflw_zmm_k1z_zmmm512_imm8, register, in memory, (uint)imm), dst.Flags);
		}

		public void vpsignb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vpsignb_xmm_xmm_xmmm128, dst, src1, src2));
		}

		public void vpsignb(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vpsignb_ymm_ymm_ymmm256, dst, src1, src2));
		}

		public void vpsignb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vpsignb_xmm_xmm_xmmm128, register, register2, in memory));
		}

		public void vpsignb(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vpsignb_ymm_ymm_ymmm256, register, register2, in memory));
		}

		public void vpsignd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vpsignd_xmm_xmm_xmmm128, dst, src1, src2));
		}

		public void vpsignd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vpsignd_ymm_ymm_ymmm256, dst, src1, src2));
		}

		public void vpsignd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vpsignd_xmm_xmm_xmmm128, register, register2, in memory));
		}

		public void vpsignd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vpsignd_ymm_ymm_ymmm256, register, register2, in memory));
		}

		public void vpsignw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vpsignw_xmm_xmm_xmmm128, dst, src1, src2));
		}

		public void vpsignw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vpsignw_ymm_ymm_ymmm256, dst, src1, src2));
		}

		public void vpsignw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vpsignw_xmm_xmm_xmmm128, register, register2, in memory));
		}

		public void vpsignw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vpsignw_ymm_ymm_ymmm256, register, register2, in memory));
		}

		public void vpslld(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpslld_xmm_xmm_xmmm128 : Code.EVEX_Vpslld_xmm_k1z_xmm_xmmm128);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpslld(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpslld_ymm_ymm_xmmm128 : Code.EVEX_Vpslld_ymm_k1z_ymm_xmmm128);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpslld(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpslld_zmm_k1z_zmm_xmmm128, dst, src1, src2), dst.Flags);
		}

		public void vpslld(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpslld_xmm_xmm_xmmm128 : Code.EVEX_Vpslld_xmm_k1z_xmm_xmmm128);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags);
		}

		public void vpslld(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpslld_ymm_ymm_xmmm128 : Code.EVEX_Vpslld_ymm_k1z_ymm_xmmm128);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags);
		}

		public void vpslld(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpslld_zmm_k1z_zmm_xmmm128, register, register2, in memory), dst.Flags);
		}

		public void vpslld(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpslld_xmm_xmm_imm8 : Code.EVEX_Vpslld_xmm_k1z_xmmm128b32_imm8);
			AddInstruction(Instruction.Create(code, dst, src1, imm), dst.Flags);
		}

		public void vpslld(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, sbyte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpslld_ymm_ymm_imm8 : Code.EVEX_Vpslld_ymm_k1z_ymmm256b32_imm8);
			AddInstruction(Instruction.Create(code, dst, src1, imm), dst.Flags);
		}

		public void vpslld(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpslld_zmm_k1z_zmmm512b32_imm8, dst, src1, imm), dst.Flags);
		}

		public void vpslld(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpslld_xmm_k1z_xmmm128b32_imm8, register, in memory, imm), dst.Flags | src1.Flags);
		}

		public void vpslld(AssemblerRegisterYMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpslld_ymm_k1z_ymmm256b32_imm8, register, in memory, imm), dst.Flags | src1.Flags);
		}

		public void vpslld(AssemblerRegisterZMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpslld_zmm_k1z_zmmm512b32_imm8, register, in memory, imm), dst.Flags | src1.Flags);
		}

		public void vpslld(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, byte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpslld_xmm_xmm_imm8 : Code.EVEX_Vpslld_xmm_k1z_xmmm128b32_imm8);
			AddInstruction(Instruction.Create(code, (Register)dst, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vpslld(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, byte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpslld_ymm_ymm_imm8 : Code.EVEX_Vpslld_ymm_k1z_ymmm256b32_imm8);
			AddInstruction(Instruction.Create(code, (Register)dst, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vpslld(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpslld_zmm_k1z_zmmm512b32_imm8, (Register)dst, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vpslld(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpslld_xmm_k1z_xmmm128b32_imm8, register, in memory, (uint)imm), dst.Flags | src1.Flags);
		}

		public void vpslld(AssemblerRegisterYMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpslld_ymm_k1z_ymmm256b32_imm8, register, in memory, (uint)imm), dst.Flags | src1.Flags);
		}

		public void vpslld(AssemblerRegisterZMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpslld_zmm_k1z_zmmm512b32_imm8, register, in memory, (uint)imm), dst.Flags | src1.Flags);
		}

		public void vpslldq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpslldq_xmm_xmm_imm8 : Code.EVEX_Vpslldq_xmm_xmmm128_imm8);
			AddInstruction(Instruction.Create(code, dst, src1, imm));
		}

		public void vpslldq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, sbyte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpslldq_ymm_ymm_imm8 : Code.EVEX_Vpslldq_ymm_ymmm256_imm8);
			AddInstruction(Instruction.Create(code, dst, src1, imm));
		}

		public void vpslldq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpslldq_zmm_zmmm512_imm8, dst, src1, imm));
		}

		public void vpslldq(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpslldq_xmm_xmmm128_imm8, register, in memory, imm));
		}

		public void vpslldq(AssemblerRegisterYMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpslldq_ymm_ymmm256_imm8, register, in memory, imm));
		}

		public void vpslldq(AssemblerRegisterZMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpslldq_zmm_zmmm512_imm8, register, in memory, imm));
		}

		public void vpslldq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, byte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpslldq_xmm_xmm_imm8 : Code.EVEX_Vpslldq_xmm_xmmm128_imm8);
			AddInstruction(Instruction.Create(code, (Register)dst, (Register)src1, (uint)imm));
		}

		public void vpslldq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, byte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpslldq_ymm_ymm_imm8 : Code.EVEX_Vpslldq_ymm_ymmm256_imm8);
			AddInstruction(Instruction.Create(code, (Register)dst, (Register)src1, (uint)imm));
		}

		public void vpslldq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpslldq_zmm_zmmm512_imm8, (Register)dst, (Register)src1, (uint)imm));
		}

		public void vpslldq(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpslldq_xmm_xmmm128_imm8, register, in memory, (uint)imm));
		}

		public void vpslldq(AssemblerRegisterYMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpslldq_ymm_ymmm256_imm8, register, in memory, (uint)imm));
		}

		public void vpslldq(AssemblerRegisterZMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpslldq_zmm_zmmm512_imm8, register, in memory, (uint)imm));
		}

		public void vpsllq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpsllq_xmm_xmm_xmmm128 : Code.EVEX_Vpsllq_xmm_k1z_xmm_xmmm128);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpsllq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpsllq_ymm_ymm_xmmm128 : Code.EVEX_Vpsllq_ymm_k1z_ymm_xmmm128);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpsllq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpsllq_zmm_k1z_zmm_xmmm128, dst, src1, src2), dst.Flags);
		}

		public void vpsllq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpsllq_xmm_xmm_xmmm128 : Code.EVEX_Vpsllq_xmm_k1z_xmm_xmmm128);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags);
		}

		public void vpsllq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpsllq_ymm_ymm_xmmm128 : Code.EVEX_Vpsllq_ymm_k1z_ymm_xmmm128);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags);
		}

		public void vpsllq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpsllq_zmm_k1z_zmm_xmmm128, register, register2, in memory), dst.Flags);
		}

		public void vpsllq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpsllq_xmm_xmm_imm8 : Code.EVEX_Vpsllq_xmm_k1z_xmmm128b64_imm8);
			AddInstruction(Instruction.Create(code, dst, src1, imm), dst.Flags);
		}

		public void vpsllq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, sbyte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpsllq_ymm_ymm_imm8 : Code.EVEX_Vpsllq_ymm_k1z_ymmm256b64_imm8);
			AddInstruction(Instruction.Create(code, dst, src1, imm), dst.Flags);
		}

		public void vpsllq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpsllq_zmm_k1z_zmmm512b64_imm8, dst, src1, imm), dst.Flags);
		}

		public void vpsllq(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpsllq_xmm_k1z_xmmm128b64_imm8, register, in memory, imm), dst.Flags | src1.Flags);
		}

		public void vpsllq(AssemblerRegisterYMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpsllq_ymm_k1z_ymmm256b64_imm8, register, in memory, imm), dst.Flags | src1.Flags);
		}

		public void vpsllq(AssemblerRegisterZMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpsllq_zmm_k1z_zmmm512b64_imm8, register, in memory, imm), dst.Flags | src1.Flags);
		}

		public void vpsllq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, byte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpsllq_xmm_xmm_imm8 : Code.EVEX_Vpsllq_xmm_k1z_xmmm128b64_imm8);
			AddInstruction(Instruction.Create(code, (Register)dst, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vpsllq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, byte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpsllq_ymm_ymm_imm8 : Code.EVEX_Vpsllq_ymm_k1z_ymmm256b64_imm8);
			AddInstruction(Instruction.Create(code, (Register)dst, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vpsllq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpsllq_zmm_k1z_zmmm512b64_imm8, (Register)dst, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vpsllq(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpsllq_xmm_k1z_xmmm128b64_imm8, register, in memory, (uint)imm), dst.Flags | src1.Flags);
		}

		public void vpsllq(AssemblerRegisterYMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpsllq_ymm_k1z_ymmm256b64_imm8, register, in memory, (uint)imm), dst.Flags | src1.Flags);
		}

		public void vpsllq(AssemblerRegisterZMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpsllq_zmm_k1z_zmmm512b64_imm8, register, in memory, (uint)imm), dst.Flags | src1.Flags);
		}

		public void vpsllvd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpsllvd_xmm_xmm_xmmm128 : Code.EVEX_Vpsllvd_xmm_k1z_xmm_xmmm128b32);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpsllvd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpsllvd_ymm_ymm_ymmm256 : Code.EVEX_Vpsllvd_ymm_k1z_ymm_ymmm256b32);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpsllvd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpsllvd_zmm_k1z_zmm_zmmm512b32, dst, src1, src2), dst.Flags);
		}

		public void vpsllvd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vpsllvd_xmm_xmm_xmmm128 : Code.EVEX_Vpsllvd_xmm_k1z_xmm_xmmm128b32) : Code.EVEX_Vpsllvd_xmm_k1z_xmm_xmmm128b32);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpsllvd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vpsllvd_ymm_ymm_ymmm256 : Code.EVEX_Vpsllvd_ymm_k1z_ymm_ymmm256b32) : Code.EVEX_Vpsllvd_ymm_k1z_ymm_ymmm256b32);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpsllvd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpsllvd_zmm_k1z_zmm_zmmm512b32, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpsllvq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpsllvq_xmm_xmm_xmmm128 : Code.EVEX_Vpsllvq_xmm_k1z_xmm_xmmm128b64);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpsllvq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpsllvq_ymm_ymm_ymmm256 : Code.EVEX_Vpsllvq_ymm_k1z_ymm_ymmm256b64);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpsllvq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpsllvq_zmm_k1z_zmm_zmmm512b64, dst, src1, src2), dst.Flags);
		}

		public void vpsllvq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vpsllvq_xmm_xmm_xmmm128 : Code.EVEX_Vpsllvq_xmm_k1z_xmm_xmmm128b64) : Code.EVEX_Vpsllvq_xmm_k1z_xmm_xmmm128b64);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpsllvq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vpsllvq_ymm_ymm_ymmm256 : Code.EVEX_Vpsllvq_ymm_k1z_ymm_ymmm256b64) : Code.EVEX_Vpsllvq_ymm_k1z_ymm_ymmm256b64);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpsllvq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpsllvq_zmm_k1z_zmm_zmmm512b64, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpsllvw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpsllvw_xmm_k1z_xmm_xmmm128, dst, src1, src2), dst.Flags);
		}

		public void vpsllvw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpsllvw_ymm_k1z_ymm_ymmm256, dst, src1, src2), dst.Flags);
		}

		public void vpsllvw(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpsllvw_zmm_k1z_zmm_zmmm512, dst, src1, src2), dst.Flags);
		}

		public void vpsllvw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpsllvw_xmm_k1z_xmm_xmmm128, register, register2, in memory), dst.Flags);
		}

		public void vpsllvw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpsllvw_ymm_k1z_ymm_ymmm256, register, register2, in memory), dst.Flags);
		}

		public void vpsllvw(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpsllvw_zmm_k1z_zmm_zmmm512, register, register2, in memory), dst.Flags);
		}

		public void vpsllw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpsllw_xmm_xmm_xmmm128 : Code.EVEX_Vpsllw_xmm_k1z_xmm_xmmm128);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpsllw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpsllw_ymm_ymm_xmmm128 : Code.EVEX_Vpsllw_ymm_k1z_ymm_xmmm128);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpsllw(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpsllw_zmm_k1z_zmm_xmmm128, dst, src1, src2), dst.Flags);
		}

		public void vpsllw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpsllw_xmm_xmm_xmmm128 : Code.EVEX_Vpsllw_xmm_k1z_xmm_xmmm128);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags);
		}

		public void vpsllw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpsllw_ymm_ymm_xmmm128 : Code.EVEX_Vpsllw_ymm_k1z_ymm_xmmm128);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags);
		}

		public void vpsllw(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpsllw_zmm_k1z_zmm_xmmm128, register, register2, in memory), dst.Flags);
		}

		public void vpsllw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpsllw_xmm_xmm_imm8 : Code.EVEX_Vpsllw_xmm_k1z_xmmm128_imm8);
			AddInstruction(Instruction.Create(code, dst, src1, imm), dst.Flags);
		}

		public void vpsllw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, sbyte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpsllw_ymm_ymm_imm8 : Code.EVEX_Vpsllw_ymm_k1z_ymmm256_imm8);
			AddInstruction(Instruction.Create(code, dst, src1, imm), dst.Flags);
		}

		public void vpsllw(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpsllw_zmm_k1z_zmmm512_imm8, dst, src1, imm), dst.Flags);
		}

		public void vpsllw(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpsllw_xmm_k1z_xmmm128_imm8, register, in memory, imm), dst.Flags);
		}

		public void vpsllw(AssemblerRegisterYMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpsllw_ymm_k1z_ymmm256_imm8, register, in memory, imm), dst.Flags);
		}

		public void vpsllw(AssemblerRegisterZMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpsllw_zmm_k1z_zmmm512_imm8, register, in memory, imm), dst.Flags);
		}

		public void vpsllw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, byte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpsllw_xmm_xmm_imm8 : Code.EVEX_Vpsllw_xmm_k1z_xmmm128_imm8);
			AddInstruction(Instruction.Create(code, (Register)dst, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vpsllw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, byte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpsllw_ymm_ymm_imm8 : Code.EVEX_Vpsllw_ymm_k1z_ymmm256_imm8);
			AddInstruction(Instruction.Create(code, (Register)dst, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vpsllw(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpsllw_zmm_k1z_zmmm512_imm8, (Register)dst, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vpsllw(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpsllw_xmm_k1z_xmmm128_imm8, register, in memory, (uint)imm), dst.Flags);
		}

		public void vpsllw(AssemblerRegisterYMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpsllw_ymm_k1z_ymmm256_imm8, register, in memory, (uint)imm), dst.Flags);
		}

		public void vpsllw(AssemblerRegisterZMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpsllw_zmm_k1z_zmmm512_imm8, register, in memory, (uint)imm), dst.Flags);
		}

		public void vpsrad(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpsrad_xmm_xmm_xmmm128 : Code.EVEX_Vpsrad_xmm_k1z_xmm_xmmm128);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpsrad(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpsrad_ymm_ymm_xmmm128 : Code.EVEX_Vpsrad_ymm_k1z_ymm_xmmm128);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpsrad(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpsrad_zmm_k1z_zmm_xmmm128, dst, src1, src2), dst.Flags);
		}

		public void vpsrad(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpsrad_xmm_xmm_xmmm128 : Code.EVEX_Vpsrad_xmm_k1z_xmm_xmmm128);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags);
		}

		public void vpsrad(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpsrad_ymm_ymm_xmmm128 : Code.EVEX_Vpsrad_ymm_k1z_ymm_xmmm128);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags);
		}

		public void vpsrad(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpsrad_zmm_k1z_zmm_xmmm128, register, register2, in memory), dst.Flags);
		}

		public void vpsrad(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpsrad_xmm_xmm_imm8 : Code.EVEX_Vpsrad_xmm_k1z_xmmm128b32_imm8);
			AddInstruction(Instruction.Create(code, dst, src1, imm), dst.Flags);
		}

		public void vpsrad(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, sbyte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpsrad_ymm_ymm_imm8 : Code.EVEX_Vpsrad_ymm_k1z_ymmm256b32_imm8);
			AddInstruction(Instruction.Create(code, dst, src1, imm), dst.Flags);
		}

		public void vpsrad(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpsrad_zmm_k1z_zmmm512b32_imm8, dst, src1, imm), dst.Flags);
		}

		public void vpsrad(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpsrad_xmm_k1z_xmmm128b32_imm8, register, in memory, imm), dst.Flags | src1.Flags);
		}

		public void vpsrad(AssemblerRegisterYMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpsrad_ymm_k1z_ymmm256b32_imm8, register, in memory, imm), dst.Flags | src1.Flags);
		}

		public void vpsrad(AssemblerRegisterZMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpsrad_zmm_k1z_zmmm512b32_imm8, register, in memory, imm), dst.Flags | src1.Flags);
		}

		public void vpsrad(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, byte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpsrad_xmm_xmm_imm8 : Code.EVEX_Vpsrad_xmm_k1z_xmmm128b32_imm8);
			AddInstruction(Instruction.Create(code, (Register)dst, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vpsrad(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, byte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpsrad_ymm_ymm_imm8 : Code.EVEX_Vpsrad_ymm_k1z_ymmm256b32_imm8);
			AddInstruction(Instruction.Create(code, (Register)dst, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vpsrad(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpsrad_zmm_k1z_zmmm512b32_imm8, (Register)dst, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vpsrad(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpsrad_xmm_k1z_xmmm128b32_imm8, register, in memory, (uint)imm), dst.Flags | src1.Flags);
		}

		public void vpsrad(AssemblerRegisterYMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpsrad_ymm_k1z_ymmm256b32_imm8, register, in memory, (uint)imm), dst.Flags | src1.Flags);
		}

		public void vpsrad(AssemblerRegisterZMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpsrad_zmm_k1z_zmmm512b32_imm8, register, in memory, (uint)imm), dst.Flags | src1.Flags);
		}

		public void vpsraq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpsraq_xmm_k1z_xmm_xmmm128, dst, src1, src2), dst.Flags);
		}

		public void vpsraq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpsraq_ymm_k1z_ymm_xmmm128, dst, src1, src2), dst.Flags);
		}

		public void vpsraq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpsraq_zmm_k1z_zmm_xmmm128, dst, src1, src2), dst.Flags);
		}

		public void vpsraq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpsraq_xmm_k1z_xmm_xmmm128, register, register2, in memory), dst.Flags);
		}

		public void vpsraq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpsraq_ymm_k1z_ymm_xmmm128, register, register2, in memory), dst.Flags);
		}

		public void vpsraq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpsraq_zmm_k1z_zmm_xmmm128, register, register2, in memory), dst.Flags);
		}

		public void vpsraq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpsraq_xmm_k1z_xmmm128b64_imm8, dst, src1, imm), dst.Flags);
		}

		public void vpsraq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpsraq_ymm_k1z_ymmm256b64_imm8, dst, src1, imm), dst.Flags);
		}

		public void vpsraq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpsraq_zmm_k1z_zmmm512b64_imm8, dst, src1, imm), dst.Flags);
		}

		public void vpsraq(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpsraq_xmm_k1z_xmmm128b64_imm8, register, in memory, imm), dst.Flags | src1.Flags);
		}

		public void vpsraq(AssemblerRegisterYMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpsraq_ymm_k1z_ymmm256b64_imm8, register, in memory, imm), dst.Flags | src1.Flags);
		}

		public void vpsraq(AssemblerRegisterZMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpsraq_zmm_k1z_zmmm512b64_imm8, register, in memory, imm), dst.Flags | src1.Flags);
		}

		public void vpsraq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpsraq_xmm_k1z_xmmm128b64_imm8, (Register)dst, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vpsraq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpsraq_ymm_k1z_ymmm256b64_imm8, (Register)dst, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vpsraq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpsraq_zmm_k1z_zmmm512b64_imm8, (Register)dst, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vpsraq(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpsraq_xmm_k1z_xmmm128b64_imm8, register, in memory, (uint)imm), dst.Flags | src1.Flags);
		}

		public void vpsraq(AssemblerRegisterYMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpsraq_ymm_k1z_ymmm256b64_imm8, register, in memory, (uint)imm), dst.Flags | src1.Flags);
		}

		public void vpsraq(AssemblerRegisterZMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpsraq_zmm_k1z_zmmm512b64_imm8, register, in memory, (uint)imm), dst.Flags | src1.Flags);
		}

		public void vpsravd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpsravd_xmm_xmm_xmmm128 : Code.EVEX_Vpsravd_xmm_k1z_xmm_xmmm128b32);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpsravd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpsravd_ymm_ymm_ymmm256 : Code.EVEX_Vpsravd_ymm_k1z_ymm_ymmm256b32);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpsravd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpsravd_zmm_k1z_zmm_zmmm512b32, dst, src1, src2), dst.Flags);
		}

		public void vpsravd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vpsravd_xmm_xmm_xmmm128 : Code.EVEX_Vpsravd_xmm_k1z_xmm_xmmm128b32) : Code.EVEX_Vpsravd_xmm_k1z_xmm_xmmm128b32);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpsravd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vpsravd_ymm_ymm_ymmm256 : Code.EVEX_Vpsravd_ymm_k1z_ymm_ymmm256b32) : Code.EVEX_Vpsravd_ymm_k1z_ymm_ymmm256b32);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpsravd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpsravd_zmm_k1z_zmm_zmmm512b32, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpsravq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpsravq_xmm_k1z_xmm_xmmm128b64, dst, src1, src2), dst.Flags);
		}

		public void vpsravq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpsravq_ymm_k1z_ymm_ymmm256b64, dst, src1, src2), dst.Flags);
		}

		public void vpsravq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpsravq_zmm_k1z_zmm_zmmm512b64, dst, src1, src2), dst.Flags);
		}

		public void vpsravq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpsravq_xmm_k1z_xmm_xmmm128b64, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpsravq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpsravq_ymm_k1z_ymm_ymmm256b64, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpsravq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpsravq_zmm_k1z_zmm_zmmm512b64, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpsravw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpsravw_xmm_k1z_xmm_xmmm128, dst, src1, src2), dst.Flags);
		}

		public void vpsravw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpsravw_ymm_k1z_ymm_ymmm256, dst, src1, src2), dst.Flags);
		}

		public void vpsravw(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpsravw_zmm_k1z_zmm_zmmm512, dst, src1, src2), dst.Flags);
		}

		public void vpsravw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpsravw_xmm_k1z_xmm_xmmm128, register, register2, in memory), dst.Flags);
		}

		public void vpsravw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpsravw_ymm_k1z_ymm_ymmm256, register, register2, in memory), dst.Flags);
		}

		public void vpsravw(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpsravw_zmm_k1z_zmm_zmmm512, register, register2, in memory), dst.Flags);
		}

		public void vpsraw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpsraw_xmm_xmm_xmmm128 : Code.EVEX_Vpsraw_xmm_k1z_xmm_xmmm128);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpsraw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpsraw_ymm_ymm_xmmm128 : Code.EVEX_Vpsraw_ymm_k1z_ymm_xmmm128);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpsraw(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpsraw_zmm_k1z_zmm_xmmm128, dst, src1, src2), dst.Flags);
		}

		public void vpsraw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpsraw_xmm_xmm_xmmm128 : Code.EVEX_Vpsraw_xmm_k1z_xmm_xmmm128);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags);
		}

		public void vpsraw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpsraw_ymm_ymm_xmmm128 : Code.EVEX_Vpsraw_ymm_k1z_ymm_xmmm128);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags);
		}

		public void vpsraw(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpsraw_zmm_k1z_zmm_xmmm128, register, register2, in memory), dst.Flags);
		}

		public void vpsraw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpsraw_xmm_xmm_imm8 : Code.EVEX_Vpsraw_xmm_k1z_xmmm128_imm8);
			AddInstruction(Instruction.Create(code, dst, src1, imm), dst.Flags);
		}

		public void vpsraw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, sbyte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpsraw_ymm_ymm_imm8 : Code.EVEX_Vpsraw_ymm_k1z_ymmm256_imm8);
			AddInstruction(Instruction.Create(code, dst, src1, imm), dst.Flags);
		}

		public void vpsraw(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpsraw_zmm_k1z_zmmm512_imm8, dst, src1, imm), dst.Flags);
		}

		public void vpsraw(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpsraw_xmm_k1z_xmmm128_imm8, register, in memory, imm), dst.Flags);
		}

		public void vpsraw(AssemblerRegisterYMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpsraw_ymm_k1z_ymmm256_imm8, register, in memory, imm), dst.Flags);
		}

		public void vpsraw(AssemblerRegisterZMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpsraw_zmm_k1z_zmmm512_imm8, register, in memory, imm), dst.Flags);
		}

		public void vpsraw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, byte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpsraw_xmm_xmm_imm8 : Code.EVEX_Vpsraw_xmm_k1z_xmmm128_imm8);
			AddInstruction(Instruction.Create(code, (Register)dst, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vpsraw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, byte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpsraw_ymm_ymm_imm8 : Code.EVEX_Vpsraw_ymm_k1z_ymmm256_imm8);
			AddInstruction(Instruction.Create(code, (Register)dst, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vpsraw(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpsraw_zmm_k1z_zmmm512_imm8, (Register)dst, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vpsraw(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpsraw_xmm_k1z_xmmm128_imm8, register, in memory, (uint)imm), dst.Flags);
		}

		public void vpsraw(AssemblerRegisterYMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpsraw_ymm_k1z_ymmm256_imm8, register, in memory, (uint)imm), dst.Flags);
		}

		public void vpsraw(AssemblerRegisterZMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpsraw_zmm_k1z_zmmm512_imm8, register, in memory, (uint)imm), dst.Flags);
		}

		public void vpsrld(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpsrld_xmm_xmm_xmmm128 : Code.EVEX_Vpsrld_xmm_k1z_xmm_xmmm128);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpsrld(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpsrld_ymm_ymm_xmmm128 : Code.EVEX_Vpsrld_ymm_k1z_ymm_xmmm128);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpsrld(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpsrld_zmm_k1z_zmm_xmmm128, dst, src1, src2), dst.Flags);
		}

		public void vpsrld(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpsrld_xmm_xmm_xmmm128 : Code.EVEX_Vpsrld_xmm_k1z_xmm_xmmm128);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags);
		}

		public void vpsrld(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpsrld_ymm_ymm_xmmm128 : Code.EVEX_Vpsrld_ymm_k1z_ymm_xmmm128);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags);
		}

		public void vpsrld(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpsrld_zmm_k1z_zmm_xmmm128, register, register2, in memory), dst.Flags);
		}

		public void vpsrld(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpsrld_xmm_xmm_imm8 : Code.EVEX_Vpsrld_xmm_k1z_xmmm128b32_imm8);
			AddInstruction(Instruction.Create(code, dst, src1, imm), dst.Flags);
		}

		public void vpsrld(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, sbyte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpsrld_ymm_ymm_imm8 : Code.EVEX_Vpsrld_ymm_k1z_ymmm256b32_imm8);
			AddInstruction(Instruction.Create(code, dst, src1, imm), dst.Flags);
		}

		public void vpsrld(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpsrld_zmm_k1z_zmmm512b32_imm8, dst, src1, imm), dst.Flags);
		}

		public void vpsrld(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpsrld_xmm_k1z_xmmm128b32_imm8, register, in memory, imm), dst.Flags | src1.Flags);
		}

		public void vpsrld(AssemblerRegisterYMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpsrld_ymm_k1z_ymmm256b32_imm8, register, in memory, imm), dst.Flags | src1.Flags);
		}

		public void vpsrld(AssemblerRegisterZMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpsrld_zmm_k1z_zmmm512b32_imm8, register, in memory, imm), dst.Flags | src1.Flags);
		}

		public void vpsrld(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, byte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpsrld_xmm_xmm_imm8 : Code.EVEX_Vpsrld_xmm_k1z_xmmm128b32_imm8);
			AddInstruction(Instruction.Create(code, (Register)dst, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vpsrld(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, byte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpsrld_ymm_ymm_imm8 : Code.EVEX_Vpsrld_ymm_k1z_ymmm256b32_imm8);
			AddInstruction(Instruction.Create(code, (Register)dst, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vpsrld(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpsrld_zmm_k1z_zmmm512b32_imm8, (Register)dst, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vpsrld(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpsrld_xmm_k1z_xmmm128b32_imm8, register, in memory, (uint)imm), dst.Flags | src1.Flags);
		}

		public void vpsrld(AssemblerRegisterYMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpsrld_ymm_k1z_ymmm256b32_imm8, register, in memory, (uint)imm), dst.Flags | src1.Flags);
		}

		public void vpsrld(AssemblerRegisterZMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpsrld_zmm_k1z_zmmm512b32_imm8, register, in memory, (uint)imm), dst.Flags | src1.Flags);
		}

		public void vpsrldq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpsrldq_xmm_xmm_imm8 : Code.EVEX_Vpsrldq_xmm_xmmm128_imm8);
			AddInstruction(Instruction.Create(code, dst, src1, imm));
		}

		public void vpsrldq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, sbyte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpsrldq_ymm_ymm_imm8 : Code.EVEX_Vpsrldq_ymm_ymmm256_imm8);
			AddInstruction(Instruction.Create(code, dst, src1, imm));
		}

		public void vpsrldq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpsrldq_zmm_zmmm512_imm8, dst, src1, imm));
		}

		public void vpsrldq(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpsrldq_xmm_xmmm128_imm8, register, in memory, imm));
		}

		public void vpsrldq(AssemblerRegisterYMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpsrldq_ymm_ymmm256_imm8, register, in memory, imm));
		}

		public void vpsrldq(AssemblerRegisterZMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpsrldq_zmm_zmmm512_imm8, register, in memory, imm));
		}

		public void vpsrldq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, byte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpsrldq_xmm_xmm_imm8 : Code.EVEX_Vpsrldq_xmm_xmmm128_imm8);
			AddInstruction(Instruction.Create(code, (Register)dst, (Register)src1, (uint)imm));
		}

		public void vpsrldq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, byte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpsrldq_ymm_ymm_imm8 : Code.EVEX_Vpsrldq_ymm_ymmm256_imm8);
			AddInstruction(Instruction.Create(code, (Register)dst, (Register)src1, (uint)imm));
		}

		public void vpsrldq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpsrldq_zmm_zmmm512_imm8, (Register)dst, (Register)src1, (uint)imm));
		}

		public void vpsrldq(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpsrldq_xmm_xmmm128_imm8, register, in memory, (uint)imm));
		}

		public void vpsrldq(AssemblerRegisterYMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpsrldq_ymm_ymmm256_imm8, register, in memory, (uint)imm));
		}

		public void vpsrldq(AssemblerRegisterZMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpsrldq_zmm_zmmm512_imm8, register, in memory, (uint)imm));
		}

		public void vpsrlq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpsrlq_xmm_xmm_xmmm128 : Code.EVEX_Vpsrlq_xmm_k1z_xmm_xmmm128);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpsrlq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpsrlq_ymm_ymm_xmmm128 : Code.EVEX_Vpsrlq_ymm_k1z_ymm_xmmm128);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpsrlq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpsrlq_zmm_k1z_zmm_xmmm128, dst, src1, src2), dst.Flags);
		}

		public void vpsrlq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpsrlq_xmm_xmm_xmmm128 : Code.EVEX_Vpsrlq_xmm_k1z_xmm_xmmm128);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags);
		}

		public void vpsrlq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpsrlq_ymm_ymm_xmmm128 : Code.EVEX_Vpsrlq_ymm_k1z_ymm_xmmm128);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags);
		}

		public void vpsrlq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpsrlq_zmm_k1z_zmm_xmmm128, register, register2, in memory), dst.Flags);
		}

		public void vpsrlq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpsrlq_xmm_xmm_imm8 : Code.EVEX_Vpsrlq_xmm_k1z_xmmm128b64_imm8);
			AddInstruction(Instruction.Create(code, dst, src1, imm), dst.Flags);
		}

		public void vpsrlq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, sbyte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpsrlq_ymm_ymm_imm8 : Code.EVEX_Vpsrlq_ymm_k1z_ymmm256b64_imm8);
			AddInstruction(Instruction.Create(code, dst, src1, imm), dst.Flags);
		}

		public void vpsrlq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpsrlq_zmm_k1z_zmmm512b64_imm8, dst, src1, imm), dst.Flags);
		}

		public void vpsrlq(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpsrlq_xmm_k1z_xmmm128b64_imm8, register, in memory, imm), dst.Flags | src1.Flags);
		}

		public void vpsrlq(AssemblerRegisterYMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpsrlq_ymm_k1z_ymmm256b64_imm8, register, in memory, imm), dst.Flags | src1.Flags);
		}

		public void vpsrlq(AssemblerRegisterZMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpsrlq_zmm_k1z_zmmm512b64_imm8, register, in memory, imm), dst.Flags | src1.Flags);
		}

		public void vpsrlq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, byte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpsrlq_xmm_xmm_imm8 : Code.EVEX_Vpsrlq_xmm_k1z_xmmm128b64_imm8);
			AddInstruction(Instruction.Create(code, (Register)dst, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vpsrlq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, byte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpsrlq_ymm_ymm_imm8 : Code.EVEX_Vpsrlq_ymm_k1z_ymmm256b64_imm8);
			AddInstruction(Instruction.Create(code, (Register)dst, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vpsrlq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpsrlq_zmm_k1z_zmmm512b64_imm8, (Register)dst, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vpsrlq(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpsrlq_xmm_k1z_xmmm128b64_imm8, register, in memory, (uint)imm), dst.Flags | src1.Flags);
		}

		public void vpsrlq(AssemblerRegisterYMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpsrlq_ymm_k1z_ymmm256b64_imm8, register, in memory, (uint)imm), dst.Flags | src1.Flags);
		}

		public void vpsrlq(AssemblerRegisterZMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpsrlq_zmm_k1z_zmmm512b64_imm8, register, in memory, (uint)imm), dst.Flags | src1.Flags);
		}

		public void vpsrlvd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpsrlvd_xmm_xmm_xmmm128 : Code.EVEX_Vpsrlvd_xmm_k1z_xmm_xmmm128b32);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpsrlvd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpsrlvd_ymm_ymm_ymmm256 : Code.EVEX_Vpsrlvd_ymm_k1z_ymm_ymmm256b32);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpsrlvd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpsrlvd_zmm_k1z_zmm_zmmm512b32, dst, src1, src2), dst.Flags);
		}

		public void vpsrlvd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vpsrlvd_xmm_xmm_xmmm128 : Code.EVEX_Vpsrlvd_xmm_k1z_xmm_xmmm128b32) : Code.EVEX_Vpsrlvd_xmm_k1z_xmm_xmmm128b32);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpsrlvd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vpsrlvd_ymm_ymm_ymmm256 : Code.EVEX_Vpsrlvd_ymm_k1z_ymm_ymmm256b32) : Code.EVEX_Vpsrlvd_ymm_k1z_ymm_ymmm256b32);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpsrlvd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpsrlvd_zmm_k1z_zmm_zmmm512b32, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpsrlvq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpsrlvq_xmm_xmm_xmmm128 : Code.EVEX_Vpsrlvq_xmm_k1z_xmm_xmmm128b64);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpsrlvq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpsrlvq_ymm_ymm_ymmm256 : Code.EVEX_Vpsrlvq_ymm_k1z_ymm_ymmm256b64);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpsrlvq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpsrlvq_zmm_k1z_zmm_zmmm512b64, dst, src1, src2), dst.Flags);
		}

		public void vpsrlvq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vpsrlvq_xmm_xmm_xmmm128 : Code.EVEX_Vpsrlvq_xmm_k1z_xmm_xmmm128b64) : Code.EVEX_Vpsrlvq_xmm_k1z_xmm_xmmm128b64);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpsrlvq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vpsrlvq_ymm_ymm_ymmm256 : Code.EVEX_Vpsrlvq_ymm_k1z_ymm_ymmm256b64) : Code.EVEX_Vpsrlvq_ymm_k1z_ymm_ymmm256b64);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpsrlvq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpsrlvq_zmm_k1z_zmm_zmmm512b64, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpsrlvw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpsrlvw_xmm_k1z_xmm_xmmm128, dst, src1, src2), dst.Flags);
		}

		public void vpsrlvw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpsrlvw_ymm_k1z_ymm_ymmm256, dst, src1, src2), dst.Flags);
		}

		public void vpsrlvw(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpsrlvw_zmm_k1z_zmm_zmmm512, dst, src1, src2), dst.Flags);
		}

		public void vpsrlvw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpsrlvw_xmm_k1z_xmm_xmmm128, register, register2, in memory), dst.Flags);
		}

		public void vpsrlvw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpsrlvw_ymm_k1z_ymm_ymmm256, register, register2, in memory), dst.Flags);
		}

		public void vpsrlvw(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpsrlvw_zmm_k1z_zmm_zmmm512, register, register2, in memory), dst.Flags);
		}

		public void vpsrlw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpsrlw_xmm_xmm_xmmm128 : Code.EVEX_Vpsrlw_xmm_k1z_xmm_xmmm128);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpsrlw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpsrlw_ymm_ymm_xmmm128 : Code.EVEX_Vpsrlw_ymm_k1z_ymm_xmmm128);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpsrlw(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpsrlw_zmm_k1z_zmm_xmmm128, dst, src1, src2), dst.Flags);
		}

		public void vpsrlw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpsrlw_xmm_xmm_xmmm128 : Code.EVEX_Vpsrlw_xmm_k1z_xmm_xmmm128);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags);
		}

		public void vpsrlw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpsrlw_ymm_ymm_xmmm128 : Code.EVEX_Vpsrlw_ymm_k1z_ymm_xmmm128);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags);
		}

		public void vpsrlw(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpsrlw_zmm_k1z_zmm_xmmm128, register, register2, in memory), dst.Flags);
		}

		public void vpsrlw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpsrlw_xmm_xmm_imm8 : Code.EVEX_Vpsrlw_xmm_k1z_xmmm128_imm8);
			AddInstruction(Instruction.Create(code, dst, src1, imm), dst.Flags);
		}

		public void vpsrlw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, sbyte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpsrlw_ymm_ymm_imm8 : Code.EVEX_Vpsrlw_ymm_k1z_ymmm256_imm8);
			AddInstruction(Instruction.Create(code, dst, src1, imm), dst.Flags);
		}

		public void vpsrlw(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpsrlw_zmm_k1z_zmmm512_imm8, dst, src1, imm), dst.Flags);
		}

		public void vpsrlw(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpsrlw_xmm_k1z_xmmm128_imm8, register, in memory, imm), dst.Flags);
		}

		public void vpsrlw(AssemblerRegisterYMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpsrlw_ymm_k1z_ymmm256_imm8, register, in memory, imm), dst.Flags);
		}

		public void vpsrlw(AssemblerRegisterZMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpsrlw_zmm_k1z_zmmm512_imm8, register, in memory, imm), dst.Flags);
		}

		public void vpsrlw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, byte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpsrlw_xmm_xmm_imm8 : Code.EVEX_Vpsrlw_xmm_k1z_xmmm128_imm8);
			AddInstruction(Instruction.Create(code, (Register)dst, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vpsrlw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, byte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpsrlw_ymm_ymm_imm8 : Code.EVEX_Vpsrlw_ymm_k1z_ymmm256_imm8);
			AddInstruction(Instruction.Create(code, (Register)dst, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vpsrlw(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpsrlw_zmm_k1z_zmmm512_imm8, (Register)dst, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vpsrlw(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpsrlw_xmm_k1z_xmmm128_imm8, register, in memory, (uint)imm), dst.Flags);
		}

		public void vpsrlw(AssemblerRegisterYMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpsrlw_ymm_k1z_ymmm256_imm8, register, in memory, (uint)imm), dst.Flags);
		}

		public void vpsrlw(AssemblerRegisterZMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpsrlw_zmm_k1z_zmmm512_imm8, register, in memory, (uint)imm), dst.Flags);
		}

		public void vpsubb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpsubb_xmm_xmm_xmmm128 : Code.EVEX_Vpsubb_xmm_k1z_xmm_xmmm128);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpsubb(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpsubb_ymm_ymm_ymmm256 : Code.EVEX_Vpsubb_ymm_k1z_ymm_ymmm256);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpsubb(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpsubb_zmm_k1z_zmm_zmmm512, dst, src1, src2), dst.Flags);
		}

		public void vpsubb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpsubb_xmm_xmm_xmmm128 : Code.EVEX_Vpsubb_xmm_k1z_xmm_xmmm128);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags);
		}

		public void vpsubb(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpsubb_ymm_ymm_ymmm256 : Code.EVEX_Vpsubb_ymm_k1z_ymm_ymmm256);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags);
		}

		public void vpsubb(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpsubb_zmm_k1z_zmm_zmmm512, register, register2, in memory), dst.Flags);
		}

		public void vpsubd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpsubd_xmm_xmm_xmmm128 : Code.EVEX_Vpsubd_xmm_k1z_xmm_xmmm128b32);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpsubd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpsubd_ymm_ymm_ymmm256 : Code.EVEX_Vpsubd_ymm_k1z_ymm_ymmm256b32);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpsubd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpsubd_zmm_k1z_zmm_zmmm512b32, dst, src1, src2), dst.Flags);
		}

		public void vpsubd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vpsubd_xmm_xmm_xmmm128 : Code.EVEX_Vpsubd_xmm_k1z_xmm_xmmm128b32) : Code.EVEX_Vpsubd_xmm_k1z_xmm_xmmm128b32);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpsubd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vpsubd_ymm_ymm_ymmm256 : Code.EVEX_Vpsubd_ymm_k1z_ymm_ymmm256b32) : Code.EVEX_Vpsubd_ymm_k1z_ymm_ymmm256b32);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpsubd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpsubd_zmm_k1z_zmm_zmmm512b32, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpsubq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpsubq_xmm_xmm_xmmm128 : Code.EVEX_Vpsubq_xmm_k1z_xmm_xmmm128b64);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpsubq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpsubq_ymm_ymm_ymmm256 : Code.EVEX_Vpsubq_ymm_k1z_ymm_ymmm256b64);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpsubq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpsubq_zmm_k1z_zmm_zmmm512b64, dst, src1, src2), dst.Flags);
		}

		public void vpsubq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vpsubq_xmm_xmm_xmmm128 : Code.EVEX_Vpsubq_xmm_k1z_xmm_xmmm128b64) : Code.EVEX_Vpsubq_xmm_k1z_xmm_xmmm128b64);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpsubq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vpsubq_ymm_ymm_ymmm256 : Code.EVEX_Vpsubq_ymm_k1z_ymm_ymmm256b64) : Code.EVEX_Vpsubq_ymm_k1z_ymm_ymmm256b64);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpsubq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpsubq_zmm_k1z_zmm_zmmm512b64, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpsubsb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpsubsb_xmm_xmm_xmmm128 : Code.EVEX_Vpsubsb_xmm_k1z_xmm_xmmm128);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpsubsb(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpsubsb_ymm_ymm_ymmm256 : Code.EVEX_Vpsubsb_ymm_k1z_ymm_ymmm256);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpsubsb(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpsubsb_zmm_k1z_zmm_zmmm512, dst, src1, src2), dst.Flags);
		}

		public void vpsubsb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpsubsb_xmm_xmm_xmmm128 : Code.EVEX_Vpsubsb_xmm_k1z_xmm_xmmm128);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags);
		}

		public void vpsubsb(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpsubsb_ymm_ymm_ymmm256 : Code.EVEX_Vpsubsb_ymm_k1z_ymm_ymmm256);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags);
		}

		public void vpsubsb(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpsubsb_zmm_k1z_zmm_zmmm512, register, register2, in memory), dst.Flags);
		}

		public void vpsubsw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpsubsw_xmm_xmm_xmmm128 : Code.EVEX_Vpsubsw_xmm_k1z_xmm_xmmm128);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpsubsw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpsubsw_ymm_ymm_ymmm256 : Code.EVEX_Vpsubsw_ymm_k1z_ymm_ymmm256);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpsubsw(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpsubsw_zmm_k1z_zmm_zmmm512, dst, src1, src2), dst.Flags);
		}

		public void vpsubsw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpsubsw_xmm_xmm_xmmm128 : Code.EVEX_Vpsubsw_xmm_k1z_xmm_xmmm128);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags);
		}

		public void vpsubsw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpsubsw_ymm_ymm_ymmm256 : Code.EVEX_Vpsubsw_ymm_k1z_ymm_ymmm256);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags);
		}

		public void vpsubsw(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpsubsw_zmm_k1z_zmm_zmmm512, register, register2, in memory), dst.Flags);
		}

		public void vpsubusb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpsubusb_xmm_xmm_xmmm128 : Code.EVEX_Vpsubusb_xmm_k1z_xmm_xmmm128);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpsubusb(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpsubusb_ymm_ymm_ymmm256 : Code.EVEX_Vpsubusb_ymm_k1z_ymm_ymmm256);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpsubusb(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpsubusb_zmm_k1z_zmm_zmmm512, dst, src1, src2), dst.Flags);
		}

		public void vpsubusb(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpsubusb_xmm_xmm_xmmm128 : Code.EVEX_Vpsubusb_xmm_k1z_xmm_xmmm128);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags);
		}

		public void vpsubusb(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpsubusb_ymm_ymm_ymmm256 : Code.EVEX_Vpsubusb_ymm_k1z_ymm_ymmm256);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags);
		}

		public void vpsubusb(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpsubusb_zmm_k1z_zmm_zmmm512, register, register2, in memory), dst.Flags);
		}

		public void vpsubusw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpsubusw_xmm_xmm_xmmm128 : Code.EVEX_Vpsubusw_xmm_k1z_xmm_xmmm128);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpsubusw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpsubusw_ymm_ymm_ymmm256 : Code.EVEX_Vpsubusw_ymm_k1z_ymm_ymmm256);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpsubusw(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpsubusw_zmm_k1z_zmm_zmmm512, dst, src1, src2), dst.Flags);
		}

		public void vpsubusw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpsubusw_xmm_xmm_xmmm128 : Code.EVEX_Vpsubusw_xmm_k1z_xmm_xmmm128);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags);
		}

		public void vpsubusw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpsubusw_ymm_ymm_ymmm256 : Code.EVEX_Vpsubusw_ymm_k1z_ymm_ymmm256);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags);
		}

		public void vpsubusw(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpsubusw_zmm_k1z_zmm_zmmm512, register, register2, in memory), dst.Flags);
		}

		public void vpsubw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpsubw_xmm_xmm_xmmm128 : Code.EVEX_Vpsubw_xmm_k1z_xmm_xmmm128);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpsubw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpsubw_ymm_ymm_ymmm256 : Code.EVEX_Vpsubw_ymm_k1z_ymm_ymmm256);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpsubw(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpsubw_zmm_k1z_zmm_zmmm512, dst, src1, src2), dst.Flags);
		}

		public void vpsubw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpsubw_xmm_xmm_xmmm128 : Code.EVEX_Vpsubw_xmm_k1z_xmm_xmmm128);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags);
		}

		public void vpsubw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpsubw_ymm_ymm_ymmm256 : Code.EVEX_Vpsubw_ymm_k1z_ymm_ymmm256);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags);
		}

		public void vpsubw(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpsubw_zmm_k1z_zmm_zmmm512, register, register2, in memory), dst.Flags);
		}

		public void vpternlogd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpternlogd_xmm_k1z_xmm_xmmm128b32_imm8, dst, src1, src2, imm), dst.Flags);
		}

		public void vpternlogd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpternlogd_ymm_k1z_ymm_ymmm256b32_imm8, dst, src1, src2, imm), dst.Flags);
		}

		public void vpternlogd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpternlogd_zmm_k1z_zmm_zmmm512b32_imm8, dst, src1, src2, imm), dst.Flags);
		}

		public void vpternlogd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpternlogd_xmm_k1z_xmm_xmmm128b32_imm8, register, register2, in memory, imm), dst.Flags | src2.Flags);
		}

		public void vpternlogd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpternlogd_ymm_k1z_ymm_ymmm256b32_imm8, register, register2, in memory, imm), dst.Flags | src2.Flags);
		}

		public void vpternlogd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpternlogd_zmm_k1z_zmm_zmmm512b32_imm8, register, register2, in memory, imm), dst.Flags | src2.Flags);
		}

		public void vpternlogd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpternlogd_xmm_k1z_xmm_xmmm128b32_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags);
		}

		public void vpternlogd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpternlogd_ymm_k1z_ymm_ymmm256b32_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags);
		}

		public void vpternlogd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpternlogd_zmm_k1z_zmm_zmmm512b32_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags);
		}

		public void vpternlogd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpternlogd_xmm_k1z_xmm_xmmm128b32_imm8, register, register2, in memory, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vpternlogd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpternlogd_ymm_k1z_ymm_ymmm256b32_imm8, register, register2, in memory, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vpternlogd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpternlogd_zmm_k1z_zmm_zmmm512b32_imm8, register, register2, in memory, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vpternlogq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpternlogq_xmm_k1z_xmm_xmmm128b64_imm8, dst, src1, src2, imm), dst.Flags);
		}

		public void vpternlogq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpternlogq_ymm_k1z_ymm_ymmm256b64_imm8, dst, src1, src2, imm), dst.Flags);
		}

		public void vpternlogq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpternlogq_zmm_k1z_zmm_zmmm512b64_imm8, dst, src1, src2, imm), dst.Flags);
		}

		public void vpternlogq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpternlogq_xmm_k1z_xmm_xmmm128b64_imm8, register, register2, in memory, imm), dst.Flags | src2.Flags);
		}

		public void vpternlogq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpternlogq_ymm_k1z_ymm_ymmm256b64_imm8, register, register2, in memory, imm), dst.Flags | src2.Flags);
		}

		public void vpternlogq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpternlogq_zmm_k1z_zmm_zmmm512b64_imm8, register, register2, in memory, imm), dst.Flags | src2.Flags);
		}

		public void vpternlogq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpternlogq_xmm_k1z_xmm_xmmm128b64_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags);
		}

		public void vpternlogq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpternlogq_ymm_k1z_ymm_ymmm256b64_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags);
		}

		public void vpternlogq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpternlogq_zmm_k1z_zmm_zmmm512b64_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags);
		}

		public void vpternlogq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpternlogq_xmm_k1z_xmm_xmmm128b64_imm8, register, register2, in memory, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vpternlogq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpternlogq_ymm_k1z_ymm_ymmm256b64_imm8, register, register2, in memory, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vpternlogq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpternlogq_zmm_k1z_zmm_zmmm512b64_imm8, register, register2, in memory, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vptest(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vptest_xmm_xmmm128, dst, src));
		}

		public void vptest(AssemblerRegisterYMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vptest_ymm_ymmm256, dst, src));
		}

		public void vptest(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vptest_xmm_xmmm128, register, in memory));
		}

		public void vptest(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vptest_ymm_ymmm256, register, in memory));
		}

		public void vptestmb(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vptestmb_kr_k1_xmm_xmmm128, dst, src1, src2), dst.Flags);
		}

		public void vptestmb(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vptestmb_kr_k1_ymm_ymmm256, dst, src1, src2), dst.Flags);
		}

		public void vptestmb(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vptestmb_kr_k1_zmm_zmmm512, dst, src1, src2), dst.Flags);
		}

		public void vptestmb(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vptestmb_kr_k1_xmm_xmmm128, register, register2, in memory), dst.Flags);
		}

		public void vptestmb(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vptestmb_kr_k1_ymm_ymmm256, register, register2, in memory), dst.Flags);
		}

		public void vptestmb(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vptestmb_kr_k1_zmm_zmmm512, register, register2, in memory), dst.Flags);
		}

		public void vptestmd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vptestmd_kr_k1_xmm_xmmm128b32, dst, src1, src2), dst.Flags);
		}

		public void vptestmd(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vptestmd_kr_k1_ymm_ymmm256b32, dst, src1, src2), dst.Flags);
		}

		public void vptestmd(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vptestmd_kr_k1_zmm_zmmm512b32, dst, src1, src2), dst.Flags);
		}

		public void vptestmd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vptestmd_kr_k1_xmm_xmmm128b32, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vptestmd(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vptestmd_kr_k1_ymm_ymmm256b32, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vptestmd(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vptestmd_kr_k1_zmm_zmmm512b32, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vptestmq(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vptestmq_kr_k1_xmm_xmmm128b64, dst, src1, src2), dst.Flags);
		}

		public void vptestmq(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vptestmq_kr_k1_ymm_ymmm256b64, dst, src1, src2), dst.Flags);
		}

		public void vptestmq(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vptestmq_kr_k1_zmm_zmmm512b64, dst, src1, src2), dst.Flags);
		}

		public void vptestmq(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vptestmq_kr_k1_xmm_xmmm128b64, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vptestmq(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vptestmq_kr_k1_ymm_ymmm256b64, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vptestmq(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vptestmq_kr_k1_zmm_zmmm512b64, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vptestmw(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vptestmw_kr_k1_xmm_xmmm128, dst, src1, src2), dst.Flags);
		}

		public void vptestmw(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vptestmw_kr_k1_ymm_ymmm256, dst, src1, src2), dst.Flags);
		}

		public void vptestmw(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vptestmw_kr_k1_zmm_zmmm512, dst, src1, src2), dst.Flags);
		}

		public void vptestmw(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vptestmw_kr_k1_xmm_xmmm128, register, register2, in memory), dst.Flags);
		}

		public void vptestmw(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vptestmw_kr_k1_ymm_ymmm256, register, register2, in memory), dst.Flags);
		}

		public void vptestmw(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vptestmw_kr_k1_zmm_zmmm512, register, register2, in memory), dst.Flags);
		}

		public void vptestnmb(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vptestnmb_kr_k1_xmm_xmmm128, dst, src1, src2), dst.Flags);
		}

		public void vptestnmb(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vptestnmb_kr_k1_ymm_ymmm256, dst, src1, src2), dst.Flags);
		}

		public void vptestnmb(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vptestnmb_kr_k1_zmm_zmmm512, dst, src1, src2), dst.Flags);
		}

		public void vptestnmb(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vptestnmb_kr_k1_xmm_xmmm128, register, register2, in memory), dst.Flags);
		}

		public void vptestnmb(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vptestnmb_kr_k1_ymm_ymmm256, register, register2, in memory), dst.Flags);
		}

		public void vptestnmb(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vptestnmb_kr_k1_zmm_zmmm512, register, register2, in memory), dst.Flags);
		}

		public void vptestnmd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vptestnmd_kr_k1_xmm_xmmm128b32, dst, src1, src2), dst.Flags);
		}

		public void vptestnmd(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vptestnmd_kr_k1_ymm_ymmm256b32, dst, src1, src2), dst.Flags);
		}

		public void vptestnmd(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vptestnmd_kr_k1_zmm_zmmm512b32, dst, src1, src2), dst.Flags);
		}

		public void vptestnmd(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vptestnmd_kr_k1_xmm_xmmm128b32, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vptestnmd(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vptestnmd_kr_k1_ymm_ymmm256b32, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vptestnmd(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vptestnmd_kr_k1_zmm_zmmm512b32, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vptestnmq(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vptestnmq_kr_k1_xmm_xmmm128b64, dst, src1, src2), dst.Flags);
		}

		public void vptestnmq(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vptestnmq_kr_k1_ymm_ymmm256b64, dst, src1, src2), dst.Flags);
		}

		public void vptestnmq(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vptestnmq_kr_k1_zmm_zmmm512b64, dst, src1, src2), dst.Flags);
		}

		public void vptestnmq(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vptestnmq_kr_k1_xmm_xmmm128b64, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vptestnmq(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vptestnmq_kr_k1_ymm_ymmm256b64, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vptestnmq(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vptestnmq_kr_k1_zmm_zmmm512b64, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vptestnmw(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vptestnmw_kr_k1_xmm_xmmm128, dst, src1, src2), dst.Flags);
		}

		public void vptestnmw(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vptestnmw_kr_k1_ymm_ymmm256, dst, src1, src2), dst.Flags);
		}

		public void vptestnmw(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vptestnmw_kr_k1_zmm_zmmm512, dst, src1, src2), dst.Flags);
		}

		public void vptestnmw(AssemblerRegisterK dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vptestnmw_kr_k1_xmm_xmmm128, register, register2, in memory), dst.Flags);
		}

		public void vptestnmw(AssemblerRegisterK dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vptestnmw_kr_k1_ymm_ymmm256, register, register2, in memory), dst.Flags);
		}

		public void vptestnmw(AssemblerRegisterK dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vptestnmw_kr_k1_zmm_zmmm512, register, register2, in memory), dst.Flags);
		}

		public void vpunpckhbw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpunpckhbw_xmm_xmm_xmmm128 : Code.EVEX_Vpunpckhbw_xmm_k1z_xmm_xmmm128);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpunpckhbw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpunpckhbw_ymm_ymm_ymmm256 : Code.EVEX_Vpunpckhbw_ymm_k1z_ymm_ymmm256);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpunpckhbw(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpunpckhbw_zmm_k1z_zmm_zmmm512, dst, src1, src2), dst.Flags);
		}

		public void vpunpckhbw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpunpckhbw_xmm_xmm_xmmm128 : Code.EVEX_Vpunpckhbw_xmm_k1z_xmm_xmmm128);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags);
		}

		public void vpunpckhbw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpunpckhbw_ymm_ymm_ymmm256 : Code.EVEX_Vpunpckhbw_ymm_k1z_ymm_ymmm256);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags);
		}

		public void vpunpckhbw(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpunpckhbw_zmm_k1z_zmm_zmmm512, register, register2, in memory), dst.Flags);
		}

		public void vpunpckhdq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpunpckhdq_xmm_xmm_xmmm128 : Code.EVEX_Vpunpckhdq_xmm_k1z_xmm_xmmm128b32);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpunpckhdq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpunpckhdq_ymm_ymm_ymmm256 : Code.EVEX_Vpunpckhdq_ymm_k1z_ymm_ymmm256b32);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpunpckhdq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpunpckhdq_zmm_k1z_zmm_zmmm512b32, dst, src1, src2), dst.Flags);
		}

		public void vpunpckhdq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vpunpckhdq_xmm_xmm_xmmm128 : Code.EVEX_Vpunpckhdq_xmm_k1z_xmm_xmmm128b32) : Code.EVEX_Vpunpckhdq_xmm_k1z_xmm_xmmm128b32);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpunpckhdq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vpunpckhdq_ymm_ymm_ymmm256 : Code.EVEX_Vpunpckhdq_ymm_k1z_ymm_ymmm256b32) : Code.EVEX_Vpunpckhdq_ymm_k1z_ymm_ymmm256b32);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpunpckhdq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpunpckhdq_zmm_k1z_zmm_zmmm512b32, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpunpckhqdq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpunpckhqdq_xmm_xmm_xmmm128 : Code.EVEX_Vpunpckhqdq_xmm_k1z_xmm_xmmm128b64);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpunpckhqdq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpunpckhqdq_ymm_ymm_ymmm256 : Code.EVEX_Vpunpckhqdq_ymm_k1z_ymm_ymmm256b64);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpunpckhqdq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpunpckhqdq_zmm_k1z_zmm_zmmm512b64, dst, src1, src2), dst.Flags);
		}

		public void vpunpckhqdq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vpunpckhqdq_xmm_xmm_xmmm128 : Code.EVEX_Vpunpckhqdq_xmm_k1z_xmm_xmmm128b64) : Code.EVEX_Vpunpckhqdq_xmm_k1z_xmm_xmmm128b64);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpunpckhqdq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vpunpckhqdq_ymm_ymm_ymmm256 : Code.EVEX_Vpunpckhqdq_ymm_k1z_ymm_ymmm256b64) : Code.EVEX_Vpunpckhqdq_ymm_k1z_ymm_ymmm256b64);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpunpckhqdq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpunpckhqdq_zmm_k1z_zmm_zmmm512b64, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpunpckhwd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpunpckhwd_xmm_xmm_xmmm128 : Code.EVEX_Vpunpckhwd_xmm_k1z_xmm_xmmm128);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpunpckhwd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpunpckhwd_ymm_ymm_ymmm256 : Code.EVEX_Vpunpckhwd_ymm_k1z_ymm_ymmm256);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpunpckhwd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpunpckhwd_zmm_k1z_zmm_zmmm512, dst, src1, src2), dst.Flags);
		}

		public void vpunpckhwd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpunpckhwd_xmm_xmm_xmmm128 : Code.EVEX_Vpunpckhwd_xmm_k1z_xmm_xmmm128);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags);
		}

		public void vpunpckhwd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpunpckhwd_ymm_ymm_ymmm256 : Code.EVEX_Vpunpckhwd_ymm_k1z_ymm_ymmm256);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags);
		}

		public void vpunpckhwd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpunpckhwd_zmm_k1z_zmm_zmmm512, register, register2, in memory), dst.Flags);
		}

		public void vpunpcklbw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpunpcklbw_xmm_xmm_xmmm128 : Code.EVEX_Vpunpcklbw_xmm_k1z_xmm_xmmm128);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpunpcklbw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpunpcklbw_ymm_ymm_ymmm256 : Code.EVEX_Vpunpcklbw_ymm_k1z_ymm_ymmm256);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpunpcklbw(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpunpcklbw_zmm_k1z_zmm_zmmm512, dst, src1, src2), dst.Flags);
		}

		public void vpunpcklbw(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpunpcklbw_xmm_xmm_xmmm128 : Code.EVEX_Vpunpcklbw_xmm_k1z_xmm_xmmm128);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags);
		}

		public void vpunpcklbw(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpunpcklbw_ymm_ymm_ymmm256 : Code.EVEX_Vpunpcklbw_ymm_k1z_ymm_ymmm256);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags);
		}

		public void vpunpcklbw(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpunpcklbw_zmm_k1z_zmm_zmmm512, register, register2, in memory), dst.Flags);
		}

		public void vpunpckldq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpunpckldq_xmm_xmm_xmmm128 : Code.EVEX_Vpunpckldq_xmm_k1z_xmm_xmmm128b32);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpunpckldq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpunpckldq_ymm_ymm_ymmm256 : Code.EVEX_Vpunpckldq_ymm_k1z_ymm_ymmm256b32);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpunpckldq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpunpckldq_zmm_k1z_zmm_zmmm512b32, dst, src1, src2), dst.Flags);
		}

		public void vpunpckldq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vpunpckldq_xmm_xmm_xmmm128 : Code.EVEX_Vpunpckldq_xmm_k1z_xmm_xmmm128b32) : Code.EVEX_Vpunpckldq_xmm_k1z_xmm_xmmm128b32);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpunpckldq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vpunpckldq_ymm_ymm_ymmm256 : Code.EVEX_Vpunpckldq_ymm_k1z_ymm_ymmm256b32) : Code.EVEX_Vpunpckldq_ymm_k1z_ymm_ymmm256b32);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpunpckldq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpunpckldq_zmm_k1z_zmm_zmmm512b32, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpunpcklqdq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpunpcklqdq_xmm_xmm_xmmm128 : Code.EVEX_Vpunpcklqdq_xmm_k1z_xmm_xmmm128b64);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpunpcklqdq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpunpcklqdq_ymm_ymm_ymmm256 : Code.EVEX_Vpunpcklqdq_ymm_k1z_ymm_ymmm256b64);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpunpcklqdq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpunpcklqdq_zmm_k1z_zmm_zmmm512b64, dst, src1, src2), dst.Flags);
		}

		public void vpunpcklqdq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vpunpcklqdq_xmm_xmm_xmmm128 : Code.EVEX_Vpunpcklqdq_xmm_k1z_xmm_xmmm128b64) : Code.EVEX_Vpunpcklqdq_xmm_k1z_xmm_xmmm128b64);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpunpcklqdq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vpunpcklqdq_ymm_ymm_ymmm256 : Code.EVEX_Vpunpcklqdq_ymm_k1z_ymm_ymmm256b64) : Code.EVEX_Vpunpcklqdq_ymm_k1z_ymm_ymmm256b64);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpunpcklqdq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpunpcklqdq_zmm_k1z_zmm_zmmm512b64, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpunpcklwd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpunpcklwd_xmm_xmm_xmmm128 : Code.EVEX_Vpunpcklwd_xmm_k1z_xmm_xmmm128);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpunpcklwd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpunpcklwd_ymm_ymm_ymmm256 : Code.EVEX_Vpunpcklwd_ymm_k1z_ymm_ymmm256);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vpunpcklwd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpunpcklwd_zmm_k1z_zmm_zmmm512, dst, src1, src2), dst.Flags);
		}

		public void vpunpcklwd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpunpcklwd_xmm_xmm_xmmm128 : Code.EVEX_Vpunpcklwd_xmm_k1z_xmm_xmmm128);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags);
		}

		public void vpunpcklwd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vpunpcklwd_ymm_ymm_ymmm256 : Code.EVEX_Vpunpcklwd_ymm_k1z_ymm_ymmm256);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags);
		}

		public void vpunpcklwd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpunpcklwd_zmm_k1z_zmm_zmmm512, register, register2, in memory), dst.Flags);
		}

		public void vpxor(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vpxor_xmm_xmm_xmmm128, dst, src1, src2));
		}

		public void vpxor(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vpxor_ymm_ymm_ymmm256, dst, src1, src2));
		}

		public void vpxor(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vpxor_xmm_xmm_xmmm128, register, register2, in memory));
		}

		public void vpxor(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vpxor_ymm_ymm_ymmm256, register, register2, in memory));
		}

		public void vpxord(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpxord_xmm_k1z_xmm_xmmm128b32, dst, src1, src2), dst.Flags);
		}

		public void vpxord(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpxord_ymm_k1z_ymm_ymmm256b32, dst, src1, src2), dst.Flags);
		}

		public void vpxord(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpxord_zmm_k1z_zmm_zmmm512b32, dst, src1, src2), dst.Flags);
		}

		public void vpxord(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpxord_xmm_k1z_xmm_xmmm128b32, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpxord(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpxord_ymm_k1z_ymm_ymmm256b32, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpxord(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpxord_zmm_k1z_zmm_zmmm512b32, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpxorq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpxorq_xmm_k1z_xmm_xmmm128b64, dst, src1, src2), dst.Flags);
		}

		public void vpxorq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpxorq_ymm_k1z_ymm_ymmm256b64, dst, src1, src2), dst.Flags);
		}

		public void vpxorq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vpxorq_zmm_k1z_zmm_zmmm512b64, dst, src1, src2), dst.Flags);
		}

		public void vpxorq(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpxorq_xmm_k1z_xmm_xmmm128b64, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpxorq(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpxorq_ymm_k1z_ymm_ymmm256b64, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vpxorq(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vpxorq_zmm_k1z_zmm_zmmm512b64, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vrangepd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vrangepd_xmm_k1z_xmm_xmmm128b64_imm8, dst, src1, src2, imm), dst.Flags);
		}

		public void vrangepd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vrangepd_ymm_k1z_ymm_ymmm256b64_imm8, dst, src1, src2, imm), dst.Flags);
		}

		public void vrangepd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vrangepd_zmm_k1z_zmm_zmmm512b64_imm8_sae, dst, src1, src2, imm), dst.Flags | src2.Flags);
		}

		public void vrangepd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vrangepd_xmm_k1z_xmm_xmmm128b64_imm8, register, register2, in memory, imm), dst.Flags | src2.Flags);
		}

		public void vrangepd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vrangepd_ymm_k1z_ymm_ymmm256b64_imm8, register, register2, in memory, imm), dst.Flags | src2.Flags);
		}

		public void vrangepd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vrangepd_zmm_k1z_zmm_zmmm512b64_imm8_sae, register, register2, in memory, imm), dst.Flags | src2.Flags);
		}

		public void vrangepd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vrangepd_xmm_k1z_xmm_xmmm128b64_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags);
		}

		public void vrangepd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vrangepd_ymm_k1z_ymm_ymmm256b64_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags);
		}

		public void vrangepd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vrangepd_zmm_k1z_zmm_zmmm512b64_imm8_sae, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vrangepd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vrangepd_xmm_k1z_xmm_xmmm128b64_imm8, register, register2, in memory, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vrangepd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vrangepd_ymm_k1z_ymm_ymmm256b64_imm8, register, register2, in memory, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vrangepd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vrangepd_zmm_k1z_zmm_zmmm512b64_imm8_sae, register, register2, in memory, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vrangeps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vrangeps_xmm_k1z_xmm_xmmm128b32_imm8, dst, src1, src2, imm), dst.Flags);
		}

		public void vrangeps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vrangeps_ymm_k1z_ymm_ymmm256b32_imm8, dst, src1, src2, imm), dst.Flags);
		}

		public void vrangeps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vrangeps_zmm_k1z_zmm_zmmm512b32_imm8_sae, dst, src1, src2, imm), dst.Flags | src2.Flags);
		}

		public void vrangeps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vrangeps_xmm_k1z_xmm_xmmm128b32_imm8, register, register2, in memory, imm), dst.Flags | src2.Flags);
		}

		public void vrangeps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vrangeps_ymm_k1z_ymm_ymmm256b32_imm8, register, register2, in memory, imm), dst.Flags | src2.Flags);
		}

		public void vrangeps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vrangeps_zmm_k1z_zmm_zmmm512b32_imm8_sae, register, register2, in memory, imm), dst.Flags | src2.Flags);
		}

		public void vrangeps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vrangeps_xmm_k1z_xmm_xmmm128b32_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags);
		}

		public void vrangeps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vrangeps_ymm_k1z_ymm_ymmm256b32_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags);
		}

		public void vrangeps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vrangeps_zmm_k1z_zmm_zmmm512b32_imm8_sae, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vrangeps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vrangeps_xmm_k1z_xmm_xmmm128b32_imm8, register, register2, in memory, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vrangeps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vrangeps_ymm_k1z_ymm_ymmm256b32_imm8, register, register2, in memory, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vrangeps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vrangeps_zmm_k1z_zmm_zmmm512b32_imm8_sae, register, register2, in memory, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vrangesd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vrangesd_xmm_k1z_xmm_xmmm64_imm8_sae, dst, src1, src2, imm), dst.Flags | src2.Flags);
		}

		public void vrangesd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vrangesd_xmm_k1z_xmm_xmmm64_imm8_sae, register, register2, in memory, imm), dst.Flags | src2.Flags);
		}

		public void vrangesd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vrangesd_xmm_k1z_xmm_xmmm64_imm8_sae, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vrangesd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vrangesd_xmm_k1z_xmm_xmmm64_imm8_sae, register, register2, in memory, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vrangess(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vrangess_xmm_k1z_xmm_xmmm32_imm8_sae, dst, src1, src2, imm), dst.Flags | src2.Flags);
		}

		public void vrangess(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vrangess_xmm_k1z_xmm_xmmm32_imm8_sae, register, register2, in memory, imm), dst.Flags | src2.Flags);
		}

		public void vrangess(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vrangess_xmm_k1z_xmm_xmmm32_imm8_sae, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vrangess(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vrangess_xmm_k1z_xmm_xmmm32_imm8_sae, register, register2, in memory, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vrcp14pd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vrcp14pd_xmm_k1z_xmmm128b64, dst, src), dst.Flags);
		}

		public void vrcp14pd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vrcp14pd_ymm_k1z_ymmm256b64, dst, src), dst.Flags);
		}

		public void vrcp14pd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vrcp14pd_zmm_k1z_zmmm512b64, dst, src), dst.Flags);
		}

		public void vrcp14pd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vrcp14pd_xmm_k1z_xmmm128b64, register, in memory), dst.Flags | src.Flags);
		}

		public void vrcp14pd(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vrcp14pd_ymm_k1z_ymmm256b64, register, in memory), dst.Flags | src.Flags);
		}

		public void vrcp14pd(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vrcp14pd_zmm_k1z_zmmm512b64, register, in memory), dst.Flags | src.Flags);
		}

		public void vrcp14ps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vrcp14ps_xmm_k1z_xmmm128b32, dst, src), dst.Flags);
		}

		public void vrcp14ps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vrcp14ps_ymm_k1z_ymmm256b32, dst, src), dst.Flags);
		}

		public void vrcp14ps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vrcp14ps_zmm_k1z_zmmm512b32, dst, src), dst.Flags);
		}

		public void vrcp14ps(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vrcp14ps_xmm_k1z_xmmm128b32, register, in memory), dst.Flags | src.Flags);
		}

		public void vrcp14ps(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vrcp14ps_ymm_k1z_ymmm256b32, register, in memory), dst.Flags | src.Flags);
		}

		public void vrcp14ps(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vrcp14ps_zmm_k1z_zmmm512b32, register, in memory), dst.Flags | src.Flags);
		}

		public void vrcp14sd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vrcp14sd_xmm_k1z_xmm_xmmm64, dst, src1, src2), dst.Flags);
		}

		public void vrcp14sd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vrcp14sd_xmm_k1z_xmm_xmmm64, register, register2, in memory), dst.Flags);
		}

		public void vrcp14ss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vrcp14ss_xmm_k1z_xmm_xmmm32, dst, src1, src2), dst.Flags);
		}

		public void vrcp14ss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vrcp14ss_xmm_k1z_xmm_xmmm32, register, register2, in memory), dst.Flags);
		}

		public void vrcp28pd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vrcp28pd_zmm_k1z_zmmm512b64_sae, dst, src), dst.Flags | src.Flags);
		}

		public void vrcp28pd(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vrcp28pd_zmm_k1z_zmmm512b64_sae, register, in memory), dst.Flags | src.Flags);
		}

		public void vrcp28ps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vrcp28ps_zmm_k1z_zmmm512b32_sae, dst, src), dst.Flags | src.Flags);
		}

		public void vrcp28ps(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vrcp28ps_zmm_k1z_zmmm512b32_sae, register, in memory), dst.Flags | src.Flags);
		}

		public void vrcp28sd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vrcp28sd_xmm_k1z_xmm_xmmm64_sae, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vrcp28sd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vrcp28sd_xmm_k1z_xmm_xmmm64_sae, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vrcp28ss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vrcp28ss_xmm_k1z_xmm_xmmm32_sae, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vrcp28ss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vrcp28ss_xmm_k1z_xmm_xmmm32_sae, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vrcpph(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vrcpph_xmm_k1z_xmmm128b16, dst, src), dst.Flags);
		}

		public void vrcpph(AssemblerRegisterYMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vrcpph_ymm_k1z_ymmm256b16, dst, src), dst.Flags);
		}

		public void vrcpph(AssemblerRegisterZMM dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vrcpph_zmm_k1z_zmmm512b16, dst, src), dst.Flags);
		}

		public void vrcpph(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vrcpph_xmm_k1z_xmmm128b16, register, in memory), dst.Flags | src.Flags);
		}

		public void vrcpph(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vrcpph_ymm_k1z_ymmm256b16, register, in memory), dst.Flags | src.Flags);
		}

		public void vrcpph(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vrcpph_zmm_k1z_zmmm512b16, register, in memory), dst.Flags | src.Flags);
		}

		public void vrcpps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vrcpps_xmm_xmmm128, dst, src));
		}

		public void vrcpps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vrcpps_ymm_ymmm256, dst, src));
		}

		public void vrcpps(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vrcpps_xmm_xmmm128, register, in memory));
		}

		public void vrcpps(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vrcpps_ymm_ymmm256, register, in memory));
		}

		public void vrcpsh(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vrcpsh_xmm_k1z_xmm_xmmm16, dst, src1, src2), dst.Flags);
		}

		public void vrcpsh(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vrcpsh_xmm_k1z_xmm_xmmm16, register, register2, in memory), dst.Flags);
		}

		public void vrcpss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vrcpss_xmm_xmm_xmmm32, dst, src1, src2));
		}

		public void vrcpss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vrcpss_xmm_xmm_xmmm32, register, register2, in memory));
		}

		public void vreducepd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vreducepd_xmm_k1z_xmmm128b64_imm8, dst, src1, imm), dst.Flags);
		}

		public void vreducepd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vreducepd_ymm_k1z_ymmm256b64_imm8, dst, src1, imm), dst.Flags);
		}

		public void vreducepd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vreducepd_zmm_k1z_zmmm512b64_imm8_sae, dst, src1, imm), dst.Flags | src1.Flags);
		}

		public void vreducepd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vreducepd_xmm_k1z_xmmm128b64_imm8, register, in memory, imm), dst.Flags | src1.Flags);
		}

		public void vreducepd(AssemblerRegisterYMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vreducepd_ymm_k1z_ymmm256b64_imm8, register, in memory, imm), dst.Flags | src1.Flags);
		}

		public void vreducepd(AssemblerRegisterZMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vreducepd_zmm_k1z_zmmm512b64_imm8_sae, register, in memory, imm), dst.Flags | src1.Flags);
		}

		public void vreducepd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vreducepd_xmm_k1z_xmmm128b64_imm8, (Register)dst, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vreducepd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vreducepd_ymm_k1z_ymmm256b64_imm8, (Register)dst, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vreducepd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vreducepd_zmm_k1z_zmmm512b64_imm8_sae, (Register)dst, (Register)src1, (uint)imm), dst.Flags | src1.Flags);
		}

		public void vreducepd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vreducepd_xmm_k1z_xmmm128b64_imm8, register, in memory, (uint)imm), dst.Flags | src1.Flags);
		}

		public void vreducepd(AssemblerRegisterYMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vreducepd_ymm_k1z_ymmm256b64_imm8, register, in memory, (uint)imm), dst.Flags | src1.Flags);
		}

		public void vreducepd(AssemblerRegisterZMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vreducepd_zmm_k1z_zmmm512b64_imm8_sae, register, in memory, (uint)imm), dst.Flags | src1.Flags);
		}

		public void vreduceph(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vreduceph_xmm_k1z_xmmm128b16_imm8, dst, src1, imm), dst.Flags);
		}

		public void vreduceph(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vreduceph_ymm_k1z_ymmm256b16_imm8, dst, src1, imm), dst.Flags);
		}

		public void vreduceph(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vreduceph_zmm_k1z_zmmm512b16_imm8_sae, dst, src1, imm), dst.Flags | src1.Flags);
		}

		public void vreduceph(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vreduceph_xmm_k1z_xmmm128b16_imm8, register, in memory, imm), dst.Flags | src1.Flags);
		}

		public void vreduceph(AssemblerRegisterYMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vreduceph_ymm_k1z_ymmm256b16_imm8, register, in memory, imm), dst.Flags | src1.Flags);
		}

		public void vreduceph(AssemblerRegisterZMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vreduceph_zmm_k1z_zmmm512b16_imm8_sae, register, in memory, imm), dst.Flags | src1.Flags);
		}

		public void vreduceph(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vreduceph_xmm_k1z_xmmm128b16_imm8, (Register)dst, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vreduceph(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vreduceph_ymm_k1z_ymmm256b16_imm8, (Register)dst, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vreduceph(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vreduceph_zmm_k1z_zmmm512b16_imm8_sae, (Register)dst, (Register)src1, (uint)imm), dst.Flags | src1.Flags);
		}

		public void vreduceph(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vreduceph_xmm_k1z_xmmm128b16_imm8, register, in memory, (uint)imm), dst.Flags | src1.Flags);
		}

		public void vreduceph(AssemblerRegisterYMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vreduceph_ymm_k1z_ymmm256b16_imm8, register, in memory, (uint)imm), dst.Flags | src1.Flags);
		}

		public void vreduceph(AssemblerRegisterZMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vreduceph_zmm_k1z_zmmm512b16_imm8_sae, register, in memory, (uint)imm), dst.Flags | src1.Flags);
		}

		public void vreduceps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vreduceps_xmm_k1z_xmmm128b32_imm8, dst, src1, imm), dst.Flags);
		}

		public void vreduceps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vreduceps_ymm_k1z_ymmm256b32_imm8, dst, src1, imm), dst.Flags);
		}

		public void vreduceps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vreduceps_zmm_k1z_zmmm512b32_imm8_sae, dst, src1, imm), dst.Flags | src1.Flags);
		}

		public void vreduceps(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vreduceps_xmm_k1z_xmmm128b32_imm8, register, in memory, imm), dst.Flags | src1.Flags);
		}

		public void vreduceps(AssemblerRegisterYMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vreduceps_ymm_k1z_ymmm256b32_imm8, register, in memory, imm), dst.Flags | src1.Flags);
		}

		public void vreduceps(AssemblerRegisterZMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vreduceps_zmm_k1z_zmmm512b32_imm8_sae, register, in memory, imm), dst.Flags | src1.Flags);
		}

		public void vreduceps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vreduceps_xmm_k1z_xmmm128b32_imm8, (Register)dst, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vreduceps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vreduceps_ymm_k1z_ymmm256b32_imm8, (Register)dst, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vreduceps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vreduceps_zmm_k1z_zmmm512b32_imm8_sae, (Register)dst, (Register)src1, (uint)imm), dst.Flags | src1.Flags);
		}

		public void vreduceps(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vreduceps_xmm_k1z_xmmm128b32_imm8, register, in memory, (uint)imm), dst.Flags | src1.Flags);
		}

		public void vreduceps(AssemblerRegisterYMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vreduceps_ymm_k1z_ymmm256b32_imm8, register, in memory, (uint)imm), dst.Flags | src1.Flags);
		}

		public void vreduceps(AssemblerRegisterZMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vreduceps_zmm_k1z_zmmm512b32_imm8_sae, register, in memory, (uint)imm), dst.Flags | src1.Flags);
		}

		public void vreducesd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vreducesd_xmm_k1z_xmm_xmmm64_imm8_sae, dst, src1, src2, imm), dst.Flags | src2.Flags);
		}

		public void vreducesd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vreducesd_xmm_k1z_xmm_xmmm64_imm8_sae, register, register2, in memory, imm), dst.Flags | src2.Flags);
		}

		public void vreducesd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vreducesd_xmm_k1z_xmm_xmmm64_imm8_sae, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vreducesd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vreducesd_xmm_k1z_xmm_xmmm64_imm8_sae, register, register2, in memory, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vreducesh(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vreducesh_xmm_k1z_xmm_xmmm16_imm8_sae, dst, src1, src2, imm), dst.Flags | src2.Flags);
		}

		public void vreducesh(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vreducesh_xmm_k1z_xmm_xmmm16_imm8_sae, register, register2, in memory, imm), dst.Flags | src2.Flags);
		}

		public void vreducesh(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vreducesh_xmm_k1z_xmm_xmmm16_imm8_sae, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vreducesh(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vreducesh_xmm_k1z_xmm_xmmm16_imm8_sae, register, register2, in memory, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vreducess(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vreducess_xmm_k1z_xmm_xmmm32_imm8_sae, dst, src1, src2, imm), dst.Flags | src2.Flags);
		}

		public void vreducess(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vreducess_xmm_k1z_xmm_xmmm32_imm8_sae, register, register2, in memory, imm), dst.Flags | src2.Flags);
		}

		public void vreducess(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vreducess_xmm_k1z_xmm_xmmm32_imm8_sae, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vreducess(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vreducess_xmm_k1z_xmm_xmmm32_imm8_sae, register, register2, in memory, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vrndscalepd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vrndscalepd_xmm_k1z_xmmm128b64_imm8, dst, src1, imm), dst.Flags);
		}

		public void vrndscalepd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vrndscalepd_ymm_k1z_ymmm256b64_imm8, dst, src1, imm), dst.Flags);
		}

		public void vrndscalepd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vrndscalepd_zmm_k1z_zmmm512b64_imm8_sae, dst, src1, imm), dst.Flags | src1.Flags);
		}

		public void vrndscalepd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vrndscalepd_xmm_k1z_xmmm128b64_imm8, register, in memory, imm), dst.Flags | src1.Flags);
		}

		public void vrndscalepd(AssemblerRegisterYMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vrndscalepd_ymm_k1z_ymmm256b64_imm8, register, in memory, imm), dst.Flags | src1.Flags);
		}

		public void vrndscalepd(AssemblerRegisterZMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vrndscalepd_zmm_k1z_zmmm512b64_imm8_sae, register, in memory, imm), dst.Flags | src1.Flags);
		}

		public void vrndscalepd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vrndscalepd_xmm_k1z_xmmm128b64_imm8, (Register)dst, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vrndscalepd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vrndscalepd_ymm_k1z_ymmm256b64_imm8, (Register)dst, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vrndscalepd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vrndscalepd_zmm_k1z_zmmm512b64_imm8_sae, (Register)dst, (Register)src1, (uint)imm), dst.Flags | src1.Flags);
		}

		public void vrndscalepd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vrndscalepd_xmm_k1z_xmmm128b64_imm8, register, in memory, (uint)imm), dst.Flags | src1.Flags);
		}

		public void vrndscalepd(AssemblerRegisterYMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vrndscalepd_ymm_k1z_ymmm256b64_imm8, register, in memory, (uint)imm), dst.Flags | src1.Flags);
		}

		public void vrndscalepd(AssemblerRegisterZMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vrndscalepd_zmm_k1z_zmmm512b64_imm8_sae, register, in memory, (uint)imm), dst.Flags | src1.Flags);
		}

		public void vrndscaleph(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vrndscaleph_xmm_k1z_xmmm128b16_imm8, dst, src1, imm), dst.Flags);
		}

		public void vrndscaleph(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vrndscaleph_ymm_k1z_ymmm256b16_imm8, dst, src1, imm), dst.Flags);
		}

		public void vrndscaleph(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vrndscaleph_zmm_k1z_zmmm512b16_imm8_sae, dst, src1, imm), dst.Flags | src1.Flags);
		}

		public void vrndscaleph(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vrndscaleph_xmm_k1z_xmmm128b16_imm8, register, in memory, imm), dst.Flags | src1.Flags);
		}

		public void vrndscaleph(AssemblerRegisterYMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vrndscaleph_ymm_k1z_ymmm256b16_imm8, register, in memory, imm), dst.Flags | src1.Flags);
		}

		public void vrndscaleph(AssemblerRegisterZMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vrndscaleph_zmm_k1z_zmmm512b16_imm8_sae, register, in memory, imm), dst.Flags | src1.Flags);
		}

		public void vrndscaleph(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vrndscaleph_xmm_k1z_xmmm128b16_imm8, (Register)dst, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vrndscaleph(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vrndscaleph_ymm_k1z_ymmm256b16_imm8, (Register)dst, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vrndscaleph(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vrndscaleph_zmm_k1z_zmmm512b16_imm8_sae, (Register)dst, (Register)src1, (uint)imm), dst.Flags | src1.Flags);
		}

		public void vrndscaleph(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vrndscaleph_xmm_k1z_xmmm128b16_imm8, register, in memory, (uint)imm), dst.Flags | src1.Flags);
		}

		public void vrndscaleph(AssemblerRegisterYMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vrndscaleph_ymm_k1z_ymmm256b16_imm8, register, in memory, (uint)imm), dst.Flags | src1.Flags);
		}

		public void vrndscaleph(AssemblerRegisterZMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vrndscaleph_zmm_k1z_zmmm512b16_imm8_sae, register, in memory, (uint)imm), dst.Flags | src1.Flags);
		}

		public void vrndscaleps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vrndscaleps_xmm_k1z_xmmm128b32_imm8, dst, src1, imm), dst.Flags);
		}

		public void vrndscaleps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vrndscaleps_ymm_k1z_ymmm256b32_imm8, dst, src1, imm), dst.Flags);
		}

		public void vrndscaleps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vrndscaleps_zmm_k1z_zmmm512b32_imm8_sae, dst, src1, imm), dst.Flags | src1.Flags);
		}

		public void vrndscaleps(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vrndscaleps_xmm_k1z_xmmm128b32_imm8, register, in memory, imm), dst.Flags | src1.Flags);
		}

		public void vrndscaleps(AssemblerRegisterYMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vrndscaleps_ymm_k1z_ymmm256b32_imm8, register, in memory, imm), dst.Flags | src1.Flags);
		}

		public void vrndscaleps(AssemblerRegisterZMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vrndscaleps_zmm_k1z_zmmm512b32_imm8_sae, register, in memory, imm), dst.Flags | src1.Flags);
		}

		public void vrndscaleps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vrndscaleps_xmm_k1z_xmmm128b32_imm8, (Register)dst, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vrndscaleps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vrndscaleps_ymm_k1z_ymmm256b32_imm8, (Register)dst, (Register)src1, (uint)imm), dst.Flags);
		}

		public void vrndscaleps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vrndscaleps_zmm_k1z_zmmm512b32_imm8_sae, (Register)dst, (Register)src1, (uint)imm), dst.Flags | src1.Flags);
		}

		public void vrndscaleps(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vrndscaleps_xmm_k1z_xmmm128b32_imm8, register, in memory, (uint)imm), dst.Flags | src1.Flags);
		}

		public void vrndscaleps(AssemblerRegisterYMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vrndscaleps_ymm_k1z_ymmm256b32_imm8, register, in memory, (uint)imm), dst.Flags | src1.Flags);
		}

		public void vrndscaleps(AssemblerRegisterZMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vrndscaleps_zmm_k1z_zmmm512b32_imm8_sae, register, in memory, (uint)imm), dst.Flags | src1.Flags);
		}

		public void vrndscalesd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vrndscalesd_xmm_k1z_xmm_xmmm64_imm8_sae, dst, src1, src2, imm), dst.Flags | src2.Flags);
		}

		public void vrndscalesd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vrndscalesd_xmm_k1z_xmm_xmmm64_imm8_sae, register, register2, in memory, imm), dst.Flags | src2.Flags);
		}

		public void vrndscalesd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vrndscalesd_xmm_k1z_xmm_xmmm64_imm8_sae, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vrndscalesd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vrndscalesd_xmm_k1z_xmm_xmmm64_imm8_sae, register, register2, in memory, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vrndscalesh(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vrndscalesh_xmm_k1z_xmm_xmmm16_imm8_sae, dst, src1, src2, imm), dst.Flags | src2.Flags);
		}

		public void vrndscalesh(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vrndscalesh_xmm_k1z_xmm_xmmm16_imm8_sae, register, register2, in memory, imm), dst.Flags | src2.Flags);
		}

		public void vrndscalesh(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vrndscalesh_xmm_k1z_xmm_xmmm16_imm8_sae, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vrndscalesh(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vrndscalesh_xmm_k1z_xmm_xmmm16_imm8_sae, register, register2, in memory, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vrndscaless(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vrndscaless_xmm_k1z_xmm_xmmm32_imm8_sae, dst, src1, src2, imm), dst.Flags | src2.Flags);
		}

		public void vrndscaless(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vrndscaless_xmm_k1z_xmm_xmmm32_imm8_sae, register, register2, in memory, imm), dst.Flags | src2.Flags);
		}

		public void vrndscaless(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vrndscaless_xmm_k1z_xmm_xmmm32_imm8_sae, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vrndscaless(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vrndscaless_xmm_k1z_xmm_xmmm32_imm8_sae, register, register2, in memory, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vroundpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vroundpd_xmm_xmmm128_imm8, dst, src1, imm));
		}

		public void vroundpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vroundpd_ymm_ymmm256_imm8, dst, src1, imm));
		}

		public void vroundpd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vroundpd_xmm_xmmm128_imm8, register, in memory, imm));
		}

		public void vroundpd(AssemblerRegisterYMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vroundpd_ymm_ymmm256_imm8, register, in memory, imm));
		}

		public void vroundpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vroundpd_xmm_xmmm128_imm8, (Register)dst, (Register)src1, (uint)imm));
		}

		public void vroundpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vroundpd_ymm_ymmm256_imm8, (Register)dst, (Register)src1, (uint)imm));
		}

		public void vroundpd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vroundpd_xmm_xmmm128_imm8, register, in memory, (uint)imm));
		}

		public void vroundpd(AssemblerRegisterYMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vroundpd_ymm_ymmm256_imm8, register, in memory, (uint)imm));
		}

		public void vroundps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vroundps_xmm_xmmm128_imm8, dst, src1, imm));
		}

		public void vroundps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vroundps_ymm_ymmm256_imm8, dst, src1, imm));
		}

		public void vroundps(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vroundps_xmm_xmmm128_imm8, register, in memory, imm));
		}

		public void vroundps(AssemblerRegisterYMM dst, AssemblerMemoryOperand src1, sbyte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vroundps_ymm_ymmm256_imm8, register, in memory, imm));
		}

		public void vroundps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vroundps_xmm_xmmm128_imm8, (Register)dst, (Register)src1, (uint)imm));
		}

		public void vroundps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, byte imm)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vroundps_ymm_ymmm256_imm8, (Register)dst, (Register)src1, (uint)imm));
		}

		public void vroundps(AssemblerRegisterXMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vroundps_xmm_xmmm128_imm8, register, in memory, (uint)imm));
		}

		public void vroundps(AssemblerRegisterYMM dst, AssemblerMemoryOperand src1, byte imm)
		{
			Register register = dst;
			MemoryOperand memory = src1.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vroundps_ymm_ymmm256_imm8, register, in memory, (uint)imm));
		}

		public void vroundsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vroundsd_xmm_xmm_xmmm64_imm8, dst, src1, src2, imm));
		}

		public void vroundsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vroundsd_xmm_xmm_xmmm64_imm8, register, register2, in memory, imm));
		}

		public void vroundsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vroundsd_xmm_xmm_xmmm64_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm));
		}

		public void vroundsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vroundsd_xmm_xmm_xmmm64_imm8, register, register2, in memory, (uint)imm));
		}

		public void vroundss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vroundss_xmm_xmm_xmmm32_imm8, dst, src1, src2, imm));
		}

		public void vroundss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vroundss_xmm_xmm_xmmm32_imm8, register, register2, in memory, imm));
		}

		public void vroundss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vroundss_xmm_xmm_xmmm32_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm));
		}

		public void vroundss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vroundss_xmm_xmm_xmmm32_imm8, register, register2, in memory, (uint)imm));
		}

		public void vrsqrt14pd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vrsqrt14pd_xmm_k1z_xmmm128b64, dst, src), dst.Flags);
		}

		public void vrsqrt14pd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vrsqrt14pd_ymm_k1z_ymmm256b64, dst, src), dst.Flags);
		}

		public void vrsqrt14pd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vrsqrt14pd_zmm_k1z_zmmm512b64, dst, src), dst.Flags);
		}

		public void vrsqrt14pd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vrsqrt14pd_xmm_k1z_xmmm128b64, register, in memory), dst.Flags | src.Flags);
		}

		public void vrsqrt14pd(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vrsqrt14pd_ymm_k1z_ymmm256b64, register, in memory), dst.Flags | src.Flags);
		}

		public void vrsqrt14pd(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vrsqrt14pd_zmm_k1z_zmmm512b64, register, in memory), dst.Flags | src.Flags);
		}

		public void vrsqrt14ps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vrsqrt14ps_xmm_k1z_xmmm128b32, dst, src), dst.Flags);
		}

		public void vrsqrt14ps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vrsqrt14ps_ymm_k1z_ymmm256b32, dst, src), dst.Flags);
		}

		public void vrsqrt14ps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vrsqrt14ps_zmm_k1z_zmmm512b32, dst, src), dst.Flags);
		}

		public void vrsqrt14ps(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vrsqrt14ps_xmm_k1z_xmmm128b32, register, in memory), dst.Flags | src.Flags);
		}

		public void vrsqrt14ps(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vrsqrt14ps_ymm_k1z_ymmm256b32, register, in memory), dst.Flags | src.Flags);
		}

		public void vrsqrt14ps(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vrsqrt14ps_zmm_k1z_zmmm512b32, register, in memory), dst.Flags | src.Flags);
		}

		public void vrsqrt14sd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vrsqrt14sd_xmm_k1z_xmm_xmmm64, dst, src1, src2), dst.Flags);
		}

		public void vrsqrt14sd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vrsqrt14sd_xmm_k1z_xmm_xmmm64, register, register2, in memory), dst.Flags);
		}

		public void vrsqrt14ss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vrsqrt14ss_xmm_k1z_xmm_xmmm32, dst, src1, src2), dst.Flags);
		}

		public void vrsqrt14ss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vrsqrt14ss_xmm_k1z_xmm_xmmm32, register, register2, in memory), dst.Flags);
		}

		public void vrsqrt28pd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vrsqrt28pd_zmm_k1z_zmmm512b64_sae, dst, src), dst.Flags | src.Flags);
		}

		public void vrsqrt28pd(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vrsqrt28pd_zmm_k1z_zmmm512b64_sae, register, in memory), dst.Flags | src.Flags);
		}

		public void vrsqrt28ps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vrsqrt28ps_zmm_k1z_zmmm512b32_sae, dst, src), dst.Flags | src.Flags);
		}

		public void vrsqrt28ps(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vrsqrt28ps_zmm_k1z_zmmm512b32_sae, register, in memory), dst.Flags | src.Flags);
		}

		public void vrsqrt28sd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vrsqrt28sd_xmm_k1z_xmm_xmmm64_sae, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vrsqrt28sd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vrsqrt28sd_xmm_k1z_xmm_xmmm64_sae, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vrsqrt28ss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vrsqrt28ss_xmm_k1z_xmm_xmmm32_sae, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vrsqrt28ss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vrsqrt28ss_xmm_k1z_xmm_xmmm32_sae, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vrsqrtph(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vrsqrtph_xmm_k1z_xmmm128b16, dst, src), dst.Flags);
		}

		public void vrsqrtph(AssemblerRegisterYMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vrsqrtph_ymm_k1z_ymmm256b16, dst, src), dst.Flags);
		}

		public void vrsqrtph(AssemblerRegisterZMM dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vrsqrtph_zmm_k1z_zmmm512b16, dst, src), dst.Flags);
		}

		public void vrsqrtph(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vrsqrtph_xmm_k1z_xmmm128b16, register, in memory), dst.Flags | src.Flags);
		}

		public void vrsqrtph(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vrsqrtph_ymm_k1z_ymmm256b16, register, in memory), dst.Flags | src.Flags);
		}

		public void vrsqrtph(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vrsqrtph_zmm_k1z_zmmm512b16, register, in memory), dst.Flags | src.Flags);
		}

		public void vrsqrtps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vrsqrtps_xmm_xmmm128, dst, src));
		}

		public void vrsqrtps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vrsqrtps_ymm_ymmm256, dst, src));
		}

		public void vrsqrtps(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vrsqrtps_xmm_xmmm128, register, in memory));
		}

		public void vrsqrtps(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vrsqrtps_ymm_ymmm256, register, in memory));
		}

		public void vrsqrtsh(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vrsqrtsh_xmm_k1z_xmm_xmmm16, dst, src1, src2), dst.Flags);
		}

		public void vrsqrtsh(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vrsqrtsh_xmm_k1z_xmm_xmmm16, register, register2, in memory), dst.Flags);
		}

		public void vrsqrtss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vrsqrtss_xmm_xmm_xmmm32, dst, src1, src2));
		}

		public void vrsqrtss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vrsqrtss_xmm_xmm_xmmm32, register, register2, in memory));
		}

		public void vscalefpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vscalefpd_xmm_k1z_xmm_xmmm128b64, dst, src1, src2), dst.Flags);
		}

		public void vscalefpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vscalefpd_ymm_k1z_ymm_ymmm256b64, dst, src1, src2), dst.Flags);
		}

		public void vscalefpd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vscalefpd_zmm_k1z_zmm_zmmm512b64_er, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vscalefpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vscalefpd_xmm_k1z_xmm_xmmm128b64, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vscalefpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vscalefpd_ymm_k1z_ymm_ymmm256b64, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vscalefpd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vscalefpd_zmm_k1z_zmm_zmmm512b64_er, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vscalefph(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vscalefph_xmm_k1z_xmm_xmmm128b16, dst, src1, src2), dst.Flags);
		}

		public void vscalefph(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vscalefph_ymm_k1z_ymm_ymmm256b16, dst, src1, src2), dst.Flags);
		}

		public void vscalefph(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vscalefph_zmm_k1z_zmm_zmmm512b16_er, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vscalefph(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vscalefph_xmm_k1z_xmm_xmmm128b16, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vscalefph(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vscalefph_ymm_k1z_ymm_ymmm256b16, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vscalefph(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vscalefph_zmm_k1z_zmm_zmmm512b16_er, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vscalefps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vscalefps_xmm_k1z_xmm_xmmm128b32, dst, src1, src2), dst.Flags);
		}

		public void vscalefps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vscalefps_ymm_k1z_ymm_ymmm256b32, dst, src1, src2), dst.Flags);
		}

		public void vscalefps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vscalefps_zmm_k1z_zmm_zmmm512b32_er, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vscalefps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vscalefps_xmm_k1z_xmm_xmmm128b32, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vscalefps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vscalefps_ymm_k1z_ymm_ymmm256b32, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vscalefps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vscalefps_zmm_k1z_zmm_zmmm512b32_er, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vscalefsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vscalefsd_xmm_k1z_xmm_xmmm64_er, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vscalefsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vscalefsd_xmm_k1z_xmm_xmmm64_er, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vscalefsh(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vscalefsh_xmm_k1z_xmm_xmmm16_er, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vscalefsh(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vscalefsh_xmm_k1z_xmm_xmmm16_er, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vscalefss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vscalefss_xmm_k1z_xmm_xmmm32_er, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vscalefss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vscalefss_xmm_k1z_xmm_xmmm32_er, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vscatterdpd(AssemblerMemoryOperand dst, AssemblerRegisterXMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vscatterdpd_vm32x_k1_xmm, in memory, src), dst.Flags);
		}

		public void vscatterdpd(AssemblerMemoryOperand dst, AssemblerRegisterYMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vscatterdpd_vm32x_k1_ymm, in memory, src), dst.Flags);
		}

		public void vscatterdpd(AssemblerMemoryOperand dst, AssemblerRegisterZMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vscatterdpd_vm32y_k1_zmm, in memory, src), dst.Flags);
		}

		public void vscatterdps(AssemblerMemoryOperand dst, AssemblerRegisterXMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vscatterdps_vm32x_k1_xmm, in memory, src), dst.Flags);
		}

		public void vscatterdps(AssemblerMemoryOperand dst, AssemblerRegisterYMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vscatterdps_vm32y_k1_ymm, in memory, src), dst.Flags);
		}

		public void vscatterdps(AssemblerMemoryOperand dst, AssemblerRegisterZMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vscatterdps_vm32z_k1_zmm, in memory, src), dst.Flags);
		}

		public void vscatterpf0dpd(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vscatterpf0dpd_vm32y_k1, in memory), dst.Flags);
		}

		public void vscatterpf0dps(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vscatterpf0dps_vm32z_k1, in memory), dst.Flags);
		}

		public void vscatterpf0qpd(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vscatterpf0qpd_vm64z_k1, in memory), dst.Flags);
		}

		public void vscatterpf0qps(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vscatterpf0qps_vm64z_k1, in memory), dst.Flags);
		}

		public void vscatterpf1dpd(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vscatterpf1dpd_vm32y_k1, in memory), dst.Flags);
		}

		public void vscatterpf1dps(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vscatterpf1dps_vm32z_k1, in memory), dst.Flags);
		}

		public void vscatterpf1qpd(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vscatterpf1qpd_vm64z_k1, in memory), dst.Flags);
		}

		public void vscatterpf1qps(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vscatterpf1qps_vm64z_k1, in memory), dst.Flags);
		}

		public void vscatterqpd(AssemblerMemoryOperand dst, AssemblerRegisterXMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vscatterqpd_vm64x_k1_xmm, in memory, src), dst.Flags);
		}

		public void vscatterqpd(AssemblerMemoryOperand dst, AssemblerRegisterYMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vscatterqpd_vm64y_k1_ymm, in memory, src), dst.Flags);
		}

		public void vscatterqpd(AssemblerMemoryOperand dst, AssemblerRegisterZMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vscatterqpd_vm64z_k1_zmm, in memory, src), dst.Flags);
		}

		public void vscatterqps(AssemblerMemoryOperand dst, AssemblerRegisterXMM src)
		{
			Code code;
			if (dst.Index.IsXMM())
			{
				code = Code.EVEX_Vscatterqps_vm64x_k1_xmm;
			}
			else
			{
				if (!dst.Index.IsYMM())
				{
					throw NoOpCodeFoundFor(Mnemonic.Vscatterqps, dst, src);
				}
				code = Code.EVEX_Vscatterqps_vm64y_k1_xmm;
			}
			Code code2 = code;
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, in memory, src), dst.Flags);
		}

		public void vscatterqps(AssemblerMemoryOperand dst, AssemblerRegisterYMM src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vscatterqps_vm64z_k1_ymm, in memory, src), dst.Flags);
		}

		public void vshuff32x4(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vshuff32x4_ymm_k1z_ymm_ymmm256b32_imm8, dst, src1, src2, imm), dst.Flags);
		}

		public void vshuff32x4(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vshuff32x4_zmm_k1z_zmm_zmmm512b32_imm8, dst, src1, src2, imm), dst.Flags);
		}

		public void vshuff32x4(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vshuff32x4_ymm_k1z_ymm_ymmm256b32_imm8, register, register2, in memory, imm), dst.Flags | src2.Flags);
		}

		public void vshuff32x4(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vshuff32x4_zmm_k1z_zmm_zmmm512b32_imm8, register, register2, in memory, imm), dst.Flags | src2.Flags);
		}

		public void vshuff32x4(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vshuff32x4_ymm_k1z_ymm_ymmm256b32_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags);
		}

		public void vshuff32x4(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vshuff32x4_zmm_k1z_zmm_zmmm512b32_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags);
		}

		public void vshuff32x4(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vshuff32x4_ymm_k1z_ymm_ymmm256b32_imm8, register, register2, in memory, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vshuff32x4(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vshuff32x4_zmm_k1z_zmm_zmmm512b32_imm8, register, register2, in memory, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vshuff64x2(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vshuff64x2_ymm_k1z_ymm_ymmm256b64_imm8, dst, src1, src2, imm), dst.Flags);
		}

		public void vshuff64x2(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vshuff64x2_zmm_k1z_zmm_zmmm512b64_imm8, dst, src1, src2, imm), dst.Flags);
		}

		public void vshuff64x2(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vshuff64x2_ymm_k1z_ymm_ymmm256b64_imm8, register, register2, in memory, imm), dst.Flags | src2.Flags);
		}

		public void vshuff64x2(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vshuff64x2_zmm_k1z_zmm_zmmm512b64_imm8, register, register2, in memory, imm), dst.Flags | src2.Flags);
		}

		public void vshuff64x2(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vshuff64x2_ymm_k1z_ymm_ymmm256b64_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags);
		}

		public void vshuff64x2(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vshuff64x2_zmm_k1z_zmm_zmmm512b64_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags);
		}

		public void vshuff64x2(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vshuff64x2_ymm_k1z_ymm_ymmm256b64_imm8, register, register2, in memory, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vshuff64x2(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vshuff64x2_zmm_k1z_zmm_zmmm512b64_imm8, register, register2, in memory, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vshufi32x4(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vshufi32x4_ymm_k1z_ymm_ymmm256b32_imm8, dst, src1, src2, imm), dst.Flags);
		}

		public void vshufi32x4(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vshufi32x4_zmm_k1z_zmm_zmmm512b32_imm8, dst, src1, src2, imm), dst.Flags);
		}

		public void vshufi32x4(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vshufi32x4_ymm_k1z_ymm_ymmm256b32_imm8, register, register2, in memory, imm), dst.Flags | src2.Flags);
		}

		public void vshufi32x4(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vshufi32x4_zmm_k1z_zmm_zmmm512b32_imm8, register, register2, in memory, imm), dst.Flags | src2.Flags);
		}

		public void vshufi32x4(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vshufi32x4_ymm_k1z_ymm_ymmm256b32_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags);
		}

		public void vshufi32x4(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vshufi32x4_zmm_k1z_zmm_zmmm512b32_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags);
		}

		public void vshufi32x4(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vshufi32x4_ymm_k1z_ymm_ymmm256b32_imm8, register, register2, in memory, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vshufi32x4(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vshufi32x4_zmm_k1z_zmm_zmmm512b32_imm8, register, register2, in memory, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vshufi64x2(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vshufi64x2_ymm_k1z_ymm_ymmm256b64_imm8, dst, src1, src2, imm), dst.Flags);
		}

		public void vshufi64x2(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vshufi64x2_zmm_k1z_zmm_zmmm512b64_imm8, dst, src1, src2, imm), dst.Flags);
		}

		public void vshufi64x2(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vshufi64x2_ymm_k1z_ymm_ymmm256b64_imm8, register, register2, in memory, imm), dst.Flags | src2.Flags);
		}

		public void vshufi64x2(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vshufi64x2_zmm_k1z_zmm_zmmm512b64_imm8, register, register2, in memory, imm), dst.Flags | src2.Flags);
		}

		public void vshufi64x2(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vshufi64x2_ymm_k1z_ymm_ymmm256b64_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags);
		}

		public void vshufi64x2(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vshufi64x2_zmm_k1z_zmm_zmmm512b64_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags);
		}

		public void vshufi64x2(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vshufi64x2_ymm_k1z_ymm_ymmm256b64_imm8, register, register2, in memory, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vshufi64x2(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vshufi64x2_zmm_k1z_zmm_zmmm512b64_imm8, register, register2, in memory, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vshufpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, sbyte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vshufpd_xmm_xmm_xmmm128_imm8 : Code.EVEX_Vshufpd_xmm_k1z_xmm_xmmm128b64_imm8);
			AddInstruction(Instruction.Create(code, dst, src1, src2, imm), dst.Flags);
		}

		public void vshufpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, sbyte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vshufpd_ymm_ymm_ymmm256_imm8 : Code.EVEX_Vshufpd_ymm_k1z_ymm_ymmm256b64_imm8);
			AddInstruction(Instruction.Create(code, dst, src1, src2, imm), dst.Flags);
		}

		public void vshufpd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vshufpd_zmm_k1z_zmm_zmmm512b64_imm8, dst, src1, src2, imm), dst.Flags);
		}

		public void vshufpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vshufpd_xmm_xmm_xmmm128_imm8 : Code.EVEX_Vshufpd_xmm_k1z_xmm_xmmm128b64_imm8) : Code.EVEX_Vshufpd_xmm_k1z_xmm_xmmm128b64_imm8);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory, imm), dst.Flags | src2.Flags);
		}

		public void vshufpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vshufpd_ymm_ymm_ymmm256_imm8 : Code.EVEX_Vshufpd_ymm_k1z_ymm_ymmm256b64_imm8) : Code.EVEX_Vshufpd_ymm_k1z_ymm_ymmm256b64_imm8);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory, imm), dst.Flags | src2.Flags);
		}

		public void vshufpd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vshufpd_zmm_k1z_zmm_zmmm512b64_imm8, register, register2, in memory, imm), dst.Flags | src2.Flags);
		}

		public void vshufpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, byte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vshufpd_xmm_xmm_xmmm128_imm8 : Code.EVEX_Vshufpd_xmm_k1z_xmm_xmmm128b64_imm8);
			AddInstruction(Instruction.Create(code, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags);
		}

		public void vshufpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, byte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vshufpd_ymm_ymm_ymmm256_imm8 : Code.EVEX_Vshufpd_ymm_k1z_ymm_ymmm256b64_imm8);
			AddInstruction(Instruction.Create(code, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags);
		}

		public void vshufpd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vshufpd_zmm_k1z_zmm_zmmm512b64_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags);
		}

		public void vshufpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vshufpd_xmm_xmm_xmmm128_imm8 : Code.EVEX_Vshufpd_xmm_k1z_xmm_xmmm128b64_imm8) : Code.EVEX_Vshufpd_xmm_k1z_xmm_xmmm128b64_imm8);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vshufpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vshufpd_ymm_ymm_ymmm256_imm8 : Code.EVEX_Vshufpd_ymm_k1z_ymm_ymmm256b64_imm8) : Code.EVEX_Vshufpd_ymm_k1z_ymm_ymmm256b64_imm8);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vshufpd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vshufpd_zmm_k1z_zmm_zmmm512b64_imm8, register, register2, in memory, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vshufps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, sbyte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vshufps_xmm_xmm_xmmm128_imm8 : Code.EVEX_Vshufps_xmm_k1z_xmm_xmmm128b32_imm8);
			AddInstruction(Instruction.Create(code, dst, src1, src2, imm), dst.Flags);
		}

		public void vshufps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, sbyte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vshufps_ymm_ymm_ymmm256_imm8 : Code.EVEX_Vshufps_ymm_k1z_ymm_ymmm256b32_imm8);
			AddInstruction(Instruction.Create(code, dst, src1, src2, imm), dst.Flags);
		}

		public void vshufps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2, sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vshufps_zmm_k1z_zmm_zmmm512b32_imm8, dst, src1, src2, imm), dst.Flags);
		}

		public void vshufps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vshufps_xmm_xmm_xmmm128_imm8 : Code.EVEX_Vshufps_xmm_k1z_xmm_xmmm128b32_imm8) : Code.EVEX_Vshufps_xmm_k1z_xmm_xmmm128b32_imm8);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory, imm), dst.Flags | src2.Flags);
		}

		public void vshufps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vshufps_ymm_ymm_ymmm256_imm8 : Code.EVEX_Vshufps_ymm_k1z_ymm_ymmm256b32_imm8) : Code.EVEX_Vshufps_ymm_k1z_ymm_ymmm256b32_imm8);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory, imm), dst.Flags | src2.Flags);
		}

		public void vshufps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2, sbyte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vshufps_zmm_k1z_zmm_zmmm512b32_imm8, register, register2, in memory, imm), dst.Flags | src2.Flags);
		}

		public void vshufps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2, byte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vshufps_xmm_xmm_xmmm128_imm8 : Code.EVEX_Vshufps_xmm_k1z_xmm_xmmm128b32_imm8);
			AddInstruction(Instruction.Create(code, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags);
		}

		public void vshufps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2, byte imm)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vshufps_ymm_ymm_ymmm256_imm8 : Code.EVEX_Vshufps_ymm_k1z_ymm_ymmm256b32_imm8);
			AddInstruction(Instruction.Create(code, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags);
		}

		public void vshufps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2, byte imm)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vshufps_zmm_k1z_zmm_zmmm512b32_imm8, (Register)dst, (Register)src1, (Register)src2, (uint)imm), dst.Flags);
		}

		public void vshufps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vshufps_xmm_xmm_xmmm128_imm8 : Code.EVEX_Vshufps_xmm_k1z_xmm_xmmm128b32_imm8) : Code.EVEX_Vshufps_xmm_k1z_xmm_xmmm128b32_imm8);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vshufps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vshufps_ymm_ymm_ymmm256_imm8 : Code.EVEX_Vshufps_ymm_k1z_ymm_ymmm256b32_imm8) : Code.EVEX_Vshufps_ymm_k1z_ymm_ymmm256b32_imm8);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vshufps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2, byte imm)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vshufps_zmm_k1z_zmm_zmmm512b32_imm8, register, register2, in memory, (uint)imm), dst.Flags | src2.Flags);
		}

		public void vsqrtpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vsqrtpd_xmm_xmmm128 : Code.EVEX_Vsqrtpd_xmm_k1z_xmmm128b64);
			AddInstruction(Instruction.Create(code, dst, src), dst.Flags);
		}

		public void vsqrtpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vsqrtpd_ymm_ymmm256 : Code.EVEX_Vsqrtpd_ymm_k1z_ymmm256b64);
			AddInstruction(Instruction.Create(code, dst, src), dst.Flags);
		}

		public void vsqrtpd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vsqrtpd_zmm_k1z_zmmm512b64_er, dst, src), dst.Flags | src.Flags);
		}

		public void vsqrtpd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Code code = ((!src.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vsqrtpd_xmm_xmmm128 : Code.EVEX_Vsqrtpd_xmm_k1z_xmmm128b64) : Code.EVEX_Vsqrtpd_xmm_k1z_xmmm128b64);
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory), dst.Flags | src.Flags);
		}

		public void vsqrtpd(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Code code = ((!src.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vsqrtpd_ymm_ymmm256 : Code.EVEX_Vsqrtpd_ymm_k1z_ymmm256b64) : Code.EVEX_Vsqrtpd_ymm_k1z_ymmm256b64);
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory), dst.Flags | src.Flags);
		}

		public void vsqrtpd(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vsqrtpd_zmm_k1z_zmmm512b64_er, register, in memory), dst.Flags | src.Flags);
		}

		public void vsqrtph(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vsqrtph_xmm_k1z_xmmm128b16, dst, src), dst.Flags);
		}

		public void vsqrtph(AssemblerRegisterYMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vsqrtph_ymm_k1z_ymmm256b16, dst, src), dst.Flags);
		}

		public void vsqrtph(AssemblerRegisterZMM dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vsqrtph_zmm_k1z_zmmm512b16_er, dst, src), dst.Flags | src.Flags);
		}

		public void vsqrtph(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vsqrtph_xmm_k1z_xmmm128b16, register, in memory), dst.Flags | src.Flags);
		}

		public void vsqrtph(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vsqrtph_ymm_k1z_ymmm256b16, register, in memory), dst.Flags | src.Flags);
		}

		public void vsqrtph(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vsqrtph_zmm_k1z_zmmm512b16_er, register, in memory), dst.Flags | src.Flags);
		}

		public void vsqrtps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vsqrtps_xmm_xmmm128 : Code.EVEX_Vsqrtps_xmm_k1z_xmmm128b32);
			AddInstruction(Instruction.Create(code, dst, src), dst.Flags);
		}

		public void vsqrtps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vsqrtps_ymm_ymmm256 : Code.EVEX_Vsqrtps_ymm_k1z_ymmm256b32);
			AddInstruction(Instruction.Create(code, dst, src), dst.Flags);
		}

		public void vsqrtps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vsqrtps_zmm_k1z_zmmm512b32_er, dst, src), dst.Flags | src.Flags);
		}

		public void vsqrtps(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Code code = ((!src.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vsqrtps_xmm_xmmm128 : Code.EVEX_Vsqrtps_xmm_k1z_xmmm128b32) : Code.EVEX_Vsqrtps_xmm_k1z_xmmm128b32);
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory), dst.Flags | src.Flags);
		}

		public void vsqrtps(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Code code = ((!src.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vsqrtps_ymm_ymmm256 : Code.EVEX_Vsqrtps_ymm_k1z_ymmm256b32) : Code.EVEX_Vsqrtps_ymm_k1z_ymmm256b32);
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory), dst.Flags | src.Flags);
		}

		public void vsqrtps(AssemblerRegisterZMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vsqrtps_zmm_k1z_zmmm512b32_er, register, in memory), dst.Flags | src.Flags);
		}

		public void vsqrtsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vsqrtsd_xmm_xmm_xmmm64 : Code.EVEX_Vsqrtsd_xmm_k1z_xmm_xmmm64_er);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vsqrtsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vsqrtsd_xmm_xmm_xmmm64 : Code.EVEX_Vsqrtsd_xmm_k1z_xmm_xmmm64_er);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vsqrtsh(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vsqrtsh_xmm_k1z_xmm_xmmm16_er, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vsqrtsh(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vsqrtsh_xmm_k1z_xmm_xmmm16_er, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vsqrtss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vsqrtss_xmm_xmm_xmmm32 : Code.EVEX_Vsqrtss_xmm_k1z_xmm_xmmm32_er);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vsqrtss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vsqrtss_xmm_xmm_xmmm32 : Code.EVEX_Vsqrtss_xmm_k1z_xmm_xmmm32_er);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vstmxcsr(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vstmxcsr_m32, in memory));
		}

		public void vsubpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vsubpd_xmm_xmm_xmmm128 : Code.EVEX_Vsubpd_xmm_k1z_xmm_xmmm128b64);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vsubpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vsubpd_ymm_ymm_ymmm256 : Code.EVEX_Vsubpd_ymm_k1z_ymm_ymmm256b64);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vsubpd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vsubpd_zmm_k1z_zmm_zmmm512b64_er, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vsubpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vsubpd_xmm_xmm_xmmm128 : Code.EVEX_Vsubpd_xmm_k1z_xmm_xmmm128b64) : Code.EVEX_Vsubpd_xmm_k1z_xmm_xmmm128b64);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vsubpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vsubpd_ymm_ymm_ymmm256 : Code.EVEX_Vsubpd_ymm_k1z_ymm_ymmm256b64) : Code.EVEX_Vsubpd_ymm_k1z_ymm_ymmm256b64);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vsubpd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vsubpd_zmm_k1z_zmm_zmmm512b64_er, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vsubph(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vsubph_xmm_k1z_xmm_xmmm128b16, dst, src1, src2), dst.Flags);
		}

		public void vsubph(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vsubph_ymm_k1z_ymm_ymmm256b16, dst, src1, src2), dst.Flags);
		}

		public void vsubph(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vsubph_zmm_k1z_zmm_zmmm512b16_er, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vsubph(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vsubph_xmm_k1z_xmm_xmmm128b16, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vsubph(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vsubph_ymm_k1z_ymm_ymmm256b16, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vsubph(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vsubph_zmm_k1z_zmm_zmmm512b16_er, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vsubps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vsubps_xmm_xmm_xmmm128 : Code.EVEX_Vsubps_xmm_k1z_xmm_xmmm128b32);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vsubps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vsubps_ymm_ymm_ymmm256 : Code.EVEX_Vsubps_ymm_k1z_ymm_ymmm256b32);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vsubps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vsubps_zmm_k1z_zmm_zmmm512b32_er, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vsubps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vsubps_xmm_xmm_xmmm128 : Code.EVEX_Vsubps_xmm_k1z_xmm_xmmm128b32) : Code.EVEX_Vsubps_xmm_k1z_xmm_xmmm128b32);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vsubps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vsubps_ymm_ymm_ymmm256 : Code.EVEX_Vsubps_ymm_k1z_ymm_ymmm256b32) : Code.EVEX_Vsubps_ymm_k1z_ymm_ymmm256b32);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vsubps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vsubps_zmm_k1z_zmm_zmmm512b32_er, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vsubsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vsubsd_xmm_xmm_xmmm64 : Code.EVEX_Vsubsd_xmm_k1z_xmm_xmmm64_er);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vsubsd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vsubsd_xmm_xmm_xmmm64 : Code.EVEX_Vsubsd_xmm_k1z_xmm_xmmm64_er);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vsubsh(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vsubsh_xmm_k1z_xmm_xmmm16_er, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vsubsh(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vsubsh_xmm_k1z_xmm_xmmm16_er, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vsubss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vsubss_xmm_xmm_xmmm32 : Code.EVEX_Vsubss_xmm_k1z_xmm_xmmm32_er);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags | src2.Flags);
		}

		public void vsubss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vsubss_xmm_xmm_xmmm32 : Code.EVEX_Vsubss_xmm_k1z_xmm_xmmm32_er);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vtestpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vtestpd_xmm_xmmm128, dst, src));
		}

		public void vtestpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vtestpd_ymm_ymmm256, dst, src));
		}

		public void vtestpd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vtestpd_xmm_xmmm128, register, in memory));
		}

		public void vtestpd(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vtestpd_ymm_ymmm256, register, in memory));
		}

		public void vtestps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vtestps_xmm_xmmm128, dst, src));
		}

		public void vtestps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src)
		{
			AddInstruction(Instruction.Create(Code.VEX_Vtestps_ymm_ymmm256, dst, src));
		}

		public void vtestps(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vtestps_xmm_xmmm128, register, in memory));
		}

		public void vtestps(AssemblerRegisterYMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.VEX_Vtestps_ymm_ymmm256, register, in memory));
		}

		public void vucomisd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vucomisd_xmm_xmmm64 : Code.EVEX_Vucomisd_xmm_xmmm64_sae);
			AddInstruction(Instruction.Create(code, dst, src), src.Flags);
		}

		public void vucomisd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vucomisd_xmm_xmmm64 : Code.EVEX_Vucomisd_xmm_xmmm64_sae);
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory), src.Flags);
		}

		public void vucomish(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vucomish_xmm_xmmm16_sae, dst, src), src.Flags);
		}

		public void vucomish(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vucomish_xmm_xmmm16_sae, register, in memory), src.Flags);
		}

		public void vucomiss(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vucomiss_xmm_xmmm32 : Code.EVEX_Vucomiss_xmm_xmmm32_sae);
			AddInstruction(Instruction.Create(code, dst, src), src.Flags);
		}

		public void vucomiss(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vucomiss_xmm_xmmm32 : Code.EVEX_Vucomiss_xmm_xmmm32_sae);
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, in memory), src.Flags);
		}

		public void vunpckhpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vunpckhpd_xmm_xmm_xmmm128 : Code.EVEX_Vunpckhpd_xmm_k1z_xmm_xmmm128b64);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vunpckhpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vunpckhpd_ymm_ymm_ymmm256 : Code.EVEX_Vunpckhpd_ymm_k1z_ymm_ymmm256b64);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vunpckhpd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vunpckhpd_zmm_k1z_zmm_zmmm512b64, dst, src1, src2), dst.Flags);
		}

		public void vunpckhpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vunpckhpd_xmm_xmm_xmmm128 : Code.EVEX_Vunpckhpd_xmm_k1z_xmm_xmmm128b64) : Code.EVEX_Vunpckhpd_xmm_k1z_xmm_xmmm128b64);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vunpckhpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vunpckhpd_ymm_ymm_ymmm256 : Code.EVEX_Vunpckhpd_ymm_k1z_ymm_ymmm256b64) : Code.EVEX_Vunpckhpd_ymm_k1z_ymm_ymmm256b64);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vunpckhpd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vunpckhpd_zmm_k1z_zmm_zmmm512b64, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vunpckhps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vunpckhps_xmm_xmm_xmmm128 : Code.EVEX_Vunpckhps_xmm_k1z_xmm_xmmm128b32);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vunpckhps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vunpckhps_ymm_ymm_ymmm256 : Code.EVEX_Vunpckhps_ymm_k1z_ymm_ymmm256b32);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vunpckhps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vunpckhps_zmm_k1z_zmm_zmmm512b32, dst, src1, src2), dst.Flags);
		}

		public void vunpckhps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vunpckhps_xmm_xmm_xmmm128 : Code.EVEX_Vunpckhps_xmm_k1z_xmm_xmmm128b32) : Code.EVEX_Vunpckhps_xmm_k1z_xmm_xmmm128b32);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vunpckhps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vunpckhps_ymm_ymm_ymmm256 : Code.EVEX_Vunpckhps_ymm_k1z_ymm_ymmm256b32) : Code.EVEX_Vunpckhps_ymm_k1z_ymm_ymmm256b32);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vunpckhps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vunpckhps_zmm_k1z_zmm_zmmm512b32, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vunpcklpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vunpcklpd_xmm_xmm_xmmm128 : Code.EVEX_Vunpcklpd_xmm_k1z_xmm_xmmm128b64);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vunpcklpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vunpcklpd_ymm_ymm_ymmm256 : Code.EVEX_Vunpcklpd_ymm_k1z_ymm_ymmm256b64);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vunpcklpd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vunpcklpd_zmm_k1z_zmm_zmmm512b64, dst, src1, src2), dst.Flags);
		}

		public void vunpcklpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vunpcklpd_xmm_xmm_xmmm128 : Code.EVEX_Vunpcklpd_xmm_k1z_xmm_xmmm128b64) : Code.EVEX_Vunpcklpd_xmm_k1z_xmm_xmmm128b64);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vunpcklpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vunpcklpd_ymm_ymm_ymmm256 : Code.EVEX_Vunpcklpd_ymm_k1z_ymm_ymmm256b64) : Code.EVEX_Vunpcklpd_ymm_k1z_ymm_ymmm256b64);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vunpcklpd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vunpcklpd_zmm_k1z_zmm_zmmm512b64, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vunpcklps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vunpcklps_xmm_xmm_xmmm128 : Code.EVEX_Vunpcklps_xmm_k1z_xmm_xmmm128b32);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vunpcklps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vunpcklps_ymm_ymm_ymmm256 : Code.EVEX_Vunpcklps_ymm_k1z_ymm_ymmm256b32);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vunpcklps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vunpcklps_zmm_k1z_zmm_zmmm512b32, dst, src1, src2), dst.Flags);
		}

		public void vunpcklps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vunpcklps_xmm_xmm_xmmm128 : Code.EVEX_Vunpcklps_xmm_k1z_xmm_xmmm128b32) : Code.EVEX_Vunpcklps_xmm_k1z_xmm_xmmm128b32);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vunpcklps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vunpcklps_ymm_ymm_ymmm256 : Code.EVEX_Vunpcklps_ymm_k1z_ymm_ymmm256b32) : Code.EVEX_Vunpcklps_ymm_k1z_ymm_ymmm256b32);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vunpcklps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vunpcklps_zmm_k1z_zmm_zmmm512b32, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vxorpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vxorpd_xmm_xmm_xmmm128 : Code.EVEX_Vxorpd_xmm_k1z_xmm_xmmm128b64);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vxorpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vxorpd_ymm_ymm_ymmm256 : Code.EVEX_Vxorpd_ymm_k1z_ymm_ymmm256b64);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vxorpd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vxorpd_zmm_k1z_zmm_zmmm512b64, dst, src1, src2), dst.Flags);
		}

		public void vxorpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vxorpd_xmm_xmm_xmmm128 : Code.EVEX_Vxorpd_xmm_k1z_xmm_xmmm128b64) : Code.EVEX_Vxorpd_xmm_k1z_xmm_xmmm128b64);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vxorpd(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vxorpd_ymm_ymm_ymmm256 : Code.EVEX_Vxorpd_ymm_k1z_ymm_ymmm256b64) : Code.EVEX_Vxorpd_ymm_k1z_ymm_ymmm256b64);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vxorpd(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vxorpd_zmm_k1z_zmm_zmmm512b64, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vxorps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerRegisterXMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vxorps_xmm_xmm_xmmm128 : Code.EVEX_Vxorps_xmm_k1z_xmm_xmmm128b32);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vxorps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerRegisterYMM src2)
		{
			Code code = (InstructionPreferVex ? Code.VEX_Vxorps_ymm_ymm_ymmm256 : Code.EVEX_Vxorps_ymm_k1z_ymm_ymmm256b32);
			AddInstruction(Instruction.Create(code, dst, src1, src2), dst.Flags);
		}

		public void vxorps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerRegisterZMM src2)
		{
			AddInstruction(Instruction.Create(Code.EVEX_Vxorps_zmm_k1z_zmm_zmmm512b32, dst, src1, src2), dst.Flags);
		}

		public void vxorps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vxorps_xmm_xmm_xmmm128 : Code.EVEX_Vxorps_xmm_k1z_xmm_xmmm128b32) : Code.EVEX_Vxorps_xmm_k1z_xmm_xmmm128b32);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vxorps(AssemblerRegisterYMM dst, AssemblerRegisterYMM src1, AssemblerMemoryOperand src2)
		{
			Code code = ((!src2.IsBroadcast) ? (InstructionPreferVex ? Code.VEX_Vxorps_ymm_ymm_ymmm256 : Code.EVEX_Vxorps_ymm_k1z_ymm_ymmm256b32) : Code.EVEX_Vxorps_ymm_k1z_ymm_ymmm256b32);
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vxorps(AssemblerRegisterZMM dst, AssemblerRegisterZMM src1, AssemblerMemoryOperand src2)
		{
			Register register = dst;
			Register register2 = src1;
			MemoryOperand memory = src2.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.EVEX_Vxorps_zmm_k1z_zmm_zmmm512b32, register, register2, in memory), dst.Flags | src2.Flags);
		}

		public void vzeroall()
		{
			AddInstruction(Instruction.Create(Code.VEX_Vzeroall));
		}

		public void vzeroupper()
		{
			AddInstruction(Instruction.Create(Code.VEX_Vzeroupper));
		}

		public void wait()
		{
			AddInstruction(Instruction.Create(Code.Wait));
		}

		public void wbinvd()
		{
			AddInstruction(Instruction.Create(Code.Wbinvd));
		}

		public void wbnoinvd()
		{
			AddInstruction(Instruction.Create(Code.Wbnoinvd));
		}

		public void wrfsbase(AssemblerRegister32 dst)
		{
			AddInstruction(Instruction.Create(Code.Wrfsbase_r32, dst));
		}

		public void wrfsbase(AssemblerRegister64 dst)
		{
			AddInstruction(Instruction.Create(Code.Wrfsbase_r64, dst));
		}

		public void wrgsbase(AssemblerRegister32 dst)
		{
			AddInstruction(Instruction.Create(Code.Wrgsbase_r32, dst));
		}

		public void wrgsbase(AssemblerRegister64 dst)
		{
			AddInstruction(Instruction.Create(Code.Wrgsbase_r64, dst));
		}

		public void wrmsr()
		{
			AddInstruction(Instruction.Create(Code.Wrmsr));
		}

		public void wrmsrlist()
		{
			AddInstruction(Instruction.Create(Code.Wrmsrlist));
		}

		public void wrmsrns()
		{
			AddInstruction(Instruction.Create(Code.Wrmsrns));
		}

		public void wrpkru()
		{
			AddInstruction(Instruction.Create(Code.Wrpkru));
		}

		public void wrshr(AssemblerRegister32 dst)
		{
			AddInstruction(Instruction.Create(Code.Wrshr_rm32, dst));
		}

		public void wrshr(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Wrshr_rm32, in memory));
		}

		public void wrssd(AssemblerMemoryOperand dst, AssemblerRegister32 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Wrssd_m32_r32, in memory, src));
		}

		public void wrssq(AssemblerMemoryOperand dst, AssemblerRegister64 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Wrssq_m64_r64, in memory, src));
		}

		public void wrudbg()
		{
			AddInstruction(Instruction.Create(Code.Wrudbg));
		}

		public void wrussd(AssemblerMemoryOperand dst, AssemblerRegister32 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Wrussd_m32_r32, in memory, src));
		}

		public void wrussq(AssemblerMemoryOperand dst, AssemblerRegister64 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Wrussq_m64_r64, in memory, src));
		}

		public void xabort(sbyte imm)
		{
			AddInstruction(Instruction.Create(Code.Xabort_imm8, imm));
		}

		public void xabort(byte imm)
		{
			AddInstruction(Instruction.Create(Code.Xabort_imm8, (uint)imm));
		}

		public void xadd(AssemblerRegister8 dst, AssemblerRegister8 src)
		{
			AddInstruction(Instruction.Create(Code.Xadd_rm8_r8, dst, src));
		}

		public void xadd(AssemblerMemoryOperand dst, AssemblerRegister8 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Xadd_rm8_r8, in memory, src));
		}

		public void xadd(AssemblerRegister16 dst, AssemblerRegister16 src)
		{
			AddInstruction(Instruction.Create(Code.Xadd_rm16_r16, dst, src));
		}

		public void xadd(AssemblerMemoryOperand dst, AssemblerRegister16 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Xadd_rm16_r16, in memory, src));
		}

		public void xadd(AssemblerRegister32 dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.Xadd_rm32_r32, dst, src));
		}

		public void xadd(AssemblerMemoryOperand dst, AssemblerRegister32 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Xadd_rm32_r32, in memory, src));
		}

		public void xadd(AssemblerRegister64 dst, AssemblerRegister64 src)
		{
			AddInstruction(Instruction.Create(Code.Xadd_rm64_r64, dst, src));
		}

		public void xadd(AssemblerMemoryOperand dst, AssemblerRegister64 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Xadd_rm64_r64, in memory, src));
		}

		public void xbegin(Label dst)
		{
			AddInstruction(Instruction.CreateXbegin(Bitness, dst.Id));
		}

		public void xbegin(ulong dst)
		{
			AddInstruction(Instruction.CreateXbegin(Bitness, dst));
		}

		public void xbts(AssemblerRegister16 dst, AssemblerRegister16 src)
		{
			AddInstruction(Instruction.Create(Code.Xbts_r16_rm16, dst, src));
		}

		public void xbts(AssemblerRegister32 dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.Xbts_r32_rm32, dst, src));
		}

		public void xbts(AssemblerRegister16 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Xbts_r16_rm16, register, in memory));
		}

		public void xbts(AssemblerRegister32 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Xbts_r32_rm32, register, in memory));
		}

		public void xchg(AssemblerRegister8 dst, AssemblerRegister8 src)
		{
			AddInstruction(Instruction.Create(Code.Xchg_rm8_r8, dst, src));
		}

		public void xchg(AssemblerMemoryOperand dst, AssemblerRegister8 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Xchg_rm8_r8, in memory, src));
		}

		public void xchg(AssemblerRegister16 dst, AssemblerRegister16 src)
		{
			Code code = (((Register)src == Register.AX) ? Code.Xchg_r16_AX : Code.Xchg_rm16_r16);
			AddInstruction(Instruction.Create(code, dst, src));
		}

		public void xchg(AssemblerMemoryOperand dst, AssemblerRegister16 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Xchg_rm16_r16, in memory, src));
		}

		public void xchg(AssemblerRegister32 dst, AssemblerRegister32 src)
		{
			Code code = (((Register)src == Register.EAX) ? Code.Xchg_r32_EAX : Code.Xchg_rm32_r32);
			AddInstruction(Instruction.Create(code, dst, src));
		}

		public void xchg(AssemblerMemoryOperand dst, AssemblerRegister32 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Xchg_rm32_r32, in memory, src));
		}

		public void xchg(AssemblerRegister64 dst, AssemblerRegister64 src)
		{
			Code code = (((Register)src == Register.RAX) ? Code.Xchg_r64_RAX : Code.Xchg_rm64_r64);
			AddInstruction(Instruction.Create(code, dst, src));
		}

		public void xchg(AssemblerMemoryOperand dst, AssemblerRegister64 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Xchg_rm64_r64, in memory, src));
		}

		public void xcryptcbc()
		{
			Code code = ((Bitness != 64) ? ((Bitness >= 32) ? Code.Xcryptcbc_32 : Code.Xcryptcbc_16) : Code.Xcryptcbc_64);
			AddInstruction(Instruction.Create(code));
		}

		public void xcryptcfb()
		{
			Code code = ((Bitness != 64) ? ((Bitness >= 32) ? Code.Xcryptcfb_32 : Code.Xcryptcfb_16) : Code.Xcryptcfb_64);
			AddInstruction(Instruction.Create(code));
		}

		public void xcryptctr()
		{
			Code code = ((Bitness != 64) ? ((Bitness >= 32) ? Code.Xcryptctr_32 : Code.Xcryptctr_16) : Code.Xcryptctr_64);
			AddInstruction(Instruction.Create(code));
		}

		public void xcryptecb()
		{
			Code code = ((Bitness != 64) ? ((Bitness >= 32) ? Code.Xcryptecb_32 : Code.Xcryptecb_16) : Code.Xcryptecb_64);
			AddInstruction(Instruction.Create(code));
		}

		public void xcryptofb()
		{
			Code code = ((Bitness != 64) ? ((Bitness >= 32) ? Code.Xcryptofb_32 : Code.Xcryptofb_16) : Code.Xcryptofb_64);
			AddInstruction(Instruction.Create(code));
		}

		public void xend()
		{
			AddInstruction(Instruction.Create(Code.Xend));
		}

		public void xgetbv()
		{
			AddInstruction(Instruction.Create(Code.Xgetbv));
		}

		public void xor(AssemblerRegister8 dst, AssemblerRegister8 src)
		{
			AddInstruction(Instruction.Create(Code.Xor_rm8_r8, dst, src));
		}

		public void xor(AssemblerMemoryOperand dst, AssemblerRegister8 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Xor_rm8_r8, in memory, src));
		}

		public void xor(AssemblerRegister16 dst, AssemblerRegister16 src)
		{
			AddInstruction(Instruction.Create(Code.Xor_rm16_r16, dst, src));
		}

		public void xor(AssemblerMemoryOperand dst, AssemblerRegister16 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Xor_rm16_r16, in memory, src));
		}

		public void xor(AssemblerRegister32 dst, AssemblerRegister32 src)
		{
			AddInstruction(Instruction.Create(Code.Xor_rm32_r32, dst, src));
		}

		public void xor(AssemblerMemoryOperand dst, AssemblerRegister32 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Xor_rm32_r32, in memory, src));
		}

		public void xor(AssemblerRegister64 dst, AssemblerRegister64 src)
		{
			AddInstruction(Instruction.Create(Code.Xor_rm64_r64, dst, src));
		}

		public void xor(AssemblerMemoryOperand dst, AssemblerRegister64 src)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Xor_rm64_r64, in memory, src));
		}

		public void xor(AssemblerRegister8 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Xor_r8_rm8, register, in memory));
		}

		public void xor(AssemblerRegister16 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Xor_r16_rm16, register, in memory));
		}

		public void xor(AssemblerRegister32 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Xor_r32_rm32, register, in memory));
		}

		public void xor(AssemblerRegister64 dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Xor_r64_rm64, register, in memory));
		}

		public void xor(AssemblerRegister8 dst, sbyte imm)
		{
			Code code = (((Register)dst == Register.AL) ? Code.Xor_AL_imm8 : Code.Xor_rm8_imm8);
			AddInstruction(Instruction.Create(code, dst, imm));
		}

		public void xor(AssemblerRegister16 dst, short imm)
		{
			Code code = (((Register)dst != Register.AX) ? ((imm >= -128 && imm <= 127) ? Code.Xor_rm16_imm8 : Code.Xor_rm16_imm16) : Code.Xor_AX_imm16);
			AddInstruction(Instruction.Create(code, dst, imm));
		}

		public void xor(AssemblerRegister32 dst, int imm)
		{
			Code code = (((Register)dst != Register.EAX) ? ((imm >= -128 && imm <= 127) ? Code.Xor_rm32_imm8 : Code.Xor_rm32_imm32) : Code.Xor_EAX_imm32);
			AddInstruction(Instruction.Create(code, dst, imm));
		}

		public void xor(AssemblerRegister64 dst, int imm)
		{
			Code code = (((Register)dst != Register.RAX) ? ((imm >= -128 && imm <= 127) ? Code.Xor_rm64_imm8 : Code.Xor_rm64_imm32) : Code.Xor_RAX_imm32);
			AddInstruction(Instruction.Create(code, dst, imm));
		}

		public void xor(AssemblerMemoryOperand dst, int imm)
		{
			Code code;
			if (dst.Size == MemoryOperandSize.Qword)
			{
				code = ((imm >= -128 && imm <= 127) ? Code.Xor_rm64_imm8 : Code.Xor_rm64_imm32);
			}
			else if (dst.Size == MemoryOperandSize.Dword)
			{
				code = ((imm >= -128 && imm <= 127) ? Code.Xor_rm32_imm8 : Code.Xor_rm32_imm32);
			}
			else if (dst.Size == MemoryOperandSize.Word)
			{
				code = ((imm >= -128 && imm <= 127) ? Code.Xor_rm16_imm8 : Code.Xor_rm16_imm16);
			}
			else
			{
				if (dst.Size != MemoryOperandSize.Byte)
				{
					throw NoOpCodeFoundFor(Mnemonic.Xor, dst, imm);
				}
				code = Code.Xor_rm8_imm8;
			}
			Code code2 = code;
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, in memory, imm));
		}

		public void xor(AssemblerRegister8 dst, byte imm)
		{
			Code code = (((Register)dst == Register.AL) ? Code.Xor_AL_imm8 : Code.Xor_rm8_imm8);
			AddInstruction(Instruction.Create(code, (Register)dst, (uint)imm));
		}

		public void xor(AssemblerRegister16 dst, ushort imm)
		{
			Code code = (((Register)dst != Register.AX) ? ((imm <= 127 || (65408 <= imm && imm <= ushort.MaxValue)) ? Code.Xor_rm16_imm8 : Code.Xor_rm16_imm16) : Code.Xor_AX_imm16);
			AddInstruction(Instruction.Create(code, (Register)dst, (uint)imm));
		}

		public void xor(AssemblerRegister32 dst, uint imm)
		{
			Code code = (((Register)dst != Register.EAX) ? ((imm <= 127 || 4294967168u <= imm) ? Code.Xor_rm32_imm8 : Code.Xor_rm32_imm32) : Code.Xor_EAX_imm32);
			AddInstruction(Instruction.Create(code, dst, imm));
		}

		public void xor(AssemblerMemoryOperand dst, uint imm)
		{
			Code code;
			if (dst.Size == MemoryOperandSize.Dword)
			{
				code = ((imm <= 127 || 4294967168u <= imm) ? Code.Xor_rm32_imm8 : Code.Xor_rm32_imm32);
			}
			else if (dst.Size == MemoryOperandSize.Word)
			{
				code = ((imm <= 127 || (65408 <= imm && imm <= 65535)) ? Code.Xor_rm16_imm8 : Code.Xor_rm16_imm16);
			}
			else
			{
				if (dst.Size != MemoryOperandSize.Byte)
				{
					throw NoOpCodeFoundFor(Mnemonic.Xor, dst, imm);
				}
				code = Code.Xor_rm8_imm8;
			}
			Code code2 = code;
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(code2, in memory, imm));
		}

		public void xorpd(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Xorpd_xmm_xmmm128, dst, src));
		}

		public void xorpd(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Xorpd_xmm_xmmm128, register, in memory));
		}

		public void xorps(AssemblerRegisterXMM dst, AssemblerRegisterXMM src)
		{
			AddInstruction(Instruction.Create(Code.Xorps_xmm_xmmm128, dst, src));
		}

		public void xorps(AssemblerRegisterXMM dst, AssemblerMemoryOperand src)
		{
			Register register = dst;
			MemoryOperand memory = src.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Xorps_xmm_xmmm128, register, in memory));
		}

		public void xresldtrk()
		{
			AddInstruction(Instruction.Create(Code.Xresldtrk));
		}

		public void xrstor(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Xrstor_mem, in memory));
		}

		public void xrstor64(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Xrstor64_mem, in memory));
		}

		public void xrstors(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Xrstors_mem, in memory));
		}

		public void xrstors64(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Xrstors64_mem, in memory));
		}

		public void xsave(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Xsave_mem, in memory));
		}

		public void xsave64(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Xsave64_mem, in memory));
		}

		public void xsavec(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Xsavec_mem, in memory));
		}

		public void xsavec64(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Xsavec64_mem, in memory));
		}

		public void xsaveopt(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Xsaveopt_mem, in memory));
		}

		public void xsaveopt64(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Xsaveopt64_mem, in memory));
		}

		public void xsaves(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Xsaves_mem, in memory));
		}

		public void xsaves64(AssemblerMemoryOperand dst)
		{
			MemoryOperand memory = dst.ToMemoryOperand(Bitness);
			AddInstruction(Instruction.Create(Code.Xsaves64_mem, in memory));
		}

		public void xsetbv()
		{
			AddInstruction(Instruction.Create(Code.Xsetbv));
		}

		public void xsha1()
		{
			Code code = ((Bitness != 64) ? ((Bitness >= 32) ? Code.Xsha1_32 : Code.Xsha1_16) : Code.Xsha1_64);
			AddInstruction(Instruction.Create(code));
		}

		public void xsha256()
		{
			Code code = ((Bitness != 64) ? ((Bitness >= 32) ? Code.Xsha256_32 : Code.Xsha256_16) : Code.Xsha256_64);
			AddInstruction(Instruction.Create(code));
		}

		public void xsha512()
		{
			Code code = ((Bitness != 64) ? ((Bitness >= 32) ? Code.Xsha512_32 : Code.Xsha512_16) : Code.Xsha512_64);
			AddInstruction(Instruction.Create(code));
		}

		public void xsha512_alt()
		{
			Code code = ((Bitness != 64) ? ((Bitness >= 32) ? Code.Xsha512_alt_32 : Code.Xsha512_alt_16) : Code.Xsha512_alt_64);
			AddInstruction(Instruction.Create(code));
		}

		public void xstore()
		{
			Code code = ((Bitness != 64) ? ((Bitness >= 32) ? Code.Xstore_32 : Code.Xstore_16) : Code.Xstore_64);
			AddInstruction(Instruction.Create(code));
		}

		public void xstore_alt()
		{
			Code code = ((Bitness != 64) ? ((Bitness >= 32) ? Code.Xstore_alt_32 : Code.Xstore_alt_16) : Code.Xstore_alt_64);
			AddInstruction(Instruction.Create(code));
		}

		public void xsusldtrk()
		{
			AddInstruction(Instruction.Create(Code.Xsusldtrk));
		}

		public void xtest()
		{
			AddInstruction(Instruction.Create(Code.Xtest));
		}

		public void zero_bytes()
		{
			AddInstruction(Instruction.Create(Code.Zero_bytes));
		}

		public void db(byte imm0)
		{
			AddInstruction(Instruction.CreateDeclareByte(imm0));
		}

		public void db(byte imm0, byte imm1)
		{
			AddInstruction(Instruction.CreateDeclareByte(imm0, imm1));
		}

		public void db(byte imm0, byte imm1, byte imm2)
		{
			AddInstruction(Instruction.CreateDeclareByte(imm0, imm1, imm2));
		}

		public void db(byte imm0, byte imm1, byte imm2, byte imm3)
		{
			AddInstruction(Instruction.CreateDeclareByte(imm0, imm1, imm2, imm3));
		}

		public void db(byte imm0, byte imm1, byte imm2, byte imm3, byte imm4)
		{
			AddInstruction(Instruction.CreateDeclareByte(imm0, imm1, imm2, imm3, imm4));
		}

		public void db(byte imm0, byte imm1, byte imm2, byte imm3, byte imm4, byte imm5)
		{
			AddInstruction(Instruction.CreateDeclareByte(imm0, imm1, imm2, imm3, imm4, imm5));
		}

		public void db(byte imm0, byte imm1, byte imm2, byte imm3, byte imm4, byte imm5, byte imm6)
		{
			AddInstruction(Instruction.CreateDeclareByte(imm0, imm1, imm2, imm3, imm4, imm5, imm6));
		}

		public void db(byte imm0, byte imm1, byte imm2, byte imm3, byte imm4, byte imm5, byte imm6, byte imm7)
		{
			AddInstruction(Instruction.CreateDeclareByte(imm0, imm1, imm2, imm3, imm4, imm5, imm6, imm7));
		}

		public void db(byte imm0, byte imm1, byte imm2, byte imm3, byte imm4, byte imm5, byte imm6, byte imm7, byte imm8)
		{
			AddInstruction(Instruction.CreateDeclareByte(imm0, imm1, imm2, imm3, imm4, imm5, imm6, imm7, imm8));
		}

		public void db(byte imm0, byte imm1, byte imm2, byte imm3, byte imm4, byte imm5, byte imm6, byte imm7, byte imm8, byte imm9)
		{
			AddInstruction(Instruction.CreateDeclareByte(imm0, imm1, imm2, imm3, imm4, imm5, imm6, imm7, imm8, imm9));
		}

		public void db(byte imm0, byte imm1, byte imm2, byte imm3, byte imm4, byte imm5, byte imm6, byte imm7, byte imm8, byte imm9, byte imm10)
		{
			AddInstruction(Instruction.CreateDeclareByte(imm0, imm1, imm2, imm3, imm4, imm5, imm6, imm7, imm8, imm9, imm10));
		}

		public void db(byte imm0, byte imm1, byte imm2, byte imm3, byte imm4, byte imm5, byte imm6, byte imm7, byte imm8, byte imm9, byte imm10, byte imm11)
		{
			AddInstruction(Instruction.CreateDeclareByte(imm0, imm1, imm2, imm3, imm4, imm5, imm6, imm7, imm8, imm9, imm10, imm11));
		}

		public void db(byte imm0, byte imm1, byte imm2, byte imm3, byte imm4, byte imm5, byte imm6, byte imm7, byte imm8, byte imm9, byte imm10, byte imm11, byte imm12)
		{
			AddInstruction(Instruction.CreateDeclareByte(imm0, imm1, imm2, imm3, imm4, imm5, imm6, imm7, imm8, imm9, imm10, imm11, imm12));
		}

		public void db(byte imm0, byte imm1, byte imm2, byte imm3, byte imm4, byte imm5, byte imm6, byte imm7, byte imm8, byte imm9, byte imm10, byte imm11, byte imm12, byte imm13)
		{
			AddInstruction(Instruction.CreateDeclareByte(imm0, imm1, imm2, imm3, imm4, imm5, imm6, imm7, imm8, imm9, imm10, imm11, imm12, imm13));
		}

		public void db(byte imm0, byte imm1, byte imm2, byte imm3, byte imm4, byte imm5, byte imm6, byte imm7, byte imm8, byte imm9, byte imm10, byte imm11, byte imm12, byte imm13, byte imm14)
		{
			AddInstruction(Instruction.CreateDeclareByte(imm0, imm1, imm2, imm3, imm4, imm5, imm6, imm7, imm8, imm9, imm10, imm11, imm12, imm13, imm14));
		}

		public void db(byte imm0, byte imm1, byte imm2, byte imm3, byte imm4, byte imm5, byte imm6, byte imm7, byte imm8, byte imm9, byte imm10, byte imm11, byte imm12, byte imm13, byte imm14, byte imm15)
		{
			AddInstruction(Instruction.CreateDeclareByte(imm0, imm1, imm2, imm3, imm4, imm5, imm6, imm7, imm8, imm9, imm10, imm11, imm12, imm13, imm14, imm15));
		}

		public void db(sbyte imm0)
		{
			AddInstruction(Instruction.CreateDeclareByte((byte)imm0));
		}

		public void db(sbyte imm0, sbyte imm1)
		{
			AddInstruction(Instruction.CreateDeclareByte((byte)imm0, (byte)imm1));
		}

		public void db(sbyte imm0, sbyte imm1, sbyte imm2)
		{
			AddInstruction(Instruction.CreateDeclareByte((byte)imm0, (byte)imm1, (byte)imm2));
		}

		public void db(sbyte imm0, sbyte imm1, sbyte imm2, sbyte imm3)
		{
			AddInstruction(Instruction.CreateDeclareByte((byte)imm0, (byte)imm1, (byte)imm2, (byte)imm3));
		}

		public void db(sbyte imm0, sbyte imm1, sbyte imm2, sbyte imm3, sbyte imm4)
		{
			AddInstruction(Instruction.CreateDeclareByte((byte)imm0, (byte)imm1, (byte)imm2, (byte)imm3, (byte)imm4));
		}

		public void db(sbyte imm0, sbyte imm1, sbyte imm2, sbyte imm3, sbyte imm4, sbyte imm5)
		{
			AddInstruction(Instruction.CreateDeclareByte((byte)imm0, (byte)imm1, (byte)imm2, (byte)imm3, (byte)imm4, (byte)imm5));
		}

		public void db(sbyte imm0, sbyte imm1, sbyte imm2, sbyte imm3, sbyte imm4, sbyte imm5, sbyte imm6)
		{
			AddInstruction(Instruction.CreateDeclareByte((byte)imm0, (byte)imm1, (byte)imm2, (byte)imm3, (byte)imm4, (byte)imm5, (byte)imm6));
		}

		public void db(sbyte imm0, sbyte imm1, sbyte imm2, sbyte imm3, sbyte imm4, sbyte imm5, sbyte imm6, sbyte imm7)
		{
			AddInstruction(Instruction.CreateDeclareByte((byte)imm0, (byte)imm1, (byte)imm2, (byte)imm3, (byte)imm4, (byte)imm5, (byte)imm6, (byte)imm7));
		}

		public void db(sbyte imm0, sbyte imm1, sbyte imm2, sbyte imm3, sbyte imm4, sbyte imm5, sbyte imm6, sbyte imm7, sbyte imm8)
		{
			AddInstruction(Instruction.CreateDeclareByte((byte)imm0, (byte)imm1, (byte)imm2, (byte)imm3, (byte)imm4, (byte)imm5, (byte)imm6, (byte)imm7, (byte)imm8));
		}

		public void db(sbyte imm0, sbyte imm1, sbyte imm2, sbyte imm3, sbyte imm4, sbyte imm5, sbyte imm6, sbyte imm7, sbyte imm8, sbyte imm9)
		{
			AddInstruction(Instruction.CreateDeclareByte((byte)imm0, (byte)imm1, (byte)imm2, (byte)imm3, (byte)imm4, (byte)imm5, (byte)imm6, (byte)imm7, (byte)imm8, (byte)imm9));
		}

		public void db(sbyte imm0, sbyte imm1, sbyte imm2, sbyte imm3, sbyte imm4, sbyte imm5, sbyte imm6, sbyte imm7, sbyte imm8, sbyte imm9, sbyte imm10)
		{
			AddInstruction(Instruction.CreateDeclareByte((byte)imm0, (byte)imm1, (byte)imm2, (byte)imm3, (byte)imm4, (byte)imm5, (byte)imm6, (byte)imm7, (byte)imm8, (byte)imm9, (byte)imm10));
		}

		public void db(sbyte imm0, sbyte imm1, sbyte imm2, sbyte imm3, sbyte imm4, sbyte imm5, sbyte imm6, sbyte imm7, sbyte imm8, sbyte imm9, sbyte imm10, sbyte imm11)
		{
			AddInstruction(Instruction.CreateDeclareByte((byte)imm0, (byte)imm1, (byte)imm2, (byte)imm3, (byte)imm4, (byte)imm5, (byte)imm6, (byte)imm7, (byte)imm8, (byte)imm9, (byte)imm10, (byte)imm11));
		}

		public void db(sbyte imm0, sbyte imm1, sbyte imm2, sbyte imm3, sbyte imm4, sbyte imm5, sbyte imm6, sbyte imm7, sbyte imm8, sbyte imm9, sbyte imm10, sbyte imm11, sbyte imm12)
		{
			AddInstruction(Instruction.CreateDeclareByte((byte)imm0, (byte)imm1, (byte)imm2, (byte)imm3, (byte)imm4, (byte)imm5, (byte)imm6, (byte)imm7, (byte)imm8, (byte)imm9, (byte)imm10, (byte)imm11, (byte)imm12));
		}

		public void db(sbyte imm0, sbyte imm1, sbyte imm2, sbyte imm3, sbyte imm4, sbyte imm5, sbyte imm6, sbyte imm7, sbyte imm8, sbyte imm9, sbyte imm10, sbyte imm11, sbyte imm12, sbyte imm13)
		{
			AddInstruction(Instruction.CreateDeclareByte((byte)imm0, (byte)imm1, (byte)imm2, (byte)imm3, (byte)imm4, (byte)imm5, (byte)imm6, (byte)imm7, (byte)imm8, (byte)imm9, (byte)imm10, (byte)imm11, (byte)imm12, (byte)imm13));
		}

		public void db(sbyte imm0, sbyte imm1, sbyte imm2, sbyte imm3, sbyte imm4, sbyte imm5, sbyte imm6, sbyte imm7, sbyte imm8, sbyte imm9, sbyte imm10, sbyte imm11, sbyte imm12, sbyte imm13, sbyte imm14)
		{
			AddInstruction(Instruction.CreateDeclareByte((byte)imm0, (byte)imm1, (byte)imm2, (byte)imm3, (byte)imm4, (byte)imm5, (byte)imm6, (byte)imm7, (byte)imm8, (byte)imm9, (byte)imm10, (byte)imm11, (byte)imm12, (byte)imm13, (byte)imm14));
		}

		public void db(sbyte imm0, sbyte imm1, sbyte imm2, sbyte imm3, sbyte imm4, sbyte imm5, sbyte imm6, sbyte imm7, sbyte imm8, sbyte imm9, sbyte imm10, sbyte imm11, sbyte imm12, sbyte imm13, sbyte imm14, sbyte imm15)
		{
			AddInstruction(Instruction.CreateDeclareByte((byte)imm0, (byte)imm1, (byte)imm2, (byte)imm3, (byte)imm4, (byte)imm5, (byte)imm6, (byte)imm7, (byte)imm8, (byte)imm9, (byte)imm10, (byte)imm11, (byte)imm12, (byte)imm13, (byte)imm14, (byte)imm15));
		}

		public void dw(ushort imm0)
		{
			AddInstruction(Instruction.CreateDeclareWord(imm0));
		}

		public void dw(ushort imm0, ushort imm1)
		{
			AddInstruction(Instruction.CreateDeclareWord(imm0, imm1));
		}

		public void dw(ushort imm0, ushort imm1, ushort imm2)
		{
			AddInstruction(Instruction.CreateDeclareWord(imm0, imm1, imm2));
		}

		public void dw(ushort imm0, ushort imm1, ushort imm2, ushort imm3)
		{
			AddInstruction(Instruction.CreateDeclareWord(imm0, imm1, imm2, imm3));
		}

		public void dw(ushort imm0, ushort imm1, ushort imm2, ushort imm3, ushort imm4)
		{
			AddInstruction(Instruction.CreateDeclareWord(imm0, imm1, imm2, imm3, imm4));
		}

		public void dw(ushort imm0, ushort imm1, ushort imm2, ushort imm3, ushort imm4, ushort imm5)
		{
			AddInstruction(Instruction.CreateDeclareWord(imm0, imm1, imm2, imm3, imm4, imm5));
		}

		public void dw(ushort imm0, ushort imm1, ushort imm2, ushort imm3, ushort imm4, ushort imm5, ushort imm6)
		{
			AddInstruction(Instruction.CreateDeclareWord(imm0, imm1, imm2, imm3, imm4, imm5, imm6));
		}

		public void dw(ushort imm0, ushort imm1, ushort imm2, ushort imm3, ushort imm4, ushort imm5, ushort imm6, ushort imm7)
		{
			AddInstruction(Instruction.CreateDeclareWord(imm0, imm1, imm2, imm3, imm4, imm5, imm6, imm7));
		}

		public void dw(short imm0)
		{
			AddInstruction(Instruction.CreateDeclareWord((ushort)imm0));
		}

		public void dw(short imm0, short imm1)
		{
			AddInstruction(Instruction.CreateDeclareWord((ushort)imm0, (ushort)imm1));
		}

		public void dw(short imm0, short imm1, short imm2)
		{
			AddInstruction(Instruction.CreateDeclareWord((ushort)imm0, (ushort)imm1, (ushort)imm2));
		}

		public void dw(short imm0, short imm1, short imm2, short imm3)
		{
			AddInstruction(Instruction.CreateDeclareWord((ushort)imm0, (ushort)imm1, (ushort)imm2, (ushort)imm3));
		}

		public void dw(short imm0, short imm1, short imm2, short imm3, short imm4)
		{
			AddInstruction(Instruction.CreateDeclareWord((ushort)imm0, (ushort)imm1, (ushort)imm2, (ushort)imm3, (ushort)imm4));
		}

		public void dw(short imm0, short imm1, short imm2, short imm3, short imm4, short imm5)
		{
			AddInstruction(Instruction.CreateDeclareWord((ushort)imm0, (ushort)imm1, (ushort)imm2, (ushort)imm3, (ushort)imm4, (ushort)imm5));
		}

		public void dw(short imm0, short imm1, short imm2, short imm3, short imm4, short imm5, short imm6)
		{
			AddInstruction(Instruction.CreateDeclareWord((ushort)imm0, (ushort)imm1, (ushort)imm2, (ushort)imm3, (ushort)imm4, (ushort)imm5, (ushort)imm6));
		}

		public void dw(short imm0, short imm1, short imm2, short imm3, short imm4, short imm5, short imm6, short imm7)
		{
			AddInstruction(Instruction.CreateDeclareWord((ushort)imm0, (ushort)imm1, (ushort)imm2, (ushort)imm3, (ushort)imm4, (ushort)imm5, (ushort)imm6, (ushort)imm7));
		}

		public void dd(uint imm0)
		{
			AddInstruction(Instruction.CreateDeclareDword(imm0));
		}

		public void dd(uint imm0, uint imm1)
		{
			AddInstruction(Instruction.CreateDeclareDword(imm0, imm1));
		}

		public void dd(uint imm0, uint imm1, uint imm2)
		{
			AddInstruction(Instruction.CreateDeclareDword(imm0, imm1, imm2));
		}

		public void dd(uint imm0, uint imm1, uint imm2, uint imm3)
		{
			AddInstruction(Instruction.CreateDeclareDword(imm0, imm1, imm2, imm3));
		}

		public void dd(int imm0)
		{
			AddInstruction(Instruction.CreateDeclareDword((uint)imm0));
		}

		public void dd(int imm0, int imm1)
		{
			AddInstruction(Instruction.CreateDeclareDword((uint)imm0, (uint)imm1));
		}

		public void dd(int imm0, int imm1, int imm2)
		{
			AddInstruction(Instruction.CreateDeclareDword((uint)imm0, (uint)imm1, (uint)imm2));
		}

		public void dd(int imm0, int imm1, int imm2, int imm3)
		{
			AddInstruction(Instruction.CreateDeclareDword((uint)imm0, (uint)imm1, (uint)imm2, (uint)imm3));
		}

		public unsafe void dd(float imm0)
		{
			AddInstruction(Instruction.CreateDeclareDword(*(uint*)(&imm0)));
		}

		public unsafe void dd(float imm0, float imm1)
		{
			AddInstruction(Instruction.CreateDeclareDword(*(uint*)(&imm0), *(uint*)(&imm1)));
		}

		public unsafe void dd(float imm0, float imm1, float imm2)
		{
			AddInstruction(Instruction.CreateDeclareDword(*(uint*)(&imm0), *(uint*)(&imm1), *(uint*)(&imm2)));
		}

		public unsafe void dd(float imm0, float imm1, float imm2, float imm3)
		{
			AddInstruction(Instruction.CreateDeclareDword(*(uint*)(&imm0), *(uint*)(&imm1), *(uint*)(&imm2), *(uint*)(&imm3)));
		}

		public void dq(ulong imm0)
		{
			AddInstruction(Instruction.CreateDeclareQword(imm0));
		}

		public void dq(ulong imm0, ulong imm1)
		{
			AddInstruction(Instruction.CreateDeclareQword(imm0, imm1));
		}

		public void dq(long imm0)
		{
			AddInstruction(Instruction.CreateDeclareQword((ulong)imm0));
		}

		public void dq(long imm0, long imm1)
		{
			AddInstruction(Instruction.CreateDeclareQword((ulong)imm0, (ulong)imm1));
		}

		public unsafe void dq(double imm0)
		{
			AddInstruction(Instruction.CreateDeclareQword(*(ulong*)(&imm0)));
		}

		public unsafe void dq(double imm0, double imm1)
		{
			AddInstruction(Instruction.CreateDeclareQword(*(ulong*)(&imm0), *(ulong*)(&imm1)));
		}
	}
	[DebuggerDisplay("{Base} + {Index} * {Scale} + {Displacement}")]
	[EditorBrowsable(EditorBrowsableState.Never)]
	public readonly struct AssemblerMemoryOperand : IEquatable<AssemblerMemoryOperand>
	{
		internal readonly MemoryOperandSize Size;

		public readonly Register Segment;

		public readonly Register Base;

		public readonly Register Index;

		public readonly int Scale;

		public readonly long Displacement;

		internal readonly AssemblerOperandFlags Flags;

		public bool IsBroadcast => (Flags & AssemblerOperandFlags.Broadcast) != 0;

		internal bool IsDisplacementOnly
		{
			get
			{
				if (Base == Register.None)
				{
					return Index == Register.None;
				}
				return false;
			}
		}

		public AssemblerMemoryOperand k1 => new AssemblerMemoryOperand(Size, Segment, Base, Index, Scale, Displacement, (Flags & ~AssemblerOperandFlags.K7) | AssemblerOperandFlags.K1);

		public AssemblerMemoryOperand k2 => new AssemblerMemoryOperand(Size, Segment, Base, Index, Scale, Displacement, (Flags & ~AssemblerOperandFlags.K7) | AssemblerOperandFlags.K2);

		public AssemblerMemoryOperand k3 => new AssemblerMemoryOperand(Size, Segment, Base, Index, Scale, Displacement, (Flags & ~AssemblerOperandFlags.K7) | AssemblerOperandFlags.K3);

		public AssemblerMemoryOperand k4 => new AssemblerMemoryOperand(Size, Segment, Base, Index, Scale, Displacement, (Flags & ~AssemblerOperandFlags.K7) | AssemblerOperandFlags.K4);

		public AssemblerMemoryOperand k5 => new AssemblerMemoryOperand(Size, Segment, Base, Index, Scale, Displacement, (Flags & ~AssemblerOperandFlags.K7) | AssemblerOperandFlags.K5);

		public AssemblerMemoryOperand k6 => new AssemblerMemoryOperand(Size, Segment, Base, Index, Scale, Displacement, (Flags & ~AssemblerOperandFlags.K7) | AssemblerOperandFlags.K6);

		public AssemblerMemoryOperand k7 => new AssemblerMemoryOperand(Size, Segment, Base, Index, Scale, Displacement, (Flags & ~AssemblerOperandFlags.K7) | AssemblerOperandFlags.K7);

		internal AssemblerMemoryOperand(MemoryOperandSize size, Register segment, Register @base, Register index, int scale, long displacement, AssemblerOperandFlags flags)
		{
			Size = size;
			Segment = segment;
			Base = @base;
			Index = index;
			Scale = scale;
			Displacement = displacement;
			Flags = flags;
		}

		public static AssemblerMemoryOperand operator +(AssemblerRegister16 left, AssemblerMemoryOperand right)
		{
			bool flag = right.Base != Register.None;
			return new AssemblerMemoryOperand(right.Size, Register.None, flag ? right.Base : left.Value, flag ? left.Value : right.Index, right.Scale, right.Displacement, right.Flags);
		}

		public static AssemblerMemoryOperand operator +(AssemblerRegister32 left, AssemblerMemoryOperand right)
		{
			bool flag = right.Base != Register.None;
			return new AssemblerMemoryOperand(right.Size, Register.None, flag ? right.Base : left.Value, flag ? left.Value : right.Index, right.Scale, right.Displacement, right.Flags);
		}

		public static AssemblerMemoryOperand operator +(AssemblerRegister64 left, AssemblerMemoryOperand right)
		{
			bool flag = right.Base != Register.None;
			return new AssemblerMemoryOperand(right.Size, Register.None, flag ? right.Base : left.Value, flag ? left.Value : right.Index, right.Scale, right.Displacement, right.Flags);
		}

		public static AssemblerMemoryOperand operator +(AssemblerMemoryOperand left, long displacement)
		{
			return new AssemblerMemoryOperand(left.Size, Register.None, left.Base, left.Index, left.Scale, left.Displacement + displacement, left.Flags);
		}

		public static AssemblerMemoryOperand operator -(AssemblerMemoryOperand left, long displacement)
		{
			return new AssemblerMemoryOperand(left.Size, Register.None, left.Base, left.Index, left.Scale, left.Displacement - displacement, left.Flags);
		}

		public MemoryOperand ToMemoryOperand(int bitness)
		{
			int displSize = 1;
			if (IsDisplacementOnly)
			{
				displSize = bitness / 8;
			}
			else if (Displacement == 0L)
			{
				displSize = 0;
			}
			return new MemoryOperand(Base, Index, Scale, Displacement, displSize, (Flags & AssemblerOperandFlags.Broadcast) != 0, Segment);
		}

		public bool Equals(AssemblerMemoryOperand other)
		{
			if (Size == other.Size && Segment == other.Segment && Base == other.Base && Index == other.Index && Scale == other.Scale && Displacement == other.Displacement)
			{
				return Flags == other.Flags;
			}
			return false;
		}

		public override bool Equals(object? obj)
		{
			if (obj is AssemblerMemoryOperand other)
			{
				return Equals(other);
			}
			return false;
		}

		public override int GetHashCode()
		{
			return (int)(((((((((((uint)((int)Size * 397) ^ (uint)Segment) * 397) ^ (uint)Base) * 397) ^ (uint)Index) * 397) ^ (uint)Scale) * 397) ^ (uint)Displacement.GetHashCode()) * 397) ^ (int)Flags;
		}

		public static bool operator ==(AssemblerMemoryOperand left, AssemblerMemoryOperand right)
		{
			return left.Equals(right);
		}

		public static bool operator !=(AssemblerMemoryOperand left, AssemblerMemoryOperand right)
		{
			return !left.Equals(right);
		}
	}
	[EditorBrowsable(EditorBrowsableState.Never)]
	public readonly struct AssemblerMemoryOperandFactory
	{
		internal readonly MemoryOperandSize Size;

		internal readonly Register Segment;

		internal readonly AssemblerOperandFlags Flags;

		public AssemblerMemoryOperandFactory es => new AssemblerMemoryOperandFactory(Size, Register.ES, Flags);

		public AssemblerMemoryOperandFactory cs => new AssemblerMemoryOperandFactory(Size, Register.CS, Flags);

		public AssemblerMemoryOperandFactory ss => new AssemblerMemoryOperandFactory(Size, Register.SS, Flags);

		public AssemblerMemoryOperandFactory ds => new AssemblerMemoryOperandFactory(Size, Register.DS, Flags);

		public AssemblerMemoryOperandFactory fs => new AssemblerMemoryOperandFactory(Size, Register.FS, Flags);

		public AssemblerMemoryOperandFactory gs => new AssemblerMemoryOperandFactory(Size, Register.GS, Flags);

		public AssemblerMemoryOperand this[AssemblerMemoryOperand operand] => new AssemblerMemoryOperand(Size, Segment, operand.Base, operand.Index, operand.Scale, operand.Displacement, Flags);

		public AssemblerMemoryOperand this[long offset] => new AssemblerMemoryOperand(Size, Segment, Register.None, Register.None, 1, offset, Flags);

		public AssemblerMemoryOperand this[ulong offset] => new AssemblerMemoryOperand(Size, Segment, Register.None, Register.None, 1, (long)offset, Flags);

		public AssemblerMemoryOperand this[Label label] => new AssemblerMemoryOperand(Size, Segment, Register.RIP, Register.None, 1, (long)label.Id, Flags);

		public AssemblerMemoryOperand this[AssemblerRegister16 register] => new AssemblerMemoryOperand(Size, Segment, register, Register.None, 1, 0L, Flags);

		public AssemblerMemoryOperand this[AssemblerRegister32 register] => new AssemblerMemoryOperand(Size, Segment, register, Register.None, 1, 0L, Flags);

		public AssemblerMemoryOperand this[AssemblerRegister64 register] => new AssemblerMemoryOperand(Size, Segment, register, Register.None, 1, 0L, Flags);

		internal AssemblerMemoryOperandFactory(MemoryOperandSize size)
		{
			Segment = Register.None;
			Size = size;
			Flags = AssemblerOperandFlags.None;
		}

		internal AssemblerMemoryOperandFactory(MemoryOperandSize size, Register segment, AssemblerOperandFlags flags)
		{
			Size = size;
			Segment = segment;
			Flags = flags;
		}
	}
	[Flags]
	public enum AssemblerOperandFlags
	{
		None = 0,
		Broadcast = 1,
		Zeroing = 2,
		SuppressAllExceptions = 4,
		RoundToNearest = 8,
		RoundDown = 0x10,
		RoundUp = 0x18,
		RoundTowardZero = 0x20,
		RoundingControlMask = 0x38,
		K1 = 0x40,
		K2 = 0x80,
		K3 = 0xC0,
		K4 = 0x100,
		K5 = 0x140,
		K6 = 0x180,
		K7 = 0x1C0,
		RegisterMask = 0x1C0
	}
	[DebuggerDisplay("{Value}")]
	[EditorBrowsable(EditorBrowsableState.Never)]
	public readonly struct AssemblerRegister8 : IEquatable<AssemblerRegister8>
	{
		public readonly Register Value;

		public AssemblerRegister8(Register value)
		{
			if (!value.IsGPR8())
			{
				throw new ArgumentOutOfRangeException($"Invalid register {value}. Must be a GPR8 register", "value");
			}
			Value = value;
		}

		public static implicit operator Register(AssemblerRegister8 reg)
		{
			return reg.Value;
		}

		public bool Equals(AssemblerRegister8 other)
		{
			return Value == other.Value;
		}

		public override int GetHashCode()
		{
			return (int)Value;
		}

		public override bool Equals(object? obj)
		{
			if (obj is AssemblerRegister8 other)
			{
				return Equals(other);
			}
			return false;
		}

		public static bool operator ==(AssemblerRegister8 left, AssemblerRegister8 right)
		{
			return left.Equals(right);
		}

		public static bool operator !=(AssemblerRegister8 left, AssemblerRegister8 right)
		{
			return !left.Equals(right);
		}
	}
	[DebuggerDisplay("{Value}")]
	[EditorBrowsable(EditorBrowsableState.Never)]
	public readonly struct AssemblerRegister16 : IEquatable<AssemblerRegister16>
	{
		public readonly Register Value;

		public AssemblerRegister16(Register value)
		{
			if (!value.IsGPR16())
			{
				throw new ArgumentOutOfRangeException($"Invalid register {value}. Must be a GPR16 register", "value");
			}
			Value = value;
		}

		public static implicit operator Register(AssemblerRegister16 reg)
		{
			return reg.Value;
		}

		public static AssemblerMemoryOperand operator +(AssemblerRegister16 left, AssemblerRegister16 right)
		{
			return new AssemblerMemoryOperand(MemoryOperandSize.None, Register.None, left, right, 1, 0L, AssemblerOperandFlags.None);
		}

		public static AssemblerMemoryOperand operator +(AssemblerRegister16 left, long displacement)
		{
			return new AssemblerMemoryOperand(MemoryOperandSize.None, Register.None, left, Register.None, 1, displacement, AssemblerOperandFlags.None);
		}

		public static AssemblerMemoryOperand operator -(AssemblerRegister16 left, long displacement)
		{
			return new AssemblerMemoryOperand(MemoryOperandSize.None, Register.None, left, Register.None, 1, -displacement, AssemblerOperandFlags.None);
		}

		public static AssemblerMemoryOperand operator *(AssemblerRegister16 left, int scale)
		{
			return new AssemblerMemoryOperand(MemoryOperandSize.None, Register.None, Register.None, left, scale, 0L, AssemblerOperandFlags.None);
		}

		public bool Equals(AssemblerRegister16 other)
		{
			return Value == other.Value;
		}

		public override int GetHashCode()
		{
			return (int)Value;
		}

		public override bool Equals(object? obj)
		{
			if (obj is AssemblerRegister16 other)
			{
				return Equals(other);
			}
			return false;
		}

		public static bool operator ==(AssemblerRegister16 left, AssemblerRegister16 right)
		{
			return left.Equals(right);
		}

		public static bool operator !=(AssemblerRegister16 left, AssemblerRegister16 right)
		{
			return !left.Equals(right);
		}
	}
	[DebuggerDisplay("{Value}")]
	[EditorBrowsable(EditorBrowsableState.Never)]
	public readonly struct AssemblerRegister32 : IEquatable<AssemblerRegister32>
	{
		public readonly Register Value;

		internal readonly AssemblerOperandFlags Flags;

		public AssemblerRegister32 k1 => new AssemblerRegister32(Value, (Flags & ~AssemblerOperandFlags.K7) | AssemblerOperandFlags.K1);

		public AssemblerRegister32 k2 => new AssemblerRegister32(Value, (Flags & ~AssemblerOperandFlags.K7) | AssemblerOperandFlags.K2);

		public AssemblerRegister32 k3 => new AssemblerRegister32(Value, (Flags & ~AssemblerOperandFlags.K7) | AssemblerOperandFlags.K3);

		public AssemblerRegister32 k4 => new AssemblerRegister32(Value, (Flags & ~AssemblerOperandFlags.K7) | AssemblerOperandFlags.K4);

		public AssemblerRegister32 k5 => new AssemblerRegister32(Value, (Flags & ~AssemblerOperandFlags.K7) | AssemblerOperandFlags.K5);

		public AssemblerRegister32 k6 => new AssemblerRegister32(Value, (Flags & ~AssemblerOperandFlags.K7) | AssemblerOperandFlags.K6);

		public AssemblerRegister32 k7 => new AssemblerRegister32(Value, (Flags & ~AssemblerOperandFlags.K7) | AssemblerOperandFlags.K7);

		public AssemblerRegister32 z => new AssemblerRegister32(Value, Flags | AssemblerOperandFlags.Zeroing);

		public AssemblerRegister32 sae => new AssemblerRegister32(Value, Flags | AssemblerOperandFlags.SuppressAllExceptions);

		public AssemblerRegister32 rn_sae => new AssemblerRegister32(Value, (Flags & ~AssemblerOperandFlags.RoundingControlMask) | AssemblerOperandFlags.RoundToNearest);

		public AssemblerRegister32 rd_sae => new AssemblerRegister32(Value, (Flags & ~AssemblerOperandFlags.RoundingControlMask) | AssemblerOperandFlags.RoundDown);

		public AssemblerRegister32 ru_sae => new AssemblerRegister32(Value, (Flags & ~AssemblerOperandFlags.RoundingControlMask) | AssemblerOperandFlags.RoundUp);

		public AssemblerRegister32 rz_sae => new AssemblerRegister32(Value, (Flags & ~AssemblerOperandFlags.RoundingControlMask) | AssemblerOperandFlags.RoundTowardZero);

		public AssemblerRegister32(Register value)
		{
			if (!value.IsGPR32())
			{
				throw new ArgumentOutOfRangeException($"Invalid register {value}. Must be a GPR32 register", "value");
			}
			Value = value;
			Flags = AssemblerOperandFlags.None;
		}

		public AssemblerRegister32(Register value, AssemblerOperandFlags flags)
		{
			if (!value.IsGPR32())
			{
				throw new ArgumentOutOfRangeException($"Invalid register {value}. Must be a GPR32 register", "value");
			}
			Value = value;
			Flags = flags;
		}

		public static implicit operator Register(AssemblerRegister32 reg)
		{
			return reg.Value;
		}

		public static AssemblerMemoryOperand operator +(AssemblerRegister32 left, AssemblerRegister32 right)
		{
			return new AssemblerMemoryOperand(MemoryOperandSize.None, Register.None, left, right, 1, 0L, AssemblerOperandFlags.None);
		}

		public static AssemblerMemoryOperand operator +(AssemblerRegister32 left, AssemblerRegisterXMM right)
		{
			return new AssemblerMemoryOperand(MemoryOperandSize.None, Register.None, left, right, 1, 0L, AssemblerOperandFlags.None);
		}

		public static AssemblerMemoryOperand operator +(AssemblerRegister32 left, AssemblerRegisterYMM right)
		{
			return new AssemblerMemoryOperand(MemoryOperandSize.None, Register.None, left, right, 1, 0L, AssemblerOperandFlags.None);
		}

		public static AssemblerMemoryOperand operator +(AssemblerRegister32 left, AssemblerRegisterZMM right)
		{
			return new AssemblerMemoryOperand(MemoryOperandSize.None, Register.None, left, right, 1, 0L, AssemblerOperandFlags.None);
		}

		public static AssemblerMemoryOperand operator +(AssemblerRegister32 left, long displacement)
		{
			return new AssemblerMemoryOperand(MemoryOperandSize.None, Register.None, left, Register.None, 1, displacement, AssemblerOperandFlags.None);
		}

		public static AssemblerMemoryOperand operator -(AssemblerRegister32 left, long displacement)
		{
			return new AssemblerMemoryOperand(MemoryOperandSize.None, Register.None, left, Register.None, 1, -displacement, AssemblerOperandFlags.None);
		}

		public static AssemblerMemoryOperand operator *(AssemblerRegister32 left, int scale)
		{
			return new AssemblerMemoryOperand(MemoryOperandSize.None, Register.None, Register.None, left, scale, 0L, AssemblerOperandFlags.None);
		}

		public bool Equals(AssemblerRegister32 other)
		{
			if (Value == other.Value)
			{
				return Flags == other.Flags;
			}
			return false;
		}

		public override int GetHashCode()
		{
			return ((int)Value * 397) ^ (int)Flags;
		}

		public override bool Equals(object? obj)
		{
			if (obj is AssemblerRegister32 other)
			{
				return Equals(other);
			}
			return false;
		}

		public static bool operator ==(AssemblerRegister32 left, AssemblerRegister32 right)
		{
			return left.Equals(right);
		}

		public static bool operator !=(AssemblerRegister32 left, AssemblerRegister32 right)
		{
			return !left.Equals(right);
		}
	}
	[DebuggerDisplay("{Value}")]
	[EditorBrowsable(EditorBrowsableState.Never)]
	public readonly struct AssemblerRegister64 : IEquatable<AssemblerRegister64>
	{
		public readonly Register Value;

		internal readonly AssemblerOperandFlags Flags;

		public AssemblerRegister64 k1 => new AssemblerRegister64(Value, (Flags & ~AssemblerOperandFlags.K7) | AssemblerOperandFlags.K1);

		public AssemblerRegister64 k2 => new AssemblerRegister64(Value, (Flags & ~AssemblerOperandFlags.K7) | AssemblerOperandFlags.K2);

		public AssemblerRegister64 k3 => new AssemblerRegister64(Value, (Flags & ~AssemblerOperandFlags.K7) | AssemblerOperandFlags.K3);

		public AssemblerRegister64 k4 => new AssemblerRegister64(Value, (Flags & ~AssemblerOperandFlags.K7) | AssemblerOperandFlags.K4);

		public AssemblerRegister64 k5 => new AssemblerRegister64(Value, (Flags & ~AssemblerOperandFlags.K7) | AssemblerOperandFlags.K5);

		public AssemblerRegister64 k6 => new AssemblerRegister64(Value, (Flags & ~AssemblerOperandFlags.K7) | AssemblerOperandFlags.K6);

		public AssemblerRegister64 k7 => new AssemblerRegister64(Value, (Flags & ~AssemblerOperandFlags.K7) | AssemblerOperandFlags.K7);

		public AssemblerRegister64 z => new AssemblerRegister64(Value, Flags | AssemblerOperandFlags.Zeroing);

		public AssemblerRegister64 sae => new AssemblerRegister64(Value, Flags | AssemblerOperandFlags.SuppressAllExceptions);

		public AssemblerRegister64 rn_sae => new AssemblerRegister64(Value, (Flags & ~AssemblerOperandFlags.RoundingControlMask) | AssemblerOperandFlags.RoundToNearest);

		public AssemblerRegister64 rd_sae => new AssemblerRegister64(Value, (Flags & ~AssemblerOperandFlags.RoundingControlMask) | AssemblerOperandFlags.RoundDown);

		public AssemblerRegister64 ru_sae => new AssemblerRegister64(Value, (Flags & ~AssemblerOperandFlags.RoundingControlMask) | AssemblerOperandFlags.RoundUp);

		public AssemblerRegister64 rz_sae => new AssemblerRegister64(Value, (Flags & ~AssemblerOperandFlags.RoundingControlMask) | AssemblerOperandFlags.RoundTowardZero);

		public AssemblerRegister64(Register value)
		{
			if (!value.IsGPR64())
			{
				throw new ArgumentOutOfRangeException($"Invalid register {value}. Must be a GPR64 register", "value");
			}
			Value = value;
			Flags = AssemblerOperandFlags.None;
		}

		public AssemblerRegister64(Register value, AssemblerOperandFlags flags)
		{
			if (!value.IsGPR64())
			{
				throw new ArgumentOutOfRangeException($"Invalid register {value}. Must be a GPR64 register", "value");
			}
			Value = value;
			Flags = flags;
		}

		public static implicit operator Register(AssemblerRegister64 reg)
		{
			return reg.Value;
		}

		public static AssemblerMemoryOperand operator +(AssemblerRegister64 left, AssemblerRegister64 right)
		{
			return new AssemblerMemoryOperand(MemoryOperandSize.None, Register.None, left, right, 1, 0L, AssemblerOperandFlags.None);
		}

		public static AssemblerMemoryOperand operator +(AssemblerRegister64 left, AssemblerRegisterXMM right)
		{
			return new AssemblerMemoryOperand(MemoryOperandSize.None, Register.None, left, right, 1, 0L, AssemblerOperandFlags.None);
		}

		public static AssemblerMemoryOperand operator +(AssemblerRegister64 left, AssemblerRegisterYMM right)
		{
			return new AssemblerMemoryOperand(MemoryOperandSize.None, Register.None, left, right, 1, 0L, AssemblerOperandFlags.None);
		}

		public static AssemblerMemoryOperand operator +(AssemblerRegister64 left, AssemblerRegisterZMM right)
		{
			return new AssemblerMemoryOperand(MemoryOperandSize.None, Register.None, left, right, 1, 0L, AssemblerOperandFlags.None);
		}

		public static AssemblerMemoryOperand operator +(AssemblerRegister64 left, long displacement)
		{
			return new AssemblerMemoryOperand(MemoryOperandSize.None, Register.None, left, Register.None, 1, displacement, AssemblerOperandFlags.None);
		}

		public static AssemblerMemoryOperand operator -(AssemblerRegister64 left, long displacement)
		{
			return new AssemblerMemoryOperand(MemoryOperandSize.None, Register.None, left, Register.None, 1, -displacement, AssemblerOperandFlags.None);
		}

		public static AssemblerMemoryOperand operator *(AssemblerRegister64 left, int scale)
		{
			return new AssemblerMemoryOperand(MemoryOperandSize.None, Register.None, Register.None, left, scale, 0L, AssemblerOperandFlags.None);
		}

		public bool Equals(AssemblerRegister64 other)
		{
			if (Value == other.Value)
			{
				return Flags == other.Flags;
			}
			return false;
		}

		public override int GetHashCode()
		{
			return ((int)Value * 397) ^ (int)Flags;
		}

		public override bool Equals(object? obj)
		{
			if (obj is AssemblerRegister64 other)
			{
				return Equals(other);
			}
			return false;
		}

		public static bool operator ==(AssemblerRegister64 left, AssemblerRegister64 right)
		{
			return left.Equals(right);
		}

		public static bool operator !=(AssemblerRegister64 left, AssemblerRegister64 right)
		{
			return !left.Equals(right);
		}
	}
	[DebuggerDisplay("{Value}")]
	[EditorBrowsable(EditorBrowsableState.Never)]
	public readonly struct AssemblerRegisterSegment : IEquatable<AssemblerRegisterSegment>
	{
		public readonly Register Value;

		public AssemblerRegisterSegment(Register value)
		{
			if (!value.IsSegmentRegister())
			{
				throw new ArgumentOutOfRangeException($"Invalid register {value}. Must be a SegmentRegister register", "value");
			}
			Value = value;
		}

		public static implicit operator Register(AssemblerRegisterSegment reg)
		{
			return reg.Value;
		}

		public bool Equals(AssemblerRegisterSegment other)
		{
			return Value == other.Value;
		}

		public override int GetHashCode()
		{
			return (int)Value;
		}

		public override bool Equals(object? obj)
		{
			if (obj is AssemblerRegisterSegment other)
			{
				return Equals(other);
			}
			return false;
		}

		public static bool operator ==(AssemblerRegisterSegment left, AssemblerRegisterSegment right)
		{
			return left.Equals(right);
		}

		public static bool operator !=(AssemblerRegisterSegment left, AssemblerRegisterSegment right)
		{
			return !left.Equals(right);
		}
	}
	[DebuggerDisplay("{Value}")]
	[EditorBrowsable(EditorBrowsableState.Never)]
	public readonly struct AssemblerRegisterCR : IEquatable<AssemblerRegisterCR>
	{
		public readonly Register Value;

		public AssemblerRegisterCR(Register value)
		{
			if (!value.IsCR())
			{
				throw new ArgumentOutOfRangeException($"Invalid register {value}. Must be a CR register", "value");
			}
			Value = value;
		}

		public static implicit operator Register(AssemblerRegisterCR reg)
		{
			return reg.Value;
		}

		public bool Equals(AssemblerRegisterCR other)
		{
			return Value == other.Value;
		}

		public override int GetHashCode()
		{
			return (int)Value;
		}

		public override bool Equals(object? obj)
		{
			if (obj is AssemblerRegisterCR other)
			{
				return Equals(other);
			}
			return false;
		}

		public static bool operator ==(AssemblerRegisterCR left, AssemblerRegisterCR right)
		{
			return left.Equals(right);
		}

		public static bool operator !=(AssemblerRegisterCR left, AssemblerRegisterCR right)
		{
			return !left.Equals(right);
		}
	}
	[DebuggerDisplay("{Value}")]
	[EditorBrowsable(EditorBrowsableState.Never)]
	public readonly struct AssemblerRegisterDR : IEquatable<AssemblerRegisterDR>
	{
		public readonly Register Value;

		public AssemblerRegisterDR(Register value)
		{
			if (!value.IsDR())
			{
				throw new ArgumentOutOfRangeException($"Invalid register {value}. Must be a DR register", "value");
			}
			Value = value;
		}

		public static implicit operator Register(AssemblerRegisterDR reg)
		{
			return reg.Value;
		}

		public bool Equals(AssemblerRegisterDR other)
		{
			return Value == other.Value;
		}

		public override int GetHashCode()
		{
			return (int)Value;
		}

		public override bool Equals(object? obj)
		{
			if (obj is AssemblerRegisterDR other)
			{
				return Equals(other);
			}
			return false;
		}

		public static bool operator ==(AssemblerRegisterDR left, AssemblerRegisterDR right)
		{
			return left.Equals(right);
		}

		public static bool operator !=(AssemblerRegisterDR left, AssemblerRegisterDR right)
		{
			return !left.Equals(right);
		}
	}
	[DebuggerDisplay("{Value}")]
	[EditorBrowsable(EditorBrowsableState.Never)]
	public readonly struct AssemblerRegisterTR : IEquatable<AssemblerRegisterTR>
	{
		public readonly Register Value;

		public AssemblerRegisterTR(Register value)
		{
			if (!value.IsTR())
			{
				throw new ArgumentOutOfRangeException($"Invalid register {value}. Must be a TR register", "value");
			}
			Value = value;
		}

		public static implicit operator Register(AssemblerRegisterTR reg)
		{
			return reg.Value;
		}

		public bool Equals(AssemblerRegisterTR other)
		{
			return Value == other.Value;
		}

		public override int GetHashCode()
		{
			return (int)Value;
		}

		public override bool Equals(object? obj)
		{
			if (obj is AssemblerRegisterTR other)
			{
				return Equals(other);
			}
			return false;
		}

		public static bool operator ==(AssemblerRegisterTR left, AssemblerRegisterTR right)
		{
			return left.Equals(right);
		}

		public static bool operator !=(AssemblerRegisterTR left, AssemblerRegisterTR right)
		{
			return !left.Equals(right);
		}
	}
	[DebuggerDisplay("{Value}")]
	[EditorBrowsable(EditorBrowsableState.Never)]
	public readonly struct AssemblerRegisterST : IEquatable<AssemblerRegisterST>
	{
		public readonly Register Value;

		public AssemblerRegisterST(Register value)
		{
			if (!value.IsST())
			{
				throw new ArgumentOutOfRangeException($"Invalid register {value}. Must be a ST register", "value");
			}
			Value = value;
		}

		public static implicit operator Register(AssemblerRegisterST reg)
		{
			return reg.Value;
		}

		public bool Equals(AssemblerRegisterST other)
		{
			return Value == other.Value;
		}

		public override int GetHashCode()
		{
			return (int)Value;
		}

		public override bool Equals(object? obj)
		{
			if (obj is AssemblerRegisterST other)
			{
				return Equals(other);
			}
			return false;
		}

		public static bool operator ==(AssemblerRegisterST left, AssemblerRegisterST right)
		{
			return left.Equals(right);
		}

		public static bool operator !=(AssemblerRegisterST left, AssemblerRegisterST right)
		{
			return !left.Equals(right);
		}
	}
	[DebuggerDisplay("{Value}")]
	[EditorBrowsable(EditorBrowsableState.Never)]
	public readonly struct AssemblerRegisterMM : IEquatable<AssemblerRegisterMM>
	{
		public readonly Register Value;

		public AssemblerRegisterMM(Register value)
		{
			if (!value.IsMM())
			{
				throw new ArgumentOutOfRangeException($"Invalid register {value}. Must be a MM register", "value");
			}
			Value = value;
		}

		public static implicit operator Register(AssemblerRegisterMM reg)
		{
			return reg.Value;
		}

		public bool Equals(AssemblerRegisterMM other)
		{
			return Value == other.Value;
		}

		public override int GetHashCode()
		{
			return (int)Value;
		}

		public override bool Equals(object? obj)
		{
			if (obj is AssemblerRegisterMM other)
			{
				return Equals(other);
			}
			return false;
		}

		public static bool operator ==(AssemblerRegisterMM left, AssemblerRegisterMM right)
		{
			return left.Equals(right);
		}

		public static bool operator !=(AssemblerRegisterMM left, AssemblerRegisterMM right)
		{
			return !left.Equals(right);
		}
	}
	[DebuggerDisplay("{Value}")]
	[EditorBrowsable(EditorBrowsableState.Never)]
	public readonly struct AssemblerRegisterXMM : IEquatable<AssemblerRegisterXMM>
	{
		public readonly Register Value;

		internal readonly AssemblerOperandFlags Flags;

		public AssemblerRegisterXMM k1 => new AssemblerRegisterXMM(Value, (Flags & ~AssemblerOperandFlags.K7) | AssemblerOperandFlags.K1);

		public AssemblerRegisterXMM k2 => new AssemblerRegisterXMM(Value, (Flags & ~AssemblerOperandFlags.K7) | AssemblerOperandFlags.K2);

		public AssemblerRegisterXMM k3 => new AssemblerRegisterXMM(Value, (Flags & ~AssemblerOperandFlags.K7) | AssemblerOperandFlags.K3);

		public AssemblerRegisterXMM k4 => new AssemblerRegisterXMM(Value, (Flags & ~AssemblerOperandFlags.K7) | AssemblerOperandFlags.K4);

		public AssemblerRegisterXMM k5 => new AssemblerRegisterXMM(Value, (Flags & ~AssemblerOperandFlags.K7) | AssemblerOperandFlags.K5);

		public AssemblerRegisterXMM k6 => new AssemblerRegisterXMM(Value, (Flags & ~AssemblerOperandFlags.K7) | AssemblerOperandFlags.K6);

		public AssemblerRegisterXMM k7 => new AssemblerRegisterXMM(Value, (Flags & ~AssemblerOperandFlags.K7) | AssemblerOperandFlags.K7);

		public AssemblerRegisterXMM z => new AssemblerRegisterXMM(Value, Flags | AssemblerOperandFlags.Zeroing);

		public AssemblerRegisterXMM sae => new AssemblerRegisterXMM(Value, Flags | AssemblerOperandFlags.SuppressAllExceptions);

		public AssemblerRegisterXMM rn_sae => new AssemblerRegisterXMM(Value, (Flags & ~AssemblerOperandFlags.RoundingControlMask) | AssemblerOperandFlags.RoundToNearest);

		public AssemblerRegisterXMM rd_sae => new AssemblerRegisterXMM(Value, (Flags & ~AssemblerOperandFlags.RoundingControlMask) | AssemblerOperandFlags.RoundDown);

		public AssemblerRegisterXMM ru_sae => new AssemblerRegisterXMM(Value, (Flags & ~AssemblerOperandFlags.RoundingControlMask) | AssemblerOperandFlags.RoundUp);

		public AssemblerRegisterXMM rz_sae => new AssemblerRegisterXMM(Value, (Flags & ~AssemblerOperandFlags.RoundingControlMask) | AssemblerOperandFlags.RoundTowardZero);

		public AssemblerRegisterXMM(Register value)
		{
			if (!value.IsXMM())
			{
				throw new ArgumentOutOfRangeException($"Invalid register {value}. Must be a XMM register", "value");
			}
			Value = value;
			Flags = AssemblerOperandFlags.None;
		}

		public AssemblerRegisterXMM(Register value, AssemblerOperandFlags flags)
		{
			if (!value.IsXMM())
			{
				throw new ArgumentOutOfRangeException($"Invalid register {value}. Must be a XMM register", "value");
			}
			Value = value;
			Flags = flags;
		}

		public static implicit operator Register(AssemblerRegisterXMM reg)
		{
			return reg.Value;
		}

		public static AssemblerMemoryOperand operator +(AssemblerRegisterXMM left, long displacement)
		{
			return new AssemblerMemoryOperand(MemoryOperandSize.None, Register.None, Register.None, left, 1, displacement, AssemblerOperandFlags.None);
		}

		public static AssemblerMemoryOperand operator -(AssemblerRegisterXMM left, long displacement)
		{
			return new AssemblerMemoryOperand(MemoryOperandSize.None, Register.None, Register.None, left, 1, -displacement, AssemblerOperandFlags.None);
		}

		public static AssemblerMemoryOperand operator *(AssemblerRegisterXMM left, int scale)
		{
			return new AssemblerMemoryOperand(MemoryOperandSize.None, Register.None, Register.None, left, scale, 0L, AssemblerOperandFlags.None);
		}

		public bool Equals(AssemblerRegisterXMM other)
		{
			if (Value == other.Value)
			{
				return Flags == other.Flags;
			}
			return false;
		}

		public override int GetHashCode()
		{
			return ((int)Value * 397) ^ (int)Flags;
		}

		public override bool Equals(object? obj)
		{
			if (obj is AssemblerRegisterXMM other)
			{
				return Equals(other);
			}
			return false;
		}

		public static bool operator ==(AssemblerRegisterXMM left, AssemblerRegisterXMM right)
		{
			return left.Equals(right);
		}

		public static bool operator !=(AssemblerRegisterXMM left, AssemblerRegisterXMM right)
		{
			return !left.Equals(right);
		}
	}
	[DebuggerDisplay("{Value}")]
	[EditorBrowsable(EditorBrowsableState.Never)]
	public readonly struct AssemblerRegisterYMM : IEquatable<AssemblerRegisterYMM>
	{
		public readonly Register Value;

		internal readonly AssemblerOperandFlags Flags;

		public AssemblerRegisterYMM k1 => new AssemblerRegisterYMM(Value, (Flags & ~AssemblerOperandFlags.K7) | AssemblerOperandFlags.K1);

		public AssemblerRegisterYMM k2 => new AssemblerRegisterYMM(Value, (Flags & ~AssemblerOperandFlags.K7) | AssemblerOperandFlags.K2);

		public AssemblerRegisterYMM k3 => new AssemblerRegisterYMM(Value, (Flags & ~AssemblerOperandFlags.K7) | AssemblerOperandFlags.K3);

		public AssemblerRegisterYMM k4 => new AssemblerRegisterYMM(Value, (Flags & ~AssemblerOperandFlags.K7) | AssemblerOperandFlags.K4);

		public AssemblerRegisterYMM k5 => new AssemblerRegisterYMM(Value, (Flags & ~AssemblerOperandFlags.K7) | AssemblerOperandFlags.K5);

		public AssemblerRegisterYMM k6 => new AssemblerRegisterYMM(Value, (Flags & ~AssemblerOperandFlags.K7) | AssemblerOperandFlags.K6);

		public AssemblerRegisterYMM k7 => new AssemblerRegisterYMM(Value, (Flags & ~AssemblerOperandFlags.K7) | AssemblerOperandFlags.K7);

		public AssemblerRegisterYMM z => new AssemblerRegisterYMM(Value, Flags | AssemblerOperandFlags.Zeroing);

		public AssemblerRegisterYMM sae => new AssemblerRegisterYMM(Value, Flags | AssemblerOperandFlags.SuppressAllExceptions);

		public AssemblerRegisterYMM rn_sae => new AssemblerRegisterYMM(Value, (Flags & ~AssemblerOperandFlags.RoundingControlMask) | AssemblerOperandFlags.RoundToNearest);

		public AssemblerRegisterYMM rd_sae => new AssemblerRegisterYMM(Value, (Flags & ~AssemblerOperandFlags.RoundingControlMask) | AssemblerOperandFlags.RoundDown);

		public AssemblerRegisterYMM ru_sae => new AssemblerRegisterYMM(Value, (Flags & ~AssemblerOperandFlags.RoundingControlMask) | AssemblerOperandFlags.RoundUp);

		public AssemblerRegisterYMM rz_sae => new AssemblerRegisterYMM(Value, (Flags & ~AssemblerOperandFlags.RoundingControlMask) | AssemblerOperandFlags.RoundTowardZero);

		public AssemblerRegisterYMM(Register value)
		{
			if (!value.IsYMM())
			{
				throw new ArgumentOutOfRangeException($"Invalid register {value}. Must be a YMM register", "value");
			}
			Value = value;
			Flags = AssemblerOperandFlags.None;
		}

		public AssemblerRegisterYMM(Register value, AssemblerOperandFlags flags)
		{
			if (!value.IsYMM())
			{
				throw new ArgumentOutOfRangeException($"Invalid register {value}. Must be a YMM register", "value");
			}
			Value = value;
			Flags = flags;
		}

		public static implicit operator Register(AssemblerRegisterYMM reg)
		{
			return reg.Value;
		}

		public static AssemblerMemoryOperand operator +(AssemblerRegisterYMM left, long displacement)
		{
			return new AssemblerMemoryOperand(MemoryOperandSize.None, Register.None, Register.None, left, 1, displacement, AssemblerOperandFlags.None);
		}

		public static AssemblerMemoryOperand operator -(AssemblerRegisterYMM left, long displacement)
		{
			return new AssemblerMemoryOperand(MemoryOperandSize.None, Register.None, Register.None, left, 1, -displacement, AssemblerOperandFlags.None);
		}

		public static AssemblerMemoryOperand operator *(AssemblerRegisterYMM left, int scale)
		{
			return new AssemblerMemoryOperand(MemoryOperandSize.None, Register.None, Register.None, left, scale, 0L, AssemblerOperandFlags.None);
		}

		public bool Equals(AssemblerRegisterYMM other)
		{
			if (Value == other.Value)
			{
				return Flags == other.Flags;
			}
			return false;
		}

		public override int GetHashCode()
		{
			return ((int)Value * 397) ^ (int)Flags;
		}

		public override bool Equals(object? obj)
		{
			if (obj is AssemblerRegisterYMM other)
			{
				return Equals(other);
			}
			return false;
		}

		public static bool operator ==(AssemblerRegisterYMM left, AssemblerRegisterYMM right)
		{
			return left.Equals(right);
		}

		public static bool operator !=(AssemblerRegisterYMM left, AssemblerRegisterYMM right)
		{
			return !left.Equals(right);
		}
	}
	[DebuggerDisplay("{Value}")]
	[EditorBrowsable(EditorBrowsableState.Never)]
	public readonly struct AssemblerRegisterZMM : IEquatable<AssemblerRegisterZMM>
	{
		public readonly Register Value;

		internal readonly AssemblerOperandFlags Flags;

		public AssemblerRegisterZMM k1 => new AssemblerRegisterZMM(Value, (Flags & ~AssemblerOperandFlags.K7) | AssemblerOperandFlags.K1);

		public AssemblerRegisterZMM k2 => new AssemblerRegisterZMM(Value, (Flags & ~AssemblerOperandFlags.K7) | AssemblerOperandFlags.K2);

		public AssemblerRegisterZMM k3 => new AssemblerRegisterZMM(Value, (Flags & ~AssemblerOperandFlags.K7) | AssemblerOperandFlags.K3);

		public AssemblerRegisterZMM k4 => new AssemblerRegisterZMM(Value, (Flags & ~AssemblerOperandFlags.K7) | AssemblerOperandFlags.K4);

		public AssemblerRegisterZMM k5 => new AssemblerRegisterZMM(Value, (Flags & ~AssemblerOperandFlags.K7) | AssemblerOperandFlags.K5);

		public AssemblerRegisterZMM k6 => new AssemblerRegisterZMM(Value, (Flags & ~AssemblerOperandFlags.K7) | AssemblerOperandFlags.K6);

		public AssemblerRegisterZMM k7 => new AssemblerRegisterZMM(Value, (Flags & ~AssemblerOperandFlags.K7) | AssemblerOperandFlags.K7);

		public AssemblerRegisterZMM z => new AssemblerRegisterZMM(Value, Flags | AssemblerOperandFlags.Zeroing);

		public AssemblerRegisterZMM sae => new AssemblerRegisterZMM(Value, Flags | AssemblerOperandFlags.SuppressAllExceptions);

		public AssemblerRegisterZMM rn_sae => new AssemblerRegisterZMM(Value, (Flags & ~AssemblerOperandFlags.RoundingControlMask) | AssemblerOperandFlags.RoundToNearest);

		public AssemblerRegisterZMM rd_sae => new AssemblerRegisterZMM(Value, (Flags & ~AssemblerOperandFlags.RoundingControlMask) | AssemblerOperandFlags.RoundDown);

		public AssemblerRegisterZMM ru_sae => new AssemblerRegisterZMM(Value, (Flags & ~AssemblerOperandFlags.RoundingControlMask) | AssemblerOperandFlags.RoundUp);

		public AssemblerRegisterZMM rz_sae => new AssemblerRegisterZMM(Value, (Flags & ~AssemblerOperandFlags.RoundingControlMask) | AssemblerOperandFlags.RoundTowardZero);

		public AssemblerRegisterZMM(Register value)
		{
			if (!value.IsZMM())
			{
				throw new ArgumentOutOfRangeException($"Invalid register {value}. Must be a ZMM register", "value");
			}
			Value = value;
			Flags = AssemblerOperandFlags.None;
		}

		public AssemblerRegisterZMM(Register value, AssemblerOperandFlags flags)
		{
			if (!value.IsZMM())
			{
				throw new ArgumentOutOfRangeException($"Invalid register {value}. Must be a ZMM register", "value");
			}
			Value = value;
			Flags = flags;
		}

		public static implicit operator Register(AssemblerRegisterZMM reg)
		{
			return reg.Value;
		}

		public static AssemblerMemoryOperand operator +(AssemblerRegisterZMM left, long displacement)
		{
			return new AssemblerMemoryOperand(MemoryOperandSize.None, Register.None, Register.None, left, 1, displacement, AssemblerOperandFlags.None);
		}

		public static AssemblerMemoryOperand operator -(AssemblerRegisterZMM left, long displacement)
		{
			return new AssemblerMemoryOperand(MemoryOperandSize.None, Register.None, Register.None, left, 1, -displacement, AssemblerOperandFlags.None);
		}

		public static AssemblerMemoryOperand operator *(AssemblerRegisterZMM left, int scale)
		{
			return new AssemblerMemoryOperand(MemoryOperandSize.None, Register.None, Register.None, left, scale, 0L, AssemblerOperandFlags.None);
		}

		public bool Equals(AssemblerRegisterZMM other)
		{
			if (Value == other.Value)
			{
				return Flags == other.Flags;
			}
			return false;
		}

		public override int GetHashCode()
		{
			return ((int)Value * 397) ^ (int)Flags;
		}

		public override bool Equals(object? obj)
		{
			if (obj is AssemblerRegisterZMM other)
			{
				return Equals(other);
			}
			return false;
		}

		public static bool operator ==(AssemblerRegisterZMM left, AssemblerRegisterZMM right)
		{
			return left.Equals(right);
		}

		public static bool operator !=(AssemblerRegisterZMM left, AssemblerRegisterZMM right)
		{
			return !left.Equals(right);
		}
	}
	[DebuggerDisplay("{Value}")]
	[EditorBrowsable(EditorBrowsableState.Never)]
	public readonly struct AssemblerRegisterTMM : IEquatable<AssemblerRegisterTMM>
	{
		public readonly Register Value;

		public AssemblerRegisterTMM(Register value)
		{
			if (!value.IsTMM())
			{
				throw new ArgumentOutOfRangeException($"Invalid register {value}. Must be a TMM register", "value");
			}
			Value = value;
		}

		public static implicit operator Register(AssemblerRegisterTMM reg)
		{
			return reg.Value;
		}

		public bool Equals(AssemblerRegisterTMM other)
		{
			return Value == other.Value;
		}

		public override int GetHashCode()
		{
			return (int)Value;
		}

		public override bool Equals(object? obj)
		{
			if (obj is AssemblerRegisterTMM other)
			{
				return Equals(other);
			}
			return false;
		}

		public static bool operator ==(AssemblerRegisterTMM left, AssemblerRegisterTMM right)
		{
			return left.Equals(right);
		}

		public static bool operator !=(AssemblerRegisterTMM left, AssemblerRegisterTMM right)
		{
			return !left.Equals(right);
		}
	}
	[DebuggerDisplay("{Value}")]
	[EditorBrowsable(EditorBrowsableState.Never)]
	public readonly struct AssemblerRegisterK : IEquatable<AssemblerRegisterK>
	{
		public readonly Register Value;

		internal readonly AssemblerOperandFlags Flags;

		public AssemblerRegisterK k1 => new AssemblerRegisterK(Value, (Flags & ~AssemblerOperandFlags.K7) | AssemblerOperandFlags.K1);

		public AssemblerRegisterK k2 => new AssemblerRegisterK(Value, (Flags & ~AssemblerOperandFlags.K7) | AssemblerOperandFlags.K2);

		public AssemblerRegisterK k3 => new AssemblerRegisterK(Value, (Flags & ~AssemblerOperandFlags.K7) | AssemblerOperandFlags.K3);

		public AssemblerRegisterK k4 => new AssemblerRegisterK(Value, (Flags & ~AssemblerOperandFlags.K7) | AssemblerOperandFlags.K4);

		public AssemblerRegisterK k5 => new AssemblerRegisterK(Value, (Flags & ~AssemblerOperandFlags.K7) | AssemblerOperandFlags.K5);

		public AssemblerRegisterK k6 => new AssemblerRegisterK(Value, (Flags & ~AssemblerOperandFlags.K7) | AssemblerOperandFlags.K6);

		public AssemblerRegisterK k7 => new AssemblerRegisterK(Value, (Flags & ~AssemblerOperandFlags.K7) | AssemblerOperandFlags.K7);

		public AssemblerRegisterK z => new AssemblerRegisterK(Value, Flags | AssemblerOperandFlags.Zeroing);

		public AssemblerRegisterK(Register value)
		{
			if (!value.IsK())
			{
				throw new ArgumentOutOfRangeException($"Invalid register {value}. Must be a K register", "value");
			}
			Value = value;
			Flags = AssemblerOperandFlags.None;
		}

		public AssemblerRegisterK(Register value, AssemblerOperandFlags flags)
		{
			if (!value.IsK())
			{
				throw new ArgumentOutOfRangeException($"Invalid register {value}. Must be a K register", "value");
			}
			Value = value;
			Flags = flags;
		}

		public static implicit operator Register(AssemblerRegisterK reg)
		{
			return reg.Value;
		}

		public bool Equals(AssemblerRegisterK other)
		{
			if (Value == other.Value)
			{
				return Flags == other.Flags;
			}
			return false;
		}

		public override int GetHashCode()
		{
			return ((int)Value * 397) ^ (int)Flags;
		}

		public override bool Equals(object? obj)
		{
			if (obj is AssemblerRegisterK other)
			{
				return Equals(other);
			}
			return false;
		}

		public static bool operator ==(AssemblerRegisterK left, AssemblerRegisterK right)
		{
			return left.Equals(right);
		}

		public static bool operator !=(AssemblerRegisterK left, AssemblerRegisterK right)
		{
			return !left.Equals(right);
		}
	}
	[DebuggerDisplay("{Value}")]
	[EditorBrowsable(EditorBrowsableState.Never)]
	public readonly struct AssemblerRegisterBND : IEquatable<AssemblerRegisterBND>
	{
		public readonly Register Value;

		public AssemblerRegisterBND(Register value)
		{
			if (!value.IsBND())
			{
				throw new ArgumentOutOfRangeException($"Invalid register {value}. Must be a BND register", "value");
			}
			Value = value;
		}

		public static implicit operator Register(AssemblerRegisterBND reg)
		{
			return reg.Value;
		}

		public bool Equals(AssemblerRegisterBND other)
		{
			return Value == other.Value;
		}

		public override int GetHashCode()
		{
			return (int)Value;
		}

		public override bool Equals(object? obj)
		{
			if (obj is AssemblerRegisterBND other)
			{
				return Equals(other);
			}
			return false;
		}

		public static bool operator ==(AssemblerRegisterBND left, AssemblerRegisterBND right)
		{
			return left.Equals(right);
		}

		public static bool operator !=(AssemblerRegisterBND left, AssemblerRegisterBND right)
		{
			return !left.Equals(right);
		}
	}
	public static class AssemblerRegisters
	{
		public static readonly AssemblerRegister8 al = new AssemblerRegister8(Register.AL);

		public static readonly AssemblerRegister8 cl = new AssemblerRegister8(Register.CL);

		public static readonly AssemblerRegister8 dl = new AssemblerRegister8(Register.DL);

		public static readonly AssemblerRegister8 bl = new AssemblerRegister8(Register.BL);

		public static readonly AssemblerRegister8 ah = new AssemblerRegister8(Register.AH);

		public static readonly AssemblerRegister8 ch = new AssemblerRegister8(Register.CH);

		public static readonly AssemblerRegister8 dh = new AssemblerRegister8(Register.DH);

		public static readonly AssemblerRegister8 bh = new AssemblerRegister8(Register.BH);

		public static readonly AssemblerRegister8 spl = new AssemblerRegister8(Register.SPL);

		public static readonly AssemblerRegister8 bpl = new AssemblerRegister8(Register.BPL);

		public static readonly AssemblerRegister8 sil = new AssemblerRegister8(Register.SIL);

		public static readonly AssemblerRegister8 dil = new AssemblerRegister8(Register.DIL);

		public static readonly AssemblerRegister8 r8b = new AssemblerRegister8(Register.R8L);

		public static readonly AssemblerRegister8 r9b = new AssemblerRegister8(Register.R9L);

		public static readonly AssemblerRegister8 r10b = new AssemblerRegister8(Register.R10L);

		public static readonly AssemblerRegister8 r11b = new AssemblerRegister8(Register.R11L);

		public static readonly AssemblerRegister8 r12b = new AssemblerRegister8(Register.R12L);

		public static readonly AssemblerRegister8 r13b = new AssemblerRegister8(Register.R13L);

		public static readonly AssemblerRegister8 r14b = new AssemblerRegister8(Register.R14L);

		public static readonly AssemblerRegister8 r15b = new AssemblerRegister8(Register.R15L);

		public static readonly AssemblerRegister16 ax = new AssemblerRegister16(Register.AX);

		public static readonly AssemblerRegister16 cx = new AssemblerRegister16(Register.CX);

		public static readonly AssemblerRegister16 dx = new AssemblerRegister16(Register.DX);

		public static readonly AssemblerRegister16 bx = new AssemblerRegister16(Register.BX);

		public static readonly AssemblerRegister16 sp = new AssemblerRegister16(Register.SP);

		public static readonly AssemblerRegister16 bp = new AssemblerRegister16(Register.BP);

		public static readonly AssemblerRegister16 si = new AssemblerRegister16(Register.SI);

		public static readonly AssemblerRegister16 di = new AssemblerRegister16(Register.DI);

		public static readonly AssemblerRegister16 r8w = new AssemblerRegister16(Register.R8W);

		public static readonly AssemblerRegister16 r9w = new AssemblerRegister16(Register.R9W);

		public static readonly AssemblerRegister16 r10w = new AssemblerRegister16(Register.R10W);

		public static readonly AssemblerRegister16 r11w = new AssemblerRegister16(Register.R11W);

		public static readonly AssemblerRegister16 r12w = new AssemblerRegister16(Register.R12W);

		public static readonly AssemblerRegister16 r13w = new AssemblerRegister16(Register.R13W);

		public static readonly AssemblerRegister16 r14w = new AssemblerRegister16(Register.R14W);

		public static readonly AssemblerRegister16 r15w = new AssemblerRegister16(Register.R15W);

		public static readonly AssemblerRegister32 eax = new AssemblerRegister32(Register.EAX);

		public static readonly AssemblerRegister32 ecx = new AssemblerRegister32(Register.ECX);

		public static readonly AssemblerRegister32 edx = new AssemblerRegister32(Register.EDX);

		public static readonly AssemblerRegister32 ebx = new AssemblerRegister32(Register.EBX);

		public static readonly AssemblerRegister32 esp = new AssemblerRegister32(Register.ESP);

		public static readonly AssemblerRegister32 ebp = new AssemblerRegister32(Register.EBP);

		public static readonly AssemblerRegister32 esi = new AssemblerRegister32(Register.ESI);

		public static readonly AssemblerRegister32 edi = new AssemblerRegister32(Register.EDI);

		public static readonly AssemblerRegister32 r8d = new AssemblerRegister32(Register.R8D);

		public static readonly AssemblerRegister32 r9d = new AssemblerRegister32(Register.R9D);

		public static readonly AssemblerRegister32 r10d = new AssemblerRegister32(Register.R10D);

		public static readonly AssemblerRegister32 r11d = new AssemblerRegister32(Register.R11D);

		public static readonly AssemblerRegister32 r12d = new AssemblerRegister32(Register.R12D);

		public static readonly AssemblerRegister32 r13d = new AssemblerRegister32(Register.R13D);

		public static readonly AssemblerRegister32 r14d = new AssemblerRegister32(Register.R14D);

		public static readonly AssemblerRegister32 r15d = new AssemblerRegister32(Register.R15D);

		public static readonly AssemblerRegister64 rax = new AssemblerRegister64(Register.RAX);

		public static readonly AssemblerRegister64 rcx = new AssemblerRegister64(Register.RCX);

		public static readonly AssemblerRegister64 rdx = new AssemblerRegister64(Register.RDX);

		public static readonly AssemblerRegister64 rbx = new AssemblerRegister64(Register.RBX);

		public static readonly AssemblerRegister64 rsp = new AssemblerRegister64(Register.RSP);

		public static readonly AssemblerRegister64 rbp = new AssemblerRegister64(Register.RBP);

		public static readonly AssemblerRegister64 rsi = new AssemblerRegister64(Register.RSI);

		public static readonly AssemblerRegister64 rdi = new AssemblerRegister64(Register.RDI);

		public static readonly AssemblerRegister64 r8 = new AssemblerRegister64(Register.R8);

		public static readonly AssemblerRegister64 r9 = new AssemblerRegister64(Register.R9);

		public static readonly AssemblerRegister64 r10 = new AssemblerRegister64(Register.R10);

		public static readonly AssemblerRegister64 r11 = new AssemblerRegister64(Register.R11);

		public static readonly AssemblerRegister64 r12 = new AssemblerRegister64(Register.R12);

		public static readonly AssemblerRegister64 r13 = new AssemblerRegister64(Register.R13);

		public static readonly AssemblerRegister64 r14 = new AssemblerRegister64(Register.R14);

		public static readonly AssemblerRegister64 r15 = new AssemblerRegister64(Register.R15);

		public static readonly AssemblerRegisterSegment es = new AssemblerRegisterSegment(Register.ES);

		public static readonly AssemblerRegisterSegment cs = new AssemblerRegisterSegment(Register.CS);

		public static readonly AssemblerRegisterSegment ss = new AssemblerRegisterSegment(Register.SS);

		public static readonly AssemblerRegisterSegment ds = new AssemblerRegisterSegment(Register.DS);

		public static readonly AssemblerRegisterSegment fs = new AssemblerRegisterSegment(Register.FS);

		public static readonly AssemblerRegisterSegment gs = new AssemblerRegisterSegment(Register.GS);

		public static readonly AssemblerRegisterST st0 = new AssemblerRegisterST(Register.ST0);

		public static readonly AssemblerRegisterST st1 = new AssemblerRegisterST(Register.ST1);

		public static readonly AssemblerRegisterST st2 = new AssemblerRegisterST(Register.ST2);

		public static readonly AssemblerRegisterST st3 = new AssemblerRegisterST(Register.ST3);

		public static readonly AssemblerRegisterST st4 = new AssemblerRegisterST(Register.ST4);

		public static readonly AssemblerRegisterST st5 = new AssemblerRegisterST(Register.ST5);

		public static readonly AssemblerRegisterST st6 = new AssemblerRegisterST(Register.ST6);

		public static readonly AssemblerRegisterST st7 = new AssemblerRegisterST(Register.ST7);

		public static readonly AssemblerRegisterCR cr0 = new AssemblerRegisterCR(Register.CR0);

		public static readonly AssemblerRegisterCR cr1 = new AssemblerRegisterCR(Register.CR1);

		public static readonly AssemblerRegisterCR cr2 = new AssemblerRegisterCR(Register.CR2);

		public static readonly AssemblerRegisterCR cr3 = new AssemblerRegisterCR(Register.CR3);

		public static readonly AssemblerRegisterCR cr4 = new AssemblerRegisterCR(Register.CR4);

		public static readonly AssemblerRegisterCR cr5 = new AssemblerRegisterCR(Register.CR5);

		public static readonly AssemblerRegisterCR cr6 = new AssemblerRegisterCR(Register.CR6);

		public static readonly AssemblerRegisterCR cr7 = new AssemblerRegisterCR(Register.CR7);

		public static readonly AssemblerRegisterCR cr8 = new AssemblerRegisterCR(Register.CR8);

		public static readonly AssemblerRegisterCR cr9 = new AssemblerRegisterCR(Register.CR9);

		public static readonly AssemblerRegisterCR cr10 = new AssemblerRegisterCR(Register.CR10);

		public static readonly AssemblerRegisterCR cr11 = new AssemblerRegisterCR(Register.CR11);

		public static readonly AssemblerRegisterCR cr12 = new AssemblerRegisterCR(Register.CR12);

		public static readonly AssemblerRegisterCR cr13 = new AssemblerRegisterCR(Register.CR13);

		public static readonly AssemblerRegisterCR cr14 = new AssemblerRegisterCR(Register.CR14);

		public static readonly AssemblerRegisterCR cr15 = new AssemblerRegisterCR(Register.CR15);

		public static readonly AssemblerRegisterDR dr0 = new AssemblerRegisterDR(Register.DR0);

		public static readonly AssemblerRegisterDR dr1 = new AssemblerRegisterDR(Register.DR1);

		public static readonly AssemblerRegisterDR dr2 = new AssemblerRegisterDR(Register.DR2);

		public static readonly AssemblerRegisterDR dr3 = new AssemblerRegisterDR(Register.DR3);

		public static readonly AssemblerRegisterDR dr4 = new AssemblerRegisterDR(Register.DR4);

		public static readonly AssemblerRegisterDR dr5 = new AssemblerRegisterDR(Register.DR5);

		public static readonly AssemblerRegisterDR dr6 = new AssemblerRegisterDR(Register.DR6);

		public static readonly AssemblerRegisterDR dr7 = new AssemblerRegisterDR(Register.DR7);

		public static readonly AssemblerRegisterDR dr8 = new AssemblerRegisterDR(Register.DR8);

		public static readonly AssemblerRegisterDR dr9 = new AssemblerRegisterDR(Register.DR9);

		public static readonly AssemblerRegisterDR dr10 = new AssemblerRegisterDR(Register.DR10);

		public static readonly AssemblerRegisterDR dr11 = new AssemblerRegisterDR(Register.DR11);

		public static readonly AssemblerRegisterDR dr12 = new AssemblerRegisterDR(Register.DR12);

		public static readonly AssemblerRegisterDR dr13 = new AssemblerRegisterDR(Register.DR13);

		public static readonly AssemblerRegisterDR dr14 = new AssemblerRegisterDR(Register.DR14);

		public static readonly AssemblerRegisterDR dr15 = new AssemblerRegisterDR(Register.DR15);

		public static readonly AssemblerRegisterTR tr0 = new AssemblerRegisterTR(Register.TR0);

		public static readonly AssemblerRegisterTR tr1 = new AssemblerRegisterTR(Register.TR1);

		public static readonly AssemblerRegisterTR tr2 = new AssemblerRegisterTR(Register.TR2);

		public static readonly AssemblerRegisterTR tr3 = new AssemblerRegisterTR(Register.TR3);

		public static readonly AssemblerRegisterTR tr4 = new AssemblerRegisterTR(Register.TR4);

		public static readonly AssemblerRegisterTR tr5 = new AssemblerRegisterTR(Register.TR5);

		public static readonly AssemblerRegisterTR tr6 = new AssemblerRegisterTR(Register.TR6);

		public static readonly AssemblerRegisterTR tr7 = new AssemblerRegisterTR(Register.TR7);

		public static readonly AssemblerRegisterBND bnd0 = new AssemblerRegisterBND(Register.BND0);

		public static readonly AssemblerRegisterBND bnd1 = new AssemblerRegisterBND(Register.BND1);

		public static readonly AssemblerRegisterBND bnd2 = new AssemblerRegisterBND(Register.BND2);

		public static readonly AssemblerRegisterBND bnd3 = new AssemblerRegisterBND(Register.BND3);

		public static readonly AssemblerRegisterK k0 = new AssemblerRegisterK(Register.K0);

		public static readonly AssemblerRegisterK k1 = new AssemblerRegisterK(Register.K1);

		public static readonly AssemblerRegisterK k2 = new AssemblerRegisterK(Register.K2);

		public static readonly AssemblerRegisterK k3 = new AssemblerRegisterK(Register.K3);

		public static readonly AssemblerRegisterK k4 = new AssemblerRegisterK(Register.K4);

		public static readonly AssemblerRegisterK k5 = new AssemblerRegisterK(Register.K5);

		public static readonly AssemblerRegisterK k6 = new AssemblerRegisterK(Register.K6);

		public static readonly AssemblerRegisterK k7 = new AssemblerRegisterK(Register.K7);

		public static readonly AssemblerRegisterMM mm0 = new AssemblerRegisterMM(Register.MM0);

		public static readonly AssemblerRegisterMM mm1 = new AssemblerRegisterMM(Register.MM1);

		public static readonly AssemblerRegisterMM mm2 = new AssemblerRegisterMM(Register.MM2);

		public static readonly AssemblerRegisterMM mm3 = new AssemblerRegisterMM(Register.MM3);

		public static readonly AssemblerRegisterMM mm4 = new AssemblerRegisterMM(Register.MM4);

		public static readonly AssemblerRegisterMM mm5 = new AssemblerRegisterMM(Register.MM5);

		public static readonly AssemblerRegisterMM mm6 = new AssemblerRegisterMM(Register.MM6);

		public static readonly AssemblerRegisterMM mm7 = new AssemblerRegisterMM(Register.MM7);

		public static readonly AssemblerRegisterXMM xmm0 = new AssemblerRegisterXMM(Register.XMM0);

		public static readonly AssemblerRegisterXMM xmm1 = new AssemblerRegisterXMM(Register.XMM1);

		public static readonly AssemblerRegisterXMM xmm2 = new AssemblerRegisterXMM(Register.XMM2);

		public static readonly AssemblerRegisterXMM xmm3 = new AssemblerRegisterXMM(Register.XMM3);

		public static readonly AssemblerRegisterXMM xmm4 = new AssemblerRegisterXMM(Register.XMM4);

		public static readonly AssemblerRegisterXMM xmm5 = new AssemblerRegisterXMM(Register.XMM5);

		public static readonly AssemblerRegisterXMM xmm6 = new AssemblerRegisterXMM(Register.XMM6);

		public static readonly AssemblerRegisterXMM xmm7 = new AssemblerRegisterXMM(Register.XMM7);

		public static readonly AssemblerRegisterXMM xmm8 = new AssemblerRegisterXMM(Register.XMM8);

		public static readonly AssemblerRegisterXMM xmm9 = new AssemblerRegisterXMM(Register.XMM9);

		public static readonly AssemblerRegisterXMM xmm10 = new AssemblerRegisterXMM(Register.XMM10);

		public static readonly AssemblerRegisterXMM xmm11 = new AssemblerRegisterXMM(Register.XMM11);

		public static readonly AssemblerRegisterXMM xmm12 = new AssemblerRegisterXMM(Register.XMM12);

		public static readonly AssemblerRegisterXMM xmm13 = new AssemblerRegisterXMM(Register.XMM13);

		public static readonly AssemblerRegisterXMM xmm14 = new AssemblerRegisterXMM(Register.XMM14);

		public static readonly AssemblerRegisterXMM xmm15 = new AssemblerRegisterXMM(Register.XMM15);

		public static readonly AssemblerRegisterXMM xmm16 = new AssemblerRegisterXMM(Register.XMM16);

		public static readonly AssemblerRegisterXMM xmm17 = new AssemblerRegisterXMM(Register.XMM17);

		public static readonly AssemblerRegisterXMM xmm18 = new AssemblerRegisterXMM(Register.XMM18);

		public static readonly AssemblerRegisterXMM xmm19 = new AssemblerRegisterXMM(Register.XMM19);

		public static readonly AssemblerRegisterXMM xmm20 = new AssemblerRegisterXMM(Register.XMM20);

		public static readonly AssemblerRegisterXMM xmm21 = new AssemblerRegisterXMM(Register.XMM21);

		public static readonly AssemblerRegisterXMM xmm22 = new AssemblerRegisterXMM(Register.XMM22);

		public static readonly AssemblerRegisterXMM xmm23 = new AssemblerRegisterXMM(Register.XMM23);

		public static readonly AssemblerRegisterXMM xmm24 = new AssemblerRegisterXMM(Register.XMM24);

		public static readonly AssemblerRegisterXMM xmm25 = new AssemblerRegisterXMM(Register.XMM25);

		public static readonly AssemblerRegisterXMM xmm26 = new AssemblerRegisterXMM(Register.XMM26);

		public static readonly AssemblerRegisterXMM xmm27 = new AssemblerRegisterXMM(Register.XMM27);

		public static readonly AssemblerRegisterXMM xmm28 = new AssemblerRegisterXMM(Register.XMM28);

		public static readonly AssemblerRegisterXMM xmm29 = new AssemblerRegisterXMM(Register.XMM29);

		public static readonly AssemblerRegisterXMM xmm30 = new AssemblerRegisterXMM(Register.XMM30);

		public static readonly AssemblerRegisterXMM xmm31 = new AssemblerRegisterXMM(Register.XMM31);

		public static readonly AssemblerRegisterYMM ymm0 = new AssemblerRegisterYMM(Register.YMM0);

		public static readonly AssemblerRegisterYMM ymm1 = new AssemblerRegisterYMM(Register.YMM1);

		public static readonly AssemblerRegisterYMM ymm2 = new AssemblerRegisterYMM(Register.YMM2);

		public static readonly AssemblerRegisterYMM ymm3 = new AssemblerRegisterYMM(Register.YMM3);

		public static readonly AssemblerRegisterYMM ymm4 = new AssemblerRegisterYMM(Register.YMM4);

		public static readonly AssemblerRegisterYMM ymm5 = new AssemblerRegisterYMM(Register.YMM5);

		public static readonly AssemblerRegisterYMM ymm6 = new AssemblerRegisterYMM(Register.YMM6);

		public static readonly AssemblerRegisterYMM ymm7 = new AssemblerRegisterYMM(Register.YMM7);

		public static readonly AssemblerRegisterYMM ymm8 = new AssemblerRegisterYMM(Register.YMM8);

		public static readonly AssemblerRegisterYMM ymm9 = new AssemblerRegisterYMM(Register.YMM9);

		public static readonly AssemblerRegisterYMM ymm10 = new AssemblerRegisterYMM(Register.YMM10);

		public static readonly AssemblerRegisterYMM ymm11 = new AssemblerRegisterYMM(Register.YMM11);

		public static readonly AssemblerRegisterYMM ymm12 = new AssemblerRegisterYMM(Register.YMM12);

		public static readonly AssemblerRegisterYMM ymm13 = new AssemblerRegisterYMM(Register.YMM13);

		public static readonly AssemblerRegisterYMM ymm14 = new AssemblerRegisterYMM(Register.YMM14);

		public static readonly AssemblerRegisterYMM ymm15 = new AssemblerRegisterYMM(Register.YMM15);

		public static readonly AssemblerRegisterYMM ymm16 = new AssemblerRegisterYMM(Register.YMM16);

		public static readonly AssemblerRegisterYMM ymm17 = new AssemblerRegisterYMM(Register.YMM17);

		public static readonly AssemblerRegisterYMM ymm18 = new AssemblerRegisterYMM(Register.YMM18);

		public static readonly AssemblerRegisterYMM ymm19 = new AssemblerRegisterYMM(Register.YMM19);

		public static readonly AssemblerRegisterYMM ymm20 = new AssemblerRegisterYMM(Register.YMM20);

		public static readonly AssemblerRegisterYMM ymm21 = new AssemblerRegisterYMM(Register.YMM21);

		public static readonly AssemblerRegisterYMM ymm22 = new AssemblerRegisterYMM(Register.YMM22);

		public static readonly AssemblerRegisterYMM ymm23 = new AssemblerRegisterYMM(Register.YMM23);

		public static readonly AssemblerRegisterYMM ymm24 = new AssemblerRegisterYMM(Register.YMM24);

		public static readonly AssemblerRegisterYMM ymm25 = new AssemblerRegisterYMM(Register.YMM25);

		public static readonly AssemblerRegisterYMM ymm26 = new AssemblerRegisterYMM(Register.YMM26);

		public static readonly AssemblerRegisterYMM ymm27 = new AssemblerRegisterYMM(Register.YMM27);

		public static readonly AssemblerRegisterYMM ymm28 = new AssemblerRegisterYMM(Register.YMM28);

		public static readonly AssemblerRegisterYMM ymm29 = new AssemblerRegisterYMM(Register.YMM29);

		public static readonly AssemblerRegisterYMM ymm30 = new AssemblerRegisterYMM(Register.YMM30);

		public static readonly AssemblerRegisterYMM ymm31 = new AssemblerRegisterYMM(Register.YMM31);

		public static readonly AssemblerRegisterZMM zmm0 = new AssemblerRegisterZMM(Register.ZMM0);

		public static readonly AssemblerRegisterZMM zmm1 = new AssemblerRegisterZMM(Register.ZMM1);

		public static readonly AssemblerRegisterZMM zmm2 = new AssemblerRegisterZMM(Register.ZMM2);

		public static readonly AssemblerRegisterZMM zmm3 = new AssemblerRegisterZMM(Register.ZMM3);

		public static readonly AssemblerRegisterZMM zmm4 = new AssemblerRegisterZMM(Register.ZMM4);

		public static readonly AssemblerRegisterZMM zmm5 = new AssemblerRegisterZMM(Register.ZMM5);

		public static readonly AssemblerRegisterZMM zmm6 = new AssemblerRegisterZMM(Register.ZMM6);

		public static readonly AssemblerRegisterZMM zmm7 = new AssemblerRegisterZMM(Register.ZMM7);

		public static readonly AssemblerRegisterZMM zmm8 = new AssemblerRegisterZMM(Register.ZMM8);

		public static readonly AssemblerRegisterZMM zmm9 = new AssemblerRegisterZMM(Register.ZMM9);

		public static readonly AssemblerRegisterZMM zmm10 = new AssemblerRegisterZMM(Register.ZMM10);

		public static readonly AssemblerRegisterZMM zmm11 = new AssemblerRegisterZMM(Register.ZMM11);

		public static readonly AssemblerRegisterZMM zmm12 = new AssemblerRegisterZMM(Register.ZMM12);

		public static readonly AssemblerRegisterZMM zmm13 = new AssemblerRegisterZMM(Register.ZMM13);

		public static readonly AssemblerRegisterZMM zmm14 = new AssemblerRegisterZMM(Register.ZMM14);

		public static readonly AssemblerRegisterZMM zmm15 = new AssemblerRegisterZMM(Register.ZMM15);

		public static readonly AssemblerRegisterZMM zmm16 = new AssemblerRegisterZMM(Register.ZMM16);

		public static readonly AssemblerRegisterZMM zmm17 = new AssemblerRegisterZMM(Register.ZMM17);

		public static readonly AssemblerRegisterZMM zmm18 = new AssemblerRegisterZMM(Register.ZMM18);

		public static readonly AssemblerRegisterZMM zmm19 = new AssemblerRegisterZMM(Register.ZMM19);

		public static readonly AssemblerRegisterZMM zmm20 = new AssemblerRegisterZMM(Register.ZMM20);

		public static readonly AssemblerRegisterZMM zmm21 = new AssemblerRegisterZMM(Register.ZMM21);

		public static readonly AssemblerRegisterZMM zmm22 = new AssemblerRegisterZMM(Register.ZMM22);

		public static readonly AssemblerRegisterZMM zmm23 = new AssemblerRegisterZMM(Register.ZMM23);

		public static readonly AssemblerRegisterZMM zmm24 = new AssemblerRegisterZMM(Register.ZMM24);

		public static readonly AssemblerRegisterZMM zmm25 = new AssemblerRegisterZMM(Register.ZMM25);

		public static readonly AssemblerRegisterZMM zmm26 = new AssemblerRegisterZMM(Register.ZMM26);

		public static readonly AssemblerRegisterZMM zmm27 = new AssemblerRegisterZMM(Register.ZMM27);

		public static readonly AssemblerRegisterZMM zmm28 = new AssemblerRegisterZMM(Register.ZMM28);

		public static readonly AssemblerRegisterZMM zmm29 = new AssemblerRegisterZMM(Register.ZMM29);

		public static readonly AssemblerRegisterZMM zmm30 = new AssemblerRegisterZMM(Register.ZMM30);

		public static readonly AssemblerRegisterZMM zmm31 = new AssemblerRegisterZMM(Register.ZMM31);

		public static readonly AssemblerRegisterTMM tmm0 = new AssemblerRegisterTMM(Register.TMM0);

		public static readonly AssemblerRegisterTMM tmm1 = new AssemblerRegisterTMM(Register.TMM1);

		public static readonly AssemblerRegisterTMM tmm2 = new AssemblerRegisterTMM(Register.TMM2);

		public static readonly AssemblerRegisterTMM tmm3 = new AssemblerRegisterTMM(Register.TMM3);

		public static readonly AssemblerRegisterTMM tmm4 = new AssemblerRegisterTMM(Register.TMM4);

		public static readonly AssemblerRegisterTMM tmm5 = new AssemblerRegisterTMM(Register.TMM5);

		public static readonly AssemblerRegisterTMM tmm6 = new AssemblerRegisterTMM(Register.TMM6);

		public static readonly AssemblerRegisterTMM tmm7 = new AssemblerRegisterTMM(Register.TMM7);

		public static readonly AssemblerMemoryOperandFactory __ = new AssemblerMemoryOperandFactory(MemoryOperandSize.None);

		public static readonly AssemblerMemoryOperandFactory __byte_ptr = new AssemblerMemoryOperandFactory(MemoryOperandSize.Byte);

		public static readonly AssemblerMemoryOperandFactory __word_ptr = new AssemblerMemoryOperandFactory(MemoryOperandSize.Word);

		public static readonly AssemblerMemoryOperandFactory __dword_ptr = new AssemblerMemoryOperandFactory(MemoryOperandSize.Dword);

		public static readonly AssemblerMemoryOperandFactory __qword_ptr = new AssemblerMemoryOperandFactory(MemoryOperandSize.Qword);

		public static readonly AssemblerMemoryOperandFactory __mmword_ptr = new AssemblerMemoryOperandFactory(MemoryOperandSize.Qword);

		public static readonly AssemblerMemoryOperandFactory __tbyte_ptr = new AssemblerMemoryOperandFactory(MemoryOperandSize.Tbyte);

		public static readonly AssemblerMemoryOperandFactory __tword_ptr = new AssemblerMemoryOperandFactory(MemoryOperandSize.Tbyte);

		public static readonly AssemblerMemoryOperandFactory __fword_ptr = new AssemblerMemoryOperandFactory(MemoryOperandSize.Fword);

		public static readonly AssemblerMemoryOperandFactory __oword_ptr = new AssemblerMemoryOperandFactory(MemoryOperandSize.Xword);

		public static readonly AssemblerMemoryOperandFactory __xmmword_ptr = new AssemblerMemoryOperandFactory(MemoryOperandSize.Xword);

		public static readonly AssemblerMemoryOperandFactory __ymmword_ptr = new AssemblerMemoryOperandFactory(MemoryOperandSize.Yword);

		public static readonly AssemblerMemoryOperandFactory __zmmword_ptr = new AssemblerMemoryOperandFactory(MemoryOperandSize.Zword);

		public static readonly AssemblerMemoryOperandFactory __bcst = new AssemblerMemoryOperandFactory(MemoryOperandSize.None, Register.None, AssemblerOperandFlags.Broadcast);

		public static readonly AssemblerMemoryOperandFactory __word_bcst = new AssemblerMemoryOperandFactory(MemoryOperandSize.Word, Register.None, AssemblerOperandFlags.Broadcast);

		public static readonly AssemblerMemoryOperandFactory __dword_bcst = new AssemblerMemoryOperandFactory(MemoryOperandSize.Dword, Register.None, AssemblerOperandFlags.Broadcast);

		public static readonly AssemblerMemoryOperandFactory __qword_bcst = new AssemblerMemoryOperandFactory(MemoryOperandSize.Qword, Register.None, AssemblerOperandFlags.Broadcast);
	}
	public readonly struct AssemblerResult
	{
		public readonly BlockEncoderResult[] Result;

		internal AssemblerResult(BlockEncoderResult[] result)
		{
			Result = result;
		}

		public ulong GetLabelRIP(in Label label, int index = 0)
		{
			if (label.IsEmpty)
			{
				throw new ArgumentException("Invalid label. Must be created via Assembler.CreateLabel", "label");
			}
			if (label.InstructionIndex < 0)
			{
				throw new ArgumentException("The label is not associated with an instruction index. It must be emitted via Assembler.Label.", "label");
			}
			if (Result == null || (uint)index >= (uint)Result.Length)
			{
				throw new ArgumentOutOfRangeException("index");
			}
			BlockEncoderResult blockEncoderResult = Result[index];
			if (blockEncoderResult.NewInstructionOffsets == null || label.InstructionIndex >= blockEncoderResult.NewInstructionOffsets.Length)
			{
				object[] obj = new object[7] { label.InstructionIndex, null, null, null, null, null, null };
				uint[] newInstructionOffsets = blockEncoderResult.NewInstructionOffsets;
				obj[1] = ((newInstructionOffsets != null) ? newInstructionOffsets.Length : 0);
				obj[2] = "BlockEncoderOptions";
				obj[3] = "ReturnNewInstructionOffsets";
				obj[4] = "Assembler";
				obj[5] = "Assemble";
				obj[6] = "TryAssemble";
				throw new ArgumentOutOfRangeException("label", string.Format("The label instruction index {0} is out of range of the instruction offsets results {1}. Did you forget to pass {2}.{3} to {4}.{5}/{6}?", obj));
			}
			return blockEncoderResult.RIP + blockEncoderResult.NewInstructionOffsets[label.InstructionIndex];
		}
	}
	public struct Label : IEquatable<Label>
	{
		public readonly string Name;

		public readonly ulong Id;

		public int InstructionIndex { get; internal set; }

		public readonly bool IsEmpty => Id == 0;

		internal Label(string name, ulong id)
		{
			Name = name ?? "___label";
			Id = id;
			InstructionIndex = -1;
		}

		public override readonly string ToString()
		{
			return $"{Name}@{Id}";
		}

		public readonly bool Equals(Label other)
		{
			if (Name == other.Name)
			{
				return Id == other.Id;
			}
			return false;
		}

		public override readonly bool Equals(object? obj)
		{
			if (obj is Label other)
			{
				return Equals(other);
			}
			return false;
		}

		public override readonly int GetHashCode()
		{
			return (Name.GetHashCode() * 397) ^ Id.GetHashCode();
		}

		public static bool operator ==(Label left, Label right)
		{
			return left.Equals(right);
		}

		public static bool operator !=(Label left, Label right)
		{
			return !left.Equals(right);
		}
	}
	internal enum MemoryOperandSize
	{
		None,
		Byte,
		Word,
		Dword,
		Qword,
		Tbyte,
		Fword,
		Xword,
		Yword,
		Zword
	}
	public enum RelocKind
	{
		Offset64
	}
	public readonly struct RelocInfo
	{
		public readonly ulong Address;

		public readonly RelocKind Kind;

		public RelocInfo(RelocKind kind, ulong address)
		{
			Kind = kind;
			Address = address;
		}
	}
	public readonly struct InstructionBlock
	{
		public readonly CodeWriter CodeWriter;

		public readonly IList<Instruction> Instructions;

		public readonly ulong RIP;

		public InstructionBlock(CodeWriter codeWriter, IList<Instruction> instructions, ulong rip)
		{
			CodeWriter = codeWriter ?? throw new ArgumentNullException("codeWriter");
			Instructions = instructions ?? throw new ArgumentNullException("instructions");
			RIP = rip;
		}
	}
	public readonly struct BlockEncoderResult
	{
		public readonly ulong RIP;

		public readonly List<RelocInfo>? RelocInfos;

		public readonly uint[] NewInstructionOffsets;

		public readonly ConstantOffsets[] ConstantOffsets;

		internal BlockEncoderResult(ulong rip, List<RelocInfo> relocInfos, uint[] newInstructionOffsets, ConstantOffsets[] constantOffsets)
		{
			RIP = rip;
			RelocInfos = relocInfos;
			NewInstructionOffsets = newInstructionOffsets ?? Array2.Empty<uint>();
			ConstantOffsets = constantOffsets ?? Array2.Empty<ConstantOffsets>();
		}
	}
	[Flags]
	public enum BlockEncoderOptions
	{
		None = 0,
		DontFixBranches = 1,
		ReturnRelocInfos = 2,
		ReturnNewInstructionOffsets = 4,
		ReturnConstantOffsets = 8
	}
	public sealed class BlockEncoder
	{
		private sealed class NullCodeWriter : CodeWriter
		{
			public static readonly NullCodeWriter Instance = new NullCodeWriter();

			private NullCodeWriter()
			{
			}

			public override void WriteByte(byte value)
			{
			}
		}

		private readonly int bitness;

		private readonly BlockEncoderOptions options;

		private readonly Block[] blocks;

		private readonly Encoder nullEncoder;

		private readonly Dictionary<ulong, Instr> toInstr;

		internal int Bitness => bitness;

		internal bool FixBranches => (options & BlockEncoderOptions.DontFixBranches) == 0;

		private bool ReturnRelocInfos => (options & BlockEncoderOptions.ReturnRelocInfos) != 0;

		private bool ReturnNewInstructionOffsets => (options & BlockEncoderOptions.ReturnNewInstructionOffsets) != 0;

		private bool ReturnConstantOffsets => (options & BlockEncoderOptions.ReturnConstantOffsets) != 0;

		private BlockEncoder(int bitness, InstructionBlock[] instrBlocks, BlockEncoderOptions options)
		{
			if (bitness != 16 && bitness != 32 && bitness != 64)
			{
				throw new ArgumentOutOfRangeException("bitness");
			}
			if (instrBlocks == null)
			{
				throw new ArgumentNullException("instrBlocks");
			}
			this.bitness = bitness;
			nullEncoder = Encoder.Create(bitness, NullCodeWriter.Instance);
			this.options = options;
			blocks = new Block[instrBlocks.Length];
			int num = 0;
			for (int i = 0; i < instrBlocks.Length; i++)
			{
				IList<Instruction> instructions = instrBlocks[i].Instructions;
				if (instructions == null)
				{
					throw new ArgumentException();
				}
				Block block = new Block(this, instrBlocks[i].CodeWriter, instrBlocks[i].RIP, ReturnRelocInfos ? new List<RelocInfo>() : null);
				blocks[i] = block;
				Instr[] array = new Instr[instructions.Count];
				ulong num2 = instrBlocks[i].RIP;
				for (int j = 0; j < array.Length; j++)
				{
					Instruction instruction = instructions[j];
					Instr instr = Instr.Create(this, block, in instruction);
					instr.IP = num2;
					array[j] = instr;
					num++;
					num2 += instr.Size;
				}
				block.SetInstructions(array);
			}
			Array.Sort(blocks, (Block a, Block b) => a.RIP.CompareTo(b.RIP));
			Dictionary<ulong, Instr> dictionary = (toInstr = new Dictionary<ulong, Instr>(num));
			bool flag = false;
			Block[] array2 = blocks;
			for (int k = 0; k < array2.Length; k++)
			{
				Instr[] instructions2 = array2[k].Instructions;
				foreach (Instr instr2 in instructions2)
				{
					ulong origIP = instr2.OrigIP;
					if (dictionary.TryGetValue(origIP, out var _))
					{
						if (origIP != 0L)
						{
							throw new ArgumentException($"Multiple instructions with the same IP: 0x{origIP:X}");
						}
						flag = true;
					}
					else
					{
						dictionary[origIP] = instr2;
					}
				}
			}
			if (flag)
			{
				dictionary.Remove(0uL);
			}
			array2 = blocks;
			foreach (Block obj in array2)
			{
				ulong num3 = obj.RIP;
				Instr[] instructions2 = obj.Instructions;
				foreach (Instr instr3 in instructions2)
				{
					instr3.IP = num3;
					if (!instr3.Done)
					{
						instr3.Initialize(this);
					}
					num3 += instr3.Size;
				}
			}
		}

		public static bool TryEncode(int bitness, InstructionBlock block, [NotNullWhen(false)] out string? errorMessage, out BlockEncoderResult result, BlockEncoderOptions options = BlockEncoderOptions.None)
		{
			if (TryEncode(bitness, new InstructionBlock[1] { block }, out errorMessage, out BlockEncoderResult[] result2, options))
			{
				result = result2[0];
				return true;
			}
			result = default(BlockEncoderResult);
			return false;
		}

		public static bool TryEncode(int bitness, InstructionBlock[] blocks, [NotNullWhen(false)] out string? errorMessage, [NotNullWhen(true)] out BlockEncoderResult[]? result, BlockEncoderOptions options = BlockEncoderOptions.None)
		{
			return new BlockEncoder(bitness, blocks, options).Encode(out errorMessage, out result);
		}

		private bool Encode([NotNullWhen(false)] out string errorMessage, [NotNullWhen(true)] out BlockEncoderResult[] result)
		{
			Block[] array;
			for (int i = 0; i < 5; i++)
			{
				bool flag = false;
				array = blocks;
				foreach (Block obj in array)
				{
					ulong num = obj.RIP;
					ulong num2 = 0uL;
					Instr[] instructions = obj.Instructions;
					foreach (Instr instr in instructions)
					{
						instr.IP = num;
						if (!instr.Done)
						{
							uint size = instr.Size;
							if (instr.Optimize(num2))
							{
								if (instr.Size > size)
								{
									errorMessage = "Internal error: new size > old size";
									result = null;
									return false;
								}
								if (instr.Size < size)
								{
									num2 += size - instr.Size;
									flag = true;
								}
							}
							else if (instr.Size != size)
							{
								errorMessage = "Internal error: new size != old size";
								result = null;
								return false;
							}
						}
						num += instr.Size;
					}
				}
				if (!flag)
				{
					break;
				}
			}
			array = blocks;
			for (int j = 0; j < array.Length; j++)
			{
				array[j].InitializeData();
			}
			BlockEncoderResult[] array2 = new BlockEncoderResult[blocks.Length];
			for (int l = 0; l < blocks.Length; l++)
			{
				Block block = blocks[l];
				Encoder encoder = Encoder.Create(bitness, block.CodeWriter);
				ulong num3 = block.RIP;
				uint[] array3 = (ReturnNewInstructionOffsets ? new uint[block.Instructions.Length] : null);
				ConstantOffsets[] array4 = (ReturnConstantOffsets ? new ConstantOffsets[block.Instructions.Length] : null);
				Instr[] instructions2 = block.Instructions;
				for (int m = 0; m < instructions2.Length; m++)
				{
					Instr instr2 = instructions2[m];
					uint bytesWritten = block.CodeWriter.BytesWritten;
					bool isOriginalInstruction;
					if (array4 != null)
					{
						errorMessage = instr2.TryEncode(encoder, out array4[m], out isOriginalInstruction);
					}
					else
					{
						errorMessage = instr2.TryEncode(encoder, out var _, out isOriginalInstruction);
					}
					if (errorMessage != null)
					{
						result = null;
						return false;
					}
					uint num4 = block.CodeWriter.BytesWritten - bytesWritten;
					if (num4 != instr2.Size)
					{
						errorMessage = "Internal error: didn't write all bytes";
						result = null;
						return false;
					}
					if (array3 != null)
					{
						if (isOriginalInstruction)
						{
							array3[m] = (uint)(num3 - block.RIP);
						}
						else
						{
							array3[m] = uint.MaxValue;
						}
					}
					num3 += num4;
				}
				array2[l] = new BlockEncoderResult(block.RIP, block.relocInfos, array3, array4);
				block.WriteData();
			}
			errorMessage = null;
			result = array2;
			return true;
		}

		internal TargetInstr GetTarget(ulong address)
		{
			if (toInstr.TryGetValue(address, out var value))
			{
				return new TargetInstr(value);
			}
			return new TargetInstr(address);
		}

		internal uint GetInstructionSize(in Instruction instruction, ulong ip)
		{
			if (!nullEncoder.TryEncode(in instruction, ip, out uint encodedLength, out string _))
			{
				return 15u;
			}
			return encodedLength;
		}
	}
	public sealed class ByteArrayCodeReader : CodeReader
	{
		private readonly byte[] data;

		private int currentPosition;

		private readonly int startPosition;

		private readonly int endPosition;

		public int Position
		{
			get
			{
				return currentPosition - startPosition;
			}
			set
			{
				if ((uint)value > (uint)Count)
				{
					ThrowHelper.ThrowArgumentOutOfRangeException_value();
				}
				currentPosition = startPosition + value;
			}
		}

		public int Count => endPosition - startPosition;

		public bool CanReadByte => currentPosition < endPosition;

		public ByteArrayCodeReader(string hexData)
			: this(HexUtils.ToByteArray(hexData))
		{
		}

		public ByteArrayCodeReader(byte[] data)
		{
			if (data == null)
			{
				ThrowHelper.ThrowArgumentNullException_data();
			}
			this.data = data;
			currentPosition = 0;
			startPosition = 0;
			endPosition = data.Length;
		}

		public ByteArrayCodeReader(byte[] data, int index, int count)
		{
			if (data == null)
			{
				ThrowHelper.ThrowArgumentNullException_data();
			}
			this.data = data;
			if (index < 0)
			{
				ThrowHelper.ThrowArgumentOutOfRangeException_index();
			}
			if (count < 0)
			{
				ThrowHelper.ThrowArgumentOutOfRangeException_count();
			}
			if ((uint)(index + count) > (uint)data.Length)
			{
				ThrowHelper.ThrowArgumentOutOfRangeException_count();
			}
			currentPosition = index;
			startPosition = index;
			endPosition = index + count;
		}

		public ByteArrayCodeReader(ArraySegment<byte> data)
		{
			if (data.Array == null)
			{
				ThrowHelper.ThrowArgumentException();
			}
			this.data = data.Array;
			endPosition = (startPosition = (currentPosition = data.Offset)) + data.Count;
		}

		public override int ReadByte()
		{
			if (currentPosition >= endPosition)
			{
				return -1;
			}
			return data[currentPosition++];
		}
	}
	public enum Code
	{
		INVALID,
		DeclareByte,
		DeclareWord,
		DeclareDword,
		DeclareQword,
		Add_rm8_r8,
		Add_rm16_r16,
		Add_rm32_r32,
		Add_rm64_r64,
		Add_r8_rm8,
		Add_r16_rm16,
		Add_r32_rm32,
		Add_r64_rm64,
		Add_AL_imm8,
		Add_AX_imm16,
		Add_EAX_imm32,
		Add_RAX_imm32,
		Pushw_ES,
		Pushd_ES,
		Popw_ES,
		Popd_ES,
		Or_rm8_r8,
		Or_rm16_r16,
		Or_rm32_r32,
		Or_rm64_r64,
		Or_r8_rm8,
		Or_r16_rm16,
		Or_r32_rm32,
		Or_r64_rm64,
		Or_AL_imm8,
		Or_AX_imm16,
		Or_EAX_imm32,
		Or_RAX_imm32,
		Pushw_CS,
		Pushd_CS,
		Popw_CS,
		Adc_rm8_r8,
		Adc_rm16_r16,
		Adc_rm32_r32,
		Adc_rm64_r64,
		Adc_r8_rm8,
		Adc_r16_rm16,
		Adc_r32_rm32,
		Adc_r64_rm64,
		Adc_AL_imm8,
		Adc_AX_imm16,
		Adc_EAX_imm32,
		Adc_RAX_imm32,
		Pushw_SS,
		Pushd_SS,
		Popw_SS,
		Popd_SS,
		Sbb_rm8_r8,
		Sbb_rm16_r16,
		Sbb_rm32_r32,
		Sbb_rm64_r64,
		Sbb_r8_rm8,
		Sbb_r16_rm16,
		Sbb_r32_rm32,
		Sbb_r64_rm64,
		Sbb_AL_imm8,
		Sbb_AX_imm16,
		Sbb_EAX_imm32,
		Sbb_RAX_imm32,
		Pushw_DS,
		Pushd_DS,
		Popw_DS,
		Popd_DS,
		And_rm8_r8,
		And_rm16_r16,
		And_rm32_r32,
		And_rm64_r64,
		And_r8_rm8,
		And_r16_rm16,
		And_r32_rm32,
		And_r64_rm64,
		And_AL_imm8,
		And_AX_imm16,
		And_EAX_imm32,
		And_RAX_imm32,
		Daa,
		Sub_rm8_r8,
		Sub_rm16_r16,
		Sub_rm32_r32,
		Sub_rm64_r64,
		Sub_r8_rm8,
		Sub_r16_rm16,
		Sub_r32_rm32,
		Sub_r64_rm64,
		Sub_AL_imm8,
		Sub_AX_imm16,
		Sub_EAX_imm32,
		Sub_RAX_imm32,
		Das,
		Xor_rm8_r8,
		Xor_rm16_r16,
		Xor_rm32_r32,
		Xor_rm64_r64,
		Xor_r8_rm8,
		Xor_r16_rm16,
		Xor_r32_rm32,
		Xor_r64_rm64,
		Xor_AL_imm8,
		Xor_AX_imm16,
		Xor_EAX_imm32,
		Xor_RAX_imm32,
		Aaa,
		Cmp_rm8_r8,
		Cmp_rm16_r16,
		Cmp_rm32_r32,
		Cmp_rm64_r64,
		Cmp_r8_rm8,
		Cmp_r16_rm16,
		Cmp_r32_rm32,
		Cmp_r64_rm64,
		Cmp_AL_imm8,
		Cmp_AX_imm16,
		Cmp_EAX_imm32,
		Cmp_RAX_imm32,
		Aas,
		Inc_r16,
		Inc_r32,
		Dec_r16,
		Dec_r32,
		Push_r16,
		Push_r32,
		Push_r64,
		Pop_r16,
		Pop_r32,
		Pop_r64,
		Pushaw,
		Pushad,
		Popaw,
		Popad,
		Bound_r16_m1616,
		Bound_r32_m3232,
		Arpl_rm16_r16,
		Arpl_r32m16_r32,
		Movsxd_r16_rm16,
		Movsxd_r32_rm32,
		Movsxd_r64_rm32,
		Push_imm16,
		Pushd_imm32,
		Pushq_imm32,
		Imul_r16_rm16_imm16,
		Imul_r32_rm32_imm32,
		Imul_r64_rm64_imm32,
		Pushw_imm8,
		Pushd_imm8,
		Pushq_imm8,
		Imul_r16_rm16_imm8,
		Imul_r32_rm32_imm8,
		Imul_r64_rm64_imm8,
		Insb_m8_DX,
		Insw_m16_DX,
		Insd_m32_DX,
		Outsb_DX_m8,
		Outsw_DX_m16,
		Outsd_DX_m32,
		Jo_rel8_16,
		Jo_rel8_32,
		Jo_rel8_64,
		Jno_rel8_16,
		Jno_rel8_32,
		Jno_rel8_64,
		Jb_rel8_16,
		Jb_rel8_32,
		Jb_rel8_64,
		Jae_rel8_16,
		Jae_rel8_32,
		Jae_rel8_64,
		Je_rel8_16,
		Je_rel8_32,
		Je_rel8_64,
		Jne_rel8_16,
		Jne_rel8_32,
		Jne_rel8_64,
		Jbe_rel8_16,
		Jbe_rel8_32,
		Jbe_rel8_64,
		Ja_rel8_16,
		Ja_rel8_32,
		Ja_rel8_64,
		Js_rel8_16,
		Js_rel8_32,
		Js_rel8_64,
		Jns_rel8_16,
		Jns_rel8_32,
		Jns_rel8_64,
		Jp_rel8_16,
		Jp_rel8_32,
		Jp_rel8_64,
		Jnp_rel8_16,
		Jnp_rel8_32,
		Jnp_rel8_64,
		Jl_rel8_16,
		Jl_rel8_32,
		Jl_rel8_64,
		Jge_rel8_16,
		Jge_rel8_32,
		Jge_rel8_64,
		Jle_rel8_16,
		Jle_rel8_32,
		Jle_rel8_64,
		Jg_rel8_16,
		Jg_rel8_32,
		Jg_rel8_64,
		Add_rm8_imm8,
		Or_rm8_imm8,
		Adc_rm8_imm8,
		Sbb_rm8_imm8,
		And_rm8_imm8,
		Sub_rm8_imm8,
		Xor_rm8_imm8,
		Cmp_rm8_imm8,
		Add_rm16_imm16,
		Add_rm32_imm32,
		Add_rm64_imm32,
		Or_rm16_imm16,
		Or_rm32_imm32,
		Or_rm64_imm32,
		Adc_rm16_imm16,
		Adc_rm32_imm32,
		Adc_rm64_imm32,
		Sbb_rm16_imm16,
		Sbb_rm32_imm32,
		Sbb_rm64_imm32,
		And_rm16_imm16,
		And_rm32_imm32,
		And_rm64_imm32,
		Sub_rm16_imm16,
		Sub_rm32_imm32,
		Sub_rm64_imm32,
		Xor_rm16_imm16,
		Xor_rm32_imm32,
		Xor_rm64_imm32,
		Cmp_rm16_imm16,
		Cmp_rm32_imm32,
		Cmp_rm64_imm32,
		Add_rm8_imm8_82,
		Or_rm8_imm8_82,
		Adc_rm8_imm8_82,
		Sbb_rm8_imm8_82,
		And_rm8_imm8_82,
		Sub_rm8_imm8_82,
		Xor_rm8_imm8_82,
		Cmp_rm8_imm8_82,
		Add_rm16_imm8,
		Add_rm32_imm8,
		Add_rm64_imm8,
		Or_rm16_imm8,
		Or_rm32_imm8,
		Or_rm64_imm8,
		Adc_rm16_imm8,
		Adc_rm32_imm8,
		Adc_rm64_imm8,
		Sbb_rm16_imm8,
		Sbb_rm32_imm8,
		Sbb_rm64_imm8,
		And_rm16_imm8,
		And_rm32_imm8,
		And_rm64_imm8,
		Sub_rm16_imm8,
		Sub_rm32_imm8,
		Sub_rm64_imm8,
		Xor_rm16_imm8,
		Xor_rm32_imm8,
		Xor_rm64_imm8,
		Cmp_rm16_imm8,
		Cmp_rm32_imm8,
		Cmp_rm64_imm8,
		Test_rm8_r8,
		Test_rm16_r16,
		Test_rm32_r32,
		Test_rm64_r64,
		Xchg_rm8_r8,
		Xchg_rm16_r16,
		Xchg_rm32_r32,
		Xchg_rm64_r64,
		Mov_rm8_r8,
		Mov_rm16_r16,
		Mov_rm32_r32,
		Mov_rm64_r64,
		Mov_r8_rm8,
		Mov_r16_rm16,
		Mov_r32_rm32,
		Mov_r64_rm64,
		Mov_rm16_Sreg,
		Mov_r32m16_Sreg,
		Mov_r64m16_Sreg,
		Lea_r16_m,
		Lea_r32_m,
		Lea_r64_m,
		Mov_Sreg_rm16,
		Mov_Sreg_r32m16,
		Mov_Sreg_r64m16,
		Pop_rm16,
		Pop_rm32,
		Pop_rm64,
		Nopw,
		Nopd,
		Nopq,
		Xchg_r16_AX,
		Xchg_r32_EAX,
		Xchg_r64_RAX,
		Pause,
		Cbw,
		Cwde,
		Cdqe,
		Cwd,
		Cdq,
		Cqo,
		Call_ptr1616,
		Call_ptr1632,
		Wait,
		Pushfw,
		Pushfd,
		Pushfq,
		Popfw,
		Popfd,
		Popfq,
		Sahf,
		Lahf,
		Mov_AL_moffs8,
		Mov_AX_moffs16,
		Mov_EAX_moffs32,
		Mov_RAX_moffs64,
		Mov_moffs8_AL,
		Mov_moffs16_AX,
		Mov_moffs32_EAX,
		Mov_moffs64_RAX,
		Movsb_m8_m8,
		Movsw_m16_m16,
		Movsd_m32_m32,
		Movsq_m64_m64,
		Cmpsb_m8_m8,
		Cmpsw_m16_m16,
		Cmpsd_m32_m32,
		Cmpsq_m64_m64,
		Test_AL_imm8,
		Test_AX_imm16,
		Test_EAX_imm32,
		Test_RAX_imm32,
		Stosb_m8_AL,
		Stosw_m16_AX,
		Stosd_m32_EAX,
		Stosq_m64_RAX,
		Lodsb_AL_m8,
		Lodsw_AX_m16,
		Lodsd_EAX_m32,
		Lodsq_RAX_m64,
		Scasb_AL_m8,
		Scasw_AX_m16,
		Scasd_EAX_m32,
		Scasq_RAX_m64,
		Mov_r8_imm8,
		Mov_r16_imm16,
		Mov_r32_imm32,
		Mov_r64_imm64,
		Rol_rm8_imm8,
		Ror_rm8_imm8,
		Rcl_rm8_imm8,
		Rcr_rm8_imm8,
		Shl_rm8_imm8,
		Shr_rm8_imm8,
		Sal_rm8_imm8,
		Sar_rm8_imm8,
		Rol_rm16_imm8,
		Rol_rm32_imm8,
		Rol_rm64_imm8,
		Ror_rm16_imm8,
		Ror_rm32_imm8,
		Ror_rm64_imm8,
		Rcl_rm16_imm8,
		Rcl_rm32_imm8,
		Rcl_rm64_imm8,
		Rcr_rm16_imm8,
		Rcr_rm32_imm8,
		Rcr_rm64_imm8,
		Shl_rm16_imm8,
		Shl_rm32_imm8,
		Shl_rm64_imm8,
		Shr_rm16_imm8,
		Shr_rm32_imm8,
		Shr_rm64_imm8,
		Sal_rm16_imm8,
		Sal_rm32_imm8,
		Sal_rm64_imm8,
		Sar_rm16_imm8,
		Sar_rm32_imm8,
		Sar_rm64_imm8,
		Retnw_imm16,
		Retnd_imm16,
		Retnq_imm16,
		Retnw,
		Retnd,
		Retnq,
		Les_r16_m1616,
		Les_r32_m1632,
		Lds_r16_m1616,
		Lds_r32_m1632,
		Mov_rm8_imm8,
		Xabort_imm8,
		Mov_rm16_imm16,
		Mov_rm32_imm32,
		Mov_rm64_imm32,
		Xbegin_rel16,
		Xbegin_rel32,
		Enterw_imm16_imm8,
		Enterd_imm16_imm8,
		Enterq_imm16_imm8,
		Leavew,
		Leaved,
		Leaveq,
		Retfw_imm16,
		Retfd_imm16,
		Retfq_imm16,
		Retfw,
		Retfd,
		Retfq,
		Int3,
		Int_imm8,
		Into,
		Iretw,
		Iretd,
		Iretq,
		Rol_rm8_1,
		Ror_rm8_1,
		Rcl_rm8_1,
		Rcr_rm8_1,
		Shl_rm8_1,
		Shr_rm8_1,
		Sal_rm8_1,
		Sar_rm8_1,
		Rol_rm16_1,
		Rol_rm32_1,
		Rol_rm64_1,
		Ror_rm16_1,
		Ror_rm32_1,
		Ror_rm64_1,
		Rcl_rm16_1,
		Rcl_rm32_1,
		Rcl_rm64_1,
		Rcr_rm16_1,
		Rcr_rm32_1,
		Rcr_rm64_1,
		Shl_rm16_1,
		Shl_rm32_1,
		Shl_rm64_1,
		Shr_rm16_1,
		Shr_rm32_1,
		Shr_rm64_1,
		Sal_rm16_1,
		Sal_rm32_1,
		Sal_rm64_1,
		Sar_rm16_1,
		Sar_rm32_1,
		Sar_rm64_1,
		Rol_rm8_CL,
		Ror_rm8_CL,
		Rcl_rm8_CL,
		Rcr_rm8_CL,
		Shl_rm8_CL,
		Shr_rm8_CL,
		Sal_rm8_CL,
		Sar_rm8_CL,
		Rol_rm16_CL,
		Rol_rm32_CL,
		Rol_rm64_CL,
		Ror_rm16_CL,
		Ror_rm32_CL,
		Ror_rm64_CL,
		Rcl_rm16_CL,
		Rcl_rm32_CL,
		Rcl_rm64_CL,
		Rcr_rm16_CL,
		Rcr_rm32_CL,
		Rcr_rm64_CL,
		Shl_rm16_CL,
		Shl_rm32_CL,
		Shl_rm64_CL,
		Shr_rm16_CL,
		Shr_rm32_CL,
		Shr_rm64_CL,
		Sal_rm16_CL,
		Sal_rm32_CL,
		Sal_rm64_CL,
		Sar_rm16_CL,
		Sar_rm32_CL,
		Sar_rm64_CL,
		Aam_imm8,
		Aad_imm8,
		Salc,
		Xlat_m8,
		Fadd_m32fp,
		Fmul_m32fp,
		Fcom_m32fp,
		Fcomp_m32fp,
		Fsub_m32fp,
		Fsubr_m32fp,
		Fdiv_m32fp,
		Fdivr_m32fp,
		Fadd_st0_sti,
		Fmul_st0_sti,
		Fcom_st0_sti,
		Fcomp_st0_sti,
		Fsub_st0_sti,
		Fsubr_st0_sti,
		Fdiv_st0_sti,
		Fdivr_st0_sti,
		Fld_m32fp,
		Fst_m32fp,
		Fstp_m32fp,
		Fldenv_m14byte,
		Fldenv_m28byte,
		Fldcw_m2byte,
		Fnstenv_m14byte,
		Fstenv_m14byte,
		Fnstenv_m28byte,
		Fstenv_m28byte,
		Fnstcw_m2byte,
		Fstcw_m2byte,
		Fld_sti,
		Fxch_st0_sti,
		Fnop,
		Fstpnce_sti,
		Fchs,
		Fabs,
		Ftst,
		Fxam,
		Fld1,
		Fldl2t,
		Fldl2e,
		Fldpi,
		Fldlg2,
		Fldln2,
		Fldz,
		F2xm1,
		Fyl2x,
		Fptan,
		Fpatan,
		Fxtract,
		Fprem1,
		Fdecstp,
		Fincstp,
		Fprem,
		Fyl2xp1,
		Fsqrt,
		Fsincos,
		Frndint,
		Fscale,
		Fsin,
		Fcos,
		Fiadd_m32int,
		Fimul_m32int,
		Ficom_m32int,
		Ficomp_m32int,
		Fisub_m32int,
		Fisubr_m32int,
		Fidiv_m32int,
		Fidivr_m32int,
		Fcmovb_st0_sti,
		Fcmove_st0_sti,
		Fcmovbe_st0_sti,
		Fcmovu_st0_sti,
		Fucompp,
		Fild_m32int,
		Fisttp_m32int,
		Fist_m32int,
		Fistp_m32int,
		Fld_m80fp,
		Fstp_m80fp,
		Fcmovnb_st0_sti,
		Fcmovne_st0_sti,
		Fcmovnbe_st0_sti,
		Fcmovnu_st0_sti,
		Fneni,
		Feni,
		Fndisi,
		Fdisi,
		Fnclex,
		Fclex,
		Fninit,
		Finit,
		Fnsetpm,
		Fsetpm,
		Frstpm,
		Fucomi_st0_sti,
		Fcomi_st0_sti,
		Fadd_m64fp,
		Fmul_m64fp,
		Fcom_m64fp,
		Fcomp_m64fp,
		Fsub_m64fp,
		Fsubr_m64fp,
		Fdiv_m64fp,
		Fdivr_m64fp,
		Fadd_sti_st0,
		Fmul_sti_st0,
		Fcom_st0_sti_DCD0,
		Fcomp_st0_sti_DCD8,
		Fsubr_sti_st0,
		Fsub_sti_st0,
		Fdivr_sti_st0,
		Fdiv_sti_st0,
		Fld_m64fp,
		Fisttp_m64int,
		Fst_m64fp,
		Fstp_m64fp,
		Frstor_m94byte,
		Frstor_m108byte,
		Fnsave_m94byte,
		Fsave_m94byte,
		Fnsave_m108byte,
		Fsave_m108byte,
		Fnstsw_m2byte,
		Fstsw_m2byte,
		Ffree_sti,
		Fxch_st0_sti_DDC8,
		Fst_sti,
		Fstp_sti,
		Fucom_st0_sti,
		Fucomp_st0_sti,
		Fiadd_m16int,
		Fimul_m16int,
		Ficom_m16int,
		Ficomp_m16int,
		Fisub_m16int,
		Fisubr_m16int,
		Fidiv_m16int,
		Fidivr_m16int,
		Faddp_sti_st0,
		Fmulp_sti_st0,
		Fcomp_st0_sti_DED0,
		Fcompp,
		Fsubrp_sti_st0,
		Fsubp_sti_st0,
		Fdivrp_sti_st0,
		Fdivp_sti_st0,
		Fild_m16int,
		Fisttp_m16int,
		Fist_m16int,
		Fistp_m16int,
		Fbld_m80bcd,
		Fild_m64int,
		Fbstp_m80bcd,
		Fistp_m64int,
		Ffreep_sti,
		Fxch_st0_sti_DFC8,
		Fstp_sti_DFD0,
		Fstp_sti_DFD8,
		Fnstsw_AX,
		Fstsw_AX,
		Fstdw_AX,
		Fstsg_AX,
		Fucomip_st0_sti,
		Fcomip_st0_sti,
		Loopne_rel8_16_CX,
		Loopne_rel8_32_CX,
		Loopne_rel8_16_ECX,
		Loopne_rel8_32_ECX,
		Loopne_rel8_64_ECX,
		Loopne_rel8_16_RCX,
		Loopne_rel8_64_RCX,
		Loope_rel8_16_CX,
		Loope_rel8_32_CX,
		Loope_rel8_16_ECX,
		Loope_rel8_32_ECX,
		Loope_rel8_64_ECX,
		Loope_rel8_16_RCX,
		Loope_rel8_64_RCX,
		Loop_rel8_16_CX,
		Loop_rel8_32_CX,
		Loop_rel8_16_ECX,
		Loop_rel8_32_ECX,
		Loop_rel8_64_ECX,
		Loop_rel8_16_RCX,
		Loop_rel8_64_RCX,
		Jcxz_rel8_16,
		Jcxz_rel8_32,
		Jecxz_rel8_16,
		Jecxz_rel8_32,
		Jecxz_rel8_64,
		Jrcxz_rel8_16,
		Jrcxz_rel8_64,
		In_AL_imm8,
		In_AX_imm8,
		In_EAX_imm8,
		Out_imm8_AL,
		Out_imm8_AX,
		Out_imm8_EAX,
		Call_rel16,
		Call_rel32_32,
		Call_rel32_64,
		Jmp_rel16,
		Jmp_rel32_32,
		Jmp_rel32_64,
		Jmp_ptr1616,
		Jmp_ptr1632,
		Jmp_rel8_16,
		Jmp_rel8_32,
		Jmp_rel8_64,
		In_AL_DX,
		In_AX_DX,
		In_EAX_DX,
		Out_DX_AL,
		Out_DX_AX,
		Out_DX_EAX,
		Int1,
		Hlt,
		Cmc,
		Test_rm8_imm8,
		Test_rm8_imm8_F6r1,
		Not_rm8,
		Neg_rm8,
		Mul_rm8,
		Imul_rm8,
		Div_rm8,
		Idiv_rm8,
		Test_rm16_imm16,
		Test_rm32_imm32,
		Test_rm64_imm32,
		Test_rm16_imm16_F7r1,
		Test_rm32_imm32_F7r1,
		Test_rm64_imm32_F7r1,
		Not_rm16,
		Not_rm32,
		Not_rm64,
		Neg_rm16,
		Neg_rm32,
		Neg_rm64,
		Mul_rm16,
		Mul_rm32,
		Mul_rm64,
		Imul_rm16,
		Imul_rm32,
		Imul_rm64,
		Div_rm16,
		Div_rm32,
		Div_rm64,
		Idiv_rm16,
		Idiv_rm32,
		Idiv_rm64,
		Clc,
		Stc,
		Cli,
		Sti,
		Cld,
		Std,
		Inc_rm8,
		Dec_rm8,
		Inc_rm16,
		Inc_rm32,
		Inc_rm64,
		Dec_rm16,
		Dec_rm32,
		Dec_rm64,
		Call_rm16,
		Call_rm32,
		Call_rm64,
		Call_m1616,
		Call_m1632,
		Call_m1664,
		Jmp_rm16,
		Jmp_rm32,
		Jmp_rm64,
		Jmp_m1616,
		Jmp_m1632,
		Jmp_m1664,
		Push_rm16,
		Push_rm32,
		Push_rm64,
		Sldt_rm16,
		Sldt_r32m16,
		Sldt_r64m16,
		Str_rm16,
		Str_r32m16,
		Str_r64m16,
		Lldt_rm16,
		Lldt_r32m16,
		Lldt_r64m16,
		Ltr_rm16,
		Ltr_r32m16,
		Ltr_r64m16,
		Verr_rm16,
		Verr_r32m16,
		Verr_r64m16,
		Verw_rm16,
		Verw_r32m16,
		Verw_r64m16,
		Jmpe_rm16,
		Jmpe_rm32,
		Sgdt_m1632_16,
		Sgdt_m1632,
		Sgdt_m1664,
		Sidt_m1632_16,
		Sidt_m1632,
		Sidt_m1664,
		Lgdt_m1632_16,
		Lgdt_m1632,
		Lgdt_m1664,
		Lidt_m1632_16,
		Lidt_m1632,
		Lidt_m1664,
		Smsw_rm16,
		Smsw_r32m16,
		Smsw_r64m16,
		Rstorssp_m64,
		Lmsw_rm16,
		Lmsw_r32m16,
		Lmsw_r64m16,
		Invlpg_m,
		Enclv,
		Vmcall,
		Vmlaunch,
		Vmresume,
		Vmxoff,
		Pconfig,
		Monitorw,
		Monitord,
		Monitorq,
		Mwait,
		Clac,
		Stac,
		Encls,
		Xgetbv,
		Xsetbv,
		Vmfunc,
		Xend,
		Xtest,
		Enclu,
		Vmrunw,
		Vmrund,
		Vmrunq,
		Vmmcall,
		Vmloadw,
		Vmloadd,
		Vmloadq,
		Vmsavew,
		Vmsaved,
		Vmsaveq,
		Stgi,
		Clgi,
		Skinit,
		Invlpgaw,
		Invlpgad,
		Invlpgaq,
		Setssbsy,
		Saveprevssp,
		Rdpkru,
		Wrpkru,
		Swapgs,
		Rdtscp,
		Monitorxw,
		Monitorxd,
		Monitorxq,
		Mcommit,
		Mwaitx,
		Clzerow,
		Clzerod,
		Clzeroq,
		Rdpru,
		Lar_r16_rm16,
		Lar_r32_r32m16,
		Lar_r64_r64m16,
		Lsl_r16_rm16,
		Lsl_r32_r32m16,
		Lsl_r64_r64m16,
		Storeall,
		Loadall286,
		Syscall,
		Clts,
		Loadall386,
		Sysretd,
		Sysretq,
		Invd,
		Wbinvd,
		Wbnoinvd,
		Cl1invmb,
		Ud2,
		Reservednop_rm16_r16_0F0D,
		Reservednop_rm32_r32_0F0D,
		Reservednop_rm64_r64_0F0D,
		Prefetch_m8,
		Prefetchw_m8,
		Prefetchwt1_m8,
		Femms,
		Umov_rm8_r8,
		Umov_rm16_r16,
		Umov_rm32_r32,
		Umov_r8_rm8,
		Umov_r16_rm16,
		Umov_r32_rm32,
		Movups_xmm_xmmm128,
		VEX_Vmovups_xmm_xmmm128,
		VEX_Vmovups_ymm_ymmm256,
		EVEX_Vmovups_xmm_k1z_xmmm128,
		EVEX_Vmovups_ymm_k1z_ymmm256,
		EVEX_Vmovups_zmm_k1z_zmmm512,
		Movupd_xmm_xmmm128,
		VEX_Vmovupd_xmm_xmmm128,
		VEX_Vmovupd_ymm_ymmm256,
		EVEX_Vmovupd_xmm_k1z_xmmm128,
		EVEX_Vmovupd_ymm_k1z_ymmm256,
		EVEX_Vmovupd_zmm_k1z_zmmm512,
		Movss_xmm_xmmm32,
		VEX_Vmovss_xmm_xmm_xmm,
		VEX_Vmovss_xmm_m32,
		EVEX_Vmovss_xmm_k1z_xmm_xmm,
		EVEX_Vmovss_xmm_k1z_m32,
		Movsd_xmm_xmmm64,
		VEX_Vmovsd_xmm_xmm_xmm,
		VEX_Vmovsd_xmm_m64,
		EVEX_Vmovsd_xmm_k1z_xmm_xmm,
		EVEX_Vmovsd_xmm_k1z_m64,
		Movups_xmmm128_xmm,
		VEX_Vmovups_xmmm128_xmm,
		VEX_Vmovups_ymmm256_ymm,
		EVEX_Vmovups_xmmm128_k1z_xmm,
		EVEX_Vmovups_ymmm256_k1z_ymm,
		EVEX_Vmovups_zmmm512_k1z_zmm,
		Movupd_xmmm128_xmm,
		VEX_Vmovupd_xmmm128_xmm,
		VEX_Vmovupd_ymmm256_ymm,
		EVEX_Vmovupd_xmmm128_k1z_xmm,
		EVEX_Vmovupd_ymmm256_k1z_ymm,
		EVEX_Vmovupd_zmmm512_k1z_zmm,
		Movss_xmmm32_xmm,
		VEX_Vmovss_xmm_xmm_xmm_0F11,
		VEX_Vmovss_m32_xmm,
		EVEX_Vmovss_xmm_k1z_xmm_xmm_0F11,
		EVEX_Vmovss_m32_k1_xmm,
		Movsd_xmmm64_xmm,
		VEX_Vmovsd_xmm_xmm_xmm_0F11,
		VEX_Vmovsd_m64_xmm,
		EVEX_Vmovsd_xmm_k1z_xmm_xmm_0F11,
		EVEX_Vmovsd_m64_k1_xmm,
		Movhlps_xmm_xmm,
		Movlps_xmm_m64,
		VEX_Vmovhlps_xmm_xmm_xmm,
		VEX_Vmovlps_xmm_xmm_m64,
		EVEX_Vmovhlps_xmm_xmm_xmm,
		EVEX_Vmovlps_xmm_xmm_m64,
		Movlpd_xmm_m64,
		VEX_Vmovlpd_xmm_xmm_m64,
		EVEX_Vmovlpd_xmm_xmm_m64,
		Movsldup_xmm_xmmm128,
		VEX_Vmovsldup_xmm_xmmm128,
		VEX_Vmovsldup_ymm_ymmm256,
		EVEX_Vmovsldup_xmm_k1z_xmmm128,
		EVEX_Vmovsldup_ymm_k1z_ymmm256,
		EVEX_Vmovsldup_zmm_k1z_zmmm512,
		Movddup_xmm_xmmm64,
		VEX_Vmovddup_xmm_xmmm64,
		VEX_Vmovddup_ymm_ymmm256,
		EVEX_Vmovddup_xmm_k1z_xmmm64,
		EVEX_Vmovddup_ymm_k1z_ymmm256,
		EVEX_Vmovddup_zmm_k1z_zmmm512,
		Movlps_m64_xmm,
		VEX_Vmovlps_m64_xmm,
		EVEX_Vmovlps_m64_xmm,
		Movlpd_m64_xmm,
		VEX_Vmovlpd_m64_xmm,
		EVEX_Vmovlpd_m64_xmm,
		Unpcklps_xmm_xmmm128,
		VEX_Vunpcklps_xmm_xmm_xmmm128,
		VEX_Vunpcklps_ymm_ymm_ymmm256,
		EVEX_Vunpcklps_xmm_k1z_xmm_xmmm128b32,
		EVEX_Vunpcklps_ymm_k1z_ymm_ymmm256b32,
		EVEX_Vunpcklps_zmm_k1z_zmm_zmmm512b32,
		Unpcklpd_xmm_xmmm128,
		VEX_Vunpcklpd_xmm_xmm_xmmm128,
		VEX_Vunpcklpd_ymm_ymm_ymmm256,
		EVEX_Vunpcklpd_xmm_k1z_xmm_xmmm128b64,
		EVEX_Vunpcklpd_ymm_k1z_ymm_ymmm256b64,
		EVEX_Vunpcklpd_zmm_k1z_zmm_zmmm512b64,
		Unpckhps_xmm_xmmm128,
		VEX_Vunpckhps_xmm_xmm_xmmm128,
		VEX_Vunpckhps_ymm_ymm_ymmm256,
		EVEX_Vunpckhps_xmm_k1z_xmm_xmmm128b32,
		EVEX_Vunpckhps_ymm_k1z_ymm_ymmm256b32,
		EVEX_Vunpckhps_zmm_k1z_zmm_zmmm512b32,
		Unpckhpd_xmm_xmmm128,
		VEX_Vunpckhpd_xmm_xmm_xmmm128,
		VEX_Vunpckhpd_ymm_ymm_ymmm256,
		EVEX_Vunpckhpd_xmm_k1z_xmm_xmmm128b64,
		EVEX_Vunpckhpd_ymm_k1z_ymm_ymmm256b64,
		EVEX_Vunpckhpd_zmm_k1z_zmm_zmmm512b64,
		Movlhps_xmm_xmm,
		VEX_Vmovlhps_xmm_xmm_xmm,
		EVEX_Vmovlhps_xmm_xmm_xmm,
		Movhps_xmm_m64,
		VEX_Vmovhps_xmm_xmm_m64,
		EVEX_Vmovhps_xmm_xmm_m64,
		Movhpd_xmm_m64,
		VEX_Vmovhpd_xmm_xmm_m64,
		EVEX_Vmovhpd_xmm_xmm_m64,
		Movshdup_xmm_xmmm128,
		VEX_Vmovshdup_xmm_xmmm128,
		VEX_Vmovshdup_ymm_ymmm256,
		EVEX_Vmovshdup_xmm_k1z_xmmm128,
		EVEX_Vmovshdup_ymm_k1z_ymmm256,
		EVEX_Vmovshdup_zmm_k1z_zmmm512,
		Movhps_m64_xmm,
		VEX_Vmovhps_m64_xmm,
		EVEX_Vmovhps_m64_xmm,
		Movhpd_m64_xmm,
		VEX_Vmovhpd_m64_xmm,
		EVEX_Vmovhpd_m64_xmm,
		Reservednop_rm16_r16_0F18,
		Reservednop_rm32_r32_0F18,
		Reservednop_rm64_r64_0F18,
		Reservednop_rm16_r16_0F19,
		Reservednop_rm32_r32_0F19,
		Reservednop_rm64_r64_0F19,
		Reservednop_rm16_r16_0F1A,
		Reservednop_rm32_r32_0F1A,
		Reservednop_rm64_r64_0F1A,
		Reservednop_rm16_r16_0F1B,
		Reservednop_rm32_r32_0F1B,
		Reservednop_rm64_r64_0F1B,
		Reservednop_rm16_r16_0F1C,
		Reservednop_rm32_r32_0F1C,
		Reservednop_rm64_r64_0F1C,
		Reservednop_rm16_r16_0F1D,
		Reservednop_rm32_r32_0F1D,
		Reservednop_rm64_r64_0F1D,
		Reservednop_rm16_r16_0F1E,
		Reservednop_rm32_r32_0F1E,
		Reservednop_rm64_r64_0F1E,
		Reservednop_rm16_r16_0F1F,
		Reservednop_rm32_r32_0F1F,
		Reservednop_rm64_r64_0F1F,
		Prefetchnta_m8,
		Prefetcht0_m8,
		Prefetcht1_m8,
		Prefetcht2_m8,
		Bndldx_bnd_mib,
		Bndmov_bnd_bndm64,
		Bndmov_bnd_bndm128,
		Bndcl_bnd_rm32,
		Bndcl_bnd_rm64,
		Bndcu_bnd_rm32,
		Bndcu_bnd_rm64,
		Bndstx_mib_bnd,
		Bndmov_bndm64_bnd,
		Bndmov_bndm128_bnd,
		Bndmk_bnd_m32,
		Bndmk_bnd_m64,
		Bndcn_bnd_rm32,
		Bndcn_bnd_rm64,
		Cldemote_m8,
		Rdsspd_r32,
		Rdsspq_r64,
		Endbr64,
		Endbr32,
		Nop_rm16,
		Nop_rm32,
		Nop_rm64,
		Mov_r32_cr,
		Mov_r64_cr,
		Mov_r32_dr,
		Mov_r64_dr,
		Mov_cr_r32,
		Mov_cr_r64,
		Mov_dr_r32,
		Mov_dr_r64,
		Mov_r32_tr,
		Mov_tr_r32,
		Movaps_xmm_xmmm128,
		VEX_Vmovaps_xmm_xmmm128,
		VEX_Vmovaps_ymm_ymmm256,
		EVEX_Vmovaps_xmm_k1z_xmmm128,
		EVEX_Vmovaps_ymm_k1z_ymmm256,
		EVEX_Vmovaps_zmm_k1z_zmmm512,
		Movapd_xmm_xmmm128,
		VEX_Vmovapd_xmm_xmmm128,
		VEX_Vmovapd_ymm_ymmm256,
		EVEX_Vmovapd_xmm_k1z_xmmm128,
		EVEX_Vmovapd_ymm_k1z_ymmm256,
		EVEX_Vmovapd_zmm_k1z_zmmm512,
		Movaps_xmmm128_xmm,
		VEX_Vmovaps_xmmm128_xmm,
		VEX_Vmovaps_ymmm256_ymm,
		EVEX_Vmovaps_xmmm128_k1z_xmm,
		EVEX_Vmovaps_ymmm256_k1z_ymm,
		EVEX_Vmovaps_zmmm512_k1z_zmm,
		Movapd_xmmm128_xmm,
		VEX_Vmovapd_xmmm128_xmm,
		VEX_Vmovapd_ymmm256_ymm,
		EVEX_Vmovapd_xmmm128_k1z_xmm,
		EVEX_Vmovapd_ymmm256_k1z_ymm,
		EVEX_Vmovapd_zmmm512_k1z_zmm,
		Cvtpi2ps_xmm_mmm64,
		Cvtpi2pd_xmm_mmm64,
		Cvtsi2ss_xmm_rm32,
		Cvtsi2ss_xmm_rm64,
		VEX_Vcvtsi2ss_xmm_xmm_rm32,
		VEX_Vcvtsi2ss_xmm_xmm_rm64,
		EVEX_Vcvtsi2ss_xmm_xmm_rm32_er,
		EVEX_Vcvtsi2ss_xmm_xmm_rm64_er,
		Cvtsi2sd_xmm_rm32,
		Cvtsi2sd_xmm_rm64,
		VEX_Vcvtsi2sd_xmm_xmm_rm32,
		VEX_Vcvtsi2sd_xmm_xmm_rm64,
		EVEX_Vcvtsi2sd_xmm_xmm_rm32_er,
		EVEX_Vcvtsi2sd_xmm_xmm_rm64_er,
		Movntps_m128_xmm,
		VEX_Vmovntps_m128_xmm,
		VEX_Vmovntps_m256_ymm,
		EVEX_Vmovntps_m128_xmm,
		EVEX_Vmovntps_m256_ymm,
		EVEX_Vmovntps_m512_zmm,
		Movntpd_m128_xmm,
		VEX_Vmovntpd_m128_xmm,
		VEX_Vmovntpd_m256_ymm,
		EVEX_Vmovntpd_m128_xmm,
		EVEX_Vmovntpd_m256_ymm,
		EVEX_Vmovntpd_m512_zmm,
		Movntss_m32_xmm,
		Movntsd_m64_xmm,
		Cvttps2pi_mm_xmmm64,
		Cvttpd2pi_mm_xmmm128,
		Cvttss2si_r32_xmmm32,
		Cvttss2si_r64_xmmm32,
		VEX_Vcvttss2si_r32_xmmm32,
		VEX_Vcvttss2si_r64_xmmm32,
		EVEX_Vcvttss2si_r32_xmmm32_sae,
		EVEX_Vcvttss2si_r64_xmmm32_sae,
		Cvttsd2si_r32_xmmm64,
		Cvttsd2si_r64_xmmm64,
		VEX_Vcvttsd2si_r32_xmmm64,
		VEX_Vcvttsd2si_r64_xmmm64,
		EVEX_Vcvttsd2si_r32_xmmm64_sae,
		EVEX_Vcvttsd2si_r64_xmmm64_sae,
		Cvtps2pi_mm_xmmm64,
		Cvtpd2pi_mm_xmmm128,
		Cvtss2si_r32_xmmm32,
		Cvtss2si_r64_xmmm32,
		VEX_Vcvtss2si_r32_xmmm32,
		VEX_Vcvtss2si_r64_xmmm32,
		EVEX_Vcvtss2si_r32_xmmm32_er,
		EVEX_Vcvtss2si_r64_xmmm32_er,
		Cvtsd2si_r32_xmmm64,
		Cvtsd2si_r64_xmmm64,
		VEX_Vcvtsd2si_r32_xmmm64,
		VEX_Vcvtsd2si_r64_xmmm64,
		EVEX_Vcvtsd2si_r32_xmmm64_er,
		EVEX_Vcvtsd2si_r64_xmmm64_er,
		Ucomiss_xmm_xmmm32,
		VEX_Vucomiss_xmm_xmmm32,
		EVEX_Vucomiss_xmm_xmmm32_sae,
		Ucomisd_xmm_xmmm64,
		VEX_Vucomisd_xmm_xmmm64,
		EVEX_Vucomisd_xmm_xmmm64_sae,
		Comiss_xmm_xmmm32,
		Comisd_xmm_xmmm64,
		VEX_Vcomiss_xmm_xmmm32,
		VEX_Vcomisd_xmm_xmmm64,
		EVEX_Vcomiss_xmm_xmmm32_sae,
		EVEX_Vcomisd_xmm_xmmm64_sae,
		Wrmsr,
		Rdtsc,
		Rdmsr,
		Rdpmc,
		Sysenter,
		Sysexitd,
		Sysexitq,
		Getsecd,
		Cmovo_r16_rm16,
		Cmovo_r32_rm32,
		Cmovo_r64_rm64,
		Cmovno_r16_rm16,
		Cmovno_r32_rm32,
		Cmovno_r64_rm64,
		Cmovb_r16_rm16,
		Cmovb_r32_rm32,
		Cmovb_r64_rm64,
		Cmovae_r16_rm16,
		Cmovae_r32_rm32,
		Cmovae_r64_rm64,
		Cmove_r16_rm16,
		Cmove_r32_rm32,
		Cmove_r64_rm64,
		Cmovne_r16_rm16,
		Cmovne_r32_rm32,
		Cmovne_r64_rm64,
		Cmovbe_r16_rm16,
		Cmovbe_r32_rm32,
		Cmovbe_r64_rm64,
		Cmova_r16_rm16,
		Cmova_r32_rm32,
		Cmova_r64_rm64,
		Cmovs_r16_rm16,
		Cmovs_r32_rm32,
		Cmovs_r64_rm64,
		Cmovns_r16_rm16,
		Cmovns_r32_rm32,
		Cmovns_r64_rm64,
		Cmovp_r16_rm16,
		Cmovp_r32_rm32,
		Cmovp_r64_rm64,
		Cmovnp_r16_rm16,
		Cmovnp_r32_rm32,
		Cmovnp_r64_rm64,
		Cmovl_r16_rm16,
		Cmovl_r32_rm32,
		Cmovl_r64_rm64,
		Cmovge_r16_rm16,
		Cmovge_r32_rm32,
		Cmovge_r64_rm64,
		Cmovle_r16_rm16,
		Cmovle_r32_rm32,
		Cmovle_r64_rm64,
		Cmovg_r16_rm16,
		Cmovg_r32_rm32,
		Cmovg_r64_rm64,
		VEX_Kandw_kr_kr_kr,
		VEX_Kandq_kr_kr_kr,
		VEX_Kandb_kr_kr_kr,
		VEX_Kandd_kr_kr_kr,
		VEX_Kandnw_kr_kr_kr,
		VEX_Kandnq_kr_kr_kr,
		VEX_Kandnb_kr_kr_kr,
		VEX_Kandnd_kr_kr_kr,
		VEX_Knotw_kr_kr,
		VEX_Knotq_kr_kr,
		VEX_Knotb_kr_kr,
		VEX_Knotd_kr_kr,
		VEX_Korw_kr_kr_kr,
		VEX_Korq_kr_kr_kr,
		VEX_Korb_kr_kr_kr,
		VEX_Kord_kr_kr_kr,
		VEX_Kxnorw_kr_kr_kr,
		VEX_Kxnorq_kr_kr_kr,
		VEX_Kxnorb_kr_kr_kr,
		VEX_Kxnord_kr_kr_kr,
		VEX_Kxorw_kr_kr_kr,
		VEX_Kxorq_kr_kr_kr,
		VEX_Kxorb_kr_kr_kr,
		VEX_Kxord_kr_kr_kr,
		VEX_Kaddw_kr_kr_kr,
		VEX_Kaddq_kr_kr_kr,
		VEX_Kaddb_kr_kr_kr,
		VEX_Kaddd_kr_kr_kr,
		VEX_Kunpckwd_kr_kr_kr,
		VEX_Kunpckdq_kr_kr_kr,
		VEX_Kunpckbw_kr_kr_kr,
		Movmskps_r32_xmm,
		Movmskps_r64_xmm,
		VEX_Vmovmskps_r32_xmm,
		VEX_Vmovmskps_r64_xmm,
		VEX_Vmovmskps_r32_ymm,
		VEX_Vmovmskps_r64_ymm,
		Movmskpd_r32_xmm,
		Movmskpd_r64_xmm,
		VEX_Vmovmskpd_r32_xmm,
		VEX_Vmovmskpd_r64_xmm,
		VEX_Vmovmskpd_r32_ymm,
		VEX_Vmovmskpd_r64_ymm,
		Sqrtps_xmm_xmmm128,
		VEX_Vsqrtps_xmm_xmmm128,
		VEX_Vsqrtps_ymm_ymmm256,
		EVEX_Vsqrtps_xmm_k1z_xmmm128b32,
		EVEX_Vsqrtps_ymm_k1z_ymmm256b32,
		EVEX_Vsqrtps_zmm_k1z_zmmm512b32_er,
		Sqrtpd_xmm_xmmm128,
		VEX_Vsqrtpd_xmm_xmmm128,
		VEX_Vsqrtpd_ymm_ymmm256,
		EVEX_Vsqrtpd_xmm_k1z_xmmm128b64,
		EVEX_Vsqrtpd_ymm_k1z_ymmm256b64,
		EVEX_Vsqrtpd_zmm_k1z_zmmm512b64_er,
		Sqrtss_xmm_xmmm32,
		VEX_Vsqrtss_xmm_xmm_xmmm32,
		EVEX_Vsqrtss_xmm_k1z_xmm_xmmm32_er,
		Sqrtsd_xmm_xmmm64,
		VEX_Vsqrtsd_xmm_xmm_xmmm64,
		EVEX_Vsqrtsd_xmm_k1z_xmm_xmmm64_er,
		Rsqrtps_xmm_xmmm128,
		VEX_Vrsqrtps_xmm_xmmm128,
		VEX_Vrsqrtps_ymm_ymmm256,
		Rsqrtss_xmm_xmmm32,
		VEX_Vrsqrtss_xmm_xmm_xmmm32,
		Rcpps_xmm_xmmm128,
		VEX_Vrcpps_xmm_xmmm128,
		VEX_Vrcpps_ymm_ymmm256,
		Rcpss_xmm_xmmm32,
		VEX_Vrcpss_xmm_xmm_xmmm32,
		Andps_xmm_xmmm128,
		VEX_Vandps_xmm_xmm_xmmm128,
		VEX_Vandps_ymm_ymm_ymmm256,
		EVEX_Vandps_xmm_k1z_xmm_xmmm128b32,
		EVEX_Vandps_ymm_k1z_ymm_ymmm256b32,
		EVEX_Vandps_zmm_k1z_zmm_zmmm512b32,
		Andpd_xmm_xmmm128,
		VEX_Vandpd_xmm_xmm_xmmm128,
		VEX_Vandpd_ymm_ymm_ymmm256,
		EVEX_Vandpd_xmm_k1z_xmm_xmmm128b64,
		EVEX_Vandpd_ymm_k1z_ymm_ymmm256b64,
		EVEX_Vandpd_zmm_k1z_zmm_zmmm512b64,
		Andnps_xmm_xmmm128,
		VEX_Vandnps_xmm_xmm_xmmm128,
		VEX_Vandnps_ymm_ymm_ymmm256,
		EVEX_Vandnps_xmm_k1z_xmm_xmmm128b32,
		EVEX_Vandnps_ymm_k1z_ymm_ymmm256b32,
		EVEX_Vandnps_zmm_k1z_zmm_zmmm512b32,
		Andnpd_xmm_xmmm128,
		VEX_Vandnpd_xmm_xmm_xmmm128,
		VEX_Vandnpd_ymm_ymm_ymmm256,
		EVEX_Vandnpd_xmm_k1z_xmm_xmmm128b64,
		EVEX_Vandnpd_ymm_k1z_ymm_ymmm256b64,
		EVEX_Vandnpd_zmm_k1z_zmm_zmmm512b64,
		Orps_xmm_xmmm128,
		VEX_Vorps_xmm_xmm_xmmm128,
		VEX_Vorps_ymm_ymm_ymmm256,
		EVEX_Vorps_xmm_k1z_xmm_xmmm128b32,
		EVEX_Vorps_ymm_k1z_ymm_ymmm256b32,
		EVEX_Vorps_zmm_k1z_zmm_zmmm512b32,
		Orpd_xmm_xmmm128,
		VEX_Vorpd_xmm_xmm_xmmm128,
		VEX_Vorpd_ymm_ymm_ymmm256,
		EVEX_Vorpd_xmm_k1z_xmm_xmmm128b64,
		EVEX_Vorpd_ymm_k1z_ymm_ymmm256b64,
		EVEX_Vorpd_zmm_k1z_zmm_zmmm512b64,
		Xorps_xmm_xmmm128,
		VEX_Vxorps_xmm_xmm_xmmm128,
		VEX_Vxorps_ymm_ymm_ymmm256,
		EVEX_Vxorps_xmm_k1z_xmm_xmmm128b32,
		EVEX_Vxorps_ymm_k1z_ymm_ymmm256b32,
		EVEX_Vxorps_zmm_k1z_zmm_zmmm512b32,
		Xorpd_xmm_xmmm128,
		VEX_Vxorpd_xmm_xmm_xmmm128,
		VEX_Vxorpd_ymm_ymm_ymmm256,
		EVEX_Vxorpd_xmm_k1z_xmm_xmmm128b64,
		EVEX_Vxorpd_ymm_k1z_ymm_ymmm256b64,
		EVEX_Vxorpd_zmm_k1z_zmm_zmmm512b64,
		Addps_xmm_xmmm128,
		VEX_Vaddps_xmm_xmm_xmmm128,
		VEX_Vaddps_ymm_ymm_ymmm256,
		EVEX_Vaddps_xmm_k1z_xmm_xmmm128b32,
		EVEX_Vaddps_ymm_k1z_ymm_ymmm256b32,
		EVEX_Vaddps_zmm_k1z_zmm_zmmm512b32_er,
		Addpd_xmm_xmmm128,
		VEX_Vaddpd_xmm_xmm_xmmm128,
		VEX_Vaddpd_ymm_ymm_ymmm256,
		EVEX_Vaddpd_xmm_k1z_xmm_xmmm128b64,
		EVEX_Vaddpd_ymm_k1z_ymm_ymmm256b64,
		EVEX_Vaddpd_zmm_k1z_zmm_zmmm512b64_er,
		Addss_xmm_xmmm32,
		VEX_Vaddss_xmm_xmm_xmmm32,
		EVEX_Vaddss_xmm_k1z_xmm_xmmm32_er,
		Addsd_xmm_xmmm64,
		VEX_Vaddsd_xmm_xmm_xmmm64,
		EVEX_Vaddsd_xmm_k1z_xmm_xmmm64_er,
		Mulps_xmm_xmmm128,
		VEX_Vmulps_xmm_xmm_xmmm128,
		VEX_Vmulps_ymm_ymm_ymmm256,
		EVEX_Vmulps_xmm_k1z_xmm_xmmm128b32,
		EVEX_Vmulps_ymm_k1z_ymm_ymmm256b32,
		EVEX_Vmulps_zmm_k1z_zmm_zmmm512b32_er,
		Mulpd_xmm_xmmm128,
		VEX_Vmulpd_xmm_xmm_xmmm128,
		VEX_Vmulpd_ymm_ymm_ymmm256,
		EVEX_Vmulpd_xmm_k1z_xmm_xmmm128b64,
		EVEX_Vmulpd_ymm_k1z_ymm_ymmm256b64,
		EVEX_Vmulpd_zmm_k1z_zmm_zmmm512b64_er,
		Mulss_xmm_xmmm32,
		VEX_Vmulss_xmm_xmm_xmmm32,
		EVEX_Vmulss_xmm_k1z_xmm_xmmm32_er,
		Mulsd_xmm_xmmm64,
		VEX_Vmulsd_xmm_xmm_xmmm64,
		EVEX_Vmulsd_xmm_k1z_xmm_xmmm64_er,
		Cvtps2pd_xmm_xmmm64,
		VEX_Vcvtps2pd_xmm_xmmm64,
		VEX_Vcvtps2pd_ymm_xmmm128,
		EVEX_Vcvtps2pd_xmm_k1z_xmmm64b32,
		EVEX_Vcvtps2pd_ymm_k1z_xmmm128b32,
		EVEX_Vcvtps2pd_zmm_k1z_ymmm256b32_sae,
		Cvtpd2ps_xmm_xmmm128,
		VEX_Vcvtpd2ps_xmm_xmmm128,
		VEX_Vcvtpd2ps_xmm_ymmm256,
		EVEX_Vcvtpd2ps_xmm_k1z_xmmm128b64,
		EVEX_Vcvtpd2ps_xmm_k1z_ymmm256b64,
		EVEX_Vcvtpd2ps_ymm_k1z_zmmm512b64_er,
		Cvtss2sd_xmm_xmmm32,
		VEX_Vcvtss2sd_xmm_xmm_xmmm32,
		EVEX_Vcvtss2sd_xmm_k1z_xmm_xmmm32_sae,
		Cvtsd2ss_xmm_xmmm64,
		VEX_Vcvtsd2ss_xmm_xmm_xmmm64,
		EVEX_Vcvtsd2ss_xmm_k1z_xmm_xmmm64_er,
		Cvtdq2ps_xmm_xmmm128,
		VEX_Vcvtdq2ps_xmm_xmmm128,
		VEX_Vcvtdq2ps_ymm_ymmm256,
		EVEX_Vcvtdq2ps_xmm_k1z_xmmm128b32,
		EVEX_Vcvtdq2ps_ymm_k1z_ymmm256b32,
		EVEX_Vcvtdq2ps_zmm_k1z_zmmm512b32_er,
		EVEX_Vcvtqq2ps_xmm_k1z_xmmm128b64,
		EVEX_Vcvtqq2ps_xmm_k1z_ymmm256b64,
		EVEX_Vcvtqq2ps_ymm_k1z_zmmm512b64_er,
		Cvtps2dq_xmm_xmmm128,
		VEX_Vcvtps2dq_xmm_xmmm128,
		VEX_Vcvtps2dq_ymm_ymmm256,
		EVEX_Vcvtps2dq_xmm_k1z_xmmm128b32,
		EVEX_Vcvtps2dq_ymm_k1z_ymmm256b32,
		EVEX_Vcvtps2dq_zmm_k1z_zmmm512b32_er,
		Cvttps2dq_xmm_xmmm128,
		VEX_Vcvttps2dq_xmm_xmmm128,
		VEX_Vcvttps2dq_ymm_ymmm256,
		EVEX_Vcvttps2dq_xmm_k1z_xmmm128b32,
		EVEX_Vcvttps2dq_ymm_k1z_ymmm256b32,
		EVEX_Vcvttps2dq_zmm_k1z_zmmm512b32_sae,
		Subps_xmm_xmmm128,
		VEX_Vsubps_xmm_xmm_xmmm128,
		VEX_Vsubps_ymm_ymm_ymmm256,
		EVEX_Vsubps_xmm_k1z_xmm_xmmm128b32,
		EVEX_Vsubps_ymm_k1z_ymm_ymmm256b32,
		EVEX_Vsubps_zmm_k1z_zmm_zmmm512b32_er,
		Subpd_xmm_xmmm128,
		VEX_Vsubpd_xmm_xmm_xmmm128,
		VEX_Vsubpd_ymm_ymm_ymmm256,
		EVEX_Vsubpd_xmm_k1z_xmm_xmmm128b64,
		EVEX_Vsubpd_ymm_k1z_ymm_ymmm256b64,
		EVEX_Vsubpd_zmm_k1z_zmm_zmmm512b64_er,
		Subss_xmm_xmmm32,
		VEX_Vsubss_xmm_xmm_xmmm32,
		EVEX_Vsubss_xmm_k1z_xmm_xmmm32_er,
		Subsd_xmm_xmmm64,
		VEX_Vsubsd_xmm_xmm_xmmm64,
		EVEX_Vsubsd_xmm_k1z_xmm_xmmm64_er,
		Minps_xmm_xmmm128,
		VEX_Vminps_xmm_xmm_xmmm128,
		VEX_Vminps_ymm_ymm_ymmm256,
		EVEX_Vminps_xmm_k1z_xmm_xmmm128b32,
		EVEX_Vminps_ymm_k1z_ymm_ymmm256b32,
		EVEX_Vminps_zmm_k1z_zmm_zmmm512b32_sae,
		Minpd_xmm_xmmm128,
		VEX_Vminpd_xmm_xmm_xmmm128,
		VEX_Vminpd_ymm_ymm_ymmm256,
		EVEX_Vminpd_xmm_k1z_xmm_xmmm128b64,
		EVEX_Vminpd_ymm_k1z_ymm_ymmm256b64,
		EVEX_Vminpd_zmm_k1z_zmm_zmmm512b64_sae,
		Minss_xmm_xmmm32,
		VEX_Vminss_xmm_xmm_xmmm32,
		EVEX_Vminss_xmm_k1z_xmm_xmmm32_sae,
		Minsd_xmm_xmmm64,
		VEX_Vminsd_xmm_xmm_xmmm64,
		EVEX_Vminsd_xmm_k1z_xmm_xmmm64_sae,
		Divps_xmm_xmmm128,
		VEX_Vdivps_xmm_xmm_xmmm128,
		VEX_Vdivps_ymm_ymm_ymmm256,
		EVEX_Vdivps_xmm_k1z_xmm_xmmm128b32,
		EVEX_Vdivps_ymm_k1z_ymm_ymmm256b32,
		EVEX_Vdivps_zmm_k1z_zmm_zmmm512b32_er,
		Divpd_xmm_xmmm128,
		VEX_Vdivpd_xmm_xmm_xmmm128,
		VEX_Vdivpd_ymm_ymm_ymmm256,
		EVEX_Vdivpd_xmm_k1z_xmm_xmmm128b64,
		EVEX_Vdivpd_ymm_k1z_ymm_ymmm256b64,
		EVEX_Vdivpd_zmm_k1z_zmm_zmmm512b64_er,
		Divss_xmm_xmmm32,
		VEX_Vdivss_xmm_xmm_xmmm32,
		EVEX_Vdivss_xmm_k1z_xmm_xmmm32_er,
		Divsd_xmm_xmmm64,
		VEX_Vdivsd_xmm_xmm_xmmm64,
		EVEX_Vdivsd_xmm_k1z_xmm_xmmm64_er,
		Maxps_xmm_xmmm128,
		VEX_Vmaxps_xmm_xmm_xmmm128,
		VEX_Vmaxps_ymm_ymm_ymmm256,
		EVEX_Vmaxps_xmm_k1z_xmm_xmmm128b32,
		EVEX_Vmaxps_ymm_k1z_ymm_ymmm256b32,
		EVEX_Vmaxps_zmm_k1z_zmm_zmmm512b32_sae,
		Maxpd_xmm_xmmm128,
		VEX_Vmaxpd_xmm_xmm_xmmm128,
		VEX_Vmaxpd_ymm_ymm_ymmm256,
		EVEX_Vmaxpd_xmm_k1z_xmm_xmmm128b64,
		EVEX_Vmaxpd_ymm_k1z_ymm_ymmm256b64,
		EVEX_Vmaxpd_zmm_k1z_zmm_zmmm512b64_sae,
		Maxss_xmm_xmmm32,
		VEX_Vmaxss_xmm_xmm_xmmm32,
		EVEX_Vmaxss_xmm_k1z_xmm_xmmm32_sae,
		Maxsd_xmm_xmmm64,
		VEX_Vmaxsd_xmm_xmm_xmmm64,
		EVEX_Vmaxsd_xmm_k1z_xmm_xmmm64_sae,
		Punpcklbw_mm_mmm32,
		Punpcklbw_xmm_xmmm128,
		VEX_Vpunpcklbw_xmm_xmm_xmmm128,
		VEX_Vpunpcklbw_ymm_ymm_ymmm256,
		EVEX_Vpunpcklbw_xmm_k1z_xmm_xmmm128,
		EVEX_Vpunpcklbw_ymm_k1z_ymm_ymmm256,
		EVEX_Vpunpcklbw_zmm_k1z_zmm_zmmm512,
		Punpcklwd_mm_mmm32,
		Punpcklwd_xmm_xmmm128,
		VEX_Vpunpcklwd_xmm_xmm_xmmm128,
		VEX_Vpunpcklwd_ymm_ymm_ymmm256,
		EVEX_Vpunpcklwd_xmm_k1z_xmm_xmmm128,
		EVEX_Vpunpcklwd_ymm_k1z_ymm_ymmm256,
		EVEX_Vpunpcklwd_zmm_k1z_zmm_zmmm512,
		Punpckldq_mm_mmm32,
		Punpckldq_xmm_xmmm128,
		VEX_Vpunpckldq_xmm_xmm_xmmm128,
		VEX_Vpunpckldq_ymm_ymm_ymmm256,
		EVEX_Vpunpckldq_xmm_k1z_xmm_xmmm128b32,
		EVEX_Vpunpckldq_ymm_k1z_ymm_ymmm256b32,
		EVEX_Vpunpckldq_zmm_k1z_zmm_zmmm512b32,
		Packsswb_mm_mmm64,
		Packsswb_xmm_xmmm128,
		VEX_Vpacksswb_xmm_xmm_xmmm128,
		VEX_Vpacksswb_ymm_ymm_ymmm256,
		EVEX_Vpacksswb_xmm_k1z_xmm_xmmm128,
		EVEX_Vpacksswb_ymm_k1z_ymm_ymmm256,
		EVEX_Vpacksswb_zmm_k1z_zmm_zmmm512,
		Pcmpgtb_mm_mmm64,
		Pcmpgtb_xmm_xmmm128,
		VEX_Vpcmpgtb_xmm_xmm_xmmm128,
		VEX_Vpcmpgtb_ymm_ymm_ymmm256,
		EVEX_Vpcmpgtb_kr_k1_xmm_xmmm128,
		EVEX_Vpcmpgtb_kr_k1_ymm_ymmm256,
		EVEX_Vpcmpgtb_kr_k1_zmm_zmmm512,
		Pcmpgtw_mm_mmm64,
		Pcmpgtw_xmm_xmmm128,
		VEX_Vpcmpgtw_xmm_xmm_xmmm128,
		VEX_Vpcmpgtw_ymm_ymm_ymmm256,
		EVEX_Vpcmpgtw_kr_k1_xmm_xmmm128,
		EVEX_Vpcmpgtw_kr_k1_ymm_ymmm256,
		EVEX_Vpcmpgtw_kr_k1_zmm_zmmm512,
		Pcmpgtd_mm_mmm64,
		Pcmpgtd_xmm_xmmm128,
		VEX_Vpcmpgtd_xmm_xmm_xmmm128,
		VEX_Vpcmpgtd_ymm_ymm_ymmm256,
		EVEX_Vpcmpgtd_kr_k1_xmm_xmmm128b32,
		EVEX_Vpcmpgtd_kr_k1_ymm_ymmm256b32,
		EVEX_Vpcmpgtd_kr_k1_zmm_zmmm512b32,
		Packuswb_mm_mmm64,
		Packuswb_xmm_xmmm128,
		VEX_Vpackuswb_xmm_xmm_xmmm128,
		VEX_Vpackuswb_ymm_ymm_ymmm256,
		EVEX_Vpackuswb_xmm_k1z_xmm_xmmm128,
		EVEX_Vpackuswb_ymm_k1z_ymm_ymmm256,
		EVEX_Vpackuswb_zmm_k1z_zmm_zmmm512,
		Punpckhbw_mm_mmm64,
		Punpckhbw_xmm_xmmm128,
		VEX_Vpunpckhbw_xmm_xmm_xmmm128,
		VEX_Vpunpckhbw_ymm_ymm_ymmm256,
		EVEX_Vpunpckhbw_xmm_k1z_xmm_xmmm128,
		EVEX_Vpunpckhbw_ymm_k1z_ymm_ymmm256,
		EVEX_Vpunpckhbw_zmm_k1z_zmm_zmmm512,
		Punpckhwd_mm_mmm64,
		Punpckhwd_xmm_xmmm128,
		VEX_Vpunpckhwd_xmm_xmm_xmmm128,
		VEX_Vpunpckhwd_ymm_ymm_ymmm256,
		EVEX_Vpunpckhwd_xmm_k1z_xmm_xmmm128,
		EVEX_Vpunpckhwd_ymm_k1z_ymm_ymmm256,
		EVEX_Vpunpckhwd_zmm_k1z_zmm_zmmm512,
		Punpckhdq_mm_mmm64,
		Punpckhdq_xmm_xmmm128,
		VEX_Vpunpckhdq_xmm_xmm_xmmm128,
		VEX_Vpunpckhdq_ymm_ymm_ymmm256,
		EVEX_Vpunpckhdq_xmm_k1z_xmm_xmmm128b32,
		EVEX_Vpunpckhdq_ymm_k1z_ymm_ymmm256b32,
		EVEX_Vpunpckhdq_zmm_k1z_zmm_zmmm512b32,
		Packssdw_mm_mmm64,
		Packssdw_xmm_xmmm128,
		VEX_Vpackssdw_xmm_xmm_xmmm128,
		VEX_Vpackssdw_ymm_ymm_ymmm256,
		EVEX_Vpackssdw_xmm_k1z_xmm_xmmm128b32,
		EVEX_Vpackssdw_ymm_k1z_ymm_ymmm256b32,
		EVEX_Vpackssdw_zmm_k1z_zmm_zmmm512b32,
		Punpcklqdq_xmm_xmmm128,
		VEX_Vpunpcklqdq_xmm_xmm_xmmm128,
		VEX_Vpunpcklqdq_ymm_ymm_ymmm256,
		EVEX_Vpunpcklqdq_xmm_k1z_xmm_xmmm128b64,
		EVEX_Vpunpcklqdq_ymm_k1z_ymm_ymmm256b64,
		EVEX_Vpunpcklqdq_zmm_k1z_zmm_zmmm512b64,
		Punpckhqdq_xmm_xmmm128,
		VEX_Vpunpckhqdq_xmm_xmm_xmmm128,
		VEX_Vpunpckhqdq_ymm_ymm_ymmm256,
		EVEX_Vpunpckhqdq_xmm_k1z_xmm_xmmm128b64,
		EVEX_Vpunpckhqdq_ymm_k1z_ymm_ymmm256b64,
		EVEX_Vpunpckhqdq_zmm_k1z_zmm_zmmm512b64,
		Movd_mm_rm32,
		Movq_mm_rm64,
		Movd_xmm_rm32,
		Movq_xmm_rm64,
		VEX_Vmovd_xmm_rm32,
		VEX_Vmovq_xmm_rm64,
		EVEX_Vmovd_xmm_rm32,
		EVEX_Vmovq_xmm_rm64,
		Movq_mm_mmm64,
		Movdqa_xmm_xmmm128,
		VEX_Vmovdqa_xmm_xmmm128,
		VEX_Vmovdqa_ymm_ymmm256,
		EVEX_Vmovdqa32_xmm_k1z_xmmm128,
		EVEX_Vmovdqa32_ymm_k1z_ymmm256,
		EVEX_Vmovdqa32_zmm_k1z_zmmm512,
		EVEX_Vmovdqa64_xmm_k1z_xmmm128,
		EVEX_Vmovdqa64_ymm_k1z_ymmm256,
		EVEX_Vmovdqa64_zmm_k1z_zmmm512,
		Movdqu_xmm_xmmm128,
		VEX_Vmovdqu_xmm_xmmm128,
		VEX_Vmovdqu_ymm_ymmm256,
		EVEX_Vmovdqu32_xmm_k1z_xmmm128,
		EVEX_Vmovdqu32_ymm_k1z_ymmm256,
		EVEX_Vmovdqu32_zmm_k1z_zmmm512,
		EVEX_Vmovdqu64_xmm_k1z_xmmm128,
		EVEX_Vmovdqu64_ymm_k1z_ymmm256,
		EVEX_Vmovdqu64_zmm_k1z_zmmm512,
		EVEX_Vmovdqu8_xmm_k1z_xmmm128,
		EVEX_Vmovdqu8_ymm_k1z_ymmm256,
		EVEX_Vmovdqu8_zmm_k1z_zmmm512,
		EVEX_Vmovdqu16_xmm_k1z_xmmm128,
		EVEX_Vmovdqu16_ymm_k1z_ymmm256,
		EVEX_Vmovdqu16_zmm_k1z_zmmm512,
		Pshufw_mm_mmm64_imm8,
		Pshufd_xmm_xmmm128_imm8,
		VEX_Vpshufd_xmm_xmmm128_imm8,
		VEX_Vpshufd_ymm_ymmm256_imm8,
		EVEX_Vpshufd_xmm_k1z_xmmm128b32_imm8,
		EVEX_Vpshufd_ymm_k1z_ymmm256b32_imm8,
		EVEX_Vpshufd_zmm_k1z_zmmm512b32_imm8,
		Pshufhw_xmm_xmmm128_imm8,
		VEX_Vpshufhw_xmm_xmmm128_imm8,
		VEX_Vpshufhw_ymm_ymmm256_imm8,
		EVEX_Vpshufhw_xmm_k1z_xmmm128_imm8,
		EVEX_Vpshufhw_ymm_k1z_ymmm256_imm8,
		EVEX_Vpshufhw_zmm_k1z_zmmm512_imm8,
		Pshuflw_xmm_xmmm128_imm8,
		VEX_Vpshuflw_xmm_xmmm128_imm8,
		VEX_Vpshuflw_ymm_ymmm256_imm8,
		EVEX_Vpshuflw_xmm_k1z_xmmm128_imm8,
		EVEX_Vpshuflw_ymm_k1z_ymmm256_imm8,
		EVEX_Vpshuflw_zmm_k1z_zmmm512_imm8,
		Psrlw_mm_imm8,
		Psrlw_xmm_imm8,
		VEX_Vpsrlw_xmm_xmm_imm8,
		VEX_Vpsrlw_ymm_ymm_imm8,
		EVEX_Vpsrlw_xmm_k1z_xmmm128_imm8,
		EVEX_Vpsrlw_ymm_k1z_ymmm256_imm8,
		EVEX_Vpsrlw_zmm_k1z_zmmm512_imm8,
		Psraw_mm_imm8,
		Psraw_xmm_imm8,
		VEX_Vpsraw_xmm_xmm_imm8,
		VEX_Vpsraw_ymm_ymm_imm8,
		EVEX_Vpsraw_xmm_k1z_xmmm128_imm8,
		EVEX_Vpsraw_ymm_k1z_ymmm256_imm8,
		EVEX_Vpsraw_zmm_k1z_zmmm512_imm8,
		Psllw_mm_imm8,
		Psllw_xmm_imm8,
		VEX_Vpsllw_xmm_xmm_imm8,
		VEX_Vpsllw_ymm_ymm_imm8,
		EVEX_Vpsllw_xmm_k1z_xmmm128_imm8,
		EVEX_Vpsllw_ymm_k1z_ymmm256_imm8,
		EVEX_Vpsllw_zmm_k1z_zmmm512_imm8,
		EVEX_Vprord_xmm_k1z_xmmm128b32_imm8,
		EVEX_Vprord_ymm_k1z_ymmm256b32_imm8,
		EVEX_Vprord_zmm_k1z_zmmm512b32_imm8,
		EVEX_Vprorq_xmm_k1z_xmmm128b64_imm8,
		EVEX_Vprorq_ymm_k1z_ymmm256b64_imm8,
		EVEX_Vprorq_zmm_k1z_zmmm512b64_imm8,
		EVEX_Vprold_xmm_k1z_xmmm128b32_imm8,
		EVEX_Vprold_ymm_k1z_ymmm256b32_imm8,
		EVEX_Vprold_zmm_k1z_zmmm512b32_imm8,
		EVEX_Vprolq_xmm_k1z_xmmm128b64_imm8,
		EVEX_Vprolq_ymm_k1z_ymmm256b64_imm8,
		EVEX_Vprolq_zmm_k1z_zmmm512b64_imm8,
		Psrld_mm_imm8,
		Psrld_xmm_imm8,
		VEX_Vpsrld_xmm_xmm_imm8,
		VEX_Vpsrld_ymm_ymm_imm8,
		EVEX_Vpsrld_xmm_k1z_xmmm128b32_imm8,
		EVEX_Vpsrld_ymm_k1z_ymmm256b32_imm8,
		EVEX_Vpsrld_zmm_k1z_zmmm512b32_imm8,
		Psrad_mm_imm8,
		Psrad_xmm_imm8,
		VEX_Vpsrad_xmm_xmm_imm8,
		VEX_Vpsrad_ymm_ymm_imm8,
		EVEX_Vpsrad_xmm_k1z_xmmm128b32_imm8,
		EVEX_Vpsrad_ymm_k1z_ymmm256b32_imm8,
		EVEX_Vpsrad_zmm_k1z_zmmm512b32_imm8,
		EVEX_Vpsraq_xmm_k1z_xmmm128b64_imm8,
		EVEX_Vpsraq_ymm_k1z_ymmm256b64_imm8,
		EVEX_Vpsraq_zmm_k1z_zmmm512b64_imm8,
		Pslld_mm_imm8,
		Pslld_xmm_imm8,
		VEX_Vpslld_xmm_xmm_imm8,
		VEX_Vpslld_ymm_ymm_imm8,
		EVEX_Vpslld_xmm_k1z_xmmm128b32_imm8,
		EVEX_Vpslld_ymm_k1z_ymmm256b32_imm8,
		EVEX_Vpslld_zmm_k1z_zmmm512b32_imm8,
		Psrlq_mm_imm8,
		Psrlq_xmm_imm8,
		VEX_Vpsrlq_xmm_xmm_imm8,
		VEX_Vpsrlq_ymm_ymm_imm8,
		EVEX_Vpsrlq_xmm_k1z_xmmm128b64_imm8,
		EVEX_Vpsrlq_ymm_k1z_ymmm256b64_imm8,
		EVEX_Vpsrlq_zmm_k1z_zmmm512b64_imm8,
		Psrldq_xmm_imm8,
		VEX_Vpsrldq_xmm_xmm_imm8,
		VEX_Vpsrldq_ymm_ymm_imm8,
		EVEX_Vpsrldq_xmm_xmmm128_imm8,
		EVEX_Vpsrldq_ymm_ymmm256_imm8,
		EVEX_Vpsrldq_zmm_zmmm512_imm8,
		Psllq_mm_imm8,
		Psllq_xmm_imm8,
		VEX_Vpsllq_xmm_xmm_imm8,
		VEX_Vpsllq_ymm_ymm_imm8,
		EVEX_Vpsllq_xmm_k1z_xmmm128b64_imm8,
		EVEX_Vpsllq_ymm_k1z_ymmm256b64_imm8,
		EVEX_Vpsllq_zmm_k1z_zmmm512b64_imm8,
		Pslldq_xmm_imm8,
		VEX_Vpslldq_xmm_xmm_imm8,
		VEX_Vpslldq_ymm_ymm_imm8,
		EVEX_Vpslldq_xmm_xmmm128_imm8,
		EVEX_Vpslldq_ymm_ymmm256_imm8,
		EVEX_Vpslldq_zmm_zmmm512_imm8,
		Pcmpeqb_mm_mmm64,
		Pcmpeqb_xmm_xmmm128,
		VEX_Vpcmpeqb_xmm_xmm_xmmm128,
		VEX_Vpcmpeqb_ymm_ymm_ymmm256,
		EVEX_Vpcmpeqb_kr_k1_xmm_xmmm128,
		EVEX_Vpcmpeqb_kr_k1_ymm_ymmm256,
		EVEX_Vpcmpeqb_kr_k1_zmm_zmmm512,
		Pcmpeqw_mm_mmm64,
		Pcmpeqw_xmm_xmmm128,
		VEX_Vpcmpeqw_xmm_xmm_xmmm128,
		VEX_Vpcmpeqw_ymm_ymm_ymmm256,
		EVEX_Vpcmpeqw_kr_k1_xmm_xmmm128,
		EVEX_Vpcmpeqw_kr_k1_ymm_ymmm256,
		EVEX_Vpcmpeqw_kr_k1_zmm_zmmm512,
		Pcmpeqd_mm_mmm64,
		Pcmpeqd_xmm_xmmm128,
		VEX_Vpcmpeqd_xmm_xmm_xmmm128,
		VEX_Vpcmpeqd_ymm_ymm_ymmm256,
		EVEX_Vpcmpeqd_kr_k1_xmm_xmmm128b32,
		EVEX_Vpcmpeqd_kr_k1_ymm_ymmm256b32,
		EVEX_Vpcmpeqd_kr_k1_zmm_zmmm512b32,
		Emms,
		VEX_Vzeroupper,
		VEX_Vzeroall,
		Vmread_rm32_r32,
		Vmread_rm64_r64,
		EVEX_Vcvttps2udq_xmm_k1z_xmmm128b32,
		EVEX_Vcvttps2udq_ymm_k1z_ymmm256b32,
		EVEX_Vcvttps2udq_zmm_k1z_zmmm512b32_sae,
		EVEX_Vcvttpd2udq_xmm_k1z_xmmm128b64,
		EVEX_Vcvttpd2udq_xmm_k1z_ymmm256b64,
		EVEX_Vcvttpd2udq_ymm_k1z_zmmm512b64_sae,
		Extrq_xmm_imm8_imm8,
		EVEX_Vcvttps2uqq_xmm_k1z_xmmm64b32,
		EVEX_Vcvttps2uqq_ymm_k1z_xmmm128b32,
		EVEX_Vcvttps2uqq_zmm_k1z_ymmm256b32_sae,
		EVEX_Vcvttpd2uqq_xmm_k1z_xmmm128b64,
		EVEX_Vcvttpd2uqq_ymm_k1z_ymmm256b64,
		EVEX_Vcvttpd2uqq_zmm_k1z_zmmm512b64_sae,
		EVEX_Vcvttss2usi_r32_xmmm32_sae,
		EVEX_Vcvttss2usi_r64_xmmm32_sae,
		Insertq_xmm_xmm_imm8_imm8,
		EVEX_Vcvttsd2usi_r32_xmmm64_sae,
		EVEX_Vcvttsd2usi_r64_xmmm64_sae,
		Vmwrite_r32_rm32,
		Vmwrite_r64_rm64,
		EVEX_Vcvtps2udq_xmm_k1z_xmmm128b32,
		EVEX_Vcvtps2udq_ymm_k1z_ymmm256b32,
		EVEX_Vcvtps2udq_zmm_k1z_zmmm512b32_er,
		EVEX_Vcvtpd2udq_xmm_k1z_xmmm128b64,
		EVEX_Vcvtpd2udq_xmm_k1z_ymmm256b64,
		EVEX_Vcvtpd2udq_ymm_k1z_zmmm512b64_er,
		Extrq_xmm_xmm,
		EVEX_Vcvtps2uqq_xmm_k1z_xmmm64b32,
		EVEX_Vcvtps2uqq_ymm_k1z_xmmm128b32,
		EVEX_Vcvtps2uqq_zmm_k1z_ymmm256b32_er,
		EVEX_Vcvtpd2uqq_xmm_k1z_xmmm128b64,
		EVEX_Vcvtpd2uqq_ymm_k1z_ymmm256b64,
		EVEX_Vcvtpd2uqq_zmm_k1z_zmmm512b64_er,
		EVEX_Vcvtss2usi_r32_xmmm32_er,
		EVEX_Vcvtss2usi_r64_xmmm32_er,
		Insertq_xmm_xmm,
		EVEX_Vcvtsd2usi_r32_xmmm64_er,
		EVEX_Vcvtsd2usi_r64_xmmm64_er,
		EVEX_Vcvttps2qq_xmm_k1z_xmmm64b32,
		EVEX_Vcvttps2qq_ymm_k1z_xmmm128b32,
		EVEX_Vcvttps2qq_zmm_k1z_ymmm256b32_sae,
		EVEX_Vcvttpd2qq_xmm_k1z_xmmm128b64,
		EVEX_Vcvttpd2qq_ymm_k1z_ymmm256b64,
		EVEX_Vcvttpd2qq_zmm_k1z_zmmm512b64_sae,
		EVEX_Vcvtudq2pd_xmm_k1z_xmmm64b32,
		EVEX_Vcvtudq2pd_ymm_k1z_xmmm128b32,
		EVEX_Vcvtudq2pd_zmm_k1z_ymmm256b32_er,
		EVEX_Vcvtuqq2pd_xmm_k1z_xmmm128b64,
		EVEX_Vcvtuqq2pd_ymm_k1z_ymmm256b64,
		EVEX_Vcvtuqq2pd_zmm_k1z_zmmm512b64_er,
		EVEX_Vcvtudq2ps_xmm_k1z_xmmm128b32,
		EVEX_Vcvtudq2ps_ymm_k1z_ymmm256b32,
		EVEX_Vcvtudq2ps_zmm_k1z_zmmm512b32_er,
		EVEX_Vcvtuqq2ps_xmm_k1z_xmmm128b64,
		EVEX_Vcvtuqq2ps_xmm_k1z_ymmm256b64,
		EVEX_Vcvtuqq2ps_ymm_k1z_zmmm512b64_er,
		EVEX_Vcvtps2qq_xmm_k1z_xmmm64b32,
		EVEX_Vcvtps2qq_ymm_k1z_xmmm128b32,
		EVEX_Vcvtps2qq_zmm_k1z_ymmm256b32_er,
		EVEX_Vcvtpd2qq_xmm_k1z_xmmm128b64,
		EVEX_Vcvtpd2qq_ymm_k1z_ymmm256b64,
		EVEX_Vcvtpd2qq_zmm_k1z_zmmm512b64_er,
		EVEX_Vcvtusi2ss_xmm_xmm_rm32_er,
		EVEX_Vcvtusi2ss_xmm_xmm_rm64_er,
		EVEX_Vcvtusi2sd_xmm_xmm_rm32_er,
		EVEX_Vcvtusi2sd_xmm_xmm_rm64_er,
		Haddpd_xmm_xmmm128,
		VEX_Vhaddpd_xmm_xmm_xmmm128,
		VEX_Vhaddpd_ymm_ymm_ymmm256,
		Haddps_xmm_xmmm128,
		VEX_Vhaddps_xmm_xmm_xmmm128,
		VEX_Vhaddps_ymm_ymm_ymmm256,
		Hsubpd_xmm_xmmm128,
		VEX_Vhsubpd_xmm_xmm_xmmm128,
		VEX_Vhsubpd_ymm_ymm_ymmm256,
		Hsubps_xmm_xmmm128,
		VEX_Vhsubps_xmm_xmm_xmmm128,
		VEX_Vhsubps_ymm_ymm_ymmm256,
		Movd_rm32_mm,
		Movq_rm64_mm,
		Movd_rm32_xmm,
		Movq_rm64_xmm,
		VEX_Vmovd_rm32_xmm,
		VEX_Vmovq_rm64_xmm,
		EVEX_Vmovd_rm32_xmm,
		EVEX_Vmovq_rm64_xmm,
		Movq_xmm_xmmm64,
		VEX_Vmovq_xmm_xmmm64,
		EVEX_Vmovq_xmm_xmmm64,
		Movq_mmm64_mm,
		Movdqa_xmmm128_xmm,
		VEX_Vmovdqa_xmmm128_xmm,
		VEX_Vmovdqa_ymmm256_ymm,
		EVEX_Vmovdqa32_xmmm128_k1z_xmm,
		EVEX_Vmovdqa32_ymmm256_k1z_ymm,
		EVEX_Vmovdqa32_zmmm512_k1z_zmm,
		EVEX_Vmovdqa64_xmmm128_k1z_xmm,
		EVEX_Vmovdqa64_ymmm256_k1z_ymm,
		EVEX_Vmovdqa64_zmmm512_k1z_zmm,
		Movdqu_xmmm128_xmm,
		VEX_Vmovdqu_xmmm128_xmm,
		VEX_Vmovdqu_ymmm256_ymm,
		EVEX_Vmovdqu32_xmmm128_k1z_xmm,
		EVEX_Vmovdqu32_ymmm256_k1z_ymm,
		EVEX_Vmovdqu32_zmmm512_k1z_zmm,
		EVEX_Vmovdqu64_xmmm128_k1z_xmm,
		EVEX_Vmovdqu64_ymmm256_k1z_ymm,
		EVEX_Vmovdqu64_zmmm512_k1z_zmm,
		EVEX_Vmovdqu8_xmmm128_k1z_xmm,
		EVEX_Vmovdqu8_ymmm256_k1z_ymm,
		EVEX_Vmovdqu8_zmmm512_k1z_zmm,
		EVEX_Vmovdqu16_xmmm128_k1z_xmm,
		EVEX_Vmovdqu16_ymmm256_k1z_ymm,
		EVEX_Vmovdqu16_zmmm512_k1z_zmm,
		Jo_rel16,
		Jo_rel32_32,
		Jo_rel32_64,
		Jno_rel16,
		Jno_rel32_32,
		Jno_rel32_64,
		Jb_rel16,
		Jb_rel32_32,
		Jb_rel32_64,
		Jae_rel16,
		Jae_rel32_32,
		Jae_rel32_64,
		Je_rel16,
		Je_rel32_32,
		Je_rel32_64,
		Jne_rel16,
		Jne_rel32_32,
		Jne_rel32_64,
		Jbe_rel16,
		Jbe_rel32_32,
		Jbe_rel32_64,
		Ja_rel16,
		Ja_rel32_32,
		Ja_rel32_64,
		Js_rel16,
		Js_rel32_32,
		Js_rel32_64,
		Jns_rel16,
		Jns_rel32_32,
		Jns_rel32_64,
		Jp_rel16,
		Jp_rel32_32,
		Jp_rel32_64,
		Jnp_rel16,
		Jnp_rel32_32,
		Jnp_rel32_64,
		Jl_rel16,
		Jl_rel32_32,
		Jl_rel32_64,
		Jge_rel16,
		Jge_rel32_32,
		Jge_rel32_64,
		Jle_rel16,
		Jle_rel32_32,
		Jle_rel32_64,
		Jg_rel16,
		Jg_rel32_32,
		Jg_rel32_64,
		Seto_rm8,
		Setno_rm8,
		Setb_rm8,
		Setae_rm8,
		Sete_rm8,
		Setne_rm8,
		Setbe_rm8,
		Seta_rm8,
		Sets_rm8,
		Setns_rm8,
		Setp_rm8,
		Setnp_rm8,
		Setl_rm8,
		Setge_rm8,
		Setle_rm8,
		Setg_rm8,
		VEX_Kmovw_kr_km16,
		VEX_Kmovq_kr_km64,
		VEX_Kmovb_kr_km8,
		VEX_Kmovd_kr_km32,
		VEX_Kmovw_m16_kr,
		VEX_Kmovq_m64_kr,
		VEX_Kmovb_m8_kr,
		VEX_Kmovd_m32_kr,
		VEX_Kmovw_kr_r32,
		VEX_Kmovb_kr_r32,
		VEX_Kmovd_kr_r32,
		VEX_Kmovq_kr_r64,
		VEX_Kmovw_r32_kr,
		VEX_Kmovb_r32_kr,
		VEX_Kmovd_r32_kr,
		VEX_Kmovq_r64_kr,
		VEX_Kortestw_kr_kr,
		VEX_Kortestq_kr_kr,
		VEX_Kortestb_kr_kr,
		VEX_Kortestd_kr_kr,
		VEX_Ktestw_kr_kr,
		VEX_Ktestq_kr_kr,
		VEX_Ktestb_kr_kr,
		VEX_Ktestd_kr_kr,
		Pushw_FS,
		Pushd_FS,
		Pushq_FS,
		Popw_FS,
		Popd_FS,
		Popq_FS,
		Cpuid,
		Bt_rm16_r16,
		Bt_rm32_r32,
		Bt_rm64_r64,
		Shld_rm16_r16_imm8,
		Shld_rm32_r32_imm8,
		Shld_rm64_r64_imm8,
		Shld_rm16_r16_CL,
		Shld_rm32_r32_CL,
		Shld_rm64_r64_CL,
		Montmul_16,
		Montmul_32,
		Montmul_64,
		Xsha1_16,
		Xsha1_32,
		Xsha1_64,
		Xsha256_16,
		Xsha256_32,
		Xsha256_64,
		Xbts_r16_rm16,
		Xbts_r32_rm32,
		Xstore_16,
		Xstore_32,
		Xstore_64,
		Xcryptecb_16,
		Xcryptecb_32,
		Xcryptecb_64,
		Xcryptcbc_16,
		Xcryptcbc_32,
		Xcryptcbc_64,
		Xcryptctr_16,
		Xcryptctr_32,
		Xcryptctr_64,
		Xcryptcfb_16,
		Xcryptcfb_32,
		Xcryptcfb_64,
		Xcryptofb_16,
		Xcryptofb_32,
		Xcryptofb_64,
		Ibts_rm16_r16,
		Ibts_rm32_r32,
		Cmpxchg486_rm8_r8,
		Cmpxchg486_rm16_r16,
		Cmpxchg486_rm32_r32,
		Pushw_GS,
		Pushd_GS,
		Pushq_GS,
		Popw_GS,
		Popd_GS,
		Popq_GS,
		Rsm,
		Bts_rm16_r16,
		Bts_rm32_r32,
		Bts_rm64_r64,
		Shrd_rm16_r16_imm8,
		Shrd_rm32_r32_imm8,
		Shrd_rm64_r64_imm8,
		Shrd_rm16_r16_CL,
		Shrd_rm32_r32_CL,
		Shrd_rm64_r64_CL,
		Fxsave_m512byte,
		Fxsave64_m512byte,
		Rdfsbase_r32,
		Rdfsbase_r64,
		Fxrstor_m512byte,
		Fxrstor64_m512byte,
		Rdgsbase_r32,
		Rdgsbase_r64,
		Ldmxcsr_m32,
		Wrfsbase_r32,
		Wrfsbase_r64,
		VEX_Vldmxcsr_m32,
		Stmxcsr_m32,
		Wrgsbase_r32,
		Wrgsbase_r64,
		VEX_Vstmxcsr_m32,
		Xsave_mem,
		Xsave64_mem,
		Ptwrite_rm32,
		Ptwrite_rm64,
		Xrstor_mem,
		Xrstor64_mem,
		Incsspd_r32,
		Incsspq_r64,
		Xsaveopt_mem,
		Xsaveopt64_mem,
		Clwb_m8,
		Tpause_r32,
		Tpause_r64,
		Clrssbsy_m64,
		Umonitor_r16,
		Umonitor_r32,
		Umonitor_r64,
		Umwait_r32,
		Umwait_r64,
		Clflush_m8,
		Clflushopt_m8,
		Lfence,
		Lfence_E9,
		Lfence_EA,
		Lfence_EB,
		Lfence_EC,
		Lfence_ED,
		Lfence_EE,
		Lfence_EF,
		Mfence,
		Mfence_F1,
		Mfence_F2,
		Mfence_F3,
		Mfence_F4,
		Mfence_F5,
		Mfence_F6,
		Mfence_F7,
		Sfence,
		Sfence_F9,
		Sfence_FA,
		Sfence_FB,
		Sfence_FC,
		Sfence_FD,
		Sfence_FE,
		Sfence_FF,
		Pcommit,
		Imul_r16_rm16,
		Imul_r32_rm32,
		Imul_r64_rm64,
		Cmpxchg_rm8_r8,
		Cmpxchg_rm16_r16,
		Cmpxchg_rm32_r32,
		Cmpxchg_rm64_r64,
		Lss_r16_m1616,
		Lss_r32_m1632,
		Lss_r64_m1664,
		Btr_rm16_r16,
		Btr_rm32_r32,
		Btr_rm64_r64,
		Lfs_r16_m1616,
		Lfs_r32_m1632,
		Lfs_r64_m1664,
		Lgs_r16_m1616,
		Lgs_r32_m1632,
		Lgs_r64_m1664,
		Movzx_r16_rm8,
		Movzx_r32_rm8,
		Movzx_r64_rm8,
		Movzx_r16_rm16,
		Movzx_r32_rm16,
		Movzx_r64_rm16,
		Jmpe_disp16,
		Jmpe_disp32,
		Popcnt_r16_rm16,
		Popcnt_r32_rm32,
		Popcnt_r64_rm64,
		Ud1_r16_rm16,
		Ud1_r32_rm32,
		Ud1_r64_rm64,
		Bt_rm16_imm8,
		Bt_rm32_imm8,
		Bt_rm64_imm8,
		Bts_rm16_imm8,
		Bts_rm32_imm8,
		Bts_rm64_imm8,
		Btr_rm16_imm8,
		Btr_rm32_imm8,
		Btr_rm64_imm8,
		Btc_rm16_imm8,
		Btc_rm32_imm8,
		Btc_rm64_imm8,
		Btc_rm16_r16,
		Btc_rm32_r32,
		Btc_rm64_r64,
		Bsf_r16_rm16,
		Bsf_r32_rm32,
		Bsf_r64_rm64,
		Tzcnt_r16_rm16,
		Tzcnt_r32_rm32,
		Tzcnt_r64_rm64,
		Bsr_r16_rm16,
		Bsr_r32_rm32,
		Bsr_r64_rm64,
		Lzcnt_r16_rm16,
		Lzcnt_r32_rm32,
		Lzcnt_r64_rm64,
		Movsx_r16_rm8,
		Movsx_r32_rm8,
		Movsx_r64_rm8,
		Movsx_r16_rm16,
		Movsx_r32_rm16,
		Movsx_r64_rm16,
		Xadd_rm8_r8,
		Xadd_rm16_r16,
		Xadd_rm32_r32,
		Xadd_rm64_r64,
		Cmpps_xmm_xmmm128_imm8,
		VEX_Vcmpps_xmm_xmm_xmmm128_imm8,
		VEX_Vcmpps_ymm_ymm_ymmm256_imm8,
		EVEX_Vcmpps_kr_k1_xmm_xmmm128b32_imm8,
		EVEX_Vcmpps_kr_k1_ymm_ymmm256b32_imm8,
		EVEX_Vcmpps_kr_k1_zmm_zmmm512b32_imm8_sae,
		Cmppd_xmm_xmmm128_imm8,
		VEX_Vcmppd_xmm_xmm_xmmm128_imm8,
		VEX_Vcmppd_ymm_ymm_ymmm256_imm8,
		EVEX_Vcmppd_kr_k1_xmm_xmmm128b64_imm8,
		EVEX_Vcmppd_kr_k1_ymm_ymmm256b64_imm8,
		EVEX_Vcmppd_kr_k1_zmm_zmmm512b64_imm8_sae,
		Cmpss_xmm_xmmm32_imm8,
		VEX_Vcmpss_xmm_xmm_xmmm32_imm8,
		EVEX_Vcmpss_kr_k1_xmm_xmmm32_imm8_sae,
		Cmpsd_xmm_xmmm64_imm8,
		VEX_Vcmpsd_xmm_xmm_xmmm64_imm8,
		EVEX_Vcmpsd_kr_k1_xmm_xmmm64_imm8_sae,
		Movnti_m32_r32,
		Movnti_m64_r64,
		Pinsrw_mm_r32m16_imm8,
		Pinsrw_mm_r64m16_imm8,
		Pinsrw_xmm_r32m16_imm8,
		Pinsrw_xmm_r64m16_imm8,
		VEX_Vpinsrw_xmm_xmm_r32m16_imm8,
		VEX_Vpinsrw_xmm_xmm_r64m16_imm8,
		EVEX_Vpinsrw_xmm_xmm_r32m16_imm8,
		EVEX_Vpinsrw_xmm_xmm_r64m16_imm8,
		Pextrw_r32_mm_imm8,
		Pextrw_r64_mm_imm8,
		Pextrw_r32_xmm_imm8,
		Pextrw_r64_xmm_imm8,
		VEX_Vpextrw_r32_xmm_imm8,
		VEX_Vpextrw_r64_xmm_imm8,
		EVEX_Vpextrw_r32_xmm_imm8,
		EVEX_Vpextrw_r64_xmm_imm8,
		Shufps_xmm_xmmm128_imm8,
		VEX_Vshufps_xmm_xmm_xmmm128_imm8,
		VEX_Vshufps_ymm_ymm_ymmm256_imm8,
		EVEX_Vshufps_xmm_k1z_xmm_xmmm128b32_imm8,
		EVEX_Vshufps_ymm_k1z_ymm_ymmm256b32_imm8,
		EVEX_Vshufps_zmm_k1z_zmm_zmmm512b32_imm8,
		Shufpd_xmm_xmmm128_imm8,
		VEX_Vshufpd_xmm_xmm_xmmm128_imm8,
		VEX_Vshufpd_ymm_ymm_ymmm256_imm8,
		EVEX_Vshufpd_xmm_k1z_xmm_xmmm128b64_imm8,
		EVEX_Vshufpd_ymm_k1z_ymm_ymmm256b64_imm8,
		EVEX_Vshufpd_zmm_k1z_zmm_zmmm512b64_imm8,
		Cmpxchg8b_m64,
		Cmpxchg16b_m128,
		Xrstors_mem,
		Xrstors64_mem,
		Xsavec_mem,
		Xsavec64_mem,
		Xsaves_mem,
		Xsaves64_mem,
		Vmptrld_m64,
		Vmclear_m64,
		Vmxon_m64,
		Rdrand_r16,
		Rdrand_r32,
		Rdrand_r64,
		Vmptrst_m64,
		Rdseed_r16,
		Rdseed_r32,
		Rdseed_r64,
		Rdpid_r32,
		Rdpid_r64,
		Bswap_r16,
		Bswap_r32,
		Bswap_r64,
		Addsubpd_xmm_xmmm128,
		VEX_Vaddsubpd_xmm_xmm_xmmm128,
		VEX_Vaddsubpd_ymm_ymm_ymmm256,
		Addsubps_xmm_xmmm128,
		VEX_Vaddsubps_xmm_xmm_xmmm128,
		VEX_Vaddsubps_ymm_ymm_ymmm256,
		Psrlw_mm_mmm64,
		Psrlw_xmm_xmmm128,
		VEX_Vpsrlw_xmm_xmm_xmmm128,
		VEX_Vpsrlw_ymm_ymm_xmmm128,
		EVEX_Vpsrlw_xmm_k1z_xmm_xmmm128,
		EVEX_Vpsrlw_ymm_k1z_ymm_xmmm128,
		EVEX_Vpsrlw_zmm_k1z_zmm_xmmm128,
		Psrld_mm_mmm64,
		Psrld_xmm_xmmm128,
		VEX_Vpsrld_xmm_xmm_xmmm128,
		VEX_Vpsrld_ymm_ymm_xmmm128,
		EVEX_Vpsrld_xmm_k1z_xmm_xmmm128,
		EVEX_Vpsrld_ymm_k1z_ymm_xmmm128,
		EVEX_Vpsrld_zmm_k1z_zmm_xmmm128,
		Psrlq_mm_mmm64,
		Psrlq_xmm_xmmm128,
		VEX_Vpsrlq_xmm_xmm_xmmm128,
		VEX_Vpsrlq_ymm_ymm_xmmm128,
		EVEX_Vpsrlq_xmm_k1z_xmm_xmmm128,
		EVEX_Vpsrlq_ymm_k1z_ymm_xmmm128,
		EVEX_Vpsrlq_zmm_k1z_zmm_xmmm128,
		Paddq_mm_mmm64,
		Paddq_xmm_xmmm128,
		VEX_Vpaddq_xmm_xmm_xmmm128,
		VEX_Vpaddq_ymm_ymm_ymmm256,
		EVEX_Vpaddq_xmm_k1z_xmm_xmmm128b64,
		EVEX_Vpaddq_ymm_k1z_ymm_ymmm256b64,
		EVEX_Vpaddq_zmm_k1z_zmm_zmmm512b64,
		Pmullw_mm_mmm64,
		Pmullw_xmm_xmmm128,
		VEX_Vpmullw_xmm_xmm_xmmm128,
		VEX_Vpmullw_ymm_ymm_ymmm256,
		EVEX_Vpmullw_xmm_k1z_xmm_xmmm128,
		EVEX_Vpmullw_ymm_k1z_ymm_ymmm256,
		EVEX_Vpmullw_zmm_k1z_zmm_zmmm512,
		Movq_xmmm64_xmm,
		VEX_Vmovq_xmmm64_xmm,
		EVEX_Vmovq_xmmm64_xmm,
		Movq2dq_xmm_mm,
		Movdq2q_mm_xmm,
		Pmovmskb_r32_mm,
		Pmovmskb_r64_mm,
		Pmovmskb_r32_xmm,
		Pmovmskb_r64_xmm,
		VEX_Vpmovmskb_r32_xmm,
		VEX_Vpmovmskb_r64_xmm,
		VEX_Vpmovmskb_r32_ymm,
		VEX_Vpmovmskb_r64_ymm,
		Psubusb_mm_mmm64,
		Psubusb_xmm_xmmm128,
		VEX_Vpsubusb_xmm_xmm_xmmm128,
		VEX_Vpsubusb_ymm_ymm_ymmm256,
		EVEX_Vpsubusb_xmm_k1z_xmm_xmmm128,
		EVEX_Vpsubusb_ymm_k1z_ymm_ymmm256,
		EVEX_Vpsubusb_zmm_k1z_zmm_zmmm512,
		Psubusw_mm_mmm64,
		Psubusw_xmm_xmmm128,
		VEX_Vpsubusw_xmm_xmm_xmmm128,
		VEX_Vpsubusw_ymm_ymm_ymmm256,
		EVEX_Vpsubusw_xmm_k1z_xmm_xmmm128,
		EVEX_Vpsubusw_ymm_k1z_ymm_ymmm256,
		EVEX_Vpsubusw_zmm_k1z_zmm_zmmm512,
		Pminub_mm_mmm64,
		Pminub_xmm_xmmm128,
		VEX_Vpminub_xmm_xmm_xmmm128,
		VEX_Vpminub_ymm_ymm_ymmm256,
		EVEX_Vpminub_xmm_k1z_xmm_xmmm128,
		EVEX_Vpminub_ymm_k1z_ymm_ymmm256,
		EVEX_Vpminub_zmm_k1z_zmm_zmmm512,
		Pand_mm_mmm64,
		Pand_xmm_xmmm128,
		VEX_Vpand_xmm_xmm_xmmm128,
		VEX_Vpand_ymm_ymm_ymmm256,
		EVEX_Vpandd_xmm_k1z_xmm_xmmm128b32,
		EVEX_Vpandd_ymm_k1z_ymm_ymmm256b32,
		EVEX_Vpandd_zmm_k1z_zmm_zmmm512b32,
		EVEX_Vpandq_xmm_k1z_xmm_xmmm128b64,
		EVEX_Vpandq_ymm_k1z_ymm_ymmm256b64,
		EVEX_Vpandq_zmm_k1z_zmm_zmmm512b64,
		Paddusb_mm_mmm64,
		Paddusb_xmm_xmmm128,
		VEX_Vpaddusb_xmm_xmm_xmmm128,
		VEX_Vpaddusb_ymm_ymm_ymmm256,
		EVEX_Vpaddusb_xmm_k1z_xmm_xmmm128,
		EVEX_Vpaddusb_ymm_k1z_ymm_ymmm256,
		EVEX_Vpaddusb_zmm_k1z_zmm_zmmm512,
		Paddusw_mm_mmm64,
		Paddusw_xmm_xmmm128,
		VEX_Vpaddusw_xmm_xmm_xmmm128,
		VEX_Vpaddusw_ymm_ymm_ymmm256,
		EVEX_Vpaddusw_xmm_k1z_xmm_xmmm128,
		EVEX_Vpaddusw_ymm_k1z_ymm_ymmm256,
		EVEX_Vpaddusw_zmm_k1z_zmm_zmmm512,
		Pmaxub_mm_mmm64,
		Pmaxub_xmm_xmmm128,
		VEX_Vpmaxub_xmm_xmm_xmmm128,
		VEX_Vpmaxub_ymm_ymm_ymmm256,
		EVEX_Vpmaxub_xmm_k1z_xmm_xmmm128,
		EVEX_Vpmaxub_ymm_k1z_ymm_ymmm256,
		EVEX_Vpmaxub_zmm_k1z_zmm_zmmm512,
		Pandn_mm_mmm64,
		Pandn_xmm_xmmm128,
		VEX_Vpandn_xmm_xmm_xmmm128,
		VEX_Vpandn_ymm_ymm_ymmm256,
		EVEX_Vpandnd_xmm_k1z_xmm_xmmm128b32,
		EVEX_Vpandnd_ymm_k1z_ymm_ymmm256b32,
		EVEX_Vpandnd_zmm_k1z_zmm_zmmm512b32,
		EVEX_Vpandnq_xmm_k1z_xmm_xmmm128b64,
		EVEX_Vpandnq_ymm_k1z_ymm_ymmm256b64,
		EVEX_Vpandnq_zmm_k1z_zmm_zmmm512b64,
		Pavgb_mm_mmm64,
		Pavgb_xmm_xmmm128,
		VEX_Vpavgb_xmm_xmm_xmmm128,
		VEX_Vpavgb_ymm_ymm_ymmm256,
		EVEX_Vpavgb_xmm_k1z_xmm_xmmm128,
		EVEX_Vpavgb_ymm_k1z_ymm_ymmm256,
		EVEX_Vpavgb_zmm_k1z_zmm_zmmm512,
		Psraw_mm_mmm64,
		Psraw_xmm_xmmm128,
		VEX_Vpsraw_xmm_xmm_xmmm128,
		VEX_Vpsraw_ymm_ymm_xmmm128,
		EVEX_Vpsraw_xmm_k1z_xmm_xmmm128,
		EVEX_Vpsraw_ymm_k1z_ymm_xmmm128,
		EVEX_Vpsraw_zmm_k1z_zmm_xmmm128,
		Psrad_mm_mmm64,
		Psrad_xmm_xmmm128,
		VEX_Vpsrad_xmm_xmm_xmmm128,
		VEX_Vpsrad_ymm_ymm_xmmm128,
		EVEX_Vpsrad_xmm_k1z_xmm_xmmm128,
		EVEX_Vpsrad_ymm_k1z_ymm_xmmm128,
		EVEX_Vpsrad_zmm_k1z_zmm_xmmm128,
		EVEX_Vpsraq_xmm_k1z_xmm_xmmm128,
		EVEX_Vpsraq_ymm_k1z_ymm_xmmm128,
		EVEX_Vpsraq_zmm_k1z_zmm_xmmm128,
		Pavgw_mm_mmm64,
		Pavgw_xmm_xmmm128,
		VEX_Vpavgw_xmm_xmm_xmmm128,
		VEX_Vpavgw_ymm_ymm_ymmm256,
		EVEX_Vpavgw_xmm_k1z_xmm_xmmm128,
		EVEX_Vpavgw_ymm_k1z_ymm_ymmm256,
		EVEX_Vpavgw_zmm_k1z_zmm_zmmm512,
		Pmulhuw_mm_mmm64,
		Pmulhuw_xmm_xmmm128,
		VEX_Vpmulhuw_xmm_xmm_xmmm128,
		VEX_Vpmulhuw_ymm_ymm_ymmm256,
		EVEX_Vpmulhuw_xmm_k1z_xmm_xmmm128,
		EVEX_Vpmulhuw_ymm_k1z_ymm_ymmm256,
		EVEX_Vpmulhuw_zmm_k1z_zmm_zmmm512,
		Pmulhw_mm_mmm64,
		Pmulhw_xmm_xmmm128,
		VEX_Vpmulhw_xmm_xmm_xmmm128,
		VEX_Vpmulhw_ymm_ymm_ymmm256,
		EVEX_Vpmulhw_xmm_k1z_xmm_xmmm128,
		EVEX_Vpmulhw_ymm_k1z_ymm_ymmm256,
		EVEX_Vpmulhw_zmm_k1z_zmm_zmmm512,
		Cvttpd2dq_xmm_xmmm128,
		VEX_Vcvttpd2dq_xmm_xmmm128,
		VEX_Vcvttpd2dq_xmm_ymmm256,
		EVEX_Vcvttpd2dq_xmm_k1z_xmmm128b64,
		EVEX_Vcvttpd2dq_xmm_k1z_ymmm256b64,
		EVEX_Vcvttpd2dq_ymm_k1z_zmmm512b64_sae,
		Cvtdq2pd_xmm_xmmm64,
		VEX_Vcvtdq2pd_xmm_xmmm64,
		VEX_Vcvtdq2pd_ymm_xmmm128,
		EVEX_Vcvtdq2pd_xmm_k1z_xmmm64b32,
		EVEX_Vcvtdq2pd_ymm_k1z_xmmm128b32,
		EVEX_Vcvtdq2pd_zmm_k1z_ymmm256b32_er,
		EVEX_Vcvtqq2pd_xmm_k1z_xmmm128b64,
		EVEX_Vcvtqq2pd_ymm_k1z_ymmm256b64,
		EVEX_Vcvtqq2pd_zmm_k1z_zmmm512b64_er,
		Cvtpd2dq_xmm_xmmm128,
		VEX_Vcvtpd2dq_xmm_xmmm128,
		VEX_Vcvtpd2dq_xmm_ymmm256,
		EVEX_Vcvtpd2dq_xmm_k1z_xmmm128b64,
		EVEX_Vcvtpd2dq_xmm_k1z_ymmm256b64,
		EVEX_Vcvtpd2dq_ymm_k1z_zmmm512b64_er,
		Movntq_m64_mm,
		Movntdq_m128_xmm,
		VEX_Vmovntdq_m128_xmm,
		VEX_Vmovntdq_m256_ymm,
		EVEX_Vmovntdq_m128_xmm,
		EVEX_Vmovntdq_m256_ymm,
		EVEX_Vmovntdq_m512_zmm,
		Psubsb_mm_mmm64,
		Psubsb_xmm_xmmm128,
		VEX_Vpsubsb_xmm_xmm_xmmm128,
		VEX_Vpsubsb_ymm_ymm_ymmm256,
		EVEX_Vpsubsb_xmm_k1z_xmm_xmmm128,
		EVEX_Vpsubsb_ymm_k1z_ymm_ymmm256,
		EVEX_Vpsubsb_zmm_k1z_zmm_zmmm512,
		Psubsw_mm_mmm64,
		Psubsw_xmm_xmmm128,
		VEX_Vpsubsw_xmm_xmm_xmmm128,
		VEX_Vpsubsw_ymm_ymm_ymmm256,
		EVEX_Vpsubsw_xmm_k1z_xmm_xmmm128,
		EVEX_Vpsubsw_ymm_k1z_ymm_ymmm256,
		EVEX_Vpsubsw_zmm_k1z_zmm_zmmm512,
		Pminsw_mm_mmm64,
		Pminsw_xmm_xmmm128,
		VEX_Vpminsw_xmm_xmm_xmmm128,
		VEX_Vpminsw_ymm_ymm_ymmm256,
		EVEX_Vpminsw_xmm_k1z_xmm_xmmm128,
		EVEX_Vpminsw_ymm_k1z_ymm_ymmm256,
		EVEX_Vpminsw_zmm_k1z_zmm_zmmm512,
		Por_mm_mmm64,
		Por_xmm_xmmm128,
		VEX_Vpor_xmm_xmm_xmmm128,
		VEX_Vpor_ymm_ymm_ymmm256,
		EVEX_Vpord_xmm_k1z_xmm_xmmm128b32,
		EVEX_Vpord_ymm_k1z_ymm_ymmm256b32,
		EVEX_Vpord_zmm_k1z_zmm_zmmm512b32,
		EVEX_Vporq_xmm_k1z_xmm_xmmm128b64,
		EVEX_Vporq_ymm_k1z_ymm_ymmm256b64,
		EVEX_Vporq_zmm_k1z_zmm_zmmm512b64,
		Paddsb_mm_mmm64,
		Paddsb_xmm_xmmm128,
		VEX_Vpaddsb_xmm_xmm_xmmm128,
		VEX_Vpaddsb_ymm_ymm_ymmm256,
		EVEX_Vpaddsb_xmm_k1z_xmm_xmmm128,
		EVEX_Vpaddsb_ymm_k1z_ymm_ymmm256,
		EVEX_Vpaddsb_zmm_k1z_zmm_zmmm512,
		Paddsw_mm_mmm64,
		Paddsw_xmm_xmmm128,
		VEX_Vpaddsw_xmm_xmm_xmmm128,
		VEX_Vpaddsw_ymm_ymm_ymmm256,
		EVEX_Vpaddsw_xmm_k1z_xmm_xmmm128,
		EVEX_Vpaddsw_ymm_k1z_ymm_ymmm256,
		EVEX_Vpaddsw_zmm_k1z_zmm_zmmm512,
		Pmaxsw_mm_mmm64,
		Pmaxsw_xmm_xmmm128,
		VEX_Vpmaxsw_xmm_xmm_xmmm128,
		VEX_Vpmaxsw_ymm_ymm_ymmm256,
		EVEX_Vpmaxsw_xmm_k1z_xmm_xmmm128,
		EVEX_Vpmaxsw_ymm_k1z_ymm_ymmm256,
		EVEX_Vpmaxsw_zmm_k1z_zmm_zmmm512,
		Pxor_mm_mmm64,
		Pxor_xmm_xmmm128,
		VEX_Vpxor_xmm_xmm_xmmm128,
		VEX_Vpxor_ymm_ymm_ymmm256,
		EVEX_Vpxord_xmm_k1z_xmm_xmmm128b32,
		EVEX_Vpxord_ymm_k1z_ymm_ymmm256b32,
		EVEX_Vpxord_zmm_k1z_zmm_zmmm512b32,
		EVEX_Vpxorq_xmm_k1z_xmm_xmmm128b64,
		EVEX_Vpxorq_ymm_k1z_ymm_ymmm256b64,
		EVEX_Vpxorq_zmm_k1z_zmm_zmmm512b64,
		Lddqu_xmm_m128,
		VEX_Vlddqu_xmm_m128,
		VEX_Vlddqu_ymm_m256,
		Psllw_mm_mmm64,
		Psllw_xmm_xmmm128,
		VEX_Vpsllw_xmm_xmm_xmmm128,
		VEX_Vpsllw_ymm_ymm_xmmm128,
		EVEX_Vpsllw_xmm_k1z_xmm_xmmm128,
		EVEX_Vpsllw_ymm_k1z_ymm_xmmm128,
		EVEX_Vpsllw_zmm_k1z_zmm_xmmm128,
		Pslld_mm_mmm64,
		Pslld_xmm_xmmm128,
		VEX_Vpslld_xmm_xmm_xmmm128,
		VEX_Vpslld_ymm_ymm_xmmm128,
		EVEX_Vpslld_xmm_k1z_xmm_xmmm128,
		EVEX_Vpslld_ymm_k1z_ymm_xmmm128,
		EVEX_Vpslld_zmm_k1z_zmm_xmmm128,
		Psllq_mm_mmm64,
		Psllq_xmm_xmmm128,
		VEX_Vpsllq_xmm_xmm_xmmm128,
		VEX_Vpsllq_ymm_ymm_xmmm128,
		EVEX_Vpsllq_xmm_k1z_xmm_xmmm128,
		EVEX_Vpsllq_ymm_k1z_ymm_xmmm128,
		EVEX_Vpsllq_zmm_k1z_zmm_xmmm128,
		Pmuludq_mm_mmm64,
		Pmuludq_xmm_xmmm128,
		VEX_Vpmuludq_xmm_xmm_xmmm128,
		VEX_Vpmuludq_ymm_ymm_ymmm256,
		EVEX_Vpmuludq_xmm_k1z_xmm_xmmm128b64,
		EVEX_Vpmuludq_ymm_k1z_ymm_ymmm256b64,
		EVEX_Vpmuludq_zmm_k1z_zmm_zmmm512b64,
		Pmaddwd_mm_mmm64,
		Pmaddwd_xmm_xmmm128,
		VEX_Vpmaddwd_xmm_xmm_xmmm128,
		VEX_Vpmaddwd_ymm_ymm_ymmm256,
		EVEX_Vpmaddwd_xmm_k1z_xmm_xmmm128,
		EVEX_Vpmaddwd_ymm_k1z_ymm_ymmm256,
		EVEX_Vpmaddwd_zmm_k1z_zmm_zmmm512,
		Psadbw_mm_mmm64,
		Psadbw_xmm_xmmm128,
		VEX_Vpsadbw_xmm_xmm_xmmm128,
		VEX_Vpsadbw_ymm_ymm_ymmm256,
		EVEX_Vpsadbw_xmm_xmm_xmmm128,
		EVEX_Vpsadbw_ymm_ymm_ymmm256,
		EVEX_Vpsadbw_zmm_zmm_zmmm512,
		Maskmovq_rDI_mm_mm,
		Maskmovdqu_rDI_xmm_xmm,
		VEX_Vmaskmovdqu_rDI_xmm_xmm,
		Psubb_mm_mmm64,
		Psubb_xmm_xmmm128,
		VEX_Vpsubb_xmm_xmm_xmmm128,
		VEX_Vpsubb_ymm_ymm_ymmm256,
		EVEX_Vpsubb_xmm_k1z_xmm_xmmm128,
		EVEX_Vpsubb_ymm_k1z_ymm_ymmm256,
		EVEX_Vpsubb_zmm_k1z_zmm_zmmm512,
		Psubw_mm_mmm64,
		Psubw_xmm_xmmm128,
		VEX_Vpsubw_xmm_xmm_xmmm128,
		VEX_Vpsubw_ymm_ymm_ymmm256,
		EVEX_Vpsubw_xmm_k1z_xmm_xmmm128,
		EVEX_Vpsubw_ymm_k1z_ymm_ymmm256,
		EVEX_Vpsubw_zmm_k1z_zmm_zmmm512,
		Psubd_mm_mmm64,
		Psubd_xmm_xmmm128,
		VEX_Vpsubd_xmm_xmm_xmmm128,
		VEX_Vpsubd_ymm_ymm_ymmm256,
		EVEX_Vpsubd_xmm_k1z_xmm_xmmm128b32,
		EVEX_Vpsubd_ymm_k1z_ymm_ymmm256b32,
		EVEX_Vpsubd_zmm_k1z_zmm_zmmm512b32,
		Psubq_mm_mmm64,
		Psubq_xmm_xmmm128,
		VEX_Vpsubq_xmm_xmm_xmmm128,
		VEX_Vpsubq_ymm_ymm_ymmm256,
		EVEX_Vpsubq_xmm_k1z_xmm_xmmm128b64,
		EVEX_Vpsubq_ymm_k1z_ymm_ymmm256b64,
		EVEX_Vpsubq_zmm_k1z_zmm_zmmm512b64,
		Paddb_mm_mmm64,
		Paddb_xmm_xmmm128,
		VEX_Vpaddb_xmm_xmm_xmmm128,
		VEX_Vpaddb_ymm_ymm_ymmm256,
		EVEX_Vpaddb_xmm_k1z_xmm_xmmm128,
		EVEX_Vpaddb_ymm_k1z_ymm_ymmm256,
		EVEX_Vpaddb_zmm_k1z_zmm_zmmm512,
		Paddw_mm_mmm64,
		Paddw_xmm_xmmm128,
		VEX_Vpaddw_xmm_xmm_xmmm128,
		VEX_Vpaddw_ymm_ymm_ymmm256,
		EVEX_Vpaddw_xmm_k1z_xmm_xmmm128,
		EVEX_Vpaddw_ymm_k1z_ymm_ymmm256,
		EVEX_Vpaddw_zmm_k1z_zmm_zmmm512,
		Paddd_mm_mmm64,
		Paddd_xmm_xmmm128,
		VEX_Vpaddd_xmm_xmm_xmmm128,
		VEX_Vpaddd_ymm_ymm_ymmm256,
		EVEX_Vpaddd_xmm_k1z_xmm_xmmm128b32,
		EVEX_Vpaddd_ymm_k1z_ymm_ymmm256b32,
		EVEX_Vpaddd_zmm_k1z_zmm_zmmm512b32,
		Ud0_r16_rm16,
		Ud0_r32_rm32,
		Ud0_r64_rm64,
		Pshufb_mm_mmm64,
		Pshufb_xmm_xmmm128,
		VEX_Vpshufb_xmm_xmm_xmmm128,
		VEX_Vpshufb_ymm_ymm_ymmm256,
		EVEX_Vpshufb_xmm_k1z_xmm_xmmm128,
		EVEX_Vpshufb_ymm_k1z_ymm_ymmm256,
		EVEX_Vpshufb_zmm_k1z_zmm_zmmm512,
		Phaddw_mm_mmm64,
		Phaddw_xmm_xmmm128,
		VEX_Vphaddw_xmm_xmm_xmmm128,
		VEX_Vphaddw_ymm_ymm_ymmm256,
		Phaddd_mm_mmm64,
		Phaddd_xmm_xmmm128,
		VEX_Vphaddd_xmm_xmm_xmmm128,
		VEX_Vphaddd_ymm_ymm_ymmm256,
		Phaddsw_mm_mmm64,
		Phaddsw_xmm_xmmm128,
		VEX_Vphaddsw_xmm_xmm_xmmm128,
		VEX_Vphaddsw_ymm_ymm_ymmm256,
		Pmaddubsw_mm_mmm64,
		Pmaddubsw_xmm_xmmm128,
		VEX_Vpmaddubsw_xmm_xmm_xmmm128,
		VEX_Vpmaddubsw_ymm_ymm_ymmm256,
		EVEX_Vpmaddubsw_xmm_k1z_xmm_xmmm128,
		EVEX_Vpmaddubsw_ymm_k1z_ymm_ymmm256,
		EVEX_Vpmaddubsw_zmm_k1z_zmm_zmmm512,
		Phsubw_mm_mmm64,
		Phsubw_xmm_xmmm128,
		VEX_Vphsubw_xmm_xmm_xmmm128,
		VEX_Vphsubw_ymm_ymm_ymmm256,
		Phsubd_mm_mmm64,
		Phsubd_xmm_xmmm128,
		VEX_Vphsubd_xmm_xmm_xmmm128,
		VEX_Vphsubd_ymm_ymm_ymmm256,
		Phsubsw_mm_mmm64,
		Phsubsw_xmm_xmmm128,
		VEX_Vphsubsw_xmm_xmm_xmmm128,
		VEX_Vphsubsw_ymm_ymm_ymmm256,
		Psignb_mm_mmm64,
		Psignb_xmm_xmmm128,
		VEX_Vpsignb_xmm_xmm_xmmm128,
		VEX_Vpsignb_ymm_ymm_ymmm256,
		Psignw_mm_mmm64,
		Psignw_xmm_xmmm128,
		VEX_Vpsignw_xmm_xmm_xmmm128,
		VEX_Vpsignw_ymm_ymm_ymmm256,
		Psignd_mm_mmm64,
		Psignd_xmm_xmmm128,
		VEX_Vpsignd_xmm_xmm_xmmm128,
		VEX_Vpsignd_ymm_ymm_ymmm256,
		Pmulhrsw_mm_mmm64,
		Pmulhrsw_xmm_xmmm128,
		VEX_Vpmulhrsw_xmm_xmm_xmmm128,
		VEX_Vpmulhrsw_ymm_ymm_ymmm256,
		EVEX_Vpmulhrsw_xmm_k1z_xmm_xmmm128,
		EVEX_Vpmulhrsw_ymm_k1z_ymm_ymmm256,
		EVEX_Vpmulhrsw_zmm_k1z_zmm_zmmm512,
		VEX_Vpermilps_xmm_xmm_xmmm128,
		VEX_Vpermilps_ymm_ymm_ymmm256,
		EVEX_Vpermilps_xmm_k1z_xmm_xmmm128b32,
		EVEX_Vpermilps_ymm_k1z_ymm_ymmm256b32,
		EVEX_Vpermilps_zmm_k1z_zmm_zmmm512b32,
		VEX_Vpermilpd_xmm_xmm_xmmm128,
		VEX_Vpermilpd_ymm_ymm_ymmm256,
		EVEX_Vpermilpd_xmm_k1z_xmm_xmmm128b64,
		EVEX_Vpermilpd_ymm_k1z_ymm_ymmm256b64,
		EVEX_Vpermilpd_zmm_k1z_zmm_zmmm512b64,
		VEX_Vtestps_xmm_xmmm128,
		VEX_Vtestps_ymm_ymmm256,
		VEX_Vtestpd_xmm_xmmm128,
		VEX_Vtestpd_ymm_ymmm256,
		Pblendvb_xmm_xmmm128,
		EVEX_Vpsrlvw_xmm_k1z_xmm_xmmm128,
		EVEX_Vpsrlvw_ymm_k1z_ymm_ymmm256,
		EVEX_Vpsrlvw_zmm_k1z_zmm_zmmm512,
		EVEX_Vpmovuswb_xmmm64_k1z_xmm,
		EVEX_Vpmovuswb_xmmm128_k1z_ymm,
		EVEX_Vpmovuswb_ymmm256_k1z_zmm,
		EVEX_Vpsravw_xmm_k1z_xmm_xmmm128,
		EVEX_Vpsravw_ymm_k1z_ymm_ymmm256,
		EVEX_Vpsravw_zmm_k1z_zmm_zmmm512,
		EVEX_Vpmovusdb_xmmm32_k1z_xmm,
		EVEX_Vpmovusdb_xmmm64_k1z_ymm,
		EVEX_Vpmovusdb_xmmm128_k1z_zmm,
		EVEX_Vpsllvw_xmm_k1z_xmm_xmmm128,
		EVEX_Vpsllvw_ymm_k1z_ymm_ymmm256,
		EVEX_Vpsllvw_zmm_k1z_zmm_zmmm512,
		EVEX_Vpmovusqb_xmmm16_k1z_xmm,
		EVEX_Vpmovusqb_xmmm32_k1z_ymm,
		EVEX_Vpmovusqb_xmmm64_k1z_zmm,
		VEX_Vcvtph2ps_xmm_xmmm64,
		VEX_Vcvtph2ps_ymm_xmmm128,
		EVEX_Vcvtph2ps_xmm_k1z_xmmm64,
		EVEX_Vcvtph2ps_ymm_k1z_xmmm128,
		EVEX_Vcvtph2ps_zmm_k1z_ymmm256_sae,
		EVEX_Vpmovusdw_xmmm64_k1z_xmm,
		EVEX_Vpmovusdw_xmmm128_k1z_ymm,
		EVEX_Vpmovusdw_ymmm256_k1z_zmm,
		Blendvps_xmm_xmmm128,
		EVEX_Vprorvd_xmm_k1z_xmm_xmmm128b32,
		EVEX_Vprorvd_ymm_k1z_ymm_ymmm256b32,
		EVEX_Vprorvd_zmm_k1z_zmm_zmmm512b32,
		EVEX_Vprorvq_xmm_k1z_xmm_xmmm128b64,
		EVEX_Vprorvq_ymm_k1z_ymm_ymmm256b64,
		EVEX_Vprorvq_zmm_k1z_zmm_zmmm512b64,
		EVEX_Vpmovusqw_xmmm32_k1z_xmm,
		EVEX_Vpmovusqw_xmmm64_k1z_ymm,
		EVEX_Vpmovusqw_xmmm128_k1z_zmm,
		Blendvpd_xmm_xmmm128,
		EVEX_Vprolvd_xmm_k1z_xmm_xmmm128b32,
		EVEX_Vprolvd_ymm_k1z_ymm_ymmm256b32,
		EVEX_Vprolvd_zmm_k1z_zmm_zmmm512b32,
		EVEX_Vprolvq_xmm_k1z_xmm_xmmm128b64,
		EVEX_Vprolvq_ymm_k1z_ymm_ymmm256b64,
		EVEX_Vprolvq_zmm_k1z_zmm_zmmm512b64,
		EVEX_Vpmovusqd_xmmm64_k1z_xmm,
		EVEX_Vpmovusqd_xmmm128_k1z_ymm,
		EVEX_Vpmovusqd_ymmm256_k1z_zmm,
		VEX_Vpermps_ymm_ymm_ymmm256,
		EVEX_Vpermps_ymm_k1z_ymm_ymmm256b32,
		EVEX_Vpermps_zmm_k1z_zmm_zmmm512b32,
		EVEX_Vpermpd_ymm_k1z_ymm_ymmm256b64,
		EVEX_Vpermpd_zmm_k1z_zmm_zmmm512b64,
		Ptest_xmm_xmmm128,
		VEX_Vptest_xmm_xmmm128,
		VEX_Vptest_ymm_ymmm256,
		VEX_Vbroadcastss_xmm_m32,
		VEX_Vbroadcastss_ymm_m32,
		EVEX_Vbroadcastss_xmm_k1z_xmmm32,
		EVEX_Vbroadcastss_ymm_k1z_xmmm32,
		EVEX_Vbroadcastss_zmm_k1z_xmmm32,
		VEX_Vbroadcastsd_ymm_m64,
		EVEX_Vbroadcastf32x2_ymm_k1z_xmmm64,
		EVEX_Vbroadcastf32x2_zmm_k1z_xmmm64,
		EVEX_Vbroadcastsd_ymm_k1z_xmmm64,
		EVEX_Vbroadcastsd_zmm_k1z_xmmm64,
		VEX_Vbroadcastf128_ymm_m128,
		EVEX_Vbroadcastf32x4_ymm_k1z_m128,
		EVEX_Vbroadcastf32x4_zmm_k1z_m128,
		EVEX_Vbroadcastf64x2_ymm_k1z_m128,
		EVEX_Vbroadcastf64x2_zmm_k1z_m128,
		EVEX_Vbroadcastf32x8_zmm_k1z_m256,
		EVEX_Vbroadcastf64x4_zmm_k1z_m256,
		Pabsb_mm_mmm64,
		Pabsb_xmm_xmmm128,
		VEX_Vpabsb_xmm_xmmm128,
		VEX_Vpabsb_ymm_ymmm256,
		EVEX_Vpabsb_xmm_k1z_xmmm128,
		EVEX_Vpabsb_ymm_k1z_ymmm256,
		EVEX_Vpabsb_zmm_k1z_zmmm512,
		Pabsw_mm_mmm64,
		Pabsw_xmm_xmmm128,
		VEX_Vpabsw_xmm_xmmm128,
		VEX_Vpabsw_ymm_ymmm256,
		EVEX_Vpabsw_xmm_k1z_xmmm128,
		EVEX_Vpabsw_ymm_k1z_ymmm256,
		EVEX_Vpabsw_zmm_k1z_zmmm512,
		Pabsd_mm_mmm64,
		Pabsd_xmm_xmmm128,
		VEX_Vpabsd_xmm_xmmm128,
		VEX_Vpabsd_ymm_ymmm256,
		EVEX_Vpabsd_xmm_k1z_xmmm128b32,
		EVEX_Vpabsd_ymm_k1z_ymmm256b32,
		EVEX_Vpabsd_zmm_k1z_zmmm512b32,
		EVEX_Vpabsq_xmm_k1z_xmmm128b64,
		EVEX_Vpabsq_ymm_k1z_ymmm256b64,
		EVEX_Vpabsq_zmm_k1z_zmmm512b64,
		Pmovsxbw_xmm_xmmm64,
		VEX_Vpmovsxbw_xmm_xmmm64,
		VEX_Vpmovsxbw_ymm_xmmm128,
		EVEX_Vpmovsxbw_xmm_k1z_xmmm64,
		EVEX_Vpmovsxbw_ymm_k1z_xmmm128,
		EVEX_Vpmovsxbw_zmm_k1z_ymmm256,
		EVEX_Vpmovswb_xmmm64_k1z_xmm,
		EVEX_Vpmovswb_xmmm128_k1z_ymm,
		EVEX_Vpmovswb_ymmm256_k1z_zmm,
		Pmovsxbd_xmm_xmmm32,
		VEX_Vpmovsxbd_xmm_xmmm32,
		VEX_Vpmovsxbd_ymm_xmmm64,
		EVEX_Vpmovsxbd_xmm_k1z_xmmm32,
		EVEX_Vpmovsxbd_ymm_k1z_xmmm64,
		EVEX_Vpmovsxbd_zmm_k1z_xmmm128,
		EVEX_Vpmovsdb_xmmm32_k1z_xmm,
		EVEX_Vpmovsdb_xmmm64_k1z_ymm,
		EVEX_Vpmovsdb_xmmm128_k1z_zmm,
		Pmovsxbq_xmm_xmmm16,
		VEX_Vpmovsxbq_xmm_xmmm16,
		VEX_Vpmovsxbq_ymm_xmmm32,
		EVEX_Vpmovsxbq_xmm_k1z_xmmm16,
		EVEX_Vpmovsxbq_ymm_k1z_xmmm32,
		EVEX_Vpmovsxbq_zmm_k1z_xmmm64,
		EVEX_Vpmovsqb_xmmm16_k1z_xmm,
		EVEX_Vpmovsqb_xmmm32_k1z_ymm,
		EVEX_Vpmovsqb_xmmm64_k1z_zmm,
		Pmovsxwd_xmm_xmmm64,
		VEX_Vpmovsxwd_xmm_xmmm64,
		VEX_Vpmovsxwd_ymm_xmmm128,
		EVEX_Vpmovsxwd_xmm_k1z_xmmm64,
		EVEX_Vpmovsxwd_ymm_k1z_xmmm128,
		EVEX_Vpmovsxwd_zmm_k1z_ymmm256,
		EVEX_Vpmovsdw_xmmm64_k1z_xmm,
		EVEX_Vpmovsdw_xmmm128_k1z_ymm,
		EVEX_Vpmovsdw_ymmm256_k1z_zmm,
		Pmovsxwq_xmm_xmmm32,
		VEX_Vpmovsxwq_xmm_xmmm32,
		VEX_Vpmovsxwq_ymm_xmmm64,
		EVEX_Vpmovsxwq_xmm_k1z_xmmm32,
		EVEX_Vpmovsxwq_ymm_k1z_xmmm64,
		EVEX_Vpmovsxwq_zmm_k1z_xmmm128,
		EVEX_Vpmovsqw_xmmm32_k1z_xmm,
		EVEX_Vpmovsqw_xmmm64_k1z_ymm,
		EVEX_Vpmovsqw_xmmm128_k1z_zmm,
		Pmovsxdq_xmm_xmmm64,
		VEX_Vpmovsxdq_xmm_xmmm64,
		VEX_Vpmovsxdq_ymm_xmmm128,
		EVEX_Vpmovsxdq_xmm_k1z_xmmm64,
		EVEX_Vpmovsxdq_ymm_k1z_xmmm128,
		EVEX_Vpmovsxdq_zmm_k1z_ymmm256,
		EVEX_Vpmovsqd_xmmm64_k1z_xmm,
		EVEX_Vpmovsqd_xmmm128_k1z_ymm,
		EVEX_Vpmovsqd_ymmm256_k1z_zmm,
		EVEX_Vptestmb_kr_k1_xmm_xmmm128,
		EVEX_Vptestmb_kr_k1_ymm_ymmm256,
		EVEX_Vptestmb_kr_k1_zmm_zmmm512,
		EVEX_Vptestmw_kr_k1_xmm_xmmm128,
		EVEX_Vptestmw_kr_k1_ymm_ymmm256,
		EVEX_Vptestmw_kr_k1_zmm_zmmm512,
		EVEX_Vptestnmb_kr_k1_xmm_xmmm128,
		EVEX_Vptestnmb_kr_k1_ymm_ymmm256,
		EVEX_Vptestnmb_kr_k1_zmm_zmmm512,
		EVEX_Vptestnmw_kr_k1_xmm_xmmm128,
		EVEX_Vptestnmw_kr_k1_ymm_ymmm256,
		EVEX_Vptestnmw_kr_k1_zmm_zmmm512,
		EVEX_Vptestmd_kr_k1_xmm_xmmm128b32,
		EVEX_Vptestmd_kr_k1_ymm_ymmm256b32,
		EVEX_Vptestmd_kr_k1_zmm_zmmm512b32,
		EVEX_Vptestmq_kr_k1_xmm_xmmm128b64,
		EVEX_Vptestmq_kr_k1_ymm_ymmm256b64,
		EVEX_Vptestmq_kr_k1_zmm_zmmm512b64,
		EVEX_Vptestnmd_kr_k1_xmm_xmmm128b32,
		EVEX_Vptestnmd_kr_k1_ymm_ymmm256b32,
		EVEX_Vptestnmd_kr_k1_zmm_zmmm512b32,
		EVEX_Vptestnmq_kr_k1_xmm_xmmm128b64,
		EVEX_Vptestnmq_kr_k1_ymm_ymmm256b64,
		EVEX_Vptestnmq_kr_k1_zmm_zmmm512b64,
		Pmuldq_xmm_xmmm128,
		VEX_Vpmuldq_xmm_xmm_xmmm128,
		VEX_Vpmuldq_ymm_ymm_ymmm256,
		EVEX_Vpmuldq_xmm_k1z_xmm_xmmm128b64,
		EVEX_Vpmuldq_ymm_k1z_ymm_ymmm256b64,
		EVEX_Vpmuldq_zmm_k1z_zmm_zmmm512b64,
		EVEX_Vpmovm2b_xmm_kr,
		EVEX_Vpmovm2b_ymm_kr,
		EVEX_Vpmovm2b_zmm_kr,
		EVEX_Vpmovm2w_xmm_kr,
		EVEX_Vpmovm2w_ymm_kr,
		EVEX_Vpmovm2w_zmm_kr,
		Pcmpeqq_xmm_xmmm128,
		VEX_Vpcmpeqq_xmm_xmm_xmmm128,
		VEX_Vpcmpeqq_ymm_ymm_ymmm256,
		EVEX_Vpcmpeqq_kr_k1_xmm_xmmm128b64,
		EVEX_Vpcmpeqq_kr_k1_ymm_ymmm256b64,
		EVEX_Vpcmpeqq_kr_k1_zmm_zmmm512b64,
		EVEX_Vpmovb2m_kr_xmm,
		EVEX_Vpmovb2m_kr_ymm,
		EVEX_Vpmovb2m_kr_zmm,
		EVEX_Vpmovw2m_kr_xmm,
		EVEX_Vpmovw2m_kr_ymm,
		EVEX_Vpmovw2m_kr_zmm,
		Movntdqa_xmm_m128,
		VEX_Vmovntdqa_xmm_m128,
		VEX_Vmovntdqa_ymm_m256,
		EVEX_Vmovntdqa_xmm_m128,
		EVEX_Vmovntdqa_ymm_m256,
		EVEX_Vmovntdqa_zmm_m512,
		EVEX_Vpbroadcastmb2q_xmm_kr,
		EVEX_Vpbroadcastmb2q_ymm_kr,
		EVEX_Vpbroadcastmb2q_zmm_kr,
		Packusdw_xmm_xmmm128,
		VEX_Vpackusdw_xmm_xmm_xmmm128,
		VEX_Vpackusdw_ymm_ymm_ymmm256,
		EVEX_Vpackusdw_xmm_k1z_xmm_xmmm128b32,
		EVEX_Vpackusdw_ymm_k1z_ymm_ymmm256b32,
		EVEX_Vpackusdw_zmm_k1z_zmm_zmmm512b32,
		VEX_Vmaskmovps_xmm_xmm_m128,
		VEX_Vmaskmovps_ymm_ymm_m256,
		EVEX_Vscalefps_xmm_k1z_xmm_xmmm128b32,
		EVEX_Vscalefps_ymm_k1z_ymm_ymmm256b32,
		EVEX_Vscalefps_zmm_k1z_zmm_zmmm512b32_er,
		EVEX_Vscalefpd_xmm_k1z_xmm_xmmm128b64,
		EVEX_Vscalefpd_ymm_k1z_ymm_ymmm256b64,
		EVEX_Vscalefpd_zmm_k1z_zmm_zmmm512b64_er,
		VEX_Vmaskmovpd_xmm_xmm_m128,
		VEX_Vmaskmovpd_ymm_ymm_m256,
		EVEX_Vscalefss_xmm_k1z_xmm_xmmm32_er,
		EVEX_Vscalefsd_xmm_k1z_xmm_xmmm64_er,
		VEX_Vmaskmovps_m128_xmm_xmm,
		VEX_Vmaskmovps_m256_ymm_ymm,
		VEX_Vmaskmovpd_m128_xmm_xmm,
		VEX_Vmaskmovpd_m256_ymm_ymm,
		Pmovzxbw_xmm_xmmm64,
		VEX_Vpmovzxbw_xmm_xmmm64,
		VEX_Vpmovzxbw_ymm_xmmm128,
		EVEX_Vpmovzxbw_xmm_k1z_xmmm64,
		EVEX_Vpmovzxbw_ymm_k1z_xmmm128,
		EVEX_Vpmovzxbw_zmm_k1z_ymmm256,
		EVEX_Vpmovwb_xmmm64_k1z_xmm,
		EVEX_Vpmovwb_xmmm128_k1z_ymm,
		EVEX_Vpmovwb_ymmm256_k1z_zmm,
		Pmovzxbd_xmm_xmmm32,
		VEX_Vpmovzxbd_xmm_xmmm32,
		VEX_Vpmovzxbd_ymm_xmmm64,
		EVEX_Vpmovzxbd_xmm_k1z_xmmm32,
		EVEX_Vpmovzxbd_ymm_k1z_xmmm64,
		EVEX_Vpmovzxbd_zmm_k1z_xmmm128,
		EVEX_Vpmovdb_xmmm32_k1z_xmm,
		EVEX_Vpmovdb_xmmm64_k1z_ymm,
		EVEX_Vpmovdb_xmmm128_k1z_zmm,
		Pmovzxbq_xmm_xmmm16,
		VEX_Vpmovzxbq_xmm_xmmm16,
		VEX_Vpmovzxbq_ymm_xmmm32,
		EVEX_Vpmovzxbq_xmm_k1z_xmmm16,
		EVEX_Vpmovzxbq_ymm_k1z_xmmm32,
		EVEX_Vpmovzxbq_zmm_k1z_xmmm64,
		EVEX_Vpmovqb_xmmm16_k1z_xmm,
		EVEX_Vpmovqb_xmmm32_k1z_ymm,
		EVEX_Vpmovqb_xmmm64_k1z_zmm,
		Pmovzxwd_xmm_xmmm64,
		VEX_Vpmovzxwd_xmm_xmmm64,
		VEX_Vpmovzxwd_ymm_xmmm128,
		EVEX_Vpmovzxwd_xmm_k1z_xmmm64,
		EVEX_Vpmovzxwd_ymm_k1z_xmmm128,
		EVEX_Vpmovzxwd_zmm_k1z_ymmm256,
		EVEX_Vpmovdw_xmmm64_k1z_xmm,
		EVEX_Vpmovdw_xmmm128_k1z_ymm,
		EVEX_Vpmovdw_ymmm256_k1z_zmm,
		Pmovzxwq_xmm_xmmm32,
		VEX_Vpmovzxwq_xmm_xmmm32,
		VEX_Vpmovzxwq_ymm_xmmm64,
		EVEX_Vpmovzxwq_xmm_k1z_xmmm32,
		EVEX_Vpmovzxwq_ymm_k1z_xmmm64,
		EVEX_Vpmovzxwq_zmm_k1z_xmmm128,
		EVEX_Vpmovqw_xmmm32_k1z_xmm,
		EVEX_Vpmovqw_xmmm64_k1z_ymm,
		EVEX_Vpmovqw_xmmm128_k1z_zmm,
		Pmovzxdq_xmm_xmmm64,
		VEX_Vpmovzxdq_xmm_xmmm64,
		VEX_Vpmovzxdq_ymm_xmmm128,
		EVEX_Vpmovzxdq_xmm_k1z_xmmm64,
		EVEX_Vpmovzxdq_ymm_k1z_xmmm128,
		EVEX_Vpmovzxdq_zmm_k1z_ymmm256,
		EVEX_Vpmovqd_xmmm64_k1z_xmm,
		EVEX_Vpmovqd_xmmm128_k1z_ymm,
		EVEX_Vpmovqd_ymmm256_k1z_zmm,
		VEX_Vpermd_ymm_ymm_ymmm256,
		EVEX_Vpermd_ymm_k1z_ymm_ymmm256b32,
		EVEX_Vpermd_zmm_k1z_zmm_zmmm512b32,
		EVEX_Vpermq_ymm_k1z_ymm_ymmm256b64,
		EVEX_Vpermq_zmm_k1z_zmm_zmmm512b64,
		Pcmpgtq_xmm_xmmm128,
		VEX_Vpcmpgtq_xmm_xmm_xmmm128,
		VEX_Vpcmpgtq_ymm_ymm_ymmm256,
		EVEX_Vpcmpgtq_kr_k1_xmm_xmmm128b64,
		EVEX_Vpcmpgtq_kr_k1_ymm_ymmm256b64,
		EVEX_Vpcmpgtq_kr_k1_zmm_zmmm512b64,
		Pminsb_xmm_xmmm128,
		VEX_Vpminsb_xmm_xmm_xmmm128,
		VEX_Vpminsb_ymm_ymm_ymmm256,
		EVEX_Vpminsb_xmm_k1z_xmm_xmmm128,
		EVEX_Vpminsb_ymm_k1z_ymm_ymmm256,
		EVEX_Vpminsb_zmm_k1z_zmm_zmmm512,
		EVEX_Vpmovm2d_xmm_kr,
		EVEX_Vpmovm2d_ymm_kr,
		EVEX_Vpmovm2d_zmm_kr,
		EVEX_Vpmovm2q_xmm_kr,
		EVEX_Vpmovm2q_ymm_kr,
		EVEX_Vpmovm2q_zmm_kr,
		Pminsd_xmm_xmmm128,
		VEX_Vpminsd_xmm_xmm_xmmm128,
		VEX_Vpminsd_ymm_ymm_ymmm256,
		EVEX_Vpminsd_xmm_k1z_xmm_xmmm128b32,
		EVEX_Vpminsd_ymm_k1z_ymm_ymmm256b32,
		EVEX_Vpminsd_zmm_k1z_zmm_zmmm512b32,
		EVEX_Vpminsq_xmm_k1z_xmm_xmmm128b64,
		EVEX_Vpminsq_ymm_k1z_ymm_ymmm256b64,
		EVEX_Vpminsq_zmm_k1z_zmm_zmmm512b64,
		EVEX_Vpmovd2m_kr_xmm,
		EVEX_Vpmovd2m_kr_ymm,
		EVEX_Vpmovd2m_kr_zmm,
		EVEX_Vpmovq2m_kr_xmm,
		EVEX_Vpmovq2m_kr_ymm,
		EVEX_Vpmovq2m_kr_zmm,
		Pminuw_xmm_xmmm128,
		VEX_Vpminuw_xmm_xmm_xmmm128,
		VEX_Vpminuw_ymm_ymm_ymmm256,
		EVEX_Vpminuw_xmm_k1z_xmm_xmmm128,
		EVEX_Vpminuw_ymm_k1z_ymm_ymmm256,
		EVEX_Vpminuw_zmm_k1z_zmm_zmmm512,
		EVEX_Vpbroadcastmw2d_xmm_kr,
		EVEX_Vpbroadcastmw2d_ymm_kr,
		EVEX_Vpbroadcastmw2d_zmm_kr,
		Pminud_xmm_xmmm128,
		VEX_Vpminud_xmm_xmm_xmmm128,
		VEX_Vpminud_ymm_ymm_ymmm256,
		EVEX_Vpminud_xmm_k1z_xmm_xmmm128b32,
		EVEX_Vpminud_ymm_k1z_ymm_ymmm256b32,
		EVEX_Vpminud_zmm_k1z_zmm_zmmm512b32,
		EVEX_Vpminuq_xmm_k1z_xmm_xmmm128b64,
		EVEX_Vpminuq_ymm_k1z_ymm_ymmm256b64,
		EVEX_Vpminuq_zmm_k1z_zmm_zmmm512b64,
		Pmaxsb_xmm_xmmm128,
		VEX_Vpmaxsb_xmm_xmm_xmmm128,
		VEX_Vpmaxsb_ymm_ymm_ymmm256,
		EVEX_Vpmaxsb_xmm_k1z_xmm_xmmm128,
		EVEX_Vpmaxsb_ymm_k1z_ymm_ymmm256,
		EVEX_Vpmaxsb_zmm_k1z_zmm_zmmm512,
		Pmaxsd_xmm_xmmm128,
		VEX_Vpmaxsd_xmm_xmm_xmmm128,
		VEX_Vpmaxsd_ymm_ymm_ymmm256,
		EVEX_Vpmaxsd_xmm_k1z_xmm_xmmm128b32,
		EVEX_Vpmaxsd_ymm_k1z_ymm_ymmm256b32,
		EVEX_Vpmaxsd_zmm_k1z_zmm_zmmm512b32,
		EVEX_Vpmaxsq_xmm_k1z_xmm_xmmm128b64,
		EVEX_Vpmaxsq_ymm_k1z_ymm_ymmm256b64,
		EVEX_Vpmaxsq_zmm_k1z_zmm_zmmm512b64,
		Pmaxuw_xmm_xmmm128,
		VEX_Vpmaxuw_xmm_xmm_xmmm128,
		VEX_Vpmaxuw_ymm_ymm_ymmm256,
		EVEX_Vpmaxuw_xmm_k1z_xmm_xmmm128,
		EVEX_Vpmaxuw_ymm_k1z_ymm_ymmm256,
		EVEX_Vpmaxuw_zmm_k1z_zmm_zmmm512,
		Pmaxud_xmm_xmmm128,
		VEX_Vpmaxud_xmm_xmm_xmmm128,
		VEX_Vpmaxud_ymm_ymm_ymmm256,
		EVEX_Vpmaxud_xmm_k1z_xmm_xmmm128b32,
		EVEX_Vpmaxud_ymm_k1z_ymm_ymmm256b32,
		EVEX_Vpmaxud_zmm_k1z_zmm_zmmm512b32,
		EVEX_Vpmaxuq_xmm_k1z_xmm_xmmm128b64,
		EVEX_Vpmaxuq_ymm_k1z_ymm_ymmm256b64,
		EVEX_Vpmaxuq_zmm_k1z_zmm_zmmm512b64,
		Pmulld_xmm_xmmm128,
		VEX_Vpmulld_xmm_xmm_xmmm128,
		VEX_Vpmulld_ymm_ymm_ymmm256,
		EVEX_Vpmulld_xmm_k1z_xmm_xmmm128b32,
		EVEX_Vpmulld_ymm_k1z_ymm_ymmm256b32,
		EVEX_Vpmulld_zmm_k1z_zmm_zmmm512b32,
		EVEX_Vpmullq_xmm_k1z_xmm_xmmm128b64,
		EVEX_Vpmullq_ymm_k1z_ymm_ymmm256b64,
		EVEX_Vpmullq_zmm_k1z_zmm_zmmm512b64,
		Phminposuw_xmm_xmmm128,
		VEX_Vphminposuw_xmm_xmmm128,
		EVEX_Vgetexpps_xmm_k1z_xmmm128b32,
		EVEX_Vgetexpps_ymm_k1z_ymmm256b32,
		EVEX_Vgetexpps_zmm_k1z_zmmm512b32_sae,
		EVEX_Vgetexppd_xmm_k1z_xmmm128b64,
		EVEX_Vgetexppd_ymm_k1z_ymmm256b64,
		EVEX_Vgetexppd_zmm_k1z_zmmm512b64_sae,
		EVEX_Vgetexpss_xmm_k1z_xmm_xmmm32_sae,
		EVEX_Vgetexpsd_xmm_k1z_xmm_xmmm64_sae,
		EVEX_Vplzcntd_xmm_k1z_xmmm128b32,
		EVEX_Vplzcntd_ymm_k1z_ymmm256b32,
		EVEX_Vplzcntd_zmm_k1z_zmmm512b32,
		EVEX_Vplzcntq_xmm_k1z_xmmm128b64,
		EVEX_Vplzcntq_ymm_k1z_ymmm256b64,
		EVEX_Vplzcntq_zmm_k1z_zmmm512b64,
		VEX_Vpsrlvd_xmm_xmm_xmmm128,
		VEX_Vpsrlvd_ymm_ymm_ymmm256,
		VEX_Vpsrlvq_xmm_xmm_xmmm128,
		VEX_Vpsrlvq_ymm_ymm_ymmm256,
		EVEX_Vpsrlvd_xmm_k1z_xmm_xmmm128b32,
		EVEX_Vpsrlvd_ymm_k1z_ymm_ymmm256b32,
		EVEX_Vpsrlvd_zmm_k1z_zmm_zmmm512b32,
		EVEX_Vpsrlvq_xmm_k1z_xmm_xmmm128b64,
		EVEX_Vpsrlvq_ymm_k1z_ymm_ymmm256b64,
		EVEX_Vpsrlvq_zmm_k1z_zmm_zmmm512b64,
		VEX_Vpsravd_xmm_xmm_xmmm128,
		VEX_Vpsravd_ymm_ymm_ymmm256,
		EVEX_Vpsravd_xmm_k1z_xmm_xmmm128b32,
		EVEX_Vpsravd_ymm_k1z_ymm_ymmm256b32,
		EVEX_Vpsravd_zmm_k1z_zmm_zmmm512b32,
		EVEX_Vpsravq_xmm_k1z_xmm_xmmm128b64,
		EVEX_Vpsravq_ymm_k1z_ymm_ymmm256b64,
		EVEX_Vpsravq_zmm_k1z_zmm_zmmm512b64,
		VEX_Vpsllvd_xmm_xmm_xmmm128,
		VEX_Vpsllvd_ymm_ymm_ymmm256,
		VEX_Vpsllvq_xmm_xmm_xmmm128,
		VEX_Vpsllvq_ymm_ymm_ymmm256,
		EVEX_Vpsllvd_xmm_k1z_xmm_xmmm128b32,
		EVEX_Vpsllvd_ymm_k1z_ymm_ymmm256b32,
		EVEX_Vpsllvd_zmm_k1z_zmm_zmmm512b32,
		EVEX_Vpsllvq_xmm_k1z_xmm_xmmm128b64,
		EVEX_Vpsllvq_ymm_k1z_ymm_ymmm256b64,
		EVEX_Vpsllvq_zmm_k1z_zmm_zmmm512b64,
		EVEX_Vrcp14ps_xmm_k1z_xmmm128b32,
		EVEX_Vrcp14ps_ymm_k1z_ymmm256b32,
		EVEX_Vrcp14ps_zmm_k1z_zmmm512b32,
		EVEX_Vrcp14pd_xmm_k1z_xmmm128b64,
		EVEX_Vrcp14pd_ymm_k1z_ymmm256b64,
		EVEX_Vrcp14pd_zmm_k1z_zmmm512b64,
		EVEX_Vrcp14ss_xmm_k1z_xmm_xmmm32,
		EVEX_Vrcp14sd_xmm_k1z_xmm_xmmm64,
		EVEX_Vrsqrt14ps_xmm_k1z_xmmm128b32,
		EVEX_Vrsqrt14ps_ymm_k1z_ymmm256b32,
		EVEX_Vrsqrt14ps_zmm_k1z_zmmm512b32,
		EVEX_Vrsqrt14pd_xmm_k1z_xmmm128b64,
		EVEX_Vrsqrt14pd_ymm_k1z_ymmm256b64,
		EVEX_Vrsqrt14pd_zmm_k1z_zmmm512b64,
		EVEX_Vrsqrt14ss_xmm_k1z_xmm_xmmm32,
		EVEX_Vrsqrt14sd_xmm_k1z_xmm_xmmm64,
		EVEX_Vpdpbusd_xmm_k1z_xmm_xmmm128b32,
		EVEX_Vpdpbusd_ymm_k1z_ymm_ymmm256b32,
		EVEX_Vpdpbusd_zmm_k1z_zmm_zmmm512b32,
		EVEX_Vpdpbusds_xmm_k1z_xmm_xmmm128b32,
		EVEX_Vpdpbusds_ymm_k1z_ymm_ymmm256b32,
		EVEX_Vpdpbusds_zmm_k1z_zmm_zmmm512b32,
		EVEX_Vpdpwssd_xmm_k1z_xmm_xmmm128b32,
		EVEX_Vpdpwssd_ymm_k1z_ymm_ymmm256b32,
		EVEX_Vpdpwssd_zmm_k1z_zmm_zmmm512b32,
		EVEX_Vdpbf16ps_xmm_k1z_xmm_xmmm128b32,
		EVEX_Vdpbf16ps_ymm_k1z_ymm_ymmm256b32,
		EVEX_Vdpbf16ps_zmm_k1z_zmm_zmmm512b32,
		EVEX_Vp4dpwssd_zmm_k1z_zmmp3_m128,
		EVEX_Vpdpwssds_xmm_k1z_xmm_xmmm128b32,
		EVEX_Vpdpwssds_ymm_k1z_ymm_ymmm256b32,
		EVEX_Vpdpwssds_zmm_k1z_zmm_zmmm512b32,
		EVEX_Vp4dpwssds_zmm_k1z_zmmp3_m128,
		EVEX_Vpopcntb_xmm_k1z_xmmm128,
		EVEX_Vpopcntb_ymm_k1z_ymmm256,
		EVEX_Vpopcntb_zmm_k1z_zmmm512,
		EVEX_Vpopcntw_xmm_k1z_xmmm128,
		EVEX_Vpopcntw_ymm_k1z_ymmm256,
		EVEX_Vpopcntw_zmm_k1z_zmmm512,
		EVEX_Vpopcntd_xmm_k1z_xmmm128b32,
		EVEX_Vpopcntd_ymm_k1z_ymmm256b32,
		EVEX_Vpopcntd_zmm_k1z_zmmm512b32,
		EVEX_Vpopcntq_xmm_k1z_xmmm128b64,
		EVEX_Vpopcntq_ymm_k1z_ymmm256b64,
		EVEX_Vpopcntq_zmm_k1z_zmmm512b64,
		VEX_Vpbroadcastd_xmm_xmmm32,
		VEX_Vpbroadcastd_ymm_xmmm32,
		EVEX_Vpbroadcastd_xmm_k1z_xmmm32,
		EVEX_Vpbroadcastd_ymm_k1z_xmmm32,
		EVEX_Vpbroadcastd_zmm_k1z_xmmm32,
		VEX_Vpbroadcastq_xmm_xmmm64,
		VEX_Vpbroadcastq_ymm_xmmm64,
		EVEX_Vbroadcasti32x2_xmm_k1z_xmmm64,
		EVEX_Vbroadcasti32x2_ymm_k1z_xmmm64,
		EVEX_Vbroadcasti32x2_zmm_k1z_xmmm64,
		EVEX_Vpbroadcastq_xmm_k1z_xmmm64,
		EVEX_Vpbroadcastq_ymm_k1z_xmmm64,
		EVEX_Vpbroadcastq_zmm_k1z_xmmm64,
		VEX_Vbroadcasti128_ymm_m128,
		EVEX_Vbroadcasti32x4_ymm_k1z_m128,
		EVEX_Vbroadcasti32x4_zmm_k1z_m128,
		EVEX_Vbroadcasti64x2_ymm_k1z_m128,
		EVEX_Vbroadcasti64x2_zmm_k1z_m128,
		EVEX_Vbroadcasti32x8_zmm_k1z_m256,
		EVEX_Vbroadcasti64x4_zmm_k1z_m256,
		EVEX_Vpexpandb_xmm_k1z_xmmm128,
		EVEX_Vpexpandb_ymm_k1z_ymmm256,
		EVEX_Vpexpandb_zmm_k1z_zmmm512,
		EVEX_Vpexpandw_xmm_k1z_xmmm128,
		EVEX_Vpexpandw_ymm_k1z_ymmm256,
		EVEX_Vpexpandw_zmm_k1z_zmmm512,
		EVEX_Vpcompressb_xmmm128_k1z_xmm,
		EVEX_Vpcompressb_ymmm256_k1z_ymm,
		EVEX_Vpcompressb_zmmm512_k1z_zmm,
		EVEX_Vpcompressw_xmmm128_k1z_xmm,
		EVEX_Vpcompressw_ymmm256_k1z_ymm,
		EVEX_Vpcompressw_zmmm512_k1z_zmm,
		EVEX_Vpblendmd_xmm_k1z_xmm_xmmm128b32,
		EVEX_Vpblendmd_ymm_k1z_ymm_ymmm256b32,
		EVEX_Vpblendmd_zmm_k1z_zmm_zmmm512b32,
		EVEX_Vpblendmq_xmm_k1z_xmm_xmmm128b64,
		EVEX_Vpblendmq_ymm_k1z_ymm_ymmm256b64,
		EVEX_Vpblendmq_zmm_k1z_zmm_zmmm512b64,
		EVEX_Vblendmps_xmm_k1z_xmm_xmmm128b32,
		EVEX_Vblendmps_ymm_k1z_ymm_ymmm256b32,
		EVEX_Vblendmps_zmm_k1z_zmm_zmmm512b32,
		EVEX_Vblendmpd_xmm_k1z_xmm_xmmm128b64,
		EVEX_Vblendmpd_ymm_k1z_ymm_ymmm256b64,
		EVEX_Vblendmpd_zmm_k1z_zmm_zmmm512b64,
		EVEX_Vpblendmb_xmm_k1z_xmm_xmmm128,
		EVEX_Vpblendmb_ymm_k1z_ymm_ymmm256,
		EVEX_Vpblendmb_zmm_k1z_zmm_zmmm512,
		EVEX_Vpblendmw_xmm_k1z_xmm_xmmm128,
		EVEX_Vpblendmw_ymm_k1z_ymm_ymmm256,
		EVEX_Vpblendmw_zmm_k1z_zmm_zmmm512,
		EVEX_Vp2intersectd_kp1_xmm_xmmm128b32,
		EVEX_Vp2intersectd_kp1_ymm_ymmm256b32,
		EVEX_Vp2intersectd_kp1_zmm_zmmm512b32,
		EVEX_Vp2intersectq_kp1_xmm_xmmm128b64,
		EVEX_Vp2intersectq_kp1_ymm_ymmm256b64,
		EVEX_Vp2intersectq_kp1_zmm_zmmm512b64,
		EVEX_Vpshldvw_xmm_k1z_xmm_xmmm128,
		EVEX_Vpshldvw_ymm_k1z_ymm_ymmm256,
		EVEX_Vpshldvw_zmm_k1z_zmm_zmmm512,
		EVEX_Vpshldvd_xmm_k1z_xmm_xmmm128b32,
		EVEX_Vpshldvd_ymm_k1z_ymm_ymmm256b32,
		EVEX_Vpshldvd_zmm_k1z_zmm_zmmm512b32,
		EVEX_Vpshldvq_xmm_k1z_xmm_xmmm128b64,
		EVEX_Vpshldvq_ymm_k1z_ymm_ymmm256b64,
		EVEX_Vpshldvq_zmm_k1z_zmm_zmmm512b64,
		EVEX_Vpshrdvw_xmm_k1z_xmm_xmmm128,
		EVEX_Vpshrdvw_ymm_k1z_ymm_ymmm256,
		EVEX_Vpshrdvw_zmm_k1z_zmm_zmmm512,
		EVEX_Vcvtneps2bf16_xmm_k1z_xmmm128b32,
		EVEX_Vcvtneps2bf16_xmm_k1z_ymmm256b32,
		EVEX_Vcvtneps2bf16_ymm_k1z_zmmm512b32,
		EVEX_Vcvtne2ps2bf16_xmm_k1z_xmm_xmmm128b32,
		EVEX_Vcvtne2ps2bf16_ymm_k1z_ymm_ymmm256b32,
		EVEX_Vcvtne2ps2bf16_zmm_k1z_zmm_zmmm512b32,
		EVEX_Vpshrdvd_xmm_k1z_xmm_xmmm128b32,
		EVEX_Vpshrdvd_ymm_k1z_ymm_ymmm256b32,
		EVEX_Vpshrdvd_zmm_k1z_zmm_zmmm512b32,
		EVEX_Vpshrdvq_xmm_k1z_xmm_xmmm128b64,
		EVEX_Vpshrdvq_ymm_k1z_ymm_ymmm256b64,
		EVEX_Vpshrdvq_zmm_k1z_zmm_zmmm512b64,
		EVEX_Vpermi2b_xmm_k1z_xmm_xmmm128,
		EVEX_Vpermi2b_ymm_k1z_ymm_ymmm256,
		EVEX_Vpermi2b_zmm_k1z_zmm_zmmm512,
		EVEX_Vpermi2w_xmm_k1z_xmm_xmmm128,
		EVEX_Vpermi2w_ymm_k1z_ymm_ymmm256,
		EVEX_Vpermi2w_zmm_k1z_zmm_zmmm512,
		EVEX_Vpermi2d_xmm_k1z_xmm_xmmm128b32,
		EVEX_Vpermi2d_ymm_k1z_ymm_ymmm256b32,
		EVEX_Vpermi2d_zmm_k1z_zmm_zmmm512b32,
		EVEX_Vpermi2q_xmm_k1z_xmm_xmmm128b64,
		EVEX_Vpermi2q_ymm_k1z_ymm_ymmm256b64,
		EVEX_Vpermi2q_zmm_k1z_zmm_zmmm512b64,
		EVEX_Vpermi2ps_xmm_k1z_xmm_xmmm128b32,
		EVEX_Vpermi2ps_ymm_k1z_ymm_ymmm256b32,
		EVEX_Vpermi2ps_zmm_k1z_zmm_zmmm512b32,
		EVEX_Vpermi2pd_xmm_k1z_xmm_xmmm128b64,
		EVEX_Vpermi2pd_ymm_k1z_ymm_ymmm256b64,
		EVEX_Vpermi2pd_zmm_k1z_zmm_zmmm512b64,
		VEX_Vpbroadcastb_xmm_xmmm8,
		VEX_Vpbroadcastb_ymm_xmmm8,
		EVEX_Vpbroadcastb_xmm_k1z_xmmm8,
		EVEX_Vpbroadcastb_ymm_k1z_xmmm8,
		EVEX_Vpbroadcastb_zmm_k1z_xmmm8,
		VEX_Vpbroadcastw_xmm_xmmm16,
		VEX_Vpbroadcastw_ymm_xmmm16,
		EVEX_Vpbroadcastw_xmm_k1z_xmmm16,
		EVEX_Vpbroadcastw_ymm_k1z_xmmm16,
		EVEX_Vpbroadcastw_zmm_k1z_xmmm16,
		EVEX_Vpbroadcastb_xmm_k1z_r32,
		EVEX_Vpbroadcastb_ymm_k1z_r32,
		EVEX_Vpbroadcastb_zmm_k1z_r32,
		EVEX_Vpbroadcastw_xmm_k1z_r32,
		EVEX_Vpbroadcastw_ymm_k1z_r32,
		EVEX_Vpbroadcastw_zmm_k1z_r32,
		EVEX_Vpbroadcastd_xmm_k1z_r32,
		EVEX_Vpbroadcastd_ymm_k1z_r32,
		EVEX_Vpbroadcastd_zmm_k1z_r32,
		EVEX_Vpbroadcastq_xmm_k1z_r64,
		EVEX_Vpbroadcastq_ymm_k1z_r64,
		EVEX_Vpbroadcastq_zmm_k1z_r64,
		EVEX_Vpermt2b_xmm_k1z_xmm_xmmm128,
		EVEX_Vpermt2b_ymm_k1z_ymm_ymmm256,
		EVEX_Vpermt2b_zmm_k1z_zmm_zmmm512,
		EVEX_Vpermt2w_xmm_k1z_xmm_xmmm128,
		EVEX_Vpermt2w_ymm_k1z_ymm_ymmm256,
		EVEX_Vpermt2w_zmm_k1z_zmm_zmmm512,
		EVEX_Vpermt2d_xmm_k1z_xmm_xmmm128b32,
		EVEX_Vpermt2d_ymm_k1z_ymm_ymmm256b32,
		EVEX_Vpermt2d_zmm_k1z_zmm_zmmm512b32,
		EVEX_Vpermt2q_xmm_k1z_xmm_xmmm128b64,
		EVEX_Vpermt2q_ymm_k1z_ymm_ymmm256b64,
		EVEX_Vpermt2q_zmm_k1z_zmm_zmmm512b64,
		EVEX_Vpermt2ps_xmm_k1z_xmm_xmmm128b32,
		EVEX_Vpermt2ps_ymm_k1z_ymm_ymmm256b32,
		EVEX_Vpermt2ps_zmm_k1z_zmm_zmmm512b32,
		EVEX_Vpermt2pd_xmm_k1z_xmm_xmmm128b64,
		EVEX_Vpermt2pd_ymm_k1z_ymm_ymmm256b64,
		EVEX_Vpermt2pd_zmm_k1z_zmm_zmmm512b64,
		Invept_r32_m128,
		Invept_r64_m128,
		Invvpid_r32_m128,
		Invvpid_r64_m128,
		Invpcid_r32_m128,
		Invpcid_r64_m128,
		EVEX_Vpmultishiftqb_xmm_k1z_xmm_xmmm128b64,
		EVEX_Vpmultishiftqb_ymm_k1z_ymm_ymmm256b64,
		EVEX_Vpmultishiftqb_zmm_k1z_zmm_zmmm512b64,
		EVEX_Vexpandps_xmm_k1z_xmmm128,
		EVEX_Vexpandps_ymm_k1z_ymmm256,
		EVEX_Vexpandps_zmm_k1z_zmmm512,
		EVEX_Vexpandpd_xmm_k1z_xmmm128,
		EVEX_Vexpandpd_ymm_k1z_ymmm256,
		EVEX_Vexpandpd_zmm_k1z_zmmm512,
		EVEX_Vpexpandd_xmm_k1z_xmmm128,
		EVEX_Vpexpandd_ymm_k1z_ymmm256,
		EVEX_Vpexpandd_zmm_k1z_zmmm512,
		EVEX_Vpexpandq_xmm_k1z_xmmm128,
		EVEX_Vpexpandq_ymm_k1z_ymmm256,
		EVEX_Vpexpandq_zmm_k1z_zmmm512,
		EVEX_Vcompressps_xmmm128_k1z_xmm,
		EVEX_Vcompressps_ymmm256_k1z_ymm,
		EVEX_Vcompressps_zmmm512_k1z_zmm,
		EVEX_Vcompresspd_xmmm128_k1z_xmm,
		EVEX_Vcompresspd_ymmm256_k1z_ymm,
		EVEX_Vcompresspd_zmmm512_k1z_zmm,
		EVEX_Vpcompressd_xmmm128_k1z_xmm,
		EVEX_Vpcompressd_ymmm256_k1z_ymm,
		EVEX_Vpcompressd_zmmm512_k1z_zmm,
		EVEX_Vpcompressq_xmmm128_k1z_xmm,
		EVEX_Vpcompressq_ymmm256_k1z_ymm,
		EVEX_Vpcompressq_zmmm512_k1z_zmm,
		VEX_Vpmaskmovd_xmm_xmm_m128,
		VEX_Vpmaskmovd_ymm_ymm_m256,
		VEX_Vpmaskmovq_xmm_xmm_m128,
		VEX_Vpmaskmovq_ymm_ymm_m256,
		EVEX_Vpermb_xmm_k1z_xmm_xmmm128,
		EVEX_Vpermb_ymm_k1z_ymm_ymmm256,
		EVEX_Vpermb_zmm_k1z_zmm_zmmm512,
		EVEX_Vpermw_xmm_k1z_xmm_xmmm128,
		EVEX_Vpermw_ymm_k1z_ymm_ymmm256,
		EVEX_Vpermw_zmm_k1z_zmm_zmmm512,
		VEX_Vpmaskmovd_m128_xmm_xmm,
		VEX_Vpmaskmovd_m256_ymm_ymm,
		VEX_Vpmaskmovq_m128_xmm_xmm,
		VEX_Vpmaskmovq_m256_ymm_ymm,
		EVEX_Vpshufbitqmb_kr_k1_xmm_xmmm128,
		EVEX_Vpshufbitqmb_kr_k1_ymm_ymmm256,
		EVEX_Vpshufbitqmb_kr_k1_zmm_zmmm512,
		VEX_Vpgatherdd_xmm_vm32x_xmm,
		VEX_Vpgatherdd_ymm_vm32y_ymm,
		VEX_Vpgatherdq_xmm_vm32x_xmm,
		VEX_Vpgatherdq_ymm_vm32x_ymm,
		EVEX_Vpgatherdd_xmm_k1_vm32x,
		EVEX_Vpgatherdd_ymm_k1_vm32y,
		EVEX_Vpgatherdd_zmm_k1_vm32z,
		EVEX_Vpgatherdq_xmm_k1_vm32x,
		EVEX_Vpgatherdq_ymm_k1_vm32x,
		EVEX_Vpgatherdq_zmm_k1_vm32y,
		VEX_Vpgatherqd_xmm_vm64x_xmm,
		VEX_Vpgatherqd_xmm_vm64y_xmm,
		VEX_Vpgatherqq_xmm_vm64x_xmm,
		VEX_Vpgatherqq_ymm_vm64y_ymm,
		EVEX_Vpgatherqd_xmm_k1_vm64x,
		EVEX_Vpgatherqd_xmm_k1_vm64y,
		EVEX_Vpgatherqd_ymm_k1_vm64z,
		EVEX_Vpgatherqq_xmm_k1_vm64x,
		EVEX_Vpgatherqq_ymm_k1_vm64y,
		EVEX_Vpgatherqq_zmm_k1_vm64z,
		VEX_Vgatherdps_xmm_vm32x_xmm,
		VEX_Vgatherdps_ymm_vm32y_ymm,
		VEX_Vgatherdpd_xmm_vm32x_xmm,
		VEX_Vgatherdpd_ymm_vm32x_ymm,
		EVEX_Vgatherdps_xmm_k1_vm32x,
		EVEX_Vgatherdps_ymm_k1_vm32y,
		EVEX_Vgatherdps_zmm_k1_vm32z,
		EVEX_Vgatherdpd_xmm_k1_vm32x,
		EVEX_Vgatherdpd_ymm_k1_vm32x,
		EVEX_Vgatherdpd_zmm_k1_vm32y,
		VEX_Vgatherqps_xmm_vm64x_xmm,
		VEX_Vgatherqps_xmm_vm64y_xmm,
		VEX_Vgatherqpd_xmm_vm64x_xmm,
		VEX_Vgatherqpd_ymm_vm64y_ymm,
		EVEX_Vgatherqps_xmm_k1_vm64x,
		EVEX_Vgatherqps_xmm_k1_vm64y,
		EVEX_Vgatherqps_ymm_k1_vm64z,
		EVEX_Vgatherqpd_xmm_k1_vm64x,
		EVEX_Vgatherqpd_ymm_k1_vm64y,
		EVEX_Vgatherqpd_zmm_k1_vm64z,
		VEX_Vfmaddsub132ps_xmm_xmm_xmmm128,
		VEX_Vfmaddsub132ps_ymm_ymm_ymmm256,
		VEX_Vfmaddsub132pd_xmm_xmm_xmmm128,
		VEX_Vfmaddsub132pd_ymm_ymm_ymmm256,
		EVEX_Vfmaddsub132ps_xmm_k1z_xmm_xmmm128b32,
		EVEX_Vfmaddsub132ps_ymm_k1z_ymm_ymmm256b32,
		EVEX_Vfmaddsub132ps_zmm_k1z_zmm_zmmm512b32_er,
		EVEX_Vfmaddsub132pd_xmm_k1z_xmm_xmmm128b64,
		EVEX_Vfmaddsub132pd_ymm_k1z_ymm_ymmm256b64,
		EVEX_Vfmaddsub132pd_zmm_k1z_zmm_zmmm512b64_er,
		VEX_Vfmsubadd132ps_xmm_xmm_xmmm128,
		VEX_Vfmsubadd132ps_ymm_ymm_ymmm256,
		VEX_Vfmsubadd132pd_xmm_xmm_xmmm128,
		VEX_Vfmsubadd132pd_ymm_ymm_ymmm256,
		EVEX_Vfmsubadd132ps_xmm_k1z_xmm_xmmm128b32,
		EVEX_Vfmsubadd132ps_ymm_k1z_ymm_ymmm256b32,
		EVEX_Vfmsubadd132ps_zmm_k1z_zmm_zmmm512b32_er,
		EVEX_Vfmsubadd132pd_xmm_k1z_xmm_xmmm128b64,
		EVEX_Vfmsubadd132pd_ymm_k1z_ymm_ymmm256b64,
		EVEX_Vfmsubadd132pd_zmm_k1z_zmm_zmmm512b64_er,
		VEX_Vfmadd132ps_xmm_xmm_xmmm128,
		VEX_Vfmadd132ps_ymm_ymm_ymmm256,
		VEX_Vfmadd132pd_xmm_xmm_xmmm128,
		VEX_Vfmadd132pd_ymm_ymm_ymmm256,
		EVEX_Vfmadd132ps_xmm_k1z_xmm_xmmm128b32,
		EVEX_Vfmadd132ps_ymm_k1z_ymm_ymmm256b32,
		EVEX_Vfmadd132ps_zmm_k1z_zmm_zmmm512b32_er,
		EVEX_Vfmadd132pd_xmm_k1z_xmm_xmmm128b64,
		EVEX_Vfmadd132pd_ymm_k1z_ymm_ymmm256b64,
		EVEX_Vfmadd132pd_zmm_k1z_zmm_zmmm512b64_er,
		VEX_Vfmadd132ss_xmm_xmm_xmmm32,
		VEX_Vfmadd132sd_xmm_xmm_xmmm64,
		EVEX_Vfmadd132ss_xmm_k1z_xmm_xmmm32_er,
		EVEX_Vfmadd132sd_xmm_k1z_xmm_xmmm64_er,
		VEX_Vfmsub132ps_xmm_xmm_xmmm128,
		VEX_Vfmsub132ps_ymm_ymm_ymmm256,
		VEX_Vfmsub132pd_xmm_xmm_xmmm128,
		VEX_Vfmsub132pd_ymm_ymm_ymmm256,
		EVEX_Vfmsub132ps_xmm_k1z_xmm_xmmm128b32,
		EVEX_Vfmsub132ps_ymm_k1z_ymm_ymmm256b32,
		EVEX_Vfmsub132ps_zmm_k1z_zmm_zmmm512b32_er,
		EVEX_Vfmsub132pd_xmm_k1z_xmm_xmmm128b64,
		EVEX_Vfmsub132pd_ymm_k1z_ymm_ymmm256b64,
		EVEX_Vfmsub132pd_zmm_k1z_zmm_zmmm512b64_er,
		EVEX_V4fmaddps_zmm_k1z_zmmp3_m128,
		VEX_Vfmsub132ss_xmm_xmm_xmmm32,
		VEX_Vfmsub132sd_xmm_xmm_xmmm64,
		EVEX_Vfmsub132ss_xmm_k1z_xmm_xmmm32_er,
		EVEX_Vfmsub132sd_xmm_k1z_xmm_xmmm64_er,
		EVEX_V4fmaddss_xmm_k1z_xmmp3_m128,
		VEX_Vfnmadd132ps_xmm_xmm_xmmm128,
		VEX_Vfnmadd132ps_ymm_ymm_ymmm256,
		VEX_Vfnmadd132pd_xmm_xmm_xmmm128,
		VEX_Vfnmadd132pd_ymm_ymm_ymmm256,
		EVEX_Vfnmadd132ps_xmm_k1z_xmm_xmmm128b32,
		EVEX_Vfnmadd132ps_ymm_k1z_ymm_ymmm256b32,
		EVEX_Vfnmadd132ps_zmm_k1z_zmm_zmmm512b32_er,
		EVEX_Vfnmadd132pd_xmm_k1z_xmm_xmmm128b64,
		EVEX_Vfnmadd132pd_ymm_k1z_ymm_ymmm256b64,
		EVEX_Vfnmadd132pd_zmm_k1z_zmm_zmmm512b64_er,
		VEX_Vfnmadd132ss_xmm_xmm_xmmm32,
		VEX_Vfnmadd132sd_xmm_xmm_xmmm64,
		EVEX_Vfnmadd132ss_xmm_k1z_xmm_xmmm32_er,
		EVEX_Vfnmadd132sd_xmm_k1z_xmm_xmmm64_er,
		VEX_Vfnmsub132ps_xmm_xmm_xmmm128,
		VEX_Vfnmsub132ps_ymm_ymm_ymmm256,
		VEX_Vfnmsub132pd_xmm_xmm_xmmm128,
		VEX_Vfnmsub132pd_ymm_ymm_ymmm256,
		EVEX_Vfnmsub132ps_xmm_k1z_xmm_xmmm128b32,
		EVEX_Vfnmsub132ps_ymm_k1z_ymm_ymmm256b32,
		EVEX_Vfnmsub132ps_zmm_k1z_zmm_zmmm512b32_er,
		EVEX_Vfnmsub132pd_xmm_k1z_xmm_xmmm128b64,
		EVEX_Vfnmsub132pd_ymm_k1z_ymm_ymmm256b64,
		EVEX_Vfnmsub132pd_zmm_k1z_zmm_zmmm512b64_er,
		VEX_Vfnmsub132ss_xmm_xmm_xmmm32,
		VEX_Vfnmsub132sd_xmm_xmm_xmmm64,
		EVEX_Vfnmsub132ss_xmm_k1z_xmm_xmmm32_er,
		EVEX_Vfnmsub132sd_xmm_k1z_xmm_xmmm64_er,
		EVEX_Vpscatterdd_vm32x_k1_xmm,
		EVEX_Vpscatterdd_vm32y_k1_ymm,
		EVEX_Vpscatterdd_vm32z_k1_zmm,
		EVEX_Vpscatterdq_vm32x_k1_xmm,
		EVEX_Vpscatterdq_vm32x_k1_ymm,
		EVEX_Vpscatterdq_vm32y_k1_zmm,
		EVEX_Vpscatterqd_vm64x_k1_xmm,
		EVEX_Vpscatterqd_vm64y_k1_xmm,
		EVEX_Vpscatterqd_vm64z_k1_ymm,
		EVEX_Vpscatterqq_vm64x_k1_xmm,
		EVEX_Vpscatterqq_vm64y_k1_ymm,
		EVEX_Vpscatterqq_vm64z_k1_zmm,
		EVEX_Vscatterdps_vm32x_k1_xmm,
		EVEX_Vscatterdps_vm32y_k1_ymm,
		EVEX_Vscatterdps_vm32z_k1_zmm,
		EVEX_Vscatterdpd_vm32x_k1_xmm,
		EVEX_Vscatterdpd_vm32x_k1_ymm,
		EVEX_Vscatterdpd_vm32y_k1_zmm,
		EVEX_Vscatterqps_vm64x_k1_xmm,
		EVEX_Vscatterqps_vm64y_k1_xmm,
		EVEX_Vscatterqps_vm64z_k1_ymm,
		EVEX_Vscatterqpd_vm64x_k1_xmm,
		EVEX_Vscatterqpd_vm64y_k1_ymm,
		EVEX_Vscatterqpd_vm64z_k1_zmm,
		VEX_Vfmaddsub213ps_xmm_xmm_xmmm128,
		VEX_Vfmaddsub213ps_ymm_ymm_ymmm256,
		VEX_Vfmaddsub213pd_xmm_xmm_xmmm128,
		VEX_Vfmaddsub213pd_ymm_ymm_ymmm256,
		EVEX_Vfmaddsub213ps_xmm_k1z_xmm_xmmm128b32,
		EVEX_Vfmaddsub213ps_ymm_k1z_ymm_ymmm256b32,
		EVEX_Vfmaddsub213ps_zmm_k1z_zmm_zmmm512b32_er,
		EVEX_Vfmaddsub213pd_xmm_k1z_xmm_xmmm128b64,
		EVEX_Vfmaddsub213pd_ymm_k1z_ymm_ymmm256b64,
		EVEX_Vfmaddsub213pd_zmm_k1z_zmm_zmmm512b64_er,
		VEX_Vfmsubadd213ps_xmm_xmm_xmmm128,
		VEX_Vfmsubadd213ps_ymm_ymm_ymmm256,
		VEX_Vfmsubadd213pd_xmm_xmm_xmmm128,
		VEX_Vfmsubadd213pd_ymm_ymm_ymmm256,
		EVEX_Vfmsubadd213ps_xmm_k1z_xmm_xmmm128b32,
		EVEX_Vfmsubadd213ps_ymm_k1z_ymm_ymmm256b32,
		EVEX_Vfmsubadd213ps_zmm_k1z_zmm_zmmm512b32_er,
		EVEX_Vfmsubadd213pd_xmm_k1z_xmm_xmmm128b64,
		EVEX_Vfmsubadd213pd_ymm_k1z_ymm_ymmm256b64,
		EVEX_Vfmsubadd213pd_zmm_k1z_zmm_zmmm512b64_er,
		VEX_Vfmadd213ps_xmm_xmm_xmmm128,
		VEX_Vfmadd213ps_ymm_ymm_ymmm256,
		VEX_Vfmadd213pd_xmm_xmm_xmmm128,
		VEX_Vfmadd213pd_ymm_ymm_ymmm256,
		EVEX_Vfmadd213ps_xmm_k1z_xmm_xmmm128b32,
		EVEX_Vfmadd213ps_ymm_k1z_ymm_ymmm256b32,
		EVEX_Vfmadd213ps_zmm_k1z_zmm_zmmm512b32_er,
		EVEX_Vfmadd213pd_xmm_k1z_xmm_xmmm128b64,
		EVEX_Vfmadd213pd_ymm_k1z_ymm_ymmm256b64,
		EVEX_Vfmadd213pd_zmm_k1z_zmm_zmmm512b64_er,
		VEX_Vfmadd213ss_xmm_xmm_xmmm32,
		VEX_Vfmadd213sd_xmm_xmm_xmmm64,
		EVEX_Vfmadd213ss_xmm_k1z_xmm_xmmm32_er,
		EVEX_Vfmadd213sd_xmm_k1z_xmm_xmmm64_er,
		VEX_Vfmsub213ps_xmm_xmm_xmmm128,
		VEX_Vfmsub213ps_ymm_ymm_ymmm256,
		VEX_Vfmsub213pd_xmm_xmm_xmmm128,
		VEX_Vfmsub213pd_ymm_ymm_ymmm256,
		EVEX_Vfmsub213ps_xmm_k1z_xmm_xmmm128b32,
		EVEX_Vfmsub213ps_ymm_k1z_ymm_ymmm256b32,
		EVEX_Vfmsub213ps_zmm_k1z_zmm_zmmm512b32_er,
		EVEX_Vfmsub213pd_xmm_k1z_xmm_xmmm128b64,
		EVEX_Vfmsub213pd_ymm_k1z_ymm_ymmm256b64,
		EVEX_Vfmsub213pd_zmm_k1z_zmm_zmmm512b64_er,
		EVEX_V4fnmaddps_zmm_k1z_zmmp3_m128,
		VEX_Vfmsub213ss_xmm_xmm_xmmm32,
		VEX_Vfmsub213sd_xmm_xmm_xmmm64,
		EVEX_Vfmsub213ss_xmm_k1z_xmm_xmmm32_er,
		EVEX_Vfmsub213sd_xmm_k1z_xmm_xmmm64_er,
		EVEX_V4fnmaddss_xmm_k1z_xmmp3_m128,
		VEX_Vfnmadd213ps_xmm_xmm_xmmm128,
		VEX_Vfnmadd213ps_ymm_ymm_ymmm256,
		VEX_Vfnmadd213pd_xmm_xmm_xmmm128,
		VEX_Vfnmadd213pd_ymm_ymm_ymmm256,
		EVEX_Vfnmadd213ps_xmm_k1z_xmm_xmmm128b32,
		EVEX_Vfnmadd213ps_ymm_k1z_ymm_ymmm256b32,
		EVEX_Vfnmadd213ps_zmm_k1z_zmm_zmmm512b32_er,
		EVEX_Vfnmadd213pd_xmm_k1z_xmm_xmmm128b64,
		EVEX_Vfnmadd213pd_ymm_k1z_ymm_ymmm256b64,
		EVEX_Vfnmadd213pd_zmm_k1z_zmm_zmmm512b64_er,
		VEX_Vfnmadd213ss_xmm_xmm_xmmm32,
		VEX_Vfnmadd213sd_xmm_xmm_xmmm64,
		EVEX_Vfnmadd213ss_xmm_k1z_xmm_xmmm32_er,
		EVEX_Vfnmadd213sd_xmm_k1z_xmm_xmmm64_er,
		VEX_Vfnmsub213ps_xmm_xmm_xmmm128,
		VEX_Vfnmsub213ps_ymm_ymm_ymmm256,
		VEX_Vfnmsub213pd_xmm_xmm_xmmm128,
		VEX_Vfnmsub213pd_ymm_ymm_ymmm256,
		EVEX_Vfnmsub213ps_xmm_k1z_xmm_xmmm128b32,
		EVEX_Vfnmsub213ps_ymm_k1z_ymm_ymmm256b32,
		EVEX_Vfnmsub213ps_zmm_k1z_zmm_zmmm512b32_er,
		EVEX_Vfnmsub213pd_xmm_k1z_xmm_xmmm128b64,
		EVEX_Vfnmsub213pd_ymm_k1z_ymm_ymmm256b64,
		EVEX_Vfnmsub213pd_zmm_k1z_zmm_zmmm512b64_er,
		VEX_Vfnmsub213ss_xmm_xmm_xmmm32,
		VEX_Vfnmsub213sd_xmm_xmm_xmmm64,
		EVEX_Vfnmsub213ss_xmm_k1z_xmm_xmmm32_er,
		EVEX_Vfnmsub213sd_xmm_k1z_xmm_xmmm64_er,
		EVEX_Vpmadd52luq_xmm_k1z_xmm_xmmm128b64,
		EVEX_Vpmadd52luq_ymm_k1z_ymm_ymmm256b64,
		EVEX_Vpmadd52luq_zmm_k1z_zmm_zmmm512b64,
		EVEX_Vpmadd52huq_xmm_k1z_xmm_xmmm128b64,
		EVEX_Vpmadd52huq_ymm_k1z_ymm_ymmm256b64,
		EVEX_Vpmadd52huq_zmm_k1z_zmm_zmmm512b64,
		VEX_Vfmaddsub231ps_xmm_xmm_xmmm128,
		VEX_Vfmaddsub231ps_ymm_ymm_ymmm256,
		VEX_Vfmaddsub231pd_xmm_xmm_xmmm128,
		VEX_Vfmaddsub231pd_ymm_ymm_ymmm256,
		EVEX_Vfmaddsub231ps_xmm_k1z_xmm_xmmm128b32,
		EVEX_Vfmaddsub231ps_ymm_k1z_ymm_ymmm256b32,
		EVEX_Vfmaddsub231ps_zmm_k1z_zmm_zmmm512b32_er,
		EVEX_Vfmaddsub231pd_xmm_k1z_xmm_xmmm128b64,
		EVEX_Vfmaddsub231pd_ymm_k1z_ymm_ymmm256b64,
		EVEX_Vfmaddsub231pd_zmm_k1z_zmm_zmmm512b64_er,
		VEX_Vfmsubadd231ps_xmm_xmm_xmmm128,
		VEX_Vfmsubadd231ps_ymm_ymm_ymmm256,
		VEX_Vfmsubadd231pd_xmm_xmm_xmmm128,
		VEX_Vfmsubadd231pd_ymm_ymm_ymmm256,
		EVEX_Vfmsubadd231ps_xmm_k1z_xmm_xmmm128b32,
		EVEX_Vfmsubadd231ps_ymm_k1z_ymm_ymmm256b32,
		EVEX_Vfmsubadd231ps_zmm_k1z_zmm_zmmm512b32_er,
		EVEX_Vfmsubadd231pd_xmm_k1z_xmm_xmmm128b64,
		EVEX_Vfmsubadd231pd_ymm_k1z_ymm_ymmm256b64,
		EVEX_Vfmsubadd231pd_zmm_k1z_zmm_zmmm512b64_er,
		VEX_Vfmadd231ps_xmm_xmm_xmmm128,
		VEX_Vfmadd231ps_ymm_ymm_ymmm256,
		VEX_Vfmadd231pd_xmm_xmm_xmmm128,
		VEX_Vfmadd231pd_ymm_ymm_ymmm256,
		EVEX_Vfmadd231ps_xmm_k1z_xmm_xmmm128b32,
		EVEX_Vfmadd231ps_ymm_k1z_ymm_ymmm256b32,
		EVEX_Vfmadd231ps_zmm_k1z_zmm_zmmm512b32_er,
		EVEX_Vfmadd231pd_xmm_k1z_xmm_xmmm128b64,
		EVEX_Vfmadd231pd_ymm_k1z_ymm_ymmm256b64,
		EVEX_Vfmadd231pd_zmm_k1z_zmm_zmmm512b64_er,
		VEX_Vfmadd231ss_xmm_xmm_xmmm32,
		VEX_Vfmadd231sd_xmm_xmm_xmmm64,
		EVEX_Vfmadd231ss_xmm_k1z_xmm_xmmm32_er,
		EVEX_Vfmadd231sd_xmm_k1z_xmm_xmmm64_er,
		VEX_Vfmsub231ps_xmm_xmm_xmmm128,
		VEX_Vfmsub231ps_ymm_ymm_ymmm256,
		VEX_Vfmsub231pd_xmm_xmm_xmmm128,
		VEX_Vfmsub231pd_ymm_ymm_ymmm256,
		EVEX_Vfmsub231ps_xmm_k1z_xmm_xmmm128b32,
		EVEX_Vfmsub231ps_ymm_k1z_ymm_ymmm256b32,
		EVEX_Vfmsub231ps_zmm_k1z_zmm_zmmm512b32_er,
		EVEX_Vfmsub231pd_xmm_k1z_xmm_xmmm128b64,
		EVEX_Vfmsub231pd_ymm_k1z_ymm_ymmm256b64,
		EVEX_Vfmsub231pd_zmm_k1z_zmm_zmmm512b64_er,
		VEX_Vfmsub231ss_xmm_xmm_xmmm32,
		VEX_Vfmsub231sd_xmm_xmm_xmmm64,
		EVEX_Vfmsub231ss_xmm_k1z_xmm_xmmm32_er,
		EVEX_Vfmsub231sd_xmm_k1z_xmm_xmmm64_er,
		VEX_Vfnmadd231ps_xmm_xmm_xmmm128,
		VEX_Vfnmadd231ps_ymm_ymm_ymmm256,
		VEX_Vfnmadd231pd_xmm_xmm_xmmm128,
		VEX_Vfnmadd231pd_ymm_ymm_ymmm256,
		EVEX_Vfnmadd231ps_xmm_k1z_xmm_xmmm128b32,
		EVEX_Vfnmadd231ps_ymm_k1z_ymm_ymmm256b32,
		EVEX_Vfnmadd231ps_zmm_k1z_zmm_zmmm512b32_er,
		EVEX_Vfnmadd231pd_xmm_k1z_xmm_xmmm128b64,
		EVEX_Vfnmadd231pd_ymm_k1z_ymm_ymmm256b64,
		EVEX_Vfnmadd231pd_zmm_k1z_zmm_zmmm512b64_er,
		VEX_Vfnmadd231ss_xmm_xmm_xmmm32,
		VEX_Vfnmadd231sd_xmm_xmm_xmmm64,
		EVEX_Vfnmadd231ss_xmm_k1z_xmm_xmmm32_er,
		EVEX_Vfnmadd231sd_xmm_k1z_xmm_xmmm64_er,
		VEX_Vfnmsub231ps_xmm_xmm_xmmm128,
		VEX_Vfnmsub231ps_ymm_ymm_ymmm256,
		VEX_Vfnmsub231pd_xmm_xmm_xmmm128,
		VEX_Vfnmsub231pd_ymm_ymm_ymmm256,
		EVEX_Vfnmsub231ps_xmm_k1z_xmm_xmmm128b32,
		EVEX_Vfnmsub231ps_ymm_k1z_ymm_ymmm256b32,
		EVEX_Vfnmsub231ps_zmm_k1z_zmm_zmmm512b32_er,
		EVEX_Vfnmsub231pd_xmm_k1z_xmm_xmmm128b64,
		EVEX_Vfnmsub231pd_ymm_k1z_ymm_ymmm256b64,
		EVEX_Vfnmsub231pd_zmm_k1z_zmm_zmmm512b64_er,
		VEX_Vfnmsub231ss_xmm_xmm_xmmm32,
		VEX_Vfnmsub231sd_xmm_xmm_xmmm64,
		EVEX_Vfnmsub231ss_xmm_k1z_xmm_xmmm32_er,
		EVEX_Vfnmsub231sd_xmm_k1z_xmm_xmmm64_er,
		EVEX_Vpconflictd_xmm_k1z_xmmm128b32,
		EVEX_Vpconflictd_ymm_k1z_ymmm256b32,
		EVEX_Vpconflictd_zmm_k1z_zmmm512b32,
		EVEX_Vpconflictq_xmm_k1z_xmmm128b64,
		EVEX_Vpconflictq_ymm_k1z_ymmm256b64,
		EVEX_Vpconflictq_zmm_k1z_zmmm512b64,
		EVEX_Vgatherpf0dps_vm32z_k1,
		EVEX_Vgatherpf0dpd_vm32y_k1,
		EVEX_Vgatherpf1dps_vm32z_k1,
		EVEX_Vgatherpf1dpd_vm32y_k1,
		EVEX_Vscatterpf0dps_vm32z_k1,
		EVEX_Vscatterpf0dpd_vm32y_k1,
		EVEX_Vscatterpf1dps_vm32z_k1,
		EVEX_Vscatterpf1dpd_vm32y_k1,
		EVEX_Vgatherpf0qps_vm64z_k1,
		EVEX_Vgatherpf0qpd_vm64z_k1,
		EVEX_Vgatherpf1qps_vm64z_k1,
		EVEX_Vgatherpf1qpd_vm64z_k1,
		EVEX_Vscatterpf0qps_vm64z_k1,
		EVEX_Vscatterpf0qpd_vm64z_k1,
		EVEX_Vscatterpf1qps_vm64z_k1,
		EVEX_Vscatterpf1qpd_vm64z_k1,
		Sha1nexte_xmm_xmmm128,
		EVEX_Vexp2ps_zmm_k1z_zmmm512b32_sae,
		EVEX_Vexp2pd_zmm_k1z_zmmm512b64_sae,
		Sha1msg1_xmm_xmmm128,
		Sha1msg2_xmm_xmmm128,
		EVEX_Vrcp28ps_zmm_k1z_zmmm512b32_sae,
		EVEX_Vrcp28pd_zmm_k1z_zmmm512b64_sae,
		Sha256rnds2_xmm_xmmm128,
		EVEX_Vrcp28ss_xmm_k1z_xmm_xmmm32_sae,
		EVEX_Vrcp28sd_xmm_k1z_xmm_xmmm64_sae,
		Sha256msg1_xmm_xmmm128,
		EVEX_Vrsqrt28ps_zmm_k1z_zmmm512b32_sae,
		EVEX_Vrsqrt28pd_zmm_k1z_zmmm512b64_sae,
		Sha256msg2_xmm_xmmm128,
		EVEX_Vrsqrt28ss_xmm_k1z_xmm_xmmm32_sae,
		EVEX_Vrsqrt28sd_xmm_k1z_xmm_xmmm64_sae,
		Gf2p8mulb_xmm_xmmm128,
		VEX_Vgf2p8mulb_xmm_xmm_xmmm128,
		VEX_Vgf2p8mulb_ymm_ymm_ymmm256,
		EVEX_Vgf2p8mulb_xmm_k1z_xmm_xmmm128,
		EVEX_Vgf2p8mulb_ymm_k1z_ymm_ymmm256,
		EVEX_Vgf2p8mulb_zmm_k1z_zmm_zmmm512,
		Aesimc_xmm_xmmm128,
		VEX_Vaesimc_xmm_xmmm128,
		Aesenc_xmm_xmmm128,
		VEX_Vaesenc_xmm_xmm_xmmm128,
		VEX_Vaesenc_ymm_ymm_ymmm256,
		EVEX_Vaesenc_xmm_xmm_xmmm128,
		EVEX_Vaesenc_ymm_ymm_ymmm256,
		EVEX_Vaesenc_zmm_zmm_zmmm512,
		Aesenclast_xmm_xmmm128,
		VEX_Vaesenclast_xmm_xmm_xmmm128,
		VEX_Vaesenclast_ymm_ymm_ymmm256,
		EVEX_Vaesenclast_xmm_xmm_xmmm128,
		EVEX_Vaesenclast_ymm_ymm_ymmm256,
		EVEX_Vaesenclast_zmm_zmm_zmmm512,
		Aesdec_xmm_xmmm128,
		VEX_Vaesdec_xmm_xmm_xmmm128,
		VEX_Vaesdec_ymm_ymm_ymmm256,
		EVEX_Vaesdec_xmm_xmm_xmmm128,
		EVEX_Vaesdec_ymm_ymm_ymmm256,
		EVEX_Vaesdec_zmm_zmm_zmmm512,
		Aesdeclast_xmm_xmmm128,
		VEX_Vaesdeclast_xmm_xmm_xmmm128,
		VEX_Vaesdeclast_ymm_ymm_ymmm256,
		EVEX_Vaesdeclast_xmm_xmm_xmmm128,
		EVEX_Vaesdeclast_ymm_ymm_ymmm256,
		EVEX_Vaesdeclast_zmm_zmm_zmmm512,
		Movbe_r16_m16,
		Movbe_r32_m32,
		Movbe_r64_m64,
		Crc32_r32_rm8,
		Crc32_r64_rm8,
		Movbe_m16_r16,
		Movbe_m32_r32,
		Movbe_m64_r64,
		Crc32_r32_rm16,
		Crc32_r32_rm32,
		Crc32_r64_rm64,
		VEX_Andn_r32_r32_rm32,
		VEX_Andn_r64_r64_rm64,
		VEX_Blsr_r32_rm32,
		VEX_Blsr_r64_rm64,
		VEX_Blsmsk_r32_rm32,
		VEX_Blsmsk_r64_rm64,
		VEX_Blsi_r32_rm32,
		VEX_Blsi_r64_rm64,
		VEX_Bzhi_r32_rm32_r32,
		VEX_Bzhi_r64_rm64_r64,
		Wrussd_m32_r32,
		Wrussq_m64_r64,
		VEX_Pext_r32_r32_rm32,
		VEX_Pext_r64_r64_rm64,
		VEX_Pdep_r32_r32_rm32,
		VEX_Pdep_r64_r64_rm64,
		Wrssd_m32_r32,
		Wrssq_m64_r64,
		Adcx_r32_rm32,
		Adcx_r64_rm64,
		Adox_r32_rm32,
		Adox_r64_rm64,
		VEX_Mulx_r32_r32_rm32,
		VEX_Mulx_r64_r64_rm64,
		VEX_Bextr_r32_rm32_r32,
		VEX_Bextr_r64_rm64_r64,
		VEX_Shlx_r32_rm32_r32,
		VEX_Shlx_r64_rm64_r64,
		VEX_Sarx_r32_rm32_r32,
		VEX_Sarx_r64_rm64_r64,
		VEX_Shrx_r32_rm32_r32,
		VEX_Shrx_r64_rm64_r64,
		Movdir64b_r16_m512,
		Movdir64b_r32_m512,
		Movdir64b_r64_m512,
		Enqcmds_r16_m512,
		Enqcmds_r32_m512,
		Enqcmds_r64_m512,
		Enqcmd_r16_m512,
		Enqcmd_r32_m512,
		Enqcmd_r64_m512,
		Movdiri_m32_r32,
		Movdiri_m64_r64,
		VEX_Vpermq_ymm_ymmm256_imm8,
		EVEX_Vpermq_ymm_k1z_ymmm256b64_imm8,
		EVEX_Vpermq_zmm_k1z_zmmm512b64_imm8,
		VEX_Vpermpd_ymm_ymmm256_imm8,
		EVEX_Vpermpd_ymm_k1z_ymmm256b64_imm8,
		EVEX_Vpermpd_zmm_k1z_zmmm512b64_imm8,
		VEX_Vpblendd_xmm_xmm_xmmm128_imm8,
		VEX_Vpblendd_ymm_ymm_ymmm256_imm8,
		EVEX_Valignd_xmm_k1z_xmm_xmmm128b32_imm8,
		EVEX_Valignd_ymm_k1z_ymm_ymmm256b32_imm8,
		EVEX_Valignd_zmm_k1z_zmm_zmmm512b32_imm8,
		EVEX_Valignq_xmm_k1z_xmm_xmmm128b64_imm8,
		EVEX_Valignq_ymm_k1z_ymm_ymmm256b64_imm8,
		EVEX_Valignq_zmm_k1z_zmm_zmmm512b64_imm8,
		VEX_Vpermilps_xmm_xmmm128_imm8,
		VEX_Vpermilps_ymm_ymmm256_imm8,
		EVEX_Vpermilps_xmm_k1z_xmmm128b32_imm8,
		EVEX_Vpermilps_ymm_k1z_ymmm256b32_imm8,
		EVEX_Vpermilps_zmm_k1z_zmmm512b32_imm8,
		VEX_Vpermilpd_xmm_xmmm128_imm8,
		VEX_Vpermilpd_ymm_ymmm256_imm8,
		EVEX_Vpermilpd_xmm_k1z_xmmm128b64_imm8,
		EVEX_Vpermilpd_ymm_k1z_ymmm256b64_imm8,
		EVEX_Vpermilpd_zmm_k1z_zmmm512b64_imm8,
		VEX_Vperm2f128_ymm_ymm_ymmm256_imm8,
		Roundps_xmm_xmmm128_imm8,
		VEX_Vroundps_xmm_xmmm128_imm8,
		VEX_Vroundps_ymm_ymmm256_imm8,
		EVEX_Vrndscaleps_xmm_k1z_xmmm128b32_imm8,
		EVEX_Vrndscaleps_ymm_k1z_ymmm256b32_imm8,
		EVEX_Vrndscaleps_zmm_k1z_zmmm512b32_imm8_sae,
		Roundpd_xmm_xmmm128_imm8,
		VEX_Vroundpd_xmm_xmmm128_imm8,
		VEX_Vroundpd_ymm_ymmm256_imm8,
		EVEX_Vrndscalepd_xmm_k1z_xmmm128b64_imm8,
		EVEX_Vrndscalepd_ymm_k1z_ymmm256b64_imm8,
		EVEX_Vrndscalepd_zmm_k1z_zmmm512b64_imm8_sae,
		Roundss_xmm_xmmm32_imm8,
		VEX_Vroundss_xmm_xmm_xmmm32_imm8,
		EVEX_Vrndscaless_xmm_k1z_xmm_xmmm32_imm8_sae,
		Roundsd_xmm_xmmm64_imm8,
		VEX_Vroundsd_xmm_xmm_xmmm64_imm8,
		EVEX_Vrndscalesd_xmm_k1z_xmm_xmmm64_imm8_sae,
		Blendps_xmm_xmmm128_imm8,
		VEX_Vblendps_xmm_xmm_xmmm128_imm8,
		VEX_Vblendps_ymm_ymm_ymmm256_imm8,
		Blendpd_xmm_xmmm128_imm8,
		VEX_Vblendpd_xmm_xmm_xmmm128_imm8,
		VEX_Vblendpd_ymm_ymm_ymmm256_imm8,
		Pblendw_xmm_xmmm128_imm8,
		VEX_Vpblendw_xmm_xmm_xmmm128_imm8,
		VEX_Vpblendw_ymm_ymm_ymmm256_imm8,
		Palignr_mm_mmm64_imm8,
		Palignr_xmm_xmmm128_imm8,
		VEX_Vpalignr_xmm_xmm_xmmm128_imm8,
		VEX_Vpalignr_ymm_ymm_ymmm256_imm8,
		EVEX_Vpalignr_xmm_k1z_xmm_xmmm128_imm8,
		EVEX_Vpalignr_ymm_k1z_ymm_ymmm256_imm8,
		EVEX_Vpalignr_zmm_k1z_zmm_zmmm512_imm8,
		Pextrb_r32m8_xmm_imm8,
		Pextrb_r64m8_xmm_imm8,
		VEX_Vpextrb_r32m8_xmm_imm8,
		VEX_Vpextrb_r64m8_xmm_imm8,
		EVEX_Vpextrb_r32m8_xmm_imm8,
		EVEX_Vpextrb_r64m8_xmm_imm8,
		Pextrw_r32m16_xmm_imm8,
		Pextrw_r64m16_xmm_imm8,
		VEX_Vpextrw_r32m16_xmm_imm8,
		VEX_Vpextrw_r64m16_xmm_imm8,
		EVEX_Vpextrw_r32m16_xmm_imm8,
		EVEX_Vpextrw_r64m16_xmm_imm8,
		Pextrd_rm32_xmm_imm8,
		Pextrq_rm64_xmm_imm8,
		VEX_Vpextrd_rm32_xmm_imm8,
		VEX_Vpextrq_rm64_xmm_imm8,
		EVEX_Vpextrd_rm32_xmm_imm8,
		EVEX_Vpextrq_rm64_xmm_imm8,
		Extractps_rm32_xmm_imm8,
		Extractps_r64m32_xmm_imm8,
		VEX_Vextractps_rm32_xmm_imm8,
		VEX_Vextractps_r64m32_xmm_imm8,
		EVEX_Vextractps_rm32_xmm_imm8,
		EVEX_Vextractps_r64m32_xmm_imm8,
		VEX_Vinsertf128_ymm_ymm_xmmm128_imm8,
		EVEX_Vinsertf32x4_ymm_k1z_ymm_xmmm128_imm8,
		EVEX_Vinsertf32x4_zmm_k1z_zmm_xmmm128_imm8,
		EVEX_Vinsertf64x2_ymm_k1z_ymm_xmmm128_imm8,
		EVEX_Vinsertf64x2_zmm_k1z_zmm_xmmm128_imm8,
		VEX_Vextractf128_xmmm128_ymm_imm8,
		EVEX_Vextractf32x4_xmmm128_k1z_ymm_imm8,
		EVEX_Vextractf32x4_xmmm128_k1z_zmm_imm8,
		EVEX_Vextractf64x2_xmmm128_k1z_ymm_imm8,
		EVEX_Vextractf64x2_xmmm128_k1z_zmm_imm8,
		EVEX_Vinsertf32x8_zmm_k1z_zmm_ymmm256_imm8,
		EVEX_Vinsertf64x4_zmm_k1z_zmm_ymmm256_imm8,
		EVEX_Vextractf32x8_ymmm256_k1z_zmm_imm8,
		EVEX_Vextractf64x4_ymmm256_k1z_zmm_imm8,
		VEX_Vcvtps2ph_xmmm64_xmm_imm8,
		VEX_Vcvtps2ph_xmmm128_ymm_imm8,
		EVEX_Vcvtps2ph_xmmm64_k1z_xmm_imm8,
		EVEX_Vcvtps2ph_xmmm128_k1z_ymm_imm8,
		EVEX_Vcvtps2ph_ymmm256_k1z_zmm_imm8_sae,
		EVEX_Vpcmpud_kr_k1_xmm_xmmm128b32_imm8,
		EVEX_Vpcmpud_kr_k1_ymm_ymmm256b32_imm8,
		EVEX_Vpcmpud_kr_k1_zmm_zmmm512b32_imm8,
		EVEX_Vpcmpuq_kr_k1_xmm_xmmm128b64_imm8,
		EVEX_Vpcmpuq_kr_k1_ymm_ymmm256b64_imm8,
		EVEX_Vpcmpuq_kr_k1_zmm_zmmm512b64_imm8,
		EVEX_Vpcmpd_kr_k1_xmm_xmmm128b32_imm8,
		EVEX_Vpcmpd_kr_k1_ymm_ymmm256b32_imm8,
		EVEX_Vpcmpd_kr_k1_zmm_zmmm512b32_imm8,
		EVEX_Vpcmpq_kr_k1_xmm_xmmm128b64_imm8,
		EVEX_Vpcmpq_kr_k1_ymm_ymmm256b64_imm8,
		EVEX_Vpcmpq_kr_k1_zmm_zmmm512b64_imm8,
		Pinsrb_xmm_r32m8_imm8,
		Pinsrb_xmm_r64m8_imm8,
		VEX_Vpinsrb_xmm_xmm_r32m8_imm8,
		VEX_Vpinsrb_xmm_xmm_r64m8_imm8,
		EVEX_Vpinsrb_xmm_xmm_r32m8_imm8,
		EVEX_Vpinsrb_xmm_xmm_r64m8_imm8,
		Insertps_xmm_xmmm32_imm8,
		VEX_Vinsertps_xmm_xmm_xmmm32_imm8,
		EVEX_Vinsertps_xmm_xmm_xmmm32_imm8,
		Pinsrd_xmm_rm32_imm8,
		Pinsrq_xmm_rm64_imm8,
		VEX_Vpinsrd_xmm_xmm_rm32_imm8,
		VEX_Vpinsrq_xmm_xmm_rm64_imm8,
		EVEX_Vpinsrd_xmm_xmm_rm32_imm8,
		EVEX_Vpinsrq_xmm_xmm_rm64_imm8,
		EVEX_Vshuff32x4_ymm_k1z_ymm_ymmm256b32_imm8,
		EVEX_Vshuff32x4_zmm_k1z_zmm_zmmm512b32_imm8,
		EVEX_Vshuff64x2_ymm_k1z_ymm_ymmm256b64_imm8,
		EVEX_Vshuff64x2_zmm_k1z_zmm_zmmm512b64_imm8,
		EVEX_Vpternlogd_xmm_k1z_xmm_xmmm128b32_imm8,
		EVEX_Vpternlogd_ymm_k1z_ymm_ymmm256b32_imm8,
		EVEX_Vpternlogd_zmm_k1z_zmm_zmmm512b32_imm8,
		EVEX_Vpternlogq_xmm_k1z_xmm_xmmm128b64_imm8,
		EVEX_Vpternlogq_ymm_k1z_ymm_ymmm256b64_imm8,
		EVEX_Vpternlogq_zmm_k1z_zmm_zmmm512b64_imm8,
		EVEX_Vgetmantps_xmm_k1z_xmmm128b32_imm8,
		EVEX_Vgetmantps_ymm_k1z_ymmm256b32_imm8,
		EVEX_Vgetmantps_zmm_k1z_zmmm512b32_imm8_sae,
		EVEX_Vgetmantpd_xmm_k1z_xmmm128b64_imm8,
		EVEX_Vgetmantpd_ymm_k1z_ymmm256b64_imm8,
		EVEX_Vgetmantpd_zmm_k1z_zmmm512b64_imm8_sae,
		EVEX_Vgetmantss_xmm_k1z_xmm_xmmm32_imm8_sae,
		EVEX_Vgetmantsd_xmm_k1z_xmm_xmmm64_imm8_sae,
		VEX_Kshiftrb_kr_kr_imm8,
		VEX_Kshiftrw_kr_kr_imm8,
		VEX_Kshiftrd_kr_kr_imm8,
		VEX_Kshiftrq_kr_kr_imm8,
		VEX_Kshiftlb_kr_kr_imm8,
		VEX_Kshiftlw_kr_kr_imm8,
		VEX_Kshiftld_kr_kr_imm8,
		VEX_Kshiftlq_kr_kr_imm8,
		VEX_Vinserti128_ymm_ymm_xmmm128_imm8,
		EVEX_Vinserti32x4_ymm_k1z_ymm_xmmm128_imm8,
		EVEX_Vinserti32x4_zmm_k1z_zmm_xmmm128_imm8,
		EVEX_Vinserti64x2_ymm_k1z_ymm_xmmm128_imm8,
		EVEX_Vinserti64x2_zmm_k1z_zmm_xmmm128_imm8,
		VEX_Vextracti128_xmmm128_ymm_imm8,
		EVEX_Vextracti32x4_xmmm128_k1z_ymm_imm8,
		EVEX_Vextracti32x4_xmmm128_k1z_zmm_imm8,
		EVEX_Vextracti64x2_xmmm128_k1z_ymm_imm8,
		EVEX_Vextracti64x2_xmmm128_k1z_zmm_imm8,
		EVEX_Vinserti32x8_zmm_k1z_zmm_ymmm256_imm8,
		EVEX_Vinserti64x4_zmm_k1z_zmm_ymmm256_imm8,
		EVEX_Vextracti32x8_ymmm256_k1z_zmm_imm8,
		EVEX_Vextracti64x4_ymmm256_k1z_zmm_imm8,
		EVEX_Vpcmpub_kr_k1_xmm_xmmm128_imm8,
		EVEX_Vpcmpub_kr_k1_ymm_ymmm256_imm8,
		EVEX_Vpcmpub_kr_k1_zmm_zmmm512_imm8,
		EVEX_Vpcmpuw_kr_k1_xmm_xmmm128_imm8,
		EVEX_Vpcmpuw_kr_k1_ymm_ymmm256_imm8,
		EVEX_Vpcmpuw_kr_k1_zmm_zmmm512_imm8,
		EVEX_Vpcmpb_kr_k1_xmm_xmmm128_imm8,
		EVEX_Vpcmpb_kr_k1_ymm_ymmm256_imm8,
		EVEX_Vpcmpb_kr_k1_zmm_zmmm512_imm8,
		EVEX_Vpcmpw_kr_k1_xmm_xmmm128_imm8,
		EVEX_Vpcmpw_kr_k1_ymm_ymmm256_imm8,
		EVEX_Vpcmpw_kr_k1_zmm_zmmm512_imm8,
		Dpps_xmm_xmmm128_imm8,
		VEX_Vdpps_xmm_xmm_xmmm128_imm8,
		VEX_Vdpps_ymm_ymm_ymmm256_imm8,
		Dppd_xmm_xmmm128_imm8,
		VEX_Vdppd_xmm_xmm_xmmm128_imm8,
		Mpsadbw_xmm_xmmm128_imm8,
		VEX_Vmpsadbw_xmm_xmm_xmmm128_imm8,
		VEX_Vmpsadbw_ymm_ymm_ymmm256_imm8,
		EVEX_Vdbpsadbw_xmm_k1z_xmm_xmmm128_imm8,
		EVEX_Vdbpsadbw_ymm_k1z_ymm_ymmm256_imm8,
		EVEX_Vdbpsadbw_zmm_k1z_zmm_zmmm512_imm8,
		EVEX_Vshufi32x4_ymm_k1z_ymm_ymmm256b32_imm8,
		EVEX_Vshufi32x4_zmm_k1z_zmm_zmmm512b32_imm8,
		EVEX_Vshufi64x2_ymm_k1z_ymm_ymmm256b64_imm8,
		EVEX_Vshufi64x2_zmm_k1z_zmm_zmmm512b64_imm8,
		Pclmulqdq_xmm_xmmm128_imm8,
		VEX_Vpclmulqdq_xmm_xmm_xmmm128_imm8,
		VEX_Vpclmulqdq_ymm_ymm_ymmm256_imm8,
		EVEX_Vpclmulqdq_xmm_xmm_xmmm128_imm8,
		EVEX_Vpclmulqdq_ymm_ymm_ymmm256_imm8,
		EVEX_Vpclmulqdq_zmm_zmm_zmmm512_imm8,
		VEX_Vperm2i128_ymm_ymm_ymmm256_imm8,
		VEX_Vpermil2ps_xmm_xmm_xmmm128_xmm_imm4,
		VEX_Vpermil2ps_ymm_ymm_ymmm256_ymm_imm4,
		VEX_Vpermil2ps_xmm_xmm_xmm_xmmm128_imm4,
		VEX_Vpermil2ps_ymm_ymm_ymm_ymmm256_imm4,
		VEX_Vpermil2pd_xmm_xmm_xmmm128_xmm_imm4,
		VEX_Vpermil2pd_ymm_ymm_ymmm256_ymm_imm4,
		VEX_Vpermil2pd_xmm_xmm_xmm_xmmm128_imm4,
		VEX_Vpermil2pd_ymm_ymm_ymm_ymmm256_imm4,
		VEX_Vblendvps_xmm_xmm_xmmm128_xmm,
		VEX_Vblendvps_ymm_ymm_ymmm256_ymm,
		VEX_Vblendvpd_xmm_xmm_xmmm128_xmm,
		VEX_Vblendvpd_ymm_ymm_ymmm256_ymm,
		VEX_Vpblendvb_xmm_xmm_xmmm128_xmm,
		VEX_Vpblendvb_ymm_ymm_ymmm256_ymm,
		EVEX_Vrangeps_xmm_k1z_xmm_xmmm128b32_imm8,
		EVEX_Vrangeps_ymm_k1z_ymm_ymmm256b32_imm8,
		EVEX_Vrangeps_zmm_k1z_zmm_zmmm512b32_imm8_sae,
		EVEX_Vrangepd_xmm_k1z_xmm_xmmm128b64_imm8,
		EVEX_Vrangepd_ymm_k1z_ymm_ymmm256b64_imm8,
		EVEX_Vrangepd_zmm_k1z_zmm_zmmm512b64_imm8_sae,
		EVEX_Vrangess_xmm_k1z_xmm_xmmm32_imm8_sae,
		EVEX_Vrangesd_xmm_k1z_xmm_xmmm64_imm8_sae,
		EVEX_Vfixupimmps_xmm_k1z_xmm_xmmm128b32_imm8,
		EVEX_Vfixupimmps_ymm_k1z_ymm_ymmm256b32_imm8,
		EVEX_Vfixupimmps_zmm_k1z_zmm_zmmm512b32_imm8_sae,
		EVEX_Vfixupimmpd_xmm_k1z_xmm_xmmm128b64_imm8,
		EVEX_Vfixupimmpd_ymm_k1z_ymm_ymmm256b64_imm8,
		EVEX_Vfixupimmpd_zmm_k1z_zmm_zmmm512b64_imm8_sae,
		EVEX_Vfixupimmss_xmm_k1z_xmm_xmmm32_imm8_sae,
		EVEX_Vfixupimmsd_xmm_k1z_xmm_xmmm64_imm8_sae,
		EVEX_Vreduceps_xmm_k1z_xmmm128b32_imm8,
		EVEX_Vreduceps_ymm_k1z_ymmm256b32_imm8,
		EVEX_Vreduceps_zmm_k1z_zmmm512b32_imm8_sae,
		EVEX_Vreducepd_xmm_k1z_xmmm128b64_imm8,
		EVEX_Vreducepd_ymm_k1z_ymmm256b64_imm8,
		EVEX_Vreducepd_zmm_k1z_zmmm512b64_imm8_sae,
		EVEX_Vreducess_xmm_k1z_xmm_xmmm32_imm8_sae,
		EVEX_Vreducesd_xmm_k1z_xmm_xmmm64_imm8_sae,
		VEX_Vfmaddsubps_xmm_xmm_xmmm128_xmm,
		VEX_Vfmaddsubps_ymm_ymm_ymmm256_ymm,
		VEX_Vfmaddsubps_xmm_xmm_xmm_xmmm128,
		VEX_Vfmaddsubps_ymm_ymm_ymm_ymmm256,
		VEX_Vfmaddsubpd_xmm_xmm_xmmm128_xmm,
		VEX_Vfmaddsubpd_ymm_ymm_ymmm256_ymm,
		VEX_Vfmaddsubpd_xmm_xmm_xmm_xmmm128,
		VEX_Vfmaddsubpd_ymm_ymm_ymm_ymmm256,
		VEX_Vfmsubaddps_xmm_xmm_xmmm128_xmm,
		VEX_Vfmsubaddps_ymm_ymm_ymmm256_ymm,
		VEX_Vfmsubaddps_xmm_xmm_xmm_xmmm128,
		VEX_Vfmsubaddps_ymm_ymm_ymm_ymmm256,
		VEX_Vfmsubaddpd_xmm_xmm_xmmm128_xmm,
		VEX_Vfmsubaddpd_ymm_ymm_ymmm256_ymm,
		VEX_Vfmsubaddpd_xmm_xmm_xmm_xmmm128,
		VEX_Vfmsubaddpd_ymm_ymm_ymm_ymmm256,
		Pcmpestrm_xmm_xmmm128_imm8,
		Pcmpestrm64_xmm_xmmm128_imm8,
		VEX_Vpcmpestrm_xmm_xmmm128_imm8,
		VEX_Vpcmpestrm64_xmm_xmmm128_imm8,
		Pcmpestri_xmm_xmmm128_imm8,
		Pcmpestri64_xmm_xmmm128_imm8,
		VEX_Vpcmpestri_xmm_xmmm128_imm8,
		VEX_Vpcmpestri64_xmm_xmmm128_imm8,
		Pcmpistrm_xmm_xmmm128_imm8,
		VEX_Vpcmpistrm_xmm_xmmm128_imm8,
		Pcmpistri_xmm_xmmm128_imm8,
		VEX_Vpcmpistri_xmm_xmmm128_imm8,
		EVEX_Vfpclassps_kr_k1_xmmm128b32_imm8,
		EVEX_Vfpclassps_kr_k1_ymmm256b32_imm8,
		EVEX_Vfpclassps_kr_k1_zmmm512b32_imm8,
		EVEX_Vfpclasspd_kr_k1_xmmm128b64_imm8,
		EVEX_Vfpclasspd_kr_k1_ymmm256b64_imm8,
		EVEX_Vfpclasspd_kr_k1_zmmm512b64_imm8,
		EVEX_Vfpclassss_kr_k1_xmmm32_imm8,
		EVEX_Vfpclasssd_kr_k1_xmmm64_imm8,
		VEX_Vfmaddps_xmm_xmm_xmmm128_xmm,
		VEX_Vfmaddps_ymm_ymm_ymmm256_ymm,
		VEX_Vfmaddps_xmm_xmm_xmm_xmmm128,
		VEX_Vfmaddps_ymm_ymm_ymm_ymmm256,
		VEX_Vfmaddpd_xmm_xmm_xmmm128_xmm,
		VEX_Vfmaddpd_ymm_ymm_ymmm256_ymm,
		VEX_Vfmaddpd_xmm_xmm_xmm_xmmm128,
		VEX_Vfmaddpd_ymm_ymm_ymm_ymmm256,
		VEX_Vfmaddss_xmm_xmm_xmmm32_xmm,
		VEX_Vfmaddss_xmm_xmm_xmm_xmmm32,
		VEX_Vfmaddsd_xmm_xmm_xmmm64_xmm,
		VEX_Vfmaddsd_xmm_xmm_xmm_xmmm64,
		VEX_Vfmsubps_xmm_xmm_xmmm128_xmm,
		VEX_Vfmsubps_ymm_ymm_ymmm256_ymm,
		VEX_Vfmsubps_xmm_xmm_xmm_xmmm128,
		VEX_Vfmsubps_ymm_ymm_ymm_ymmm256,
		VEX_Vfmsubpd_xmm_xmm_xmmm128_xmm,
		VEX_Vfmsubpd_ymm_ymm_ymmm256_ymm,
		VEX_Vfmsubpd_xmm_xmm_xmm_xmmm128,
		VEX_Vfmsubpd_ymm_ymm_ymm_ymmm256,
		VEX_Vfmsubss_xmm_xmm_xmmm32_xmm,
		VEX_Vfmsubss_xmm_xmm_xmm_xmmm32,
		VEX_Vfmsubsd_xmm_xmm_xmmm64_xmm,
		VEX_Vfmsubsd_xmm_xmm_xmm_xmmm64,
		EVEX_Vpshldw_xmm_k1z_xmm_xmmm128_imm8,
		EVEX_Vpshldw_ymm_k1z_ymm_ymmm256_imm8,
		EVEX_Vpshldw_zmm_k1z_zmm_zmmm512_imm8,
		EVEX_Vpshldd_xmm_k1z_xmm_xmmm128b32_imm8,
		EVEX_Vpshldd_ymm_k1z_ymm_ymmm256b32_imm8,
		EVEX_Vpshldd_zmm_k1z_zmm_zmmm512b32_imm8,
		EVEX_Vpshldq_xmm_k1z_xmm_xmmm128b64_imm8,
		EVEX_Vpshldq_ymm_k1z_ymm_ymmm256b64_imm8,
		EVEX_Vpshldq_zmm_k1z_zmm_zmmm512b64_imm8,
		EVEX_Vpshrdw_xmm_k1z_xmm_xmmm128_imm8,
		EVEX_Vpshrdw_ymm_k1z_ymm_ymmm256_imm8,
		EVEX_Vpshrdw_zmm_k1z_zmm_zmmm512_imm8,
		EVEX_Vpshrdd_xmm_k1z_xmm_xmmm128b32_imm8,
		EVEX_Vpshrdd_ymm_k1z_ymm_ymmm256b32_imm8,
		EVEX_Vpshrdd_zmm_k1z_zmm_zmmm512b32_imm8,
		EVEX_Vpshrdq_xmm_k1z_xmm_xmmm128b64_imm8,
		EVEX_Vpshrdq_ymm_k1z_ymm_ymmm256b64_imm8,
		EVEX_Vpshrdq_zmm_k1z_zmm_zmmm512b64_imm8,
		VEX_Vfnmaddps_xmm_xmm_xmmm128_xmm,
		VEX_Vfnmaddps_ymm_ymm_ymmm256_ymm,
		VEX_Vfnmaddps_xmm_xmm_xmm_xmmm128,
		VEX_Vfnmaddps_ymm_ymm_ymm_ymmm256,
		VEX_Vfnmaddpd_xmm_xmm_xmmm128_xmm,
		VEX_Vfnmaddpd_ymm_ymm_ymmm256_ymm,
		VEX_Vfnmaddpd_xmm_xmm_xmm_xmmm128,
		VEX_Vfnmaddpd_ymm_ymm_ymm_ymmm256,
		VEX_Vfnmaddss_xmm_xmm_xmmm32_xmm,
		VEX_Vfnmaddss_xmm_xmm_xmm_xmmm32,
		VEX_Vfnmaddsd_xmm_xmm_xmmm64_xmm,
		VEX_Vfnmaddsd_xmm_xmm_xmm_xmmm64,
		VEX_Vfnmsubps_xmm_xmm_xmmm128_xmm,
		VEX_Vfnmsubps_ymm_ymm_ymmm256_ymm,
		VEX_Vfnmsubps_xmm_xmm_xmm_xmmm128,
		VEX_Vfnmsubps_ymm_ymm_ymm_ymmm256,
		VEX_Vfnmsubpd_xmm_xmm_xmmm128_xmm,
		VEX_Vfnmsubpd_ymm_ymm_ymmm256_ymm,
		VEX_Vfnmsubpd_xmm_xmm_xmm_xmmm128,
		VEX_Vfnmsubpd_ymm_ymm_ymm_ymmm256,
		VEX_Vfnmsubss_xmm_xmm_xmmm32_xmm,
		VEX_Vfnmsubss_xmm_xmm_xmm_xmmm32,
		VEX_Vfnmsubsd_xmm_xmm_xmmm64_xmm,
		VEX_Vfnmsubsd_xmm_xmm_xmm_xmmm64,
		Sha1rnds4_xmm_xmmm128_imm8,
		Gf2p8affineqb_xmm_xmmm128_imm8,
		VEX_Vgf2p8affineqb_xmm_xmm_xmmm128_imm8,
		VEX_Vgf2p8affineqb_ymm_ymm_ymmm256_imm8,
		EVEX_Vgf2p8affineqb_xmm_k1z_xmm_xmmm128b64_imm8,
		EVEX_Vgf2p8affineqb_ymm_k1z_ymm_ymmm256b64_imm8,
		EVEX_Vgf2p8affineqb_zmm_k1z_zmm_zmmm512b64_imm8,
		Gf2p8affineinvqb_xmm_xmmm128_imm8,
		VEX_Vgf2p8affineinvqb_xmm_xmm_xmmm128_imm8,
		VEX_Vgf2p8affineinvqb_ymm_ymm_ymmm256_imm8,
		EVEX_Vgf2p8affineinvqb_xmm_k1z_xmm_xmmm128b64_imm8,
		EVEX_Vgf2p8affineinvqb_ymm_k1z_ymm_ymmm256b64_imm8,
		EVEX_Vgf2p8affineinvqb_zmm_k1z_zmm_zmmm512b64_imm8,
		Aeskeygenassist_xmm_xmmm128_imm8,
		VEX_Vaeskeygenassist_xmm_xmmm128_imm8,
		VEX_Rorx_r32_rm32_imm8,
		VEX_Rorx_r64_rm64_imm8,
		XOP_Vpmacssww_xmm_xmm_xmmm128_xmm,
		XOP_Vpmacsswd_xmm_xmm_xmmm128_xmm,
		XOP_Vpmacssdql_xmm_xmm_xmmm128_xmm,
		XOP_Vpmacssdd_xmm_xmm_xmmm128_xmm,
		XOP_Vpmacssdqh_xmm_xmm_xmmm128_xmm,
		XOP_Vpmacsww_xmm_xmm_xmmm128_xmm,
		XOP_Vpmacswd_xmm_xmm_xmmm128_xmm,
		XOP_Vpmacsdql_xmm_xmm_xmmm128_xmm,
		XOP_Vpmacsdd_xmm_xmm_xmmm128_xmm,
		XOP_Vpmacsdqh_xmm_xmm_xmmm128_xmm,
		XOP_Vpcmov_xmm_xmm_xmmm128_xmm,
		XOP_Vpcmov_ymm_ymm_ymmm256_ymm,
		XOP_Vpcmov_xmm_xmm_xmm_xmmm128,
		XOP_Vpcmov_ymm_ymm_ymm_ymmm256,
		XOP_Vpperm_xmm_xmm_xmmm128_xmm,
		XOP_Vpperm_xmm_xmm_xmm_xmmm128,
		XOP_Vpmadcsswd_xmm_xmm_xmmm128_xmm,
		XOP_Vpmadcswd_xmm_xmm_xmmm128_xmm,
		XOP_Vprotb_xmm_xmmm128_imm8,
		XOP_Vprotw_xmm_xmmm128_imm8,
		XOP_Vprotd_xmm_xmmm128_imm8,
		XOP_Vprotq_xmm_xmmm128_imm8,
		XOP_Vpcomb_xmm_xmm_xmmm128_imm8,
		XOP_Vpcomw_xmm_xmm_xmmm128_imm8,
		XOP_Vpcomd_xmm_xmm_xmmm128_imm8,
		XOP_Vpcomq_xmm_xmm_xmmm128_imm8,
		XOP_Vpcomub_xmm_xmm_xmmm128_imm8,
		XOP_Vpcomuw_xmm_xmm_xmmm128_imm8,
		XOP_Vpcomud_xmm_xmm_xmmm128_imm8,
		XOP_Vpcomuq_xmm_xmm_xmmm128_imm8,
		XOP_Blcfill_r32_rm32,
		XOP_Blcfill_r64_rm64,
		XOP_Blsfill_r32_rm32,
		XOP_Blsfill_r64_rm64,
		XOP_Blcs_r32_rm32,
		XOP_Blcs_r64_rm64,
		XOP_Tzmsk_r32_rm32,
		XOP_Tzmsk_r64_rm64,
		XOP_Blcic_r32_rm32,
		XOP_Blcic_r64_rm64,
		XOP_Blsic_r32_rm32,
		XOP_Blsic_r64_rm64,
		XOP_T1mskc_r32_rm32,
		XOP_T1mskc_r64_rm64,
		XOP_Blcmsk_r32_rm32,
		XOP_Blcmsk_r64_rm64,
		XOP_Blci_r32_rm32,
		XOP_Blci_r64_rm64,
		XOP_Llwpcb_r32,
		XOP_Llwpcb_r64,
		XOP_Slwpcb_r32,
		XOP_Slwpcb_r64,
		XOP_Vfrczps_xmm_xmmm128,
		XOP_Vfrczps_ymm_ymmm256,
		XOP_Vfrczpd_xmm_xmmm128,
		XOP_Vfrczpd_ymm_ymmm256,
		XOP_Vfrczss_xmm_xmmm32,
		XOP_Vfrczsd_xmm_xmmm64,
		XOP_Vprotb_xmm_xmmm128_xmm,
		XOP_Vprotb_xmm_xmm_xmmm128,
		XOP_Vprotw_xmm_xmmm128_xmm,
		XOP_Vprotw_xmm_xmm_xmmm128,
		XOP_Vprotd_xmm_xmmm128_xmm,
		XOP_Vprotd_xmm_xmm_xmmm128,
		XOP_Vprotq_xmm_xmmm128_xmm,
		XOP_Vprotq_xmm_xmm_xmmm128,
		XOP_Vpshlb_xmm_xmmm128_xmm,
		XOP_Vpshlb_xmm_xmm_xmmm128,
		XOP_Vpshlw_xmm_xmmm128_xmm,
		XOP_Vpshlw_xmm_xmm_xmmm128,
		XOP_Vpshld_xmm_xmmm128_xmm,
		XOP_Vpshld_xmm_xmm_xmmm128,
		XOP_Vpshlq_xmm_xmmm128_xmm,
		XOP_Vpshlq_xmm_xmm_xmmm128,
		XOP_Vpshab_xmm_xmmm128_xmm,
		XOP_Vpshab_xmm_xmm_xmmm128,
		XOP_Vpshaw_xmm_xmmm128_xmm,
		XOP_Vpshaw_xmm_xmm_xmmm128,
		XOP_Vpshad_xmm_xmmm128_xmm,
		XOP_Vpshad_xmm_xmm_xmmm128,
		XOP_Vpshaq_xmm_xmmm128_xmm,
		XOP_Vpshaq_xmm_xmm_xmmm128,
		XOP_Vphaddbw_xmm_xmmm128,
		XOP_Vphaddbd_xmm_xmmm128,
		XOP_Vphaddbq_xmm_xmmm128,
		XOP_Vphaddwd_xmm_xmmm128,
		XOP_Vphaddwq_xmm_xmmm128,
		XOP_Vphadddq_xmm_xmmm128,
		XOP_Vphaddubw_xmm_xmmm128,
		XOP_Vphaddubd_xmm_xmmm128,
		XOP_Vphaddubq_xmm_xmmm128,
		XOP_Vphadduwd_xmm_xmmm128,
		XOP_Vphadduwq_xmm_xmmm128,
		XOP_Vphaddudq_xmm_xmmm128,
		XOP_Vphsubbw_xmm_xmmm128,
		XOP_Vphsubwd_xmm_xmmm128,
		XOP_Vphsubdq_xmm_xmmm128,
		XOP_Bextr_r32_rm32_imm32,
		XOP_Bextr_r64_rm64_imm32,
		XOP_Lwpins_r32_rm32_imm32,
		XOP_Lwpins_r64_rm32_imm32,
		XOP_Lwpval_r32_rm32_imm32,
		XOP_Lwpval_r64_rm32_imm32,
		D3NOW_Pi2fw_mm_mmm64,
		D3NOW_Pi2fd_mm_mmm64,
		D3NOW_Pf2iw_mm_mmm64,
		D3NOW_Pf2id_mm_mmm64,
		D3NOW_Pfrcpv_mm_mmm64,
		D3NOW_Pfrsqrtv_mm_mmm64,
		D3NOW_Pfnacc_mm_mmm64,
		D3NOW_Pfpnacc_mm_mmm64,
		D3NOW_Pfcmpge_mm_mmm64,
		D3NOW_Pfmin_mm_mmm64,
		D3NOW_Pfrcp_mm_mmm64,
		D3NOW_Pfrsqrt_mm_mmm64,
		D3NOW_Pfsub_mm_mmm64,
		D3NOW_Pfadd_mm_mmm64,
		D3NOW_Pfcmpgt_mm_mmm64,
		D3NOW_Pfmax_mm_mmm64,
		D3NOW_Pfrcpit1_mm_mmm64,
		D3NOW_Pfrsqit1_mm_mmm64,
		D3NOW_Pfsubr_mm_mmm64,
		D3NOW_Pfacc_mm_mmm64,
		D3NOW_Pfcmpeq_mm_mmm64,
		D3NOW_Pfmul_mm_mmm64,
		D3NOW_Pfrcpit2_mm_mmm64,
		D3NOW_Pmulhrw_mm_mmm64,
		D3NOW_Pswapd_mm_mmm64,
		D3NOW_Pavgusb_mm_mmm64,
		Rmpadjust,
		Rmpupdate,
		Psmash,
		Pvalidatew,
		Pvalidated,
		Pvalidateq,
		Serialize,
		Xsusldtrk,
		Xresldtrk,
		Invlpgbw,
		Invlpgbd,
		Invlpgbq,
		Tlbsync,
		Prefetchreserved3_m8,
		Prefetchreserved4_m8,
		Prefetchreserved5_m8,
		Prefetchreserved6_m8,
		Prefetchreserved7_m8,
		Ud0,
		Vmgexit,
		Getsecq,
		VEX_Ldtilecfg_m512,
		VEX_Tilerelease,
		VEX_Sttilecfg_m512,
		VEX_Tilezero_tmm,
		VEX_Tileloaddt1_tmm_sibmem,
		VEX_Tilestored_sibmem_tmm,
		VEX_Tileloadd_tmm_sibmem,
		VEX_Tdpbf16ps_tmm_tmm_tmm,
		VEX_Tdpbuud_tmm_tmm_tmm,
		VEX_Tdpbusd_tmm_tmm_tmm,
		VEX_Tdpbsud_tmm_tmm_tmm,
		VEX_Tdpbssd_tmm_tmm_tmm,
		Fnstdw_AX,
		Fnstsg_AX,
		Rdshr_rm32,
		Wrshr_rm32,
		Smint,
		Dmint,
		Rdm,
		Svdc_m80_Sreg,
		Rsdc_Sreg_m80,
		Svldt_m80,
		Rsldt_m80,
		Svts_m80,
		Rsts_m80,
		Smint_0F7E,
		Bb0_reset,
		Bb1_reset,
		Cpu_write,
		Cpu_read,
		Altinst,
		Paveb_mm_mmm64,
		Paddsiw_mm_mmm64,
		Pmagw_mm_mmm64,
		Pdistib_mm_m64,
		Psubsiw_mm_mmm64,
		Pmvzb_mm_m64,
		Pmulhrw_mm_mmm64,
		Pmvnzb_mm_m64,
		Pmvlzb_mm_m64,
		Pmvgezb_mm_m64,
		Pmulhriw_mm_mmm64,
		Pmachriw_mm_m64,
		Cyrix_D9D7,
		Cyrix_D9E2,
		Ftstp,
		Cyrix_D9E7,
		Frint2,
		Frichop,
		Cyrix_DED8,
		Cyrix_DEDA,
		Cyrix_DEDC,
		Cyrix_DEDD,
		Cyrix_DEDE,
		Frinear,
		Tdcall,
		Seamret,
		Seamops,
		Seamcall,
		Aesencwide128kl_m384,
		Aesdecwide128kl_m384,
		Aesencwide256kl_m512,
		Aesdecwide256kl_m512,
		Loadiwkey_xmm_xmm,
		Aesenc128kl_xmm_m384,
		Aesdec128kl_xmm_m384,
		Aesenc256kl_xmm_m512,
		Aesdec256kl_xmm_m512,
		Encodekey128_r32_r32,
		Encodekey256_r32_r32,
		VEX_Vbroadcastss_xmm_xmm,
		VEX_Vbroadcastss_ymm_xmm,
		VEX_Vbroadcastsd_ymm_xmm,
		Vmgexit_F2,
		Uiret,
		Testui,
		Clui,
		Stui,
		Senduipi_r64,
		Hreset_imm8,
		VEX_Vpdpbusd_xmm_xmm_xmmm128,
		VEX_Vpdpbusd_ymm_ymm_ymmm256,
		VEX_Vpdpbusds_xmm_xmm_xmmm128,
		VEX_Vpdpbusds_ymm_ymm_ymmm256,
		VEX_Vpdpwssd_xmm_xmm_xmmm128,
		VEX_Vpdpwssd_ymm_ymm_ymmm256,
		VEX_Vpdpwssds_xmm_xmm_xmmm128,
		VEX_Vpdpwssds_ymm_ymm_ymmm256,
		Ccs_hash_16,
		Ccs_hash_32,
		Ccs_hash_64,
		Ccs_encrypt_16,
		Ccs_encrypt_32,
		Ccs_encrypt_64,
		Lkgs_rm16,
		Lkgs_r32m16,
		Lkgs_r64m16,
		Eretu,
		Erets,
		EVEX_Vaddph_xmm_k1z_xmm_xmmm128b16,
		EVEX_Vaddph_ymm_k1z_ymm_ymmm256b16,
		EVEX_Vaddph_zmm_k1z_zmm_zmmm512b16_er,
		EVEX_Vaddsh_xmm_k1z_xmm_xmmm16_er,
		EVEX_Vcmpph_kr_k1_xmm_xmmm128b16_imm8,
		EVEX_Vcmpph_kr_k1_ymm_ymmm256b16_imm8,
		EVEX_Vcmpph_kr_k1_zmm_zmmm512b16_imm8_sae,
		EVEX_Vcmpsh_kr_k1_xmm_xmmm16_imm8_sae,
		EVEX_Vcomish_xmm_xmmm16_sae,
		EVEX_Vcvtdq2ph_xmm_k1z_xmmm128b32,
		EVEX_Vcvtdq2ph_xmm_k1z_ymmm256b32,
		EVEX_Vcvtdq2ph_ymm_k1z_zmmm512b32_er,
		EVEX_Vcvtpd2ph_xmm_k1z_xmmm128b64,
		EVEX_Vcvtpd2ph_xmm_k1z_ymmm256b64,
		EVEX_Vcvtpd2ph_xmm_k1z_zmmm512b64_er,
		EVEX_Vcvtph2dq_xmm_k1z_xmmm64b16,
		EVEX_Vcvtph2dq_ymm_k1z_xmmm128b16,
		EVEX_Vcvtph2dq_zmm_k1z_ymmm256b16_er,
		EVEX_Vcvtph2pd_xmm_k1z_xmmm32b16,
		EVEX_Vcvtph2pd_ymm_k1z_xmmm64b16,
		EVEX_Vcvtph2pd_zmm_k1z_xmmm128b16_sae,
		EVEX_Vcvtph2psx_xmm_k1z_xmmm64b16,
		EVEX_Vcvtph2psx_ymm_k1z_xmmm128b16,
		EVEX_Vcvtph2psx_zmm_k1z_ymmm256b16_sae,
		EVEX_Vcvtph2qq_xmm_k1z_xmmm32b16,
		EVEX_Vcvtph2qq_ymm_k1z_xmmm64b16,
		EVEX_Vcvtph2qq_zmm_k1z_xmmm128b16_er,
		EVEX_Vcvtph2udq_xmm_k1z_xmmm64b16,
		EVEX_Vcvtph2udq_ymm_k1z_xmmm128b16,
		EVEX_Vcvtph2udq_zmm_k1z_ymmm256b16_er,
		EVEX_Vcvtph2uqq_xmm_k1z_xmmm32b16,
		EVEX_Vcvtph2uqq_ymm_k1z_xmmm64b16,
		EVEX_Vcvtph2uqq_zmm_k1z_xmmm128b16_er,
		EVEX_Vcvtph2uw_xmm_k1z_xmmm128b16,
		EVEX_Vcvtph2uw_ymm_k1z_ymmm256b16,
		EVEX_Vcvtph2uw_zmm_k1z_zmmm512b16_er,
		EVEX_Vcvtph2w_xmm_k1z_xmmm128b16,
		EVEX_Vcvtph2w_ymm_k1z_ymmm256b16,
		EVEX_Vcvtph2w_zmm_k1z_zmmm512b16_er,
		EVEX_Vcvtps2phx_xmm_k1z_xmmm128b32,
		EVEX_Vcvtps2phx_xmm_k1z_ymmm256b32,
		EVEX_Vcvtps2phx_ymm_k1z_zmmm512b32_er,
		EVEX_Vcvtqq2ph_xmm_k1z_xmmm128b64,
		EVEX_Vcvtqq2ph_xmm_k1z_ymmm256b64,
		EVEX_Vcvtqq2ph_xmm_k1z_zmmm512b64_er,
		EVEX_Vcvtsd2sh_xmm_k1z_xmm_xmmm64_er,
		EVEX_Vcvtsh2sd_xmm_k1z_xmm_xmmm16_sae,
		EVEX_Vcvtsh2si_r32_xmmm16_er,
		EVEX_Vcvtsh2si_r64_xmmm16_er,
		EVEX_Vcvtsh2ss_xmm_k1z_xmm_xmmm16_sae,
		EVEX_Vcvtsh2usi_r32_xmmm16_er,
		EVEX_Vcvtsh2usi_r64_xmmm16_er,
		EVEX_Vcvtsi2sh_xmm_xmm_rm32_er,
		EVEX_Vcvtsi2sh_xmm_xmm_rm64_er,
		EVEX_Vcvtss2sh_xmm_k1z_xmm_xmmm32_er,
		EVEX_Vcvttph2dq_xmm_k1z_xmmm64b16,
		EVEX_Vcvttph2dq_ymm_k1z_xmmm128b16,
		EVEX_Vcvttph2dq_zmm_k1z_ymmm256b16_sae,
		EVEX_Vcvttph2qq_xmm_k1z_xmmm32b16,
		EVEX_Vcvttph2qq_ymm_k1z_xmmm64b16,
		EVEX_Vcvttph2qq_zmm_k1z_xmmm128b16_sae,
		EVEX_Vcvttph2udq_xmm_k1z_xmmm64b16,
		EVEX_Vcvttph2udq_ymm_k1z_xmmm128b16,
		EVEX_Vcvttph2udq_zmm_k1z_ymmm256b16_sae,
		EVEX_Vcvttph2uqq_xmm_k1z_xmmm32b16,
		EVEX_Vcvttph2uqq_ymm_k1z_xmmm64b16,
		EVEX_Vcvttph2uqq_zmm_k1z_xmmm128b16_sae,
		EVEX_Vcvttph2uw_xmm_k1z_xmmm128b16,
		EVEX_Vcvttph2uw_ymm_k1z_ymmm256b16,
		EVEX_Vcvttph2uw_zmm_k1z_zmmm512b16_sae,
		EVEX_Vcvttph2w_xmm_k1z_xmmm128b16,
		EVEX_Vcvttph2w_ymm_k1z_ymmm256b16,
		EVEX_Vcvttph2w_zmm_k1z_zmmm512b16_sae,
		EVEX_Vcvttsh2si_r32_xmmm16_sae,
		EVEX_Vcvttsh2si_r64_xmmm16_sae,
		EVEX_Vcvttsh2usi_r32_xmmm16_sae,
		EVEX_Vcvttsh2usi_r64_xmmm16_sae,
		EVEX_Vcvtudq2ph_xmm_k1z_xmmm128b32,
		EVEX_Vcvtudq2ph_xmm_k1z_ymmm256b32,
		EVEX_Vcvtudq2ph_ymm_k1z_zmmm512b32_er,
		EVEX_Vcvtuqq2ph_xmm_k1z_xmmm128b64,
		EVEX_Vcvtuqq2ph_xmm_k1z_ymmm256b64,
		EVEX_Vcvtuqq2ph_xmm_k1z_zmmm512b64_er,
		EVEX_Vcvtusi2sh_xmm_xmm_rm32_er,
		EVEX_Vcvtusi2sh_xmm_xmm_rm64_er,
		EVEX_Vcvtuw2ph_xmm_k1z_xmmm128b16,
		EVEX_Vcvtuw2ph_ymm_k1z_ymmm256b16,
		EVEX_Vcvtuw2ph_zmm_k1z_zmmm512b16_er,
		EVEX_Vcvtw2ph_xmm_k1z_xmmm128b16,
		EVEX_Vcvtw2ph_ymm_k1z_ymmm256b16,
		EVEX_Vcvtw2ph_zmm_k1z_zmmm512b16_er,
		EVEX_Vdivph_xmm_k1z_xmm_xmmm128b16,
		EVEX_Vdivph_ymm_k1z_ymm_ymmm256b16,
		EVEX_Vdivph_zmm_k1z_zmm_zmmm512b16_er,
		EVEX_Vdivsh_xmm_k1z_xmm_xmmm16_er,
		EVEX_Vfcmaddcph_xmm_k1z_xmm_xmmm128b32,
		EVEX_Vfcmaddcph_ymm_k1z_ymm_ymmm256b32,
		EVEX_Vfcmaddcph_zmm_k1z_zmm_zmmm512b32_er,
		EVEX_Vfmaddcph_xmm_k1z_xmm_xmmm128b32,
		EVEX_Vfmaddcph_ymm_k1z_ymm_ymmm256b32,
		EVEX_Vfmaddcph_zmm_k1z_zmm_zmmm512b32_er,
		EVEX_Vfcmaddcsh_xmm_k1z_xmm_xmmm32_er,
		EVEX_Vfmaddcsh_xmm_k1z_xmm_xmmm32_er,
		EVEX_Vfcmulcph_xmm_k1z_xmm_xmmm128b32,
		EVEX_Vfcmulcph_ymm_k1z_ymm_ymmm256b32,
		EVEX_Vfcmulcph_zmm_k1z_zmm_zmmm512b32_er,
		EVEX_Vfmulcph_xmm_k1z_xmm_xmmm128b32,
		EVEX_Vfmulcph_ymm_k1z_ymm_ymmm256b32,
		EVEX_Vfmulcph_zmm_k1z_zmm_zmmm512b32_er,
		EVEX_Vfcmulcsh_xmm_k1z_xmm_xmmm32_er,
		EVEX_Vfmulcsh_xmm_k1z_xmm_xmmm32_er,
		EVEX_Vfmaddsub132ph_xmm_k1z_xmm_xmmm128b16,
		EVEX_Vfmaddsub132ph_ymm_k1z_ymm_ymmm256b16,
		EVEX_Vfmaddsub132ph_zmm_k1z_zmm_zmmm512b16_er,
		EVEX_Vfmaddsub213ph_xmm_k1z_xmm_xmmm128b16,
		EVEX_Vfmaddsub213ph_ymm_k1z_ymm_ymmm256b16,
		EVEX_Vfmaddsub213ph_zmm_k1z_zmm_zmmm512b16_er,
		EVEX_Vfmaddsub231ph_xmm_k1z_xmm_xmmm128b16,
		EVEX_Vfmaddsub231ph_ymm_k1z_ymm_ymmm256b16,
		EVEX_Vfmaddsub231ph_zmm_k1z_zmm_zmmm512b16_er,
		EVEX_Vfmsubadd132ph_xmm_k1z_xmm_xmmm128b16,
		EVEX_Vfmsubadd132ph_ymm_k1z_ymm_ymmm256b16,
		EVEX_Vfmsubadd132ph_zmm_k1z_zmm_zmmm512b16_er,
		EVEX_Vfmsubadd213ph_xmm_k1z_xmm_xmmm128b16,
		EVEX_Vfmsubadd213ph_ymm_k1z_ymm_ymmm256b16,
		EVEX_Vfmsubadd213ph_zmm_k1z_zmm_zmmm512b16_er,
		EVEX_Vfmsubadd231ph_xmm_k1z_xmm_xmmm128b16,
		EVEX_Vfmsubadd231ph_ymm_k1z_ymm_ymmm256b16,
		EVEX_Vfmsubadd231ph_zmm_k1z_zmm_zmmm512b16_er,
		EVEX_Vfmadd132ph_xmm_k1z_xmm_xmmm128b16,
		EVEX_Vfmadd132ph_ymm_k1z_ymm_ymmm256b16,
		EVEX_Vfmadd132ph_zmm_k1z_zmm_zmmm512b16_er,
		EVEX_Vfmadd213ph_xmm_k1z_xmm_xmmm128b16,
		EVEX_Vfmadd213ph_ymm_k1z_ymm_ymmm256b16,
		EVEX_Vfmadd213ph_zmm_k1z_zmm_zmmm512b16_er,
		EVEX_Vfmadd231ph_xmm_k1z_xmm_xmmm128b16,
		EVEX_Vfmadd231ph_ymm_k1z_ymm_ymmm256b16,
		EVEX_Vfmadd231ph_zmm_k1z_zmm_zmmm512b16_er,
		EVEX_Vfnmadd132ph_xmm_k1z_xmm_xmmm128b16,
		EVEX_Vfnmadd132ph_ymm_k1z_ymm_ymmm256b16,
		EVEX_Vfnmadd132ph_zmm_k1z_zmm_zmmm512b16_er,
		EVEX_Vfnmadd213ph_xmm_k1z_xmm_xmmm128b16,
		EVEX_Vfnmadd213ph_ymm_k1z_ymm_ymmm256b16,
		EVEX_Vfnmadd213ph_zmm_k1z_zmm_zmmm512b16_er,
		EVEX_Vfnmadd231ph_xmm_k1z_xmm_xmmm128b16,
		EVEX_Vfnmadd231ph_ymm_k1z_ymm_ymmm256b16,
		EVEX_Vfnmadd231ph_zmm_k1z_zmm_zmmm512b16_er,
		EVEX_Vfmadd132sh_xmm_k1z_xmm_xmmm16_er,
		EVEX_Vfmadd213sh_xmm_k1z_xmm_xmmm16_er,
		EVEX_Vfmadd231sh_xmm_k1z_xmm_xmmm16_er,
		EVEX_Vfnmadd132sh_xmm_k1z_xmm_xmmm16_er,
		EVEX_Vfnmadd213sh_xmm_k1z_xmm_xmmm16_er,
		EVEX_Vfnmadd231sh_xmm_k1z_xmm_xmmm16_er,
		EVEX_Vfmsub132ph_xmm_k1z_xmm_xmmm128b16,
		EVEX_Vfmsub132ph_ymm_k1z_ymm_ymmm256b16,
		EVEX_Vfmsub132ph_zmm_k1z_zmm_zmmm512b16_er,
		EVEX_Vfmsub213ph_xmm_k1z_xmm_xmmm128b16,
		EVEX_Vfmsub213ph_ymm_k1z_ymm_ymmm256b16,
		EVEX_Vfmsub213ph_zmm_k1z_zmm_zmmm512b16_er,
		EVEX_Vfmsub231ph_xmm_k1z_xmm_xmmm128b16,
		EVEX_Vfmsub231ph_ymm_k1z_ymm_ymmm256b16,
		EVEX_Vfmsub231ph_zmm_k1z_zmm_zmmm512b16_er,
		EVEX_Vfnmsub132ph_xmm_k1z_xmm_xmmm128b16,
		EVEX_Vfnmsub132ph_ymm_k1z_ymm_ymmm256b16,
		EVEX_Vfnmsub132ph_zmm_k1z_zmm_zmmm512b16_er,
		EVEX_Vfnmsub213ph_xmm_k1z_xmm_xmmm128b16,
		EVEX_Vfnmsub213ph_ymm_k1z_ymm_ymmm256b16,
		EVEX_Vfnmsub213ph_zmm_k1z_zmm_zmmm512b16_er,
		EVEX_Vfnmsub231ph_xmm_k1z_xmm_xmmm128b16,
		EVEX_Vfnmsub231ph_ymm_k1z_ymm_ymmm256b16,
		EVEX_Vfnmsub231ph_zmm_k1z_zmm_zmmm512b16_er,
		EVEX_Vfmsub132sh_xmm_k1z_xmm_xmmm16_er,
		EVEX_Vfmsub213sh_xmm_k1z_xmm_xmmm16_er,
		EVEX_Vfmsub231sh_xmm_k1z_xmm_xmmm16_er,
		EVEX_Vfnmsub132sh_xmm_k1z_xmm_xmmm16_er,
		EVEX_Vfnmsub213sh_xmm_k1z_xmm_xmmm16_er,
		EVEX_Vfnmsub231sh_xmm_k1z_xmm_xmmm16_er,
		EVEX_Vfpclassph_kr_k1_xmmm128b16_imm8,
		EVEX_Vfpclassph_kr_k1_ymmm256b16_imm8,
		EVEX_Vfpclassph_kr_k1_zmmm512b16_imm8,
		EVEX_Vfpclasssh_kr_k1_xmmm16_imm8,
		EVEX_Vgetexpph_xmm_k1z_xmmm128b16,
		EVEX_Vgetexpph_ymm_k1z_ymmm256b16,
		EVEX_Vgetexpph_zmm_k1z_zmmm512b16_sae,
		EVEX_Vgetexpsh_xmm_k1z_xmm_xmmm16_sae,
		EVEX_Vgetmantph_xmm_k1z_xmmm128b16_imm8,
		EVEX_Vgetmantph_ymm_k1z_ymmm256b16_imm8,
		EVEX_Vgetmantph_zmm_k1z_zmmm512b16_imm8_sae,
		EVEX_Vgetmantsh_xmm_k1z_xmm_xmmm16_imm8_sae,
		EVEX_Vmaxph_xmm_k1z_xmm_xmmm128b16,
		EVEX_Vmaxph_ymm_k1z_ymm_ymmm256b16,
		EVEX_Vmaxph_zmm_k1z_zmm_zmmm512b16_sae,
		EVEX_Vmaxsh_xmm_k1z_xmm_xmmm16_sae,
		EVEX_Vminph_xmm_k1z_xmm_xmmm128b16,
		EVEX_Vminph_ymm_k1z_ymm_ymmm256b16,
		EVEX_Vminph_zmm_k1z_zmm_zmmm512b16_sae,
		EVEX_Vminsh_xmm_k1z_xmm_xmmm16_sae,
		EVEX_Vmovsh_xmm_k1z_m16,
		EVEX_Vmovsh_m16_k1_xmm,
		EVEX_Vmovsh_xmm_k1z_xmm_xmm,
		EVEX_Vmovsh_xmm_k1z_xmm_xmm_MAP5_11,
		EVEX_Vmovw_xmm_r32m16,
		EVEX_Vmovw_xmm_r64m16,
		EVEX_Vmovw_r32m16_xmm,
		EVEX_Vmovw_r64m16_xmm,
		EVEX_Vmulph_xmm_k1z_xmm_xmmm128b16,
		EVEX_Vmulph_ymm_k1z_ymm_ymmm256b16,
		EVEX_Vmulph_zmm_k1z_zmm_zmmm512b16_er,
		EVEX_Vmulsh_xmm_k1z_xmm_xmmm16_er,
		EVEX_Vrcpph_xmm_k1z_xmmm128b16,
		EVEX_Vrcpph_ymm_k1z_ymmm256b16,
		EVEX_Vrcpph_zmm_k1z_zmmm512b16,
		EVEX_Vrcpsh_xmm_k1z_xmm_xmmm16,
		EVEX_Vreduceph_xmm_k1z_xmmm128b16_imm8,
		EVEX_Vreduceph_ymm_k1z_ymmm256b16_imm8,
		EVEX_Vreduceph_zmm_k1z_zmmm512b16_imm8_sae,
		EVEX_Vreducesh_xmm_k1z_xmm_xmmm16_imm8_sae,
		EVEX_Vrndscaleph_xmm_k1z_xmmm128b16_imm8,
		EVEX_Vrndscaleph_ymm_k1z_ymmm256b16_imm8,
		EVEX_Vrndscaleph_zmm_k1z_zmmm512b16_imm8_sae,
		EVEX_Vrndscalesh_xmm_k1z_xmm_xmmm16_imm8_sae,
		EVEX_Vrsqrtph_xmm_k1z_xmmm128b16,
		EVEX_Vrsqrtph_ymm_k1z_ymmm256b16,
		EVEX_Vrsqrtph_zmm_k1z_zmmm512b16,
		EVEX_Vrsqrtsh_xmm_k1z_xmm_xmmm16,
		EVEX_Vscalefph_xmm_k1z_xmm_xmmm128b16,
		EVEX_Vscalefph_ymm_k1z_ymm_ymmm256b16,
		EVEX_Vscalefph_zmm_k1z_zmm_zmmm512b16_er,
		EVEX_Vscalefsh_xmm_k1z_xmm_xmmm16_er,
		EVEX_Vsqrtph_xmm_k1z_xmmm128b16,
		EVEX_Vsqrtph_ymm_k1z_ymmm256b16,
		EVEX_Vsqrtph_zmm_k1z_zmmm512b16_er,
		EVEX_Vsqrtsh_xmm_k1z_xmm_xmmm16_er,
		EVEX_Vsubph_xmm_k1z_xmm_xmmm128b16,
		EVEX_Vsubph_ymm_k1z_ymm_ymmm256b16,
		EVEX_Vsubph_zmm_k1z_zmm_zmmm512b16_er,
		EVEX_Vsubsh_xmm_k1z_xmm_xmmm16_er,
		EVEX_Vucomish_xmm_xmmm16_sae,
		Rdudbg,
		Wrudbg,
		VEX_KNC_Jkzd_kr_rel8_64,
		VEX_KNC_Jknzd_kr_rel8_64,
		VEX_KNC_Vprefetchnta_m8,
		VEX_KNC_Vprefetch0_m8,
		VEX_KNC_Vprefetch1_m8,
		VEX_KNC_Vprefetch2_m8,
		VEX_KNC_Vprefetchenta_m8,
		VEX_KNC_Vprefetche0_m8,
		VEX_KNC_Vprefetche1_m8,
		VEX_KNC_Vprefetche2_m8,
		VEX_KNC_Kand_kr_kr,
		VEX_KNC_Kandn_kr_kr,
		VEX_KNC_Kandnr_kr_kr,
		VEX_KNC_Knot_kr_kr,
		VEX_KNC_Kor_kr_kr,
		VEX_KNC_Kxnor_kr_kr,
		VEX_KNC_Kxor_kr_kr,
		VEX_KNC_Kmerge2l1h_kr_kr,
		VEX_KNC_Kmerge2l1l_kr_kr,
		VEX_KNC_Jkzd_kr_rel32_64,
		VEX_KNC_Jknzd_kr_rel32_64,
		VEX_KNC_Kmov_kr_kr,
		VEX_KNC_Kmov_kr_r32,
		VEX_KNC_Kmov_r32_kr,
		VEX_KNC_Kconcath_r64_kr_kr,
		VEX_KNC_Kconcatl_r64_kr_kr,
		VEX_KNC_Kortest_kr_kr,
		VEX_KNC_Delay_r32,
		VEX_KNC_Delay_r64,
		VEX_KNC_Spflt_r32,
		VEX_KNC_Spflt_r64,
		VEX_KNC_Clevict1_m8,
		VEX_KNC_Clevict0_m8,
		VEX_KNC_Popcnt_r32_r32,
		VEX_KNC_Popcnt_r64_r64,
		VEX_KNC_Tzcnt_r32_r32,
		VEX_KNC_Tzcnt_r64_r64,
		VEX_KNC_Tzcnti_r32_r32,
		VEX_KNC_Tzcnti_r64_r64,
		VEX_KNC_Lzcnt_r32_r32,
		VEX_KNC_Lzcnt_r64_r64,
		VEX_KNC_Undoc_r32_rm32_128_F3_0F38_W0_F0,
		VEX_KNC_Undoc_r64_rm64_128_F3_0F38_W1_F0,
		VEX_KNC_Undoc_r32_rm32_128_F2_0F38_W0_F0,
		VEX_KNC_Undoc_r64_rm64_128_F2_0F38_W1_F0,
		VEX_KNC_Undoc_r32_rm32_128_F2_0F38_W0_F1,
		VEX_KNC_Undoc_r64_rm64_128_F2_0F38_W1_F1,
		VEX_KNC_Kextract_kr_r64_imm8,
		MVEX_Vprefetchnta_m,
		MVEX_Vprefetch0_m,
		MVEX_Vprefetch1_m,
		MVEX_Vprefetch2_m,
		MVEX_Vprefetchenta_m,
		MVEX_Vprefetche0_m,
		MVEX_Vprefetche1_m,
		MVEX_Vprefetche2_m,
		MVEX_Vmovaps_zmm_k1_zmmmt,
		MVEX_Vmovapd_zmm_k1_zmmmt,
		MVEX_Vmovaps_mt_k1_zmm,
		MVEX_Vmovapd_mt_k1_zmm,
		MVEX_Vmovnrapd_m_k1_zmm,
		MVEX_Vmovnrngoapd_m_k1_zmm,
		MVEX_Vmovnraps_m_k1_zmm,
		MVEX_Vmovnrngoaps_m_k1_zmm,
		MVEX_Vaddps_zmm_k1_zmm_zmmmt,
		MVEX_Vaddpd_zmm_k1_zmm_zmmmt,
		MVEX_Vmulps_zmm_k1_zmm_zmmmt,
		MVEX_Vmulpd_zmm_k1_zmm_zmmmt,
		MVEX_Vcvtps2pd_zmm_k1_zmmmt,
		MVEX_Vcvtpd2ps_zmm_k1_zmmmt,
		MVEX_Vsubps_zmm_k1_zmm_zmmmt,
		MVEX_Vsubpd_zmm_k1_zmm_zmmmt,
		MVEX_Vpcmpgtd_kr_k1_zmm_zmmmt,
		MVEX_Vmovdqa32_zmm_k1_zmmmt,
		MVEX_Vmovdqa64_zmm_k1_zmmmt,
		MVEX_Vpshufd_zmm_k1_zmmmt_imm8,
		MVEX_Vpsrld_zmm_k1_zmmmt_imm8,
		MVEX_Vpsrad_zmm_k1_zmmmt_imm8,
		MVEX_Vpslld_zmm_k1_zmmmt_imm8,
		MVEX_Vpcmpeqd_kr_k1_zmm_zmmmt,
		MVEX_Vcvtudq2pd_zmm_k1_zmmmt,
		MVEX_Vmovdqa32_mt_k1_zmm,
		MVEX_Vmovdqa64_mt_k1_zmm,
		MVEX_Clevict1_m,
		MVEX_Clevict0_m,
		MVEX_Vcmpps_kr_k1_zmm_zmmmt_imm8,
		MVEX_Vcmppd_kr_k1_zmm_zmmmt_imm8,
		MVEX_Vpandd_zmm_k1_zmm_zmmmt,
		MVEX_Vpandq_zmm_k1_zmm_zmmmt,
		MVEX_Vpandnd_zmm_k1_zmm_zmmmt,
		MVEX_Vpandnq_zmm_k1_zmm_zmmmt,
		MVEX_Vcvtdq2pd_zmm_k1_zmmmt,
		MVEX_Vpord_zmm_k1_zmm_zmmmt,
		MVEX_Vporq_zmm_k1_zmm_zmmmt,
		MVEX_Vpxord_zmm_k1_zmm_zmmmt,
		MVEX_Vpxorq_zmm_k1_zmm_zmmmt,
		MVEX_Vpsubd_zmm_k1_zmm_zmmmt,
		MVEX_Vpaddd_zmm_k1_zmm_zmmmt,
		MVEX_Vbroadcastss_zmm_k1_mt,
		MVEX_Vbroadcastsd_zmm_k1_mt,
		MVEX_Vbroadcastf32x4_zmm_k1_mt,
		MVEX_Vbroadcastf64x4_zmm_k1_mt,
		MVEX_Vptestmd_kr_k1_zmm_zmmmt,
		MVEX_Vpermd_zmm_k1_zmm_zmmmt,
		MVEX_Vpminsd_zmm_k1_zmm_zmmmt,
		MVEX_Vpminud_zmm_k1_zmm_zmmmt,
		MVEX_Vpmaxsd_zmm_k1_zmm_zmmmt,
		MVEX_Vpmaxud_zmm_k1_zmm_zmmmt,
		MVEX_Vpmulld_zmm_k1_zmm_zmmmt,
		MVEX_Vgetexpps_zmm_k1_zmmmt,
		MVEX_Vgetexppd_zmm_k1_zmmmt,
		MVEX_Vpsrlvd_zmm_k1_zmm_zmmmt,
		MVEX_Vpsravd_zmm_k1_zmm_zmmmt,
		MVEX_Vpsllvd_zmm_k1_zmm_zmmmt,
		MVEX_Undoc_zmm_k1_zmmmt_512_66_0F38_W0_48,
		MVEX_Undoc_zmm_k1_zmmmt_512_66_0F38_W0_49,
		MVEX_Undoc_zmm_k1_zmmmt_512_66_0F38_W0_4A,
		MVEX_Undoc_zmm_k1_zmmmt_512_66_0F38_W0_4B,
		MVEX_Vaddnps_zmm_k1_zmm_zmmmt,
		MVEX_Vaddnpd_zmm_k1_zmm_zmmmt,
		MVEX_Vgmaxabsps_zmm_k1_zmm_zmmmt,
		MVEX_Vgminps_zmm_k1_zmm_zmmmt,
		MVEX_Vgminpd_zmm_k1_zmm_zmmmt,
		MVEX_Vgmaxps_zmm_k1_zmm_zmmmt,
		MVEX_Vgmaxpd_zmm_k1_zmm_zmmmt,
		MVEX_Undoc_zmm_k1_zmm_zmmmt_512_66_0F38_W0_54,
		MVEX_Vfixupnanps_zmm_k1_zmm_zmmmt,
		MVEX_Vfixupnanpd_zmm_k1_zmm_zmmmt,
		MVEX_Undoc_zmm_k1_zmm_zmmmt_512_66_0F38_W0_56,
		MVEX_Undoc_zmm_k1_zmm_zmmmt_512_66_0F38_W0_57,
		MVEX_Vpbroadcastd_zmm_k1_mt,
		MVEX_Vpbroadcastq_zmm_k1_mt,
		MVEX_Vbroadcasti32x4_zmm_k1_mt,
		MVEX_Vbroadcasti64x4_zmm_k1_mt,
		MVEX_Vpadcd_zmm_k1_kr_zmmmt,
		MVEX_Vpaddsetcd_zmm_k1_kr_zmmmt,
		MVEX_Vpsbbd_zmm_k1_kr_zmmmt,
		MVEX_Vpsubsetbd_zmm_k1_kr_zmmmt,
		MVEX_Vpblendmd_zmm_k1_zmm_zmmmt,
		MVEX_Vpblendmq_zmm_k1_zmm_zmmmt,
		MVEX_Vblendmps_zmm_k1_zmm_zmmmt,
		MVEX_Vblendmpd_zmm_k1_zmm_zmmmt,
		MVEX_Undoc_zmm_k1_zmm_zmmmt_512_66_0F38_W0_67,
		MVEX_Undoc_zmm_k1_zmmmt_512_66_0F38_W0_68,
		MVEX_Undoc_zmm_k1_zmmmt_512_66_0F38_W0_69,
		MVEX_Undoc_zmm_k1_zmmmt_512_66_0F38_W0_6A,
		MVEX_Undoc_zmm_k1_zmmmt_512_66_0F38_W0_6B,
		MVEX_Vpsubrd_zmm_k1_zmm_zmmmt,
		MVEX_Vsubrps_zmm_k1_zmm_zmmmt,
		MVEX_Vsubrpd_zmm_k1_zmm_zmmmt,
		MVEX_Vpsbbrd_zmm_k1_kr_zmmmt,
		MVEX_Vpsubrsetbd_zmm_k1_kr_zmmmt,
		MVEX_Undoc_zmm_k1_zmm_zmmmt_512_66_0F38_W0_70,
		MVEX_Undoc_zmm_k1_zmm_zmmmt_512_66_0F38_W0_71,
		MVEX_Undoc_zmm_k1_zmm_zmmmt_512_66_0F38_W0_72,
		MVEX_Undoc_zmm_k1_zmm_zmmmt_512_66_0F38_W0_73,
		MVEX_Vpcmpltd_kr_k1_zmm_zmmmt,
		MVEX_Vscaleps_zmm_k1_zmm_zmmmt,
		MVEX_Vpmulhud_zmm_k1_zmm_zmmmt,
		MVEX_Vpmulhd_zmm_k1_zmm_zmmmt,
		MVEX_Vpgatherdd_zmm_k1_mvt,
		MVEX_Vpgatherdq_zmm_k1_mvt,
		MVEX_Vgatherdps_zmm_k1_mvt,
		MVEX_Vgatherdpd_zmm_k1_mvt,
		MVEX_Undoc_zmm_k1_zmm_zmmmt_512_66_0F38_W0_94,
		MVEX_Undoc_zmm_k1_zmm_zmmmt_512_66_0F38_W1_94,
		MVEX_Vfmadd132ps_zmm_k1_zmm_zmmmt,
		MVEX_Vfmadd132pd_zmm_k1_zmm_zmmmt,
		MVEX_Vfmsub132ps_zmm_k1_zmm_zmmmt,
		MVEX_Vfmsub132pd_zmm_k1_zmm_zmmmt,
		MVEX_Vfnmadd132ps_zmm_k1_zmm_zmmmt,
		MVEX_Vfnmadd132pd_zmm_k1_zmm_zmmmt,
		MVEX_Vfnmsub132ps_zmm_k1_zmm_zmmmt,
		MVEX_Vfnmsub132pd_zmm_k1_zmm_zmmmt,
		MVEX_Vpscatterdd_mvt_k1_zmm,
		MVEX_Vpscatterdq_mvt_k1_zmm,
		MVEX_Vscatterdps_mvt_k1_zmm,
		MVEX_Vscatterdpd_mvt_k1_zmm,
		MVEX_Vfmadd233ps_zmm_k1_zmm_zmmmt,
		MVEX_Vfmadd213ps_zmm_k1_zmm_zmmmt,
		MVEX_Vfmadd213pd_zmm_k1_zmm_zmmmt,
		MVEX_Vfmsub213ps_zmm_k1_zmm_zmmmt,
		MVEX_Vfmsub213pd_zmm_k1_zmm_zmmmt,
		MVEX_Vfnmadd213ps_zmm_k1_zmm_zmmmt,
		MVEX_Vfnmadd213pd_zmm_k1_zmm_zmmmt,
		MVEX_Vfnmsub213ps_zmm_k1_zmm_zmmmt,
		MVEX_Vfnmsub213pd_zmm_k1_zmm_zmmmt,
		MVEX_Undoc_zmm_k1_mvt_512_66_0F38_W0_B0,
		MVEX_Undoc_zmm_k1_mvt_512_66_0F38_W0_B2,
		MVEX_Vpmadd233d_zmm_k1_zmm_zmmmt,
		MVEX_Vpmadd231d_zmm_k1_zmm_zmmmt,
		MVEX_Vfmadd231ps_zmm_k1_zmm_zmmmt,
		MVEX_Vfmadd231pd_zmm_k1_zmm_zmmmt,
		MVEX_Vfmsub231ps_zmm_k1_zmm_zmmmt,
		MVEX_Vfmsub231pd_zmm_k1_zmm_zmmmt,
		MVEX_Vfnmadd231ps_zmm_k1_zmm_zmmmt,
		MVEX_Vfnmadd231pd_zmm_k1_zmm_zmmmt,
		MVEX_Vfnmsub231ps_zmm_k1_zmm_zmmmt,
		MVEX_Vfnmsub231pd_zmm_k1_zmm_zmmmt,
		MVEX_Undoc_zmm_k1_mvt_512_66_0F38_W0_C0,
		MVEX_Vgatherpf0hintdps_mvt_k1,
		MVEX_Vgatherpf0hintdpd_mvt_k1,
		MVEX_Vgatherpf0dps_mvt_k1,
		MVEX_Vgatherpf1dps_mvt_k1,
		MVEX_Vscatterpf0hintdps_mvt_k1,
		MVEX_Vscatterpf0hintdpd_mvt_k1,
		MVEX_Vscatterpf0dps_mvt_k1,
		MVEX_Vscatterpf1dps_mvt_k1,
		MVEX_Vexp223ps_zmm_k1_zmmmt,
		MVEX_Vlog2ps_zmm_k1_zmmmt,
		MVEX_Vrcp23ps_zmm_k1_zmmmt,
		MVEX_Vrsqrt23ps_zmm_k1_zmmmt,
		MVEX_Vaddsetsps_zmm_k1_zmm_zmmmt,
		MVEX_Vpaddsetsd_zmm_k1_zmm_zmmmt,
		MVEX_Undoc_zmm_k1_zmm_zmmmt_512_66_0F38_W0_CE,
		MVEX_Undoc_zmm_k1_zmm_zmmmt_512_66_0F38_W1_CE,
		MVEX_Undoc_zmm_k1_zmm_zmmmt_512_66_0F38_W0_CF,
		MVEX_Vloadunpackld_zmm_k1_mt,
		MVEX_Vloadunpacklq_zmm_k1_mt,
		MVEX_Vpackstoreld_mt_k1_zmm,
		MVEX_Vpackstorelq_mt_k1_zmm,
		MVEX_Vloadunpacklps_zmm_k1_mt,
		MVEX_Vloadunpacklpd_zmm_k1_mt,
		MVEX_Vpackstorelps_mt_k1_zmm,
		MVEX_Vpackstorelpd_mt_k1_zmm,
		MVEX_Undoc_zmm_k1_zmmmt_512_0F38_W0_D2,
		MVEX_Undoc_zmm_k1_zmmmt_512_66_0F38_W0_D2,
		MVEX_Undoc_zmm_k1_zmmmt_512_0F38_W0_D3,
		MVEX_Vloadunpackhd_zmm_k1_mt,
		MVEX_Vloadunpackhq_zmm_k1_mt,
		MVEX_Vpackstorehd_mt_k1_zmm,
		MVEX_Vpackstorehq_mt_k1_zmm,
		MVEX_Vloadunpackhps_zmm_k1_mt,
		MVEX_Vloadunpackhpd_zmm_k1_mt,
		MVEX_Vpackstorehps_mt_k1_zmm,
		MVEX_Vpackstorehpd_mt_k1_zmm,
		MVEX_Undoc_zmm_k1_zmmmt_512_0F38_W0_D6,
		MVEX_Undoc_zmm_k1_zmmmt_512_66_0F38_W0_D6,
		MVEX_Undoc_zmm_k1_zmmmt_512_0F38_W0_D7,
		MVEX_Valignd_zmm_k1_zmm_zmmmt_imm8,
		MVEX_Vpermf32x4_zmm_k1_zmmmt_imm8,
		MVEX_Vpcmpud_kr_k1_zmm_zmmmt_imm8,
		MVEX_Vpcmpd_kr_k1_zmm_zmmmt_imm8,
		MVEX_Vgetmantps_zmm_k1_zmmmt_imm8,
		MVEX_Vgetmantpd_zmm_k1_zmmmt_imm8,
		MVEX_Vrndfxpntps_zmm_k1_zmmmt_imm8,
		MVEX_Vrndfxpntpd_zmm_k1_zmmmt_imm8,
		MVEX_Vcvtfxpntudq2ps_zmm_k1_zmmmt_imm8,
		MVEX_Vcvtfxpntps2udq_zmm_k1_zmmmt_imm8,
		MVEX_Vcvtfxpntpd2udq_zmm_k1_zmmmt_imm8,
		MVEX_Vcvtfxpntdq2ps_zmm_k1_zmmmt_imm8,
		MVEX_Vcvtfxpntps2dq_zmm_k1_zmmmt_imm8,
		MVEX_Undoc_zmm_k1_zmmmt_imm8_512_66_0F3A_W0_D0,
		MVEX_Undoc_zmm_k1_zmmmt_imm8_512_66_0F3A_W0_D1,
		MVEX_Vcvtfxpntpd2dq_zmm_k1_zmmmt_imm8,
		Via_undoc_F30FA6F0_16,
		Via_undoc_F30FA6F0_32,
		Via_undoc_F30FA6F0_64,
		Via_undoc_F30FA6F8_16,
		Via_undoc_F30FA6F8_32,
		Via_undoc_F30FA6F8_64,
		Xsha512_16,
		Xsha512_32,
		Xsha512_64,
		Xstore_alt_16,
		Xstore_alt_32,
		Xstore_alt_64,
		Xsha512_alt_16,
		Xsha512_alt_32,
		Xsha512_alt_64,
		Zero_bytes,
		Wrmsrns,
		Wrmsrlist,
		Rdmsrlist,
		Rmpquery,
		Prefetchit1_m8,
		Prefetchit0_m8,
		Aadd_m32_r32,
		Aadd_m64_r64,
		Aand_m32_r32,
		Aand_m64_r64,
		Axor_m32_r32,
		Axor_m64_r64,
		Aor_m32_r32,
		Aor_m64_r64,
		VEX_Vpdpbuud_xmm_xmm_xmmm128,
		VEX_Vpdpbuud_ymm_ymm_ymmm256,
		VEX_Vpdpbsud_xmm_xmm_xmmm128,
		VEX_Vpdpbsud_ymm_ymm_ymmm256,
		VEX_Vpdpbssd_xmm_xmm_xmmm128,
		VEX_Vpdpbssd_ymm_ymm_ymmm256,
		VEX_Vpdpbuuds_xmm_xmm_xmmm128,
		VEX_Vpdpbuuds_ymm_ymm_ymmm256,
		VEX_Vpdpbsuds_xmm_xmm_xmmm128,
		VEX_Vpdpbsuds_ymm_ymm_ymmm256,
		VEX_Vpdpbssds_xmm_xmm_xmmm128,
		VEX_Vpdpbssds_ymm_ymm_ymmm256,
		VEX_Tdpfp16ps_tmm_tmm_tmm,
		VEX_Vcvtneps2bf16_xmm_xmmm128,
		VEX_Vcvtneps2bf16_xmm_ymmm256,
		VEX_Vcvtneoph2ps_xmm_m128,
		VEX_Vcvtneoph2ps_ymm_m256,
		VEX_Vcvtneeph2ps_xmm_m128,
		VEX_Vcvtneeph2ps_ymm_m256,
		VEX_Vcvtneebf162ps_xmm_m128,
		VEX_Vcvtneebf162ps_ymm_m256,
		VEX_Vcvtneobf162ps_xmm_m128,
		VEX_Vcvtneobf162ps_ymm_m256,
		VEX_Vbcstnesh2ps_xmm_m16,
		VEX_Vbcstnesh2ps_ymm_m16,
		VEX_Vbcstnebf162ps_xmm_m16,
		VEX_Vbcstnebf162ps_ymm_m16,
		VEX_Vpmadd52luq_xmm_xmm_xmmm128,
		VEX_Vpmadd52luq_ymm_ymm_ymmm256,
		VEX_Vpmadd52huq_xmm_xmm_xmmm128,
		VEX_Vpmadd52huq_ymm_ymm_ymmm256,
		VEX_Cmpoxadd_m32_r32_r32,
		VEX_Cmpoxadd_m64_r64_r64,
		VEX_Cmpnoxadd_m32_r32_r32,
		VEX_Cmpnoxadd_m64_r64_r64,
		VEX_Cmpbxadd_m32_r32_r32,
		VEX_Cmpbxadd_m64_r64_r64,
		VEX_Cmpnbxadd_m32_r32_r32,
		VEX_Cmpnbxadd_m64_r64_r64,
		VEX_Cmpzxadd_m32_r32_r32,
		VEX_Cmpzxadd_m64_r64_r64,
		VEX_Cmpnzxadd_m32_r32_r32,
		VEX_Cmpnzxadd_m64_r64_r64,
		VEX_Cmpbexadd_m32_r32_r32,
		VEX_Cmpbexadd_m64_r64_r64,
		VEX_Cmpnbexadd_m32_r32_r32,
		VEX_Cmpnbexadd_m64_r64_r64,
		VEX_Cmpsxadd_m32_r32_r32,
		VEX_Cmpsxadd_m64_r64_r64,
		VEX_Cmpnsxadd_m32_r32_r32,
		VEX_Cmpnsxadd_m64_r64_r64,
		VEX_Cmppxadd_m32_r32_r32,
		VEX_Cmppxadd_m64_r64_r64,
		VEX_Cmpnpxadd_m32_r32_r32,
		VEX_Cmpnpxadd_m64_r64_r64,
		VEX_Cmplxadd_m32_r32_r32,
		VEX_Cmplxadd_m64_r64_r64,
		VEX_Cmpnlxadd_m32_r32_r32,
		VEX_Cmpnlxadd_m64_r64_r64,
		VEX_Cmplexadd_m32_r32_r32,
		VEX_Cmplexadd_m64_r64_r64,
		VEX_Cmpnlexadd_m32_r32_r32,
		VEX_Cmpnlexadd_m64_r64_r64
	}
	internal static class CodeExtensions
	{
		internal static bool IgnoresSegment(this Code code)
		{
			if ((uint)(code - 290) <= 2u || (uint)(code - 1040) <= 3u || (uint)(code - 1047) <= 3u)
			{
				return true;
			}
			return false;
		}

		internal static bool IgnoresIndex(this Code code)
		{
			if (code == Code.Bndldx_bnd_mib || code == Code.Bndstx_mib_bnd)
			{
				return true;
			}
			return false;
		}

		internal static bool IsTileStrideIndex(this Code code)
		{
			if ((uint)(code - 4228) <= 2u)
			{
				return true;
			}
			return false;
		}
	}
	public abstract class CodeReader
	{
		public abstract int ReadByte();
	}
	public enum CodeSize
	{
		Unknown,
		Code16,
		Code32,
		Code64
	}
	public abstract class CodeWriter
	{
		public abstract void WriteByte(byte value);
	}
	public enum ConditionCode
	{
		None,
		o,
		no,
		b,
		ae,
		e,
		ne,
		be,
		a,
		s,
		ns,
		p,
		np,
		l,
		ge,
		le,
		g
	}
	public struct ConstantOffsets
	{
		public byte DisplacementOffset;

		public byte DisplacementSize;

		public byte ImmediateOffset;

		public byte ImmediateSize;

		public byte ImmediateOffset2;

		public byte ImmediateSize2;

		private byte pad1;

		private byte pad2;

		public readonly bool HasDisplacement => DisplacementSize != 0;

		public readonly bool HasImmediate => ImmediateSize != 0;

		public readonly bool HasImmediate2 => ImmediateSize2 != 0;
	}
	public enum CpuidFeature
	{
		INTEL8086,
		INTEL8086_ONLY,
		INTEL186,
		INTEL286,
		INTEL286_ONLY,
		INTEL386,
		INTEL386_ONLY,
		INTEL386_A0_ONLY,
		INTEL486,
		INTEL486_A_ONLY,
		UMOV,
		IA64,
		X64,
		ADX,
		AES,
		AVX,
		AVX2,
		AVX512_4FMAPS,
		AVX512_4VNNIW,
		AVX512_BF16,
		AVX512_BITALG,
		AVX512_IFMA,
		AVX512_VBMI,
		AVX512_VBMI2,
		AVX512_VNNI,
		AVX512_VP2INTERSECT,
		AVX512_VPOPCNTDQ,
		AVX512BW,
		AVX512CD,
		AVX512DQ,
		AVX512ER,
		AVX512F,
		AVX512PF,
		AVX512VL,
		BMI1,
		BMI2,
		CET_IBT,
		CET_SS,
		CL1INVMB,
		CLDEMOTE,
		CLFLUSHOPT,
		CLFSH,
		CLWB,
		CLZERO,
		CMOV,
		CMPXCHG16B,
		CPUID,
		CX8,
		D3NOW,
		D3NOWEXT,
		OSS,
		ENQCMD,
		F16C,
		FMA,
		FMA4,
		FPU,
		FPU287,
		FPU287XL_ONLY,
		FPU387,
		FPU387SL_ONLY,
		FSGSBASE,
		FXSR,
		CYRIX_D3NOW,
		GFNI,
		HLE,
		HLE_or_RTM,
		INVEPT,
		INVPCID,
		INVVPID,
		LWP,
		LZCNT,
		MCOMMIT,
		MMX,
		MONITOR,
		MONITORX,
		MOVBE,
		MOVDIR64B,
		MOVDIRI,
		MPX,
		MSR,
		MULTIBYTENOP,
		PADLOCK_ACE,
		PADLOCK_PHE,
		PADLOCK_PMM,
		PADLOCK_RNG,
		PAUSE,
		PCLMULQDQ,
		PCOMMIT,
		PCONFIG,
		PKU,
		POPCNT,
		PREFETCHW,
		PREFETCHWT1,
		PTWRITE,
		RDPID,
		RDPMC,
		RDPRU,
		RDRAND,
		RDSEED,
		RDTSCP,
		RTM,
		SEP,
		SGX1,
		SHA,
		SKINIT,
		SKINIT_or_SVM,
		SMAP,
		SMX,
		SSE,
		SSE2,
		SSE3,
		SSE4_1,
		SSE4_2,
		SSE4A,
		SSSE3,
		SVM,
		SEV_ES,
		SYSCALL,
		TBM,
		TSC,
		VAES,
		VMX,
		VPCLMULQDQ,
		WAITPKG,
		WBNOINVD,
		XOP,
		XSAVE,
		XSAVEC,
		XSAVEOPT,
		XSAVES,
		SEV_SNP,
		SERIALIZE,
		TSXLDTRK,
		INVLPGB,
		AMX_BF16,
		AMX_TILE,
		AMX_INT8,
		CYRIX_FPU,
		CYRIX_SMM,
		CYRIX_SMINT,
		CYRIX_SMINT_0F7E,
		CYRIX_SHR,
		CYRIX_DDI,
		CYRIX_EMMI,
		CYRIX_DMI,
		CENTAUR_AIS,
		MOV_TR,
		SMM,
		TDX,
		KL,
		AESKLE,
		WIDE_KL,
		UINTR,
		HRESET,
		AVX_VNNI,
		PADLOCK_GMI,
		FRED,
		LKGS,
		AVX512_FP16,
		UDBG,
		KNC,
		PADLOCK_UNDOC,
		RMPQUERY,
		RAO_INT,
		PREFETCHITI,
		AMX_FP16,
		CMPCCXADD,
		AVX_IFMA,
		AVX_NE_CONVERT,
		AVX_VNNI_INT8,
		MSRLIST,
		WRMSRNS
	}
	internal enum OpSize : byte
	{
		Size16,
		Size32,
		Size64
	}
	[Flags]
	internal enum StateFlags : uint
	{
		IpRel64 = 1u,
		IpRel32 = 2u,
		HasRex = 8u,
		b = 0x10u,
		z = 0x20u,
		IsInvalid = 0x40u,
		W = 0x80u,
		NoImm = 0x100u,
		Addr64 = 0x200u,
		BranchImm8 = 0x400u,
		Xbegin = 0x800u,
		Lock = 0x1000u,
		AllowLock = 0x2000u,
		NoMoreBytes = 0x4000u,
		Has66 = 0x8000u,
		MvexSssMask = 7u,
		MvexSssShift = 0x10u,
		MvexEH = 0x80000u,
		EncodingMask = 7u,
		EncodingShift = 0x1Du
	}
	public sealed class Decoder : IEnumerable<Instruction>, IEnumerable
	{
		internal struct ZState
		{
			public uint instructionLength;

			public uint extraRegisterBase;

			public uint extraIndexRegisterBase;

			public uint extraBaseRegisterBase;

			public uint extraIndexRegisterBaseVSIB;

			public StateFlags flags;

			public MandatoryPrefixByte mandatoryPrefix;

			public byte segmentPrio;
		}

		internal struct State
		{
			public uint modrm;

			public uint mod;

			public uint reg;

			public uint rm;

			public ZState zs;

			public uint vvvv;

			public uint vvvv_invalidCheck;

			public uint aaa;

			public uint extraRegisterBaseEVEX;

			public uint extraBaseRegisterBaseEVEX;

			public uint vectorLength;

			public OpSize operandSize;

			public OpSize addressSize;

			public readonly EncodingKind Encoding => (EncodingKind)((int)((uint)zs.flags >> 29) & 7);

			public int Sss => ((int)zs.flags >> 16) & 7;
		}

		private readonly struct RegInfo2
		{
			public readonly Register baseReg;

			public readonly Register indexReg;

			public RegInfo2(Register baseReg, Register indexReg)
			{
				this.baseReg = baseReg;
				this.indexReg = indexReg;
			}

			public void Deconstruct(out Register baseReg, out Register indexReg)
			{
				baseReg = this.baseReg;
				indexReg = this.indexReg;
			}
		}

		public struct Enumerator : IEnumerator<Instruction>, IEnumerator, IDisposable
		{
			private readonly Decoder decoder;

			private Instruction instruction;

			public Instruction Current => instruction;

			Instruction IEnumerator<Instruction>.Current => Current;

			object IEnumerator.Current => Current;

			internal Enumerator(Decoder decoder)
			{
				this.decoder = decoder;
				instruction = default(Instruction);
			}

			public bool MoveNext()
			{
				decoder.Decode(out instruction);
				return instruction.Length != 0;
			}

			void IEnumerator.Reset()
			{
				throw new InvalidOperationException();
			}

			public void Dispose()
			{
			}
		}

		private ulong instructionPointer;

		private readonly CodeReader reader;

		private readonly RegInfo2[] memRegs16;

		private readonly Iced.Intel.DecoderInternal.OpCodeHandler[] handlers_MAP0;

		private readonly Iced.Intel.DecoderInternal.OpCodeHandler[] handlers_VEX_MAP0;

		private readonly Iced.Intel.DecoderInternal.OpCodeHandler[] handlers_VEX_0F;

		private readonly Iced.Intel.DecoderInternal.OpCodeHandler[] handlers_VEX_0F38;

		private readonly Iced.Intel.DecoderInternal.OpCodeHandler[] handlers_VEX_0F3A;

		private readonly Iced.Intel.DecoderInternal.OpCodeHandler[] handlers_EVEX_0F;

		private readonly Iced.Intel.DecoderInternal.OpCodeHandler[] handlers_EVEX_0F38;

		private readonly Iced.Intel.DecoderInternal.OpCodeHandler[] handlers_EVEX_0F3A;

		private readonly Iced.Intel.DecoderInternal.OpCodeHandler[] handlers_EVEX_MAP5;

		private readonly Iced.Intel.DecoderInternal.OpCodeHandler[] handlers_EVEX_MAP6;

		private readonly Iced.Intel.DecoderInternal.OpCodeHandler[] handlers_XOP_MAP8;

		private readonly Iced.Intel.DecoderInternal.OpCodeHandler[] handlers_XOP_MAP9;

		private readonly Iced.Intel.DecoderInternal.OpCodeHandler[] handlers_XOP_MAP10;

		private readonly Iced.Intel.DecoderInternal.OpCodeHandler[] handlers_MVEX_0F;

		private readonly Iced.Intel.DecoderInternal.OpCodeHandler[] handlers_MVEX_0F38;

		private readonly Iced.Intel.DecoderInternal.OpCodeHandler[] handlers_MVEX_0F3A;

		internal State state;

		internal uint displIndex;

		internal readonly DecoderOptions options;

		internal readonly uint invalidCheckMask;

		internal readonly uint is64bMode_and_W;

		internal readonly uint reg15Mask;

		private readonly uint maskE0;

		private readonly uint rexMask;

		internal readonly CodeSize defaultCodeSize;

		internal readonly OpSize defaultOperandSize;

		private readonly OpSize defaultAddressSize;

		internal readonly OpSize defaultInvertedOperandSize;

		internal readonly OpSize defaultInvertedAddressSize;

		internal readonly bool is64bMode;

		private static readonly RegInfo2[] s_memRegs16;

		public ulong IP
		{
			get
			{
				return instructionPointer;
			}
			set
			{
				instructionPointer = value;
			}
		}

		public int Bitness { get; }

		public DecoderError LastError
		{
			get
			{
				if ((state.zs.flags & StateFlags.NoMoreBytes) != 0)
				{
					return DecoderError.NoMoreBytes;
				}
				if ((state.zs.flags & StateFlags.IsInvalid) != 0)
				{
					return DecoderError.InvalidInstruction;
				}
				return DecoderError.None;
			}
		}

		static Decoder()
		{
			s_memRegs16 = new RegInfo2[8]
			{
				new RegInfo2(Register.BX, Register.SI),
				new RegInfo2(Register.BX, Register.DI),
				new RegInfo2(Register.BP, Register.SI),
				new RegInfo2(Register.BP, Register.DI),
				new RegInfo2(Register.SI, Register.None),
				new RegInfo2(Register.DI, Register.None),
				new RegInfo2(Register.BP, Register.None),
				new RegInfo2(Register.BX, Register.None)
			};
			_ = OpCodeHandler_Invalid.Instance;
			_ = InstructionMemorySizes.SizesNormal;
			_ = OpCodeHandler_D3NOW.CodeValues;
			_ = InstructionOpCounts.OpCount;
			_ = MnemonicUtilsData.toMnemonic;
			_ = RegisterExtensions.RegisterInfos;
			_ = MemorySizeExtensions.MemorySizeInfos;
			_ = InstrInfoTable.Data;
			_ = RflagsInfoConstants.flagsCleared;
			_ = CpuidFeatureInternalData.ToCpuidFeatures;
			_ = SimpleList<UsedRegister>.Empty;
			_ = SimpleList<UsedMemory>.Empty;
		}

		private Decoder(CodeReader reader, ulong ip, DecoderOptions options, int bitness)
		{
			this.reader = reader ?? throw new ArgumentNullException("reader");
			instructionPointer = ip;
			this.options = options;
			invalidCheckMask = (((options & DecoderOptions.NoInvalidCheck) == 0) ? uint.MaxValue : 0u);
			memRegs16 = s_memRegs16;
			Bitness = bitness;
			switch (bitness)
			{
			case 64:
				is64bMode = true;
				defaultCodeSize = CodeSize.Code64;
				defaultOperandSize = OpSize.Size32;
				defaultInvertedOperandSize = OpSize.Size16;
				defaultAddressSize = OpSize.Size64;
				defaultInvertedAddressSize = OpSize.Size32;
				maskE0 = 224u;
				rexMask = 240u;
				break;
			case 32:
				is64bMode = false;
				defaultCodeSize = CodeSize.Code32;
				defaultOperandSize = OpSize.Size32;
				defaultInvertedOperandSize = OpSize.Size16;
				defaultAddressSize = OpSize.Size32;
				defaultInvertedAddressSize = OpSize.Size16;
				maskE0 = 0u;
				rexMask = 0u;
				break;
			default:
				is64bMode = false;
				defaultCodeSize = CodeSize.Code16;
				defaultOperandSize = OpSize.Size16;
				defaultInvertedOperandSize = OpSize.Size32;
				defaultAddressSize = OpSize.Size16;
				defaultInvertedAddressSize = OpSize.Size32;
				maskE0 = 0u;
				rexMask = 0u;
				break;
			}
			is64bMode_and_W = (is64bMode ? 128u : 0u);
			reg15Mask = (is64bMode ? 15u : 7u);
			handlers_MAP0 = OpCodeHandlersTables_Legacy.Handlers_MAP0;
			handlers_VEX_MAP0 = OpCodeHandlersTables_VEX.Handlers_MAP0;
			handlers_VEX_0F = OpCodeHandlersTables_VEX.Handlers_0F;
			handlers_VEX_0F38 = OpCodeHandlersTables_VEX.Handlers_0F38;
			handlers_VEX_0F3A = OpCodeHandlersTables_VEX.Handlers_0F3A;
			handlers_EVEX_0F = OpCodeHandlersTables_EVEX.Handlers_0F;
			handlers_EVEX_0F38 = OpCodeHandlersTables_EVEX.Handlers_0F38;
			handlers_EVEX_0F3A = OpCodeHandlersTables_EVEX.Handlers_0F3A;
			handlers_EVEX_MAP5 = OpCodeHandlersTables_EVEX.Handlers_MAP5;
			handlers_EVEX_MAP6 = OpCodeHandlersTables_EVEX.Handlers_MAP6;
			handlers_XOP_MAP8 = OpCodeHandlersTables_XOP.Handlers_MAP8;
			handlers_XOP_MAP9 = OpCodeHandlersTables_XOP.Handlers_MAP9;
			handlers_XOP_MAP10 = OpCodeHandlersTables_XOP.Handlers_MAP10;
			handlers_MVEX_0F = OpCodeHandlersTables_MVEX.Handlers_0F;
			handlers_MVEX_0F38 = OpCodeHandlersTables_MVEX.Handlers_0F38;
			handlers_MVEX_0F3A = OpCodeHandlersTables_MVEX.Handlers_0F3A;
		}

		public static Decoder Create(int bitness, CodeReader reader, ulong ip, DecoderOptions options = DecoderOptions.None)
		{
			if (bitness == 16 || bitness == 32 || bitness == 64)
			{
				return new Decoder(reader, ip, options, bitness);
			}
			throw new ArgumentOutOfRangeException("bitness");
		}

		public static Decoder Create(int bitness, byte[] data, ulong ip, DecoderOptions options = DecoderOptions.None)
		{
			return Create(bitness, new ByteArrayCodeReader(data), ip, options);
		}

		public static Decoder Create(int bitness, CodeReader reader, DecoderOptions options = DecoderOptions.None)
		{
			return Create(bitness, reader, 0uL, options);
		}

		public static Decoder Create(int bitness, byte[] data, DecoderOptions options = DecoderOptions.None)
		{
			return Create(bitness, new ByteArrayCodeReader(data), 0uL, options);
		}

		[MethodImpl(MethodImplOptions.AggressiveInlining)]
		internal uint ReadByte()
		{
			uint instructionLength = state.zs.instructionLength;
			if (instructionLength < 15)
			{
				uint num = (uint)reader.ReadByte();
				if (num <= 255)
				{
					state.zs.instructionLength = instructionLength + 1;
					return num;
				}
				state.zs.flags |= StateFlags.NoMoreBytes;
			}
			state.zs.flags |= StateFlags.IsInvalid;
			return 0u;
		}

		[MethodImpl(MethodImplOptions.AggressiveInlining)]
		internal uint ReadUInt16()
		{
			return ReadByte() | (ReadByte() << 8);
		}

		[MethodImpl(MethodImplOptions.AggressiveInlining)]
		internal uint ReadUInt32()
		{
			return ReadByte() | (ReadByte() << 8) | (ReadByte() << 16) | (ReadByte() << 24);
		}

		[MethodImpl(MethodImplOptions.AggressiveInlining)]
		internal ulong ReadUInt64()
		{
			return ReadUInt32() | ((ulong)ReadUInt32() << 32);
		}

		[MethodImpl(MethodImplOptions.AggressiveInlining)]
		public Instruction Decode()
		{
			Decode(out var instruction);
			return instruction;
		}

		public void Decode(out Instruction instruction)
		{
			instruction = default(Instruction);
			state.zs = default(ZState);
			state.operandSize = defaultOperandSize;
			state.addressSize = defaultAddressSize;
			uint num = ReadByte();
			if ((num & rexMask) == 64)
			{
				StateFlags stateFlags = state.zs.flags | StateFlags.HasRex;
				if ((num & 8u) != 0)
				{
					stateFlags |= StateFlags.W;
					state.operandSize = OpSize.Size64;
				}
				state.zs.flags = stateFlags;
				state.zs.extraRegisterBase = (num << 1) & 8u;
				state.zs.extraIndexRegisterBase = (num << 2) & 8u;
				state.zs.extraBaseRegisterBase = (num << 3) & 8u;
				num = ReadByte();
			}
			DecodeTable(handlers_MAP0[num], ref instruction);
			instruction.InternalCodeSize = defaultCodeSize;
			uint num2 = (uint)(instruction.Length = (int)state.zs.instructionLength);
			ulong num3 = instructionPointer;
			num3 = (instruction.NextIP = (instructionPointer = num3 + num2));
			StateFlags flags = state.zs.flags;
			if ((flags & (StateFlags.IpRel64 | StateFlags.IpRel32 | StateFlags.IsInvalid | StateFlags.Lock)) == 0)
			{
				return;
			}
			ulong num5 = (instruction.MemoryDisplacement64 += num3);
			if ((flags & (StateFlags.IpRel64 | StateFlags.IsInvalid | StateFlags.Lock)) != StateFlags.IpRel64)
			{
				if ((flags & StateFlags.IpRel64) == 0)
				{
					instruction.MemoryDisplacement64 = num5 - num3;
				}
				if ((flags & StateFlags.IpRel32) != 0)
				{
					instruction.MemoryDisplacement64 = (uint)((int)instruction.MemoryDisplacement64 + (int)num3);
				}
				if ((flags & StateFlags.IsInvalid) != 0 || ((uint)(flags & (StateFlags.Lock | StateFlags.AllowLock)) & invalidCheckMask) == 4096)
				{
					instruction = default(Instruction);
					state.zs.flags = flags | StateFlags.IsInvalid;
					instruction.InternalCodeSize = defaultCodeSize;
					instruction.Length = (int)num2;
					instruction.NextIP = num3;
				}
			}
		}

		[MethodImpl(MethodImplOptions.AggressiveInlining)]
		internal void ResetRexPrefixState()
		{
			state.zs.flags &= ~(StateFlags.HasRex | StateFlags.W);
			if ((state.zs.flags & StateFlags.Has66) == 0)
			{
				state.operandSize = defaultOperandSize;
			}
			else
			{
				state.operandSize = defaultInvertedOperandSize;
			}
			state.zs.extraRegisterBase = 0u;
			state.zs.extraIndexRegisterBase = 0u;
			state.zs.extraBaseRegisterBase = 0u;
		}

		[MethodImpl(MethodImplOptions.AggressiveInlining)]
		internal void CallOpCodeHandlerXXTable(ref Instruction instruction)
		{
			uint num = ReadByte();
			DecodeTable(handlers_MAP0[num], ref instruction);
		}

		[MethodImpl(MethodImplOptions.AggressiveInlining)]
		internal uint GetCurrentInstructionPointer32()
		{
			return (uint)(int)instructionPointer + state.zs.instructionLength;
		}

		[MethodImpl(MethodImplOptions.AggressiveInlining)]
		internal ulong GetCurrentInstructionPointer64()
		{
			return instructionPointer + state.zs.instructionLength;
		}

		[MethodImpl(MethodImplOptions.AggressiveInlining)]
		internal void ClearMandatoryPrefix(ref Instruction instruction)
		{
			instruction.InternalClearHasRepeRepnePrefix();
		}

		[MethodImpl(MethodImplOptions.AggressiveInlining)]
		internal void SetXacquireXrelease(ref Instruction instruction)
		{
			if (instruction.HasLockPrefix)
			{
				if (state.zs.mandatoryPrefix == MandatoryPrefixByte.PF2)
				{
					ClearMandatoryPrefixF2(ref instruction);
					instruction.InternalSetHasXacquirePrefix();
				}
				else if (state.zs.mandatoryPrefix == MandatoryPrefixByte.PF3)
				{
					ClearMandatoryPrefixF3(ref instruction);
					instruction.InternalSetHasXreleasePrefix();
				}
			}
		}

		[MethodImpl(MethodImplOptions.AggressiveInlining)]
		internal void ClearMandatoryPrefixF3(ref Instruction instruction)
		{
			instruction.InternalClearHasRepePrefix();
		}

		[MethodImpl(MethodImplOptions.AggressiveInlining)]
		internal void ClearMandatoryPrefixF2(ref Instruction instruction)
		{
			instruction.InternalClearHasRepnePrefix();
		}

		[MethodImpl(MethodImplOptions.AggressiveInlining)]
		internal void SetInvalidInstruction()
		{
			state.zs.flags |= StateFlags.IsInvalid;
		}

		[MethodImpl(MethodImplOptions.AggressiveInlining)]
		internal void DecodeTable(Iced.Intel.DecoderInternal.OpCodeHandler[] table, ref Instruction instruction)
		{
			DecodeTable(table[ReadByte()], ref instruction);
		}

		[MethodImpl(MethodImplOptions.AggressiveInlining)]
		private void DecodeTable(Iced.Intel.DecoderInternal.OpCodeHandler handler, ref Instruction instruction)
		{
			if (handler.HasModRM)
			{
				uint num = ReadByte();
				state.modrm = num;
				state.mod = num >> 6;
				state.reg = (num >> 3) & 7u;
				state.rm = num & 7u;
			}
			handler.Decode(this, ref instruction);
		}

		[MethodImpl(MethodImplOptions.AggressiveInlining)]
		internal void ReadModRM()
		{
			uint num = ReadByte();
			state.modrm = num;
			state.mod = num >> 6;
			state.reg = (num >> 3) & 7u;
			state.rm = num & 7u;
		}

		internal void VEX2(ref Instruction instruction)
		{
			if ((((uint)(state.zs.flags & StateFlags.HasRex) | (uint)state.zs.mandatoryPrefix) & invalidCheckMask) != 0)
			{
				SetInvalidInstruction();
			}
			state.zs.flags &= ~StateFlags.W;
			state.zs.extraIndexRegisterBase = 0u;
			state.zs.extraBaseRegisterBase = 0u;
			uint modrm = state.modrm;
			state.vectorLength = (modrm >> 2) & 1u;
			state.zs.mandatoryPrefix = (MandatoryPrefixByte)(modrm & 3u);
			modrm = ~modrm;
			state.zs.extraRegisterBase = (modrm >> 4) & 8u;
			modrm = (modrm >> 3) & 0xFu;
			state.vvvv = modrm;
			state.vvvv_invalidCheck = modrm;
			DecodeTable(handlers_VEX_0F, ref instruction);
		}

		internal void VEX3(ref Instruction instruction)
		{
			if ((((uint)(state.zs.flags & StateFlags.HasRex) | (uint)state.zs.mandatoryPrefix) & invalidCheckMask) != 0)
			{
				SetInvalidInstruction();
			}
			state.zs.flags &= ~StateFlags.W;
			uint num = ReadByte();
			state.zs.flags |= (StateFlags)(num & 0x80);
			state.vectorLength = (num >> 2) & 1u;
			state.zs.mandatoryPrefix = (MandatoryPrefixByte)(num & 3u);
			num = (~num >> 3) & 0xFu;
			state.vvvv_invalidCheck = num;
			state.vvvv = num & reg15Mask;
			uint modrm = state.modrm;
			uint num2 = ~modrm & maskE0;
			state.zs.extraRegisterBase = (num2 >> 4) & 8u;
			state.zs.extraIndexRegisterBase = (num2 >> 3) & 8u;
			state.zs.extraBaseRegisterBase = (num2 >> 2) & 8u;
			uint num3 = ReadByte();
			Iced.Intel.DecoderInternal.OpCodeHandler[] array;
			switch ((int)(modrm & 0x1F))
			{
			case 1:
				array = handlers_VEX_0F;
				break;
			case 2:
				array = handlers_VEX_0F38;
				break;
			case 3:
				array = handlers_VEX_0F3A;
				break;
			case 0:
				array = handlers_VEX_MAP0;
				break;
			default:
				SetInvalidInstruction();
				return;
			}
			DecodeTable(array[num3], ref instruction);
		}

		internal void XOP(ref Instruction instruction)
		{
			if ((((uint)(state.zs.flags & StateFlags.HasRex) | (uint)state.zs.mandatoryPrefix) & invalidCheckMask) != 0)
			{
				SetInvalidInstruction();
			}
			state.zs.flags &= ~StateFlags.W;
			uint num = ReadByte();
			state.zs.flags |= (StateFlags)(num & 0x80);
			state.vectorLength = (num >> 2) & 1u;
			state.zs.mandatoryPrefix = (MandatoryPrefixByte)(num & 3u);
			num = (~num >> 3) & 0xFu;
			state.vvvv_invalidCheck = num;
			state.vvvv = num & reg15Mask;
			uint modrm = state.modrm;
			uint num2 = ~modrm & maskE0;
			state.zs.extraRegisterBase = (num2 >> 4) & 8u;
			state.zs.extraIndexRegisterBase = (num2 >> 3) & 8u;
			state.zs.extraBaseRegisterBase = (num2 >> 2) & 8u;
			uint num3 = ReadByte();
			Iced.Intel.DecoderInternal.OpCodeHandler[] array;
			switch ((int)(modrm & 0x1F))
			{
			case 8:
				array = handlers_XOP_MAP8;
				break;
			case 9:
				array = handlers_XOP_MAP9;
				break;
			case 10:
				array = handlers_XOP_MAP10;
				break;
			default:
				SetInvalidInstruction();
				return;
			}
			DecodeTable(array[num3], ref instruction);
		}

		internal void EVEX_MVEX(ref Instruction instruction)
		{
			if ((((uint)(state.zs.flags & StateFlags.HasRex) | (uint)state.zs.mandatoryPrefix) & invalidCheckMask) != 0)
			{
				SetInvalidInstruction();
			}
			state.zs.flags &= ~StateFlags.W;
			uint modrm = state.modrm;
			uint num = ReadByte();
			uint num2 = ReadByte();
			uint num3 = ReadByte();
			uint num4 = ReadByte();
			if ((num & 4u) != 0)
			{
				if ((modrm & 8) == 0)
				{
					state.zs.mandatoryPrefix = (MandatoryPrefixByte)(num & 3u);
					state.zs.flags |= (StateFlags)(num & 0x80);
					uint num5 = num2 & 7u;
					state.aaa = num5;
					instruction.InternalOpMask = num5;
					if ((num2 & 0x80u) != 0)
					{
						if ((num5 ^ invalidCheckMask) == uint.MaxValue)
						{
							SetInvalidInstruction();
						}
						state.zs.flags |= StateFlags.z;
						instruction.InternalSetZeroingMasking();
					}
					state.zs.flags |= (StateFlags)(num2 & 0x10);
					state.vectorLength = (num2 >> 5) & 3u;
					num = (~num >> 3) & 0xFu;
					if (is64bMode)
					{
						uint num6 = (~num2 & 8) << 1;
						state.zs.extraIndexRegisterBaseVSIB = num6;
						num6 += num;
						state.vvvv = num6;
						state.vvvv_invalidCheck = num6;
						uint num7 = ~modrm;
						state.zs.extraRegisterBase = (num7 >> 4) & 8u;
						state.zs.extraIndexRegisterBase = (num7 >> 3) & 8u;
						state.extraRegisterBaseEVEX = num7 & 0x10u;
						num7 >>= 2;
						state.extraBaseRegisterBaseEVEX = num7 & 0x18u;
						state.zs.extraBaseRegisterBase = num7 & 8u;
					}
					else
					{
						state.vvvv_invalidCheck = num;
						state.vvvv = num & 7u;
						state.zs.flags |= (StateFlags)((~num2 & 8) << 3);
					}
					Iced.Intel.DecoderInternal.OpCodeHandler[] array;
					switch ((int)(modrm & 7))
					{
					case 1:
						array = handlers_EVEX_0F;
						break;
					case 2:
						array = handlers_EVEX_0F38;
						break;
					case 3:
						array = handlers_EVEX_0F3A;
						break;
					case 5:
						array = handlers_EVEX_MAP5;
						break;
					case 6:
						array = handlers_EVEX_MAP6;
						break;
					default:
						SetInvalidInstruction();
						return;
					}
					Iced.Intel.DecoderInternal.OpCodeHandler obj = array[num3];
					state.modrm = num4;
					state.mod = num4 >> 6;
					state.reg = (num4 >> 3) & 7u;
					state.rm = num4 & 7u;
					if ((((uint)(state.zs.flags & StateFlags.b) | state.vectorLength) & invalidCheckMask) == 3)
					{
						SetInvalidInstruction();
					}
					obj.Decode(this, ref instruction);
				}
				else
				{
					SetInvalidInstruction();
				}
			}
			else if ((options & DecoderOptions.KNC) == 0 || !is64bMode)
			{
				SetInvalidInstruction();
			}
			else
			{
				state.zs.mandatoryPrefix = (MandatoryPrefixByte)(num & 3u);
				state.zs.flags |= (StateFlags)(num & 0x80);
				uint num8 = num2 & 7u;
				state.aaa = num8;
				instruction.InternalOpMask = num8;
				state.zs.flags |= (StateFlags)((num2 & 0xF0) << 12);
				num = (~num >> 3) & 0xFu;
				uint num9 = (~num2 & 8) << 1;
				state.zs.extraIndexRegisterBaseVSIB = num9;
				num9 += num;
				state.vvvv = num9;
				state.vvvv_invalidCheck = num9;
				uint num10 = ~modrm;
				state.zs.extraRegisterBase = (num10 >> 4) & 8u;
				state.zs.extraIndexRegisterBase = (num10 >> 3) & 8u;
				state.extraRegisterBaseEVEX = num10 & 0x10u;
				num10 >>= 2;
				state.extraBaseRegisterBaseEVEX = num10 & 0x18u;
				state.zs.extraBaseRegisterBase = num10 & 8u;
				Iced.Intel.DecoderInternal.OpCodeHandler[] array2;
				switch ((int)(modrm & 0xF))
				{
				case 1:
					array2 = handlers_MVEX_0F;
					break;
				case 2:
					array2 = handlers_MVEX_0F38;
					break;
				case 3:
					array2 = handlers_MVEX_0F3A;
					break;
				default:
					SetInvalidInstruction();
					return;
				}
				Iced.Intel.DecoderInternal.OpCodeHandler obj2 = array2[num3];
				state.modrm = num4;
				state.mod = num4 >> 6;
				state.reg = (num4 >> 3) & 7u;
				state.rm = num4 & 7u;
				obj2.Decode(this, ref instruction);
			}
		}

		[MethodImpl(MethodImplOptions.AggressiveInlining)]
		internal Register ReadOpSegReg()
		{
			uint reg = state.reg;
			if (reg < 6)
			{
				return (Register)(71 + reg);
			}
			SetInvalidInstruction();
			return Register.None;
		}

		[MethodImpl(MethodImplOptions.AggressiveInlining)]
		internal bool ReadOpMem(ref Instruction instruction)
		{
			if (state.addressSize == OpSize.Size64)
			{
				return ReadOpMem32Or64(ref instruction, Register.RAX, Register.RAX, TupleType.N1, isVsib: false);
			}
			if (state.addressSize == OpSize.Size32)
			{
				return ReadOpMem32Or64(ref instruction, Register.EAX, Register.EAX, TupleType.N1, isVsib: false);
			}
			ReadOpMem16(ref instruction, TupleType.N1);
			return false;
		}

		[MethodImpl(MethodImplOptions.AggressiveInlining)]
		internal void ReadOpMemSib(ref Instruction instruction)
		{
			bool flag;
			if (state.addressSize == OpSize.Size64)
			{
				flag = ReadOpMem32Or64(ref instruction, Register.RAX, Register.RAX, TupleType.N1, isVsib: false);
			}
			else if (state.addressSize == OpSize.Size32)
			{
				flag = ReadOpMem32Or64(ref instruction, Register.EAX, Register.EAX, TupleType.N1, isVsib: false);
			}
			else
			{
				ReadOpMem16(ref instruction, TupleType.N1);
				flag = false;
			}
			if (invalidCheckMask != 0 && !flag)
			{
				SetInvalidInstruction();
			}
		}

		[MethodImpl(MethodImplOptions.AggressiveInlining)]
		internal void ReadOpMem_MPX(ref Instruction instruction)
		{
			if (is64bMode)
			{
				state.addressSize = OpSize.Size64;
				ReadOpMem32Or64(ref instruction, Register.RAX, Register.RAX, TupleType.N1, isVsib: false);
				return;
			}
			if (state.addressSize == OpSize.Size32)
			{
				ReadOpMem32Or64(ref instruction, Register.EAX, Register.EAX, TupleType.N1, isVsib: false);
				return;
			}
			ReadOpMem16(ref instruction, TupleType.N1);
			if (invalidCheckMask != 0)
			{
				SetInvalidInstruction();
			}
		}

		[MethodImpl(MethodImplOptions.AggressiveInlining)]
		internal void ReadOpMem(ref Instruction instruction, TupleType tupleType)
		{
			if (state.addressSize == OpSize.Size64)
			{
				ReadOpMem32Or64(ref instruction, Register.RAX, Register.RAX, tupleType, isVsib: false);
			}
			else if (state.addressSize == OpSize.Size32)
			{
				ReadOpMem32Or64(ref instruction, Register.EAX, Register.EAX, tupleType, isVsib: false);
			}
			else
			{
				ReadOpMem16(ref instruction, tupleType);
			}
		}

		[MethodImpl(MethodImplOptions.AggressiveInlining)]
		internal void ReadOpMem_VSIB(ref Instruction instruction, Register vsibIndex, TupleType tupleType)
		{
			bool flag;
			if (state.addressSize == OpSize.Size64)
			{
				flag = ReadOpMem32Or64(ref instruction, Register.RAX, vsibIndex, tupleType, isVsib: true);
			}
			else if (state.addressSize == OpSize.Size32)
			{
				flag = ReadOpMem32Or64(ref instruction, Register.EAX, vsibIndex, tupleType, isVsib: true);
			}
			else
			{
				ReadOpMem16(ref instruction, tupleType);
				flag = false;
			}
			if (invalidCheckMask != 0 && !flag)
			{
				SetInvalidInstruction();
			}
		}

		private void ReadOpMem16(ref Instruction instruction, TupleType tupleType)
		{
			RegInfo2 regInfo = memRegs16[state.rm];
			var (internalMemoryBase, internalMemoryIndex) = (RegInfo2)(ref regInfo);
			switch ((int)state.mod)
			{
			case 0:
				if (state.rm == 6)
				{
					instruction.InternalSetMemoryDisplSize(2u);
					displIndex = state.zs.instructionLength;
					instruction.MemoryDisplacement64 = ReadUInt16();
					internalMemoryBase = Register.None;
				}
				break;
			case 1:
				instruction.InternalSetMemoryDisplSize(1u);
				displIndex = state.zs.instructionLength;
				if (tupleType == TupleType.N1)
				{
					instruction.MemoryDisplacement64 = (ushort)(sbyte)ReadByte();
				}
				else
				{
					instruction.MemoryDisplacement64 = (ushort)(GetDisp8N(tupleType) * (uint)(sbyte)ReadByte());
				}
				break;
			default:
				instruction.InternalSetMemoryDisplSize(2u);
				displIndex = state.zs.instructionLength;
				instruction.MemoryDisplacement64 = ReadUInt16();
				break;
			}
			instruction.InternalMemoryBase = internalMemoryBase;
			instruction.InternalMemoryIndex = internalMemoryIndex;
		}

		private bool ReadOpMem32Or64(ref Instruction instruction, Register baseReg, Register indexReg, TupleType tupleType, bool isVsib)
		{
			uint num;
			uint scale;
			uint num2;
			switch ((int)state.mod)
			{
			case 0:
				if (state.rm == 4)
				{
					num = ReadByte();
					scale = 0u;
					num2 = 0u;
					break;
				}
				if (state.rm == 5)
				{
					displIndex = state.zs.instructionLength;
					if (state.addressSize == OpSize.Size64)
					{
						instruction.MemoryDisplacement64 = (ulong)(int)ReadUInt32();
						instruction.InternalSetMemoryDisplSize(4u);
					}
					else
					{
						instruction.MemoryDisplacement64 = ReadUInt32();
						instruction.InternalSetMemoryDisplSize(3u);
					}
					if (is64bMode)
					{
						if (state.addressSize == OpSize.Size64)
						{
							state.zs.flags |= StateFlags.IpRel64;
							instruction.InternalMemoryBase = Register.RIP;
						}
						else
						{
							state.zs.flags |= StateFlags.IpRel32;
							instruction.InternalMemoryBase = Register.EIP;
						}
					}
					return false;
				}
				instruction.InternalMemoryBase = (Register)((int)(state.zs.extraBaseRegisterBase + state.rm) + (int)baseReg);
				return false;
			case 1:
				if (state.rm == 4)
				{
					num = ReadByte();
					scale = 1u;
					displIndex = state.zs.instructionLength;
					num2 = ((tupleType != 0) ? (GetDisp8N(tupleType) * (uint)(sbyte)ReadByte()) : ((uint)(sbyte)ReadByte()));
					break;
				}
				instruction.InternalSetMemoryDisplSize(1u);
				displIndex = state.zs.instructionLength;
				if (state.addressSize == OpSize.Size64)
				{
					if (tupleType == TupleType.N1)
					{
						instruction.MemoryDisplacement64 = (ulong)(sbyte)ReadByte();
					}
					else
					{
						instruction.MemoryDisplacement64 = (ulong)(GetDisp8N(tupleType) * (sbyte)ReadByte());
					}
				}
				else if (tupleType == TupleType.N1)
				{
					instruction.MemoryDisplacement64 = (uint)(sbyte)ReadByte();
				}
				else
				{
					instruction.MemoryDisplacement64 = GetDisp8N(tupleType) * (uint)(sbyte)ReadByte();
				}
				instruction.InternalMemoryBase = (Register)((int)(state.zs.extraBaseRegisterBase + state.rm) + (int)baseReg);
				return false;
			default:
				if (state.rm == 4)
				{
					num = ReadByte();
					scale = ((state.addressSize == OpSize.Size64) ? 4u : 3u);
					displIndex = state.zs.instructionLength;
					num2 = ReadUInt32();
					break;
				}
				displIndex = state.zs.instructionLength;
				if (state.addressSize == OpSize.Size64)
				{
					instruction.MemoryDisplacement64 = (ulong)(int)ReadUInt32();
					instruction.InternalSetMemoryDisplSize(4u);
				}
				else
				{
					instruction.MemoryDisplacement64 = ReadUInt32();
					instruction.InternalSetMemoryDisplSize(3u);
				}
				instruction.InternalMemoryBase = (Register)((int)(state.zs.extraBaseRegisterBase + state.rm) + (int)baseReg);
				return false;
			}
			uint num3 = ((num >> 3) & 7) + state.zs.extraIndexRegisterBase;
			uint num4 = num & 7u;
			instruction.InternalMemoryIndexScale = (int)(num >> 6);
			if (!isVsib)
			{
				if (num3 != 4)
				{
					instruction.InternalMemoryIndex = (Register)((int)num3 + (int)indexReg);
				}
			}
			else
			{
				instruction.InternalMemoryIndex = (Register)((int)(num3 + state.zs.extraIndexRegisterBaseVSIB) + (int)indexReg);
			}
			if (num4 == 5 && state.mod == 0)
			{
				displIndex = state.zs.instructionLength;
				if (state.addressSize == OpSize.Size64)
				{
					instruction.MemoryDisplacement64 = (ulong)(int)ReadUInt32();
					instruction.InternalSetMemoryDisplSize(4u);
				}
				else
				{
					instruction.MemoryDisplacement64 = ReadUInt32();
					instruction.InternalSetMemoryDisplSize(3u);
				}
			}
			else
			{
				instruction.InternalMemoryBase = (Register)((int)(num4 + state.zs.extraBaseRegisterBase) + (int)baseReg);
				instruction.InternalSetMemoryDisplSize(scale);
				if (state.addressSize == OpSize.Size64)
				{
					instruction.MemoryDisplacement64 = (ulong)(int)num2;
				}
				else
				{
					instruction.MemoryDisplacement64 = num2;
				}
			}
			return true;
		}

		[MethodImpl(MethodImplOptions.AggressiveInlining)]
		private uint GetDisp8N(TupleType tupleType)
		{
			return TupleTypeTable.GetDisp8N(tupleType, (state.zs.flags & StateFlags.b) != 0);
		}

		public ConstantOffsets GetConstantOffsets(in Instruction instruction)
		{
			ConstantOffsets result = default(ConstantOffsets);
			int memoryDisplSize = instruction.MemoryDisplSize;
			if (memoryDisplSize != 0)
			{
				result.DisplacementOffset = (byte)displIndex;
				if (memoryDisplSize == 8 && (state.zs.flags & StateFlags.Addr64) == 0)
				{
					result.DisplacementSize = 4;
				}
				else
				{
					result.DisplacementSize = (byte)memoryDisplSize;
				}
			}
			if ((state.zs.flags & StateFlags.NoImm) == 0)
			{
				int num = 0;
				for (int num2 = instruction.OpCount - 1; num2 >= 0; num2--)
				{
					switch (instruction.GetOpKind(num2))
					{
					case OpKind.Immediate8:
					case OpKind.Immediate8to16:
					case OpKind.Immediate8to32:
					case OpKind.Immediate8to64:
						result.ImmediateOffset = (byte)(instruction.Length - num - 1);
						result.ImmediateSize = 1;
						break;
					case OpKind.Immediate16:
						result.ImmediateOffset = (byte)(instruction.Length - num - 2);
						result.ImmediateSize = 2;
						break;
					case OpKind.Immediate32:
					case OpKind.Immediate32to64:
						result.ImmediateOffset = (byte)(instruction.Length - num - 4);
						result.ImmediateSize = 4;
						break;
					case OpKind.Immediate64:
						result.ImmediateOffset = (byte)(instruction.Length - num - 8);
						result.ImmediateSize = 8;
						break;
					case OpKind.Immediate8_2nd:
						result.ImmediateOffset2 = (byte)(instruction.Length - 1);
						result.ImmediateSize2 = 1;
						num = 1;
						continue;
					case OpKind.NearBranch16:
						if ((state.zs.flags & StateFlags.BranchImm8) != 0)
						{
							result.ImmediateOffset = (byte)(instruction.Length - 1);
							result.ImmediateSize = 1;
						}
						else if ((state.zs.flags & StateFlags.Xbegin) == 0)
						{
							result.ImmediateOffset = (byte)(instruction.Length - 2);
							result.ImmediateSize = 2;
						}
						else if (state.operandSize != 0)
						{
							result.ImmediateOffset = (byte)(instruction.Length - 4);
							result.ImmediateSize = 4;
						}
						else
						{
							result.ImmediateOffset = (byte)(instruction.Length - 2);
							result.ImmediateSize = 2;
						}
						continue;
					case OpKind.NearBranch32:
					case OpKind.NearBranch64:
						if ((state.zs.flags & StateFlags.BranchImm8) != 0)
						{
							result.ImmediateOffset = (byte)(instruction.Length - 1);
							result.ImmediateSize = 1;
						}
						else if ((state.zs.flags & StateFlags.Xbegin) == 0)
						{
							result.ImmediateOffset = (byte)(instruction.Length - 4);
							result.ImmediateSize = 4;
						}
						else if (state.operandSize != 0)
						{
							result.ImmediateOffset = (byte)(instruction.Length - 4);
							result.ImmediateSize = 4;
						}
						else
						{
							result.ImmediateOffset = (byte)(instruction.Length - 2);
							result.ImmediateSize = 2;
						}
						continue;
					case OpKind.FarBranch16:
						result.ImmediateOffset = (byte)(instruction.Length - 4);
						result.ImmediateSize = 2;
						result.ImmediateOffset2 = (byte)(instruction.Length - 2);
						result.ImmediateSize2 = 2;
						continue;
					case OpKind.FarBranch32:
						result.ImmediateOffset = (byte)(instruction.Length - 6);
						result.ImmediateSize = 4;
						result.ImmediateOffset2 = (byte)(instruction.Length - 2);
						result.ImmediateSize2 = 2;
						continue;
					default:
						continue;
					}
					break;
				}
			}
			return result;
		}

		public Enumerator GetEnumerator()
		{
			return new Enumerator(this);
		}

		IEnumerator<Instruction> IEnumerable<Instruction>.GetEnumerator()
		{
			return GetEnumerator();
		}

		IEnumerator IEnumerable.GetEnumerator()
		{
			return GetEnumerator();
		}
	}
	public enum DecoderError
	{
		None,
		InvalidInstruction,
		NoMoreBytes
	}
	[Flags]
	public enum DecoderOptions : uint
	{
		None = 0u,
		NoInvalidCheck = 1u,
		AMD = 2u,
		ForceReservedNop = 4u,
		Umov = 8u,
		Xbts = 0x10u,
		Cmpxchg486A = 0x20u,
		OldFpu = 0x40u,
		Pcommit = 0x80u,
		Loadall286 = 0x100u,
		Loadall386 = 0x200u,
		Cl1invmb = 0x400u,
		MovTr = 0x800u,
		Jmpe = 0x1000u,
		NoPause = 0x2000u,
		NoWbnoinvd = 0x4000u,
		Udbg = 0x8000u,
		NoMPFX_0FBC = 0x10000u,
		NoMPFX_0FBD = 0x20000u,
		NoLahfSahf64 = 0x40000u,
		MPX = 0x80000u,
		Cyrix = 0x100000u,
		Cyrix_SMINT_0F7E = 0x200000u,
		Cyrix_DMI = 0x400000u,
		ALTINST = 0x800000u,
		KNC = 0x1000000u
	}
	public sealed class Encoder
	{
		private static readonly uint[] s_immSizes = new uint[19]
		{
			0u, 1u, 2u, 4u, 8u, 3u, 2u, 4u, 6u, 1u,
			1u, 1u, 2u, 2u, 2u, 4u, 4u, 1u, 1u
		};

		internal uint Internal_PreventVEX2;

		internal uint Internal_VEX_WIG_LIG;

		internal uint Internal_VEX_LIG;

		internal uint Internal_EVEX_WIG;

		internal uint Internal_EVEX_LIG;

		internal uint Internal_MVEX_WIG;

		internal const string ERROR_ONLY_1632_BIT_MODE = "The instruction can only be used in 16/32-bit mode";

		internal const string ERROR_ONLY_64_BIT_MODE = "The instruction can only be used in 64-bit mode";

		private readonly CodeWriter writer;

		private readonly int bitness;

		private readonly Iced.Intel.EncoderInternal.OpCodeHandler[] handlers;

		private readonly uint[] immSizes;

		private ulong currentRip;

		private string errorMessage;

		private Iced.Intel.EncoderInternal.OpCodeHandler handler;

		private uint eip;

		private uint displAddr;

		private uint immAddr;

		internal uint Immediate;

		internal uint ImmediateHi;

		private uint Displ;

		private uint DisplHi;

		private readonly EncoderFlags opSize16Flags;

		private readonly EncoderFlags opSize32Flags;

		private readonly EncoderFlags adrSize16Flags;

		private readonly EncoderFlags adrSize32Flags;

		internal uint OpCode;

		internal EncoderFlags EncoderFlags;

		private DisplSize DisplSize;

		internal ImmSize ImmSize;

		private byte ModRM;

		private byte Sib;

		public bool PreventVEX2
		{
			get
			{
				return Internal_PreventVEX2 != 0;
			}
			set
			{
				Internal_PreventVEX2 = (value ? uint.MaxValue : 0u);
			}
		}

		public uint VEX_WIG
		{
			get
			{
				return (Internal_VEX_WIG_LIG >> 7) & 1u;
			}
			set
			{
				Internal_VEX_WIG_LIG = (Internal_VEX_WIG_LIG & 0xFFFFFF7Fu) | ((value & 1) << 7);
			}
		}

		public uint VEX_LIG
		{
			get
			{
				return (Internal_VEX_WIG_LIG >> 2) & 1u;
			}
			set
			{
				Internal_VEX_WIG_LIG = (Internal_VEX_WIG_LIG & 0xFFFFFFFBu) | ((value & 1) << 2);
				Internal_VEX_LIG = (value & 1) << 2;
			}
		}

		public uint EVEX_WIG
		{
			get
			{
				return Internal_EVEX_WIG >> 7;
			}
			set
			{
				Internal_EVEX_WIG = (value & 1) << 7;
			}
		}

		public uint EVEX_LIG
		{
			get
			{
				return Internal_EVEX_LIG >> 5;
			}
			set
			{
				Internal_EVEX_LIG = (value & 3) << 5;
			}
		}

		public uint MVEX_WIG
		{
			get
			{
				return Internal_MVEX_WIG >> 7;
			}
			set
			{
				Internal_MVEX_WIG = (value & 1) << 7;
			}
		}

		public int Bitness => bitness;

		internal string? ErrorMessage
		{
			set
			{
				if (errorMessage == null)
				{
					errorMessage = value;
				}
			}
		}

		private static ReadOnlySpan<byte> SegmentOverrides => "&.6>de"u8;

		private Encoder(CodeWriter writer, int bitness)
		{
			if (writer == null)
			{
				ThrowHelper.ThrowArgumentNullException_writer();
			}
			immSizes = s_immSizes;
			this.writer = writer;
			this.bitness = bitness;
			handlers = OpCodeHandlers.Handlers;
			handler = null;
			opSize16Flags = ((bitness != 16) ? EncoderFlags.P66 : EncoderFlags.None);
			opSize32Flags = ((bitness == 16) ? EncoderFlags.P66 : EncoderFlags.None);
			adrSize16Flags = ((bitness != 16) ? EncoderFlags.P67 : EncoderFlags.None);
			adrSize32Flags = ((bitness != 32) ? EncoderFlags.P67 : EncoderFlags.None);
		}

		public static Encoder Create(int bitness, CodeWriter writer)
		{
			if (bitness == 16 || bitness == 32 || bitness == 64)
			{
				return new Encoder(writer, bitness);
			}
			throw new ArgumentOutOfRangeException("bitness");
		}

		public uint Encode(in Instruction instruction, ulong rip)
		{
			if (!TryEncode(in instruction, rip, out uint encodedLength, out string text))
			{
				ThrowEncoderException(in instruction, text);
			}
			return encodedLength;
		}

		private static void ThrowEncoderException(in Instruction instruction, string errorMessage)
		{
			throw new EncoderException(errorMessage, in instruction);
		}

		public bool TryEncode(in Instruction instruction, ulong rip, out uint encodedLength, [NotNullWhen(false)] out string? errorMessage)
		{
			currentRip = rip;
			eip = (uint)rip;
			this.errorMessage = null;
			EncoderFlags = EncoderFlags.None;
			DisplSize = DisplSize.None;
			ImmSize = ImmSize.None;
			ModRM = 0;
			Iced.Intel.EncoderInternal.OpCodeHandler opCodeHandler = (handler = handlers[(int)instruction.Code]);
			OpCode = opCodeHandler.OpCode;
			if (opCodeHandler.GroupIndex >= 0)
			{
				EncoderFlags = EncoderFlags.ModRM;
				ModRM = (byte)(opCodeHandler.GroupIndex << 3);
			}
			if (opCodeHandler.RmGroupIndex >= 0)
			{
				EncoderFlags = EncoderFlags.ModRM;
				ModRM |= (byte)(opCodeHandler.RmGroupIndex | 0xC0);
			}
			switch (opCodeHandler.EncFlags3 & (EncFlags3.Bit16or32 | EncFlags3.Bit64))
			{
			case EncFlags3.Bit16or32:
				if (bitness == 64)
				{
					ErrorMessage = "The instruction can only be used in 16/32-bit mode";
				}
				break;
			case EncFlags3.Bit64:
				if (bitness != 64)
				{
					ErrorMessage = "The instruction can only be used in 64-bit mode";
				}
				break;
			default:
				throw new InvalidOperationException();
			case EncFlags3.Bit16or32 | EncFlags3.Bit64:
				break;
			}
			switch (opCodeHandler.OpSize)
			{
			case CodeSize.Code16:
				EncoderFlags |= opSize16Flags;
				break;
			case CodeSize.Code32:
				EncoderFlags |= opSize32Flags;
				break;
			case CodeSize.Code64:
				if ((opCodeHandler.EncFlags3 & EncFlags3.DefaultOpSize64) == 0)
				{
					EncoderFlags |= EncoderFlags.W;
				}
				break;
			default:
				throw new InvalidOperationException();
			case CodeSize.Unknown:
				break;
			}
			switch (opCodeHandler.AddrSize)
			{
			case CodeSize.Code16:
				EncoderFlags |= adrSize16Flags;
				break;
			case CodeSize.Code32:
				EncoderFlags |= adrSize32Flags;
				break;
			default:
				throw new InvalidOperationException();
			case CodeSize.Unknown:
			case CodeSize.Code64:
				break;
			}
			if (!opCodeHandler.IsSpecialInstr)
			{
				Op[] operands = opCodeHandler.Operands;
				for (int i = 0; i < operands.Length; i++)
				{
					operands[i].Encode(this, in instruction, i);
				}
				if ((opCodeHandler.EncFlags3 & EncFlags3.Fwait) != 0)
				{
					WriteByteInternal(155u);
				}
				opCodeHandler.Encode(this, in instruction);
				uint opCode = OpCode;
				if (!opCodeHandler.Is2ByteOpCode)
				{
					WriteByteInternal(opCode);
				}
				else
				{
					WriteByteInternal(opCode >> 8);
					WriteByteInternal(opCode);
				}
				if ((EncoderFlags & (EncoderFlags.ModRM | EncoderFlags.Displ)) != 0)
				{
					WriteModRM();
				}
				if (ImmSize != 0)
				{
					WriteImmediate();
				}
			}
			else
			{
				opCodeHandler.Encode(this, in instruction);
			}
			uint num = (uint)((int)currentRip - (int)rip);
			if (num > 15 && !opCodeHandler.IsSpecialInstr)
			{
				ErrorMessage = $"Instruction length > {15} bytes";
			}
			errorMessage = this.errorMessage;
			if (errorMessage != null)
			{
				encodedLength = 0u;
				return false;
			}
			encodedLength = num;
			return true;
		}

		[MethodImpl(MethodImplOptions.AggressiveInlining)]
		internal bool Verify(int operand, OpKind expected, OpKind actual)
		{
			if (expected == actual)
			{
				return true;
			}
			ErrorMessage = $"Operand {operand}: Expected: {expected}, actual: {actual}";
			return false;
		}

		[MethodImpl(MethodImplOptions.AggressiveInlining)]
		internal bool Verify(int operand, Register expected, Register actual)
		{
			if (expected == actual)
			{
				return true;
			}
			ErrorMessage = $"Operand {operand}: Expected: {expected}, actual: {actual}";
			return false;
		}

		[MethodImpl(MethodImplOptions.AggressiveInlining)]
		internal bool Verify(int operand, Register register, Register regLo, Register regHi)
		{
			if (bitness != 64 && regHi > regLo + 7)
			{
				regHi = regLo + 7;
			}
			if (regLo <= register && register <= regHi)
			{
				return true;
			}
			ErrorMessage = $"Operand {operand}: Register {register} is not between {regLo} and {regHi} (inclusive)";
			return false;
		}

		internal void AddBranch(OpKind opKind, int immSize, in Instruction instruction, int operand)
		{
			if (!Verify(operand, opKind, instruction.GetOpKind(operand)))
			{
				return;
			}
			switch (immSize)
			{
			case 1:
				switch (opKind)
				{
				case OpKind.NearBranch16:
					EncoderFlags |= opSize16Flags;
					ImmSize = ImmSize.RipRelSize1_Target16;
					Immediate = instruction.NearBranch16;
					break;
				case OpKind.NearBranch32:
					EncoderFlags |= opSize32Flags;
					ImmSize = ImmSize.RipRelSize1_Target32;
					Immediate = instruction.NearBranch32;
					break;
				case OpKind.NearBranch64:
				{
					ImmSize = ImmSize.RipRelSize1_Target64;
					ulong nearBranch = instruction.NearBranch64;
					Immediate = (uint)nearBranch;
					ImmediateHi = (uint)(nearBranch >> 32);
					break;
				}
				default:
					throw new InvalidOperationException();
				}
				break;
			case 2:
				if (opKind == OpKind.NearBranch16)
				{
					EncoderFlags |= opSize16Flags;
					ImmSize = ImmSize.RipRelSize2_Target16;
					Immediate = instruction.NearBranch16;
					break;
				}
				throw new InvalidOperationException();
			case 4:
				switch (opKind)
				{
				case OpKind.NearBranch32:
					EncoderFlags |= opSize32Flags;
					ImmSize = ImmSize.RipRelSize4_Target32;
					Immediate = instruction.NearBranch32;
					break;
				case OpKind.NearBranch64:
				{
					ImmSize = ImmSize.RipRelSize4_Target64;
					ulong nearBranch = instruction.NearBranch64;
					Immediate = (uint)nearBranch;
					ImmediateHi = (uint)(nearBranch >> 32);
					break;
				}
				default:
					throw new InvalidOperationException();
				}
				break;
			default:
				throw new InvalidOperationException();
			}
		}

		internal void AddBranchX(int immSize, in Instruction instruction, int operand)
		{
			if (bitness == 64)
			{
				if (Verify(operand, OpKind.NearBranch64, instruction.GetOpKind(operand)))
				{
					ulong nearBranch = instruction.NearBranch64;
					switch (immSize)
					{
					case 2:
						EncoderFlags |= EncoderFlags.P66;
						ImmSize = ImmSize.RipRelSize2_Target64;
						Immediate = (uint)nearBranch;
						ImmediateHi = (uint)(nearBranch >> 32);
						break;
					case 4:
						ImmSize = ImmSize.RipRelSize4_Target64;
						Immediate = (uint)nearBranch;
						ImmediateHi = (uint)(nearBranch >> 32);
						break;
					default:
						throw new InvalidOperationException();
					}
				}
			}
			else if (Verify(operand, OpKind.NearBranch32, instruction.GetOpKind(operand)))
			{
				switch (immSize)
				{
				case 2:
					EncoderFlags |= (EncoderFlags)((bitness & 0x20) << 2);
					ImmSize = ImmSize.RipRelSize2_Target32;
					Immediate = instruction.NearBranch32;
					break;
				case 4:
					EncoderFlags |= (EncoderFlags)((bitness & 0x10) << 3);
					ImmSize = ImmSize.RipRelSize4_Target32;
					Immediate = instruction.NearBranch32;
					break;
				default:
					throw new InvalidOperationException();
				}
			}
		}

		internal void AddBranchDisp(int displSize, in Instruction instruction, int operand)
		{
			OpKind expected;
			switch (displSize)
			{
			case 2:
				expected = OpKind.NearBranch16;
				ImmSize = ImmSize.Size2;
				Immediate = instruction.NearBranch16;
				break;
			case 4:
				expected = OpKind.NearBranch32;
				ImmSize = ImmSize.Size4;
				Immediate = instruction.NearBranch32;
				break;
			default:
				throw new InvalidOperationException();
			}
			Verify(operand, expected, instruction.GetOpKind(operand));
		}

		internal void AddFarBranch(in Instruction instruction, int operand, int size)
		{
			if (size == 2)
			{
				if (!Verify(operand, OpKind.FarBranch16, instruction.GetOpKind(operand)))
				{
					return;
				}
				ImmSize = ImmSize.Size2_2;
				Immediate = instruction.FarBranch16;
				ImmediateHi = instruction.FarBranchSelector;
			}
			else
			{
				if (!Verify(operand, OpKind.FarBranch32, instruction.GetOpKind(operand)))
				{
					return;
				}
				ImmSize = ImmSize.Size4_2;
				Immediate = instruction.FarBranch32;
				ImmediateHi = instruction.FarBranchSelector;
			}
			if (bitness != size * 8)
			{
				EncoderFlags |= EncoderFlags.P66;
			}
		}

		internal void SetAddrSize(int regSize)
		{
			if (bitness == 64)
			{
				switch (regSize)
				{
				case 2:
					ErrorMessage = $"Invalid register size: {regSize * 8}, must be 32-bit or 64-bit";
					break;
				case 4:
					EncoderFlags |= EncoderFlags.P67;
					break;
				}
			}
			else if (regSize == 8)
			{
				ErrorMessage = $"Invalid register size: {regSize * 8}, must be 16-bit or 32-bit";
			}
			else if (bitness == 16)
			{
				if (regSize == 4)
				{
					EncoderFlags |= EncoderFlags.P67;
				}
			}
			else if (regSize == 2)
			{
				EncoderFlags |= EncoderFlags.P67;
			}
		}

		internal void AddAbsMem(in Instruction instruction, int operand)
		{
			EncoderFlags |= EncoderFlags.Displ;
			OpKind opKind = instruction.GetOpKind(operand);
			if (opKind == OpKind.Memory)
			{
				if (instruction.MemoryBase != 0 || instruction.MemoryIndex != 0)
				{
					ErrorMessage = $"Operand {operand}: Absolute addresses can't have base and/or index regs";
					return;
				}
				if (instruction.MemoryIndexScale != 1)
				{
					ErrorMessage = $"Operand {operand}: Absolute addresses must have scale == *1";
					return;
				}
				switch (instruction.MemoryDisplSize)
				{
				case 2:
					if (bitness == 64)
					{
						ErrorMessage = $"Operand {operand}: 16-bit abs addresses can't be used in 64-bit mode";
						break;
					}
					if (bitness == 32)
					{
						EncoderFlags |= EncoderFlags.P67;
					}
					DisplSize = DisplSize.Size2;
					if (instruction.MemoryDisplacement64 > 65535)
					{
						ErrorMessage = $"Operand {operand}: Displacement must fit in a ushort";
					}
					else
					{
						Displ = instruction.MemoryDisplacement32;
					}
					break;
				case 4:
					EncoderFlags |= adrSize32Flags;
					DisplSize = DisplSize.Size4;
					if (instruction.MemoryDisplacement64 > uint.MaxValue)
					{
						ErrorMessage = $"Operand {operand}: Displacement must fit in a uint";
					}
					else
					{
						Displ = instruction.MemoryDisplacement32;
					}
					break;
				case 8:
				{
					if (bitness != 64)
					{
						ErrorMessage = $"Operand {operand}: 64-bit abs address is only available in 64-bit mode";
						break;
					}
					DisplSize = DisplSize.Size8;
					ulong memoryDisplacement = instruction.MemoryDisplacement64;
					Displ = (uint)memoryDisplacement;
					DisplHi = (uint)(memoryDisplacement >> 32);
					break;
				}
				default:
					ErrorMessage = string.Format("Operand {0}: {1}.{2} must be initialized to 2 (16-bit), 4 (32-bit) or 8 (64-bit)", operand, "Instruction", "MemoryDisplSize");
					break;
				}
			}
			else
			{
				ErrorMessage = string.Format("Operand {0}: Expected OpKind {1}, actual: {2}", operand, "Memory", opKind);
			}
		}

		internal void AddModRMRegister(in Instruction instruction, int operand, Register regLo, Register regHi)
		{
			if (!Verify(operand, OpKind.Register, instruction.GetOpKind(operand)))
			{
				return;
			}
			Register opRegister = instruction.GetOpRegister(operand);
			if (!Verify(operand, opRegister, regLo, regHi))
			{
				return;
			}
			uint num = (uint)(opRegister - regLo);
			if (regLo == Register.AL)
			{
				if (opRegister >= Register.SPL)
				{
					num -= 4;
					EncoderFlags |= EncoderFlags.REX;
				}
				else if (opRegister >= Register.AH)
				{
					EncoderFlags |= EncoderFlags.HighLegacy8BitRegs;
				}
			}
			ModRM |= (byte)((num & 7) << 3);
			EncoderFlags |= EncoderFlags.ModRM;
			EncoderFlags |= (EncoderFlags)((num & 8) >> 1);
			EncoderFlags |= (EncoderFlags)((num & 0x10) << 5);
		}

		internal void AddReg(in Instruction instruction, int operand, Register regLo, Register regHi)
		{
			if (!Verify(operand, OpKind.Register, instruction.GetOpKind(operand)))
			{
				return;
			}
			Register opRegister = instruction.GetOpRegister(operand);
			if (!Verify(operand, opRegister, regLo, regHi))
			{
				return;
			}
			uint num = (uint)(opRegister - regLo);
			if (regLo == Register.AL)
			{
				if (opRegister >= Register.SPL)
				{
					num -= 4;
					EncoderFlags |= EncoderFlags.REX;
				}
				else if (opRegister >= Register.AH)
				{
					EncoderFlags |= EncoderFlags.HighLegacy8BitRegs;
				}
			}
			OpCode |= num & 7;
			EncoderFlags |= (EncoderFlags)(num >> 3);
		}

		[MethodImpl(MethodImplOptions.AggressiveInlining)]
		internal void AddRegOrMem(in Instruction instruction, int operand, Register regLo, Register regHi, bool allowMemOp, bool allowRegOp)
		{
			AddRegOrMem(in instruction, operand, regLo, regHi, Register.None, Register.None, allowMemOp, allowRegOp);
		}

		internal void AddRegOrMem(in Instruction instruction, int operand, Register regLo, Register regHi, Register vsibIndexRegLo, Register vsibIndexRegHi, bool allowMemOp, bool allowRegOp)
		{
			OpKind opKind = instruction.GetOpKind(operand);
			EncoderFlags |= EncoderFlags.ModRM;
			switch (opKind)
			{
			case OpKind.Register:
			{
				if (!allowRegOp)
				{
					ErrorMessage = $"Operand {operand}: register operand is not allowed";
					break;
				}
				Register opRegister = instruction.GetOpRegister(operand);
				if (!Verify(operand, opRegister, regLo, regHi))
				{
					break;
				}
				uint num2 = (uint)(opRegister - regLo);
				if (regLo == Register.AL)
				{
					if (opRegister >= Register.R8L)
					{
						num2 -= 4;
					}
					else if (opRegister >= Register.SPL)
					{
						num2 -= 4;
						EncoderFlags |= EncoderFlags.REX;
					}
					else if (opRegister >= Register.AH)
					{
						EncoderFlags |= EncoderFlags.HighLegacy8BitRegs;
					}
				}
				ModRM |= (byte)(num2 & 7);
				ModRM |= 192;
				EncoderFlags |= (EncoderFlags)((num2 >> 3) & 3);
				break;
			}
			case OpKind.Memory:
			{
				if (!allowMemOp)
				{
					ErrorMessage = $"Operand {operand}: memory operand is not allowed";
					break;
				}
				if (instruction.MemorySize.IsBroadcast())
				{
					EncoderFlags |= EncoderFlags.Broadcast;
				}
				CodeSize codeSize = instruction.CodeSize;
				if (codeSize == CodeSize.Unknown)
				{
					codeSize = ((bitness == 64) ? CodeSize.Code64 : ((bitness != 32) ? CodeSize.Code16 : CodeSize.Code32));
				}
				int num = InstructionUtils.GetAddressSizeInBytes(instruction.MemoryBase, instruction.MemoryIndex, instruction.MemoryDisplSize, codeSize) * 8;
				if (num != bitness)
				{
					EncoderFlags |= EncoderFlags.P67;
				}
				if ((EncoderFlags & EncoderFlags.RegIsMemory) != 0 && GetRegisterOpSize(in instruction) != num)
				{
					ErrorMessage = $"Operand {operand}: Register operand size must equal memory addressing mode (16/32/64)";
				}
				else if (num == 16)
				{
					if (vsibIndexRegLo != 0)
					{
						ErrorMessage = $"Operand {operand}: VSIB operands can't use 16-bit addressing. It must be 32-bit or 64-bit addressing";
					}
					else
					{
						AddMemOp16(in instruction, operand);
					}
				}
				else
				{
					AddMemOp(in instruction, operand, num, vsibIndexRegLo, vsibIndexRegHi);
				}
				break;
			}
			default:
				ErrorMessage = $"Operand {operand}: Expected a register or memory operand, but opKind is {opKind}";
				break;
			}
		}

		private static int GetRegisterOpSize(in Instruction instruction)
		{
			if (instruction.Op0Kind == OpKind.Register)
			{
				Register op0Register = instruction.Op0Register;
				if (op0Register.IsGPR64())
				{
					return 64;
				}
				if (op0Register.IsGPR32())
				{
					return 32;
				}
				if (op0Register.IsGPR16())
				{
					return 16;
				}
			}
			return 0;
		}

		private bool TryConvertToDisp8N(in Instruction instruction, int displ, out sbyte compressedValue)
		{
			TryConvertToDisp8N tryConvertToDisp8N = handler.TryConvertToDisp8N;
			if (tryConvertToDisp8N != null)
			{
				return tryConvertToDisp8N(this, handler, in instruction, displ, out compressedValue);
			}
			if (-128 <= displ && displ <= 127)
			{
				compressedValue = (sbyte)displ;
				return true;
			}
			compressedValue = 0;
			return false;
		}

		private void AddMemOp16(in Instruction instruction, int operand)
		{
			if (bitness == 64)
			{
				ErrorMessage = $"Operand {operand}: 16-bit addressing can't be used by 64-bit code";
				return;
			}
			Register memoryBase = instruction.MemoryBase;
			Register memoryIndex = instruction.MemoryIndex;
			int num = instruction.MemoryDisplSize;
			if (memoryBase != Register.BX || memoryIndex != Register.SI)
			{
				if (memoryBase == Register.BX && memoryIndex == Register.DI)
				{
					ModRM |= 1;
				}
				else if (memoryBase == Register.BP && memoryIndex == Register.SI)
				{
					ModRM |= 2;
				}
				else if (memoryBase == Register.BP && memoryIndex == Register.DI)
				{
					ModRM |= 3;
				}
				else if (memoryBase == Register.SI && memoryIndex == Register.None)
				{
					ModRM |= 4;
				}
				else if (memoryBase == Register.DI && memoryIndex == Register.None)
				{
					ModRM |= 5;
				}
				else if (memoryBase == Register.BP && memoryIndex == Register.None)
				{
					ModRM |= 6;
				}
				else if (memoryBase == Register.BX && memoryIndex == Register.None)
				{
					ModRM |= 7;
				}
				else
				{
					if (memoryBase != 0 || memoryIndex != 0)
					{
						ErrorMessage = $"Operand {operand}: Invalid 16-bit base + index registers: base={memoryBase}, index={memoryIndex}";
						return;
					}
					ModRM |= 6;
					DisplSize = DisplSize.Size2;
					if (instruction.MemoryDisplacement64 > 65535)
					{
						ErrorMessage = $"Operand {operand}: Displacement must fit in a ushort";
						return;
					}
					Displ = instruction.MemoryDisplacement32;
				}
			}
			if (memoryBase == Register.None && memoryIndex == Register.None)
			{
				return;
			}
			if ((long)instruction.MemoryDisplacement64 < -32768L || (long)instruction.MemoryDisplacement64 > 65535L)
			{
				ErrorMessage = $"Operand {operand}: Displacement must fit in a short or a ushort";
				return;
			}
			Displ = instruction.MemoryDisplacement32;
			if (num == 0 && memoryBase == Register.BP && memoryIndex == Register.None)
			{
				num = 1;
				if (Displ != 0)
				{
					ErrorMessage = $"Operand {operand}: Displacement must be 0 if displSize == 0";
					return;
				}
			}
			if (num == 1)
			{
				if (TryConvertToDisp8N(in instruction, (short)Displ, out var compressedValue))
				{
					Displ = (uint)compressedValue;
				}
				else
				{
					num = 2;
				}
			}
			switch (num)
			{
			case 0:
				if (Displ != 0)
				{
					ErrorMessage = $"Operand {operand}: Displacement must be 0 if displSize == 0";
				}
				break;
			case 1:
				if ((int)Displ < -128 || (int)Displ > 127)
				{
					ErrorMessage = $"Operand {operand}: Displacement must fit in an sbyte";
					break;
				}
				ModRM |= 64;
				DisplSize = DisplSize.Size1;
				break;
			case 2:
				ModRM |= 128;
				DisplSize = DisplSize.Size2;
				break;
			default:
				ErrorMessage = $"Operand {operand}: Invalid displacement size: {num}, must be 0, 1, or 2";
				break;
			}
		}

		private void AddMemOp(in Instruction instruction, int operand, int addrSize, Register vsibIndexRegLo, Register vsibIndexRegHi)
		{
			if (bitness != 64 && addrSize == 64)
			{
				ErrorMessage = $"Operand {operand}: 64-bit addressing can only be used in 64-bit mode";
				return;
			}
			Register memoryBase = instruction.MemoryBase;
			Register memoryIndex = instruction.MemoryIndex;
			int num = instruction.MemoryDisplSize;
			Register register;
			Register register2;
			if (addrSize == 64)
			{
				register = Register.RAX;
				register2 = Register.R15;
			}
			else
			{
				register = Register.EAX;
				register2 = Register.R15D;
			}
			Register register3;
			Register regHi;
			if (vsibIndexRegLo != 0)
			{
				register3 = vsibIndexRegLo;
				regHi = vsibIndexRegHi;
			}
			else
			{
				register3 = register;
				regHi = register2;
			}
			if ((memoryBase != 0 && memoryBase != Register.RIP && memoryBase != Register.EIP && !Verify(operand, memoryBase, register, register2)) || (memoryIndex != 0 && !Verify(operand, memoryIndex, register3, regHi)))
			{
				return;
			}
			if (num != 0 && num != 1 && num != 4 && num != 8)
			{
				ErrorMessage = $"Operand {operand}: Invalid displ size: {num}, must be 0, 1, 4, 8";
				return;
			}
			if (memoryBase == Register.RIP || memoryBase == Register.EIP)
			{
				if (memoryIndex != 0)
				{
					ErrorMessage = $"Operand {operand}: RIP relative addressing can't use an index register";
					return;
				}
				if (instruction.InternalMemoryIndexScale != 0)
				{
					ErrorMessage = $"Operand {operand}: RIP relative addressing must use scale *1";
					return;
				}
				if (bitness != 64)
				{
					ErrorMessage = $"Operand {operand}: RIP/EIP relative addressing is only available in 64-bit mode";
					return;
				}
				if ((EncoderFlags & EncoderFlags.MustUseSib) != 0)
				{
					ErrorMessage = $"Operand {operand}: RIP/EIP relative addressing isn't supported";
					return;
				}
				ModRM |= 5;
				ulong memoryDisplacement = instruction.MemoryDisplacement64;
				if (memoryBase == Register.RIP)
				{
					DisplSize = DisplSize.RipRelSize4_Target64;
					Displ = (uint)memoryDisplacement;
					DisplHi = (uint)(memoryDisplacement >> 32);
					return;
				}
				DisplSize = DisplSize.RipRelSize4_Target32;
				if (memoryDisplacement > uint.MaxValue)
				{
					ErrorMessage = $"Operand {operand}: Target address doesn't fit in 32 bits: 0x{memoryDisplacement:X}";
				}
				else
				{
					Displ = (uint)memoryDisplacement;
				}
				return;
			}
			int internalMemoryIndexScale = instruction.InternalMemoryIndexScale;
			Displ = instruction.MemoryDisplacement32;
			if (addrSize == 64)
			{
				if ((long)instruction.MemoryDisplacement64 < -2147483648L || (long)instruction.MemoryDisplacement64 > 2147483647L)
				{
					ErrorMessage = $"Operand {operand}: Displacement must fit in an int";
					return;
				}
			}
			else if ((long)instruction.MemoryDisplacement64 < -2147483648L || (long)instruction.MemoryDisplacement64 > 4294967295L)
			{
				ErrorMessage = $"Operand {operand}: Displacement must fit in an int or a uint";
				return;
			}
			if (memoryBase == Register.None && memoryIndex == Register.None)
			{
				if (vsibIndexRegLo != 0)
				{
					ErrorMessage = $"Operand {operand}: VSIB addressing can't use an offset-only address";
				}
				else if (bitness == 64 || internalMemoryIndexScale != 0 || (EncoderFlags & EncoderFlags.MustUseSib) != 0)
				{
					ModRM |= 4;
					DisplSize = DisplSize.Size4;
					EncoderFlags |= EncoderFlags.Sib;
					Sib = (byte)(0x25u | (uint)(internalMemoryIndexScale << 6));
				}
				else
				{
					ModRM |= 5;
					DisplSize = DisplSize.Size4;
				}
				return;
			}
			int num2 = ((memoryBase == Register.None) ? (-1) : (memoryBase - register));
			int num3 = ((memoryIndex == Register.None) ? (-1) : (memoryIndex - register3));
			if (num == 0 && (num2 & 7) == 5)
			{
				num = 1;
				if (Displ != 0)
				{
					ErrorMessage = $"Operand {operand}: Displacement must be 0 if displSize == 0";
					return;
				}
			}
			if (num == 1)
			{
				if (TryConvertToDisp8N(in instruction, (int)Displ, out var compressedValue))
				{
					Displ = (uint)compressedValue;
				}
				else
				{
					num = addrSize / 8;
				}
			}
			if (memoryBase == Register.None)
			{
				DisplSize = DisplSize.Size4;
			}
			else if (num == 1)
			{
				if ((int)Displ < -128 || (int)Displ > 127)
				{
					ErrorMessage = $"Operand {operand}: Displacement must fit in an sbyte";
					return;
				}
				ModRM |= 64;
				DisplSize = DisplSize.Size1;
			}
			else if (num == addrSize / 8)
			{
				ModRM |= 128;
				DisplSize = DisplSize.Size4;
			}
			else
			{
				if (num != 0)
				{
					ErrorMessage = string.Format("Operand {0}: Invalid {1} value", operand, "MemoryDisplSize");
					return;
				}
				if (Displ != 0)
				{
					ErrorMessage = $"Operand {operand}: Displacement must be 0 if displSize == 0";
					return;
				}
			}
			if (memoryIndex == Register.None && (num2 & 7) != 4 && internalMemoryIndexScale == 0 && (EncoderFlags & EncoderFlags.MustUseSib) == 0)
			{
				ModRM |= (byte)(num2 & 7);
			}
			else
			{
				EncoderFlags |= EncoderFlags.Sib;
				Sib = (byte)(internalMemoryIndexScale << 6);
				ModRM |= 4;
				if (memoryIndex == Register.RSP || memoryIndex == Register.ESP)
				{
					ErrorMessage = $"Operand {operand}: ESP/RSP can't be used as an index register";
					return;
				}
				if (num2 < 0)
				{
					Sib |= 5;
				}
				else
				{
					Sib |= (byte)(num2 & 7);
				}
				if (num3 < 0)
				{
					Sib |= 32;
				}
				else
				{
					Sib |= (byte)((num3 & 7) << 3);
				}
			}
			if (num2 >= 0)
			{
				EncoderFlags |= (EncoderFlags)(num2 >> 3);
			}
			if (num3 >= 0)
			{
				EncoderFlags |= (EncoderFlags)((num3 >> 2) & 2);
				EncoderFlags |= (EncoderFlags)((num3 & 0x10) << 27);
			}
		}

		internal void WritePrefixes(in Instruction instruction, bool canWriteF3 = true)
		{
			Register segmentPrefix = instruction.SegmentPrefix;
			if (segmentPrefix != 0)
			{
				WriteByteInternal(SegmentOverrides[(int)(segmentPrefix - 71)]);
			}
			if ((EncoderFlags & EncoderFlags.PF0) != 0 || instruction.HasLockPrefix)
			{
				WriteByteInternal(240u);
			}
			if ((EncoderFlags & EncoderFlags.P66) != 0)
			{
				WriteByteInternal(102u);
			}
			if ((EncoderFlags & EncoderFlags.P67) != 0)
			{
				WriteByteInternal(103u);
			}
			if (canWriteF3 && instruction.HasRepePrefix)
			{
				WriteByteInternal(243u);
			}
			if (instruction.HasRepnePrefix)
			{
				WriteByteInternal(242u);
			}
		}

		private void WriteModRM()
		{
			if ((EncoderFlags & EncoderFlags.ModRM) != 0)
			{
				WriteByteInternal(ModRM);
				if ((EncoderFlags & EncoderFlags.Sib) != 0)
				{
					WriteByteInternal(Sib);
				}
			}
			displAddr = (uint)currentRip;
			switch (DisplSize)
			{
			case DisplSize.Size1:
				WriteByteInternal(Displ);
				break;
			case DisplSize.Size2:
			{
				uint num3 = Displ;
				WriteByteInternal(num3);
				WriteByteInternal(num3 >> 8);
				break;
			}
			case DisplSize.Size4:
			{
				uint num3 = Displ;
				WriteByteInternal(num3);
				WriteByteInternal(num3 >> 8);
				WriteByteInternal(num3 >> 16);
				WriteByteInternal(num3 >> 24);
				break;
			}
			case DisplSize.Size8:
			{
				uint num3 = Displ;
				WriteByteInternal(num3);
				WriteByteInternal(num3 >> 8);
				WriteByteInternal(num3 >> 16);
				WriteByteInternal(num3 >> 24);
				num3 = DisplHi;
				WriteByteInternal(num3);
				WriteByteInternal(num3 >> 8);
				WriteByteInternal(num3 >> 16);
				WriteByteInternal(num3 >> 24);
				break;
			}
			case DisplSize.RipRelSize4_Target32:
			{
				uint num4 = (uint)((int)currentRip + 4) + immSizes[(int)ImmSize];
				uint num3 = Displ - num4;
				WriteByteInternal(num3);
				WriteByteInternal(num3 >> 8);
				WriteByteInternal(num3 >> 16);
				WriteByteInternal(num3 >> 24);
				break;
			}
			case DisplSize.RipRelSize4_Target64:
			{
				ulong num = currentRip + 4 + immSizes[(int)ImmSize];
				long num2 = (long)((((ulong)DisplHi << 32) | Displ) - num);
				if (num2 < int.MinValue || num2 > int.MaxValue)
				{
					ErrorMessage = $"RIP relative distance is too far away: NextIP: 0x{num:X16} target: 0x{DisplHi:X8}{Displ:X8}, diff = {num2}, diff must fit in an Int32";
				}
				uint num3 = (uint)num2;
				WriteByteInternal(num3);
				WriteByteInternal(num3 >> 8);
				WriteByteInternal(num3 >> 16);
				WriteByteInternal(num3 >> 24);
				break;
			}
			default:
				throw new InvalidOperationException();
			case DisplSize.None:
				break;
			}
		}

		private void WriteImmediate()
		{
			immAddr = (uint)currentRip;
			switch (ImmSize)
			{
			case ImmSize.Size1:
			case ImmSize.SizeIbReg:
			case ImmSize.Size1OpCode:
				WriteByteInternal(Immediate);
				break;
			case ImmSize.Size2:
			{
				uint num3 = Immediate;
				WriteByteInternal(num3);
				WriteByteInternal(num3 >> 8);
				break;
			}
			case ImmSize.Size4:
			{
				uint num3 = Immediate;
				WriteByteInternal(num3);
				WriteByteInternal(num3 >> 8);
				WriteByteInternal(num3 >> 16);
				WriteByteInternal(num3 >> 24);
				break;
			}
			case ImmSize.Size8:
			{
				uint num3 = Immediate;
				WriteByteInternal(num3);
				WriteByteInternal(num3 >> 8);
				WriteByteInternal(num3 >> 16);
				WriteByteInternal(num3 >> 24);
				num3 = ImmediateHi;
				WriteByteInternal(num3);
				WriteByteInternal(num3 >> 8);
				WriteByteInternal(num3 >> 16);
				WriteByteInternal(num3 >> 24);
				break;
			}
			case ImmSize.Size2_1:
			{
				uint num3 = Immediate;
				WriteByteInternal(num3);
				WriteByteInternal(num3 >> 8);
				WriteByteInternal(ImmediateHi);
				break;
			}
			case ImmSize.Size1_1:
				WriteByteInternal(Immediate);
				WriteByteInternal(ImmediateHi);
				break;
			case ImmSize.Size2_2:
			{
				uint num3 = Immediate;
				WriteByteInternal(num3);
				WriteByteInternal(num3 >> 8);
				num3 = ImmediateHi;
				WriteByteInternal(num3);
				WriteByteInternal(num3 >> 8);
				break;
			}
			case ImmSize.Size4_2:
			{
				uint num3 = Immediate;
				WriteByteInternal(num3);
				WriteByteInternal(num3 >> 8);
				WriteByteInternal(num3 >> 16);
				WriteByteInternal(num3 >> 24);
				num3 = ImmediateHi;
				WriteByteInternal(num3);
				WriteByteInternal(num3 >> 8);
				break;
			}
			case ImmSize.RipRelSize1_Target16:
			{
				ushort num6 = (ushort)((int)currentRip + 1);
				short num7 = (short)((short)Immediate - (short)num6);
				if (num7 < -128 || num7 > 127)
				{
					ErrorMessage = $"Branch distance is too far away: NextIP: 0x{num6:X4} target: 0x{(ushort)Immediate:X4}, diff = {num7}, diff must fit in an Int8";
				}
				WriteByteInternal((uint)num7);
				break;
			}
			case ImmSize.RipRelSize1_Target32:
			{
				uint num4 = (uint)((int)currentRip + 1);
				int num5 = (int)(Immediate - num4);
				if (num5 < -128 || num5 > 127)
				{
					ErrorMessage = $"Branch distance is too far away: NextIP: 0x{num4:X8} target: 0x{Immediate:X8}, diff = {num5}, diff must fit in an Int8";
				}
				WriteByteInternal((uint)num5);
				break;
			}
			case ImmSize.RipRelSize1_Target64:
			{
				ulong num = currentRip + 1;
				long num2 = (long)((((ulong)ImmediateHi << 32) | Immediate) - num);
				if (num2 < -128 || num2 > 127)
				{
					ErrorMessage = $"Branch distance is too far away: NextIP: 0x{num:X16} target: 0x{ImmediateHi:X8}{Immediate:X8}, diff = {num2}, diff must fit in an Int8";
				}
				WriteByteInternal((uint)num2);
				break;
			}
			case ImmSize.RipRelSize2_Target16:
			{
				uint num4 = (uint)((int)currentRip + 2);
				uint num3 = Immediate - num4;
				WriteByteInternal(num3);
				WriteByteInternal(num3 >> 8);
				break;
			}
			case ImmSize.RipRelSize2_Target32:
			{
				uint num4 = (uint)((int)currentRip + 2);
				int num5 = (int)(Immediate - num4);
				if (num5 < -32768 || num5 > 32767)
				{
					ErrorMessage = $"Branch distance is too far away: NextIP: 0x{num4:X8} target: 0x{Immediate:X8}, diff = {num5}, diff must fit in an Int16";
				}
				uint num3 = (uint)num5;
				WriteByteInternal(num3);
				WriteByteInternal(num3 >> 8);
				break;
			}
			case ImmSize.RipRelSize2_Target64:
			{
				ulong num = currentRip + 2;
				long num2 = (long)((((ulong)ImmediateHi << 32) | Immediate) - num);
				if (num2 < -32768 || num2 > 32767)
				{
					ErrorMessage = $"Branch distance is too far away: NextIP: 0x{num:X16} target: 0x{ImmediateHi:X8}{Immediate:X8}, diff = {num2}, diff must fit in an Int16";
				}
				uint num3 = (uint)num2;
				WriteByteInternal(num3);
				WriteByteInternal(num3 >> 8);
				break;
			}
			case ImmSize.RipRelSize4_Target32:
			{
				uint num4 = (uint)((int)currentRip + 4);
				uint num3 = Immediate - num4;
				WriteByteInternal(num3);
				WriteByteInternal(num3 >> 8);
				WriteByteInternal(num3 >> 16);
				WriteByteInternal(num3 >> 24);
				break;
			}
			case ImmSize.RipRelSize4_Target64:
			{
				ulong num = currentRip + 4;
				long num2 = (long)((((ulong)ImmediateHi << 32) | Immediate) - num);
				if (num2 < int.MinValue || num2 > int.MaxValue)
				{
					ErrorMessage = $"Branch distance is too far away: NextIP: 0x{num:X16} target: 0x{ImmediateHi:X8}{Immediate:X8}, diff = {num2}, diff must fit in an Int32";
				}
				uint num3 = (uint)num2;
				WriteByteInternal(num3);
				WriteByteInternal(num3 >> 8);
				WriteByteInternal(num3 >> 16);
				WriteByteInternal(num3 >> 24);
				break;
			}
			default:
				throw new InvalidOperationException();
			case ImmSize.None:
				break;
			}
		}

		[MethodImpl(MethodImplOptions.AggressiveInlining)]
		public void WriteByte(byte value)
		{
			WriteByteInternal(value);
		}

		[MethodImpl(MethodImplOptions.AggressiveInlining)]
		internal void WriteByteInternal(uint value)
		{
			writer.WriteByte((byte)value);
			currentRip++;
		}

		public ConstantOffsets GetConstantOffsets()
		{
			ConstantOffsets result = default(ConstantOffsets);
			switch (DisplSize)
			{
			case DisplSize.Size1:
				result.DisplacementSize = 1;
				result.DisplacementOffset = (byte)(displAddr - eip);
				break;
			case DisplSize.Size2:
				result.DisplacementSize = 2;
				result.DisplacementOffset = (byte)(displAddr - eip);
				break;
			case DisplSize.Size4:
			case DisplSize.RipRelSize4_Target32:
			case DisplSize.RipRelSize4_Target64:
				result.DisplacementSize = 4;
				result.DisplacementOffset = (byte)(displAddr - eip);
				break;
			case DisplSize.Size8:
				result.DisplacementSize = 8;
				result.DisplacementOffset = (byte)(displAddr - eip);
				break;
			default:
				throw new InvalidOperationException();
			case DisplSize.None:
				break;
			}
			switch (ImmSize)
			{
			case ImmSize.Size1:
			case ImmSize.RipRelSize1_Target16:
			case ImmSize.RipRelSize1_Target32:
			case ImmSize.RipRelSize1_Target64:
				result.ImmediateSize = 1;
				result.ImmediateOffset = (byte)(immAddr - eip);
				break;
			case ImmSize.Size1_1:
				result.ImmediateSize = 1;
				result.ImmediateOffset = (byte)(immAddr - eip);
				result.ImmediateSize2 = 1;
				result.ImmediateOffset2 = (byte)(immAddr - eip + 1);
				break;
			case ImmSize.Size2:
			case ImmSize.RipRelSize2_Target16:
			case ImmSize.RipRelSize2_Target32:
			case ImmSize.RipRelSize2_Target64:
				result.ImmediateSize = 2;
				result.ImmediateOffset = (byte)(immAddr - eip);
				break;
			case ImmSize.Size2_1:
				result.ImmediateSize = 2;
				result.ImmediateOffset = (byte)(immAddr - eip);
				result.ImmediateSize2 = 1;
				result.ImmediateOffset2 = (byte)(immAddr - eip + 2);
				break;
			case ImmSize.Size2_2:
				result.ImmediateSize = 2;
				result.ImmediateOffset = (byte)(immAddr - eip);
				result.ImmediateSize2 = 2;
				result.ImmediateOffset2 = (byte)(immAddr - eip + 2);
				break;
			case ImmSize.Size4:
			case ImmSize.RipRelSize4_Target32:
			case ImmSize.RipRelSize4_Target64:
				result.ImmediateSize = 4;
				result.ImmediateOffset = (byte)(immAddr - eip);
				break;
			case ImmSize.Size4_2:
				result.ImmediateSize = 4;
				result.ImmediateOffset = (byte)(immAddr - eip);
				result.ImmediateSize2 = 2;
				result.ImmediateOffset2 = (byte)(immAddr - eip + 4);
				break;
			case ImmSize.Size8:
				result.ImmediateSize = 8;
				result.ImmediateOffset = (byte)(immAddr - eip);
				break;
			default:
				throw new InvalidOperationException();
			case ImmSize.None:
			case ImmSize.SizeIbReg:
			case ImmSize.Size1OpCode:
				break;
			}
			return result;
		}
	}
	public static class EncoderCodeExtensions
	{
		[MethodImpl(MethodImplOptions.AggressiveInlining)]
		public static OpCodeInfo ToOpCode(this Code code)
		{
			OpCodeInfo[] infos = OpCodeInfos.Infos;
			if ((uint)code >= (uint)infos.Length)
			{
				ThrowHelper.ThrowArgumentOutOfRangeException_code();
			}
			return infos[(int)code];
		}
	}
	[Serializable]
	public class EncoderException : Exception
	{
		public Instruction Instruction { get; }

		public EncoderException(string message, in Instruction instruction)
			: base(message)
		{
			Instruction = instruction;
		}

		protected EncoderException(SerializationInfo info, StreamingContext context)
			: base(info, context)
		{
		}
	}
	public enum EncodingKind
	{
		Legacy,
		VEX,
		EVEX,
		XOP,
		D3NOW,
		MVEX
	}
	public sealed class FastFormatter
	{
		private readonly FastFormatterOptions options;

		private readonly ISymbolResolver symbolResolver;

		private readonly FormatterString[] allRegisters;

		private readonly string[] codeMnemonics;

		private readonly FastFmtFlags[] codeFlags;

		private readonly string[] allMemorySizes;

		private readonly string[] rcStrings;

		private readonly string[] rcSaeStrings;

		private readonly string[] scaleNumbers;

		private readonly string[] mvexRegMemConsts32;

		private readonly string[] mvexRegMemConsts64;

		private const bool ShowUselessPrefixes = true;

		private static readonly string[] s_rcStrings = new string[4] { "{rn}", "{rd}", "{ru}", "{rz}" };

		private static readonly string[] s_rcSaeStrings = new string[4] { "{rn-sae}", "{rd-sae}", "{ru-sae}", "{rz-sae}" };

		private static readonly string[] s_scaleNumbers = new string[4] { "*1", "*2", "*4", "*8" };

		private static readonly string[] s_mvexRegMemConsts32 = new string[17]
		{
			string.Empty,
			string.Empty,
			"{cdab}",
			"{badc}",
			"{dacb}",
			"{aaaa}",
			"{bbbb}",
			"{cccc}",
			"{dddd}",
			string.Empty,
			"{1to16}",
			"{4to16}",
			"{float16}",
			"{uint8}",
			"{sint8}",
			"{uint16}",
			"{sint16}"
		};

		private static readonly string[] s_mvexRegMemConsts64 = new string[17]
		{
			string.Empty,
			string.Empty,
			"{cdab}",
			"{badc}",
			"{dacb}",
			"{aaaa}",
			"{bbbb}",
			"{cccc}",
			"{dddd}",
			string.Empty,
			"{1to8}",
			"{4to8}",
			"{float16}",
			"{uint8}",
			"{sint8}",
			"{uint16}",
			"{sint16}"
		};

		public FastFormatterOptions Options => options;

		public FastFormatter()
			: this(null)
		{
		}

		public FastFormatter(ISymbolResolver? symbolResolver)
		{
			options = new FastFormatterOptions();
			this.symbolResolver = symbolResolver;
			allRegisters = Iced.Intel.FastFormatterInternal.Registers.AllRegisters;
			codeMnemonics = FmtData.Mnemonics;
			codeFlags = FmtData.Flags;
			allMemorySizes = Iced.Intel.FastFormatterInternal.MemorySizes.AllMemorySizes;
			rcStrings = s_rcStrings;
			rcSaeStrings = s_rcSaeStrings;
			scaleNumbers = s_scaleNumbers;
			mvexRegMemConsts32 = s_mvexRegMemConsts32;
			mvexRegMemConsts64 = s_mvexRegMemConsts64;
		}

		public void Format(in Instruction instruction, FastStringOutput output)
		{
			if (output == null)
			{
				ThrowHelper.ThrowArgumentNullException_output();
			}
			Code code = instruction.Code;
			string value = codeMnemonics[(int)code];
			FastFmtFlags num = codeFlags[(int)code];
			int num2 = instruction.OpCount;
			uint num3 = (uint)num >> 3;
			if (num3 != 0 && options.UsePseudoOps && instruction.GetOpKind(num2 - 1) == OpKind.Immediate8)
			{
				int num4 = instruction.Immediate8;
				PseudoOpsKind pseudoOpsKind = (PseudoOpsKind)(num3 - 1);
				if (pseudoOpsKind == PseudoOpsKind.vpcmpd6 && code == Code.MVEX_Vpcmpud_kr_k1_zmm_zmmmt_imm8)
				{
					pseudoOpsKind = PseudoOpsKind.vpcmpud6;
				}
				FormatterString[] pseudoOps = FormatterConstants.GetPseudoOps(pseudoOpsKind);
				if ((pseudoOpsKind == PseudoOpsKind.pclmulqdq || pseudoOpsKind == PseudoOpsKind.vpclmulqdq) && num4 > 1)
				{
					num4 = num4 switch
					{
						16 => 2, 
						17 => 3, 
						_ => -1, 
					};
				}
				if ((uint)num4 < (uint)pseudoOps.Length)
				{
					value = pseudoOps[num4].Lower;
					num2--;
				}
			}
			Register segmentPrefix = instruction.SegmentPrefix;
			int num5;
			if (((uint)segmentPrefix | instruction.HasAnyOf_Lock_Rep_Repne_Prefix) != 0)
			{
				if (segmentPrefix == Register.DS)
				{
					num5 = (FormatterUtils.IsNotrackPrefixBranch(code) ? 1 : 0);
					if (num5 != 0)
					{
						goto IL_00fb;
					}
				}
				else
				{
					num5 = 0;
				}
				if (segmentPrefix != 0 && ShowSegmentPrefix(in instruction, num2))
				{
					FormatRegister(output, segmentPrefix);
					output.Append(' ');
				}
				goto IL_00fb;
			}
			goto IL_01e1;
			IL_00fb:
			bool flag = false;
			if (instruction.HasXacquirePrefix)
			{
				output.AppendNotNull("xacquire ");
				flag = true;
			}
			if (instruction.HasXreleasePrefix)
			{
				output.AppendNotNull("xrelease ");
				flag = true;
			}
			if (instruction.HasLockPrefix)
			{
				output.AppendNotNull("lock ");
			}
			if (num5 != 0)
			{
				output.AppendNotNull("notrack ");
			}
			if (!flag)
			{
				if (instruction.HasRepePrefix)
				{
					if (FormatterUtils.IsRepeOrRepneInstruction(code))
					{
						output.AppendNotNull("repe ");
					}
					else
					{
						output.AppendNotNull("rep ");
					}
				}
				if (instruction.HasRepnePrefix)
				{
					if ((Code.Retnw_imm16 <= code && code <= Code.Retnq) || (Code.Call_rel16 <= code && code <= Code.Jmp_rel32_64) || (Code.Call_rm16 <= code && code <= Code.Call_rm64) || (Code.Jmp_rm16 <= code && code <= Code.Jmp_rm64) || code.IsJccShortOrNear())
					{
						output.AppendNotNull("bnd ");
					}
					else
					{
						output.AppendNotNull("repne ");
					}
				}
			}
			goto IL_01e1;
			IL_01e1:
			output.AppendNotNull(value);
			bool flag2;
			OpKind opKind;
			if ((uint)(code - 1) <= 3u)
			{
				num2 = instruction.DeclareDataCount;
				flag2 = true;
				opKind = code switch
				{
					Code.DeclareByte => OpKind.Immediate8, 
					Code.DeclareWord => OpKind.Immediate16, 
					Code.DeclareDword => OpKind.Immediate32, 
					_ => OpKind.Immediate64, 
				};
			}
			else
			{
				flag2 = false;
				opKind = OpKind.Register;
			}
			if (num2 <= 0)
			{
				return;
			}
			output.Append(' ');
			int num6 = ((!IcedConstants.IsMvex(instruction.Code)) ? (-1) : ((instruction.GetOpKind(num2 - 1) == OpKind.Immediate8) ? (num2 - 2) : (num2 - 1)));
			for (int i = 0; i < num2; i++)
			{
				if (i > 0)
				{
					if (options.SpaceAfterOperandSeparator)
					{
						output.AppendNotNull(", ");
					}
					else
					{
						output.Append(',');
					}
				}
				OpKind opKind2 = (flag2 ? opKind : instruction.GetOpKind(i));
				int addressSize;
				SymbolResult symbol;
				ulong num7;
				ISymbolResolver symbolResolver;
				switch (opKind2)
				{
				case OpKind.Register:
					FormatRegister(output, instruction.GetOpRegister(i));
					break;
				case OpKind.NearBranch64:
					addressSize = 8;
					num7 = instruction.NearBranch64;
					goto IL_0357;
				case OpKind.NearBranch32:
					addressSize = 4;
					num7 = instruction.NearBranch32;
					goto IL_0357;
				case OpKind.NearBranch16:
					addressSize = 2;
					num7 = instruction.NearBranch16;
					goto IL_0357;
				case OpKind.FarBranch32:
					addressSize = 4;
					num7 = instruction.FarBranch32;
					goto IL_03b3;
				case OpKind.FarBranch16:
					addressSize = 2;
					num7 = instruction.FarBranch16;
					goto IL_03b3;
				case OpKind.Immediate8:
				case OpKind.Immediate8_2nd:
				{
					byte b = (flag2 ? instruction.GetDeclareByteValue(i) : ((opKind2 != OpKind.Immediate8) ? instruction.Immediate8_2nd : instruction.Immediate8));
					if ((symbolResolver = this.symbolResolver) != null && symbolResolver.TryGetSymbol(in instruction, i, i, b, 1, out symbol))
					{
						if ((symbol.Flags & SymbolFlags.Relative) == 0)
						{
							output.AppendNotNull("offset ");
						}
						WriteSymbol(output, b, in symbol);
					}
					else
					{
						FormatNumber(output, b);
					}
					break;
				}
				case OpKind.Immediate16:
				case OpKind.Immediate8to16:
				{
					ushort num9 = (flag2 ? instruction.GetDeclareWordValue(i) : ((opKind2 != OpKind.Immediate16) ? ((ushort)instruction.Immediate8to16) : instruction.Immediate16));
					if ((symbolResolver = this.symbolResolver) != null && symbolResolver.TryGetSymbol(in instruction, i, i, num9, 2, out symbol))
					{
						if ((symbol.Flags & SymbolFlags.Relative) == 0)
						{
							output.AppendNotNull("offset ");
						}
						WriteSymbol(output, num9, in symbol);
					}
					else
					{
						FormatNumber(output, num9);
					}
					break;
				}
				case OpKind.Immediate32:
				case OpKind.Immediate8to32:
				{
					uint num8 = (flag2 ? instruction.GetDeclareDwordValue(i) : ((opKind2 != OpKind.Immediate32) ? ((uint)instruction.Immediate8to32) : instruction.Immediate32));
					if ((symbolResolver = this.symbolResolver) != null && symbolResolver.TryGetSymbol(in instruction, i, i, num8, 4, out symbol))
					{
						if ((symbol.Flags & SymbolFlags.Relative) == 0)
						{
							output.AppendNotNull("offset ");
						}
						WriteSymbol(output, num8, in symbol);
					}
					else
					{
						FormatNumber(output, num8);
					}
					break;
				}
				case OpKind.Immediate64:
				case OpKind.Immediate8to64:
				case OpKind.Immediate32to64:
					num7 = (flag2 ? instruction.GetDeclareQwordValue(i) : (opKind2 switch
					{
						OpKind.Immediate32to64 => (ulong)instruction.Immediate32to64, 
						OpKind.Immediate8to64 => (ulong)instruction.Immediate8to64, 
						_ => instruction.Immediate64, 
					}));
					if ((symbolResolver = this.symbolResolver) != null && symbolResolver.TryGetSymbol(in instruction, i, i, num7, 8, out symbol))
					{
						if ((symbol.Flags & SymbolFlags.Relative) == 0)
						{
							output.AppendNotNull("offset ");
						}
						WriteSymbol(output, num7, in symbol);
					}
					else
					{
						FormatNumber(output, num7);
					}
					break;
				case OpKind.MemorySegSI:
					FormatMemory(output, in instruction, i, instruction.MemorySegment, Register.SI, Register.None, 0, 0, 0L, 2);
					break;
				case OpKind.MemorySegESI:
					FormatMemory(output, in instruction, i, instruction.MemorySegment, Register.ESI, Register.None, 0, 0, 0L, 4);
					break;
				case OpKind.MemorySegRSI:
					FormatMemory(output, in instruction, i, instruction.MemorySegment, Register.RSI, Register.None, 0, 0, 0L, 8);
					break;
				case OpKind.MemorySegDI:
					FormatMemory(output, in instruction, i, instruction.MemorySegment, Register.DI, Register.None, 0, 0, 0L, 2);
					break;
				case OpKind.MemorySegEDI:
					FormatMemory(output, in instruction, i, instruction.MemorySegment, Register.EDI, Register.None, 0, 0, 0L, 4);
					break;
				case OpKind.MemorySegRDI:
					FormatMemory(output, in instruction, i, instruction.MemorySegment, Register.RDI, Register.None, 0, 0, 0L, 8);
					break;
				case OpKind.MemoryESDI:
					FormatMemory(output, in instruction, i, Register.ES, Register.DI, Register.None, 0, 0, 0L, 2);
					break;
				case OpKind.MemoryESEDI:
					FormatMemory(output, in instruction, i, Register.ES, Register.EDI, Register.None, 0, 0, 0L, 4);
					break;
				case OpKind.MemoryESRDI:
					FormatMemory(output, in instruction, i, Register.ES, Register.RDI, Register.None, 0, 0, 0L, 8);
					break;
				case OpKind.Memory:
				{
					int memoryDisplSize = instruction.MemoryDisplSize;
					Register memoryBase = instruction.MemoryBase;
					Register indexReg = instruction.MemoryIndex;
					int addressSizeInBytes = InstructionUtils.GetAddressSizeInBytes(memoryBase, indexReg, memoryDisplSize, instruction.CodeSize);
					long displ = (long)((addressSizeInBytes != 8) ? instruction.MemoryDisplacement32 : instruction.MemoryDisplacement64);
					if (code == Code.Xlat_m8)
					{
						indexReg = Register.None;
					}
					FormatMemory(output, in instruction, i, instruction.MemorySegment, memoryBase, indexReg, instruction.InternalMemoryIndexScale, memoryDisplSize, displ, addressSizeInBytes);
					break;
				}
				default:
					{
						throw new InvalidOperationException();
					}
					IL_0357:
					if ((symbolResolver = this.symbolResolver) != null && symbolResolver.TryGetSymbol(in instruction, i, i, num7, addressSize, out symbol))
					{
						WriteSymbol(output, num7, in symbol);
					}
					else
					{
						FormatNumber(output, num7);
					}
					break;
					IL_03b3:
					if ((symbolResolver = this.symbolResolver) != null && symbolResolver.TryGetSymbol(in instruction, i, i, (uint)num7, addressSize, out symbol))
					{
						if (!symbolResolver.TryGetSymbol(in instruction, i + 1, i, instruction.FarBranchSelector, 2, out var symbol2))
						{
							FormatNumber(output, instruction.FarBranchSelector);
						}
						else
						{
							WriteSymbol(output, instruction.FarBranchSelector, in symbol2);
						}
						output.Append(':');
						WriteSymbol(output, num7, in symbol);
					}
					else
					{
						FormatNumber(output, instruction.FarBranchSelector);
						output.Append(':');
						if (opKind2 == OpKind.FarBranch32)
						{
							FormatNumber(output, instruction.FarBranch32);
						}
						else
						{
							FormatNumber(output, instruction.FarBranch16);
						}
					}
					break;
				}
				if (i == 0 && instruction.HasOpMask_or_ZeroingMasking)
				{
					if (instruction.HasOpMask)
					{
						output.Append('{');
						FormatRegister(output, instruction.OpMask);
						output.Append('}');
					}
					if (instruction.ZeroingMasking)
					{
						output.AppendNotNull("{z}");
					}
				}
				if (num6 != i)
				{
					continue;
				}
				MvexRegMemConv mvexRegMemConv = instruction.MvexRegMemConv;
				if (mvexRegMemConv == MvexRegMemConv.None)
				{
					continue;
				}
				MvexInfo mvexInfo = new MvexInfo(instruction.Code);
				if (mvexInfo.ConvFn != 0)
				{
					string text = (mvexInfo.IsConvFn32 ? mvexRegMemConsts32 : mvexRegMemConsts64)[(int)mvexRegMemConv];
					if (text.Length != 0)
					{
						output.AppendNotNull(text);
					}
				}
			}
			if (!instruction.HasRoundingControlOrSae)
			{
				return;
			}
			RoundingControl roundingControl = instruction.RoundingControl;
			if (roundingControl != 0)
			{
				if (IcedConstants.IsMvex(instruction.Code) && !instruction.SuppressAllExceptions)
				{
					output.AppendNotNull(rcStrings[(int)(roundingControl - 1)]);
				}
				else
				{
					output.AppendNotNull(rcSaeStrings[(int)(roundingControl - 1)]);
				}
			}
			else
			{
				output.AppendNotNull("{sae}");
			}
		}

		[MethodImpl(MethodImplOptions.AggressiveInlining)]
		private static bool ShowSegmentPrefix(in Instruction instruction, int opCount)
		{
			for (int i = 0; i < opCount; i++)
			{
				switch (instruction.GetOpKind(i))
				{
				case OpKind.MemorySegSI:
				case OpKind.MemorySegESI:
				case OpKind.MemorySegRSI:
				case OpKind.MemorySegDI:
				case OpKind.MemorySegEDI:
				case OpKind.MemorySegRDI:
				case OpKind.Memory:
					return false;
				default:
					throw new InvalidOperationException();
				case OpKind.Register:
				case OpKind.NearBranch16:
				case OpKind.NearBranch32:
				case OpKind.NearBranch64:
				case OpKind.FarBranch16:
				case OpKind.FarBranch32:
				case OpKind.Immediate8:
				case OpKind.Immediate8_2nd:
				case OpKind.Immediate16:
				case OpKind.Immediate32:
				case OpKind.Immediate64:
				case OpKind.Immediate8to16:
				case OpKind.Immediate8to32:
				case OpKind.Immediate8to64:
				case OpKind.Immediate32to64:
				case OpKind.MemoryESDI:
				case OpKind.MemoryESEDI:
				case OpKind.MemoryESRDI:
					break;
				}
			}
			return true;
		}

		[MethodImpl(MethodImplOptions.AggressiveInlining)]
		private void FormatRegister(FastStringOutput output, Register register)
		{
			output.AppendNotNull(allRegisters[(int)register].Lower);
		}

		private void FormatNumber(FastStringOutput output, ulong value)
		{
			bool useHexPrefix = options.UseHexPrefix;
			if (useHexPrefix)
			{
				output.AppendNotNull("0x");
			}
			int num = 0;
			ulong num2 = value;
			do
			{
				num += 4;
				num2 >>= 4;
			}
			while (num2 != 0L);
			if (!useHexPrefix && (int)((value >> num - 4) & 0xF) > 9)
			{
				output.Append('0');
			}
			string text = (options.UppercaseHex ? "0123456789ABCDEF" : "0123456789abcdef");
			do
			{
				num -= 4;
				int index = (int)(value >> num) & 0xF;
				output.Append(text[index]);
			}
			while (num != 0);
			if (!useHexPrefix)
			{
				output.Append('h');
			}
		}

		[MethodImpl(MethodImplOptions.AggressiveInlining)]
		private void WriteSymbol(FastStringOutput output, ulong address, in SymbolResult symbol)
		{
			WriteSymbol(output, address, in symbol, writeMinusIfSigned: true);
		}

		private void WriteSymbol(FastStringOutput output, ulong address, in SymbolResult symbol, bool writeMinusIfSigned)
		{
			long num = (long)(address - symbol.Address);
			if ((symbol.Flags & SymbolFlags.Signed) != 0)
			{
				if (writeMinusIfSigned)
				{
					output.Append('-');
				}
				num = -num;
			}
			TextInfo text = symbol.Text;
			TextPart[] textArray = text.TextArray;
			if (textArray != null)
			{
				TextPart[] array = textArray;
				for (int i = 0; i < array.Length; i++)
				{
					string text2 = array[i].Text;
					if (text2 != null)
					{
						output.AppendNotNull(text2);
					}
				}
			}
			else
			{
				string text3 = text.Text.Text;
				if (text3 != null)
				{
					output.AppendNotNull(text3);
				}
			}
			if (num != 0L)
			{
				if (num < 0)
				{
					output.Append('-');
					num = -num;
				}
				else
				{
					output.Append('+');
				}
				FormatNumber(output, (ulong)num);
			}
			if (options.ShowSymbolAddress)
			{
				output.AppendNotNull(" (");
				FormatNumber(output, address);
				output.Append(')');
			}
		}

		private void FormatMemory(FastStringOutput output, in Instruction instruction, int operand, Register segReg, Register baseReg, Register indexReg, int scale, int displSize, long displ, int addrSize)
		{
			ulong address;
			switch (baseReg)
			{
			case Register.RIP:
				address = (ulong)displ;
				if (options.RipRelativeAddresses)
				{
					displ -= (long)instruction.NextIP;
				}
				else
				{
					baseReg = Register.None;
				}
				displSize = 8;
				break;
			case Register.EIP:
				address = (uint)displ;
				if (options.RipRelativeAddresses)
				{
					displ = (int)displ - (int)instruction.NextIP32;
				}
				else
				{
					baseReg = Register.None;
				}
				displSize = 4;
				break;
			default:
				address = (ulong)displ;
				break;
			}
			ISymbolResolver symbolResolver = this.symbolResolver;
			bool flag;
			SymbolResult symbol;
			if (symbolResolver != null)
			{
				flag = symbolResolver.TryGetSymbol(in instruction, operand, operand, address, addrSize, out symbol);
			}
			else
			{
				flag = false;
				symbol = default(SymbolResult);
			}
			bool flag2 = scale != 0;
			if (!flag2 && baseReg == Register.None)
			{
				flag2 = true;
			}
			if (addrSize == 2)
			{
				flag2 = false;
			}
			if ((codeFlags[(int)instruction.Code] & FastFmtFlags.ForceMemSize) != 0 || instruction.IsBroadcast || options.AlwaysShowMemorySize)
			{
				string value = allMemorySizes[(int)instruction.MemorySize];
				output.AppendNotNull(value);
			}
			CodeSize codeSize = instruction.CodeSize;
			Register segmentPrefix = instruction.SegmentPrefix;
			bool flag3 = segmentPrefix == Register.DS && FormatterUtils.IsNotrackPrefixBranch(instruction.Code) && ((codeSize != CodeSize.Code16 && codeSize != CodeSize.Code32) || (baseReg != Register.BP && baseReg != Register.EBP && baseReg != Register.ESP));
			if (options.AlwaysShowSegmentRegister || (segmentPrefix != 0 && !flag3))
			{
				FormatRegister(output, segReg);
				output.Append(':');
			}
			output.Append('[');
			bool flag4 = false;
			if (baseReg != 0)
			{
				FormatRegister(output, baseReg);
				flag4 = true;
			}
			if (indexReg != 0)
			{
				if (flag4)
				{
					output.Append('+');
				}
				flag4 = true;
				FormatRegister(output, indexReg);
				if (flag2)
				{
					output.AppendNotNull(scaleNumbers[scale]);
				}
			}
			if (flag)
			{
				if (flag4)
				{
					if ((symbol.Flags & SymbolFlags.Signed) != 0)
					{
						output.Append('-');
					}
					else
					{
						output.Append('+');
					}
				}
				else if ((symbol.Flags & SymbolFlags.Signed) != 0)
				{
					output.Append('-');
				}
				WriteSymbol(output, address, in symbol, writeMinusIfSigned: false);
			}
			else if (!flag4 || (displSize != 0 && displ != 0L))
			{
				if (flag4)
				{
					switch (addrSize)
					{
					case 8:
						if (displ < 0)
						{
							displ = -displ;
							output.Append('-');
						}
						else
						{
							output.Append('+');
						}
						break;
					case 4:
						if ((int)displ < 0)
						{
							displ = (uint)(-(int)displ);
							output.Append('-');
						}
						else
						{
							output.Append('+');
						}
						break;
					default:
						if ((short)displ < 0)
						{
							displ = (ushort)(-(short)displ);
							output.Append('-');
						}
						else
						{
							output.Append('+');
						}
						break;
					}
				}
				FormatNumber(output, (ulong)displ);
			}
			output.Append(']');
			if (instruction.IsMvexEvictionHint)
			{
				output.AppendNotNull("{eh}");
			}
		}
	}
	public sealed class FastFormatterOptions
	{
		private enum Flags1 : uint
		{
			None = 0u,
			SpaceAfterOperandSeparator = 1u,
			RipRelativeAddresses = 2u,
			UsePseudoOps = 4u,
			ShowSymbolAddress = 8u,
			AlwaysShowSegmentRegister = 0x10u,
			AlwaysShowMemorySize = 0x20u,
			UppercaseHex = 0x40u,
			UseHexPrefix = 0x80u
		}

		private Flags1 flags1;

		public bool SpaceAfterOperandSeparator
		{
			get
			{
				return (flags1 & Flags1.SpaceAfterOperandSeparator) != 0;
			}
			set
			{
				if (value)
				{
					flags1 |= Flags1.SpaceAfterOperandSeparator;
				}
				else
				{
					flags1 &= (Flags1)4294967294u;
				}
			}
		}

		public bool RipRelativeAddresses
		{
			get
			{
				return (flags1 & Flags1.RipRelativeAddresses) != 0;
			}
			set
			{
				if (value)
				{
					flags1 |= Flags1.RipRelativeAddresses;
				}
				else
				{
					flags1 &= (Flags1)4294967293u;
				}
			}
		}

		public bool UsePseudoOps
		{
			get
			{
				return (flags1 & Flags1.UsePseudoOps) != 0;
			}
			set
			{
				if (value)
				{
					flags1 |= Flags1.UsePseudoOps;
				}
				else
				{
					flags1 &= (Flags1)4294967291u;
				}
			}
		}

		public bool ShowSymbolAddress
		{
			get
			{
				return (flags1 & Flags1.ShowSymbolAddress) != 0;
			}
			set
			{
				if (value)
				{
					flags1 |= Flags1.ShowSymbolAddress;
				}
				else
				{
					flags1 &= (Flags1)4294967287u;
				}
			}
		}

		public bool AlwaysShowSegmentRegister
		{
			get
			{
				return (flags1 & Flags1.AlwaysShowSegmentRegister) != 0;
			}
			set
			{
				if (value)
				{
					flags1 |= Flags1.AlwaysShowSegmentRegister;
				}
				else
				{
					flags1 &= (Flags1)4294967279u;
				}
			}
		}

		public bool AlwaysShowMemorySize
		{
			get
			{
				return (flags1 & Flags1.AlwaysShowMemorySize) != 0;
			}
			set
			{
				if (value)
				{
					flags1 |= Flags1.AlwaysShowMemorySize;
				}
				else
				{
					flags1 &= (Flags1)4294967263u;
				}
			}
		}

		public bool UppercaseHex
		{
			get
			{
				return (flags1 & Flags1.UppercaseHex) != 0;
			}
			set
			{
				if (value)
				{
					flags1 |= Flags1.UppercaseHex;
				}
				else
				{
					flags1 &= (Flags1)4294967231u;
				}
			}
		}

		public bool UseHexPrefix
		{
			get
			{
				return (flags1 & Flags1.UseHexPrefix) != 0;
			}
			set
			{
				if (value)
				{
					flags1 |= Flags1.UseHexPrefix;
				}
				else
				{
					flags1 &= (Flags1)4294967167u;
				}
			}
		}

		internal FastFormatterOptions()
		{
			flags1 = (Flags1)68u;
		}
	}
	public sealed class FastStringOutput
	{
		private char[] buffer;

		private int bufferLen;

		public int Length => bufferLen;

		public FastStringOutput()
		{
			buffer = new char[64];
		}

		public FastStringOutput(int capacity)
		{
			buffer = new char[capacity];
		}

		public void Append(char c)
		{
			char[] array = buffer;
			int num = bufferLen;
			if ((uint)num >= (uint)array.Length)
			{
				Resize(1);
				array = buffer;
			}
			array[num] = c;
			bufferLen = num + 1;
		}

		public void Append(string? value)
		{
			if (value != null)
			{
				AppendNotNull(value);
			}
		}

		internal void AppendNotNull(string value)
		{
			char[] array = buffer;
			int num = bufferLen;
			if ((uint)num + value.Length > (uint)array.Length)
			{
				Resize(value.Length);
				array = buffer;
			}
			for (int i = 0; i < value.Length; i++)
			{
				array[num] = value[i];
				num++;
			}
			bufferLen = num;
		}

		[MethodImpl(MethodImplOptions.NoInlining)]
		private void Resize(int extraCount)
		{
			int num = buffer.Length;
			int newSize = checked(Math.Max(num * 2, num + extraCount));
			Array.Resize(ref buffer, newSize);
		}

		public ReadOnlySpan<char> AsSpan()
		{
			return new ReadOnlySpan<char>(buffer, 0, bufferLen);
		}

		public void CopyTo(char[] array, int arrayIndex)
		{
			Array.Copy(buffer, 0, array, arrayIndex, bufferLen);
		}

		public void Clear()
		{
			bufferLen = 0;
		}

		public override string ToString()
		{
			return new string(buffer, 0, bufferLen);
		}
	}
	public enum FlowControl
	{
		Next,
		UnconditionalBranch,
		IndirectBranch,
		ConditionalBranch,
		Return,
		Call,
		IndirectCall,
		Interrupt,
		XbeginXabortXend,
		Exception
	}
	public abstract class Formatter
	{
		public abstract FormatterOptions Options { get; }

		public void FormatMnemonic(in Instruction instruction, FormatterOutput output)
		{
			FormatMnemonic(in instruction, output, FormatMnemonicOptions.None);
		}

		public abstract void FormatMnemonic(in Instruction instruction, FormatterOutput output, FormatMnemonicOptions options);

		public abstract int GetOperandCount(in Instruction instruction);

		public abstract bool TryGetOpAccess(in Instruction instruction, int operand, out OpAccess access);

		public abstract int GetInstructionOperand(in Instruction instruction, int operand);

		public abstract int GetFormatterOperand(in Instruction instruction, int instructionOperand);

		public abstract void FormatOperand(in Instruction instruction, FormatterOutput output, int operand);

		public abstract void FormatOperandSeparator(in Instruction instruction, FormatterOutput output);

		public abstract void FormatAllOperands(in Instruction instruction, FormatterOutput output);

		public abstract void Format(in Instruction instruction, FormatterOutput output);

		public abstract string Format(Register register);

		public string FormatInt8(sbyte value)
		{
			NumberFormattingOptions numberOptions = NumberFormattingOptions.CreateImmediateInternal(Options);
			return FormatInt8(value, in numberOptions);
		}

		public string FormatInt16(short value)
		{
			NumberFormattingOptions numberOptions = NumberFormattingOptions.CreateImmediateInternal(Options);
			return FormatInt16(value, in numberOptions);
		}

		public string FormatInt32(int value)
		{
			NumberFormattingOptions numberOptions = NumberFormattingOptions.CreateImmediateInternal(Options);
			return FormatInt32(value, in numberOptions);
		}

		public string FormatInt64(long value)
		{
			NumberFormattingOptions numberOptions = NumberFormattingOptions.CreateImmediateInternal(Options);
			return FormatInt64(value, in numberOptions);
		}

		public string FormatUInt8(byte value)
		{
			NumberFormattingOptions numberOptions = NumberFormattingOptions.CreateImmediateInternal(Options);
			return FormatUInt8(value, in numberOptions);
		}

		public string FormatUInt16(ushort value)
		{
			NumberFormattingOptions numberOptions = NumberFormattingOptions.CreateImmediateInternal(Options);
			return FormatUInt16(value, in numberOptions);
		}

		public string FormatUInt32(uint value)
		{
			NumberFormattingOptions numberOptions = NumberFormattingOptions.CreateImmediateInternal(Options);
			return FormatUInt32(value, in numberOptions);
		}

		public string FormatUInt64(ulong value)
		{
			NumberFormattingOptions numberOptions = NumberFormattingOptions.CreateImmediateInternal(Options);
			return FormatUInt64(value, in numberOptions);
		}

		public abstract string FormatInt8(sbyte value, in NumberFormattingOptions numberOptions);

		public abstract string FormatInt16(short value, in NumberFormattingOptions numberOptions);

		public abstract string FormatInt32(int value, in NumberFormattingOptions numberOptions);

		public abstract string FormatInt64(long value, in NumberFormattingOptions numberOptions);

		public abstract string FormatUInt8(byte value, in NumberFormattingOptions numberOptions);

		public abstract string FormatUInt16(ushort value, in NumberFormattingOptions numberOptions);

		public abstract string FormatUInt32(uint value, in NumberFormattingOptions numberOptions);

		public abstract string FormatUInt64(ulong value, in NumberFormattingOptions numberOptions);
	}
	[Flags]
	public enum FormatMnemonicOptions : uint
	{
		None = 0u,
		NoPrefixes = 1u,
		NoMnemonic = 2u
	}
	internal static class FormatterConstants
	{
		private static readonly FormatterString[] cmpps_pseudo_ops;

		private static readonly FormatterString[] vcmpps_pseudo_ops;

		private static readonly FormatterString[] cmppd_pseudo_ops;

		private static readonly FormatterString[] vcmppd_pseudo_ops;

		private static readonly FormatterString[] cmpss_pseudo_ops;

		private static readonly FormatterString[] vcmpss_pseudo_ops;

		private static readonly FormatterString[] cmpsd_pseudo_ops;

		private static readonly FormatterString[] vcmpsd_pseudo_ops;

		private static readonly FormatterString[] vcmpph_pseudo_ops;

		private static readonly FormatterString[] vcmpsh_pseudo_ops;

		private static readonly FormatterString[] vcmpps8_pseudo_ops;

		private static readonly FormatterString[] vcmppd8_pseudo_ops;

		private static readonly FormatterString[] vpcmpd6_pseudo_ops;

		private static readonly FormatterString[] vpcmpud6_pseudo_ops;

		private static readonly FormatterString[] pclmulqdq_pseudo_ops;

		private static readonly FormatterString[] vpclmulqdq_pseudo_ops;

		private static readonly FormatterString[] vpcomb_pseudo_ops;

		private static readonly FormatterString[] vpcomw_pseudo_ops;

		private static readonly FormatterString[] vpcomd_pseudo_ops;

		private static readonly FormatterString[] vpcomq_pseudo_ops;

		private static readonly FormatterString[] vpcomub_pseudo_ops;

		private static readonly FormatterString[] vpcomuw_pseudo_ops;

		private static readonly FormatterString[] vpcomud_pseudo_ops;

		private static readonly FormatterString[] vpcomuq_pseudo_ops;

		private static readonly FormatterString[] vpcmpb_pseudo_ops;

		private static readonly FormatterString[] vpcmpw_pseudo_ops;

		private static readonly FormatterString[] vpcmpd_pseudo_ops;

		private static readonly FormatterString[] vpcmpq_pseudo_ops;

		private static readonly FormatterString[] vpcmpub_pseudo_ops;

		private static readonly FormatterString[] vpcmpuw_pseudo_ops;

		private static readonly FormatterString[] vpcmpud_pseudo_ops;

		private static readonly FormatterString[] vpcmpuq_pseudo_ops;

		public static FormatterString[] GetPseudoOps(PseudoOpsKind kind)
		{
			return kind switch
			{
				PseudoOpsKind.cmpps => cmpps_pseudo_ops, 
				PseudoOpsKind.vcmpps => vcmpps_pseudo_ops, 
				PseudoOpsKind.cmppd => cmppd_pseudo_ops, 
				PseudoOpsKind.vcmppd => vcmppd_pseudo_ops, 
				PseudoOpsKind.cmpss => cmpss_pseudo_ops, 
				PseudoOpsKind.vcmpss => vcmpss_pseudo_ops, 
				PseudoOpsKind.cmpsd => cmpsd_pseudo_ops, 
				PseudoOpsKind.vcmpsd => vcmpsd_pseudo_ops, 
				PseudoOpsKind.pclmulqdq => pclmulqdq_pseudo_ops, 
				PseudoOpsKind.vpclmulqdq => vpclmulqdq_pseudo_ops, 
				PseudoOpsKind.vpcomb => vpcomb_pseudo_ops, 
				PseudoOpsKind.vpcomw => vpcomw_pseudo_ops, 
				PseudoOpsKind.vpcomd => vpcomd_pseudo_ops, 
				PseudoOpsKind.vpcomq => vpcomq_pseudo_ops, 
				PseudoOpsKind.vpcomub => vpcomub_pseudo_ops, 
				PseudoOpsKind.vpcomuw => vpcomuw_pseudo_ops, 
				PseudoOpsKind.vpcomud => vpcomud_pseudo_ops, 
				PseudoOpsKind.vpcomuq => vpcomuq_pseudo_ops, 
				PseudoOpsKind.vpcmpb => vpcmpb_pseudo_ops, 
				PseudoOpsKind.vpcmpw => vpcmpw_pseudo_ops, 
				PseudoOpsKind.vpcmpd => vpcmpd_pseudo_ops, 
				PseudoOpsKind.vpcmpq => vpcmpq_pseudo_ops, 
				PseudoOpsKind.vpcmpub => vpcmpub_pseudo_ops, 
				PseudoOpsKind.vpcmpuw => vpcmpuw_pseudo_ops, 
				PseudoOpsKind.vpcmpud => vpcmpud_pseudo_ops, 
				PseudoOpsKind.vpcmpuq => vpcmpuq_pseudo_ops, 
				PseudoOpsKind.vcmpph => vcmpph_pseudo_ops, 
				PseudoOpsKind.vcmpsh => vcmpsh_pseudo_ops, 
				PseudoOpsKind.vcmpps8 => vcmpps8_pseudo_ops, 
				PseudoOpsKind.vcmppd8 => vcmppd8_pseudo_ops, 
				PseudoOpsKind.vpcmpd6 => vpcmpd6_pseudo_ops, 
				PseudoOpsKind.vpcmpud6 => vpcmpud6_pseudo_ops, 
				_ => throw new ArgumentOutOfRangeException("kind"), 
			};
		}

		static FormatterConstants()
		{
			pclmulqdq_pseudo_ops = new FormatterString[4]
			{
				new FormatterString("pclmullqlqdq"),
				new FormatterString("pclmulhqlqdq"),
				new FormatterString("pclmullqhqdq"),
				new FormatterString("pclmulhqhqdq")
			};
			vpclmulqdq_pseudo_ops = new FormatterString[4]
			{
				new FormatterString("vpclmullqlqdq"),
				new FormatterString("vpclmulhqlqdq"),
				new FormatterString("vpclmullqhqdq"),
				new FormatterString("vpclmulhqhqdq")
			};
			string[] cc = new string[32]
			{
				"eq", "lt", "le", "unord", "neq", "nlt", "nle", "ord", "eq_uq", "nge",
				"ngt", "false", "neq_oq", "ge", "gt", "true", "eq_os", "lt_oq", "le_oq", "unord_s",
				"neq_us", "nlt_uq", "nle_uq", "ord_s", "eq_us", "nge_uq", "ngt_uq", "false_os", "neq_os", "ge_oq",
				"gt_oq", "true_us"
			};
			cmpps_pseudo_ops = Create(cc, 8, "cmp", "ps");
			vcmpps_pseudo_ops = Create(cc, 32, "vcmp", "ps");
			cmppd_pseudo_ops = Create(cc, 8, "cmp", "pd");
			vcmppd_pseudo_ops = Create(cc, 32, "vcmp", "pd");
			cmpss_pseudo_ops = Create(cc, 8, "cmp", "ss");
			vcmpss_pseudo_ops = Create(cc, 32, "vcmp", "ss");
			cmpsd_pseudo_ops = Create(cc, 8, "cmp", "sd");
			vcmpsd_pseudo_ops = Create(cc, 32, "vcmp", "sd");
			vcmpph_pseudo_ops = Create(cc, 32, "vcmp", "ph");
			vcmpsh_pseudo_ops = Create(cc, 32, "vcmp", "sh");
			vcmpps8_pseudo_ops = Create(cc, 8, "vcmp", "ps");
			vcmppd8_pseudo_ops = Create(cc, 8, "vcmp", "pd");
			string[] cc2 = new string[8] { "eq", "lt", "le", "??", "neq", "nlt", "nle", "???" };
			vpcmpd6_pseudo_ops = Create(cc2, 8, "vpcmp", "d");
			vpcmpud6_pseudo_ops = Create(cc2, 8, "vpcmp", "ud");
			string[] cc3 = new string[8] { "lt", "le", "gt", "ge", "eq", "neq", "false", "true" };
			vpcomb_pseudo_ops = Create(cc3, 8, "vpcom", "b");
			vpcomw_pseudo_ops = Create(cc3, 8, "vpcom", "w");
			vpcomd_pseudo_ops = Create(cc3, 8, "vpcom", "d");
			vpcomq_pseudo_ops = Create(cc3, 8, "vpcom", "q");
			vpcomub_pseudo_ops = Create(cc3, 8, "vpcom", "ub");
			vpcomuw_pseudo_ops = Create(cc3, 8, "vpcom", "uw");
			vpcomud_pseudo_ops = Create(cc3, 8, "vpcom", "ud");
			vpcomuq_pseudo_ops = Create(cc3, 8, "vpcom", "uq");
			string[] cc4 = new string[8] { "eq", "lt", "le", "false", "neq", "nlt", "nle", "true" };
			vpcmpb_pseudo_ops = Create(cc4, 8, "vpcmp", "b");
			vpcmpw_pseudo_ops = Create(cc4, 8, "vpcmp", "w");
			vpcmpd_pseudo_ops = Create(cc4, 8, "vpcmp", "d");
			vpcmpq_pseudo_ops = Create(cc4, 8, "vpcmp", "q");
			vpcmpub_pseudo_ops = Create(cc4, 8, "vpcmp", "ub");
			vpcmpuw_pseudo_ops = Create(cc4, 8, "vpcmp", "uw");
			vpcmpud_pseudo_ops = Create(cc4, 8, "vpcmp", "ud");
			vpcmpuq_pseudo_ops = Create(cc4, 8, "vpcmp", "uq");
		}

		private static FormatterString[] Create(string[] cc, int size, string prefix, string suffix)
		{
			FormatterString[] array = new FormatterString[size];
			for (int i = 0; i < array.Length; i++)
			{
				array[i] = new FormatterString(prefix + cc[i] + suffix);
			}
			return array;
		}
	}
	public sealed class FormatterOptions
	{
		[Flags]
		private enum Flags1 : uint
		{
			None = 0u,
			UppercasePrefixes = 1u,
			UppercaseMnemonics = 2u,
			UppercaseRegisters = 4u,
			UppercaseKeywords = 8u,
			UppercaseDecorators = 0x10u,
			UppercaseAll = 0x20u,
			SpaceAfterOperandSeparator = 0x40u,
			SpaceAfterMemoryBracket = 0x80u,
			SpaceBetweenMemoryAddOperators = 0x100u,
			SpaceBetweenMemoryMulOperators = 0x200u,
			ScaleBeforeIndex = 0x400u,
			AlwaysShowScale = 0x800u,
			AlwaysShowSegmentRegister = 0x1000u,
			ShowZeroDisplacements = 0x2000u,
			LeadingZeros = 0x4000u,
			UppercaseHex = 0x8000u,
			SmallHexNumbersInDecimal = 0x10000u,
			AddLeadingZeroToHexNumbers = 0x20000u,
			BranchLeadingZeros = 0x40000u,
			SignedImmediateOperands = 0x80000u,
			SignedMemoryDisplacements = 0x100000u,
			DisplacementLeadingZeros = 0x200000u,
			RipRelativeAddresses = 0x400000u,
			ShowBranchSize = 0x800000u,
			UsePseudoOps = 0x1000000u,
			ShowSymbolAddress = 0x2000000u,
			GasNakedRegisters = 0x4000000u,
			GasShowMnemonicSizeSuffix = 0x8000000u,
			GasSpaceAfterMemoryOperandComma = 0x10000000u,
			MasmAddDsPrefix32 = 0x20000000u,
			MasmSymbolDisplInBrackets = 0x40000000u,
			MasmDisplInBrackets = 0x80000000u
		}

		[Flags]
		private enum Flags2 : uint
		{
			None = 0u,
			NasmShowSignExtendedImmediateSize = 1u,
			PreferST0 = 2u,
			ShowUselessPrefixes = 4u
		}

		private Flags1 flags1;

		private Flags2 flags2;

		private NumberBase numberBase;

		private MemorySizeOptions memorySizeOptions;

		private CC_b cc_b;

		private CC_ae cc_ae;

		private CC_e cc_e;

		private CC_ne cc_ne;

		private CC_be cc_be;

		private CC_a cc_a;

		private CC_p cc_p;

		private CC_np cc_np;

		private CC_l cc_l;

		private CC_ge cc_ge;

		private CC_le cc_le;

		private CC_g cc_g;

		public bool UppercasePrefixes
		{
			get
			{
				return (flags1 & Flags1.UppercasePrefixes) != 0;
			}
			set
			{
				if (value)
				{
					flags1 |= Flags1.UppercasePrefixes;
				}
				else
				{
					flags1 &= ~Flags1.UppercasePrefixes;
				}
			}
		}

		public bool UppercaseMnemonics
		{
			get
			{
				return (flags1 & Flags1.UppercaseMnemonics) != 0;
			}
			set
			{
				if (value)
				{
					flags1 |= Flags1.UppercaseMnemonics;
				}
				else
				{
					flags1 &= ~Flags1.UppercaseMnemonics;
				}
			}
		}

		public bool UppercaseRegisters
		{
			get
			{
				return (flags1 & Flags1.UppercaseRegisters) != 0;
			}
			set
			{
				if (value)
				{
					flags1 |= Flags1.UppercaseRegisters;
				}
				else
				{
					flags1 &= ~Flags1.UppercaseRegisters;
				}
			}
		}

		public bool UppercaseKeywords
		{
			get
			{
				return (flags1 & Flags1.UppercaseKeywords) != 0;
			}
			set
			{
				if (value)
				{
					flags1 |= Flags1.UppercaseKeywords;
				}
				else
				{
					flags1 &= ~Flags1.UppercaseKeywords;
				}
			}
		}

		public bool UppercaseDecorators
		{
			get
			{
				return (flags1 & Flags1.UppercaseDecorators) != 0;
			}
			set
			{
				if (value)
				{
					flags1 |= Flags1.UppercaseDecorators;
				}
				else
				{
					flags1 &= ~Flags1.UppercaseDecorators;
				}
			}
		}

		public bool UppercaseAll
		{
			get
			{
				return (flags1 & Flags1.UppercaseAll) != 0;
			}
			set
			{
				if (value)
				{
					flags1 |= Flags1.UppercaseAll;
				}
				else
				{
					flags1 &= ~Flags1.UppercaseAll;
				}
			}
		}

		public int FirstOperandCharIndex { get; set; }

		public int TabSize { get; set; }

		public bool SpaceAfterOperandSeparator
		{
			get
			{
				return (flags1 & Flags1.SpaceAfterOperandSeparator) != 0;
			}
			set
			{
				if (value)
				{
					flags1 |= Flags1.SpaceAfterOperandSeparator;
				}
				else
				{
					flags1 &= ~Flags1.SpaceAfterOperandSeparator;
				}
			}
		}

		public bool SpaceAfterMemoryBracket
		{
			get
			{
				return (flags1 & Flags1.SpaceAfterMemoryBracket) != 0;
			}
			set
			{
				if (value)
				{
					flags1 |= Flags1.SpaceAfterMemoryBracket;
				}
				else
				{
					flags1 &= ~Flags1.SpaceAfterMemoryBracket;
				}
			}
		}

		public bool SpaceBetweenMemoryAddOperators
		{
			get
			{
				return (flags1 & Flags1.SpaceBetweenMemoryAddOperators) != 0;
			}
			set
			{
				if (value)
				{
					flags1 |= Flags1.SpaceBetweenMemoryAddOperators;
				}
				else
				{
					flags1 &= ~Flags1.SpaceBetweenMemoryAddOperators;
				}
			}
		}

		public bool SpaceBetweenMemoryMulOperators
		{
			get
			{
				return (flags1 & Flags1.SpaceBetweenMemoryMulOperators) != 0;
			}
			set
			{
				if (value)
				{
					flags1 |= Flags1.SpaceBetweenMemoryMulOperators;
				}
				else
				{
					flags1 &= ~Flags1.SpaceBetweenMemoryMulOperators;
				}
			}
		}

		public bool ScaleBeforeIndex
		{
			get
			{
				return (flags1 & Flags1.ScaleBeforeIndex) != 0;
			}
			set
			{
				if (value)
				{
					flags1 |= Flags1.ScaleBeforeIndex;
				}
				else
				{
					flags1 &= ~Flags1.ScaleBeforeIndex;
				}
			}
		}

		public bool AlwaysShowScale
		{
			get
			{
				return (flags1 & Flags1.AlwaysShowScale) != 0;
			}
			set
			{
				if (value)
				{
					flags1 |= Flags1.AlwaysShowScale;
				}
				else
				{
					flags1 &= ~Flags1.AlwaysShowScale;
				}
			}
		}

		public bool AlwaysShowSegmentRegister
		{
			get
			{
				return (flags1 & Flags1.AlwaysShowSegmentRegister) != 0;
			}
			set
			{
				if (value)
				{
					flags1 |= Flags1.AlwaysShowSegmentRegister;
				}
				else
				{
					flags1 &= ~Flags1.AlwaysShowSegmentRegister;
				}
			}
		}

		public bool ShowZeroDisplacements
		{
			get
			{
				return (flags1 & Flags1.ShowZeroDisplacements) != 0;
			}
			set
			{
				if (value)
				{
					flags1 |= Flags1.ShowZeroDisplacements;
				}
				else
				{
					flags1 &= ~Flags1.ShowZeroDisplacements;
				}
			}
		}

		public string? HexPrefix { get; set; }

		public string? HexSuffix { get; set; }

		public int HexDigitGroupSize { get; set; } = 4;


		public string? DecimalPrefix { get; set; }

		public string? DecimalSuffix { get; set; }

		public int DecimalDigitGroupSize { get; set; } = 3;


		public string? OctalPrefix { get; set; }

		public string? OctalSuffix { get; set; }

		public int OctalDigitGroupSize { get; set; } = 4;


		public string? BinaryPrefix { get; set; }

		public string? BinarySuffix { get; set; }

		public int BinaryDigitGroupSize { get; set; } = 4;


		public string? DigitSeparator { get; set; }

		public bool LeadingZeros
		{
			get
			{
				return (flags1 & Flags1.LeadingZeros) != 0;
			}
			set
			{
				if (value)
				{
					flags1 |= Flags1.LeadingZeros;
				}
				else
				{
					flags1 &= ~Flags1.LeadingZeros;
				}
			}
		}

		[EditorBrowsable(EditorBrowsableState.Never)]
		public bool LeadingZeroes
		{
			get
			{
				return LeadingZeros;
			}
			set
			{
				LeadingZeros = value;
			}
		}

		public bool UppercaseHex
		{
			get
			{
				return (flags1 & Flags1.UppercaseHex) != 0;
			}
			set
			{
				if (value)
				{
					flags1 |= Flags1.UppercaseHex;
				}
				else
				{
					flags1 &= ~Flags1.UppercaseHex;
				}
			}
		}

		public bool SmallHexNumbersInDecimal
		{
			get
			{
				return (flags1 & Flags1.SmallHexNumbersInDecimal) != 0;
			}
			set
			{
				if (value)
				{
					flags1 |= Flags1.SmallHexNumbersInDecimal;
				}
				else
				{
					flags1 &= ~Flags1.SmallHexNumbersInDecimal;
				}
			}
		}

		public bool AddLeadingZeroToHexNumbers
		{
			get
			{
				return (flags1 & Flags1.AddLeadingZeroToHexNumbers) != 0;
			}
			set
			{
				if (value)
				{
					flags1 |= Flags1.AddLeadingZeroToHexNumbers;
				}
				else
				{
					flags1 &= ~Flags1.AddLeadingZeroToHexNumbers;
				}
			}
		}

		public NumberBase NumberBase
		{
			get
			{
				return numberBase;
			}
			set
			{
				if ((uint)value >= 4u)
				{
					ThrowHelper.ThrowArgumentOutOfRangeException_value();
				}
				numberBase = value;
			}
		}

		public bool BranchLeadingZeros
		{
			get
			{
				return (flags1 & Flags1.BranchLeadingZeros) != 0;
			}
			set
			{
				if (value)
				{
					flags1 |= Flags1.BranchLeadingZeros;
				}
				else
				{
					flags1 &= ~Flags1.BranchLeadingZeros;
				}
			}
		}

		[EditorBrowsable(EditorBrowsableState.Never)]
		public bool BranchLeadingZeroes
		{
			get
			{
				return BranchLeadingZeros;
			}
			set
			{
				BranchLeadingZeros = value;
			}
		}

		public bool SignedImmediateOperands
		{
			get
			{
				return (flags1 & Flags1.SignedImmediateOperands) != 0;
			}
			set
			{
				if (value)
				{
					flags1 |= Flags1.SignedImmediateOperands;
				}
				else
				{
					flags1 &= ~Flags1.SignedImmediateOperands;
				}
			}
		}

		public bool SignedMemoryDisplacements
		{
			get
			{
				return (flags1 & Flags1.SignedMemoryDisplacements) != 0;
			}
			set
			{
				if (value)
				{
					flags1 |= Flags1.SignedMemoryDisplacements;
				}
				else
				{
					flags1 &= ~Flags1.SignedMemoryDisplacements;
				}
			}
		}

		public bool DisplacementLeadingZeros
		{
			get
			{
				return (flags1 & Flags1.DisplacementLeadingZeros) != 0;
			}
			set
			{
				if (value)
				{
					flags1 |= Flags1.DisplacementLeadingZeros;
				}
				else
				{
					flags1 &= ~Flags1.DisplacementLeadingZeros;
				}
			}
		}

		[EditorBrowsable(EditorBrowsableState.Never)]
		public bool DisplacementLeadingZeroes
		{
			get
			{
				return DisplacementLeadingZeros;
			}
			set
			{
				DisplacementLeadingZeros = value;
			}
		}

		public MemorySizeOptions MemorySizeOptions
		{
			get
			{
				return memorySizeOptions;
			}
			set
			{
				if ((uint)value >= 4u)
				{
					ThrowHelper.ThrowArgumentOutOfRangeException_value();
				}
				memorySizeOptions = value;
			}
		}

		public bool RipRelativeAddresses
		{
			get
			{
				return (flags1 & Flags1.RipRelativeAddresses) != 0;
			}
			set
			{
				if (value)
				{
					flags1 |= Flags1.RipRelativeAddresses;
				}
				else
				{
					flags1 &= ~Flags1.RipRelativeAddresses;
				}
			}
		}

		public bool ShowBranchSize
		{
			get
			{
				return (flags1 & Flags1.ShowBranchSize) != 0;
			}
			set
			{
				if (value)
				{
					flags1 |= Flags1.ShowBranchSize;
				}
				else
				{
					flags1 &= ~Flags1.ShowBranchSize;
				}
			}
		}

		public bool UsePseudoOps
		{
			get
			{
				return (flags1 & Flags1.UsePseudoOps) != 0;
			}
			set
			{
				if (value)
				{
					flags1 |= Flags1.UsePseudoOps;
				}
				else
				{
					flags1 &= ~Flags1.UsePseudoOps;
				}
			}
		}

		public bool ShowSymbolAddress
		{
			get
			{
				return (flags1 & Flags1.ShowSymbolAddress) != 0;
			}
			set
			{
				if (value)
				{
					flags1 |= Flags1.ShowSymbolAddress;
				}
				else
				{
					flags1 &= ~Flags1.ShowSymbolAddress;
				}
			}
		}

		public bool GasNakedRegisters
		{
			get
			{
				return (flags1 & Flags1.GasNakedRegisters) != 0;
			}
			set
			{
				if (value)
				{
					flags1 |= Flags1.GasNakedRegisters;
				}
				else
				{
					flags1 &= ~Flags1.GasNakedRegisters;
				}
			}
		}

		public bool GasShowMnemonicSizeSuffix
		{
			get
			{
				return (flags1 & Flags1.GasShowMnemonicSizeSuffix) != 0;
			}
			set
			{
				if (value)
				{
					flags1 |= Flags1.GasShowMnemonicSizeSuffix;
				}
				else
				{
					flags1 &= ~Flags1.GasShowMnemonicSizeSuffix;
				}
			}
		}

		public bool GasSpaceAfterMemoryOperandComma
		{
			get
			{
				return (flags1 & Flags1.GasSpaceAfterMemoryOperandComma) != 0;
			}
			set
			{
				if (value)
				{
					flags1 |= Flags1.GasSpaceAfterMemoryOperandComma;
				}
				else
				{
					flags1 &= ~Flags1.GasSpaceAfterMemoryOperandComma;
				}
			}
		}

		public bool MasmAddDsPrefix32
		{
			get
			{
				return (flags1 & Flags1.MasmAddDsPrefix32) != 0;
			}
			set
			{
				if (value)
				{
					flags1 |= Flags1.MasmAddDsPrefix32;
				}
				else
				{
					flags1 &= ~Flags1.MasmAddDsPrefix32;
				}
			}
		}

		public bool MasmSymbolDisplInBrackets
		{
			get
			{
				return (flags1 & Flags1.MasmSymbolDisplInBrackets) != 0;
			}
			set
			{
				if (value)
				{
					flags1 |= Flags1.MasmSymbolDisplInBrackets;
				}
				else
				{
					flags1 &= ~Flags1.MasmSymbolDisplInBrackets;
				}
			}
		}

		public bool MasmDisplInBrackets
		{
			get
			{
				return ((uint)flags1 & 0x80000000u) != 0;
			}
			set
			{
				if (value)
				{
					flags1 |= Flags1.MasmDisplInBrackets;
				}
				else
				{
					flags1 &= ~Flags1.MasmDisplInBrackets;
				}
			}
		}

		public bool NasmShowSignExtendedImmediateSize
		{
			get
			{
				return (flags2 & Flags2.NasmShowSignExtendedImmediateSize) != 0;
			}
			set
			{
				if (value)
				{
					flags2 |= Flags2.NasmShowSignExtendedImmediateSize;
				}
				else
				{
					flags2 &= ~Flags2.NasmShowSignExtendedImmediateSize;
				}
			}
		}

		public bool PreferST0
		{
			get
			{
				return (flags2 & Flags2.PreferST0) != 0;
			}
			set
			{
				if (value)
				{
					flags2 |= Flags2.PreferST0;
				}
				else
				{
					flags2 &= ~Flags2.PreferST0;
				}
			}
		}

		public bool ShowUselessPrefixes
		{
			get
			{
				return (flags2 & Flags2.ShowUselessPrefixes) != 0;
			}
			set
			{
				if (value)
				{
					flags2 |= Flags2.ShowUselessPrefixes;
				}
				else
				{
					flags2 &= ~Flags2.ShowUselessPrefixes;
				}
			}
		}

		public CC_b CC_b
		{
			get
			{
				return cc_b;
			}
			set
			{
				if (value >= (CC_b)3)
				{
					ThrowHelper.ThrowArgumentOutOfRangeException_value();
				}
				cc_b = value;
			}
		}

		public CC_ae CC_ae
		{
			get
			{
				return cc_ae;
			}
			set
			{
				if (value >= (CC_ae)3)
				{
					ThrowHelper.ThrowArgumentOutOfRangeException_value();
				}
				cc_ae = value;
			}
		}

		public CC_e CC_e
		{
			get
			{
				return cc_e;
			}
			set
			{
				if (value >= (CC_e)2)
				{
					ThrowHelper.ThrowArgumentOutOfRangeException_value();
				}
				cc_e = value;
			}
		}

		public CC_ne CC_ne
		{
			get
			{
				return cc_ne;
			}
			set
			{
				if (value >= (CC_ne)2)
				{
					ThrowHelper.ThrowArgumentOutOfRangeException_value();
				}
				cc_ne = value;
			}
		}

		public CC_be CC_be
		{
			get
			{
				return cc_be;
			}
			set
			{
				if (value >= (CC_be)2)
				{
					ThrowHelper.ThrowArgumentOutOfRangeException_value();
				}
				cc_be = value;
			}
		}

		public CC_a CC_a
		{
			get
			{
				return cc_a;
			}
			set
			{
				if (value >= (CC_a)2)
				{
					ThrowHelper.ThrowArgumentOutOfRangeException_value();
				}
				cc_a = value;
			}
		}

		public CC_p CC_p
		{
			get
			{
				return cc_p;
			}
			set
			{
				if (value >= (CC_p)2)
				{
					ThrowHelper.ThrowArgumentOutOfRangeException_value();
				}
				cc_p = value;
			}
		}

		public CC_np CC_np
		{
			get
			{
				return cc_np;
			}
			set
			{
				if (value >= (CC_np)2)
				{
					ThrowHelper.ThrowArgumentOutOfRangeException_value();
				}
				cc_np = value;
			}
		}

		public CC_l CC_l
		{
			get
			{
				return cc_l;
			}
			set
			{
				if (value >= (CC_l)2)
				{
					ThrowHelper.ThrowArgumentOutOfRangeException_value();
				}
				cc_l = value;
			}
		}

		public CC_ge CC_ge
		{
			get
			{
				return cc_ge;
			}
			set
			{
				if (value >= (CC_ge)2)
				{
					ThrowHelper.ThrowArgumentOutOfRangeException_value();
				}
				cc_ge = value;
			}
		}

		public CC_le CC_le
		{
			get
			{
				return cc_le;
			}
			set
			{
				if (value >= (CC_le)2)
				{
					ThrowHelper.ThrowArgumentOutOfRangeException_value();
				}
				cc_le = value;
			}
		}

		public CC_g CC_g
		{
			get
			{
				return cc_g;
			}
			set
			{
				if (value >= (CC_g)2)
				{
					ThrowHelper.ThrowArgumentOutOfRangeException_value();
				}
				cc_g = value;
			}
		}

		public FormatterOptions()
		{
			flags1 = Flags1.UppercaseHex | Flags1.SmallHexNumbersInDecimal | Flags1.AddLeadingZeroToHexNumbers | Flags1.BranchLeadingZeros | Flags1.SignedMemoryDisplacements | Flags1.ShowBranchSize | Flags1.UsePseudoOps | Flags1.MasmAddDsPrefix32 | Flags1.MasmSymbolDisplInBrackets | Flags1.MasmDisplInBrackets;
			flags2 = Flags2.None;
		}

		public static FormatterOptions CreateGas()
		{
			return new FormatterOptions
			{
				HexPrefix = "0x",
				OctalPrefix = "0",
				BinaryPrefix = "0b"
			};
		}

		public static FormatterOptions CreateIntel()
		{
			return new FormatterOptions
			{
				HexSuffix = "h",
				OctalSuffix = "o",
				BinarySuffix = "b"
			};
		}

		public static FormatterOptions CreateMasm()
		{
			return new FormatterOptions
			{
				HexSuffix = "h",
				OctalSuffix = "o",
				BinarySuffix = "b"
			};
		}

		public static FormatterOptions CreateNasm()
		{
			return new FormatterOptions
			{
				HexSuffix = "h",
				OctalSuffix = "o",
				BinarySuffix = "b"
			};
		}
	}
	public enum NumberBase
	{
		Hexadecimal,
		Decimal,
		Octal,
		Binary
	}
	public enum CC_b : byte
	{
		b,
		c,
		nae
	}
	public enum CC_ae : byte
	{
		ae,
		nb,
		nc
	}
	public enum CC_e : byte
	{
		e,
		z
	}
	public enum CC_ne : byte
	{
		ne,
		nz
	}
	public enum CC_be : byte
	{
		be,
		na
	}
	public enum CC_a : byte
	{
		a,
		nbe
	}
	public enum CC_p : byte
	{
		p,
		pe
	}
	public enum CC_np : byte
	{
		np,
		po
	}
	public enum CC_l : byte
	{
		l,
		nge
	}
	public enum CC_ge : byte
	{
		ge,
		nl
	}
	public enum CC_le : byte
	{
		le,
		ng
	}
	public enum CC_g : byte
	{
		g,
		nle
	}
	public abstract class FormatterOutput
	{
		public abstract void Write(string text, FormatterTextKind kind);

		public virtual void WritePrefix(in Instruction instruction, string text, PrefixKind prefix)
		{
			Write(text, FormatterTextKind.Prefix);
		}

		public virtual void WriteMnemonic(in Instruction instruction, string text)
		{
			Write(text, FormatterTextKind.Mnemonic);
		}

		public virtual void WriteNumber(in Instruction instruction, int operand, int instructionOperand, string text, ulong value, NumberKind numberKind, FormatterTextKind kind)
		{
			Write(text, kind);
		}

		public virtual void WriteDecorator(in Instruction instruction, int operand, int instructionOperand, string text, DecoratorKind decorator)
		{
			Write(text, FormatterTextKind.Decorator);
		}

		public virtual void WriteRegister(in Instruction instruction, int operand, int instructionOperand, string text, Register register)
		{
			Write(text, FormatterTextKind.Register);
		}

		public virtual void WriteSymbol(in Instruction instruction, int operand, int instructionOperand, ulong address, in SymbolResult symbol)
		{
			TextInfo text = symbol.Text;
			TextPart[] textArray = text.TextArray;
			if (textArray != null)
			{
				TextPart[] array = textArray;
				for (int i = 0; i < array.Length; i++)
				{
					TextPart textPart = array[i];
					Write(textPart.Text, textPart.Color);
				}
			}
			else
			{
				string text2 = text.Text.Text;
				if (text2 != null)
				{
					Write(text2, text.Text.Color);
				}
			}
		}

		internal void Write(in Instruction instruction, int operand, int instructionOperand, FormatterOptions options, in NumberFormatter numberFormatter, in NumberFormattingOptions numberOptions, ulong address, in SymbolResult symbol, bool showSymbolAddress)
		{
			Write(in instruction, operand, instructionOperand, options, in numberFormatter, in numberOptions, address, in symbol, showSymbolAddress, writeMinusIfSigned: true, spacesBetweenOp: false);
		}

		internal void Write(in Instruction instruction, int operand, int instructionOperand, FormatterOptions options, in NumberFormatter numberFormatter, in NumberFormattingOptions numberOptions, ulong address, in SymbolResult symbol, bool showSymbolAddress, bool writeMinusIfSigned, bool spacesBetweenOp)
		{
			long num = (long)(address - symbol.Address);
			if ((symbol.Flags & SymbolFlags.Signed) != 0)
			{
				if (writeMinusIfSigned)
				{
					Write("-", FormatterTextKind.Operator);
				}
				num = -num;
			}
			WriteSymbol(in instruction, operand, instructionOperand, address, in symbol);
			if (num != 0L)
			{
				if (spacesBetweenOp)
				{
					Write(" ", FormatterTextKind.Text);
				}
				ulong value = (ulong)num;
				NumberKind numberKind;
				if (num < 0)
				{
					Write("-", FormatterTextKind.Operator);
					num = -num;
					numberKind = ((num > 128) ? ((num <= 32768) ? NumberKind.Int16 : ((num > 2147483648u) ? NumberKind.Int64 : NumberKind.Int32)) : NumberKind.Int8);
				}
				else
				{
					Write("+", FormatterTextKind.Operator);
					numberKind = ((num > 127) ? ((num <= 32767) ? NumberKind.Int16 : ((num > int.MaxValue) ? NumberKind.Int64 : NumberKind.Int32)) : NumberKind.Int8);
				}
				if (spacesBetweenOp)
				{
					Write(" ", FormatterTextKind.Text);
				}
				string text = numberFormatter.FormatUInt64(options, in numberOptions, (ulong)num, leadingZeros: false);
				WriteNumber(in instruction, operand, instructionOperand, text, value, numberKind, FormatterTextKind.Number);
			}
			if (showSymbolAddress)
			{
				Write(" ", FormatterTextKind.Text);
				Write("(", FormatterTextKind.Punctuation);
				string text2;
				NumberKind numberKind;
				if (address <= 65535)
				{
					text2 = numberFormatter.FormatUInt16(options, in numberOptions, (ushort)address, leadingZeros: true);
					numberKind = NumberKind.UInt16;
				}
				else if (address <= uint.MaxValue)
				{
					text2 = numberFormatter.FormatUInt32(options, in numberOptions, (uint)address, leadingZeros: true);
					numberKind = NumberKind.UInt32;
				}
				else
				{
					text2 = numberFormatter.FormatUInt64(options, in numberOptions, address, leadingZeros: true);
					numberKind = NumberKind.UInt64;
				}
				WriteNumber(in instruction, operand, instructionOperand, text2, address, numberKind, FormatterTextKind.Number);
				Write(")", FormatterTextKind.Punctuation);
			}
		}
	}
	public enum PrefixKind
	{
		ES,
		CS,
		SS,
		DS,
		FS,
		GS,
		Lock,
		Rep,
		Repe,
		Repne,
		OperandSize,
		AddressSize,
		HintNotTaken,
		HintTaken,
		Bnd,
		Notrack,
		Xacquire,
		Xrelease
	}
	public enum DecoratorKind
	{
		Broadcast,
		RoundingControl,
		SuppressAllExceptions,
		ZeroingMasking,
		SwizzleMemConv,
		EvictionHint
	}
	public enum NumberKind
	{
		Int8,
		UInt8,
		Int16,
		UInt16,
		Int32,
		UInt32,
		Int64,
		UInt64
	}
	public enum FormatterTextKind
	{
		Text,
		Directive,
		Prefix,
		Mnemonic,
		Keyword,
		Operator,
		Punctuation,
		Number,
		Register,
		Decorator,
		SelectorValue,
		LabelAddress,
		FunctionAddress,
		Data,
		Label,
		Function
	}
	public sealed class GasFormatter : Formatter
	{
		private const string ImmediateValuePrefix = "$";

		private readonly FormatterOptions options;

		private readonly ISymbolResolver symbolResolver;

		private readonly IFormatterOptionsProvider optionsProvider;

		private readonly FormatterString[] allRegisters;

		private readonly FormatterString[] allRegistersNaked;

		private readonly Iced.Intel.GasFormatterInternal.InstrInfo[] instrInfos;

		private readonly FormatterString[] allMemorySizes;

		private readonly NumberFormatter numberFormatter;

		private readonly FormatterString[] opSizeStrings;

		private readonly FormatterString[] addrSizeStrings;

		private readonly string[] scaleNumbers;

		private readonly FormatterString[] mvexRegMemConsts32;

		private readonly FormatterString[] mvexRegMemConsts64;

		private static readonly FormatterString str_bnd = new FormatterString("bnd");

		private static readonly FormatterString str_dot_byte = new FormatterString(".byte");

		private static readonly FormatterString str_lock = new FormatterString("lock");

		private static readonly FormatterString str_notrack = new FormatterString("notrack");

		private static readonly FormatterString str_pn = new FormatterString("pn");

		private static readonly FormatterString str_pt = new FormatterString("pt");

		private static readonly FormatterString str_rep = new FormatterString("rep");

		private static readonly FormatterString[] str_repe = new FormatterString[2]
		{
			new FormatterString("repe"),
			new FormatterString("repz")
		};

		private static readonly FormatterString[] str_repne = new FormatterString[2]
		{
			new FormatterString("repne"),
			new FormatterString("repnz")
		};

		private static readonly FormatterString str_rex_w = new FormatterString("rex.w");

		private static readonly FormatterString str_rn_sae = new FormatterString("rn-sae");

		private static readonly FormatterString str_rd_sae = new FormatterString("rd-sae");

		private static readonly FormatterString str_ru_sae = new FormatterString("ru-sae");

		private static readonly FormatterString str_rz_sae = new FormatterString("rz-sae");

		private static readonly FormatterString str_sae = new FormatterString("sae");

		private static readonly FormatterString str_rn = new FormatterString("rn");

		private static readonly FormatterString str_rd = new FormatterString("rd");

		private static readonly FormatterString str_ru = new FormatterString("ru");

		private static readonly FormatterString str_rz = new FormatterString("rz");

		private static readonly FormatterString str_xacquire = new FormatterString("xacquire");

		private static readonly FormatterString str_xrelease = new FormatterString("xrelease");

		private static readonly FormatterString str_z = new FormatterString("z");

		private static readonly FormatterString[] s_opSizeStrings = new FormatterString[4]
		{
			new FormatterString(""),
			new FormatterString("data16"),
			new FormatterString("data32"),
			new FormatterString("rex.w")
		};

		private static readonly FormatterString[] s_addrSizeStrings = new FormatterString[4]
		{
			new FormatterString(""),
			new FormatterString("addr16"),
			new FormatterString("addr32"),
			new FormatterString("addr64")
		};

		private static readonly string[] s_scaleNumbers = new string[4] { "1", "2", "4", "8" };

		private static readonly FormatterString[] s_mvexRegMemConsts32 = new FormatterString[17]
		{
			new FormatterString(""),
			new FormatterString(""),
			new FormatterString("cdab"),
			new FormatterString("badc"),
			new FormatterString("dacb"),
			new FormatterString("aaaa"),
			new FormatterString("bbbb"),
			new FormatterString("cccc"),
			new FormatterString("dddd"),
			new FormatterString(""),
			new FormatterString("1to16"),
			new FormatterString("4to16"),
			new FormatterString("float16"),
			new FormatterString("uint8"),
			new FormatterString("sint8"),
			new FormatterString("uint16"),
			new FormatterString("sint16")
		};

		private static readonly FormatterString[] s_mvexRegMemConsts64 = new FormatterString[17]
		{
			new FormatterString(""),
			new FormatterString(""),
			new FormatterString("cdab"),
			new FormatterString("badc"),
			new FormatterString("dacb"),
			new FormatterString("aaaa"),
			new FormatterString("bbbb"),
			new FormatterString("cccc"),
			new FormatterString("dddd"),
			new FormatterString(""),
			new FormatterString("1to8"),
			new FormatterString("4to8"),
			new FormatterString("float16"),
			new FormatterString("uint8"),
			new FormatterString("sint8"),
			new FormatterString("uint16"),
			new FormatterString("sint16")
		};

		private static readonly FormatterString str_eh = new FormatterString("eh");

		public override FormatterOptions Options => options;

		private FormatterString[] AllRegisters
		{
			get
			{
				if (!options.GasNakedRegisters)
				{
					return allRegisters;
				}
				return allRegistersNaked;
			}
		}

		public GasFormatter()
			: this(null, null, null)
		{
		}

		public GasFormatter(ISymbolResolver? symbolResolver, IFormatterOptionsProvider? optionsProvider = null)
			: this(null, symbolResolver, optionsProvider)
		{
		}

		public GasFormatter(FormatterOptions? options, ISymbolResolver? symbolResolver = null, IFormatterOptionsProvider? optionsProvider = null)
		{
			this.options = options ?? FormatterOptions.CreateGas();
			this.symbolResolver = symbolResolver;
			this.optionsProvider = optionsProvider;
			allRegisters = Iced.Intel.GasFormatterInternal.Registers.AllRegisters;
			allRegistersNaked = Iced.Intel.GasFormatterInternal.Registers.AllRegistersNaked;
			instrInfos = Iced.Intel.GasFormatterInternal.InstrInfos.AllInfos;
			allMemorySizes = Iced.Intel.GasFormatterInternal.MemorySizes.AllMemorySizes;
			numberFormatter = new NumberFormatter(dummy: true);
			opSizeStrings = s_opSizeStrings;
			addrSizeStrings = s_addrSizeStrings;
			scaleNumbers = s_scaleNumbers;
			mvexRegMemConsts32 = s_mvexRegMemConsts32;
			mvexRegMemConsts64 = s_mvexRegMemConsts64;
		}

		public override void FormatMnemonic(in Instruction instruction, FormatterOutput output, FormatMnemonicOptions options)
		{
			instrInfos[(int)instruction.Code].GetOpInfo(this.options, in instruction, out var info);
			int column = 0;
			FormatMnemonic(in instruction, output, in info, ref column, options);
		}

		public override int GetOperandCount(in Instruction instruction)
		{
			instrInfos[(int)instruction.Code].GetOpInfo(options, in instruction, out var info);
			return info.OpCount;
		}

		public override bool TryGetOpAccess(in Instruction instruction, int operand, out OpAccess access)
		{
			instrInfos[(int)instruction.Code].GetOpInfo(options, in instruction, out var info);
			if ((uint)operand >= (uint)info.OpCount)
			{
				ThrowHelper.ThrowArgumentOutOfRangeException_operand();
			}
			return info.TryGetOpAccess(operand, out access);
		}

		public override int GetInstructionOperand(in Instruction instruction, int operand)
		{
			instrInfos[(int)instruction.Code].GetOpInfo(options, in instruction, out var info);
			if ((uint)operand >= (uint)info.OpCount)
			{
				ThrowHelper.ThrowArgumentOutOfRangeException_operand();
			}
			return info.GetInstructionIndex(operand);
		}

		public override int GetFormatterOperand(in Instruction instruction, int instructionOperand)
		{
			instrInfos[(int)instruction.Code].GetOpInfo(options, in instruction, out var info);
			if ((uint)instructionOperand >= (uint)instruction.OpCount)
			{
				ThrowHelper.ThrowArgumentOutOfRangeException_instructionOperand();
			}
			return info.GetOperandIndex(instructionOperand);
		}

		public override void FormatOperand(in Instruction instruction, FormatterOutput output, int operand)
		{
			instrInfos[(int)instruction.Code].GetOpInfo(options, in instruction, out var info);
			if ((uint)operand >= (uint)info.OpCount)
			{
				ThrowHelper.ThrowArgumentOutOfRangeException_operand();
			}
			FormatOperand(in instruction, output, in info, operand);
		}

		public override void FormatOperandSeparator(in Instruction instruction, FormatterOutput output)
		{
			if (output == null)
			{
				ThrowHelper.ThrowArgumentNullException_output();
			}
			output.Write(",", FormatterTextKind.Punctuation);
			if (options.SpaceAfterOperandSeparator)
			{
				output.Write(" ", FormatterTextKind.Text);
			}
		}

		public override void FormatAllOperands(in Instruction instruction, FormatterOutput output)
		{
			instrInfos[(int)instruction.Code].GetOpInfo(options, in instruction, out var info);
			FormatOperands(in instruction, output, in info);
		}

		public override void Format(in Instruction instruction, FormatterOutput output)
		{
			instrInfos[(int)instruction.Code].GetOpInfo(options, in instruction, out var info);
			int column = 0;
			FormatMnemonic(in instruction, output, in info, ref column, FormatMnemonicOptions.None);
			if (info.OpCount != 0)
			{
				FormatterUtils.AddTabs(output, column, options.FirstOperandCharIndex, options.TabSize);
				FormatOperands(in instruction, output, in info);
			}
		}

		private void FormatMnemonic(in Instruction instruction, FormatterOutput output, in Iced.Intel.GasFormatterInternal.InstrOpInfo opInfo, ref int column, FormatMnemonicOptions mnemonicOptions)
		{
			if (output == null)
			{
				ThrowHelper.ThrowArgumentNullException_output();
			}
			bool needSpace = false;
			int num;
			if ((mnemonicOptions & FormatMnemonicOptions.NoPrefixes) == 0 && (opInfo.Flags & Iced.Intel.GasFormatterInternal.InstrOpInfoFlags.MnemonicIsDirective) == 0)
			{
				Register segmentPrefix = instruction.SegmentPrefix;
				if (((uint)segmentPrefix | instruction.HasAnyOf_Lock_Rep_Repne_Prefix | (uint)(opInfo.Flags & (Iced.Intel.GasFormatterInternal.InstrOpInfoFlags.OpSize64 | Iced.Intel.GasFormatterInternal.InstrOpInfoFlags.AddrSize64 | Iced.Intel.GasFormatterInternal.InstrOpInfoFlags.BndPrefix))) != 0)
				{
					FormatterString prefix;
					if ((opInfo.Flags & Iced.Intel.GasFormatterInternal.InstrOpInfoFlags.OpSizeIsByteDirective) != 0)
					{
						switch ((Iced.Intel.GasFormatterInternal.SizeOverride)(((int)opInfo.Flags >> 1) & 3))
						{
						case Iced.Intel.GasFormatterInternal.SizeOverride.Size16:
						case Iced.Intel.GasFormatterInternal.SizeOverride.Size32:
						{
							output.Write(str_dot_byte.Get(options.UppercaseKeywords || options.UppercaseAll), FormatterTextKind.Directive);
							output.Write(" ", FormatterTextKind.Text);
							NumberFormattingOptions numberFormattingOptions = NumberFormattingOptions.CreateImmediateInternal(options);
							string text = numberFormatter.FormatUInt8(options, in numberFormattingOptions, 102);
							output.Write(text, FormatterTextKind.Number);
							output.Write(";", FormatterTextKind.Punctuation);
							output.Write(" ", FormatterTextKind.Text);
							column += str_dot_byte.Length + 1 + text.Length + 1 + 1;
							break;
						}
						case Iced.Intel.GasFormatterInternal.SizeOverride.Size64:
							FormatPrefix(output, in instruction, ref column, str_rex_w, PrefixKind.OperandSize, ref needSpace);
							break;
						default:
							throw new InvalidOperationException();
						case Iced.Intel.GasFormatterInternal.SizeOverride.None:
							break;
						}
					}
					else
					{
						prefix = opSizeStrings[((int)opInfo.Flags >> 1) & 3];
						if (prefix.Length != 0)
						{
							FormatPrefix(output, in instruction, ref column, prefix, PrefixKind.OperandSize, ref needSpace);
						}
					}
					prefix = addrSizeStrings[((int)opInfo.Flags >> 3) & 3];
					if (prefix.Length != 0)
					{
						FormatPrefix(output, in instruction, ref column, prefix, PrefixKind.AddressSize, ref needSpace);
					}
					if (segmentPrefix == Register.DS)
					{
						num = (FormatterUtils.IsNotrackPrefixBranch(instruction.Code) ? 1 : 0);
						if (num != 0)
						{
							goto IL_01d1;
						}
					}
					else
					{
						num = 0;
					}
					if (segmentPrefix != 0 && ShowSegmentPrefix(in instruction, in opInfo))
					{
						FormatPrefix(output, in instruction, ref column, allRegistersNaked[(int)segmentPrefix], FormatterUtils.GetSegmentRegisterPrefixKind(segmentPrefix), ref needSpace);
					}
					goto IL_01d1;
				}
			}
			goto IL_02f3;
			IL_01d1:
			if (instruction.HasXacquirePrefix)
			{
				FormatPrefix(output, in instruction, ref column, str_xacquire, PrefixKind.Xacquire, ref needSpace);
			}
			if (instruction.HasXreleasePrefix)
			{
				FormatPrefix(output, in instruction, ref column, str_xrelease, PrefixKind.Xrelease, ref needSpace);
			}
			if (instruction.HasLockPrefix)
			{
				FormatPrefix(output, in instruction, ref column, str_lock, PrefixKind.Lock, ref needSpace);
			}
			if (num != 0)
			{
				FormatPrefix(output, in instruction, ref column, str_notrack, PrefixKind.Notrack, ref needSpace);
			}
			bool flag = (opInfo.Flags & Iced.Intel.GasFormatterInternal.InstrOpInfoFlags.BndPrefix) != 0;
			if (flag)
			{
				FormatPrefix(output, in instruction, ref column, str_bnd, PrefixKind.Bnd, ref needSpace);
			}
			if (instruction.HasRepePrefix && FormatterUtils.ShowRepOrRepePrefix(instruction.Code, options))
			{
				if (FormatterUtils.IsRepeOrRepneInstruction(instruction.Code))
				{
					FormatPrefix(output, in instruction, ref column, MnemonicCC.GetMnemonicCC(options, 4, str_repe), PrefixKind.Repe, ref needSpace);
				}
				else
				{
					FormatPrefix(output, in instruction, ref column, str_rep, PrefixKind.Rep, ref needSpace);
				}
			}
			if (instruction.HasRepnePrefix && !flag && FormatterUtils.ShowRepnePrefix(instruction.Code, options))
			{
				FormatPrefix(output, in instruction, ref column, MnemonicCC.GetMnemonicCC(options, 5, str_repne), PrefixKind.Repne, ref needSpace);
			}
			goto IL_02f3;
			IL_02f3:
			if ((mnemonicOptions & FormatMnemonicOptions.NoMnemonic) == 0)
			{
				if (needSpace)
				{
					output.Write(" ", FormatterTextKind.Text);
					column++;
				}
				FormatterString mnemonic = opInfo.Mnemonic;
				if ((opInfo.Flags & Iced.Intel.GasFormatterInternal.InstrOpInfoFlags.MnemonicIsDirective) != 0)
				{
					output.Write(mnemonic.Get(options.UppercaseKeywords || options.UppercaseAll), FormatterTextKind.Directive);
				}
				else
				{
					output.WriteMnemonic(in instruction, mnemonic.Get(options.UppercaseMnemonics || options.UppercaseAll));
				}
				column += mnemonic.Length;
			}
			if ((mnemonicOptions & FormatMnemonicOptions.NoPrefixes) == 0)
			{
				if ((opInfo.Flags & Iced.Intel.GasFormatterInternal.InstrOpInfoFlags.JccNotTaken) != 0)
				{
					FormatBranchHint(output, ref column, str_pn);
				}
				else if ((opInfo.Flags & Iced.Intel.GasFormatterInternal.InstrOpInfoFlags.JccTaken) != 0)
				{
					FormatBranchHint(output, ref column, str_pt);
				}
			}
		}

		private void FormatBranchHint(FormatterOutput output, ref int column, FormatterString brHint)
		{
			output.Write(",", FormatterTextKind.Text);
			output.Write(brHint.Get(options.UppercasePrefixes || options.UppercaseAll), FormatterTextKind.Keyword);
			column += 1 + brHint.Length;
		}

		private bool ShowSegmentPrefix(in Instruction instruction, in Iced.Intel.GasFormatterInternal.InstrOpInfo opInfo)
		{
			if ((opInfo.Flags & (Iced.Intel.GasFormatterInternal.InstrOpInfoFlags.JccNotTaken | Iced.Intel.GasFormatterInternal.InstrOpInfoFlags.JccTaken)) != 0)
			{
				return false;
			}
			switch (instruction.Code)
			{
			case Code.Monitorw:
			case Code.Monitord:
			case Code.Monitorq:
			case Code.Monitorxw:
			case Code.Monitorxd:
			case Code.Monitorxq:
			case Code.Clzerow:
			case Code.Clzerod:
			case Code.Clzeroq:
			case Code.Umonitor_r16:
			case Code.Umonitor_r32:
			case Code.Umonitor_r64:
			case Code.Maskmovq_rDI_mm_mm:
			case Code.Maskmovdqu_rDI_xmm_xmm:
			case Code.VEX_Vmaskmovdqu_rDI_xmm_xmm:
				return FormatterUtils.ShowSegmentPrefix(Register.DS, in instruction, options);
			default:
			{
				for (int i = 0; i < opInfo.OpCount; i++)
				{
					switch (opInfo.GetOpKind(i))
					{
					case Iced.Intel.GasFormatterInternal.InstrOpKind.MemorySegSI:
					case Iced.Intel.GasFormatterInternal.InstrOpKind.MemorySegESI:
					case Iced.Intel.GasFormatterInternal.InstrOpKind.MemorySegRSI:
					case Iced.Intel.GasFormatterInternal.InstrOpKind.MemorySegDI:
					case Iced.Intel.GasFormatterInternal.InstrOpKind.MemorySegEDI:
					case Iced.Intel.GasFormatterInternal.InstrOpKind.MemorySegRDI:
					case Iced.Intel.GasFormatterInternal.InstrOpKind.Memory:
						return false;
					default:
						throw new InvalidOperationException();
					case Iced.Intel.GasFormatterInternal.InstrOpKind.Register:
					case Iced.Intel.GasFormatterInternal.InstrOpKind.NearBranch16:
					case Iced.Intel.GasFormatterInternal.InstrOpKind.NearBranch32:
					case Iced.Intel.GasFormatterInternal.InstrOpKind.NearBranch64:
					case Iced.Intel.GasFormatterInternal.InstrOpKind.FarBranch16:
					case Iced.Intel.GasFormatterInternal.InstrOpKind.FarBranch32:
					case Iced.Intel.GasFormatterInternal.InstrOpKind.Immediate8:
					case Iced.Intel.GasFormatterInternal.InstrOpKind.Immediate8_2nd:
					case Iced.Intel.GasFormatterInternal.InstrOpKind.Immediate16:
					case Iced.Intel.GasFormatterInternal.InstrOpKind.Immediate32:
					case Iced.Intel.GasFormatterInternal.InstrOpKind.Immediate64:
					case Iced.Intel.GasFormatterInternal.InstrOpKind.Immediate8to16:
					case Iced.Intel.GasFormatterInternal.InstrOpKind.Immediate8to32:
					case Iced.Intel.GasFormatterInternal.InstrOpKind.Immediate8to64:
					case Iced.Intel.GasFormatterInternal.InstrOpKind.Immediate32to64:
					case Iced.Intel.GasFormatterInternal.InstrOpKind.MemoryESDI:
					case Iced.Intel.GasFormatterInternal.InstrOpKind.MemoryESEDI:
					case Iced.Intel.GasFormatterInternal.InstrOpKind.MemoryESRDI:
					case Iced.Intel.GasFormatterInternal.InstrOpKind.Sae:
					case Iced.Intel.GasFormatterInternal.InstrOpKind.RnSae:
					case Iced.Intel.GasFormatterInternal.InstrOpKind.RdSae:
					case Iced.Intel.GasFormatterInternal.InstrOpKind.RuSae:
					case Iced.Intel.GasFormatterInternal.InstrOpKind.RzSae:
					case Iced.Intel.GasFormatterInternal.InstrOpKind.Rn:
					case Iced.Intel.GasFormatterInternal.InstrOpKind.Rd:
					case Iced.Intel.GasFormatterInternal.InstrOpKind.Ru:
					case Iced.Intel.GasFormatterInternal.InstrOpKind.Rz:
					case Iced.Intel.GasFormatterInternal.InstrOpKind.DeclareByte:
					case Iced.Intel.GasFormatterInternal.InstrOpKind.DeclareWord:
					case Iced.Intel.GasFormatterInternal.InstrOpKind.DeclareDword:
					case Iced.Intel.GasFormatterInternal.InstrOpKind.DeclareQword:
						break;
					}
				}
				return options.ShowUselessPrefixes;
			}
			}
		}

		private void FormatPrefix(FormatterOutput output, in Instruction instruction, ref int column, FormatterString prefix, PrefixKind prefixKind, ref bool needSpace)
		{
			if (needSpace)
			{
				column++;
				output.Write(" ", FormatterTextKind.Text);
			}
			output.WritePrefix(in instruction, prefix.Get(options.UppercasePrefixes || options.UppercaseAll), prefixKind);
			column += prefix.Length;
			needSpace = true;
		}

		private void FormatOperands(in Instruction instruction, FormatterOutput output, in Iced.Intel.GasFormatterInternal.InstrOpInfo opInfo)
		{
			if (output == null)
			{
				ThrowHelper.ThrowArgumentNullException_output();
			}
			for (int i = 0; i < opInfo.OpCount; i++)
			{
				if (i > 0)
				{
					output.Write(",", FormatterTextKind.Punctuation);
					if (options.SpaceAfterOperandSeparator)
					{
						output.Write(" ", FormatterTextKind.Text);
					}
				}
				FormatOperand(in instruction, output, in opInfo, i);
			}
		}

		private void FormatOperand(in Instruction instruction, FormatterOutput output, in Iced.Intel.GasFormatterInternal.InstrOpInfo opInfo, int operand)
		{
			if (output == null)
			{
				ThrowHelper.ThrowArgumentNullException_output();
			}
			int num;
			if (IcedConstants.IsMvex(instruction.Code))
			{
				int opCount = instruction.OpCount;
				num = ((instruction.GetOpKind(opCount - 1) == OpKind.Immediate8 && opInfo.OpCount == opCount) ? 1 : 0);
			}
			else
			{
				num = -1;
			}
			int instructionIndex = opInfo.GetInstructionIndex(operand);
			if ((opInfo.Flags & Iced.Intel.GasFormatterInternal.InstrOpInfoFlags.IndirectOperand) != 0)
			{
				output.Write("*", FormatterTextKind.Operator);
			}
			Iced.Intel.GasFormatterInternal.InstrOpKind opKind = opInfo.GetOpKind(operand);
			int addressSize;
			SymbolResult symbol;
			ulong value;
			NumberKind numberKind;
			NumberFormattingOptions numberOptions;
			FormatterOperandOptions formatterOperandOptions;
			ISymbolResolver symbolResolver;
			FormatterFlowControl flowControl;
			switch (opKind)
			{
			case Iced.Intel.GasFormatterInternal.InstrOpKind.Register:
				FormatRegister(output, in instruction, operand, instructionIndex, opInfo.GetOpRegister(operand));
				break;
			case Iced.Intel.GasFormatterInternal.InstrOpKind.NearBranch64:
				addressSize = 8;
				value = instruction.NearBranch64;
				numberKind = NumberKind.UInt64;
				goto IL_015d;
			case Iced.Intel.GasFormatterInternal.InstrOpKind.NearBranch32:
				addressSize = 4;
				value = instruction.NearBranch32;
				numberKind = NumberKind.UInt32;
				goto IL_015d;
			case Iced.Intel.GasFormatterInternal.InstrOpKind.NearBranch16:
				addressSize = 2;
				value = instruction.NearBranch16;
				numberKind = NumberKind.UInt16;
				goto IL_015d;
			case Iced.Intel.GasFormatterInternal.InstrOpKind.FarBranch32:
				addressSize = 4;
				value = instruction.FarBranch32;
				numberKind = NumberKind.UInt32;
				goto IL_0294;
			case Iced.Intel.GasFormatterInternal.InstrOpKind.FarBranch16:
				addressSize = 2;
				value = instruction.FarBranch16;
				numberKind = NumberKind.UInt16;
				goto IL_0294;
			case Iced.Intel.GasFormatterInternal.InstrOpKind.Immediate8:
			case Iced.Intel.GasFormatterInternal.InstrOpKind.Immediate8_2nd:
				output.Write("$", FormatterTextKind.Operator);
				goto case Iced.Intel.GasFormatterInternal.InstrOpKind.DeclareByte;
			case Iced.Intel.GasFormatterInternal.InstrOpKind.DeclareByte:
			{
				byte b = opKind switch
				{
					Iced.Intel.GasFormatterInternal.InstrOpKind.Immediate8 => instruction.Immediate8, 
					Iced.Intel.GasFormatterInternal.InstrOpKind.Immediate8_2nd => instruction.Immediate8_2nd, 
					_ => instruction.GetDeclareByteValue(operand), 
				};
				numberOptions = NumberFormattingOptions.CreateImmediateInternal(options);
				formatterOperandOptions = default(FormatterOperandOptions);
				optionsProvider?.GetOperandOptions(in instruction, operand, instructionIndex, ref formatterOperandOptions, ref numberOptions);
				if ((symbolResolver = this.symbolResolver) != null && symbolResolver.TryGetSymbol(in instruction, operand, instructionIndex, b, 1, out symbol))
				{
					output.Write(in instruction, operand, instructionIndex, options, in numberFormatter, in numberOptions, b, in symbol, options.ShowSymbolAddress);
					break;
				}
				if (numberOptions.SignedNumber)
				{
					value = (ulong)(sbyte)b;
					numberKind = NumberKind.Int8;
					if ((sbyte)b < 0)
					{
						output.Write("-", FormatterTextKind.Operator);
						b = (byte)(-(sbyte)b);
					}
				}
				else
				{
					value = b;
					numberKind = NumberKind.UInt8;
				}
				string text = numberFormatter.FormatUInt8(options, in numberOptions, b);
				output.WriteNumber(in instruction, operand, instructionIndex, text, value, numberKind, FormatterTextKind.Number);
				break;
			}
			case Iced.Intel.GasFormatterInternal.InstrOpKind.Immediate16:
			case Iced.Intel.GasFormatterInternal.InstrOpKind.Immediate8to16:
				output.Write("$", FormatterTextKind.Operator);
				goto case Iced.Intel.GasFormatterInternal.InstrOpKind.DeclareWord;
			case Iced.Intel.GasFormatterInternal.InstrOpKind.DeclareWord:
			{
				ushort num3 = opKind switch
				{
					Iced.Intel.GasFormatterInternal.InstrOpKind.Immediate16 => instruction.Immediate16, 
					Iced.Intel.GasFormatterInternal.InstrOpKind.Immediate8to16 => (ushort)instruction.Immediate8to16, 
					_ => instruction.GetDeclareWordValue(operand), 
				};
				numberOptions = NumberFormattingOptions.CreateImmediateInternal(options);
				formatterOperandOptions = default(FormatterOperandOptions);
				optionsProvider?.GetOperandOptions(in instruction, operand, instructionIndex, ref formatterOperandOptions, ref numberOptions);
				if ((symbolResolver = this.symbolResolver) != null && symbolResolver.TryGetSymbol(in instruction, operand, instructionIndex, num3, 2, out symbol))
				{
					output.Write(in instruction, operand, instructionIndex, options, in numberFormatter, in numberOptions, num3, in symbol, options.ShowSymbolAddress);
					break;
				}
				if (numberOptions.SignedNumber)
				{
					value = (ulong)(short)num3;
					numberKind = NumberKind.Int16;
					if ((short)num3 < 0)
					{
						output.Write("-", FormatterTextKind.Operator);
						num3 = (ushort)(-(short)num3);
					}
				}
				else
				{
					value = num3;
					numberKind = NumberKind.UInt16;
				}
				string text = numberFormatter.FormatUInt16(options, in numberOptions, num3);
				output.WriteNumber(in instruction, operand, instructionIndex, text, value, numberKind, FormatterTextKind.Number);
				break;
			}
			case Iced.Intel.GasFormatterInternal.InstrOpKind.Immediate32:
			case Iced.Intel.GasFormatterInternal.InstrOpKind.Immediate8to32:
				output.Write("$", FormatterTextKind.Operator);
				goto case Iced.Intel.GasFormatterInternal.InstrOpKind.DeclareDword;
			case Iced.Intel.GasFormatterInternal.InstrOpKind.DeclareDword:
			{
				uint num2 = opKind switch
				{
					Iced.Intel.GasFormatterInternal.InstrOpKind.Immediate32 => instruction.Immediate32, 
					Iced.Intel.GasFormatterInternal.InstrOpKind.Immediate8to32 => (uint)instruction.Immediate8to32, 
					_ => instruction.GetDeclareDwordValue(operand), 
				};
				numberOptions = NumberFormattingOptions.CreateImmediateInternal(options);
				formatterOperandOptions = default(FormatterOperandOptions);
				optionsProvider?.GetOperandOptions(in instruction, operand, instructionIndex, ref formatterOperandOptions, ref numberOptions);
				if ((symbolResolver = this.symbolResolver) != null && symbolResolver.TryGetSymbol(in instruction, operand, instructionIndex, num2, 4, out symbol))
				{
					output.Write(in instruction, operand, instructionIndex, options, in numberFormatter, in numberOptions, num2, in symbol, options.ShowSymbolAddress);
					break;
				}
				if (numberOptions.SignedNumber)
				{
					value = (ulong)(int)num2;
					numberKind = NumberKind.Int32;
					if ((int)num2 < 0)
					{
						output.Write("-", FormatterTextKind.Operator);
						num2 = 0 - num2;
					}
				}
				else
				{
					value = num2;
					numberKind = NumberKind.UInt32;
				}
				string text = numberFormatter.FormatUInt32(options, in numberOptions, num2);
				output.WriteNumber(in instruction, operand, instructionIndex, text, value, numberKind, FormatterTextKind.Number);
				break;
			}
			case Iced.Intel.GasFormatterInternal.InstrOpKind.Immediate64:
			case Iced.Intel.GasFormatterInternal.InstrOpKind.Immediate8to64:
			case Iced.Intel.GasFormatterInternal.InstrOpKind.Immediate32to64:
				output.Write("$", FormatterTextKind.Operator);
				goto case Iced.Intel.GasFormatterInternal.InstrOpKind.DeclareQword;
			case Iced.Intel.GasFormatterInternal.InstrOpKind.DeclareQword:
			{
				value = opKind switch
				{
					Iced.Intel.GasFormatterInternal.InstrOpKind.Immediate32to64 => (ulong)instruction.Immediate32to64, 
					Iced.Intel.GasFormatterInternal.InstrOpKind.Immediate8to64 => (ulong)instruction.Immediate8to64, 
					Iced.Intel.GasFormatterInternal.InstrOpKind.Immediate64 => instruction.Immediate64, 
					_ => instruction.GetDeclareQwordValue(operand), 
				};
				numberOptions = NumberFormattingOptions.CreateImmediateInternal(options);
				formatterOperandOptions = default(FormatterOperandOptions);
				optionsProvider?.GetOperandOptions(in instruction, operand, instructionIndex, ref formatterOperandOptions, ref numberOptions);
				if ((symbolResolver = this.symbolResolver) != null && symbolResolver.TryGetSymbol(in instruction, operand, instructionIndex, value, 8, out symbol))
				{
					output.Write(in instruction, operand, instructionIndex, options, in numberFormatter, in numberOptions, value, in symbol, options.ShowSymbolAddress);
					break;
				}
				ulong value2 = value;
				if (numberOptions.SignedNumber)
				{
					numberKind = NumberKind.Int64;
					if ((long)value < 0L)
					{
						output.Write("-", FormatterTextKind.Operator);
						value = 0L - value;
					}
				}
				else
				{
					numberKind = NumberKind.UInt64;
				}
				string text = numberFormatter.FormatUInt64(options, in numberOptions, value);
				output.WriteNumber(in instruction, operand, instructionIndex, text, value2, numberKind, FormatterTextKind.Number);
				break;
			}
			case Iced.Intel.GasFormatterInternal.InstrOpKind.MemorySegSI:
				FormatMemory(output, in instruction, operand, instructionIndex, instruction.MemorySegment, Register.SI, Register.None, 0, 0, 0L, 2);
				break;
			case Iced.Intel.GasFormatterInternal.InstrOpKind.MemorySegESI:
				FormatMemory(output, in instruction, operand, instructionIndex, instruction.MemorySegment, Register.ESI, Register.None, 0, 0, 0L, 4);
				break;
			case Iced.Intel.GasFormatterInternal.InstrOpKind.MemorySegRSI:
				FormatMemory(output, in instruction, operand, instructionIndex, instruction.MemorySegment, Register.RSI, Register.None, 0, 0, 0L, 8);
				break;
			case Iced.Intel.GasFormatterInternal.InstrOpKind.MemorySegDI:
				FormatMemory(output, in instruction, operand, instructionIndex, instruction.MemorySegment, Register.DI, Register.None, 0, 0, 0L, 2);
				break;
			case Iced.Intel.GasFormatterInternal.InstrOpKind.MemorySegEDI:
				FormatMemory(output, in instruction, operand, instructionIndex, instruction.MemorySegment, Register.EDI, Register.None, 0, 0, 0L, 4);
				break;
			case Iced.Intel.GasFormatterInternal.InstrOpKind.MemorySegRDI:
				FormatMemory(output, in instruction, operand, instructionIndex, instruction.MemorySegment, Register.RDI, Register.None, 0, 0, 0L, 8);
				break;
			case Iced.Intel.GasFormatterInternal.InstrOpKind.MemoryESDI:
				FormatMemory(output, in instruction, operand, instructionIndex, Register.ES, Register.DI, Register.None, 0, 0, 0L, 2);
				break;
			case Iced.Intel.GasFormatterInternal.InstrOpKind.MemoryESEDI:
				FormatMemory(output, in instruction, operand, instructionIndex, Register.ES, Register.EDI, Register.None, 0, 0, 0L, 4);
				break;
			case Iced.Intel.GasFormatterInternal.InstrOpKind.MemoryESRDI:
				FormatMemory(output, in instruction, operand, instructionIndex, Register.ES, Register.RDI, Register.None, 0, 0, 0L, 8);
				break;
			case Iced.Intel.GasFormatterInternal.InstrOpKind.Memory:
			{
				int memoryDisplSize = instruction.MemoryDisplSize;
				Register memoryBase = instruction.MemoryBase;
				Register indexReg = instruction.MemoryIndex;
				int addressSizeInBytes = InstructionUtils.GetAddressSizeInBytes(memoryBase, indexReg, memoryDisplSize, instruction.CodeSize);
				long displ = (long)((addressSizeInBytes != 8) ? instruction.MemoryDisplacement32 : instruction.MemoryDisplacement64);
				if ((opInfo.Flags & Iced.Intel.GasFormatterInternal.InstrOpInfoFlags.IgnoreIndexReg) != 0)
				{
					indexReg = Register.None;
				}
				FormatMemory(output, in instruction, operand, instructionIndex, instruction.MemorySegment, memoryBase, indexReg, instruction.InternalMemoryIndexScale, memoryDisplSize, displ, addressSizeInBytes);
				break;
			}
			case Iced.Intel.GasFormatterInternal.InstrOpKind.Sae:
				FormatDecorator(output, in instruction, operand, instructionIndex, str_sae, DecoratorKind.SuppressAllExceptions);
				break;
			case Iced.Intel.GasFormatterInternal.InstrOpKind.RnSae:
				FormatDecorator(output, in instruction, operand, instructionIndex, str_rn_sae, DecoratorKind.RoundingControl);
				break;
			case Iced.Intel.GasFormatterInternal.InstrOpKind.RdSae:
				FormatDecorator(output, in instruction, operand, instructionIndex, str_rd_sae, DecoratorKind.RoundingControl);
				break;
			case Iced.Intel.GasFormatterInternal.InstrOpKind.RuSae:
				FormatDecorator(output, in instruction, operand, instructionIndex, str_ru_sae, DecoratorKind.RoundingControl);
				break;
			case Iced.Intel.GasFormatterInternal.InstrOpKind.RzSae:
				FormatDecorator(output, in instruction, operand, instructionIndex, str_rz_sae, DecoratorKind.RoundingControl);
				break;
			case Iced.Intel.GasFormatterInternal.InstrOpKind.Rn:
				FormatDecorator(output, in instruction, operand, instructionIndex, str_rn, DecoratorKind.RoundingControl);
				break;
			case Iced.Intel.GasFormatterInternal.InstrOpKind.Rd:
				FormatDecorator(output, in instruction, operand, instructionIndex, str_rd, DecoratorKind.RoundingControl);
				break;
			case Iced.Intel.GasFormatterInternal.InstrOpKind.Ru:
				FormatDecorator(output, in instruction, operand, instructionIndex, str_ru, DecoratorKind.RoundingControl);
				break;
			case Iced.Intel.GasFormatterInternal.InstrOpKind.Rz:
				FormatDecorator(output, in instruction, operand, instructionIndex, str_rz, DecoratorKind.RoundingControl);
				break;
			default:
				{
					throw new InvalidOperationException();
				}
				IL_0294:
				numberOptions = NumberFormattingOptions.CreateBranchInternal(options);
				formatterOperandOptions = default(FormatterOperandOptions);
				optionsProvider?.GetOperandOptions(in instruction, operand, instructionIndex, ref formatterOperandOptions, ref numberOptions);
				if ((symbolResolver = this.symbolResolver) != null && symbolResolver.TryGetSymbol(in instruction, operand, instructionIndex, (uint)value, addressSize, out symbol))
				{
					output.Write("$", FormatterTextKind.Operator);
					if (!symbolResolver.TryGetSymbol(in instruction, operand + 1, instructionIndex, instruction.FarBranchSelector, 2, out var symbol2))
					{
						string text = numberFormatter.FormatUInt16(options, in numberOptions, instruction.FarBranchSelector, numberOptions.LeadingZeros);
						output.WriteNumber(in instruction, operand, instructionIndex, text, instruction.FarBranchSelector, NumberKind.UInt16, FormatterTextKind.SelectorValue);
					}
					else
					{
						output.Write(in instruction, operand, instructionIndex, options, in numberFormatter, in numberOptions, instruction.FarBranchSelector, in symbol2, options.ShowSymbolAddress);
					}
					output.Write(",", FormatterTextKind.Punctuation);
					if (options.SpaceAfterOperandSeparator)
					{
						output.Write(" ", FormatterTextKind.Text);
					}
					output.Write("$", FormatterTextKind.Operator);
					output.Write(in instruction, operand, instructionIndex, options, in numberFormatter, in numberOptions, value, in symbol, options.ShowSymbolAddress);
				}
				else
				{
					flowControl = FormatterUtils.GetFlowControl(in instruction);
					string text = numberFormatter.FormatUInt16(options, in numberOptions, instruction.FarBranchSelector, numberOptions.LeadingZeros);
					output.Write("$", FormatterTextKind.Operator);
					output.WriteNumber(in instruction, operand, instructionIndex, text, instruction.FarBranchSelector, NumberKind.UInt16, FormatterTextKind.SelectorValue);
					output.Write(",", FormatterTextKind.Punctuation);
					if (options.SpaceAfterOperandSeparator)
					{
						output.Write(" ", FormatterTextKind.Text);
					}
					text = ((opKind != Iced.Intel.GasFormatterInternal.InstrOpKind.FarBranch32) ? numberFormatter.FormatUInt16(options, in numberOptions, instruction.FarBranch16, numberOptions.LeadingZeros) : numberFormatter.FormatUInt32(options, in numberOptions, instruction.FarBranch32, numberOptions.LeadingZeros));
					output.Write("$", FormatterTextKind.Operator);
					output.WriteNumber(in instruction, operand, instructionIndex, text, value, numberKind, FormatterUtils.IsCall(flowControl) ? FormatterTextKind.FunctionAddress : FormatterTextKind.LabelAddress);
				}
				break;
				IL_015d:
				numberOptions = NumberFormattingOptions.CreateBranchInternal(options);
				formatterOperandOptions = default(FormatterOperandOptions);
				optionsProvider?.GetOperandOptions(in instruction, operand, instructionIndex, ref formatterOperandOptions, ref numberOptions);
				if ((symbolResolver = this.symbolResolver) != null && symbolResolver.TryGetSymbol(in instruction, operand, instructionIndex, value, addressSize, out symbol))
				{
					output.Write(in instruction, operand, instructionIndex, options, in numberFormatter, in numberOptions, value, in symbol, options.ShowSymbolAddress);
					break;
				}
				flowControl = FormatterUtils.GetFlowControl(in instruction);
				output.WriteNumber(in instruction, operand, instructionIndex, opKind switch
				{
					Iced.Intel.GasFormatterInternal.InstrOpKind.NearBranch32 => numberFormatter.FormatUInt32(options, in numberOptions, instruction.NearBranch32, numberOptions.LeadingZeros), 
					Iced.Intel.GasFormatterInternal.InstrOpKind.NearBranch64 => numberFormatter.FormatUInt64(options, in numberOptions, instruction.NearBranch64, numberOptions.LeadingZeros), 
					_ => numberFormatter.FormatUInt16(options, in numberOptions, instruction.NearBranch16, numberOptions.LeadingZeros), 
				}, value, numberKind, FormatterUtils.IsCall(flowControl) ? FormatterTextKind.FunctionAddress : FormatterTextKind.LabelAddress);
				break;
			}
			if (operand + 1 == opInfo.OpCount && instruction.HasOpMask_or_ZeroingMasking)
			{
				if (instruction.HasOpMask)
				{
					output.Write("{", FormatterTextKind.Punctuation);
					FormatRegister(output, in instruction, operand, instructionIndex, instruction.OpMask);
					output.Write("}", FormatterTextKind.Punctuation);
				}
				if (instruction.ZeroingMasking)
				{
					FormatDecorator(output, in instruction, operand, instructionIndex, str_z, DecoratorKind.ZeroingMasking);
				}
			}
			if (num != operand)
			{
				return;
			}
			MvexRegMemConv mvexRegMemConv = instruction.MvexRegMemConv;
			if (mvexRegMemConv == MvexRegMemConv.None)
			{
				return;
			}
			MvexInfo mvexInfo = new MvexInfo(instruction.Code);
			if (mvexInfo.ConvFn != 0)
			{
				FormatterString text2 = (mvexInfo.IsConvFn32 ? mvexRegMemConsts32 : mvexRegMemConsts64)[(int)mvexRegMemConv];
				if (text2.Length != 0)
				{
					FormatDecorator(output, in instruction, operand, instructionIndex, text2, DecoratorKind.SwizzleMemConv);
				}
			}
		}

		private void FormatDecorator(FormatterOutput output, in Instruction instruction, int operand, int instructionOperand, FormatterString text, DecoratorKind decorator)
		{
			output.Write("{", FormatterTextKind.Punctuation);
			output.WriteDecorator(in instruction, operand, instructionOperand, text.Get(options.UppercaseDecorators || options.UppercaseAll), decorator);
			output.Write("}", FormatterTextKind.Punctuation);
		}

		[MethodImpl(MethodImplOptions.AggressiveInlining)]
		private string ToRegisterString(Register reg)
		{
			if (options.PreferST0 && reg == Register.DontUse0)
			{
				reg = Register.ST0;
			}
			FormatterString formatterString = AllRegisters[(int)reg];
			return formatterString.Get(options.UppercaseRegisters || options.UppercaseAll);
		}

		[MethodImpl(MethodImplOptions.NoInlining)]
		private void FormatRegister(FormatterOutput output, in Instruction instruction, int operand, int instructionOperand, Register reg)
		{
			output.WriteRegister(in instruction, operand, instructionOperand, ToRegisterString(reg), reg);
		}

		private void FormatMemory(FormatterOutput output, in Instruction instruction, int operand, int instructionOperand, Register segReg, Register baseReg, Register indexReg, int scale, int displSize, long displ, int addrSize)
		{
			NumberFormattingOptions numberOptions = NumberFormattingOptions.CreateDisplacementInternal(options);
			FormatterOperandOptions formatterOperandOptions = new FormatterOperandOptions(options.MemorySizeOptions);
			formatterOperandOptions.RipRelativeAddresses = options.RipRelativeAddresses;
			optionsProvider?.GetOperandOptions(in instruction, operand, instructionOperand, ref formatterOperandOptions, ref numberOptions);
			ulong address;
			switch (baseReg)
			{
			case Register.RIP:
				address = (ulong)displ;
				if (options.RipRelativeAddresses)
				{
					displ -= (long)instruction.NextIP;
				}
				else
				{
					baseReg = Register.None;
				}
				displSize = 8;
				break;
			case Register.EIP:
				address = (uint)displ;
				if (options.RipRelativeAddresses)
				{
					displ = (int)displ - (int)instruction.NextIP32;
				}
				else
				{
					baseReg = Register.None;
				}
				displSize = 4;
				break;
			default:
				address = (ulong)displ;
				break;
			}
			ISymbolResolver symbolResolver = this.symbolResolver;
			bool flag;
			SymbolResult symbol;
			if (symbolResolver != null)
			{
				flag = symbolResolver.TryGetSymbol(in instruction, operand, instructionOperand, address, addrSize, out symbol);
			}
			else
			{
				flag = false;
				symbol = default(SymbolResult);
			}
			bool flag2 = scale != 0 || options.AlwaysShowScale;
			if (addrSize == 2 || !FormatterUtils.ShowIndexScale(in instruction, options))
			{
				flag2 = false;
			}
			bool flag3 = baseReg != 0 || indexReg != Register.None;
			CodeSize codeSize = instruction.CodeSize;
			Register segmentPrefix = instruction.SegmentPrefix;
			bool flag4 = segmentPrefix == Register.DS && FormatterUtils.IsNotrackPrefixBranch(instruction.Code) && ((codeSize != CodeSize.Code16 && codeSize != CodeSize.Code32) || (baseReg != Register.BP && baseReg != Register.EBP && baseReg != Register.ESP));
			if (options.AlwaysShowSegmentRegister || (segmentPrefix != 0 && !flag4 && FormatterUtils.ShowSegmentPrefix(Register.None, in instruction, options)))
			{
				FormatRegister(output, in instruction, operand, instructionOperand, segReg);
				output.Write(":", FormatterTextKind.Punctuation);
			}
			if (flag)
			{
				output.Write(in instruction, operand, instructionOperand, options, in numberFormatter, in numberOptions, address, in symbol, options.ShowSymbolAddress);
			}
			else if (!flag3 || (displSize != 0 && (options.ShowZeroDisplacements || displ != 0L)))
			{
				ulong value = (ulong)displ;
				bool flag5;
				if (flag3)
				{
					flag5 = numberOptions.SignedNumber;
					switch (addrSize)
					{
					case 8:
						if (numberOptions.SignedNumber && displ < 0)
						{
							output.Write("-", FormatterTextKind.Operator);
							displ = -displ;
						}
						if (numberOptions.DisplacementLeadingZeros)
						{
							displSize = 4;
						}
						break;
					case 4:
						if (numberOptions.SignedNumber && (int)displ < 0)
						{
							output.Write("-", FormatterTextKind.Operator);
							displ = (uint)(-(int)displ);
						}
						if (numberOptions.DisplacementLeadingZeros)
						{
							displSize = 4;
						}
						break;
					default:
						if (numberOptions.SignedNumber && (short)displ < 0)
						{
							output.Write("-", FormatterTextKind.Operator);
							displ = (ushort)(-(short)displ);
						}
						if (numberOptions.DisplacementLeadingZeros)
						{
							displSize = 2;
						}
						break;
					}
				}
				else
				{
					flag5 = false;
				}
				string text;
				NumberKind numberKind;
				if (displSize <= 1 && (ulong)displ <= 255uL)
				{
					text = numberFormatter.FormatDisplUInt8(options, in numberOptions, (byte)displ);
					numberKind = ((!flag5) ? NumberKind.UInt8 : NumberKind.Int8);
				}
				else if (displSize <= 2 && (ulong)displ <= 65535uL)
				{
					text = numberFormatter.FormatDisplUInt16(options, in numberOptions, (ushort)displ);
					numberKind = (flag5 ? NumberKind.Int16 : NumberKind.UInt16);
				}
				else if (displSize <= 4 && (ulong)displ <= 4294967295uL)
				{
					text = numberFormatter.FormatDisplUInt32(options, in numberOptions, (uint)displ);
					numberKind = (flag5 ? NumberKind.Int32 : NumberKind.UInt32);
				}
				else
				{
					if (displSize > 8)
					{
						throw new InvalidOperationException();
					}
					text = numberFormatter.FormatDisplUInt64(options, in numberOptions, (ulong)displ);
					numberKind = (flag5 ? NumberKind.Int64 : NumberKind.UInt64);
				}
				output.WriteNumber(in instruction, operand, instructionOperand, text, value, numberKind, FormatterTextKind.Number);
			}
			if (flag3)
			{
				output.Write("(", FormatterTextKind.Punctuation);
				if (options.SpaceAfterMemoryBracket)
				{
					output.Write(" ", FormatterTextKind.Text);
				}
				if (baseReg != 0 && indexReg == Register.None && !flag2)
				{
					FormatRegister(output, in instruction, operand, instructionOperand, baseReg);
				}
				else
				{
					if (baseReg != 0)
					{
						FormatRegister(output, in instruction, operand, instructionOperand, baseReg);
					}
					output.Write(",", FormatterTextKind.Punctuation);
					if (options.GasSpaceAfterMemoryOperandComma)
					{
						output.Write(" ", FormatterTextKind.Text);
					}
					if (indexReg != 0)
					{
						FormatRegister(output, in instruction, operand, instructionOperand, indexReg);
						if (flag2)
						{
							output.Write(",", FormatterTextKind.Punctuation);
							if (options.GasSpaceAfterMemoryOperandComma)
							{
								output.Write(" ", FormatterTextKind.Text);
							}
							output.WriteNumber(in instruction, operand, instructionOperand, scaleNumbers[scale], (uint)(1 << scale), NumberKind.Int32, FormatterTextKind.Number);
						}
					}
				}
				if (options.SpaceAfterMemoryBracket)
				{
					output.Write(" ", FormatterTextKind.Text);
				}
				output.Write(")", FormatterTextKind.Punctuation);
			}
			MemorySize memorySize = instruction.MemorySize;
			FormatterString text2 = allMemorySizes[(int)memorySize];
			if (text2.Length != 0)
			{
				FormatDecorator(output, in instruction, operand, instructionOperand, text2, DecoratorKind.Broadcast);
			}
			if (instruction.IsMvexEvictionHint)
			{
				FormatDecorator(output, in instruction, operand, instructionOperand, str_eh, DecoratorKind.EvictionHint);
			}
		}

		public override string Format(Register register)
		{
			return ToRegisterString(register);
		}

		public override string FormatInt8(sbyte value, in NumberFormattingOptions numberOptions)
		{
			return numberFormatter.FormatInt8(options, in numberOptions, value);
		}

		public override string FormatInt16(short value, in NumberFormattingOptions numberOptions)
		{
			return numberFormatter.FormatInt16(options, in numberOptions, value);
		}

		public override string FormatInt32(int value, in NumberFormattingOptions numberOptions)
		{
			return numberFormatter.FormatInt32(options, in numberOptions, value);
		}

		public override string FormatInt64(long value, in NumberFormattingOptions numberOptions)
		{
			return numberFormatter.FormatInt64(options, in numberOptions, value);
		}

		public override string FormatUInt8(byte value, in NumberFormattingOptions numberOptions)
		{
			return numberFormatter.FormatUInt8(options, in numberOptions, value);
		}

		public override string FormatUInt16(ushort value, in NumberFormattingOptions numberOptions)
		{
			return numberFormatter.FormatUInt16(options, in numberOptions, value);
		}

		public override string FormatUInt32(uint value, in NumberFormattingOptions numberOptions)
		{
			return numberFormatter.FormatUInt32(options, in numberOptions, value);
		}

		public override string FormatUInt64(ulong value, in NumberFormattingOptions numberOptions)
		{
			return numberFormatter.FormatUInt64(options, in numberOptions, value);
		}
	}
	internal static class HexUtils
	{
		public static byte[] ToByteArray(string hexData)
		{
			if (hexData == null)
			{
				throw new ArgumentNullException("hexData");
			}
			if (hexData.Length == 0)
			{
				return Array2.Empty<byte>();
			}
			int num = 0;
			for (int i = 0; i < hexData.Length; i++)
			{
				if (hexData[i] != ' ')
				{
					num++;
				}
			}
			byte[] array = new byte[num / 2];
			int num2 = 0;
			int j = 0;
			while (true)
			{
				if (j < hexData.Length && char.IsWhiteSpace(hexData[j]))
				{
					j++;
					continue;
				}
				if (j >= hexData.Length)
				{
					break;
				}
				int num3 = TryParseHexChar(hexData[j++]);
				if (num3 < 0)
				{
					throw new ArgumentOutOfRangeException("hexData");
				}
				for (; j < hexData.Length && char.IsWhiteSpace(hexData[j]); j++)
				{
				}
				if (j >= hexData.Length)
				{
					throw new ArgumentOutOfRangeException("hexData");
				}
				int num4 = TryParseHexChar(hexData[j++]);
				if (num4 < 0)
				{
					throw new ArgumentOutOfRangeException("hexData");
				}
				array[num2++] = (byte)((num3 << 4) | num4);
			}
			if (num2 != array.Length)
			{
				throw new InvalidOperationException();
			}
			return array;
		}

		private static int TryParseHexChar(char c)
		{
			if ('0' <= c && c <= '9')
			{
				return c - 48;
			}
			if ('A' <= c && c <= 'F')
			{
				return c - 65 + 10;
			}
			if ('a' <= c && c <= 'f')
			{
				return c - 97 + 10;
			}
			return -1;
		}
	}
	internal static class IcedConstants
	{
		internal const int MaxOpCount = 5;

		internal const int MaxInstructionLength = 15;

		internal const int RegisterBits = 8;

		internal const Register VMM_first = Register.ZMM0;

		internal const Register VMM_last = Register.ZMM31;

		internal const int VMM_count = 32;

		internal const Register XMM_last = Register.XMM31;

		internal const Register YMM_last = Register.YMM31;

		internal const Register ZMM_last = Register.ZMM31;

		internal const Register TMM_last = Register.TMM7;

		internal const int MaxCpuidFeatureInternalValues = 193;

		internal const MemorySize FirstBroadcastMemorySize = MemorySize.Broadcast32_Float16;

		internal const uint MvexStart = 4611u;

		internal const uint MvexLength = 207u;

		internal const int CC_a_EnumCount = 2;

		internal const int CC_ae_EnumCount = 3;

		internal const int CC_b_EnumCount = 3;

		internal const int CC_be_EnumCount = 2;

		internal const int CC_e_EnumCount = 2;

		internal const int CC_g_EnumCount = 2;

		internal const int CC_ge_EnumCount = 2;

		internal const int CC_l_EnumCount = 2;

		internal const int CC_le_EnumCount = 2;

		internal const int CC_ne_EnumCount = 2;

		internal const int CC_np_EnumCount = 2;

		internal const int CC_p_EnumCount = 2;

		internal const int CodeEnumCount = 4911;

		internal const int CodeSizeEnumCount = 4;

		internal const int ConditionCodeEnumCount = 17;

		internal const int CpuidFeatureEnumCount = 172;

		internal const int DecoderErrorEnumCount = 3;

		internal const int DecoratorKindEnumCount = 6;

		internal const int EncodingKindEnumCount = 6;

		internal const int FlowControlEnumCount = 10;

		internal const int FormatterSyntaxEnumCount = 4;

		internal const int FormatterTextKindEnumCount = 16;

		internal const int MandatoryPrefixEnumCount = 5;

		internal const int MemorySizeEnumCount = 162;

		internal const int MemorySizeOptionsEnumCount = 4;

		internal const int MnemonicEnumCount = 1877;

		internal const int MvexConvFnEnumCount = 13;

		internal const int MvexEHBitEnumCount = 3;

		internal const int MvexRegMemConvEnumCount = 17;

		internal const int MvexTupleTypeLutKindEnumCount = 14;

		internal const int NumberBaseEnumCount = 4;

		internal const int NumberKindEnumCount = 8;

		internal const int OpAccessEnumCount = 8;

		internal const int OpCodeOperandKindEnumCount = 109;

		internal const int OpCodeTableKindEnumCount = 9;

		internal const int OpKindEnumCount = 25;

		internal const int PrefixKindEnumCount = 18;

		internal const int RegisterEnumCount = 256;

		internal const int RelocKindEnumCount = 1;

		internal const int RepPrefixKindEnumCount = 3;

		internal const int RoundingControlEnumCount = 5;

		internal const int TupleTypeEnumCount = 19;

		[MethodImpl(MethodImplOptions.AggressiveInlining)]
		public static bool IsMvex(Code code)
		{
			return (uint)(code - 4611) < 207u;
		}
	}
	public static class IcedFeatures
	{
		public static bool HasGasFormatter => true;

		public static bool HasIntelFormatter => true;

		public static bool HasMasmFormatter => true;

		public static bool HasNasmFormatter => true;

		public static bool HasFastFormatter => true;

		public static bool HasDecoder => true;

		public static bool HasEncoder => true;

		public static bool HasBlockEncoder => true;

		public static bool HasOpCodeInfo => true;

		public static bool HasInstructionInfo => true;

		public static void Initialize()
		{
			RuntimeHelpers.RunClassConstructor(typeof(Decoder).TypeHandle);
		}
	}
	public interface IFormatterOptionsProvider
	{
		void GetOperandOptions(in Instruction instruction, int operand, int instructionOperand, ref FormatterOperandOptions options, ref NumberFormattingOptions numberOptions);
	}
	public struct FormatterOperandOptions
	{
		[Flags]
		internal enum Flags : uint
		{
			None = 0u,
			NoBranchSize = 1u,
			RipRelativeAddresses = 2u,
			MemorySizeShift = 0x1Eu,
			MemorySizeMask = 0xC0000000u
		}

		private uint flags;

		public bool BranchSize
		{
			readonly get
			{
				return (flags & 1) == 0;
			}
			set
			{
				if (value)
				{
					flags &= 4294967294u;
				}
				else
				{
					flags |= 1u;
				}
			}
		}

		public bool RipRelativeAddresses
		{
			readonly get
			{
				return (flags & 2) != 0;
			}
			set
			{
				if (value)
				{
					flags |= 2u;
				}
				else
				{
					flags &= 4294967293u;
				}
			}
		}

		public MemorySizeOptions MemorySizeOptions
		{
			readonly get
			{
				return (MemorySizeOptions)(flags >> 30);
			}
			set
			{
				flags = (flags & 0x3FFFFFFFu) | (uint)((int)value << 30);
			}
		}

		internal FormatterOperandOptions(Flags flags)
		{
			this.flags = (uint)flags;
		}

		internal FormatterOperandOptions(MemorySizeOptions options)
		{
			flags = (uint)((int)options << 30);
		}
	}
	public struct NumberFormattingOptions
	{
		public string? DigitSeparator;

		public string? Prefix;

		public string? Suffix;

		public byte DigitGroupSize;

		private byte numberBaseByteValue;

		public bool UppercaseHex;

		public bool SmallHexNumbersInDecimal;

		public bool AddLeadingZeroToHexNumbers;

		public bool LeadingZeros;

		public bool SignedNumber;

		public bool DisplacementLeadingZeros;

		public NumberBase NumberBase
		{
			readonly get
			{
				return (NumberBase)numberBaseByteValue;
			}
			set
			{
				numberBaseByteValue = (byte)value;
			}
		}

		[MethodImpl(MethodImplOptions.AggressiveInlining)]
		public static NumberFormattingOptions CreateImmediate(FormatterOptions options)
		{
			if (options == null)
			{
				ThrowHelper.ThrowArgumentNullException_options();
			}
			return CreateImmediateInternal(options);
		}

		[MethodImpl(MethodImplOptions.AggressiveInlining)]
		internal static NumberFormattingOptions CreateImmediateInternal(FormatterOptions options)
		{
			return new NumberFormattingOptions(options, options.LeadingZeros, options.SignedImmediateOperands, displacementLeadingZeros: false);
		}

		[MethodImpl(MethodImplOptions.AggressiveInlining)]
		public static NumberFormattingOptions CreateDisplacement(FormatterOptions options)
		{
			if (options == null)
			{
				ThrowHelper.ThrowArgumentNullException_options();
			}
			return CreateDisplacementInternal(options);
		}

		[MethodImpl(MethodImplOptions.AggressiveInlining)]
		internal static NumberFormattingOptions CreateDisplacementInternal(FormatterOptions options)
		{
			return new NumberFormattingOptions(options, options.LeadingZeros, options.SignedMemoryDisplacements, options.DisplacementLeadingZeros);
		}

		[MethodImpl(MethodImplOptions.AggressiveInlining)]
		public static NumberFormattingOptions CreateBranch(FormatterOptions options)
		{
			if (options == null)
			{
				ThrowHelper.ThrowArgumentNullException_options();
			}
			return CreateBranchInternal(options);
		}

		[MethodImpl(MethodImplOptions.AggressiveInlining)]
		internal static NumberFormattingOptions CreateBranchInternal(FormatterOptions options)
		{
			return new NumberFormattingOptions(options, options.BranchLeadingZeros, signedNumber: false, displacementLeadingZeros: false);
		}

		public NumberFormattingOptions(FormatterOptions options, bool leadingZeros, bool signedNumber, bool displacementLeadingZeros)
		{
			if (options == null)
			{
				ThrowHelper.ThrowArgumentNullException_options();
			}
			LeadingZeros = leadingZeros;
			SignedNumber = signedNumber;
			DisplacementLeadingZeros = displacementLeadingZeros;
			numberBaseByteValue = (byte)options.NumberBase;
			DigitSeparator = options.DigitSeparator;
			UppercaseHex = options.UppercaseHex;
			SmallHexNumbersInDecimal = options.SmallHexNumbersInDecimal;
			AddLeadingZeroToHexNumbers = options.AddLeadingZeroToHexNumbers;
			int num;
			switch (options.NumberBase)
			{
			case NumberBase.Hexadecimal:
				Prefix = options.HexPrefix;
				Suffix = options.HexSuffix;
				num = options.HexDigitGroupSize;
				break;
			case NumberBase.Decimal:
				Prefix = options.DecimalPrefix;
				Suffix = options.DecimalSuffix;
				num = options.DecimalDigitGroupSize;
				break;
			case NumberBase.Octal:
				Prefix = options.OctalPrefix;
				Suffix = options.OctalSuffix;
				num = options.OctalDigitGroupSize;
				break;
			case NumberBase.Binary:
				Prefix = options.BinaryPrefix;
				Suffix = options.BinarySuffix;
				num = options.BinaryDigitGroupSize;
				break;
			default:
				throw new InvalidOperationException();
			}
			if (num < 0)
			{
				DigitGroupSize = 0;
			}
			else if (num > 255)
			{
				DigitGroupSize = byte.MaxValue;
			}
			else
			{
				DigitGroupSize = (byte)num;
			}
		}
	}
	public enum RepPrefixKind
	{
		None,
		Repe,
		Repne
	}
	public struct Instruction : IEquatable<Instruction>
	{
		[Flags]
		private enum InstrFlags1 : uint
		{
			SegmentPrefixMask = 7u,
			SegmentPrefixShift = 5u,
			DataLengthMask = 0xFu,
			DataLengthShift = 8u,
			RoundingControlMask = 7u,
			RoundingControlShift = 0xCu,
			OpMaskMask = 7u,
			OpMaskShift = 0xFu,
			CodeSizeMask = 3u,
			CodeSizeShift = 0x12u,
			Broadcast = 0x4000000u,
			SuppressAllExceptions = 0x8000000u,
			ZeroingMasking = 0x10000000u,
			RepePrefix = 0x20000000u,
			RepnePrefix = 0x40000000u,
			LockPrefix = 0x80000000u,
			EqualsIgnoreMask = 0xC0000u
		}

		[Flags]
		private enum MvexInstrFlags : uint
		{
			MvexRegMemConvShift = 0x10u,
			MvexRegMemConvMask = 0x1Fu,
			EvictionHint = 0x80000000u
		}

		internal const int TOTAL_SIZE = 40;

		private ulong nextRip;

		private ulong memDispl;

		private uint flags1;

		private uint immediate;

		private ushort code;

		private byte memBaseReg;

		private byte memIndexReg;

		private byte reg0;

		private byte reg1;

		private byte reg2;

		private byte reg3;

		private byte opKind0;

		private byte opKind1;

		private byte opKind2;

		private byte opKind3;

		private byte scale;

		private byte displSize;

		private byte len;

		private byte pad;

		public ushort IP16
		{
			readonly get
			{
				return (ushort)((int)nextRip - Length);
			}
			set
			{
				nextRip = (uint)(value + Length);
			}
		}

		public uint IP32
		{
			readonly get
			{
				return (uint)((int)nextRip - Length);
			}
			set
			{
				nextRip = value + (uint)Length;
			}
		}

		public ulong IP
		{
			readonly get
			{
				return nextRip - (uint)Length;
			}
			set
			{
				nextRip = value + (uint)Length;
			}
		}

		public ushort NextIP16
		{
			readonly get
			{
				return (ushort)nextRip;
			}
			set
			{
				nextRip = value;
			}
		}

		public uint NextIP32
		{
			readonly get
			{
				return (uint)nextRip;
			}
			set
			{
				nextRip = value;
			}
		}

		public ulong NextIP
		{
			readonly get
			{
				return nextRip;
			}
			set
			{
				nextRip = value;
			}
		}

		public CodeSize CodeSize
		{
			[MethodImpl(MethodImplOptions.AggressiveInlining)]
			readonly get
			{
				return (CodeSize)((int)(flags1 >> 18) & 3);
			}
			set
			{
				flags1 = (flags1 & 0xFFF3FFFFu) | (uint)((int)(value & CodeSize.Code64) << 18);
			}
		}

		internal CodeSize InternalCodeSize
		{
			[MethodImpl(MethodImplOptions.AggressiveInlining)]
			set
			{
				flags1 |= (uint)((int)value << 18);
			}
		}

		public readonly bool IsInvalid
		{
			[MethodImpl(MethodImplOptions.AggressiveInlining)]
			get
			{
				return code == 0;
			}
		}

		public Code Code
		{
			[MethodImpl(MethodImplOptions.AggressiveInlining)]
			readonly get
			{
				return (Code)code;
			}
			[MethodImpl(MethodImplOptions.AggressiveInlining)]
			set
			{
				if ((uint)value >= 4911u)
				{
					ThrowHelper.ThrowArgumentOutOfRangeException_value();
				}
				code = (ushort)value;
			}
		}

		public readonly Mnemonic Mnemonic
		{
			[MethodImpl(MethodImplOptions.AggressiveInlining)]
			get
			{
				return Code.Mnemonic();
			}
		}

		public readonly int OpCount
		{
			[MethodImpl(MethodImplOptions.AggressiveInlining)]
			get
			{
				return InstructionOpCounts.OpCount[code];
			}
		}

		public int Length
		{
			[MethodImpl(MethodImplOptions.AggressiveInlining)]
			readonly get
			{
				return len;
			}
			set
			{
				len = (byte)value;
			}
		}

		internal readonly bool Internal_HasRepeOrRepnePrefix
		{
			[MethodImpl(MethodImplOptions.AggressiveInlining)]
			get
			{
				return (flags1 & 0x60000000) != 0;
			}
		}

		internal readonly uint HasAnyOf_Lock_Rep_Repne_Prefix
		{
			[MethodImpl(MethodImplOptions.AggressiveInlining)]
			get
			{
				return flags1 & 0xE0000000u;
			}
		}

		public bool HasXacquirePrefix
		{
			[MethodImpl(MethodImplOptions.AggressiveInlining)]
			readonly get
			{
				if ((flags1 & 0x40000000u) != 0)
				{
					return IsXacquireInstr();
				}
				return false;
			}
			set
			{
				if (value)
				{
					flags1 |= 1073741824u;
				}
				else
				{
					flags1 &= 3221225471u;
				}
			}
		}

		public bool HasXreleasePrefix
		{
			[MethodImpl(MethodImplOptions.AggressiveInlining)]
			readonly get
			{
				if ((flags1 & 0x20000000u) != 0)
				{
					return IsXreleaseInstr();
				}
				return false;
			}
			set
			{
				if (value)
				{
					flags1 |= 536870912u;
				}
				else
				{
					flags1 &= 3758096383u;
				}
			}
		}

		public bool HasRepPrefix
		{
			[MethodImpl(MethodImplOptions.AggressiveInlining)]
			readonly get
			{
				return (flags1 & 0x20000000) != 0;
			}
			set
			{
				if (value)
				{
					flags1 |= 536870912u;
				}
				else
				{
					flags1 &= 3758096383u;
				}
			}
		}

		public bool HasRepePrefix
		{
			[MethodImpl(MethodImplOptions.AggressiveInlining)]
			readonly get
			{
				return (flags1 & 0x20000000) != 0;
			}
			set
			{
				if (value)
				{
					flags1 |= 536870912u;
				}
				else
				{
					flags1 &= 3758096383u;
				}
			}
		}

		public bool HasRepnePrefix
		{
			[MethodImpl(MethodImplOptions.AggressiveInlining)]
			readonly get
			{
				return (flags1 & 0x40000000) != 0;
			}
			set
			{
				if (value)
				{
					flags1 |= 1073741824u;
				}
				else
				{
					flags1 &= 3221225471u;
				}
			}
		}

		public bool HasLockPrefix
		{
			[MethodImpl(MethodImplOptions.AggressiveInlining)]
			readonly get
			{
				return (flags1 & 0x80000000u) != 0;
			}
			set
			{
				if (value)
				{
					flags1 |= 2147483648u;
				}
				else
				{
					flags1 &= 2147483647u;
				}
			}
		}

		public OpKind Op0Kind
		{
			[MethodImpl(MethodImplOptions.AggressiveInlining)]
			readonly get
			{
				return (OpKind)opKind0;
			}
			[MethodImpl(MethodImplOptions.AggressiveInlining)]
			set
			{
				opKind0 = (byte)value;
			}
		}

		internal readonly bool Internal_Op0IsNotReg_or_Op1IsNotReg
		{
			[MethodImpl(MethodImplOptions.AggressiveInlining)]
			get
			{
				return (opKind0 | opKind1) != 0;
			}
		}

		public OpKind Op1Kind
		{
			[MethodImpl(MethodImplOptions.AggressiveInlining)]
			readonly get
			{
				return (OpKind)opKind1;
			}
			[MethodImpl(MethodImplOptions.AggressiveInlining)]
			set
			{
				opKind1 = (byte)value;
			}
		}

		public OpKind Op2Kind
		{
			[MethodImpl(MethodImplOptions.AggressiveInlining)]
			readonly get
			{
				return (OpKind)opKind2;
			}
			[MethodImpl(MethodImplOptions.AggressiveInlining)]
			set
			{
				opKind2 = (byte)value;
			}
		}

		public OpKind Op3Kind
		{
			[MethodImpl(MethodImplOptions.AggressiveInlining)]
			readonly get
			{
				return (OpKind)opKind3;
			}
			[MethodImpl(MethodImplOptions.AggressiveInlining)]
			set
			{
				opKind3 = (byte)value;
			}
		}

		public OpKind Op4Kind
		{
			readonly get
			{
				return OpKind.Immediate8;
			}
			set
			{
				if (value != OpKind.Immediate8)
				{
					ThrowHelper.ThrowArgumentOutOfRangeException_value();
				}
			}
		}

		public readonly bool HasSegmentPrefix
		{
			[MethodImpl(MethodImplOptions.AggressiveInlining)]
			get
			{
				return ((flags1 >> 5) & 7) - 1 < 6;
			}
		}

		public Register SegmentPrefix
		{
			readonly get
			{
				uint num = ((flags1 >> 5) & 7) - 1;
				if (num >= 6)
				{
					return Register.None;
				}
				return (Register)(71 + num);
			}
			set
			{
				uint num = (uint)((value != 0) ? ((value - 71 + 1) & Register.DH) : Register.None);
				flags1 = (flags1 & 0xFFFFFF1Fu) | (num << 5);
			}
		}

		public readonly Register MemorySegment
		{
			get
			{
				Register segmentPrefix = SegmentPrefix;
				if (segmentPrefix != 0)
				{
					return segmentPrefix;
				}
				Register memoryBase = MemoryBase;
				if (memoryBase == Register.BP || memoryBase == Register.EBP || memoryBase == Register.ESP || memoryBase == Register.RBP || memoryBase == Register.RSP)
				{
					return Register.SS;
				}
				return Register.DS;
			}
		}

		public int MemoryDisplSize
		{
			readonly get
			{
				return displSize switch
				{
					0 => 0, 
					1 => 1, 
					2 => 2, 
					3 => 4, 
					_ => 8, 
				};
			}
			set
			{
				displSize = value switch
				{
					0 => 0, 
					1 => 1, 
					2 => 2, 
					4 => 3, 
					_ => 4, 
				};
			}
		}

		public bool IsBroadcast
		{
			[MethodImpl(MethodImplOptions.AggressiveInlining)]
			readonly get
			{
				return (flags1 & 0x4000000) != 0;
			}
			set
			{
				if (value)
				{
					flags1 |= 67108864u;
				}
				else
				{
					flags1 &= 4227858431u;
				}
			}
		}

		public bool IsMvexEvictionHint
		{
			[MethodImpl(MethodImplOptions.AggressiveInlining)]
			readonly get
			{
				if (IcedConstants.IsMvex(Code))
				{
					return (immediate & 0x80000000u) != 0;
				}
				return false;
			}
			set
			{
				if (value)
				{
					immediate |= 2147483648u;
				}
				else
				{
					immediate &= 2147483647u;
				}
			}
		}

		public MvexRegMemConv MvexRegMemConv
		{
			[MethodImpl(MethodImplOptions.AggressiveInlining)]
			readonly get
			{
				if (!IcedConstants.IsMvex(Code))
				{
					return MvexRegMemConv.None;
				}
				return (MvexRegMemConv)((int)(immediate >> 16) & 0x1F);
			}
			set
			{
				immediate = (immediate & 0xFFE0FFFFu) | (uint)((int)value << 16);
			}
		}

		public readonly MemorySize MemorySize
		{
			get
			{
				int index = (int)Code;
				if (IcedConstants.IsMvex((Code)index))
				{
					MvexInfo mvexInfo = new MvexInfo((Code)index);
					int num = (int)((MvexRegMemConv - 9) & MvexRegMemConv.RegSwizzleCccc);
					return (MemorySize)MvexMemorySizeLut.Data[(int)mvexInfo.TupleTypeLutKind * 8 + num];
				}
				if (IsBroadcast)
				{
					return (MemorySize)InstructionMemorySizes.SizesBcst[index];
				}
				return (MemorySize)InstructionMemorySizes.SizesNormal[index];
			}
		}

		public int MemoryIndexScale
		{
			[MethodImpl(MethodImplOptions.AggressiveInlining)]
			readonly get
			{
				return 1 << (int)scale;
			}
			set
			{
				switch (value)
				{
				case 1:
					scale = 0;
					break;
				case 2:
					scale = 1;
					break;
				case 4:
					scale = 2;
					break;
				default:
					scale = 3;
					break;
				}
			}
		}

		internal int InternalMemoryIndexScale
		{
			[MethodImpl(MethodImplOptions.AggressiveInlining)]
			readonly get
			{
				return scale;
			}
			[MethodImpl(MethodImplOptions.AggressiveInlining)]
			set
			{
				scale = (byte)value;
			}
		}

		public uint MemoryDisplacement32
		{
			[MethodImpl(MethodImplOptions.AggressiveInlining)]
			readonly get
			{
				return (uint)memDispl;
			}
			[MethodImpl(MethodImplOptions.AggressiveInlining)]
			set
			{
				memDispl = value;
			}
		}

		public ulong MemoryDisplacement64
		{
			[MethodImpl(MethodImplOptions.AggressiveInlining)]
			readonly get
			{
				return memDispl;
			}
			[MethodImpl(MethodImplOptions.AggressiveInlining)]
			set
			{
				memDispl = value;
			}
		}

		public byte Immediate8
		{
			readonly get
			{
				return (byte)immediate;
			}
			set
			{
				immediate = (immediate & 0xFFFFFF00u) | value;
			}
		}

		internal uint InternalImmediate8
		{
			set
			{
				immediate = value;
			}
		}

		public byte Immediate8_2nd
		{
			readonly get
			{
				return (byte)memDispl;
			}
			set
			{
				memDispl = value;
			}
		}

		internal uint InternalImmediate8_2nd
		{
			set
			{
				memDispl = value;
			}
		}

		public ushort Immediate16
		{
			readonly get
			{
				return (ushort)immediate;
			}
			set
			{
				immediate = value;
			}
		}

		internal uint InternalImmediate16
		{
			set
			{
				immediate = value;
			}
		}

		public uint Immediate32
		{
			readonly get
			{
				return immediate;
			}
			set
			{
				immediate = value;
			}
		}

		public ulong Immediate64
		{
			[MethodImpl(MethodImplOptions.AggressiveInlining)]
			readonly get
			{
				return (memDispl << 32) | immediate;
			}
			[MethodImpl(MethodImplOptions.AggressiveInlining)]
			set
			{
				immediate = (uint)value;
				memDispl = (uint)(value >> 32);
			}
		}

		internal uint InternalImmediate64_lo
		{
			set
			{
				immediate = value;
			}
		}

		internal uint InternalImmediate64_hi
		{
			set
			{
				memDispl = value;
			}
		}

		public short Immediate8to16
		{
			readonly get
			{
				return (sbyte)immediate;
			}
			set
			{
				immediate = (uint)(sbyte)value;
			}
		}

		public int Immediate8to32
		{
			readonly get
			{
				return (sbyte)immediate;
			}
			set
			{
				immediate = (uint)(sbyte)value;
			}
		}

		public long Immediate8to64
		{
			readonly get
			{
				return (sbyte)immediate;
			}
			set
			{
				immediate = (uint)(sbyte)value;
			}
		}

		public long Immediate32to64
		{
			readonly get
			{
				return (int)immediate;
			}
			set
			{
				immediate = (uint)value;
			}
		}

		public ushort NearBranch16
		{
			readonly get
			{
				return (ushort)memDispl;
			}
			set
			{
				memDispl = value;
			}
		}

		internal uint InternalNearBranch16
		{
			set
			{
				memDispl = value;
			}
		}

		public uint NearBranch32
		{
			readonly get
			{
				return (uint)memDispl;
			}
			set
			{
				memDispl = value;
			}
		}

		public ulong NearBranch64
		{
			[MethodImpl(MethodImplOptions.AggressiveInlining)]
			readonly get
			{
				return memDispl;
			}
			[MethodImpl(MethodImplOptions.AggressiveInlining)]
			set
			{
				memDispl = value;
			}
		}

		public readonly ulong NearBranchTarget
		{
			get
			{
				OpKind opKind = Op0Kind;
				if (OpCount == 2)
				{
					opKind = Op1Kind;
				}
				return opKind switch
				{
					OpKind.NearBranch16 => NearBranch16, 
					OpKind.NearBranch32 => NearBranch32, 
					OpKind.NearBranch64 => NearBranch64, 
					_ => 0uL, 
				};
			}
		}

		public ushort FarBranch16
		{
			readonly get
			{
				return (ushort)immediate;
			}
			set
			{
				immediate = value;
			}
		}

		internal uint InternalFarBranch16
		{
			set
			{
				immediate = value;
			}
		}

		public uint FarBranch32
		{
			readonly get
			{
				return immediate;
			}
			set
			{
				immediate = value;
			}
		}

		public ushort FarBranchSelector
		{
			readonly get
			{
				return (ushort)memDispl;
			}
			set
			{
				memDispl = value;
			}
		}

		internal uint InternalFarBranchSelector
		{
			set
			{
				memDispl = value;
			}
		}

		public Register MemoryBase
		{
			readonly get
			{
				return (Register)memBaseReg;
			}
			set
			{
				memBaseReg = (byte)value;
			}
		}

		internal Register InternalMemoryBase
		{
			set
			{
				memBaseReg = (byte)value;
			}
		}

		public Register MemoryIndex
		{
			readonly get
			{
				return (Register)memIndexReg;
			}
			set
			{
				memIndexReg = (byte)value;
			}
		}

		internal Register InternalMemoryIndex
		{
			set
			{
				memIndexReg = (byte)value;
			}
		}

		public Register Op0Register
		{
			readonly get
			{
				return (Register)reg0;
			}
			set
			{
				reg0 = (byte)value;
			}
		}

		internal Register InternalOp0Register
		{
			set
			{
				reg0 = (byte)value;
			}
		}

		public Register Op1Register
		{
			readonly get
			{
				return (Register)reg1;
			}
			set
			{
				reg1 = (byte)value;
			}
		}

		internal Register InternalOp1Register
		{
			set
			{
				reg1 = (byte)value;
			}
		}

		public Register Op2Register
		{
			readonly get
			{
				return (Register)reg2;
			}
			set
			{
				reg2 = (byte)value;
			}
		}

		internal Register InternalOp2Register
		{
			set
			{
				reg2 = (byte)value;
			}
		}

		public Register Op3Register
		{
			readonly get
			{
				return (Register)reg3;
			}
			set
			{
				reg3 = (byte)value;
			}
		}

		internal Register InternalOp3Register
		{
			set
			{
				reg3 = (byte)value;
			}
		}

		public Register Op4Register
		{
			readonly get
			{
				return Register.None;
			}
			set
			{
				if (value != 0)
				{
					ThrowHelper.ThrowArgumentOutOfRangeException_value();
				}
			}
		}

		public Register OpMask
		{
			readonly get
			{
				int num = (int)((flags1 >> 15) & 7);
				if (num != 0)
				{
					return (Register)(num + 173);
				}
				return Register.None;
			}
			set
			{
				uint num = (uint)((value != 0) ? ((value - 173) & Register.DH) : Register.None);
				flags1 = (flags1 & 0xFFFC7FFFu) | (num << 15);
			}
		}

		internal uint InternalOpMask
		{
			[MethodImpl(MethodImplOptions.AggressiveInlining)]
			readonly get
			{
				return (flags1 >> 15) & 7u;
			}
			[MethodImpl(MethodImplOptions.AggressiveInlining)]
			set
			{
				flags1 |= value << 15;
			}
		}

		public readonly bool HasOpMask
		{
			[MethodImpl(MethodImplOptions.AggressiveInlining)]
			get
			{
				return (flags1 & 0x38000) != 0;
			}
		}

		internal readonly bool HasOpMask_or_ZeroingMasking
		{
			[MethodImpl(MethodImplOptions.AggressiveInlining)]
			get
			{
				return (flags1 & 0x10038000) != 0;
			}
		}

		public bool ZeroingMasking
		{
			[MethodImpl(MethodImplOptions.AggressiveInlining)]
			readonly get
			{
				return (flags1 & 0x10000000) != 0;
			}
			set
			{
				if (value)
				{
					flags1 |= 268435456u;
				}
				else
				{
					flags1 &= 4026531839u;
				}
			}
		}

		public bool MergingMasking
		{
			[MethodImpl(MethodImplOptions.AggressiveInlining)]
			readonly get
			{
				return (flags1 & 0x10000000) == 0;
			}
			set
			{
				if (value)
				{
					flags1 &= 4026531839u;
				}
				else
				{
					flags1 |= 268435456u;
				}
			}
		}

		public RoundingControl RoundingControl
		{
			[MethodImpl(MethodImplOptions.AggressiveInlining)]
			readonly get
			{
				return (RoundingControl)((int)(flags1 >> 12) & 7);
			}
			set
			{
				flags1 = (flags1 & 0xFFFF8FFFu) | (uint)((int)value << 12);
			}
		}

		internal uint InternalRoundingControl
		{
			[MethodImpl(MethodImplOptions.AggressiveInlining)]
			set
			{
				flags1 |= value << 12;
			}
		}

		internal readonly bool HasRoundingControlOrSae
		{
			[MethodImpl(MethodImplOptions.AggressiveInlining)]
			get
			{
				return (flags1 & 0x8007000) != 0;
			}
		}

		public int DeclareDataCount
		{
			[MethodImpl(MethodImplOptions.AggressiveInlining)]
			readonly get
			{
				return (int)(((flags1 >> 8) & 0xF) + 1);
			}
			set
			{
				flags1 = (flags1 & 0xFFFFF0FFu) | (uint)(((value - 1) & 0xF) << 8);
			}
		}

		internal uint InternalDeclareDataCount
		{
			[MethodImpl(MethodImplOptions.AggressiveInlining)]
			set
			{
				flags1 |= value - 1 << 8;
			}
		}

		public readonly bool IsVsib
		{
			get
			{
				bool vsib;
				return TryGetVsib64(out vsib);
			}
		}

		public readonly bool IsVsib32
		{
			get
			{
				if (TryGetVsib64(out var vsib))
				{
					return !vsib;
				}
				return false;
			}
		}

		public readonly bool IsVsib64
		{
			get
			{
				bool vsib;
				return TryGetVsib64(out vsib) && vsib;
			}
		}

		public bool SuppressAllExceptions
		{
			[MethodImpl(MethodImplOptions.AggressiveInlining)]
			readonly get
			{
				return (flags1 & 0x8000000) != 0;
			}
			set
			{
				if (value)
				{
					flags1 |= 134217728u;
				}
				else
				{
					flags1 &= 4160749567u;
				}
			}
		}

		public readonly bool IsIPRelativeMemoryOperand
		{
			[MethodImpl(MethodImplOptions.AggressiveInlining)]
			get
			{
				if (MemoryBase != Register.RIP)
				{
					return MemoryBase == Register.EIP;
				}
				return true;
			}
		}

		public readonly ulong IPRelativeMemoryAddress
		{
			get
			{
				if (MemoryBase != Register.EIP)
				{
					return MemoryDisplacement64;
				}
				return MemoryDisplacement32;
			}
		}

		public readonly OpCodeInfo OpCode
		{
			[MethodImpl(MethodImplOptions.AggressiveInlining)]
			get
			{
				return Code.ToOpCode();
			}
		}

		public readonly int StackPointerIncrement
		{
			get
			{
				switch (Code)
				{
				case Code.Pushad:
					return -32;
				case Code.Pushaw:
				case Code.Call_m1664:
					return -16;
				case Code.Push_r64:
				case Code.Pushq_imm32:
				case Code.Pushq_imm8:
				case Code.Call_ptr1632:
				case Code.Pushfq:
				case Code.Call_rel32_64:
				case Code.Call_rm64:
				case Code.Call_m1632:
				case Code.Push_rm64:
				case Code.Pushq_FS:
				case Code.Pushq_GS:
					return -8;
				case Code.Pushd_ES:
				case Code.Pushd_CS:
				case Code.Pushd_SS:
				case Code.Pushd_DS:
				case Code.Push_r32:
				case Code.Pushd_imm32:
				case Code.Pushd_imm8:
				case Code.Call_ptr1616:
				case Code.Pushfd:
				case Code.Call_rel32_32:
				case Code.Call_rm32:
				case Code.Call_m1616:
				case Code.Push_rm32:
				case Code.Pushd_FS:
				case Code.Pushd_GS:
					return -4;
				case Code.Pushw_ES:
				case Code.Pushw_CS:
				case Code.Pushw_SS:
				case Code.Pushw_DS:
				case Code.Push_r16:
				case Code.Push_imm16:
				case Code.Pushw_imm8:
				case Code.Pushfw:
				case Code.Call_rel16:
				case Code.Call_rm16:
				case Code.Push_rm16:
				case Code.Pushw_FS:
				case Code.Pushw_GS:
					return -2;
				case Code.Popw_ES:
				case Code.Popw_CS:
				case Code.Popw_SS:
				case Code.Popw_DS:
				case Code.Pop_r16:
				case Code.Pop_rm16:
				case Code.Popfw:
				case Code.Retnw:
				case Code.Popw_FS:
				case Code.Popw_GS:
					return 2;
				case Code.Popd_ES:
				case Code.Popd_SS:
				case Code.Popd_DS:
				case Code.Pop_r32:
				case Code.Pop_rm32:
				case Code.Popfd:
				case Code.Retnd:
				case Code.Retfw:
				case Code.Popd_FS:
				case Code.Popd_GS:
					return 4;
				case Code.Pop_r64:
				case Code.Pop_rm64:
				case Code.Popfq:
				case Code.Retnq:
				case Code.Retfd:
				case Code.Popq_FS:
				case Code.Popq_GS:
					return 8;
				case Code.Popaw:
				case Code.Retfq:
					return 16;
				case Code.Uiret:
					return 24;
				case Code.Popad:
					return 32;
				case Code.Iretq:
				case Code.Eretu:
				case Code.Erets:
					return 40;
				case Code.Enterw_imm16_imm8:
					return -(2 + (Immediate8_2nd & 0x1F) * 2 + Immediate16);
				case Code.Enterd_imm16_imm8:
					return -(4 + (Immediate8_2nd & 0x1F) * 4 + Immediate16);
				case Code.Enterq_imm16_imm8:
					return -(8 + (Immediate8_2nd & 0x1F) * 8 + Immediate16);
				case Code.Iretw:
					if (CodeSize != CodeSize.Code64)
					{
						return 6;
					}
					return 10;
				case Code.Iretd:
					if (CodeSize != CodeSize.Code64)
					{
						return 12;
					}
					return 20;
				case Code.Retnw_imm16:
					return 2 + Immediate16;
				case Code.Retnd_imm16:
				case Code.Retfw_imm16:
					return 4 + Immediate16;
				case Code.Retnq_imm16:
				case Code.Retfd_imm16:
					return 8 + Immediate16;
				case Code.Retfq_imm16:
					return 16 + Immediate16;
				default:
					return 0;
				}
			}
		}

		public readonly EncodingKind Encoding
		{
			[MethodImpl(MethodImplOptions.AggressiveInlining)]
			get
			{
				return Code.Encoding();
			}
		}

		public readonly CpuidFeature[] CpuidFeatures
		{
			[MethodImpl(MethodImplOptions.AggressiveInlining)]
			get
			{
				return Code.CpuidFeatures();
			}
		}

		public readonly FlowControl FlowControl
		{
			[MethodImpl(MethodImplOptions.AggressiveInlining)]
			get
			{
				return Code.FlowControl();
			}
		}

		public readonly bool IsPrivileged
		{
			[MethodImpl(MethodImplOptions.AggressiveInlining)]
			get
			{
				return Code.IsPrivileged();
			}
		}

		public readonly bool IsStackInstruction
		{
			[MethodImpl(MethodImplOptions.AggressiveInlining)]
			get
			{
				return Code.IsStackInstruction();
			}
		}

		public readonly bool IsSaveRestoreInstruction
		{
			[MethodImpl(MethodImplOptions.AggressiveInlining)]
			get
			{
				return Code.IsSaveRestoreInstruction();
			}
		}

		public readonly RflagsBits RflagsRead
		{
			[MethodImpl(MethodImplOptions.AggressiveInlining)]
			get
			{
				int rflagsInfo = (int)GetRflagsInfo();
				return (RflagsBits)RflagsInfoConstants.flagsRead[rflagsInfo];
			}
		}

		public readonly RflagsBits RflagsWritten
		{
			[MethodImpl(MethodImplOptions.AggressiveInlining)]
			get
			{
				int rflagsInfo = (int)GetRflagsInfo();
				return (RflagsBits)RflagsInfoConstants.flagsWritten[rflagsInfo];
			}
		}

		public readonly RflagsBits RflagsCleared
		{
			[MethodImpl(MethodImplOptions.AggressiveInlining)]
			get
			{
				int rflagsInfo = (int)GetRflagsInfo();
				return (RflagsBits)RflagsInfoConstants.flagsCleared[rflagsInfo];
			}
		}

		public readonly RflagsBits RflagsSet
		{
			[MethodImpl(MethodImplOptions.AggressiveInlining)]
			get
			{
				int rflagsInfo = (int)GetRflagsInfo();
				return (RflagsBits)RflagsInfoConstants.flagsSet[rflagsInfo];
			}
		}

		public readonly RflagsBits RflagsUndefined
		{
			[MethodImpl(MethodImplOptions.AggressiveInlining)]
			get
			{
				int rflagsInfo = (int)GetRflagsInfo();
				return (RflagsBits)RflagsInfoConstants.flagsUndefined[rflagsInfo];
			}
		}

		public readonly RflagsBits RflagsModified
		{
			[MethodImpl(MethodImplOptions.AggressiveInlining)]
			get
			{
				int rflagsInfo = (int)GetRflagsInfo();
				return (RflagsBits)RflagsInfoConstants.flagsModified[rflagsInfo];
			}
		}

		public readonly bool IsJccShortOrNear
		{
			[MethodImpl(MethodImplOptions.AggressiveInlining)]
			get
			{
				return Code.IsJccShortOrNear();
			}
		}

		public readonly bool IsJccNear
		{
			[MethodImpl(MethodImplOptions.AggressiveInlining)]
			get
			{
				return Code.IsJccNear();
			}
		}

		public readonly bool IsJccShort
		{
			[MethodImpl(MethodImplOptions.AggressiveInlining)]
			get
			{
				return Code.IsJccShort();
			}
		}

		public readonly bool IsJmpShort
		{
			[MethodImpl(MethodImplOptions.AggressiveInlining)]
			get
			{
				return Code.IsJmpShort();
			}
		}

		public readonly bool IsJmpNear
		{
			[MethodImpl(MethodImplOptions.AggressiveInlining)]
			get
			{
				return Code.IsJmpNear();
			}
		}

		public readonly bool IsJmpShortOrNear
		{
			[MethodImpl(MethodImplOptions.AggressiveInlining)]
			get
			{
				return Code.IsJmpShortOrNear();
			}
		}

		public readonly bool IsJmpFar
		{
			[MethodImpl(MethodImplOptions.AggressiveInlining)]
			get
			{
				return Code.IsJmpFar();
			}
		}

		public readonly bool IsCallNear
		{
			[MethodImpl(MethodImplOptions.AggressiveInlining)]
			get
			{
				return Code.IsCallNear();
			}
		}

		public readonly bool IsCallFar
		{
			[MethodImpl(MethodImplOptions.AggressiveInlining)]
			get
			{
				return Code.IsCallFar();
			}
		}

		public readonly bool IsJmpNearIndirect
		{
			[MethodImpl(MethodImplOptions.AggressiveInlining)]
			get
			{
				return Code.IsJmpNearIndirect();
			}
		}

		public readonly bool IsJmpFarIndirect
		{
			[MethodImpl(MethodImplOptions.AggressiveInlining)]
			get
			{
				return Code.IsJmpFarIndirect();
			}
		}

		public readonly bool IsCallNearIndirect
		{
			[MethodImpl(MethodImplOptions.AggressiveInlining)]
			get
			{
				return Code.IsCallNearIndirect();
			}
		}

		public readonly bool IsCallFarIndirect
		{
			[MethodImpl(MethodImplOptions.AggressiveInlining)]
			get
			{
				return Code.IsCallFarIndirect();
			}
		}

		public readonly bool IsJkccShortOrNear
		{
			[MethodImpl(MethodImplOptions.AggressiveInlining)]
			get
			{
				return Code.IsJkccShortOrNear();
			}
		}

		public readonly bool IsJkccNear
		{
			[MethodImpl(MethodImplOptions.AggressiveInlining)]
			get
			{
				return Code.IsJkccNear();
			}
		}

		public readonly bool IsJkccShort
		{
			[MethodImpl(MethodImplOptions.AggressiveInlining)]
			get
			{
				return Code.IsJkccShort();
			}
		}

		public readonly bool IsJcxShort
		{
			[MethodImpl(MethodImplOptions.AggressiveInlining)]
			get
			{
				return Code.IsJcxShort();
			}
		}

		public readonly bool IsLoopcc
		{
			[MethodImpl(MethodImplOptions.AggressiveInlining)]
			get
			{
				return Code.IsLoopcc();
			}
		}

		public readonly bool IsLoop
		{
			[MethodImpl(MethodImplOptions.AggressiveInlining)]
			get
			{
				return Code.IsLoop();
			}
		}

		public readonly ConditionCode ConditionCode
		{
			[MethodImpl(MethodImplOptions.AggressiveInlining)]
			get
			{
				return Code.ConditionCode();
			}
		}

		public readonly bool IsStringInstruction
		{
			[MethodImpl(MethodImplOptions.AggressiveInlining)]
			get
			{
				return Code.IsStringInstruction();
			}
		}

		private static void InitializeSignedImmediate(ref Instruction instruction, int operand, long immediate)
		{
			OpKind immediateOpKind = GetImmediateOpKind(instruction.Code, operand);
			instruction.SetOpKind(operand, immediateOpKind);
			switch (immediateOpKind)
			{
			case OpKind.Immediate8:
				if (-128 > immediate || immediate > 255)
				{
					throw new ArgumentOutOfRangeException("immediate");
				}
				instruction.InternalImmediate8 = (byte)immediate;
				break;
			case OpKind.Immediate8_2nd:
				if (-128 > immediate || immediate > 255)
				{
					throw new ArgumentOutOfRangeException("immediate");
				}
				instruction.InternalImmediate8_2nd = (byte)immediate;
				break;
			case OpKind.Immediate8to16:
				if (-128 > immediate || immediate > 127)
				{
					throw new ArgumentOutOfRangeException("immediate");
				}
				instruction.InternalImmediate8 = (byte)immediate;
				break;
			case OpKind.Immediate8to32:
				if (-128 > immediate || immediate > 127)
				{
					throw new ArgumentOutOfRangeException("immediate");
				}
				instruction.InternalImmediate8 = (byte)immediate;
				break;
			case OpKind.Immediate8to64:
				if (-128 > immediate || immediate > 127)
				{
					throw new ArgumentOutOfRangeException("immediate");
				}
				instruction.InternalImmediate8 = (byte)immediate;
				break;
			case OpKind.Immediate16:
				if (-32768 > immediate || immediate > 65535)
				{
					throw new ArgumentOutOfRangeException("immediate");
				}
				instruction.InternalImmediate16 = (ushort)immediate;
				break;
			case OpKind.Immediate32:
				if (int.MinValue > immediate || immediate > uint.MaxValue)
				{
					throw new ArgumentOutOfRangeException("immediate");
				}
				instruction.Immediate32 = (uint)immediate;
				break;
			case OpKind.Immediate32to64:
				if (int.MinValue > immediate || immediate > int.MaxValue)
				{
					throw new ArgumentOutOfRangeException("immediate");
				}
				instruction.Immediate32 = (uint)immediate;
				break;
			case OpKind.Immediate64:
				instruction.Immediate64 = (ulong)immediate;
				break;
			default:
				throw new ArgumentOutOfRangeException("instruction");
			}
		}

		private static void InitializeUnsignedImmediate(ref Instruction instruction, int operand, ulong immediate)
		{
			OpKind immediateOpKind = GetImmediateOpKind(instruction.Code, operand);
			instruction.SetOpKind(operand, immediateOpKind);
			switch (immediateOpKind)
			{
			case OpKind.Immediate8:
				if (immediate > 255)
				{
					throw new ArgumentOutOfRangeException("immediate");
				}
				instruction.InternalImmediate8 = (byte)immediate;
				break;
			case OpKind.Immediate8_2nd:
				if (immediate > 255)
				{
					throw new ArgumentOutOfRangeException("immediate");
				}
				instruction.InternalImmediate8_2nd = (byte)immediate;
				break;
			case OpKind.Immediate8to16:
				if (immediate > 127 && (65408 > immediate || immediate > 65535))
				{
					throw new ArgumentOutOfRangeException("immediate");
				}
				instruction.InternalImmediate8 = (byte)immediate;
				break;
			case OpKind.Immediate8to32:
				if (immediate > 127 && (4294967168u > immediate || immediate > uint.MaxValue))
				{
					throw new ArgumentOutOfRangeException("immediate");
				}
				instruction.InternalImmediate8 = (byte)immediate;
				break;
			case OpKind.Immediate8to64:
				if (immediate + 128 > 255)
				{
					throw new ArgumentOutOfRangeException("immediate");
				}
				instruction.InternalImmediate8 = (byte)immediate;
				break;
			case OpKind.Immediate16:
				if (immediate > 65535)
				{
					throw new ArgumentOutOfRangeException("immediate");
				}
				instruction.InternalImmediate16 = (ushort)immediate;
				break;
			case OpKind.Immediate32:
				if (immediate > uint.MaxValue)
				{
					throw new ArgumentOutOfRangeException("immediate");
				}
				instruction.Immediate32 = (uint)immediate;
				break;
			case OpKind.Immediate32to64:
				if (immediate + 2147483648u > uint.MaxValue)
				{
					throw new ArgumentOutOfRangeException("immediate");
				}
				instruction.Immediate32 = (uint)immediate;
				break;
			case OpKind.Immediate64:
				instruction.Immediate64 = immediate;
				break;
			default:
				throw new ArgumentOutOfRangeException("instruction");
			}
		}

		private static OpKind GetImmediateOpKind(Code code, int operand)
		{
			Iced.Intel.EncoderInternal.OpCodeHandler[] handlers = OpCodeHandlers.Handlers;
			if ((uint)code >= (uint)handlers.Length)
			{
				throw new ArgumentOutOfRangeException("code");
			}
			Op[] operands = handlers[(int)code].Operands;
			if ((uint)operand >= (uint)operands.Length)
			{
				throw new ArgumentOutOfRangeException("operand", $"{code} doesn't have at least {operand + 1} operands");
			}
			OpKind opKind = operands[operand].GetImmediateOpKind();
			if (opKind == OpKind.Immediate8 && operand > 0 && operand + 1 == operands.Length)
			{
				OpKind immediateOpKind = operands[operand - 1].GetImmediateOpKind();
				if (immediateOpKind == OpKind.Immediate8 || immediateOpKind == OpKind.Immediate16)
				{
					opKind = OpKind.Immediate8_2nd;
				}
			}
			if (opKind == (OpKind)(-1))
			{
				throw new ArgumentException($"{code}'s op{operand} isn't an immediate operand");
			}
			return opKind;
		}

		private static OpKind GetNearBranchOpKind(Code code, int operand)
		{
			Iced.Intel.EncoderInternal.OpCodeHandler[] handlers = OpCodeHandlers.Handlers;
			if ((uint)code >= (uint)handlers.Length)
			{
				throw new ArgumentOutOfRangeException("code");
			}
			Op[] operands = handlers[(int)code].Operands;
			if ((uint)operand >= (uint)operands.Length)
			{
				throw new ArgumentOutOfRangeException("operand", $"{code} doesn't have at least {operand + 1} operands");
			}
			OpKind nearBranchOpKind = operands[operand].GetNearBranchOpKind();
			if (nearBranchOpKind == (OpKind)(-1))
			{
				throw new ArgumentException($"{code}'s op{operand} isn't a near branch operand");
			}
			return nearBranchOpKind;
		}

		private static OpKind GetFarBranchOpKind(Code code, int operand)
		{
			Iced.Intel.EncoderInternal.OpCodeHandler[] handlers = OpCodeHandlers.Handlers;
			if ((uint)code >= (uint)handlers.Length)
			{
				throw new ArgumentOutOfRangeException("code");
			}
			Op[] operands = handlers[(int)code].Operands;
			if ((uint)operand >= (uint)operands.Length)
			{
				throw new ArgumentOutOfRangeException("operand", $"{code} doesn't have at least {operand + 1} operands");
			}
			OpKind farBranchOpKind = operands[operand].GetFarBranchOpKind();
			if (farBranchOpKind == (OpKind)(-1))
			{
				throw new ArgumentException($"{code}'s op{operand} isn't a far branch operand");
			}
			return farBranchOpKind;
		}

		private static Instruction CreateString_Reg_SegRSI(Code code, int addressSize, Register register, Register segmentPrefix, RepPrefixKind repPrefix)
		{
			Instruction result = default(Instruction);
			result.Code = code;
			switch (repPrefix)
			{
			case RepPrefixKind.Repe:
				result.InternalSetHasRepePrefix();
				break;
			case RepPrefixKind.Repne:
				result.InternalSetHasRepnePrefix();
				break;
			}
			result.Op0Register = register;
			switch (addressSize)
			{
			case 64:
				result.Op1Kind = OpKind.MemorySegRSI;
				break;
			case 32:
				result.Op1Kind = OpKind.MemorySegESI;
				break;
			case 16:
				result.Op1Kind = OpKind.MemorySegSI;
				break;
			default:
				throw new ArgumentOutOfRangeException("addressSize");
			}
			result.SegmentPrefix = segmentPrefix;
			return result;
		}

		private static Instruction CreateString_Reg_ESRDI(Code code, int addressSize, Register register, RepPrefixKind repPrefix)
		{
			Instruction result = default(Instruction);
			result.Code = code;
			switch (repPrefix)
			{
			case RepPrefixKind.Repe:
				result.InternalSetHasRepePrefix();
				break;
			case RepPrefixKind.Repne:
				result.InternalSetHasRepnePrefix();
				break;
			}
			result.Op0Register = register;
			switch (addressSize)
			{
			case 64:
				result.Op1Kind = OpKind.MemoryESRDI;
				break;
			case 32:
				result.Op1Kind = OpKind.MemoryESEDI;
				break;
			case 16:
				result.Op1Kind = OpKind.MemoryESDI;
				break;
			default:
				throw new ArgumentOutOfRangeException("addressSize");
			}
			return result;
		}

		private static Instruction CreateString_ESRDI_Reg(Code code, int addressSize, Register register, RepPrefixKind repPrefix)
		{
			Instruction result = default(Instruction);
			result.Code = code;
			switch (repPrefix)
			{
			case RepPrefixKind.Repe:
				result.InternalSetHasRepePrefix();
				break;
			case RepPrefixKind.Repne:
				result.InternalSetHasRepnePrefix();
				break;
			}
			switch (addressSize)
			{
			case 64:
				result.Op0Kind = OpKind.MemoryESRDI;
				break;
			case 32:
				result.Op0Kind = OpKind.MemoryESEDI;
				break;
			case 16:
				result.Op0Kind = OpKind.MemoryESDI;
				break;
			default:
				throw new ArgumentOutOfRangeException("addressSize");
			}
			result.Op1Register = register;
			return result;
		}

		private static Instruction CreateString_SegRSI_ESRDI(Code code, int addressSize, Register segmentPrefix, RepPrefixKind repPrefix)
		{
			Instruction result = default(Instruction);
			result.Code = code;
			switch (repPrefix)
			{
			case RepPrefixKind.Repe:
				result.InternalSetHasRepePrefix();
				break;
			case RepPrefixKind.Repne:
				result.InternalSetHasRepnePrefix();
				break;
			}
			switch (addressSize)
			{
			case 64:
				result.Op0Kind = OpKind.MemorySegRSI;
				result.Op1Kind = OpKind.MemoryESRDI;
				break;
			case 32:
				result.Op0Kind = OpKind.MemorySegESI;
				result.Op1Kind = OpKind.MemoryESEDI;
				break;
			case 16:
				result.Op0Kind = OpKind.MemorySegSI;
				result.Op1Kind = OpKind.MemoryESDI;
				break;
			default:
				throw new ArgumentOutOfRangeException("addressSize");
			}
			result.SegmentPrefix = segmentPrefix;
			return result;
		}

		private static Instruction CreateString_ESRDI_SegRSI(Code code, int addressSize, Register segmentPrefix, RepPrefixKind repPrefix)
		{
			Instruction result = default(Instruction);
			result.Code = code;
			switch (repPrefix)
			{
			case RepPrefixKind.Repe:
				result.InternalSetHasRepePrefix();
				break;
			case RepPrefixKind.Repne:
				result.InternalSetHasRepnePrefix();
				break;
			}
			switch (addressSize)
			{
			case 64:
				result.Op0Kind = OpKind.MemoryESRDI;
				result.Op1Kind = OpKind.MemorySegRSI;
				break;
			case 32:
				result.Op0Kind = OpKind.MemoryESEDI;
				result.Op1Kind = OpKind.MemorySegESI;
				break;
			case 16:
				result.Op0Kind = OpKind.MemoryESDI;
				result.Op1Kind = OpKind.MemorySegSI;
				break;
			default:
				throw new ArgumentOutOfRangeException("addressSize");
			}
			result.SegmentPrefix = segmentPrefix;
			return result;
		}

		private static Instruction CreateMaskmov(Code code, int addressSize, Register register1, Register register2, Register segmentPrefix)
		{
			Instruction result = default(Instruction);
			result.Code = code;
			switch (addressSize)
			{
			case 64:
				result.Op0Kind = OpKind.MemorySegRDI;
				break;
			case 32:
				result.Op0Kind = OpKind.MemorySegEDI;
				break;
			case 16:
				result.Op0Kind = OpKind.MemorySegDI;
				break;
			default:
				throw new ArgumentOutOfRangeException("addressSize");
			}
			result.Op1Register = register1;
			result.Op2Register = register2;
			result.SegmentPrefix = segmentPrefix;
			return result;
		}

		private static void InitMemoryOperand(ref Instruction instruction, in MemoryOperand memory)
		{
			instruction.InternalMemoryBase = memory.Base;
			instruction.InternalMemoryIndex = memory.Index;
			instruction.MemoryIndexScale = memory.Scale;
			instruction.MemoryDisplSize = memory.DisplSize;
			instruction.MemoryDisplacement64 = (ulong)memory.Displacement;
			instruction.IsBroadcast = memory.IsBroadcast;
			instruction.SegmentPrefix = memory.SegmentPrefix;
		}

		public static Instruction Create(Code code)
		{
			Instruction result = default(Instruction);
			result.Code = code;
			return result;
		}

		public static Instruction Create(Code code, Register register)
		{
			Instruction result = default(Instruction);
			result.Code = code;
			result.Op0Register = register;
			return result;
		}

		public static Instruction Create(Code code, int immediate)
		{
			Instruction instruction = default(Instruction);
			instruction.Code = code;
			InitializeSignedImmediate(ref instruction, 0, immediate);
			return instruction;
		}

		public static Instruction Create(Code code, uint immediate)
		{
			Instruction instruction = default(Instruction);
			instruction.Code = code;
			InitializeUnsignedImmediate(ref instruction, 0, immediate);
			return instruction;
		}

		public static Instruction Create(Code code, in MemoryOperand memory)
		{
			Instruction instruction = default(Instruction);
			instruction.Code = code;
			instruction.Op0Kind = OpKind.Memory;
			InitMemoryOperand(ref instruction, in memory);
			return instruction;
		}

		public static Instruction Create(Code code, Register register1, Register register2)
		{
			Instruction result = default(Instruction);
			result.Code = code;
			result.Op0Register = register1;
			result.Op1Register = register2;
			return result;
		}

		public static Instruction Create(Code code, Register register, int immediate)
		{
			Instruction instruction = default(Instruction);
			instruction.Code = code;
			instruction.Op0Register = register;
			InitializeSignedImmediate(ref instruction, 1, immediate);
			return instruction;
		}

		public static Instruction Create(Code code, Register register, uint immediate)
		{
			Instruction instruction = default(Instruction);
			instruction.Code = code;
			instruction.Op0Register = register;
			InitializeUnsignedImmediate(ref instruction, 1, immediate);
			return instruction;
		}

		public static Instruction Create(Code code, Register register, long immediate)
		{
			Instruction instruction = default(Instruction);
			instruction.Code = code;
			instruction.Op0Register = register;
			InitializeSignedImmediate(ref instruction, 1, immediate);
			return instruction;
		}

		public static Instruction Create(Code code, Register register, ulong immediate)
		{
			Instruction instruction = default(Instruction);
			instruction.Code = code;
			instruction.Op0Register = register;
			InitializeUnsignedImmediate(ref instruction, 1, immediate);
			return instruction;
		}

		public static Instruction Create(Code code, Register register, in MemoryOperand memory)
		{
			Instruction instruction = default(Instruction);
			instruction.Code = code;
			instruction.Op0Register = register;
			instruction.Op1Kind = OpKind.Memory;
			InitMemoryOperand(ref instruction, in memory);
			return instruction;
		}

		public static Instruction Create(Code code, int immediate, Register register)
		{
			Instruction instruction = default(Instruction);
			instruction.Code = code;
			InitializeSignedImmediate(ref instruction, 0, immediate);
			instruction.Op1Register = register;
			return instruction;
		}

		public static Instruction Create(Code code, uint immediate, Register register)
		{
			Instruction instruction = default(Instruction);
			instruction.Code = code;
			InitializeUnsignedImmediate(ref instruction, 0, immediate);
			instruction.Op1Register = register;
			return instruction;
		}

		public static Instruction Create(Code code, int immediate1, int immediate2)
		{
			Instruction instruction = default(Instruction);
			instruction.Code = code;
			InitializeSignedImmediate(ref instruction, 0, immediate1);
			InitializeSignedImmediate(ref instruction, 1, immediate2);
			return instruction;
		}

		public static Instruction Create(Code code, uint immediate1, uint immediate2)
		{
			Instruction instruction = default(Instruction);
			instruction.Code = code;
			InitializeUnsignedImmediate(ref instruction, 0, immediate1);
			InitializeUnsignedImmediate(ref instruction, 1, immediate2);
			return instruction;
		}

		public static Instruction Create(Code code, in MemoryOperand memory, Register register)
		{
			Instruction instruction = default(Instruction);
			instruction.Code = code;
			instruction.Op0Kind = OpKind.Memory;
			InitMemoryOperand(ref instruction, in memory);
			instruction.Op1Register = register;
			return instruction;
		}

		public static Instruction Create(Code code, in MemoryOperand memory, int immediate)
		{
			Instruction instruction = default(Instruction);
			instruction.Code = code;
			instruction.Op0Kind = OpKind.Memory;
			InitMemoryOperand(ref instruction, in memory);
			InitializeSignedImmediate(ref instruction, 1, immediate);
			return instruction;
		}

		public static Instruction Create(Code code, in MemoryOperand memory, uint immediate)
		{
			Instruction instruction = default(Instruction);
			instruction.Code = code;
			instruction.Op0Kind = OpKind.Memory;
			InitMemoryOperand(ref instruction, in memory);
			InitializeUnsignedImmediate(ref instruction, 1, immediate);
			return instruction;
		}

		public static Instruction Create(Code code, Register register1, Register register2, Register register3)
		{
			Instruction result = default(Instruction);
			result.Code = code;
			result.Op0Register = register1;
			result.Op1Register = register2;
			result.Op2Register = register3;
			return result;
		}

		public static Instruction Create(Code code, Register register1, Register register2, int immediate)
		{
			Instruction instruction = default(Instruction);
			instruction.Code = code;
			instruction.Op0Register = register1;
			instruction.Op1Register = register2;
			InitializeSignedImmediate(ref instruction, 2, immediate);
			return instruction;
		}

		public static Instruction Create(Code code, Register register1, Register register2, uint immediate)
		{
			Instruction instruction = default(Instruction);
			instruction.Code = code;
			instruction.Op0Register = register1;
			instruction.Op1Register = register2;
			InitializeUnsignedImmediate(ref instruction, 2, immediate);
			return instruction;
		}

		public static Instruction Create(Code code, Register register1, Register register2, in MemoryOperand memory)
		{
			Instruction instruction = default(Instruction);
			instruction.Code = code;
			instruction.Op0Register = register1;
			instruction.Op1Register = register2;
			instruction.Op2Kind = OpKind.Memory;
			InitMemoryOperand(ref instruction, in memory);
			return instruction;
		}

		public static Instruction Create(Code code, Register register, int immediate1, int immediate2)
		{
			Instruction instruction = default(Instruction);
			instruction.Code = code;
			instruction.Op0Register = register;
			InitializeSignedImmediate(ref instruction, 1, immediate1);
			InitializeSignedImmediate(ref instruction, 2, immediate2);
			return instruction;
		}

		public static Instruction Create(Code code, Register register, uint immediate1, uint immediate2)
		{
			Instruction instruction = default(Instruction);
			instruction.Code = code;
			instruction.Op0Register = register;
			InitializeUnsignedImmediate(ref instruction, 1, immediate1);
			InitializeUnsignedImmediate(ref instruction, 2, immediate2);
			return instruction;
		}

		public static Instruction Create(Code code, Register register1, in MemoryOperand memory, Register register2)
		{
			Instruction instruction = default(Instruction);
			instruction.Code = code;
			instruction.Op0Register = register1;
			instruction.Op1Kind = OpKind.Memory;
			InitMemoryOperand(ref instruction, in memory);
			instruction.Op2Register = register2;
			return instruction;
		}

		public static Instruction Create(Code code, Register register, in MemoryOperand memory, int immediate)
		{
			Instruction instruction = default(Instruction);
			instruction.Code = code;
			instruction.Op0Register = register;
			instruction.Op1Kind = OpKind.Memory;
			InitMemoryOperand(ref instruction, in memory);
			InitializeSignedImmediate(ref instruction, 2, immediate);
			return instruction;
		}

		public static Instruction Create(Code code, Register register, in MemoryOperand memory, uint immediate)
		{
			Instruction instruction = default(Instruction);
			instruction.Code = code;
			instruction.Op0Register = register;
			instruction.Op1Kind = OpKind.Memory;
			InitMemoryOperand(ref instruction, in memory);
			InitializeUnsignedImmediate(ref instruction, 2, immediate);
			return instruction;
		}

		public static Instruction Create(Code code, in MemoryOperand memory, Register register1, Register register2)
		{
			Instruction instruction = default(Instruction);
			instruction.Code = code;
			instruction.Op0Kind = OpKind.Memory;
			InitMemoryOperand(ref instruction, in memory);
			instruction.Op1Register = register1;
			instruction.Op2Register = register2;
			return instruction;
		}

		public static Instruction Create(Code code, in MemoryOperand memory, Register register, int immediate)
		{
			Instruction instruction = default(Instruction);
			instruction.Code = code;
			instruction.Op0Kind = OpKind.Memory;
			InitMemoryOperand(ref instruction, in memory);
			instruction.Op1Register = register;
			InitializeSignedImmediate(ref instruction, 2, immediate);
			return instruction;
		}

		public static Instruction Create(Code code, in MemoryOperand memory, Register register, uint immediate)
		{
			Instruction instruction = default(Instruction);
			instruction.Code = code;
			instruction.Op0Kind = OpKind.Memory;
			InitMemoryOperand(ref instruction, in memory);
			instruction.Op1Register = register;
			InitializeUnsignedImmediate(ref instruction, 2, immediate);
			return instruction;
		}

		public static Instruction Create(Code code, Register register1, Register register2, Register register3, Register register4)
		{
			Instruction result = default(Instruction);
			result.Code = code;
			result.Op0Register = register1;
			result.Op1Register = register2;
			result.Op2Register = register3;
			result.Op3Register = register4;
			return result;
		}

		public static Instruction Create(Code code, Register register1, Register register2, Register register3, int immediate)
		{
			Instruction instruction = default(Instruction);
			instruction.Code = code;
			instruction.Op0Register = register1;
			instruction.Op1Register = register2;
			instruction.Op2Register = register3;
			InitializeSignedImmediate(ref instruction, 3, immediate);
			return instruction;
		}

		public static Instruction Create(Code code, Register register1, Register register2, Register register3, uint immediate)
		{
			Instruction instruction = default(Instruction);
			instruction.Code = code;
			instruction.Op0Register = register1;
			instruction.Op1Register = register2;
			instruction.Op2Register = register3;
			InitializeUnsignedImmediate(ref instruction, 3, immediate);
			return instruction;
		}

		public static Instruction Create(Code code, Register register1, Register register2, Register register3, in MemoryOperand memory)
		{
			Instruction instruction = default(Instruction);
			instruction.Code = code;
			instruction.Op0Register = register1;
			instruction.Op1Register = register2;
			instruction.Op2Register = register3;
			instruction.Op3Kind = OpKind.Memory;
			InitMemoryOperand(ref instruction, in memory);
			return instruction;
		}

		public static Instruction Create(Code code, Register register1, Register register2, int immediate1, int immediate2)
		{
			Instruction instruction = default(Instruction);
			instruction.Code = code;
			instruction.Op0Register = register1;
			instruction.Op1Register = register2;
			InitializeSignedImmediate(ref instruction, 2, immediate1);
			InitializeSignedImmediate(ref instruction, 3, immediate2);
			return instruction;
		}

		public static Instruction Create(Code code, Register register1, Register register2, uint immediate1, uint immediate2)
		{
			Instruction instruction = default(Instruction);
			instruction.Code = code;
			instruction.Op0Register = register1;
			instruction.Op1Register = register2;
			InitializeUnsignedImmediate(ref instruction, 2, immediate1);
			InitializeUnsignedImmediate(ref instruction, 3, immediate2);
			return instruction;
		}

		public static Instruction Create(Code code, Register register1, Register register2, in MemoryOperand memory, Register register3)
		{
			Instruction instruction = default(Instruction);
			instruction.Code = code;
			instruction.Op0Register = register1;
			instruction.Op1Register = register2;
			instruction.Op2Kind = OpKind.Memory;
			InitMemoryOperand(ref instruction, in memory);
			instruction.Op3Register = register3;
			return instruction;
		}

		public static Instruction Create(Code code, Register register1, Register register2, in MemoryOperand memory, int immediate)
		{
			Instruction instruction = default(Instruction);
			instruction.Code = code;
			instruction.Op0Register = register1;
			instruction.Op1Register = register2;
			instruction.Op2Kind = OpKind.Memory;
			InitMemoryOperand(ref instruction, in memory);
			InitializeSignedImmediate(ref instruction, 3, immediate);
			return instruction;
		}

		public static Instruction Create(Code code, Register register1, Register register2, in MemoryOperand memory, uint immediate)
		{
			Instruction instruction = default(Instruction);
			instruction.Code = code;
			instruction.Op0Register = register1;
			instruction.Op1Register = register2;
			instruction.Op2Kind = OpKind.Memory;
			InitMemoryOperand(ref instruction, in memory);
			InitializeUnsignedImmediate(ref instruction, 3, immediate);
			return instruction;
		}

		public static Instruction Create(Code code, Register register1, Register register2, Register register3, Register register4, int immediate)
		{
			Instruction instruction = default(Instruction);
			instruction.Code = code;
			instruction.Op0Register = register1;
			instruction.Op1Register = register2;
			instruction.Op2Register = register3;
			instruction.Op3Register = register4;
			InitializeSignedImmediate(ref instruction, 4, immediate);
			return instruction;
		}

		public static Instruction Create(Code code, Register register1, Register register2, Register register3, Register register4, uint immediate)
		{
			Instruction instruction = default(Instruction);
			instruction.Code = code;
			instruction.Op0Register = register1;
			instruction.Op1Register = register2;
			instruction.Op2Register = register3;
			instruction.Op3Register = register4;
			InitializeUnsignedImmediate(ref instruction, 4, immediate);
			return instruction;
		}

		public static Instruction Create(Code code, Register register1, Register register2, Register register3, in MemoryOperand memory, int immediate)
		{
			Instruction instruction = default(Instruction);
			instruction.Code = code;
			instruction.Op0Register = register1;
			instruction.Op1Register = register2;
			instruction.Op2Register = register3;
			instruction.Op3Kind = OpKind.Memory;
			InitMemoryOperand(ref instruction, in memory);
			InitializeSignedImmediate(ref instruction, 4, immediate);
			return instruction;
		}

		public static Instruction Create(Code code, Register register1, Register register2, Register register3, in MemoryOperand memory, uint immediate)
		{
			Instruction instruction = default(Instruction);
			instruction.Code = code;
			instruction.Op0Register = register1;
			instruction.Op1Register = register2;
			instruction.Op2Register = register3;
			instruction.Op3Kind = OpKind.Memory;
			InitMemoryOperand(ref instruction, in memory);
			InitializeUnsignedImmediate(ref instruction, 4, immediate);
			return instruction;
		}

		public static Instruction Create(Code code, Register register1, Register register2, in MemoryOperand memory, Register register3, int immediate)
		{
			Instruction instruction = default(Instruction);
			instruction.Code = code;
			instruction.Op0Register = register1;
			instruction.Op1Register = register2;
			instruction.Op2Kind = OpKind.Memory;
			InitMemoryOperand(ref instruction, in memory);
			instruction.Op3Register = register3;
			InitializeSignedImmediate(ref instruction, 4, immediate);
			return instruction;
		}

		public static Instruction Create(Code code, Register register1, Register register2, in MemoryOperand memory, Register register3, uint immediate)
		{
			Instruction instruction = default(Instruction);
			instruction.Code = code;
			instruction.Op0Register = register1;
			instruction.Op1Register = register2;
			instruction.Op2Kind = OpKind.Memory;
			InitMemoryOperand(ref instruction, in memory);
			instruction.Op3Register = register3;
			InitializeUnsignedImmediate(ref instruction, 4, immediate);
			return instruction;
		}

		public static Instruction CreateBranch(Code code, ulong target)
		{
			Instruction result = default(Instruction);
			result.Code = code;
			result.Op0Kind = GetNearBranchOpKind(code, 0);
			result.NearBranch64 = target;
			return result;
		}

		public static Instruction CreateBranch(Code code, ushort selector, uint offset)
		{
			Instruction result = default(Instruction);
			result.Code = code;
			result.Op0Kind = GetFarBranchOpKind(code, 0);
			result.FarBranchSelector = selector;
			result.FarBranch32 = offset;
			return result;
		}

		public static Instruction CreateXbegin(int bitness, ulong target)
		{
			Instruction result = default(Instruction);
			switch (bitness)
			{
			case 16:
				result.Code = Code.Xbegin_rel16;
				result.Op0Kind = OpKind.NearBranch32;
				result.NearBranch32 = (uint)target;
				break;
			case 32:
				result.Code = Code.Xbegin_rel32;
				result.Op0Kind = OpKind.NearBranch32;
				result.NearBranch32 = (uint)target;
				break;
			case 64:
				result.Code = Code.Xbegin_rel32;
				result.Op0Kind = OpKind.NearBranch64;
				result.NearBranch64 = target;
				break;
			default:
				throw new ArgumentOutOfRangeException("bitness");
			}
			return result;
		}

		public static Instruction CreateOutsb(int addressSize, Register segmentPrefix = Register.None, RepPrefixKind repPrefix = RepPrefixKind.None)
		{
			return CreateString_Reg_SegRSI(Code.Outsb_DX_m8, addressSize, Register.DX, segmentPrefix, repPrefix);
		}

		public static Instruction CreateRepOutsb(int addressSize)
		{
			return CreateString_Reg_SegRSI(Code.Outsb_DX_m8, addressSize, Register.DX, Register.None, RepPrefixKind.Repe);
		}

		public static Instruction CreateOutsw(int addressSize, Register segmentPrefix = Register.None, RepPrefixKind repPrefix = RepPrefixKind.None)
		{
			return CreateString_Reg_SegRSI(Code.Outsw_DX_m16, addressSize, Register.DX, segmentPrefix, repPrefix);
		}

		public static Instruction CreateRepOutsw(int addressSize)
		{
			return CreateString_Reg_SegRSI(Code.Outsw_DX_m16, addressSize, Register.DX, Register.None, RepPrefixKind.Repe);
		}

		public static Instruction CreateOutsd(int addressSize, Register segmentPrefix = Register.None, RepPrefixKind repPrefix = RepPrefixKind.None)
		{
			return CreateString_Reg_SegRSI(Code.Outsd_DX_m32, addressSize, Register.DX, segmentPrefix, repPrefix);
		}

		public static Instruction CreateRepOutsd(int addressSize)
		{
			return CreateString_Reg_SegRSI(Code.Outsd_DX_m32, addressSize, Register.DX, Register.None, RepPrefixKind.Repe);
		}

		public static Instruction CreateLodsb(int addressSize, Register segmentPrefix = Register.None, RepPrefixKind repPrefix = RepPrefixKind.None)
		{
			return CreateString_Reg_SegRSI(Code.Lodsb_AL_m8, addressSize, Register.AL, segmentPrefix, repPrefix);
		}

		public static Instruction CreateRepLodsb(int addressSize)
		{
			return CreateString_Reg_SegRSI(Code.Lodsb_AL_m8, addressSize, Register.AL, Register.None, RepPrefixKind.Repe);
		}

		public static Instruction CreateLodsw(int addressSize, Register segmentPrefix = Register.None, RepPrefixKind repPrefix = RepPrefixKind.None)
		{
			return CreateString_Reg_SegRSI(Code.Lodsw_AX_m16, addressSize, Register.AX, segmentPrefix, repPrefix);
		}

		public static Instruction CreateRepLodsw(int addressSize)
		{
			return CreateString_Reg_SegRSI(Code.Lodsw_AX_m16, addressSize, Register.AX, Register.None, RepPrefixKind.Repe);
		}

		public static Instruction CreateLodsd(int addressSize, Register segmentPrefix = Register.None, RepPrefixKind repPrefix = RepPrefixKind.None)
		{
			return CreateString_Reg_SegRSI(Code.Lodsd_EAX_m32, addressSize, Register.EAX, segmentPrefix, repPrefix);
		}

		public static Instruction CreateRepLodsd(int addressSize)
		{
			return CreateString_Reg_SegRSI(Code.Lodsd_EAX_m32, addressSize, Register.EAX, Register.None, RepPrefixKind.Repe);
		}

		public static Instruction CreateLodsq(int addressSize, Register segmentPrefix = Register.None, RepPrefixKind repPrefix = RepPrefixKind.None)
		{
			return CreateString_Reg_SegRSI(Code.Lodsq_RAX_m64, addressSize, Register.RAX, segmentPrefix, repPrefix);
		}

		public static Instruction CreateRepLodsq(int addressSize)
		{
			return CreateString_Reg_SegRSI(Code.Lodsq_RAX_m64, addressSize, Register.RAX, Register.None, RepPrefixKind.Repe);
		}

		public static Instruction CreateScasb(int addressSize, RepPrefixKind repPrefix = RepPrefixKind.None)
		{
			return CreateString_Reg_ESRDI(Code.Scasb_AL_m8, addressSize, Register.AL, repPrefix);
		}

		public static Instruction CreateRepeScasb(int addressSize)
		{
			return CreateString_Reg_ESRDI(Code.Scasb_AL_m8, addressSize, Register.AL, RepPrefixKind.Repe);
		}

		public static Instruction CreateRepneScasb(int addressSize)
		{
			return CreateString_Reg_ESRDI(Code.Scasb_AL_m8, addressSize, Register.AL, RepPrefixKind.Repne);
		}

		public static Instruction CreateScasw(int addressSize, RepPrefixKind repPrefix = RepPrefixKind.None)
		{
			return CreateString_Reg_ESRDI(Code.Scasw_AX_m16, addressSize, Register.AX, repPrefix);
		}

		public static Instruction CreateRepeScasw(int addressSize)
		{
			return CreateString_Reg_ESRDI(Code.Scasw_AX_m16, addressSize, Register.AX, RepPrefixKind.Repe);
		}

		public static Instruction CreateRepneScasw(int addressSize)
		{
			return CreateString_Reg_ESRDI(Code.Scasw_AX_m16, addressSize, Register.AX, RepPrefixKind.Repne);
		}

		public static Instruction CreateScasd(int addressSize, RepPrefixKind repPrefix = RepPrefixKind.None)
		{
			return CreateString_Reg_ESRDI(Code.Scasd_EAX_m32, addressSize, Register.EAX, repPrefix);
		}

		public static Instruction CreateRepeScasd(int addressSize)
		{
			return CreateString_Reg_ESRDI(Code.Scasd_EAX_m32, addressSize, Register.EAX, RepPrefixKind.Repe);
		}

		public static Instruction CreateRepneScasd(int addressSize)
		{
			return CreateString_Reg_ESRDI(Code.Scasd_EAX_m32, addressSize, Register.EAX, RepPrefixKind.Repne);
		}

		public static Instruction CreateScasq(int addressSize, RepPrefixKind repPrefix = RepPrefixKind.None)
		{
			return CreateString_Reg_ESRDI(Code.Scasq_RAX_m64, addressSize, Register.RAX, repPrefix);
		}

		public static Instruction CreateRepeScasq(int addressSize)
		{
			return CreateString_Reg_ESRDI(Code.Scasq_RAX_m64, addressSize, Register.RAX, RepPrefixKind.Repe);
		}

		public static Instruction CreateRepneScasq(int addressSize)
		{
			return CreateString_Reg_ESRDI(Code.Scasq_RAX_m64, addressSize, Register.RAX, RepPrefixKind.Repne);
		}

		public static Instruction CreateInsb(int addressSize, RepPrefixKind repPrefix = RepPrefixKind.None)
		{
			return CreateString_ESRDI_Reg(Code.Insb_m8_DX, addressSize, Register.DX, repPrefix);
		}

		public static Instruction CreateRepInsb(int addressSize)
		{
			return CreateString_ESRDI_Reg(Code.Insb_m8_DX, addressSize, Register.DX, RepPrefixKind.Repe);
		}

		public static Instruction CreateInsw(int addressSize, RepPrefixKind repPrefix = RepPrefixKind.None)
		{
			return CreateString_ESRDI_Reg(Code.Insw_m16_DX, addressSize, Register.DX, repPrefix);
		}

		public static Instruction CreateRepInsw(int addressSize)
		{
			return CreateString_ESRDI_Reg(Code.Insw_m16_DX, addressSize, Register.DX, RepPrefixKind.Repe);
		}

		public static Instruction CreateInsd(int addressSize, RepPrefixKind repPrefix = RepPrefixKind.None)
		{
			return CreateString_ESRDI_Reg(Code.Insd_m32_DX, addressSize, Register.DX, repPrefix);
		}

		public static Instruction CreateRepInsd(int addressSize)
		{
			return CreateString_ESRDI_Reg(Code.Insd_m32_DX, addressSize, Register.DX, RepPrefixKind.Repe);
		}

		public static Instruction CreateStosb(int addressSize, RepPrefixKind repPrefix = RepPrefixKind.None)
		{
			return CreateString_ESRDI_Reg(Code.Stosb_m8_AL, addressSize, Register.AL, repPrefix);
		}

		public static Instruction CreateRepStosb(int addressSize)
		{
			return CreateString_ESRDI_Reg(Code.Stosb_m8_AL, addressSize, Register.AL, RepPrefixKind.Repe);
		}

		public static Instruction CreateStosw(int addressSize, RepPrefixKind repPrefix = RepPrefixKind.None)
		{
			return CreateString_ESRDI_Reg(Code.Stosw_m16_AX, addressSize, Register.AX, repPrefix);
		}

		public static Instruction CreateRepStosw(int addressSize)
		{
			return CreateString_ESRDI_Reg(Code.Stosw_m16_AX, addressSize, Register.AX, RepPrefixKind.Repe);
		}

		public static Instruction CreateStosd(int addressSize, RepPrefixKind repPrefix = RepPrefixKind.None)
		{
			return CreateString_ESRDI_Reg(Code.Stosd_m32_EAX, addressSize, Register.EAX, repPrefix);
		}

		public static Instruction CreateRepStosd(int addressSize)
		{
			return CreateString_ESRDI_Reg(Code.Stosd_m32_EAX, addressSize, Register.EAX, RepPrefixKind.Repe);
		}

		public static Instruction CreateStosq(int addressSize, RepPrefixKind repPrefix = RepPrefixKind.None)
		{
			return CreateString_ESRDI_Reg(Code.Stosq_m64_RAX, addressSize, Register.RAX, repPrefix);
		}

		public static Instruction CreateRepStosq(int addressSize)
		{
			return CreateString_ESRDI_Reg(Code.Stosq_m64_RAX, addressSize, Register.RAX, RepPrefixKind.Repe);
		}

		public static Instruction CreateCmpsb(int addressSize, Register segmentPrefix = Register.None, RepPrefixKind repPrefix = RepPrefixKind.None)
		{
			return CreateString_SegRSI_ESRDI(Code.Cmpsb_m8_m8, addressSize, segmentPrefix, repPrefix);
		}

		public static Instruction CreateRepeCmpsb(int addressSize)
		{
			return CreateString_SegRSI_ESRDI(Code.Cmpsb_m8_m8, addressSize, Register.None, RepPrefixKind.Repe);
		}

		public static Instruction CreateRepneCmpsb(int addressSize)
		{
			return CreateString_SegRSI_ESRDI(Code.Cmpsb_m8_m8, addressSize, Register.None, RepPrefixKind.Repne);
		}

		public static Instruction CreateCmpsw(int addressSize, Register segmentPrefix = Register.None, RepPrefixKind repPrefix = RepPrefixKind.None)
		{
			return CreateString_SegRSI_ESRDI(Code.Cmpsw_m16_m16, addressSize, segmentPrefix, repPrefix);
		}

		public static Instruction CreateRepeCmpsw(int addressSize)
		{
			return CreateString_SegRSI_ESRDI(Code.Cmpsw_m16_m16, addressSize, Register.None, RepPrefixKind.Repe);
		}

		public static Instruction CreateRepneCmpsw(int addressSize)
		{
			return CreateString_SegRSI_ESRDI(Code.Cmpsw_m16_m16, addressSize, Register.None, RepPrefixKind.Repne);
		}

		public static Instruction CreateCmpsd(int addressSize, Register segmentPrefix = Register.None, RepPrefixKind repPrefix = RepPrefixKind.None)
		{
			return CreateString_SegRSI_ESRDI(Code.Cmpsd_m32_m32, addressSize, segmentPrefix, repPrefix);
		}

		public static Instruction CreateRepeCmpsd(int addressSize)
		{
			return CreateString_SegRSI_ESRDI(Code.Cmpsd_m32_m32, addressSize, Register.None, RepPrefixKind.Repe);
		}

		public static Instruction CreateRepneCmpsd(int addressSize)
		{
			return CreateString_SegRSI_ESRDI(Code.Cmpsd_m32_m32, addressSize, Register.None, RepPrefixKind.Repne);
		}

		public static Instruction CreateCmpsq(int addressSize, Register segmentPrefix = Register.None, RepPrefixKind repPrefix = RepPrefixKind.None)
		{
			return CreateString_SegRSI_ESRDI(Code.Cmpsq_m64_m64, addressSize, segmentPrefix, repPrefix);
		}

		public static Instruction CreateRepeCmpsq(int addressSize)
		{
			return CreateString_SegRSI_ESRDI(Code.Cmpsq_m64_m64, addressSize, Register.None, RepPrefixKind.Repe);
		}

		public static Instruction CreateRepneCmpsq(int addressSize)
		{
			return CreateString_SegRSI_ESRDI(Code.Cmpsq_m64_m64, addressSize, Register.None, RepPrefixKind.Repne);
		}

		public static Instruction CreateMovsb(int addressSize, Register segmentPrefix = Register.None, RepPrefixKind repPrefix = RepPrefixKind.None)
		{
			return CreateString_ESRDI_SegRSI(Code.Movsb_m8_m8, addressSize, segmentPrefix, repPrefix);
		}

		public static Instruction CreateRepMovsb(int addressSize)
		{
			return CreateString_ESRDI_SegRSI(Code.Movsb_m8_m8, addressSize, Register.None, RepPrefixKind.Repe);
		}

		public static Instruction CreateMovsw(int addressSize, Register segmentPrefix = Register.None, RepPrefixKind repPrefix = RepPrefixKind.None)
		{
			return CreateString_ESRDI_SegRSI(Code.Movsw_m16_m16, addressSize, segmentPrefix, repPrefix);
		}

		public static Instruction CreateRepMovsw(int addressSize)
		{
			return CreateString_ESRDI_SegRSI(Code.Movsw_m16_m16, addressSize, Register.None, RepPrefixKind.Repe);
		}

		public static Instruction CreateMovsd(int addressSize, Register segmentPrefix = Register.None, RepPrefixKind repPrefix = RepPrefixKind.None)
		{
			return CreateString_ESRDI_SegRSI(Code.Movsd_m32_m32, addressSize, segmentPrefix, repPrefix);
		}

		public static Instruction CreateRepMovsd(int addressSize)
		{
			return CreateString_ESRDI_SegRSI(Code.Movsd_m32_m32, addressSize, Register.None, RepPrefixKind.Repe);
		}

		public static Instruction CreateMovsq(int addressSize, Register segmentPrefix = Register.None, RepPrefixKind repPrefix = RepPrefixKind.None)
		{
			return CreateString_ESRDI_SegRSI(Code.Movsq_m64_m64, addressSize, segmentPrefix, repPrefix);
		}

		public static Instruction CreateRepMovsq(int addressSize)
		{
			return CreateString_ESRDI_SegRSI(Code.Movsq_m64_m64, addressSize, Register.None, RepPrefixKind.Repe);
		}

		public static Instruction CreateMaskmovq(int addressSize, Register register1, Register register2, Register segmentPrefix = Register.None)
		{
			return CreateMaskmov(Code.Maskmovq_rDI_mm_mm, addressSize, register1, register2, segmentPrefix);
		}

		public static Instruction CreateMaskmovdqu(int addressSize, Register register1, Register register2, Register segmentPrefix = Register.None)
		{
			return CreateMaskmov(Code.Maskmovdqu_rDI_xmm_xmm, addressSize, register1, register2, segmentPrefix);
		}

		public static Instruction CreateVmaskmovdqu(int addressSize, Register register1, Register register2, Register segmentPrefix = Register.None)
		{
			return CreateMaskmov(Code.VEX_Vmaskmovdqu_rDI_xmm_xmm, addressSize, register1, register2, segmentPrefix);
		}

		public static Instruction CreateDeclareByte(byte b0)
		{
			Instruction result = default(Instruction);
			result.Code = Code.DeclareByte;
			result.InternalDeclareDataCount = 1u;
			result.SetDeclareByteValue(0, b0);
			return result;
		}

		public static Instruction CreateDeclareByte(byte b0, byte b1)
		{
			Instruction result = default(Instruction);
			result.Code = Code.DeclareByte;
			result.InternalDeclareDataCount = 2u;
			result.SetDeclareByteValue(0, b0);
			result.SetDeclareByteValue(1, b1);
			return result;
		}

		public static Instruction CreateDeclareByte(byte b0, byte b1, byte b2)
		{
			Instruction result = default(Instruction);
			result.Code = Code.DeclareByte;
			result.InternalDeclareDataCount = 3u;
			result.SetDeclareByteValue(0, b0);
			result.SetDeclareByteValue(1, b1);
			result.SetDeclareByteValue(2, b2);
			return result;
		}

		public static Instruction CreateDeclareByte(byte b0, byte b1, byte b2, byte b3)
		{
			Instruction result = default(Instruction);
			result.Code = Code.DeclareByte;
			result.InternalDeclareDataCount = 4u;
			result.SetDeclareByteValue(0, b0);
			result.SetDeclareByteValue(1, b1);
			result.SetDeclareByteValue(2, b2);
			result.SetDeclareByteValue(3, b3);
			return result;
		}

		public static Instruction CreateDeclareByte(byte b0, byte b1, byte b2, byte b3, byte b4)
		{
			Instruction result = default(Instruction);
			result.Code = Code.DeclareByte;
			result.InternalDeclareDataCount = 5u;
			result.SetDeclareByteValue(0, b0);
			result.SetDeclareByteValue(1, b1);
			result.SetDeclareByteValue(2, b2);
			result.SetDeclareByteValue(3, b3);
			result.SetDeclareByteValue(4, b4);
			return result;
		}

		public static Instruction CreateDeclareByte(byte b0, byte b1, byte b2, byte b3, byte b4, byte b5)
		{
			Instruction result = default(Instruction);
			result.Code = Code.DeclareByte;
			result.InternalDeclareDataCount = 6u;
			result.SetDeclareByteValue(0, b0);
			result.SetDeclareByteValue(1, b1);
			result.SetDeclareByteValue(2, b2);
			result.SetDeclareByteValue(3, b3);
			result.SetDeclareByteValue(4, b4);
			result.SetDeclareByteValue(5, b5);
			return result;
		}

		public static Instruction CreateDeclareByte(byte b0, byte b1, byte b2, byte b3, byte b4, byte b5, byte b6)
		{
			Instruction result = default(Instruction);
			result.Code = Code.DeclareByte;
			result.InternalDeclareDataCount = 7u;
			result.SetDeclareByteValue(0, b0);
			result.SetDeclareByteValue(1, b1);
			result.SetDeclareByteValue(2, b2);
			result.SetDeclareByteValue(3, b3);
			result.SetDeclareByteValue(4, b4);
			result.SetDeclareByteValue(5, b5);
			result.SetDeclareByteValue(6, b6);
			return result;
		}

		public static Instruction CreateDeclareByte(byte b0, byte b1, byte b2, byte b3, byte b4, byte b5, byte b6, byte b7)
		{
			Instruction result = default(Instruction);
			result.Code = Code.DeclareByte;
			result.InternalDeclareDataCount = 8u;
			result.SetDeclareByteValue(0, b0);
			result.SetDeclareByteValue(1, b1);
			result.SetDeclareByteValue(2, b2);
			result.SetDeclareByteValue(3, b3);
			result.SetDeclareByteValue(4, b4);
			result.SetDeclareByteValue(5, b5);
			result.SetDeclareByteValue(6, b6);
			result.SetDeclareByteValue(7, b7);
			return result;
		}

		public static Instruction CreateDeclareByte(byte b0, byte b1, byte b2, byte b3, byte b4, byte b5, byte b6, byte b7, byte b8)
		{
			Instruction result = default(Instruction);
			result.Code = Code.DeclareByte;
			result.InternalDeclareDataCount = 9u;
			result.SetDeclareByteValue(0, b0);
			result.SetDeclareByteValue(1, b1);
			result.SetDeclareByteValue(2, b2);
			result.SetDeclareByteValue(3, b3);
			result.SetDeclareByteValue(4, b4);
			result.SetDeclareByteValue(5, b5);
			result.SetDeclareByteValue(6, b6);
			result.SetDeclareByteValue(7, b7);
			result.SetDeclareByteValue(8, b8);
			return result;
		}

		public static Instruction CreateDeclareByte(byte b0, byte b1, byte b2, byte b3, byte b4, byte b5, byte b6, byte b7, byte b8, byte b9)
		{
			Instruction result = default(Instruction);
			result.Code = Code.DeclareByte;
			result.InternalDeclareDataCount = 10u;
			result.SetDeclareByteValue(0, b0);
			result.SetDeclareByteValue(1, b1);
			result.SetDeclareByteValue(2, b2);
			result.SetDeclareByteValue(3, b3);
			result.SetDeclareByteValue(4, b4);
			result.SetDeclareByteValue(5, b5);
			result.SetDeclareByteValue(6, b6);
			result.SetDeclareByteValue(7, b7);
			result.SetDeclareByteValue(8, b8);
			result.SetDeclareByteValue(9, b9);
			return result;
		}

		public static Instruction CreateDeclareByte(byte b0, byte b1, byte b2, byte b3, byte b4, byte b5, byte b6, byte b7, byte b8, byte b9, byte b10)
		{
			Instruction result = default(Instruction);
			result.Code = Code.DeclareByte;
			result.InternalDeclareDataCount = 11u;
			result.SetDeclareByteValue(0, b0);
			result.SetDeclareByteValue(1, b1);
			result.SetDeclareByteValue(2, b2);
			result.SetDeclareByteValue(3, b3);
			result.SetDeclareByteValue(4, b4);
			result.SetDeclareByteValue(5, b5);
			result.SetDeclareByteValue(6, b6);
			result.SetDeclareByteValue(7, b7);
			result.SetDeclareByteValue(8, b8);
			result.SetDeclareByteValue(9, b9);
			result.SetDeclareByteValue(10, b10);
			return result;
		}

		public static Instruction CreateDeclareByte(byte b0, byte b1, byte b2, byte b3, byte b4, byte b5, byte b6, byte b7, byte b8, byte b9, byte b10, byte b11)
		{
			Instruction result = default(Instruction);
			result.Code = Code.DeclareByte;
			result.InternalDeclareDataCount = 12u;
			result.SetDeclareByteValue(0, b0);
			result.SetDeclareByteValue(1, b1);
			result.SetDeclareByteValue(2, b2);
			result.SetDeclareByteValue(3, b3);
			result.SetDeclareByteValue(4, b4);
			result.SetDeclareByteValue(5, b5);
			result.SetDeclareByteValue(6, b6);
			result.SetDeclareByteValue(7, b7);
			result.SetDeclareByteValue(8, b8);
			result.SetDeclareByteValue(9, b9);
			result.SetDeclareByteValue(10, b10);
			result.SetDeclareByteValue(11, b11);
			return result;
		}

		public static Instruction CreateDeclareByte(byte b0, byte b1, byte b2, byte b3, byte b4, byte b5, byte b6, byte b7, byte b8, byte b9, byte b10, byte b11, byte b12)
		{
			Instruction result = default(Instruction);
			result.Code = Code.DeclareByte;
			result.InternalDeclareDataCount = 13u;
			result.SetDeclareByteValue(0, b0);
			result.SetDeclareByteValue(1, b1);
			result.SetDeclareByteValue(2, b2);
			result.SetDeclareByteValue(3, b3);
			result.SetDeclareByteValue(4, b4);
			result.SetDeclareByteValue(5, b5);
			result.SetDeclareByteValue(6, b6);
			result.SetDeclareByteValue(7, b7);
			result.SetDeclareByteValue(8, b8);
			result.SetDeclareByteValue(9, b9);
			result.SetDeclareByteValue(10, b10);
			result.SetDeclareByteValue(11, b11);
			result.SetDeclareByteValue(12, b12);
			return result;
		}

		public static Instruction CreateDeclareByte(byte b0, byte b1, byte b2, byte b3, byte b4, byte b5, byte b6, byte b7, byte b8, byte b9, byte b10, byte b11, byte b12, byte b13)
		{
			Instruction result = default(Instruction);
			result.Code = Code.DeclareByte;
			result.InternalDeclareDataCount = 14u;
			result.SetDeclareByteValue(0, b0);
			result.SetDeclareByteValue(1, b1);
			result.SetDeclareByteValue(2, b2);
			result.SetDeclareByteValue(3, b3);
			result.SetDeclareByteValue(4, b4);
			result.SetDeclareByteValue(5, b5);
			result.SetDeclareByteValue(6, b6);
			result.SetDeclareByteValue(7, b7);
			result.SetDeclareByteValue(8, b8);
			result.SetDeclareByteValue(9, b9);
			result.SetDeclareByteValue(10, b10);
			result.SetDeclareByteValue(11, b11);
			result.SetDeclareByteValue(12, b12);
			result.SetDeclareByteValue(13, b13);
			return result;
		}

		public static Instruction CreateDeclareByte(byte b0, byte b1, byte b2, byte b3, byte b4, byte b5, byte b6, byte b7, byte b8, byte b9, byte b10, byte b11, byte b12, byte b13, byte b14)
		{
			Instruction result = default(Instruction);
			result.Code = Code.DeclareByte;
			result.InternalDeclareDataCount = 15u;
			result.SetDeclareByteValue(0, b0);
			result.SetDeclareByteValue(1, b1);
			result.SetDeclareByteValue(2, b2);
			result.SetDeclareByteValue(3, b3);
			result.SetDeclareByteValue(4, b4);
			result.SetDeclareByteValue(5, b5);
			result.SetDeclareByteValue(6, b6);
			result.SetDeclareByteValue(7, b7);
			result.SetDeclareByteValue(8, b8);
			result.SetDeclareByteValue(9, b9);
			result.SetDeclareByteValue(10, b10);
			result.SetDeclareByteValue(11, b11);
			result.SetDeclareByteValue(12, b12);
			result.SetDeclareByteValue(13, b13);
			result.SetDeclareByteValue(14, b14);
			return result;
		}

		public static Instruction CreateDeclareByte(byte b0, byte b1, byte b2, byte b3, byte b4, byte b5, byte b6, byte b7, byte b8, byte b9, byte b10, byte b11, byte b12, byte b13, byte b14, byte b15)
		{
			Instruction result = default(Instruction);
			result.Code = Code.DeclareByte;
			result.InternalDeclareDataCount = 16u;
			result.SetDeclareByteValue(0, b0);
			result.SetDeclareByteValue(1, b1);
			result.SetDeclareByteValue(2, b2);
			result.SetDeclareByteValue(3, b3);
			result.SetDeclareByteValue(4, b4);
			result.SetDeclareByteValue(5, b5);
			result.SetDeclareByteValue(6, b6);
			result.SetDeclareByteValue(7, b7);
			result.SetDeclareByteValue(8, b8);
			result.SetDeclareByteValue(9, b9);
			result.SetDeclareByteValue(10, b10);
			result.SetDeclareByteValue(11, b11);
			result.SetDeclareByteValue(12, b12);
			result.SetDeclareByteValue(13, b13);
			result.SetDeclareByteValue(14, b14);
			result.SetDeclareByteValue(15, b15);
			return result;
		}

		public static Instruction CreateDeclareByte(ReadOnlySpan<byte> data)
		{
			if ((uint)(data.Length - 1) > 15u)
			{
				ThrowHelper.ThrowArgumentOutOfRangeException_data();
			}
			Instruction result = default(Instruction);
			result.Code = Code.DeclareByte;
			result.InternalDeclareDataCount = (uint)data.Length;
			for (int i = 0; i < data.Length; i++)
			{
				result.SetDeclareByteValue(i, data[i]);
			}
			return result;
		}

		public static Instruction CreateDeclareByte(byte[] data)
		{
			if (data == null)
			{
				ThrowHelper.ThrowArgumentNullException_data();
			}
			return CreateDeclareByte(data, 0, data.Length);
		}

		public static Instruction CreateDeclareByte(byte[] data, int index, int length)
		{
			if (data == null)
			{
				ThrowHelper.ThrowArgumentNullException_data();
			}
			if ((uint)(length - 1) > 15u)
			{
				ThrowHelper.ThrowArgumentOutOfRangeException_length();
			}
			if ((ulong)((long)(uint)index + (long)(uint)length) > (ulong)(uint)data.Length)
			{
				ThrowHelper.ThrowArgumentOutOfRangeException_index();
			}
			Instruction result = default(Instruction);
			result.Code = Code.DeclareByte;
			result.InternalDeclareDataCount = (uint)length;
			for (int i = 0; i < length; i++)
			{
				result.SetDeclareByteValue(i, data[index + i]);
			}
			return result;
		}

		public static Instruction CreateDeclareWord(ushort w0)
		{
			Instruction result = default(Instruction);
			result.Code = Code.DeclareWord;
			result.InternalDeclareDataCount = 1u;
			result.SetDeclareWordValue(0, w0);
			return result;
		}

		public static Instruction CreateDeclareWord(ushort w0, ushort w1)
		{
			Instruction result = default(Instruction);
			result.Code = Code.DeclareWord;
			result.InternalDeclareDataCount = 2u;
			result.SetDeclareWordValue(0, w0);
			result.SetDeclareWordValue(1, w1);
			return result;
		}

		public static Instruction CreateDeclareWord(ushort w0, ushort w1, ushort w2)
		{
			Instruction result = default(Instruction);
			result.Code = Code.DeclareWord;
			result.InternalDeclareDataCount = 3u;
			result.SetDeclareWordValue(0, w0);
			result.SetDeclareWordValue(1, w1);
			result.SetDeclareWordValue(2, w2);
			return result;
		}

		public static Instruction CreateDeclareWord(ushort w0, ushort w1, ushort w2, ushort w3)
		{
			Instruction result = default(Instruction);
			result.Code = Code.DeclareWord;
			result.InternalDeclareDataCount = 4u;
			result.SetDeclareWordValue(0, w0);
			result.SetDeclareWordValue(1, w1);
			result.SetDeclareWordValue(2, w2);
			result.SetDeclareWordValue(3, w3);
			return result;
		}

		public static Instruction CreateDeclareWord(ushort w0, ushort w1, ushort w2, ushort w3, ushort w4)
		{
			Instruction result = default(Instruction);
			result.Code = Code.DeclareWord;
			result.InternalDeclareDataCount = 5u;
			result.SetDeclareWordValue(0, w0);
			result.SetDeclareWordValue(1, w1);
			result.SetDeclareWordValue(2, w2);
			result.SetDeclareWordValue(3, w3);
			result.SetDeclareWordValue(4, w4);
			return result;
		}

		public static Instruction CreateDeclareWord(ushort w0, ushort w1, ushort w2, ushort w3, ushort w4, ushort w5)
		{
			Instruction result = default(Instruction);
			result.Code = Code.DeclareWord;
			result.InternalDeclareDataCount = 6u;
			result.SetDeclareWordValue(0, w0);
			result.SetDeclareWordValue(1, w1);
			result.SetDeclareWordValue(2, w2);
			result.SetDeclareWordValue(3, w3);
			result.SetDeclareWordValue(4, w4);
			result.SetDeclareWordValue(5, w5);
			return result;
		}

		public static Instruction CreateDeclareWord(ushort w0, ushort w1, ushort w2, ushort w3, ushort w4, ushort w5, ushort w6)
		{
			Instruction result = default(Instruction);
			result.Code = Code.DeclareWord;
			result.InternalDeclareDataCount = 7u;
			result.SetDeclareWordValue(0, w0);
			result.SetDeclareWordValue(1, w1);
			result.SetDeclareWordValue(2, w2);
			result.SetDeclareWordValue(3, w3);
			result.SetDeclareWordValue(4, w4);
			result.SetDeclareWordValue(5, w5);
			result.SetDeclareWordValue(6, w6);
			return result;
		}

		public static Instruction CreateDeclareWord(ushort w0, ushort w1, ushort w2, ushort w3, ushort w4, ushort w5, ushort w6, ushort w7)
		{
			Instruction result = default(Instruction);
			result.Code = Code.DeclareWord;
			result.InternalDeclareDataCount = 8u;
			result.SetDeclareWordValue(0, w0);
			result.SetDeclareWordValue(1, w1);
			result.SetDeclareWordValue(2, w2);
			result.SetDeclareWordValue(3, w3);
			result.SetDeclareWordValue(4, w4);
			result.SetDeclareWordValue(5, w5);
			result.SetDeclareWordValue(6, w6);
			result.SetDeclareWordValue(7, w7);
			return result;
		}

		public static Instruction CreateDeclareWord(ReadOnlySpan<byte> data)
		{
			if ((uint)(data.Length - 1) > 15u || ((uint)data.Length & (true ? 1u : 0u)) != 0)
			{
				ThrowHelper.ThrowArgumentOutOfRangeException_data();
			}
			Instruction result = default(Instruction);
			result.Code = Code.DeclareWord;
			result.InternalDeclareDataCount = (uint)data.Length / 2u;
			for (int i = 0; i < data.Length; i += 2)
			{
				uint num = (uint)(data[i] | (data[i + 1] << 8));
				result.SetDeclareWordValue(i / 2, (ushort)num);
			}
			return result;
		}

		public static Instruction CreateDeclareWord(byte[] data)
		{
			if (data == null)
			{
				ThrowHelper.ThrowArgumentNullException_data();
			}
			return CreateDeclareWord(data, 0, data.Length);
		}

		public static Instruction CreateDeclareWord(byte[] data, int index, int length)
		{
			if (data == null)
			{
				ThrowHelper.ThrowArgumentNullException_data();
			}
			if ((uint)(length - 1) > 15u || ((uint)length & (true ? 1u : 0u)) != 0)
			{
				ThrowHelper.ThrowArgumentOutOfRangeException_length();
			}
			if ((ulong)((long)(uint)index + (long)(uint)length) > (ulong)(uint)data.Length)
			{
				ThrowHelper.ThrowArgumentOutOfRangeException_index();
			}
			Instruction result = default(Instruction);
			result.Code = Code.DeclareWord;
			result.InternalDeclareDataCount = (uint)length / 2u;
			for (int i = 0; i < length; i += 2)
			{
				uint num = (uint)(data[index + i] | (data[index + i + 1] << 8));
				result.SetDeclareWordValue(i / 2, (ushort)num);
			}
			return result;
		}

		public static Instruction CreateDeclareWord(ReadOnlySpan<ushort> data)
		{
			if ((uint)(data.Length - 1) > 7u)
			{
				ThrowHelper.ThrowArgumentOutOfRangeException_data();
			}
			Instruction result = default(Instruction);
			result.Code = Code.DeclareWord;
			result.InternalDeclareDataCount = (uint)data.Length;
			for (int i = 0; i < data.Length; i++)
			{
				result.SetDeclareWordValue(i, data[i]);
			}
			return result;
		}

		public static Instruction CreateDeclareWord(ushort[] data)
		{
			if (data == null)
			{
				ThrowHelper.ThrowArgumentNullException_data();
			}
			return CreateDeclareWord(data, 0, data.Length);
		}

		public static Instruction CreateDeclareWord(ushort[] data, int index, int length)
		{
			if (data == null)
			{
				ThrowHelper.ThrowArgumentNullException_data();
			}
			if ((uint)(length - 1) > 7u)
			{
				ThrowHelper.ThrowArgumentOutOfRangeException_length();
			}
			if ((ulong)((long)(uint)index + (long)(uint)length) > (ulong)(uint)data.Length)
			{
				ThrowHelper.ThrowArgumentOutOfRangeException_index();
			}
			Instruction result = default(Instruction);
			result.Code = Code.DeclareWord;
			result.InternalDeclareDataCount = (uint)length;
			for (int i = 0; i < length; i++)
			{
				result.SetDeclareWordValue(i, data[index + i]);
			}
			return result;
		}

		public static Instruction CreateDeclareDword(uint d0)
		{
			Instruction result = default(Instruction);
			result.Code = Code.DeclareDword;
			result.InternalDeclareDataCount = 1u;
			result.SetDeclareDwordValue(0, d0);
			return result;
		}

		public static Instruction CreateDeclareDword(uint d0, uint d1)
		{
			Instruction result = default(Instruction);
			result.Code = Code.DeclareDword;
			result.InternalDeclareDataCount = 2u;
			result.SetDeclareDwordValue(0, d0);
			result.SetDeclareDwordValue(1, d1);
			return result;
		}

		public static Instruction CreateDeclareDword(uint d0, uint d1, uint d2)
		{
			Instruction result = default(Instruction);
			result.Code = Code.DeclareDword;
			result.InternalDeclareDataCount = 3u;
			result.SetDeclareDwordValue(0, d0);
			result.SetDeclareDwordValue(1, d1);
			result.SetDeclareDwordValue(2, d2);
			return result;
		}

		public static Instruction CreateDeclareDword(uint d0, uint d1, uint d2, uint d3)
		{
			Instruction result = default(Instruction);
			result.Code = Code.DeclareDword;
			result.InternalDeclareDataCount = 4u;
			result.SetDeclareDwordValue(0, d0);
			result.SetDeclareDwordValue(1, d1);
			result.SetDeclareDwordValue(2, d2);
			result.SetDeclareDwordValue(3, d3);
			return result;
		}

		public static Instruction CreateDeclareDword(ReadOnlySpan<byte> data)
		{
			if ((uint)(data.Length - 1) > 15u || ((uint)data.Length & 3u) != 0)
			{
				ThrowHelper.ThrowArgumentOutOfRangeException_data();
			}
			Instruction result = default(Instruction);
			result.Code = Code.DeclareDword;
			result.InternalDeclareDataCount = (uint)data.Length / 4u;
			for (int i = 0; i < data.Length; i += 4)
			{
				uint value = (uint)(data[i] | (data[i + 1] << 8) | (data[i + 2] << 16) | (data[i + 3] << 24));
				result.SetDeclareDwordValue(i / 4, value);
			}
			return result;
		}

		public static Instruction CreateDeclareDword(byte[] data)
		{
			if (data == null)
			{
				ThrowHelper.ThrowArgumentNullException_data();
			}
			return CreateDeclareDword(data, 0, data.Length);
		}

		public static Instruction CreateDeclareDword(byte[] data, int index, int length)
		{
			if (data == null)
			{
				ThrowHelper.ThrowArgumentNullException_data();
			}
			if ((uint)(length - 1) > 15u || ((uint)length & 3u) != 0)
			{
				ThrowHelper.ThrowArgumentOutOfRangeException_length();
			}
			if ((ulong)((long)(uint)index + (long)(uint)length) > (ulong)(uint)data.Length)
			{
				ThrowHelper.ThrowArgumentOutOfRangeException_index();
			}
			Instruction result = default(Instruction);
			result.Code = Code.DeclareDword;
			result.InternalDeclareDataCount = (uint)length / 4u;
			for (int i = 0; i < length; i += 4)
			{
				uint value = (uint)(data[index + i] | (data[index + i + 1] << 8) | (data[index + i + 2] << 16) | (data[index + i + 3] << 24));
				result.SetDeclareDwordValue(i / 4, value);
			}
			return result;
		}

		public static Instruction CreateDeclareDword(ReadOnlySpan<uint> data)
		{
			if ((uint)(data.Length - 1) > 3u)
			{
				ThrowHelper.ThrowArgumentOutOfRangeException_data();
			}
			Instruction result = default(Instruction);
			result.Code = Code.DeclareDword;
			result.InternalDeclareDataCount = (uint)data.Length;
			for (int i = 0; i < data.Length; i++)
			{
				result.SetDeclareDwordValue(i, data[i]);
			}
			return result;
		}

		public static Instruction CreateDeclareDword(uint[] data)
		{
			if (data == null)
			{
				ThrowHelper.ThrowArgumentNullException_data();
			}
			return CreateDeclareDword(data, 0, data.Length);
		}

		public static Instruction CreateDeclareDword(uint[] data, int index, int length)
		{
			if (data == null)
			{
				ThrowHelper.ThrowArgumentNullException_data();
			}
			if ((uint)(length - 1) > 3u)
			{
				ThrowHelper.ThrowArgumentOutOfRangeException_length();
			}
			if ((ulong)((long)(uint)index + (long)(uint)length) > (ulong)(uint)data.Length)
			{
				ThrowHelper.ThrowArgumentOutOfRangeException_index();
			}
			Instruction result = default(Instruction);
			result.Code = Code.DeclareDword;
			result.InternalDeclareDataCount = (uint)length;
			for (int i = 0; i < length; i++)
			{
				result.SetDeclareDwordValue(i, data[index + i]);
			}
			return result;
		}

		public static Instruction CreateDeclareQword(ulong q0)
		{
			Instruction result = default(Instruction);
			result.Code = Code.DeclareQword;
			result.InternalDeclareDataCount = 1u;
			result.SetDeclareQwordValue(0, q0);
			return result;
		}

		public static Instruction CreateDeclareQword(ulong q0, ulong q1)
		{
			Instruction result = default(Instruction);
			result.Code = Code.DeclareQword;
			result.InternalDeclareDataCount = 2u;
			result.SetDeclareQwordValue(0, q0);
			result.SetDeclareQwordValue(1, q1);
			return result;
		}

		public static Instruction CreateDeclareQword(ReadOnlySpan<byte> data)
		{
			if ((uint)(data.Length - 1) > 15u || ((uint)data.Length & 7u) != 0)
			{
				ThrowHelper.ThrowArgumentOutOfRangeException_data();
			}
			Instruction result = default(Instruction);
			result.Code = Code.DeclareQword;
			result.InternalDeclareDataCount = (uint)data.Length / 8u;
			for (int i = 0; i < data.Length; i += 8)
			{
				uint num = (uint)(data[i] | (data[i + 1] << 8) | (data[i + 2] << 16) | (data[i + 3] << 24));
				uint num2 = (uint)(data[i + 4] | (data[i + 5] << 8) | (data[i + 6] << 16) | (data[i + 7] << 24));
				result.SetDeclareQwordValue(i / 8, num | ((ulong)num2 << 32));
			}
			return result;
		}

		public static Instruction CreateDeclareQword(byte[] data)
		{
			if (data == null)
			{
				ThrowHelper.ThrowArgumentNullException_data();
			}
			return CreateDeclareQword(data, 0, data.Length);
		}

		public static Instruction CreateDeclareQword(byte[] data, int index, int length)
		{
			if (data == null)
			{
				ThrowHelper.ThrowArgumentNullException_data();
			}
			if ((uint)(length - 1) > 15u || ((uint)length & 7u) != 0)
			{
				ThrowHelper.ThrowArgumentOutOfRangeException_length();
			}
			if ((ulong)((long)(uint)index + (long)(uint)length) > (ulong)(uint)data.Length)
			{
				ThrowHelper.ThrowArgumentOutOfRangeException_index();
			}
			Instruction result = default(Instruction);
			result.Code = Code.DeclareQword;
			result.InternalDeclareDataCount = (uint)length / 8u;
			for (int i = 0; i < length; i += 8)
			{
				uint num = (uint)(data[index + i] | (data[index + i + 1] << 8) | (data[index + i + 2] << 16) | (data[index + i + 3] << 24));
				uint num2 = (uint)(data[index + i + 4] | (data[index + i + 5] << 8) | (data[index + i + 6] << 16) | (data[index + i + 7] << 24));
				result.SetDeclareQwordValue(i / 8, num | ((ulong)num2 << 32));
			}
			return result;
		}

		public static Instruction CreateDeclareQword(ReadOnlySpan<ulong> data)
		{
			if ((uint)(data.Length - 1) > 1u)
			{
				ThrowHelper.ThrowArgumentOutOfRangeException_data();
			}
			Instruction result = default(Instruction);
			result.Code = Code.DeclareQword;
			result.InternalDeclareDataCount = (uint)data.Length;
			for (int i = 0; i < data.Length; i++)
			{
				result.SetDeclareQwordValue(i, data[i]);
			}
			return result;
		}

		public static Instruction CreateDeclareQword(ulong[] data)
		{
			if (data == null)
			{
				ThrowHelper.ThrowArgumentNullException_data();
			}
			return CreateDeclareQword(data, 0, data.Length);
		}

		public static Instruction CreateDeclareQword(ulong[] data, int index, int length)
		{
			if (data == null)
			{
				ThrowHelper.ThrowArgumentNullException_data();
			}
			if ((uint)(length - 1) > 1u)
			{
				ThrowHelper.ThrowArgumentOutOfRangeException_length();
			}
			if ((ulong)((long)(uint)index + (long)(uint)length) > (ulong)(uint)data.Length)
			{
				ThrowHelper.ThrowArgumentOutOfRangeException_index();
			}
			Instruction result = default(Instruction);
			result.Code = Code.DeclareQword;
			result.InternalDeclareDataCount = (uint)length;
			for (int i = 0; i < length; i++)
			{
				result.SetDeclareQwordValue(i, data[index + i]);
			}
			return result;
		}

		[MethodImpl(MethodImplOptions.AggressiveInlining)]
		public static bool operator ==(in Instruction left, in Instruction right)
		{
			return EqualsInternal(in left, in right);
		}

		[MethodImpl(MethodImplOptions.AggressiveInlining)]
		public static bool operator !=(in Instruction left, in Instruction right)
		{
			return !EqualsInternal(in left, in right);
		}

		[MethodImpl(MethodImplOptions.AggressiveInlining)]
		public readonly bool Equals(in Instruction other)
		{
			return EqualsInternal(in this, in other);
		}

		readonly bool IEquatable<Instruction>.Equals(Instruction other)
		{
			return EqualsInternal(in this, in other);
		}

		private static bool EqualsInternal(in Instruction a, in Instruction b)
		{
			if (a.memDispl == b.memDispl && ((a.flags1 ^ b.flags1) & 0xFFF3FFFFu) == 0 && a.immediate == b.immediate && a.code == b.code && a.memBaseReg == b.memBaseReg && a.memIndexReg == b.memIndexReg && a.reg0 == b.reg0 && a.reg1 == b.reg1 && a.reg2 == b.reg2 && a.reg3 == b.reg3 && a.opKind0 == b.opKind0 && a.opKind1 == b.opKind1 && a.opKind2 == b.opKind2 && a.opKind3 == b.opKind3 && a.scale == b.scale && a.displSize == b.displSize)
			{
				return a.pad == b.pad;
			}
			return false;
		}

		public override readonly int GetHashCode()
		{
			return (int)memDispl ^ (int)(memDispl >> 32) ^ ((int)flags1 & -786433) ^ (int)immediate ^ (code << 8) ^ (memBaseReg << 16) ^ (memIndexReg << 24) ^ reg3 ^ (reg2 << 8) ^ (reg1 << 16) ^ (reg0 << 24) ^ opKind3 ^ (opKind2 << 8) ^ (opKind1 << 16) ^ (opKind0 << 24) ^ scale ^ (displSize << 8) ^ (pad << 16);
		}

		public override readonly bool Equals(object? obj)
		{
			if (obj is Instruction b)
			{
				return EqualsInternal(in this, in b);
			}
			return false;
		}

		public static bool EqualsAllBits(in Instruction a, in Instruction b)
		{
			if (a.nextRip == b.nextRip && a.memDispl == b.memDispl && a.flags1 == b.flags1 && a.immediate == b.immediate && a.code == b.code && a.memBaseReg == b.memBaseReg && a.memIndexReg == b.memIndexReg && a.reg0 == b.reg0 && a.reg1 == b.reg1 && a.reg2 == b.reg2 && a.reg3 == b.reg3 && a.opKind0 == b.opKind0 && a.opKind1 == b.opKind1 && a.opKind2 == b.opKind2 && a.opKind3 == b.opKind3 && a.scale == b.scale && a.displSize == b.displSize && a.len == b.len)
			{
				return a.pad == b.pad;
			}
			return false;
		}

		[MethodImpl(MethodImplOptions.AggressiveInlining)]
		internal void InternalSetCodeNoCheck(Code code)
		{
			this.code = (ushort)code;
		}

		private readonly bool IsXacquireInstr()
		{
			if (Op0Kind != OpKind.Memory)
			{
				return false;
			}
			if (HasLockPrefix)
			{
				return Code != Code.Cmpxchg16b_m128;
			}
			return Mnemonic == Mnemonic.Xchg;
		}

		private readonly bool IsXreleaseInstr()
		{
			if (Op0Kind != OpKind.Memory)
			{
				return false;
			}
			if (HasLockPrefix)
			{
				return Code != Code.Cmpxchg16b_m128;
			}
			Code code = Code;
			if ((uint)(code - 275) <= 7u || code == Code.Mov_rm8_imm8 || (uint)(code - 403) <= 2u)
			{
				return true;
			}
			return false;
		}

		[MethodImpl(MethodImplOptions.AggressiveInlining)]
		internal void InternalSetHasXacquirePrefix()
		{
			flags1 |= 1073741824u;
		}

		[MethodImpl(MethodImplOptions.AggressiveInlining)]
		internal void InternalSetHasXreleasePrefix()
		{
			flags1 |= 536870912u;
		}

		[MethodImpl(MethodImplOptions.AggressiveInlining)]
		internal void InternalSetHasRepePrefix()
		{
			flags1 = (flags1 & 0xBFFFFFFFu) | 0x20000000u;
		}

		[MethodImpl(MethodImplOptions.AggressiveInlining)]
		internal void InternalClearHasRepePrefix()
		{
			flags1 &= 3758096383u;
		}

		[MethodImpl(MethodImplOptions.AggressiveInlining)]
		internal void InternalClearHasRepeRepnePrefix()
		{
			flags1 &= 2684354559u;
		}

		[MethodImpl(MethodImplOptions.AggressiveInlining)]
		internal void InternalSetHasRepnePrefix()
		{
			flags1 = (flags1 & 0xDFFFFFFFu) | 0x40000000u;
		}

		[MethodImpl(MethodImplOptions.AggressiveInlining)]
		internal void InternalClearHasRepnePrefix()
		{
			flags1 &= 3221225471u;
		}

		[MethodImpl(MethodImplOptions.AggressiveInlining)]
		internal void InternalSetHasLockPrefix()
		{
			flags1 |= 2147483648u;
		}

		[MethodImpl(MethodImplOptions.AggressiveInlining)]
		internal void InternalClearHasLockPrefix()
		{
			flags1 &= 2147483647u;
		}

		public readonly OpKind GetOpKind(int operand)
		{
			switch (operand)
			{
			case 0:
				return Op0Kind;
			case 1:
				return Op1Kind;
			case 2:
				return Op2Kind;
			case 3:
				return Op3Kind;
			case 4:
				return Op4Kind;
			default:
				ThrowHelper.ThrowArgumentOutOfRangeException_operand();
				return OpKind.Register;
			}
		}

		public readonly bool HasOpKind(OpKind opKind)
		{
			for (int i = 0; i < OpCount; i++)
			{
				if (GetOpKind(i) == opKind)
				{
					return true;
				}
			}
			return false;
		}

		public void SetOpKind(int operand, OpKind opKind)
		{
			switch (operand)
			{
			case 0:
				Op0Kind = opKind;
				break;
			case 1:
				Op1Kind = opKind;
				break;
			case 2:
				Op2Kind = opKind;
				break;
			case 3:
				Op3Kind = opKind;
				break;
			case 4:
				Op4Kind = opKind;
				break;
			default:
				ThrowHelper.ThrowArgumentOutOfRangeException_operand();
				break;
			}
		}

		[MethodImpl(MethodImplOptions.AggressiveInlining)]
		internal void InternalSetMemoryDisplSize(uint scale)
		{
			displSize = (byte)scale;
		}

		[MethodImpl(MethodImplOptions.AggressiveInlining)]
		internal void InternalSetIsBroadcast()
		{
			flags1 |= 67108864u;
		}

		[MethodImpl(MethodImplOptions.AggressiveInlining)]
		internal void InternalSetIsMvexEvictionHint()
		{
			immediate |= 2147483648u;
		}

		[MethodImpl(MethodImplOptions.AggressiveInlining)]
		internal void InternalSetMvexRegMemConv(MvexRegMemConv newValue)
		{
			immediate |= (uint)((int)newValue << 16);
		}

		public readonly ulong GetImmediate(int operand)
		{
			return GetOpKind(operand) switch
			{
				OpKind.Immediate8 => Immediate8, 
				OpKind.Immediate8_2nd => Immediate8_2nd, 
				OpKind.Immediate16 => Immediate16, 
				OpKind.Immediate32 => Immediate32, 
				OpKind.Immediate64 => Immediate64, 
				OpKind.Immediate8to16 => (ulong)Immediate8to16, 
				OpKind.Immediate8to32 => (ulong)Immediate8to32, 
				OpKind.Immediate8to64 => (ulong)Immediate8to64, 
				OpKind.Immediate32to64 => (ulong)Immediate32to64, 
				_ => throw new ArgumentException($"Op{operand} isn't an immediate operand", "operand"), 
			};
		}

		public void SetImmediate(int operand, int immediate)
		{
			SetImmediate(operand, (ulong)immediate);
		}

		public void SetImmediate(int operand, uint immediate)
		{
			SetImmediate(operand, (ulong)immediate);
		}

		public void SetImmediate(int operand, long immediate)
		{
			SetImmediate(operand, (ulong)immediate);
		}

		public void SetImmediate(int operand, ulong immediate)
		{
			switch (GetOpKind(operand))
			{
			case OpKind.Immediate8:
				Immediate8 = (byte)immediate;
				break;
			case OpKind.Immediate8to16:
				Immediate8to16 = (short)immediate;
				break;
			case OpKind.Immediate8to32:
				Immediate8to32 = (int)immediate;
				break;
			case OpKind.Immediate8to64:
				Immediate8to64 = (long)immediate;
				break;
			case OpKind.Immediate8_2nd:
				Immediate8_2nd = (byte)immediate;
				break;
			case OpKind.Immediate16:
				Immediate16 = (ushort)immediate;
				break;
			case OpKind.Immediate32to64:
				Immediate32to64 = (long)immediate;
				break;
			case OpKind.Immediate32:
				Immediate32 = (uint)immediate;
				break;
			case OpKind.Immediate64:
				Immediate64 = immediate;
				break;
			default:
				throw new ArgumentException($"Op{operand} isn't an immediate operand", "operand");
			}
		}

		public readonly Register GetOpRegister(int operand)
		{
			switch (operand)
			{
			case 0:
				return Op0Register;
			case 1:
				return Op1Register;
			case 2:
				return Op2Register;
			case 3:
				return Op3Register;
			case 4:
				return Op4Register;
			default:
				ThrowHelper.ThrowArgumentOutOfRangeException_operand();
				return Register.None;
			}
		}

		public void SetOpRegister(int operand, Register register)
		{
			switch (operand)
			{
			case 0:
				Op0Register = register;
				break;
			case 1:
				Op1Register = register;
				break;
			case 2:
				Op2Register = register;
				break;
			case 3:
				Op3Register = register;
				break;
			case 4:
				Op4Register = register;
				break;
			default:
				ThrowHelper.ThrowArgumentOutOfRangeException_operand();
				break;
			}
		}

		[MethodImpl(MethodImplOptions.AggressiveInlining)]
		internal void InternalSetZeroingMasking()
		{
			flags1 |= 268435456u;
		}

		public void SetDeclareByteValue(int index, sbyte value)
		{
			SetDeclareByteValue(index, (byte)value);
		}

		public void SetDeclareByteValue(int index, byte value)
		{
			switch (index)
			{
			case 0:
				reg0 = value;
				break;
			case 1:
				reg1 = value;
				break;
			case 2:
				reg2 = value;
				break;
			case 3:
				reg3 = value;
				break;
			case 4:
				immediate = (immediate & 0xFFFFFF00u) | value;
				break;
			case 5:
				immediate = (immediate & 0xFFFF00FFu) | (uint)(value << 8);
				break;
			case 6:
				immediate = (immediate & 0xFF00FFFFu) | (uint)(value << 16);
				break;
			case 7:
				immediate = (immediate & 0xFFFFFFu) | (uint)(value << 24);
				break;
			case 8:
				memDispl = (memDispl & 0xFFFFFFFFFFFFFF00uL) | value;
				break;
			case 9:
				memDispl = (memDispl & 0xFFFFFFFFFFFF00FFuL) | ((ulong)value << 8);
				break;
			case 10:
				memDispl = (memDispl & 0xFFFFFFFFFF00FFFFuL) | ((ulong)value << 16);
				break;
			case 11:
				memDispl = (memDispl & 0xFFFFFFFF00FFFFFFuL) | ((ulong)value << 24);
				break;
			case 12:
				memDispl = (memDispl & 0xFFFFFF00FFFFFFFFuL) | ((ulong)value << 32);
				break;
			case 13:
				memDispl = (memDispl & 0xFFFF00FFFFFFFFFFuL) | ((ulong)value << 40);
				break;
			case 14:
				memDispl = (memDispl & 0xFF00FFFFFFFFFFFFuL) | ((ulong)value << 48);
				break;
			case 15:
				memDispl = (memDispl & 0xFFFFFFFFFFFFFFuL) | ((ulong)value << 56);
				break;
			default:
				ThrowHelper.ThrowArgumentOutOfRangeException_index();
				break;
			}
		}

		public readonly byte GetDeclareByteValue(int index)
		{
			switch (index)
			{
			case 0:
				return reg0;
			case 1:
				return reg1;
			case 2:
				return reg2;
			case 3:
				return reg3;
			case 4:
				return (byte)immediate;
			case 5:
				return (byte)(immediate >> 8);
			case 6:
				return (byte)(immediate >> 16);
			case 7:
				return (byte)(immediate >> 24);
			case 8:
				return (byte)memDispl;
			case 9:
				return (byte)((uint)memDispl >> 8);
			case 10:
				return (byte)((uint)memDispl >> 16);
			case 11:
				return (byte)((uint)memDispl >> 24);
			case 12:
				return (byte)(memDispl >> 32);
			case 13:
				return (byte)(memDispl >> 40);
			case 14:
				return (byte)(memDispl >> 48);
			case 15:
				return (byte)(memDispl >> 56);
			default:
				ThrowHelper.ThrowArgumentOutOfRangeException_index();
				return 0;
			}
		}

		public void SetDeclareWordValue(int index, short value)
		{
			SetDeclareWordValue(index, (ushort)value);
		}

		public void SetDeclareWordValue(int index, ushort value)
		{
			switch (index)
			{
			case 0:
				reg0 = (byte)value;
				reg1 = (byte)(value >> 8);
				break;
			case 1:
				reg2 = (byte)value;
				reg3 = (byte)(value >> 8);
				break;
			case 2:
				immediate = (immediate & 0xFFFF0000u) | value;
				break;
			case 3:
				immediate = (uint)((ushort)immediate | (value << 16));
				break;
			case 4:
				memDispl = (memDispl & 0xFFFFFFFFFFFF0000uL) | value;
				break;
			case 5:
				memDispl = (memDispl & 0xFFFFFFFF0000FFFFuL) | ((ulong)value << 16);
				break;
			case 6:
				memDispl = (memDispl & 0xFFFF0000FFFFFFFFuL) | ((ulong)value << 32);
				break;
			case 7:
				memDispl = (memDispl & 0xFFFFFFFFFFFFuL) | ((ulong)value << 48);
				break;
			default:
				ThrowHelper.ThrowArgumentOutOfRangeException_index();
				break;
			}
		}

		public readonly ushort GetDeclareWordValue(int index)
		{
			switch (index)
			{
			case 0:
				return (ushort)(reg0 | (reg1 << 8));
			case 1:
				return (ushort)(reg2 | (reg3 << 8));
			case 2:
				return (ushort)immediate;
			case 3:
				return (ushort)(immediate >> 16);
			case 4:
				return (ushort)memDispl;
			case 5:
				return (ushort)((uint)memDispl >> 16);
			case 6:
				return (ushort)(memDispl >> 32);
			case 7:
				return (ushort)(memDispl >> 48);
			default:
				ThrowHelper.ThrowArgumentOutOfRangeException_index();
				return 0;
			}
		}

		public void SetDeclareDwordValue(int index, int value)
		{
			SetDeclareDwordValue(index, (uint)value);
		}

		public void SetDeclareDwordValue(int index, uint value)
		{
			switch (index)
			{
			case 0:
				reg0 = (byte)value;
				reg1 = (byte)(value >> 8);
				reg2 = (byte)(value >> 16);
				reg3 = (byte)(value >> 24);
				break;
			case 1:
				immediate = value;
				break;
			case 2:
				memDispl = (memDispl & 0xFFFFFFFF00000000uL) | value;
				break;
			case 3:
				memDispl = (memDispl & 0xFFFFFFFFu) | ((ulong)value << 32);
				break;
			default:
				ThrowHelper.ThrowArgumentOutOfRangeException_index();
				break;
			}
		}

		public readonly uint GetDeclareDwordValue(int index)
		{
			switch (index)
			{
			case 0:
				return (uint)(reg0 | (reg1 << 8) | (reg2 << 16) | (reg3 << 24));
			case 1:
				return immediate;
			case 2:
				return (uint)memDispl;
			case 3:
				return (uint)(memDispl >> 32);
			default:
				ThrowHelper.ThrowArgumentOutOfRangeException_index();
				return 0u;
			}
		}

		public void SetDeclareQwordValue(int index, long value)
		{
			SetDeclareQwordValue(index, (ulong)value);
		}

		public void SetDeclareQwordValue(int index, ulong value)
		{
			switch (index)
			{
			case 0:
			{
				uint num = (uint)value;
				reg0 = (byte)num;
				reg1 = (byte)(num >> 8);
				reg2 = (byte)(num >> 16);
				reg3 = (byte)(num >> 24);
				immediate = (uint)(value >> 32);
				break;
			}
			case 1:
				memDispl = value;
				break;
			default:
				ThrowHelper.ThrowArgumentOutOfRangeException_index();
				break;
			}
		}

		public readonly ulong GetDeclareQwordValue(int index)
		{
			switch (index)
			{
			case 0:
				return (ulong)reg0 | (ulong)(uint)(reg1 << 8) | (uint)(reg2 << 16) | (uint)(reg3 << 24) | ((ulong)immediate << 32);
			case 1:
				return memDispl;
			default:
				ThrowHelper.ThrowArgumentOutOfRangeException_index();
				return 0uL;
			}
		}

		public readonly bool TryGetVsib64(out bool vsib64)
		{
			switch (Code)
			{
			case Code.VEX_Vpgatherdd_xmm_vm32x_xmm:
			case Code.VEX_Vpgatherdd_ymm_vm32y_ymm:
			case Code.VEX_Vpgatherdq_xmm_vm32x_xmm:
			case Code.VEX_Vpgatherdq_ymm_vm32x_ymm:
			case Code.EVEX_Vpgatherdd_xmm_k1_vm32x:
			case Code.EVEX_Vpgatherdd_ymm_k1_vm32y:
			case Code.EVEX_Vpgatherdd_zmm_k1_vm32z:
			case Code.EVEX_Vpgatherdq_xmm_k1_vm32x:
			case Code.EVEX_Vpgatherdq_ymm_k1_vm32x:
			case Code.EVEX_Vpgatherdq_zmm_k1_vm32y:
			case Code.VEX_Vgatherdps_xmm_vm32x_xmm:
			case Code.VEX_Vgatherdps_ymm_vm32y_ymm:
			case Code.VEX_Vgatherdpd_xmm_vm32x_xmm:
			case Code.VEX_Vgatherdpd_ymm_vm32x_ymm:
			case Code.EVEX_Vgatherdps_xmm_k1_vm32x:
			case Code.EVEX_Vgatherdps_ymm_k1_vm32y:
			case Code.EVEX_Vgatherdps_zmm_k1_vm32z:
			case Code.EVEX_Vgatherdpd_xmm_k1_vm32x:
			case Code.EVEX_Vgatherdpd_ymm_k1_vm32x:
			case Code.EVEX_Vgatherdpd_zmm_k1_vm32y:
			case Code.EVEX_Vpscatterdd_vm32x_k1_xmm:
			case Code.EVEX_Vpscatterdd_vm32y_k1_ymm:
			case Code.EVEX_Vpscatterdd_vm32z_k1_zmm:
			case Code.EVEX_Vpscatterdq_vm32x_k1_xmm:
			case Code.EVEX_Vpscatterdq_vm32x_k1_ymm:
			case Code.EVEX_Vpscatterdq_vm32y_k1_zmm:
			case Code.EVEX_Vscatterdps_vm32x_k1_xmm:
			case Code.EVEX_Vscatterdps_vm32y_k1_ymm:
			case Code.EVEX_Vscatterdps_vm32z_k1_zmm:
			case Code.EVEX_Vscatterdpd_vm32x_k1_xmm:
			case Code.EVEX_Vscatterdpd_vm32x_k1_ymm:
			case Code.EVEX_Vscatterdpd_vm32y_k1_zmm:
			case Code.EVEX_Vgatherpf0dps_vm32z_k1:
			case Code.EVEX_Vgatherpf0dpd_vm32y_k1:
			case Code.EVEX_Vgatherpf1dps_vm32z_k1:
			case Code.EVEX_Vgatherpf1dpd_vm32y_k1:
			case Code.EVEX_Vscatterpf0dps_vm32z_k1:
			case Code.EVEX_Vscatterpf0dpd_vm32y_k1:
			case Code.EVEX_Vscatterpf1dps_vm32z_k1:
			case Code.EVEX_Vscatterpf1dpd_vm32y_k1:
			case Code.MVEX_Vpgatherdd_zmm_k1_mvt:
			case Code.MVEX_Vpgatherdq_zmm_k1_mvt:
			case Code.MVEX_Vgatherdps_zmm_k1_mvt:
			case Code.MVEX_Vgatherdpd_zmm_k1_mvt:
			case Code.MVEX_Vpscatterdd_mvt_k1_zmm:
			case Code.MVEX_Vpscatterdq_mvt_k1_zmm:
			case Code.MVEX_Vscatterdps_mvt_k1_zmm:
			case Code.MVEX_Vscatterdpd_mvt_k1_zmm:
			case Code.MVEX_Undoc_zmm_k1_mvt_512_66_0F38_W0_B0:
			case Code.MVEX_Undoc_zmm_k1_mvt_512_66_0F38_W0_B2:
			case Code.MVEX_Undoc_zmm_k1_mvt_512_66_0F38_W0_C0:
			case Code.MVEX_Vgatherpf0hintdps_mvt_k1:
			case Code.MVEX_Vgatherpf0hintdpd_mvt_k1:
			case Code.MVEX_Vgatherpf0dps_mvt_k1:
			case Code.MVEX_Vgatherpf1dps_mvt_k1:
			case Code.MVEX_Vscatterpf0hintdps_mvt_k1:
			case Code.MVEX_Vscatterpf0hintdpd_mvt_k1:
			case Code.MVEX_Vscatterpf0dps_mvt_k1:
			case Code.MVEX_Vscatterpf1dps_mvt_k1:
				vsib64 = false;
				return true;
			case Code.VEX_Vpgatherqd_xmm_vm64x_xmm:
			case Code.VEX_Vpgatherqd_xmm_vm64y_xmm:
			case Code.VEX_Vpgatherqq_xmm_vm64x_xmm:
			case Code.VEX_Vpgatherqq_ymm_vm64y_ymm:
			case Code.EVEX_Vpgatherqd_xmm_k1_vm64x:
			case Code.EVEX_Vpgatherqd_xmm_k1_vm64y:
			case Code.EVEX_Vpgatherqd_ymm_k1_vm64z:
			case Code.EVEX_Vpgatherqq_xmm_k1_vm64x:
			case Code.EVEX_Vpgatherqq_ymm_k1_vm64y:
			case Code.EVEX_Vpgatherqq_zmm_k1_vm64z:
			case Code.VEX_Vgatherqps_xmm_vm64x_xmm:
			case Code.VEX_Vgatherqps_xmm_vm64y_xmm:
			case Code.VEX_Vgatherqpd_xmm_vm64x_xmm:
			case Code.VEX_Vgatherqpd_ymm_vm64y_ymm:
			case Code.EVEX_Vgatherqps_xmm_k1_vm64x:
			case Code.EVEX_Vgatherqps_xmm_k1_vm64y:
			case Code.EVEX_Vgatherqps_ymm_k1_vm64z:
			case Code.EVEX_Vgatherqpd_xmm_k1_vm64x:
			case Code.EVEX_Vgatherqpd_ymm_k1_vm64y:
			case Code.EVEX_Vgatherqpd_zmm_k1_vm64z:
			case Code.EVEX_Vpscatterqd_vm64x_k1_xmm:
			case Code.EVEX_Vpscatterqd_vm64y_k1_xmm:
			case Code.EVEX_Vpscatterqd_vm64z_k1_ymm:
			case Code.EVEX_Vpscatterqq_vm64x_k1_xmm:
			case Code.EVEX_Vpscatterqq_vm64y_k1_ymm:
			case Code.EVEX_Vpscatterqq_vm64z_k1_zmm:
			case Code.EVEX_Vscatterqps_vm64x_k1_xmm:
			case Code.EVEX_Vscatterqps_vm64y_k1_xmm:
			case Code.EVEX_Vscatterqps_vm64z_k1_ymm:
			case Code.EVEX_Vscatterqpd_vm64x_k1_xmm:
			case Code.EVEX_Vscatterqpd_vm64y_k1_ymm:
			case Code.EVEX_Vscatterqpd_vm64z_k1_zmm:
			case Code.EVEX_Vgatherpf0qps_vm64z_k1:
			case Code.EVEX_Vgatherpf0qpd_vm64z_k1:
			case Code.EVEX_Vgatherpf1qps_vm64z_k1:
			case Code.EVEX_Vgatherpf1qpd_vm64z_k1:
			case Code.EVEX_Vscatterpf0qps_vm64z_k1:
			case Code.EVEX_Vscatterpf0qpd_vm64z_k1:
			case Code.EVEX_Vscatterpf1qps_vm64z_k1:
			case Code.EVEX_Vscatterpf1qpd_vm64z_k1:
				vsib64 = true;
				return true;
			default:
				vsib64 = false;
				return false;
			}
		}

		[MethodImpl(MethodImplOptions.AggressiveInlining)]
		internal void InternalSetSuppressAllExceptions()
		{
			flags1 |= 134217728u;
		}

		public override readonly string ToString()
		{
			StringOutput stringOutput = new StringOutput();
			new MasmFormatter().Format(in this, stringOutput);
			return stringOutput.ToString();
		}

		public readonly FpuStackIncrementInfo GetFpuStackIncrementInfo()
		{
			switch (Code)
			{
			case Code.Fld_m32fp:
			case Code.Fld_sti:
			case Code.Fld1:
			case Code.Fldl2t:
			case Code.Fldl2e:
			case Code.Fldpi:
			case Code.Fldlg2:
			case Code.Fldln2:
			case Code.Fldz:
			case Code.Fxtract:
			case Code.Fdecstp:
			case Code.Fild_m32int:
			case Code.Fld_m80fp:
			case Code.Fld_m64fp:
			case Code.Fild_m16int:
			case Code.Fbld_m80bcd:
			case Code.Fild_m64int:
				return new FpuStackIncrementInfo(-1, conditional: false, writesTop: true);
			case Code.Fptan:
			case Code.Fsincos:
				return new FpuStackIncrementInfo(-1, conditional: true, writesTop: true);
			case Code.Fldenv_m14byte:
			case Code.Fldenv_m28byte:
			case Code.Fninit:
			case Code.Finit:
			case Code.Frstor_m94byte:
			case Code.Frstor_m108byte:
			case Code.Fnsave_m94byte:
			case Code.Fsave_m94byte:
			case Code.Fnsave_m108byte:
			case Code.Fsave_m108byte:
				return new FpuStackIncrementInfo(0, conditional: false, writesTop: true);
			case Code.Fcomp_m32fp:
			case Code.Fcomp_st0_sti:
			case Code.Fstp_m32fp:
			case Code.Fstpnce_sti:
			case Code.Fyl2x:
			case Code.Fpatan:
			case Code.Fincstp:
			case Code.Fyl2xp1:
			case Code.Ficomp_m32int:
			case Code.Fisttp_m32int:
			case Code.Fistp_m32int:
			case Code.Fstp_m80fp:
			case Code.Fcomp_m64fp:
			case Code.Fcomp_st0_sti_DCD8:
			case Code.Fisttp_m64int:
			case Code.Fstp_m64fp:
			case Code.Fstp_sti:
			case Code.Fucomp_st0_sti:
			case Code.Ficomp_m16int:
			case Code.Faddp_sti_st0:
			case Code.Fmulp_sti_st0:
			case Code.Fcomp_st0_sti_DED0:
			case Code.Fsubrp_sti_st0:
			case Code.Fsubp_sti_st0:
			case Code.Fdivrp_sti_st0:
			case Code.Fdivp_sti_st0:
			case Code.Fisttp_m16int:
			case Code.Fistp_m16int:
			case Code.Fbstp_m80bcd:
			case Code.Fistp_m64int:
			case Code.Ffreep_sti:
			case Code.Fstp_sti_DFD0:
			case Code.Fstp_sti_DFD8:
			case Code.Fucomip_st0_sti:
			case Code.Fcomip_st0_sti:
			case Code.Ftstp:
				return new FpuStackIncrementInfo(1, conditional: false, writesTop: true);
			case Code.Fucompp:
			case Code.Fcompp:
				return new FpuStackIncrementInfo(2, conditional: false, writesTop: true);
			default:
				return default(FpuStackIncrementInfo);
			}
		}

		private readonly RflagsInfo GetRflagsInfo()
		{
			uint num = InstrInfoTable.Data[(int)Code << 1];
			ImpliedAccess impliedAccess = (ImpliedAccess)((int)(num >> 20) & 0xFF);
			RflagsInfo rflagsInfo = (RflagsInfo)((int)(num >> 13) & 0x7F);
			int num4;
			int num2;
			int num3;
			int num5;
			switch ((uint)(impliedAccess - 1))
			{
			case 1u:
				num4 = 17;
				goto IL_004c;
			case 0u:
				num4 = 9;
				goto IL_004c;
			case 3u:
				num2 = 63;
				goto IL_0074;
			case 2u:
				num2 = 31;
				goto IL_0074;
			case 4u:
				{
					if (Op0Register == Op1Register && Op0Kind == OpKind.Register && Op1Kind == OpKind.Register)
					{
						if (Mnemonic == Mnemonic.Xor)
						{
							return RflagsInfo.C_cos_S_pz_U_a;
						}
						return RflagsInfo.C_acos_S_pz;
					}
					break;
				}
				IL_0074:
				num3 = num2;
				switch (Immediate8 & num3)
				{
				case 0:
					return RflagsInfo.None;
				case 1:
					return rflagsInfo switch
					{
						RflagsInfo.W_c_U_o => RflagsInfo.W_co, 
						RflagsInfo.R_c_W_c_U_o => RflagsInfo.R_c_W_co, 
						_ => RflagsInfo.W_copsz_U_a, 
					};
				}
				break;
				IL_004c:
				num5 = num4;
				switch ((Immediate8 & 0x1F) % num5)
				{
				case 0:
					return RflagsInfo.None;
				case 1:
					return RflagsInfo.R_c_W_co;
				}
				break;
			}
			return rflagsInfo;
		}

		[MethodImpl(MethodImplOptions.AggressiveInlining)]
		public void NegateConditionCode()
		{
			InternalSetCodeNoCheck(Code.NegateConditionCode());
		}

		[MethodImpl(MethodImplOptions.AggressiveInlining)]
		public void ToShortBranch()
		{
			InternalSetCodeNoCheck(Code.ToShortBranch());
		}

		[MethodImpl(MethodImplOptions.AggressiveInlining)]
		public void ToNearBranch()
		{
			InternalSetCodeNoCheck(Code.ToNearBranch());
		}

		public readonly ulong GetVirtualAddress(int operand, int elementIndex, VAGetRegisterValue getRegisterValue)
		{
			if (getRegisterValue == null)
			{
				throw new ArgumentNullException("getRegisterValue");
			}
			VARegisterValueProviderDelegateImpl registerValueProvider = new VARegisterValueProviderDelegateImpl(getRegisterValue);
			if (TryGetVirtualAddress(operand, elementIndex, registerValueProvider, out var result))
			{
				return result;
			}
			return 0uL;
		}

		public readonly ulong GetVirtualAddress(int operand, int elementIndex, IVARegisterValueProvider registerValueProvider)
		{
			if (registerValueProvider == null)
			{
				throw new ArgumentNullException("registerValueProvider");
			}
			VARegisterValueProviderAdapter registerValueProvider2 = new VARegisterValueProviderAdapter(registerValueProvider);
			if (TryGetVirtualAddress(operand, elementIndex, registerValueProvider2, out var result))
			{
				return result;
			}
			return 0uL;
		}

		public readonly bool TryGetVirtualAddress(int operand, int elementIndex, out ulong result, VATryGetRegisterValue getRegisterValue)
		{
			if (getRegisterValue == null)
			{
				throw new ArgumentNullException("getRegisterValue");
			}
			VATryGetRegisterValueDelegateImpl registerValueProvider = new VATryGetRegisterValueDelegateImpl(getRegisterValue);
			return TryGetVirtualAddress(operand, elementIndex, registerValueProvider, out result);
		}

		public readonly bool TryGetVirtualAddress(int operand, int elementIndex, IVATryGetRegisterValueProvider registerValueProvider, out ulong result)
		{
			if (registerValueProvider == null)
			{
				throw new ArgumentNullException("registerValueProvider");
			}
			ulong value2;
			ulong value;
			switch (GetOpKind(operand))
			{
			case OpKind.Register:
			case OpKind.NearBranch16:
			case OpKind.NearBranch32:
			case OpKind.NearBranch64:
			case OpKind.FarBranch16:
			case OpKind.FarBranch32:
			case OpKind.Immediate8:
			case OpKind.Immediate8_2nd:
			case OpKind.Immediate16:
			case OpKind.Immediate32:
			case OpKind.Immediate64:
			case OpKind.Immediate8to16:
			case OpKind.Immediate8to32:
			case OpKind.Immediate8to64:
			case OpKind.Immediate32to64:
				result = 0uL;
				return true;
			case OpKind.MemorySegSI:
				if (registerValueProvider.TryGetRegisterValue(MemorySegment, 0, 0, out value2) && registerValueProvider.TryGetRegisterValue(Register.SI, 0, 0, out value))
				{
					result = value2 + (ushort)value;
					return true;
				}
				break;
			case OpKind.MemorySegESI:
				if (registerValueProvider.TryGetRegisterValue(MemorySegment, 0, 0, out value2) && registerValueProvider.TryGetRegisterValue(Register.ESI, 0, 0, out value))
				{
					result = value2 + (uint)value;
					return true;
				}
				break;
			case OpKind.MemorySegRSI:
				if (registerValueProvider.TryGetRegisterValue(MemorySegment, 0, 0, out value2) && registerValueProvider.TryGetRegisterValue(Register.RSI, 0, 0, out value))
				{
					result = value2 + value;
					return true;
				}
				break;
			case OpKind.MemorySegDI:
				if (registerValueProvider.TryGetRegisterValue(MemorySegment, 0, 0, out value2) && registerValueProvider.TryGetRegisterValue(Register.DI, 0, 0, out value))
				{
					result = value2 + (ushort)value;
					return true;
				}
				break;
			case OpKind.MemorySegEDI:
				if (registerValueProvider.TryGetRegisterValue(MemorySegment, 0, 0, out value2) && registerValueProvider.TryGetRegisterValue(Register.EDI, 0, 0, out value))
				{
					result = value2 + (uint)value;
					return true;
				}
				break;
			case OpKind.MemorySegRDI:
				if (registerValueProvider.TryGetRegisterValue(MemorySegment, 0, 0, out value2) && registerValueProvider.TryGetRegisterValue(Register.RDI, 0, 0, out value))
				{
					result = value2 + value;
					return true;
				}
				break;
			case OpKind.MemoryESDI:
				if (registerValueProvider.TryGetRegisterValue(Register.ES, 0, 0, out value2) && registerValueProvider.TryGetRegisterValue(Register.DI, 0, 0, out value))
				{
					result = value2 + (ushort)value;
					return true;
				}
				break;
			case OpKind.MemoryESEDI:
				if (registerValueProvider.TryGetRegisterValue(Register.ES, 0, 0, out value2) && registerValueProvider.TryGetRegisterValue(Register.EDI, 0, 0, out value))
				{
					result = value2 + (uint)value;
					return true;
				}
				break;
			case OpKind.MemoryESRDI:
				if (registerValueProvider.TryGetRegisterValue(Register.ES, 0, 0, out value2) && registerValueProvider.TryGetRegisterValue(Register.RDI, 0, 0, out value))
				{
					result = value2 + value;
					return true;
				}
				break;
			case OpKind.Memory:
			{
				Register memoryBase = MemoryBase;
				Register memoryIndex = MemoryIndex;
				int addressSizeInBytes = InstructionUtils.GetAddressSizeInBytes(memoryBase, memoryIndex, MemoryDisplSize, CodeSize);
				ulong num = MemoryDisplacement64;
				ulong num2 = addressSizeInBytes switch
				{
					8 => ulong.MaxValue, 
					4 => 4294967295uL, 
					_ => 65535uL, 
				};
				if (memoryBase != 0 && memoryBase != Register.RIP && memoryBase != Register.EIP)
				{
					if (!registerValueProvider.TryGetRegisterValue(memoryBase, 0, 0, out value))
					{
						break;
					}
					num += value;
				}
				Code code = Code;
				if (memoryIndex != 0 && !code.IgnoresIndex() && !code.IsTileStrideIndex())
				{
					if (TryGetVsib64(out var vsib))
					{
						bool flag;
						if (vsib)
						{
							flag = registerValueProvider.TryGetRegisterValue(memoryIndex, elementIndex, 8, out value);
						}
						else
						{
							flag = registerValueProvider.TryGetRegisterValue(memoryIndex, elementIndex, 4, out value);
							value = (ulong)(int)value;
						}
						if (!flag)
						{
							break;
						}
						num += value << InternalMemoryIndexScale;
					}
					else
					{
						if (!registerValueProvider.TryGetRegisterValue(memoryIndex, 0, 0, out value))
						{
							break;
						}
						num += value << InternalMemoryIndexScale;
					}
				}
				if (code >= Code.MVEX_Vloadunpackhd_zmm_k1_mt && code <= Code.MVEX_Vpackstorehpd_mt_k1_zmm)
				{
					num -= 64;
				}
				num &= num2;
				if (!code.IgnoresSegment())
				{
					if (!registerValueProvider.TryGetRegisterValue(MemorySegment, 0, 0, out value2))
					{
						break;
					}
					num += value2;
				}
				result = num;
				return true;
			}
			default:
				throw new InvalidOperationException();
			}
			result = 0uL;
			return false;
		}
	}
	public readonly struct FpuStackIncrementInfo
	{
		public readonly int Increment;

		public readonly bool Conditional;

		public readonly bool WritesTop;

		public FpuStackIncrementInfo(int increment, bool conditional, bool writesTop)
		{
			Increment = increment;
			Conditional = conditional;
			WritesTop = writesTop;
		}
	}
	public delegate ulong VAGetRegisterValue(Register register, int elementIndex, int elementSize);
	public interface IVARegisterValueProvider
	{
		ulong GetRegisterValue(Register register, int elementIndex, int elementSize);
	}
	public delegate bool VATryGetRegisterValue(Register register, int elementIndex, int elementSize, out ulong value);
	public interface IVATryGetRegisterValueProvider
	{
		bool TryGetRegisterValue(Register register, int elementIndex, int elementSize, out ulong value);
	}
	internal sealed class VARegisterValueProviderDelegateImpl : IVATryGetRegisterValueProvider
	{
		private readonly VAGetRegisterValue getRegisterValue;

		public VARegisterValueProviderDelegateImpl(VAGetRegisterValue getRegisterValue)
		{
			this.getRegisterValue = getRegisterValue ?? throw new ArgumentNullException("getRegisterValue");
		}

		public bool TryGetRegisterValue(Register register, int elementIndex, int elementSize, out ulong value)
		{
			value = getRegisterValue(register, elementIndex, elementSize);
			return true;
		}
	}
	internal sealed class VARegisterValueProviderAdapter : IVATryGetRegisterValueProvider
	{
		private readonly IVARegisterValueProvider provider;

		public VARegisterValueProviderAdapter(IVARegisterValueProvider provider)
		{
			this.provider = provider;
		}

		public bool TryGetRegisterValue(Register register, int elementIndex, int elementSize, out ulong value)
		{
			value = provider.GetRegisterValue(register, elementIndex, elementSize);
			return true;
		}
	}
	internal sealed class VATryGetRegisterValueDelegateImpl : IVATryGetRegisterValueProvider
	{
		private readonly VATryGetRegisterValue getRegisterValue;

		public VATryGetRegisterValueDelegateImpl(VATryGetRegisterValue getRegisterValue)
		{
			this.getRegisterValue = getRegisterValue;
		}

		public bool TryGetRegisterValue(Register register, int elementIndex, int elementSize, out ulong value)
		{
			return getRegisterValue(register, elementIndex, elementSize, out value);
		}
	}
	public struct InstructionInfo
	{
		public struct UsedRegisterIterator : IEnumerable<UsedRegister>, IEnumerable, IEnumerator<UsedRegister>, IEnumerator, IDisposable
		{
			private readonly UsedRegister[] usedRegisters;

			private readonly uint length;

			private int index;

			public UsedRegister Current => usedRegisters[index];

			UsedRegister IEnumerator<UsedRegister>.Current => Current;

			object IEnumerator.Current => Current;

			internal UsedRegisterIterator(UsedRegister[] usedRegisters, uint length)
			{
				this.usedRegisters = usedRegisters;
				this.length = length;
				index = -1;
			}

			public UsedRegisterIterator GetEnumerator()
			{
				return this;
			}

			public bool MoveNext()
			{
				index++;
				return (uint)index < length;
			}

			IEnumerator<UsedRegister> IEnumerable<UsedRegister>.GetEnumerator()
			{
				return GetEnumerator();
			}

			IEnumerator IEnumerable.GetEnumerator()
			{
				return GetEnumerator();
			}

			bool IEnumerator.MoveNext()
			{
				return MoveNext();
			}

			void IEnumerator.Reset()
			{
				throw new NotSupportedException();
			}

			public void Dispose()
			{
			}
		}

		public struct UsedMemoryIterator : IEnumerable<UsedMemory>, IEnumerable, IEnumerator<UsedMemory>, IEnumerator, IDisposable
		{
			private readonly UsedMemory[] usedMemoryLocations;

			private readonly uint length;

			private int index;

			public UsedMemory Current => usedMemoryLocations[index];

			UsedMemory IEnumerator<UsedMemory>.Current => Current;

			object IEnumerator.Current => Current;

			internal UsedMemoryIterator(UsedMemory[] usedMemoryLocations, uint length)
			{
				this.usedMemoryLocations = usedMemoryLocations;
				this.length = length;
				index = -1;
			}

			public UsedMemoryIterator GetEnumerator()
			{
				return this;
			}

			public bool MoveNext()
			{
				index++;
				return (uint)index < length;
			}

			IEnumerator<UsedMemory> IEnumerable<UsedMemory>.GetEnumerator()
			{
				return GetEnumerator();
			}

			IEnumerator IEnumerable.GetEnumerator()
			{
				return GetEnumerator();
			}

			bool IEnumerator.MoveNext()
			{
				return MoveNext();
			}

			void IEnumerator.Reset()
			{
				throw new NotSupportedException();
			}

			public void Dispose()
			{
			}
		}

		internal SimpleList<UsedRegister> usedRegisters;

		internal SimpleList<UsedMemory> usedMemoryLocations;

		internal unsafe fixed byte opAccesses[5];

		public unsafe readonly OpAccess Op0Access => (OpAccess)opAccesses[0];

		public unsafe readonly OpAccess Op1Access => (OpAccess)opAccesses[1];

		public unsafe readonly OpAccess Op2Access => (OpAccess)opAccesses[2];

		public unsafe readonly OpAccess Op3Access => (OpAccess)opAccesses[3];

		public unsafe readonly OpAccess Op4Access => (OpAccess)opAccesses[4];

		internal unsafe InstructionInfo(bool dummy)
		{
			usedRegisters = new SimpleList<UsedRegister>(new UsedRegister[10]);
			usedMemoryLocations = new SimpleList<UsedMemory>(new UsedMemory[8]);
			opAccesses[0] = 0;
			opAccesses[1] = 0;
			opAccesses[2] = 0;
			opAccesses[3] = 0;
			opAccesses[4] = 0;
		}

		public readonly UsedRegisterIterator GetUsedRegisters()
		{
			return new UsedRegisterIterator(usedRegisters.Array, (uint)usedRegisters.ValidLength);
		}

		public readonly UsedMemoryIterator GetUsedMemory()
		{
			return new UsedMemoryIterator(usedMemoryLocations.Array, (uint)usedMemoryLocations.ValidLength);
		}

		public readonly OpAccess GetOpAccess(int operand)
		{
			switch (operand)
			{
			case 0:
				return Op0Access;
			case 1:
				return Op1Access;
			case 2:
				return Op2Access;
			case 3:
				return Op3Access;
			case 4:
				return Op4Access;
			default:
				ThrowHelper.ThrowArgumentOutOfRangeException_operand();
				return OpAccess.None;
			}
		}
	}
	public static class InstructionInfoExtensions
	{
		[MethodImpl(MethodImplOptions.AggressiveInlining)]
		public static EncodingKind Encoding(this Code code)
		{
			uint[] data = InstrInfoTable.Data;
			int num = (int)code * 2 + 1;
			if ((uint)num >= (uint)data.Length)
			{
				ThrowHelper.ThrowArgumentOutOfRangeException_code();
			}
			return (EncodingKind)((int)data[num] & 7);
		}

		[MethodImpl(MethodImplOptions.AggressiveInlining)]
		public static CpuidFeature[] CpuidFeatures(this Code code)
		{
			uint[] data = InstrInfoTable.Data;
			int num = (int)code * 2 + 1;
			if ((uint)num >= (uint)data.Length)
			{
				ThrowHelper.ThrowArgumentOutOfRangeException_code();
			}
			CpuidFeatureInternal cpuidFeatureInternal = (CpuidFeatureInternal)((int)(data[num] >> 24) & 0xFF);
			return CpuidFeatureInternalData.ToCpuidFeatures[(int)cpuidFeatureInternal];
		}

		[MethodImpl(MethodImplOptions.AggressiveInlining)]
		public static FlowControl FlowControl(this Code code)
		{
			uint[] data = InstrInfoTable.Data;
			int num = (int)code * 2 + 1;
			if ((uint)num >= (uint)data.Length)
			{
				ThrowHelper.ThrowArgumentOutOfRangeException_code();
			}
			return (FlowControl)((int)(data[num] >> 20) & 0xF);
		}

		[MethodImpl(MethodImplOptions.AggressiveInlining)]
		public static bool IsPrivileged(this Code code)
		{
			uint[] data = InstrInfoTable.Data;
			int num = (int)code * 2 + 1;
			if ((uint)num >= (uint)data.Length)
			{
				ThrowHelper.ThrowArgumentOutOfRangeException_code();
			}
			return (data[num] & 0x80000) != 0;
		}

		[MethodImpl(MethodImplOptions.AggressiveInlining)]
		public static bool IsStackInstruction(this Code code)
		{
			uint[] data = InstrInfoTable.Data;
			int num = (int)code * 2 + 1;
			if ((uint)num >= (uint)data.Length)
			{
				ThrowHelper.ThrowArgumentOutOfRangeException_code();
			}
			return (data[num] & 0x40000) != 0;
		}

		[MethodImpl(MethodImplOptions.AggressiveInlining)]
		public static bool IsSaveRestoreInstruction(this Code code)
		{
			uint[] data = InstrInfoTable.Data;
			int num = (int)code * 2 + 1;
			if ((uint)num >= (uint)data.Length)
			{
				ThrowHelper.ThrowArgumentOutOfRangeException_code();
			}
			return (data[num] & 0x20000) != 0;
		}

		[MethodImpl(MethodImplOptions.AggressiveInlining)]
		public static bool IsJccNear(this Code code)
		{
			return (uint)(code - 1854) <= 47u;
		}

		[MethodImpl(MethodImplOptions.AggressiveInlining)]
		public static bool IsJccShort(this Code code)
		{
			return (uint)(code - 159) <= 47u;
		}

		[MethodImpl(MethodImplOptions.AggressiveInlining)]
		public static bool IsJmpShort(this Code code)
		{
			return (uint)(code - 699) <= 2u;
		}

		[MethodImpl(MethodImplOptions.AggressiveInlining)]
		public static bool IsJmpNear(this Code code)
		{
			return (uint)(code - 694) <= 2u;
		}

		[MethodImpl(MethodImplOptions.AggressiveInlining)]
		public static bool IsJmpShortOrNear(this Code code)
		{
			if ((uint)(code - 699) > 2u)
			{
				return (uint)(code - 694) <= 2u;
			}
			return true;
		}

		[MethodImpl(MethodImplOptions.AggressiveInlining)]
		public static bool IsJmpFar(this Code code)
		{
			return (uint)(code - 697) <= 1u;
		}

		[MethodImpl(MethodImplOptions.AggressiveInlining)]
		public static bool IsCallNear(this Code code)
		{
			return (uint)(code - 691) <= 2u;
		}

		[MethodImpl(MethodImplOptions.AggressiveInlining)]
		public static bool IsCallFar(this Code code)
		{
			return (uint)(code - 312) <= 1u;
		}

		[MethodImpl(MethodImplOptions.AggressiveInlining)]
		public static bool IsJmpNearIndirect(this Code code)
		{
			return (uint)(code - 763) <= 2u;
		}

		[MethodImpl(MethodImplOptions.AggressiveInlining)]
		public static bool IsJmpFarIndirect(this Code code)
		{
			return (uint)(code - 766) <= 2u;
		}

		[MethodImpl(MethodImplOptions.AggressiveInlining)]
		public static bool IsCallNearIndirect(this Code code)
		{
			return (uint)(code - 757) <= 2u;
		}

		[MethodImpl(MethodImplOptions.AggressiveInlining)]
		public static bool IsCallFarIndirect(this Code code)
		{
			return (uint)(code - 760) <= 2u;
		}

		[MethodImpl(MethodImplOptions.AggressiveInlining)]
		public static bool IsJkccShortOrNear(this Code code)
		{
			if (code != Code.VEX_KNC_Jkzd_kr_rel32_64 && code != Code.VEX_KNC_Jknzd_kr_rel32_64 && code != Code.VEX_KNC_Jkzd_kr_rel8_64)
			{
				return code == Code.VEX_KNC_Jknzd_kr_rel8_64;
			}
			return true;
		}

		[MethodImpl(MethodImplOptions.AggressiveInlining)]
		public static bool IsJkccNear(this Code code)
		{
			if (code != Code.VEX_KNC_Jkzd_kr_rel32_64)
			{
				return code == Code.VEX_KNC_Jknzd_kr_rel32_64;
			}
			return true;
		}

		[MethodImpl(MethodImplOptions.AggressiveInlining)]
		public static bool IsJkccShort(this Code code)
		{
			if (code != Code.VEX_KNC_Jkzd_kr_rel8_64)
			{
				return code == Code.VEX_KNC_Jknzd_kr_rel8_64;
			}
			return true;
		}

		public static ConditionCode ConditionCode(this Code code)
		{
			uint num;
			if ((num = (uint)(code - 1854)) <= 47 || (num = (uint)(code - 159)) <= 47 || (num = (uint)(code - 1169)) <= 47)
			{
				return (ConditionCode)(num / 3 + 1);
			}
			num = (uint)(code - 1902);
			if (num <= 15)
			{
				return (ConditionCode)(num + 1);
			}
			num = (uint)(code - 657);
			if (num <= 6)
			{
				return Iced.Intel.ConditionCode.ne;
			}
			num = (uint)(code - 664);
			if (num <= 6)
			{
				return Iced.Intel.ConditionCode.e;
			}
			if ((num = (uint)(code - 4879)) <= 31)
			{
				return (ConditionCode)(num / 2 + 1);
			}
			switch (code)
			{
			case Code.VEX_KNC_Jkzd_kr_rel8_64:
			case Code.VEX_KNC_Jkzd_kr_rel32_64:
				return Iced.Intel.ConditionCode.e;
			case Code.VEX_KNC_Jknzd_kr_rel8_64:
			case Code.VEX_KNC_Jknzd_kr_rel32_64:
				return Iced.Intel.ConditionCode.ne;
			default:
				return Iced.Intel.ConditionCode.None;
			}
		}

		public static bool IsStringInstruction(this Code code)
		{
			if ((uint)(code - 153) <= 5u || (uint)(code - 331) <= 7u || (uint)(code - 343) <= 11u)
			{
				return true;
			}
			return false;
		}

		[MethodImpl(MethodImplOptions.AggressiveInlining)]
		public static bool IsJcxShort(this Code code)
		{
			return (uint)(code - 678) <= 6u;
		}

		[MethodImpl(MethodImplOptions.AggressiveInlining)]
		public static bool IsLoopcc(this Code code)
		{
			return (uint)(code - 657) <= 13u;
		}

		[MethodImpl(MethodImplOptions.AggressiveInlining)]
		public static bool IsLoop(this Code code)
		{
			return (uint)(code - 671) <= 6u;
		}

		public static Code NegateConditionCode(this Code code)
		{
			uint num;
			if ((num = (uint)(code - 1854)) <= 47 || (num = (uint)(code - 159)) <= 47 || (num = (uint)(code - 1169)) <= 47)
			{
				if (((num / 3) & (true ? 1u : 0u)) != 0)
				{
					return code - 3;
				}
				return code + 3;
			}
			num = (uint)(code - 1902);
			if (num <= 15)
			{
				return (Code)((num ^ 1) + 1902);
			}
			num = (uint)(code - 657);
			if (num <= 13)
			{
				return (Code)(657 + (num + 7) % 14);
			}
			if ((num = (uint)(code - 4879)) <= 31)
			{
				if ((num & 2u) != 0)
				{
					return code - 2;
				}
				return code + 2;
			}
			return code switch
			{
				Code.VEX_KNC_Jkzd_kr_rel8_64 => Code.VEX_KNC_Jknzd_kr_rel8_64, 
				Code.VEX_KNC_Jknzd_kr_rel8_64 => Code.VEX_KNC_Jkzd_kr_rel8_64, 
				Code.VEX_KNC_Jkzd_kr_rel32_64 => Code.VEX_KNC_Jknzd_kr_rel32_64, 
				Code.VEX_KNC_Jknzd_kr_rel32_64 => Code.VEX_KNC_Jkzd_kr_rel32_64, 
				_ => code, 
			};
		}

		public static Code ToShortBranch(this Code code)
		{
			uint num = (uint)(code - 1854);
			if (num <= 47)
			{
				return (Code)(num + 159);
			}
			num = (uint)(code - 694);
			if (num <= 2)
			{
				return (Code)(num + 699);
			}
			return code switch
			{
				Code.VEX_KNC_Jkzd_kr_rel32_64 => Code.VEX_KNC_Jkzd_kr_rel8_64, 
				Code.VEX_KNC_Jknzd_kr_rel32_64 => Code.VEX_KNC_Jknzd_kr_rel8_64, 
				_ => code, 
			};
		}

		public static Code ToNearBranch(this Code code)
		{
			uint num = (uint)(code - 159);
			if (num <= 47)
			{
				return (Code)(num + 1854);
			}
			num = (uint)(code - 699);
			if (num <= 2)
			{
				return (Code)(num + 694);
			}
			return code switch
			{
				Code.VEX_KNC_Jkzd_kr_rel8_64 => Code.VEX_KNC_Jkzd_kr_rel32_64, 
				Code.VEX_KNC_Jknzd_kr_rel8_64 => Code.VEX_KNC_Jknzd_kr_rel32_64, 
				_ => code, 
			};
		}

		[MethodImpl(MethodImplOptions.AggressiveInlining)]
		public static bool IsJccShortOrNear(this Code code)
		{
			if ((uint)(code - 159) > 47u)
			{
				return (uint)(code - 1854) <= 47u;
			}
			return true;
		}
	}
	[Flags]
	public enum InstructionInfoOptions : uint
	{
		None = 0u,
		NoMemoryUsage = 1u,
		NoRegisterUsage = 2u
	}
	public sealed class InstructionInfoFactory
	{
		[Flags]
		private enum Flags : uint
		{
			None = 0u,
			NoMemoryUsage = 1u,
			NoRegisterUsage = 2u,
			Is64Bit = 4u,
			ZeroExtVecRegs = 8u
		}

		private const int defaultRegisterArrayCount = 2;

		private const int defaultMemoryArrayCount = 1;

		private InstructionInfo info;

		public InstructionInfoFactory()
		{
			info = new InstructionInfo(dummy: true);
		}

		public ref readonly InstructionInfo GetInfo(in Instruction instruction)
		{
			return ref Create(in instruction, InstructionInfoOptions.None);
		}

		public ref readonly InstructionInfo GetInfo(in Instruction instruction, InstructionInfoOptions options)
		{
			return ref Create(in instruction, options);
		}

		private unsafe ref readonly InstructionInfo Create(in Instruction instruction, InstructionInfoOptions options)
		{
			info.usedRegisters.ValidLength = 0;
			info.usedMemoryLocations.ValidLength = 0;
			uint[] data = InstrInfoTable.Data;
			uint num = (uint)((int)instruction.Code << 1);
			uint num2 = data[num];
			uint num3 = data[num + 1];
			CodeSize codeSize = instruction.CodeSize;
			Flags flags = (Flags)(options & (InstructionInfoOptions.NoMemoryUsage | InstructionInfoOptions.NoRegisterUsage));
			if (codeSize == CodeSize.Code64 || codeSize == CodeSize.Unknown)
			{
				flags |= Flags.Is64Bit;
			}
			if ((num3 & 7u) != 0)
			{
				flags |= Flags.ZeroExtVecRegs;
			}
			OpInfo0 opInfo = (OpInfo0)((int)num2 & 0xF);
			OpAccess opAccess;
			switch (opInfo)
			{
			default:
				opAccess = OpAccess.None;
				break;
			case OpInfo0.Read:
				opAccess = OpAccess.Read;
				break;
			case OpInfo0.Write:
				opAccess = ((!instruction.HasOpMask || !instruction.MergingMasking) ? OpAccess.Write : ((instruction.Op0Kind == OpKind.Register) ? OpAccess.ReadWrite : OpAccess.CondWrite));
				break;
			case OpInfo0.WriteVmm:
				opAccess = ((!instruction.HasOpMask || !instruction.MergingMasking) ? OpAccess.Write : ((instruction.Op0Kind == OpKind.Register) ? OpAccess.ReadCondWrite : OpAccess.CondWrite));
				break;
			case OpInfo0.WriteForce:
			case OpInfo0.WriteForceP1:
				opAccess = OpAccess.Write;
				break;
			case OpInfo0.CondWrite:
				opAccess = OpAccess.CondWrite;
				break;
			case OpInfo0.CondWrite32_ReadWrite64:
				opAccess = (((flags & Flags.Is64Bit) == 0) ? OpAccess.CondWrite : OpAccess.ReadWrite);
				break;
			case OpInfo0.ReadWrite:
				opAccess = OpAccess.ReadWrite;
				break;
			case OpInfo0.ReadWriteVmm:
				opAccess = ((!instruction.HasOpMask || !instruction.MergingMasking) ? OpAccess.ReadWrite : OpAccess.ReadCondWrite);
				break;
			case OpInfo0.ReadCondWrite:
				opAccess = OpAccess.ReadCondWrite;
				break;
			case OpInfo0.NoMemAccess:
				opAccess = OpAccess.NoMemAccess;
				break;
			case OpInfo0.WriteMem_ReadWriteReg:
				opAccess = ((!instruction.Internal_Op0IsNotReg_or_Op1IsNotReg) ? OpAccess.ReadWrite : OpAccess.Write);
				break;
			}
			info.opAccesses[0] = (byte)opAccess;
			OpInfo1 opInfo2 = (OpInfo1)((int)(num2 >> 4) & 7);
			info.opAccesses[1] = (byte)OpAccesses.Op1[(int)opInfo2];
			info.opAccesses[2] = (byte)OpAccesses.Op2[(num2 >> 7) & 3];
			if ((num2 & 0x200u) != 0)
			{
				info.opAccesses[3] = 1;
			}
			else
			{
				info.opAccesses[3] = 0;
			}
			if ((num2 & 0x400u) != 0)
			{
				info.opAccesses[4] = 1;
			}
			else
			{
				info.opAccesses[4] = 0;
			}
			int opCount = instruction.OpCount;
			for (int i = 0; i < opCount; i++)
			{
				OpAccess opAccess2 = (OpAccess)info.opAccesses[i];
				if (opAccess2 == OpAccess.None)
				{
					continue;
				}
				switch (instruction.GetOpKind(i))
				{
				case OpKind.Register:
					if (opAccess2 == OpAccess.NoMemAccess)
					{
						opAccess2 = OpAccess.Read;
						info.opAccesses[i] = 1;
					}
					if ((flags & Flags.NoRegisterUsage) != 0)
					{
						break;
					}
					if (i == 0 && opInfo == OpInfo0.WriteForceP1)
					{
						Register op0Register = instruction.Op0Register;
						AddRegister(flags, op0Register, opAccess2);
						if (Register.K0 <= op0Register && op0Register <= Register.K7)
						{
							AddRegister(flags, ((op0Register - 173) ^ Register.AL) + 173, opAccess2);
						}
					}
					else if (i == 1 && opInfo2 == OpInfo1.ReadP3)
					{
						Register op1Register = instruction.Op1Register;
						if (Register.XMM0 <= op1Register && op1Register <= Register.ZMM31)
						{
							op1Register = 141 + ((op1Register - 141) & (Register)(-4));
							for (int j = 0; j < 4; j++)
							{
								AddRegister(flags, op1Register + j, opAccess2);
							}
						}
					}
					else
					{
						AddRegister(flags, instruction.GetOpRegister(i), opAccess2);
					}
					break;
				case OpKind.Memory:
				{
					Register register = (Register)((int)instruction.MemorySegment & ~((int)num2 >> 31));
					Register memoryBase = instruction.MemoryBase;
					switch (memoryBase)
					{
					case Register.RIP:
						if ((flags & Flags.NoMemoryUsage) == 0)
						{
							AddMemory(register, Register.None, Register.None, 1, instruction.MemoryDisplacement64, instruction.MemorySize, opAccess2, CodeSize.Code64, 0);
						}
						if ((flags & Flags.NoRegisterUsage) == 0 && register != 0)
						{
							AddMemorySegmentRegister(flags, register, OpAccess.Read);
						}
						break;
					case Register.EIP:
						if ((flags & Flags.NoMemoryUsage) == 0)
						{
							AddMemory(register, Register.None, Register.None, 1, instruction.MemoryDisplacement32, instruction.MemorySize, opAccess2, CodeSize.Code32, 0);
						}
						if ((flags & Flags.NoRegisterUsage) == 0 && register != 0)
						{
							AddMemorySegmentRegister(flags, register, OpAccess.Read);
						}
						break;
					default:
					{
						Register memoryIndex;
						int scale;
						if ((num2 & 0x20000000u) != 0)
						{
							memoryIndex = instruction.MemoryIndex;
							if ((flags & Flags.NoRegisterUsage) == 0 && memoryIndex != 0)
							{
								AddRegister(flags, memoryIndex, OpAccess.Read);
							}
							memoryIndex = Register.None;
							scale = 1;
						}
						else
						{
							memoryIndex = instruction.MemoryIndex;
							scale = instruction.MemoryIndexScale;
						}
						if ((flags & Flags.NoMemoryUsage) == 0)
						{
							int addressSizeInBytes = InstructionUtils.GetAddressSizeInBytes(memoryBase, memoryIndex, instruction.MemoryDisplSize, codeSize);
							CodeSize addressSize = addressSizeInBytes switch
							{
								2 => CodeSize.Code16, 
								4 => CodeSize.Code32, 
								8 => CodeSize.Code64, 
								_ => CodeSize.Unknown, 
							};
							int vsibSize = 0;
							if (memoryIndex.IsVectorRegister() && instruction.TryGetVsib64(out var vsib))
							{
								vsibSize = (vsib ? 8 : 4);
							}
							ulong displ = ((addressSizeInBytes != 8) ? instruction.MemoryDisplacement32 : instruction.MemoryDisplacement64);
							AddMemory(register, memoryBase, memoryIndex, scale, displ, instruction.MemorySize, opAccess2, addressSize, vsibSize);
						}
						if ((flags & Flags.NoRegisterUsage) == 0)
						{
							if (register != 0)
							{
								AddMemorySegmentRegister(flags, register, OpAccess.Read);
							}
							if (memoryBase != 0)
							{
								AddRegister(flags, memoryBase, OpAccess.Read);
							}
							if (memoryIndex != 0)
							{
								AddRegister(flags, memoryIndex, OpAccess.Read);
							}
						}
						break;
					}
					}
					break;
				}
				}
			}
			ImpliedAccess impliedAccess = (ImpliedAccess)((int)(num2 >> 20) & 0xFF);
			if (impliedAccess != 0)
			{
				AddImpliedAccesses(impliedAccess, in instruction, flags);
			}
			if (instruction.HasOpMask && (flags & Flags.NoRegisterUsage) == 0)
			{
				AddRegister(flags, instruction.OpMask, ((num2 & 0x40000000) == 0) ? OpAccess.Read : OpAccess.ReadWrite);
			}
			return ref info;
		}

		private static Register GetXSP(CodeSize codeSize, out ulong xspMask, out CodeSize addressSize)
		{
			switch (codeSize)
			{
			case CodeSize.Unknown:
			case CodeSize.Code64:
				xspMask = ulong.MaxValue;
				addressSize = CodeSize.Code64;
				return Register.RSP;
			case CodeSize.Code32:
				xspMask = 4294967295uL;
				addressSize = CodeSize.Code32;
				return Register.ESP;
			default:
				xspMask = 65535uL;
				addressSize = CodeSize.Code16;
				return Register.SP;
			}
		}

		private void AddImpliedAccesses(ImpliedAccess impliedAccess, in Instruction instruction, Flags flags)
		{
			switch (impliedAccess)
			{
			case ImpliedAccess.Clear_rflags:
				CommandClearRflags(in instruction, flags);
				break;
			case ImpliedAccess.t_push1x2:
				CommandPush(in instruction, flags, 1, 2u);
				break;
			case ImpliedAccess.t_push1x4:
				CommandPush(in instruction, flags, 1, 4u);
				break;
			case ImpliedAccess.t_pop1x2:
				CommandPop(in instruction, flags, 1, 2u);
				break;
			case ImpliedAccess.t_pop1x4:
				CommandPop(in instruction, flags, 1, 4u);
				break;
			case ImpliedAccess.t_RWal:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.AL, OpAccess.ReadWrite);
				}
				break;
			case ImpliedAccess.t_RWax:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.AX, OpAccess.ReadWrite);
				}
				break;
			case ImpliedAccess.t_push1x8:
				CommandPush(in instruction, flags, 1, 8u);
				break;
			case ImpliedAccess.t_pop1x8:
				CommandPop(in instruction, flags, 1, 8u);
				break;
			case ImpliedAccess.t_pusha2:
				CommandPusha(in instruction, flags, 2u);
				break;
			case ImpliedAccess.t_pusha4:
				CommandPusha(in instruction, flags, 4u);
				break;
			case ImpliedAccess.t_popa2:
				CommandPopa(in instruction, flags, 2u);
				break;
			case ImpliedAccess.t_popa4:
				CommandPopa(in instruction, flags, 4u);
				break;
			case ImpliedAccess.t_arpl:
				CommandArpl(in instruction, flags);
				break;
			case ImpliedAccess.t_ins:
				CommandIns(in instruction, flags);
				break;
			case ImpliedAccess.t_outs:
				CommandOuts(in instruction, flags);
				break;
			case ImpliedAccess.t_lea:
				CommandLea(in instruction, flags);
				break;
			case ImpliedAccess.t_gpr16:
				CommandLastGpr(in instruction, flags, Register.AX);
				break;
			case ImpliedAccess.t_poprm2:
				CommandPopRm(in instruction, flags, 2u);
				break;
			case ImpliedAccess.t_poprm4:
				CommandPopRm(in instruction, flags, 4u);
				break;
			case ImpliedAccess.t_poprm8:
				CommandPopRm(in instruction, flags, 8u);
				break;
			case ImpliedAccess.t_Ral_Wah:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.AL, OpAccess.Read);
					AddRegister(flags, Register.AH, OpAccess.Write);
				}
				break;
			case ImpliedAccess.t_Rax_Weax:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.AX, OpAccess.Read);
					AddRegister(flags, Register.EAX, OpAccess.Write);
				}
				break;
			case ImpliedAccess.t_RWeax:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.EAX, OpAccess.ReadWrite);
				}
				break;
			case ImpliedAccess.t_Rax_Wdx:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.AX, OpAccess.Read);
					AddRegister(flags, Register.DX, OpAccess.Write);
				}
				break;
			case ImpliedAccess.t_Reax_Wedx:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.EAX, OpAccess.Read);
					AddRegister(flags, Register.EDX, OpAccess.Write);
				}
				break;
			case ImpliedAccess.t_Rrax_Wrdx:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.RAX, OpAccess.Read);
					AddRegister(flags, Register.RDX, OpAccess.Write);
				}
				break;
			case ImpliedAccess.t_push2x2:
				CommandPush(in instruction, flags, 2, 2u);
				break;
			case ImpliedAccess.t_push2x4:
				CommandPush(in instruction, flags, 2, 4u);
				break;
			case ImpliedAccess.t_Rah:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.AH, OpAccess.Read);
				}
				break;
			case ImpliedAccess.t_Wah:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.AH, OpAccess.Write);
				}
				break;
			case ImpliedAccess.t_movs:
				CommandMovs(in instruction, flags);
				break;
			case ImpliedAccess.t_cmps:
				CommandCmps(in instruction, flags);
				break;
			case ImpliedAccess.t_stos:
				CommandStos(in instruction, flags);
				break;
			case ImpliedAccess.t_lods:
				CommandLods(in instruction, flags);
				break;
			case ImpliedAccess.t_scas:
				CommandScas(in instruction, flags);
				break;
			case ImpliedAccess.t_Wes:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.ES, OpAccess.Write);
				}
				break;
			case ImpliedAccess.t_Wds:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.DS, OpAccess.Write);
				}
				break;
			case ImpliedAccess.t_CWeax:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.EAX, OpAccess.CondWrite);
				}
				break;
			case ImpliedAccess.t_enter2:
				CommandEnter(in instruction, flags, 2u);
				break;
			case ImpliedAccess.t_enter4:
				CommandEnter(in instruction, flags, 4u);
				break;
			case ImpliedAccess.t_enter8:
				CommandEnter(in instruction, flags, 8u);
				break;
			case ImpliedAccess.t_leave2:
				CommandLeave(in instruction, flags, 2u);
				break;
			case ImpliedAccess.t_leave4:
				CommandLeave(in instruction, flags, 4u);
				break;
			case ImpliedAccess.t_leave8:
				CommandLeave(in instruction, flags, 8u);
				break;
			case ImpliedAccess.t_pop2x2:
				CommandPop(in instruction, flags, 2, 2u);
				break;
			case ImpliedAccess.t_pop2x4:
				CommandPop(in instruction, flags, 2, 4u);
				break;
			case ImpliedAccess.t_pop2x8:
				CommandPop(in instruction, flags, 2, 8u);
				break;
			case ImpliedAccess.b64_t_Wss_pop5x2_f_pop3x2:
				if ((flags & Flags.Is64Bit) != 0)
				{
					if ((flags & Flags.NoRegisterUsage) == 0)
					{
						AddRegister(flags, Register.SS, OpAccess.Write);
					}
					CommandPop(in instruction, flags, 5, 2u);
				}
				else
				{
					CommandPop(in instruction, flags, 3, 2u);
				}
				break;
			case ImpliedAccess.b64_t_Wss_pop5x4_f_pop3x4:
				if ((flags & Flags.Is64Bit) != 0)
				{
					if ((flags & Flags.NoRegisterUsage) == 0)
					{
						AddRegister(flags, Register.SS, OpAccess.Write);
					}
					CommandPop(in instruction, flags, 5, 4u);
				}
				else
				{
					CommandPop(in instruction, flags, 3, 4u);
				}
				break;
			case ImpliedAccess.t_Wss_pop5x8:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.SS, OpAccess.Write);
				}
				CommandPop(in instruction, flags, 5, 8u);
				break;
			case ImpliedAccess.t_Ral_Wax:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.AL, OpAccess.Read);
					AddRegister(flags, Register.AX, OpAccess.Write);
				}
				break;
			case ImpliedAccess.t_Wal:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.AL, OpAccess.Write);
				}
				break;
			case ImpliedAccess.t_RWst0:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.ST0, OpAccess.ReadWrite);
				}
				break;
			case ImpliedAccess.t_Rst0:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.ST0, OpAccess.Read);
				}
				break;
			case ImpliedAccess.t_Rst0_RWst1:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.ST0, OpAccess.Read);
					AddRegister(flags, Register.ST1, OpAccess.ReadWrite);
				}
				break;
			case ImpliedAccess.t_RCWst0:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.ST0, OpAccess.ReadCondWrite);
				}
				break;
			case ImpliedAccess.t_Rst1_RWst0:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.ST1, OpAccess.Read);
					AddRegister(flags, Register.ST0, OpAccess.ReadWrite);
				}
				break;
			case ImpliedAccess.t_Rst0_Rst1:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.ST0, OpAccess.Read);
					AddRegister(flags, Register.ST1, OpAccess.Read);
				}
				break;
			case ImpliedAccess.t_Wst0TOst7_Wmm0TOmm7:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					for (Register register16 = Register.ST0; register16 <= Register.ST7; register16++)
					{
						AddRegister(flags, register16, OpAccess.Write);
					}
					for (Register register17 = Register.MM0; register17 <= Register.MM7; register17++)
					{
						AddRegister(flags, register17, OpAccess.Write);
					}
				}
				break;
			case ImpliedAccess.t_Rst0TOst7_Rmm0TOmm7:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					for (Register register9 = Register.ST0; register9 <= Register.ST7; register9++)
					{
						AddRegister(flags, register9, OpAccess.Read);
					}
					for (Register register10 = Register.MM0; register10 <= Register.MM7; register10++)
					{
						AddRegister(flags, register10, OpAccess.Read);
					}
				}
				break;
			case ImpliedAccess.t_RWcx:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.CX, OpAccess.ReadWrite);
				}
				break;
			case ImpliedAccess.t_RWecx:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.ECX, OpAccess.ReadWrite);
				}
				break;
			case ImpliedAccess.t_RWrcx:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.RCX, OpAccess.ReadWrite);
				}
				break;
			case ImpliedAccess.t_Rcx:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.CX, OpAccess.Read);
				}
				break;
			case ImpliedAccess.t_Recx:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.ECX, OpAccess.Read);
				}
				break;
			case ImpliedAccess.t_Rrcx:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.RCX, OpAccess.Read);
				}
				break;
			case ImpliedAccess.t_Wdx_RWax:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.DX, OpAccess.Write);
					AddRegister(flags, Register.AX, OpAccess.ReadWrite);
				}
				break;
			case ImpliedAccess.t_Wedx_RWeax:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.EDX, OpAccess.Write);
					AddRegister(flags, Register.EAX, OpAccess.ReadWrite);
				}
				break;
			case ImpliedAccess.t_Wrdx_RWrax:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.RDX, OpAccess.Write);
					AddRegister(flags, Register.RAX, OpAccess.ReadWrite);
				}
				break;
			case ImpliedAccess.t_RWax_RWdx:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.AX, OpAccess.ReadWrite);
					AddRegister(flags, Register.DX, OpAccess.ReadWrite);
				}
				break;
			case ImpliedAccess.t_RWeax_RWedx:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.EAX, OpAccess.ReadWrite);
					AddRegister(flags, Register.EDX, OpAccess.ReadWrite);
				}
				break;
			case ImpliedAccess.t_RWrax_RWrdx:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.RAX, OpAccess.ReadWrite);
					AddRegister(flags, Register.RDX, OpAccess.ReadWrite);
				}
				break;
			case ImpliedAccess.t_push2x8:
				CommandPush(in instruction, flags, 2, 8u);
				break;
			case ImpliedAccess.t_Rcr0:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.CR0, OpAccess.Read);
				}
				break;
			case ImpliedAccess.t_RWcr0:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.CR0, OpAccess.ReadWrite);
				}
				break;
			case ImpliedAccess.t_gpr16_RWcr0:
				CommandLastGpr(in instruction, flags, Register.AX);
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.CR0, OpAccess.ReadWrite);
				}
				break;
			case ImpliedAccess.t_RCWeax_b64_t_CRrcx_CRrdx_CRrbx_CWrcx_CWrdx_CWrbx_f_CRecx_CRedx_CRebx_CRds_CWecx_CWedx_CWebx:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.EAX, OpAccess.ReadCondWrite);
				}
				if ((flags & Flags.Is64Bit) != 0)
				{
					if ((flags & Flags.NoRegisterUsage) == 0)
					{
						AddRegister(flags, Register.RCX, OpAccess.CondRead);
						AddRegister(flags, Register.RDX, OpAccess.CondRead);
						AddRegister(flags, Register.RBX, OpAccess.CondRead);
						AddRegister(flags, Register.RCX, OpAccess.CondWrite);
						AddRegister(flags, Register.RDX, OpAccess.CondWrite);
						AddRegister(flags, Register.RBX, OpAccess.CondWrite);
					}
				}
				else if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.ECX, OpAccess.CondRead);
					AddRegister(flags, Register.EDX, OpAccess.CondRead);
					AddRegister(flags, Register.EBX, OpAccess.CondRead);
					AddRegister(flags, Register.DS, OpAccess.CondRead);
					AddRegister(flags, Register.ECX, OpAccess.CondWrite);
					AddRegister(flags, Register.EDX, OpAccess.CondWrite);
					AddRegister(flags, Register.EBX, OpAccess.CondWrite);
				}
				break;
			case ImpliedAccess.t_CWecx_CWedx_CWebx_RWeax_b64_t_CRrcx_CRrdx_CRrbx_f_CRecx_CRedx_CRebx_CRds:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.ECX, OpAccess.CondWrite);
					AddRegister(flags, Register.EDX, OpAccess.CondWrite);
					AddRegister(flags, Register.EBX, OpAccess.CondWrite);
					AddRegister(flags, Register.EAX, OpAccess.ReadWrite);
				}
				if ((flags & Flags.Is64Bit) != 0)
				{
					if ((flags & Flags.NoRegisterUsage) == 0)
					{
						AddRegister(flags, Register.RCX, OpAccess.CondRead);
						AddRegister(flags, Register.RDX, OpAccess.CondRead);
						AddRegister(flags, Register.RBX, OpAccess.CondRead);
					}
				}
				else if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.ECX, OpAccess.CondRead);
					AddRegister(flags, Register.EDX, OpAccess.CondRead);
					AddRegister(flags, Register.EBX, OpAccess.CondRead);
					AddRegister(flags, Register.DS, OpAccess.CondRead);
				}
				break;
			case ImpliedAccess.t_Rax_Recx_Redx_Rseg:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.AX, OpAccess.Read);
					AddRegister(flags, Register.ECX, OpAccess.Read);
					AddRegister(flags, Register.EDX, OpAccess.Read);
					AddMemorySegmentRegister(flags, GetSegDefaultDS(instruction), OpAccess.Read);
				}
				break;
			case ImpliedAccess.t_Reax_Recx_Redx_Rseg:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.EAX, OpAccess.Read);
					AddRegister(flags, Register.ECX, OpAccess.Read);
					AddRegister(flags, Register.EDX, OpAccess.Read);
					AddMemorySegmentRegister(flags, GetSegDefaultDS(instruction), OpAccess.Read);
				}
				break;
			case ImpliedAccess.t_Recx_Redx_Rrax_Rseg:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.ECX, OpAccess.Read);
					AddRegister(flags, Register.EDX, OpAccess.Read);
					AddRegister(flags, Register.RAX, OpAccess.Read);
					AddMemorySegmentRegister(flags, GetSegDefaultDS(instruction), OpAccess.Read);
				}
				break;
			case ImpliedAccess.t_Reax_Recx:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.EAX, OpAccess.Read);
					AddRegister(flags, Register.ECX, OpAccess.Read);
				}
				break;
			case ImpliedAccess.t_Recx_Weax_Wedx:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.ECX, OpAccess.Read);
					AddRegister(flags, Register.EAX, OpAccess.Write);
					AddRegister(flags, Register.EDX, OpAccess.Write);
				}
				break;
			case ImpliedAccess.t_Reax_Recx_Redx:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.EAX, OpAccess.Read);
					AddRegister(flags, Register.ECX, OpAccess.Read);
					AddRegister(flags, Register.EDX, OpAccess.Read);
				}
				break;
			case ImpliedAccess.t_Rax:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.AX, OpAccess.Read);
				}
				break;
			case ImpliedAccess.t_Reax:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.EAX, OpAccess.Read);
				}
				break;
			case ImpliedAccess.t_Rrax:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.RAX, OpAccess.Read);
				}
				break;
			case ImpliedAccess.t_Rax_Wfs_Wgs:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.AX, OpAccess.Read);
					AddRegister(flags, Register.FS, OpAccess.Write);
					AddRegister(flags, Register.GS, OpAccess.Write);
				}
				break;
			case ImpliedAccess.t_Reax_Wfs_Wgs:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.EAX, OpAccess.Read);
					AddRegister(flags, Register.FS, OpAccess.Write);
					AddRegister(flags, Register.GS, OpAccess.Write);
				}
				break;
			case ImpliedAccess.t_Rrax_Wfs_Wgs:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.RAX, OpAccess.Read);
					AddRegister(flags, Register.FS, OpAccess.Write);
					AddRegister(flags, Register.GS, OpAccess.Write);
				}
				break;
			case ImpliedAccess.t_Rax_Rfs_Rgs:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.AX, OpAccess.Read);
					AddRegister(flags, Register.FS, OpAccess.Read);
					AddRegister(flags, Register.GS, OpAccess.Read);
				}
				break;
			case ImpliedAccess.t_Reax_Rfs_Rgs:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.EAX, OpAccess.Read);
					AddRegister(flags, Register.FS, OpAccess.Read);
					AddRegister(flags, Register.GS, OpAccess.Read);
				}
				break;
			case ImpliedAccess.t_Rrax_Rfs_Rgs:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.RAX, OpAccess.Read);
					AddRegister(flags, Register.FS, OpAccess.Read);
					AddRegister(flags, Register.GS, OpAccess.Read);
				}
				break;
			case ImpliedAccess.t_Reax_Wcr0_Wdr6_Wdr7_WesTOgs_Wcr2TOcr4_Wdr0TOdr3_b64_t_WraxTOr15_f_WeaxTOedi:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.EAX, OpAccess.Read);
					AddRegister(flags, Register.CR0, OpAccess.Write);
					AddRegister(flags, Register.DR6, OpAccess.Write);
					AddRegister(flags, Register.DR7, OpAccess.Write);
					for (Register register11 = Register.ES; register11 <= Register.GS; register11++)
					{
						AddRegister(flags, register11, OpAccess.Write);
					}
					for (Register register12 = Register.CR2; register12 <= Register.CR4; register12++)
					{
						AddRegister(flags, register12, OpAccess.Write);
					}
					for (Register register13 = Register.DR0; register13 <= Register.DR3; register13++)
					{
						AddRegister(flags, register13, OpAccess.Write);
					}
				}
				if ((flags & Flags.Is64Bit) != 0)
				{
					if ((flags & Flags.NoRegisterUsage) == 0)
					{
						for (Register register14 = Register.RAX; register14 <= Register.R15; register14++)
						{
							AddRegister(flags, register14, OpAccess.Write);
						}
					}
				}
				else if ((flags & Flags.NoRegisterUsage) == 0)
				{
					for (Register register15 = Register.EAX; register15 <= Register.EDI; register15++)
					{
						AddRegister(flags, register15, OpAccess.Write);
					}
				}
				break;
			case ImpliedAccess.t_Rax_Recx:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.AX, OpAccess.Read);
					AddRegister(flags, Register.ECX, OpAccess.Read);
				}
				break;
			case ImpliedAccess.t_Recx_Rrax:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.ECX, OpAccess.Read);
					AddRegister(flags, Register.RAX, OpAccess.Read);
				}
				break;
			case ImpliedAccess.t_Weax_Wecx_Wedx:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.EAX, OpAccess.Write);
					AddRegister(flags, Register.ECX, OpAccess.Write);
					AddRegister(flags, Register.EDX, OpAccess.Write);
				}
				break;
			case ImpliedAccess.t_Reax_Recx_CRebx:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.EAX, OpAccess.Read);
					AddRegister(flags, Register.ECX, OpAccess.Read);
					AddRegister(flags, Register.EBX, OpAccess.CondRead);
				}
				break;
			case ImpliedAccess.t_Rax_Rseg:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.AX, OpAccess.Read);
					AddMemorySegmentRegister(flags, GetSegDefaultDS(instruction), OpAccess.Read);
				}
				break;
			case ImpliedAccess.t_Reax_Rseg:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.EAX, OpAccess.Read);
					AddMemorySegmentRegister(flags, GetSegDefaultDS(instruction), OpAccess.Read);
				}
				break;
			case ImpliedAccess.t_Rrax_Rseg:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.RAX, OpAccess.Read);
					AddMemorySegmentRegister(flags, GetSegDefaultDS(instruction), OpAccess.Read);
				}
				break;
			case ImpliedAccess.t_Wecx_b64_t_Wr11:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.ECX, OpAccess.Write);
				}
				if ((flags & Flags.Is64Bit) != 0 && (flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.R11, OpAccess.Write);
				}
				break;
			case ImpliedAccess.t_Redi_Res:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.EDI, OpAccess.Read);
					AddRegister(flags, Register.ES, OpAccess.Read);
				}
				break;
			case ImpliedAccess.t_Recx_Wcs_Wss_b64_t_Rr11d:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.ECX, OpAccess.Read);
					AddRegister(flags, Register.CS, OpAccess.Write);
					AddRegister(flags, Register.SS, OpAccess.Write);
				}
				if ((flags & Flags.Is64Bit) != 0 && (flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.R11D, OpAccess.Read);
				}
				break;
			case ImpliedAccess.t_Rr11d_Rrcx_Wcs_Wss:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.R11D, OpAccess.Read);
					AddRegister(flags, Register.RCX, OpAccess.Read);
					AddRegister(flags, Register.CS, OpAccess.Write);
					AddRegister(flags, Register.SS, OpAccess.Write);
				}
				break;
			case ImpliedAccess.t_Weax_Wedx:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.EAX, OpAccess.Write);
					AddRegister(flags, Register.EDX, OpAccess.Write);
				}
				break;
			case ImpliedAccess.t_Wesp:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.ESP, OpAccess.Write);
				}
				break;
			case ImpliedAccess.t_Recx_Redx_Wesp_Wcs_Wss:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.ECX, OpAccess.Read);
					AddRegister(flags, Register.EDX, OpAccess.Read);
					AddRegister(flags, Register.ESP, OpAccess.Write);
					AddRegister(flags, Register.CS, OpAccess.Write);
					AddRegister(flags, Register.SS, OpAccess.Write);
				}
				break;
			case ImpliedAccess.t_Rrcx_Rrdx_Wrsp_Wcs_Wss:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.RCX, OpAccess.Read);
					AddRegister(flags, Register.RDX, OpAccess.Read);
					AddRegister(flags, Register.RSP, OpAccess.Write);
					AddRegister(flags, Register.CS, OpAccess.Write);
					AddRegister(flags, Register.SS, OpAccess.Write);
				}
				break;
			case ImpliedAccess.t_zrrm:
				CommandClearRegRegmem(in instruction, flags);
				break;
			case ImpliedAccess.t_zrrrm:
				CommandClearRegRegRegmem(in instruction, flags);
				break;
			case ImpliedAccess.b64_t_RWxmm0TOxmm15_f_RWxmm0TOxmm7:
				if ((flags & Flags.Is64Bit) != 0)
				{
					if ((flags & Flags.NoRegisterUsage) == 0)
					{
						for (Register register7 = Register.XMM0; register7 <= Register.XMM15; register7++)
						{
							AddRegister(flags, register7, OpAccess.ReadWrite);
						}
					}
				}
				else if ((flags & Flags.NoRegisterUsage) == 0)
				{
					for (Register register8 = Register.XMM0; register8 <= Register.XMM7; register8++)
					{
						AddRegister(flags, register8, OpAccess.ReadWrite);
					}
				}
				break;
			case ImpliedAccess.b64_t_Wzmm0TOzmm15_f_Wzmm0TOzmm7:
				if ((flags & Flags.Is64Bit) != 0)
				{
					if ((flags & Flags.NoRegisterUsage) == 0)
					{
						for (Register register4 = Register.ZMM0; register4 <= Register.ZMM15; register4++)
						{
							AddRegister(flags, register4, OpAccess.Write);
						}
					}
				}
				else if ((flags & Flags.NoRegisterUsage) == 0)
				{
					for (Register register5 = Register.ZMM0; register5 <= Register.ZMM7; register5++)
					{
						AddRegister(flags, register5, OpAccess.Write);
					}
				}
				break;
			case ImpliedAccess.t_CRecx_Wecx_Wedx_Webx_RWeax:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.ECX, OpAccess.CondRead);
					AddRegister(flags, Register.ECX, OpAccess.Write);
					AddRegister(flags, Register.EDX, OpAccess.Write);
					AddRegister(flags, Register.EBX, OpAccess.Write);
					AddRegister(flags, Register.EAX, OpAccess.ReadWrite);
				}
				break;
			case ImpliedAccess.t_CRmem_CRsi_CReax_CRes_CWeax_CWedx_RCWecx:
				if ((flags & Flags.NoMemoryUsage) == 0)
				{
					AddMemory(Register.ES, Register.SI, Register.None, 1, 0uL, MemorySize.Unknown, OpAccess.CondRead, CodeSize.Code16, 0);
				}
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.SI, OpAccess.CondRead);
					AddRegister(flags, Register.EAX, OpAccess.CondRead);
					if ((flags & Flags.Is64Bit) == 0)
					{
						AddRegister(flags, Register.ES, OpAccess.CondRead);
					}
					AddRegister(flags, Register.EAX, OpAccess.CondWrite);
					AddRegister(flags, Register.EDX, OpAccess.CondWrite);
					AddRegister(flags, Register.ECX, OpAccess.ReadCondWrite);
				}
				break;
			case ImpliedAccess.t_CRmem_CReax_CResi_CRes_CWeax_CWedx_RCWecx:
				if ((flags & Flags.NoMemoryUsage) == 0)
				{
					AddMemory(Register.ES, Register.ESI, Register.None, 1, 0uL, MemorySize.Unknown, OpAccess.CondRead, CodeSize.Code32, 0);
				}
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.EAX, OpAccess.CondRead);
					AddRegister(flags, Register.ESI, OpAccess.CondRead);
					if ((flags & Flags.Is64Bit) == 0)
					{
						AddRegister(flags, Register.ES, OpAccess.CondRead);
					}
					AddRegister(flags, Register.EAX, OpAccess.CondWrite);
					AddRegister(flags, Register.EDX, OpAccess.CondWrite);
					AddRegister(flags, Register.ECX, OpAccess.ReadCondWrite);
				}
				break;
			case ImpliedAccess.t_CRmem_CReax_CRrsi_CRes_CWeax_CWedx_RCWrcx:
				if ((flags & Flags.NoMemoryUsage) == 0)
				{
					AddMemory(Register.ES, Register.RSI, Register.None, 1, 0uL, MemorySize.Unknown, OpAccess.CondRead, CodeSize.Code64, 0);
				}
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.EAX, OpAccess.CondRead);
					AddRegister(flags, Register.RSI, OpAccess.CondRead);
					if ((flags & Flags.Is64Bit) == 0)
					{
						AddRegister(flags, Register.ES, OpAccess.CondRead);
					}
					AddRegister(flags, Register.EAX, OpAccess.CondWrite);
					AddRegister(flags, Register.EDX, OpAccess.CondWrite);
					AddRegister(flags, Register.RCX, OpAccess.ReadCondWrite);
				}
				break;
			case ImpliedAccess.t_CRmem_CRmem_CWmem_CRsi_CRdi_CRes_CWsi_RCWax_RCWcx:
				if ((flags & Flags.NoMemoryUsage) == 0)
				{
					AddMemory(Register.ES, Register.SI, Register.None, 1, 0uL, MemorySize.Unknown, OpAccess.CondRead, CodeSize.Code16, 0);
					AddMemory(Register.ES, Register.DI, Register.None, 1, 0uL, MemorySize.Unknown, OpAccess.CondRead, CodeSize.Code16, 0);
					AddMemory(Register.ES, Register.DI, Register.None, 1, 0uL, MemorySize.Unknown, OpAccess.CondWrite, CodeSize.Code16, 0);
				}
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.SI, OpAccess.CondRead);
					AddRegister(flags, Register.DI, OpAccess.CondRead);
					if ((flags & Flags.Is64Bit) == 0)
					{
						AddRegister(flags, Register.ES, OpAccess.CondRead);
					}
					AddRegister(flags, Register.SI, OpAccess.CondWrite);
					AddRegister(flags, Register.AX, OpAccess.ReadCondWrite);
					AddRegister(flags, Register.CX, OpAccess.ReadCondWrite);
				}
				break;
			case ImpliedAccess.t_CRmem_CRmem_CWmem_CResi_CRedi_CRes_CWesi_RCWeax_RCWecx:
				if ((flags & Flags.NoMemoryUsage) == 0)
				{
					AddMemory(Register.ES, Register.ESI, Register.None, 1, 0uL, MemorySize.Unknown, OpAccess.CondRead, CodeSize.Code32, 0);
					AddMemory(Register.ES, Register.EDI, Register.None, 1, 0uL, MemorySize.Unknown, OpAccess.CondRead, CodeSize.Code32, 0);
					AddMemory(Register.ES, Register.EDI, Register.None, 1, 0uL, MemorySize.Unknown, OpAccess.CondWrite, CodeSize.Code32, 0);
				}
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.ESI, OpAccess.CondRead);
					AddRegister(flags, Register.EDI, OpAccess.CondRead);
					if ((flags & Flags.Is64Bit) == 0)
					{
						AddRegister(flags, Register.ES, OpAccess.CondRead);
					}
					AddRegister(flags, Register.ESI, OpAccess.CondWrite);
					AddRegister(flags, Register.EAX, OpAccess.ReadCondWrite);
					AddRegister(flags, Register.ECX, OpAccess.ReadCondWrite);
				}
				break;
			case ImpliedAccess.t_CRmem_CRmem_CWmem_CRrsi_CRrdi_CRes_CWrsi_RCWrax_RCWrcx:
				if ((flags & Flags.NoMemoryUsage) == 0)
				{
					AddMemory(Register.ES, Register.RSI, Register.None, 1, 0uL, MemorySize.Unknown, OpAccess.CondRead, CodeSize.Code64, 0);
					AddMemory(Register.ES, Register.RDI, Register.None, 1, 0uL, MemorySize.Unknown, OpAccess.CondRead, CodeSize.Code64, 0);
					AddMemory(Register.ES, Register.RDI, Register.None, 1, 0uL, MemorySize.Unknown, OpAccess.CondWrite, CodeSize.Code64, 0);
				}
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.RSI, OpAccess.CondRead);
					AddRegister(flags, Register.RDI, OpAccess.CondRead);
					if ((flags & Flags.Is64Bit) == 0)
					{
						AddRegister(flags, Register.ES, OpAccess.CondRead);
					}
					AddRegister(flags, Register.RSI, OpAccess.CondWrite);
					AddRegister(flags, Register.RAX, OpAccess.ReadCondWrite);
					AddRegister(flags, Register.RCX, OpAccess.ReadCondWrite);
				}
				break;
			case ImpliedAccess.t_Rcl_Rax:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.CL, OpAccess.Read);
					AddRegister(flags, Register.AX, OpAccess.Read);
				}
				break;
			case ImpliedAccess.t_Rcl_Reax:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.CL, OpAccess.Read);
					AddRegister(flags, Register.EAX, OpAccess.Read);
				}
				break;
			case ImpliedAccess.t_xstore2:
				CommandXstore(in instruction, flags, 2u);
				break;
			case ImpliedAccess.t_xstore4:
				CommandXstore(in instruction, flags, 4u);
				break;
			case ImpliedAccess.t_xstore8:
				CommandXstore(in instruction, flags, 8u);
				break;
			case ImpliedAccess.t_CRmem_CRmem_CRmem_CWmem_CRdx_CRbx_CRsi_CRdi_CRes_CWsi_CWdi_RCWcx:
				if ((flags & Flags.NoMemoryUsage) == 0)
				{
					AddMemory(Register.ES, Register.DX, Register.None, 1, 0uL, MemorySize.Unknown, OpAccess.CondRead, CodeSize.Code16, 0);
					AddMemory(Register.ES, Register.BX, Register.None, 1, 0uL, MemorySize.Unknown, OpAccess.CondRead, CodeSize.Code16, 0);
					AddMemory(Register.ES, Register.SI, Register.None, 1, 0uL, MemorySize.Unknown, OpAccess.CondRead, CodeSize.Code16, 0);
					AddMemory(Register.ES, Register.DI, Register.None, 1, 0uL, MemorySize.Unknown, OpAccess.CondWrite, CodeSize.Code16, 0);
				}
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.DX, OpAccess.CondRead);
					AddRegister(flags, Register.BX, OpAccess.CondRead);
					AddRegister(flags, Register.SI, OpAccess.CondRead);
					AddRegister(flags, Register.DI, OpAccess.CondRead);
					if ((flags & Flags.Is64Bit) == 0)
					{
						AddRegister(flags, Register.ES, OpAccess.CondRead);
					}
					AddRegister(flags, Register.SI, OpAccess.CondWrite);
					AddRegister(flags, Register.DI, OpAccess.CondWrite);
					AddRegister(flags, Register.CX, OpAccess.ReadCondWrite);
				}
				break;
			case ImpliedAccess.t_CRmem_CRmem_CRmem_CWmem_CRedx_CRebx_CResi_CRedi_CRes_CWesi_CWedi_RCWecx:
				if ((flags & Flags.NoMemoryUsage) == 0)
				{
					AddMemory(Register.ES, Register.EDX, Register.None, 1, 0uL, MemorySize.Unknown, OpAccess.CondRead, CodeSize.Code32, 0);
					AddMemory(Register.ES, Register.EBX, Register.None, 1, 0uL, MemorySize.Unknown, OpAccess.CondRead, CodeSize.Code32, 0);
					AddMemory(Register.ES, Register.ESI, Register.None, 1, 0uL, MemorySize.Unknown, OpAccess.CondRead, CodeSize.Code32, 0);
					AddMemory(Register.ES, Register.EDI, Register.None, 1, 0uL, MemorySize.Unknown, OpAccess.CondWrite, CodeSize.Code32, 0);
				}
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.EDX, OpAccess.CondRead);
					AddRegister(flags, Register.EBX, OpAccess.CondRead);
					AddRegister(flags, Register.ESI, OpAccess.CondRead);
					AddRegister(flags, Register.EDI, OpAccess.CondRead);
					if ((flags & Flags.Is64Bit) == 0)
					{
						AddRegister(flags, Register.ES, OpAccess.CondRead);
					}
					AddRegister(flags, Register.ESI, OpAccess.CondWrite);
					AddRegister(flags, Register.EDI, OpAccess.CondWrite);
					AddRegister(flags, Register.ECX, OpAccess.ReadCondWrite);
				}
				break;
			case ImpliedAccess.t_CRmem_CRmem_CRmem_CWmem_CRrdx_CRrbx_CRrsi_CRrdi_CRes_CWrsi_CWrdi_RCWrcx:
				if ((flags & Flags.NoMemoryUsage) == 0)
				{
					AddMemory(Register.ES, Register.RDX, Register.None, 1, 0uL, MemorySize.Unknown, OpAccess.CondRead, CodeSize.Code64, 0);
					AddMemory(Register.ES, Register.RBX, Register.None, 1, 0uL, MemorySize.Unknown, OpAccess.CondRead, CodeSize.Code64, 0);
					AddMemory(Register.ES, Register.RSI, Register.None, 1, 0uL, MemorySize.Unknown, OpAccess.CondRead, CodeSize.Code64, 0);
					AddMemory(Register.ES, Register.RDI, Register.None, 1, 0uL, MemorySize.Unknown, OpAccess.CondWrite, CodeSize.Code64, 0);
				}
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.RDX, OpAccess.CondRead);
					AddRegister(flags, Register.RBX, OpAccess.CondRead);
					AddRegister(flags, Register.RSI, OpAccess.CondRead);
					AddRegister(flags, Register.RDI, OpAccess.CondRead);
					if ((flags & Flags.Is64Bit) == 0)
					{
						AddRegister(flags, Register.ES, OpAccess.CondRead);
					}
					AddRegister(flags, Register.RSI, OpAccess.CondWrite);
					AddRegister(flags, Register.RDI, OpAccess.CondWrite);
					AddRegister(flags, Register.RCX, OpAccess.ReadCondWrite);
				}
				break;
			case ImpliedAccess.t_CRmem_CRmem_CRmem_CRmem_CWmem_CWmem_CRax_CRdx_CRbx_CRsi_CRdi_CRes_CWsi_CWdi_RCWcx:
				if ((flags & Flags.NoMemoryUsage) == 0)
				{
					AddMemory(Register.ES, Register.AX, Register.None, 1, 0uL, MemorySize.Unknown, OpAccess.CondRead, CodeSize.Code16, 0);
					AddMemory(Register.ES, Register.DX, Register.None, 1, 0uL, MemorySize.Unknown, OpAccess.CondRead, CodeSize.Code16, 0);
					AddMemory(Register.ES, Register.BX, Register.None, 1, 0uL, MemorySize.Unknown, OpAccess.CondRead, CodeSize.Code16, 0);
					AddMemory(Register.ES, Register.SI, Register.None, 1, 0uL, MemorySize.Unknown, OpAccess.CondRead, CodeSize.Code16, 0);
					AddMemory(Register.ES, Register.AX, Register.None, 1, 0uL, MemorySize.Unknown, OpAccess.CondWrite, CodeSize.Code16, 0);
					AddMemory(Register.ES, Register.DI, Register.None, 1, 0uL, MemorySize.Unknown, OpAccess.CondWrite, CodeSize.Code16, 0);
				}
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.AX, OpAccess.CondRead);
					AddRegister(flags, Register.DX, OpAccess.CondRead);
					AddRegister(flags, Register.BX, OpAccess.CondRead);
					AddRegister(flags, Register.SI, OpAccess.CondRead);
					AddRegister(flags, Register.DI, OpAccess.CondRead);
					if ((flags & Flags.Is64Bit) == 0)
					{
						AddRegister(flags, Register.ES, OpAccess.CondRead);
					}
					AddRegister(flags, Register.SI, OpAccess.CondWrite);
					AddRegister(flags, Register.DI, OpAccess.CondWrite);
					AddRegister(flags, Register.CX, OpAccess.ReadCondWrite);
				}
				break;
			case ImpliedAccess.t_CRmem_CRmem_CRmem_CRmem_CWmem_CWmem_CReax_CRedx_CRebx_CResi_CRedi_CRes_CWesi_CWedi_RCWecx:
				if ((flags & Flags.NoMemoryUsage) == 0)
				{
					AddMemory(Register.ES, Register.EAX, Register.None, 1, 0uL, MemorySize.Unknown, OpAccess.CondRead, CodeSize.Code32, 0);
					AddMemory(Register.ES, Register.EDX, Register.None, 1, 0uL, MemorySize.Unknown, OpAccess.CondRead, CodeSize.Code32, 0);
					AddMemory(Register.ES, Register.EBX, Register.None, 1, 0uL, MemorySize.Unknown, OpAccess.CondRead, CodeSize.Code32, 0);
					AddMemory(Register.ES, Register.ESI, Register.None, 1, 0uL, MemorySize.Unknown, OpAccess.CondRead, CodeSize.Code32, 0);
					AddMemory(Register.ES, Register.EAX, Register.None, 1, 0uL, MemorySize.Unknown, OpAccess.CondWrite, CodeSize.Code32, 0);
					AddMemory(Register.ES, Register.EDI, Register.None, 1, 0uL, MemorySize.Unknown, OpAccess.CondWrite, CodeSize.Code32, 0);
				}
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.EAX, OpAccess.CondRead);
					AddRegister(flags, Register.EDX, OpAccess.CondRead);
					AddRegister(flags, Register.EBX, OpAccess.CondRead);
					AddRegister(flags, Register.ESI, OpAccess.CondRead);
					AddRegister(flags, Register.EDI, OpAccess.CondRead);
					if ((flags & Flags.Is64Bit) == 0)
					{
						AddRegister(flags, Register.ES, OpAccess.CondRead);
					}
					AddRegister(flags, Register.ESI, OpAccess.CondWrite);
					AddRegister(flags, Register.EDI, OpAccess.CondWrite);
					AddRegister(flags, Register.ECX, OpAccess.ReadCondWrite);
				}
				break;
			case ImpliedAccess.t_CRmem_CRmem_CRmem_CRmem_CWmem_CWmem_CRrax_CRrdx_CRrbx_CRrsi_CRrdi_CRes_CWrsi_CWrdi_RCWrcx:
				if ((flags & Flags.NoMemoryUsage) == 0)
				{
					AddMemory(Register.ES, Register.RAX, Register.None, 1, 0uL, MemorySize.Unknown, OpAccess.CondRead, CodeSize.Code64, 0);
					AddMemory(Register.ES, Register.RDX, Register.None, 1, 0uL, MemorySize.Unknown, OpAccess.CondRead, CodeSize.Code64, 0);
					AddMemory(Register.ES, Register.RBX, Register.None, 1, 0uL, MemorySize.Unknown, OpAccess.CondRead, CodeSize.Code64, 0);
					AddMemory(Register.ES, Register.RSI, Register.None, 1, 0uL, MemorySize.Unknown, OpAccess.CondRead, CodeSize.Code64, 0);
					AddMemory(Register.ES, Register.RAX, Register.None, 1, 0uL, MemorySize.Unknown, OpAccess.CondWrite, CodeSize.Code64, 0);
					AddMemory(Register.ES, Register.RDI, Register.None, 1, 0uL, MemorySize.Unknown, OpAccess.CondWrite, CodeSize.Code64, 0);
				}
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.RAX, OpAccess.CondRead);
					AddRegister(flags, Register.RDX, OpAccess.CondRead);
					AddRegister(flags, Register.RBX, OpAccess.CondRead);
					AddRegister(flags, Register.RSI, OpAccess.CondRead);
					AddRegister(flags, Register.RDI, OpAccess.CondRead);
					if ((flags & Flags.Is64Bit) == 0)
					{
						AddRegister(flags, Register.ES, OpAccess.CondRead);
					}
					AddRegister(flags, Register.RSI, OpAccess.CondWrite);
					AddRegister(flags, Register.RDI, OpAccess.CondWrite);
					AddRegister(flags, Register.RCX, OpAccess.ReadCondWrite);
				}
				break;
			case ImpliedAccess.t_RCWal:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.AL, OpAccess.ReadCondWrite);
				}
				break;
			case ImpliedAccess.t_RCWax:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.AX, OpAccess.ReadCondWrite);
				}
				break;
			case ImpliedAccess.t_RCWeax:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.EAX, OpAccess.ReadCondWrite);
				}
				break;
			case ImpliedAccess.t_Reax_Redx:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.EAX, OpAccess.Read);
					AddRegister(flags, Register.EDX, OpAccess.Read);
				}
				break;
			case ImpliedAccess.t_gpr8:
				CommandLastGpr(in instruction, flags, Register.AL);
				break;
			case ImpliedAccess.t_gpr32_Reax_Redx:
				CommandLastGpr(in instruction, flags, Register.EAX);
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.EAX, OpAccess.Read);
					AddRegister(flags, Register.EDX, OpAccess.Read);
				}
				break;
			case ImpliedAccess.t_Rmem_Rseg:
				if ((flags & Flags.NoMemoryUsage) == 0)
				{
					AddMemory(GetSegDefaultDS(instruction), instruction.Op0Register, Register.None, 1, 0uL, MemorySize.UInt8, OpAccess.Read, CodeSize.Unknown, 0);
				}
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddMemorySegmentRegister(flags, GetSegDefaultDS(instruction), OpAccess.Read);
				}
				break;
			case ImpliedAccess.t_RCWrax:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.RAX, OpAccess.ReadCondWrite);
				}
				break;
			case ImpliedAccess.t_Wss:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.SS, OpAccess.Write);
				}
				break;
			case ImpliedAccess.t_Wfs:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.FS, OpAccess.Write);
				}
				break;
			case ImpliedAccess.t_Wgs:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.GS, OpAccess.Write);
				}
				break;
			case ImpliedAccess.t_CRecx_CRebx_RCWeax_RCWedx:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.ECX, OpAccess.CondRead);
					AddRegister(flags, Register.EBX, OpAccess.CondRead);
					AddRegister(flags, Register.EAX, OpAccess.ReadCondWrite);
					AddRegister(flags, Register.EDX, OpAccess.ReadCondWrite);
				}
				break;
			case ImpliedAccess.t_CRrcx_CRrbx_RCWrax_RCWrdx:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.RCX, OpAccess.CondRead);
					AddRegister(flags, Register.RBX, OpAccess.CondRead);
					AddRegister(flags, Register.RAX, OpAccess.ReadCondWrite);
					AddRegister(flags, Register.RDX, OpAccess.ReadCondWrite);
				}
				break;
			case ImpliedAccess.t_Wmem_RarDI_Rseg:
				if ((flags & Flags.NoMemoryUsage) == 0)
				{
					AddMemory(GetSegDefaultDS(instruction), GetARDI(instruction), Register.None, 1, 0uL, instruction.MemorySize, OpAccess.Write, CodeSize.Unknown, 0);
				}
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, GetARDI(instruction), OpAccess.Read);
					AddMemorySegmentRegister(flags, GetSegDefaultDS(instruction), OpAccess.Read);
				}
				break;
			case ImpliedAccess.t_Rxmm0:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.XMM0, OpAccess.Read);
				}
				break;
			case ImpliedAccess.t_Redx:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.EDX, OpAccess.Read);
				}
				break;
			case ImpliedAccess.t_Rrdx:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.RDX, OpAccess.Read);
				}
				break;
			case ImpliedAccess.t_Wmem_Res:
				if ((flags & Flags.NoMemoryUsage) == 0)
				{
					AddMemory(Register.ES, instruction.Op0Register, Register.None, 1, 0uL, instruction.MemorySize, OpAccess.Write, CodeSize.Unknown, 0);
				}
				if ((flags & Flags.NoRegisterUsage) == 0 && (flags & Flags.Is64Bit) == 0)
				{
					AddRegister(flags, Register.ES, OpAccess.Read);
				}
				break;
			case ImpliedAccess.t_Reax_Redx_Wxmm0:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.EAX, OpAccess.Read);
					AddRegister(flags, Register.EDX, OpAccess.Read);
					AddRegister(flags, Register.XMM0, OpAccess.Write);
				}
				break;
			case ImpliedAccess.t_Rrax_Rrdx_Wxmm0:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.RAX, OpAccess.Read);
					AddRegister(flags, Register.RDX, OpAccess.Read);
					AddRegister(flags, Register.XMM0, OpAccess.Write);
				}
				break;
			case ImpliedAccess.t_Reax_Redx_Wecx:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.EAX, OpAccess.Read);
					AddRegister(flags, Register.EDX, OpAccess.Read);
					AddRegister(flags, Register.ECX, OpAccess.Write);
				}
				break;
			case ImpliedAccess.t_Rrax_Rrdx_Wecx:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.RAX, OpAccess.Read);
					AddRegister(flags, Register.RDX, OpAccess.Read);
					AddRegister(flags, Register.ECX, OpAccess.Write);
				}
				break;
			case ImpliedAccess.t_Wxmm0:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.XMM0, OpAccess.Write);
				}
				break;
			case ImpliedAccess.t_Wecx:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.ECX, OpAccess.Write);
				}
				break;
			case ImpliedAccess.t_Rmem_Rds:
				if ((flags & Flags.NoMemoryUsage) == 0)
				{
					AddMemory(Register.DS, instruction.Op0Register, Register.None, 1, 0uL, MemorySize.Unknown, OpAccess.Read, CodeSize.Unknown, 0);
				}
				if ((flags & Flags.NoRegisterUsage) == 0 && (flags & Flags.Is64Bit) == 0)
				{
					AddRegister(flags, Register.DS, OpAccess.Read);
				}
				break;
			case ImpliedAccess.t_Rrcx_Rrdx_RWrax:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.RCX, OpAccess.Read);
					AddRegister(flags, Register.RDX, OpAccess.Read);
					AddRegister(flags, Register.RAX, OpAccess.ReadWrite);
				}
				break;
			case ImpliedAccess.t_Rmem_Rrcx_Rseg_RWrax:
				if ((flags & Flags.NoMemoryUsage) == 0)
				{
					AddMemory(GetSegDefaultDS(instruction), Register.RCX, Register.None, 1, 0uL, MemorySize.UInt128, OpAccess.Read, CodeSize.Code64, 0);
				}
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.RCX, OpAccess.Read);
					AddMemorySegmentRegister(flags, GetSegDefaultDS(instruction), OpAccess.Read);
					AddRegister(flags, Register.RAX, OpAccess.ReadWrite);
				}
				break;
			case ImpliedAccess.t_RWrax:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.RAX, OpAccess.ReadWrite);
				}
				break;
			case ImpliedAccess.t_Rax_Recx_Redx_Weax:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.AX, OpAccess.Read);
					AddRegister(flags, Register.ECX, OpAccess.Read);
					AddRegister(flags, Register.EDX, OpAccess.Read);
					AddRegister(flags, Register.EAX, OpAccess.Write);
				}
				break;
			case ImpliedAccess.t_Recx_Redx_RWeax:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.ECX, OpAccess.Read);
					AddRegister(flags, Register.EDX, OpAccess.Read);
					AddRegister(flags, Register.EAX, OpAccess.ReadWrite);
				}
				break;
			case ImpliedAccess.t_Recx_Redx_RWrax:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.ECX, OpAccess.Read);
					AddRegister(flags, Register.EDX, OpAccess.Read);
					AddRegister(flags, Register.RAX, OpAccess.ReadWrite);
				}
				break;
			case ImpliedAccess.t_Rax_Recx_Redx:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.AX, OpAccess.Read);
					AddRegister(flags, Register.ECX, OpAccess.Read);
					AddRegister(flags, Register.EDX, OpAccess.Read);
				}
				break;
			case ImpliedAccess.t_Recx_Redx_Rrax:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.ECX, OpAccess.Read);
					AddRegister(flags, Register.EDX, OpAccess.Read);
					AddRegister(flags, Register.RAX, OpAccess.Read);
				}
				break;
			case ImpliedAccess.t_Wtmm0TOtmm7:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					for (Register register6 = Register.TMM0; register6 <= Register.TMM7; register6++)
					{
						AddRegister(flags, register6, OpAccess.Write);
					}
				}
				break;
			case ImpliedAccess.t_Reax_Rebx:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.EAX, OpAccess.Read);
					AddRegister(flags, Register.EBX, OpAccess.Read);
				}
				break;
			case ImpliedAccess.t_Rebx_Weax:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.EBX, OpAccess.Read);
					AddRegister(flags, Register.EAX, OpAccess.Write);
				}
				break;
			case ImpliedAccess.t_emmiW:
				CommandEmmi(in instruction, flags, OpAccess.Write);
				break;
			case ImpliedAccess.t_emmiRW:
				CommandEmmi(in instruction, flags, OpAccess.ReadWrite);
				break;
			case ImpliedAccess.t_emmiR:
				CommandEmmi(in instruction, flags, OpAccess.Read);
				break;
			case ImpliedAccess.t_CRrcx_CRrdx_CRr8_CRr9_RWrax:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.RCX, OpAccess.CondRead);
					AddRegister(flags, Register.RDX, OpAccess.CondRead);
					AddRegister(flags, Register.R8, OpAccess.CondRead);
					AddRegister(flags, Register.R9, OpAccess.CondRead);
					AddRegister(flags, Register.RAX, OpAccess.ReadWrite);
				}
				break;
			case ImpliedAccess.t_RWxmm0TOxmm7:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					for (Register register3 = Register.XMM0; register3 <= Register.XMM7; register3++)
					{
						AddRegister(flags, register3, OpAccess.ReadWrite);
					}
				}
				break;
			case ImpliedAccess.t_Reax_Rxmm0:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.EAX, OpAccess.Read);
					AddRegister(flags, Register.XMM0, OpAccess.Read);
				}
				break;
			case ImpliedAccess.t_Wxmm1_Wxmm2_RWxmm0_Wxmm4TOxmm6:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.XMM1, OpAccess.Write);
					AddRegister(flags, Register.XMM2, OpAccess.Write);
					AddRegister(flags, Register.XMM0, OpAccess.ReadWrite);
					for (Register register2 = Register.XMM4; register2 <= Register.XMM6; register2++)
					{
						AddRegister(flags, register2, OpAccess.Write);
					}
				}
				break;
			case ImpliedAccess.t_RWxmm0_RWxmm1_Wxmm2TOxmm6:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.XMM0, OpAccess.ReadWrite);
					AddRegister(flags, Register.XMM1, OpAccess.ReadWrite);
					for (Register register = Register.XMM2; register <= Register.XMM6; register++)
					{
						AddRegister(flags, register, OpAccess.Write);
					}
				}
				break;
			case ImpliedAccess.t_pop3x8:
				CommandPop(in instruction, flags, 3, 8u);
				break;
			case ImpliedAccess.t_CRmem_CRmem_CWmem_CRbx_CRsi_CRdi_CRes_CWsi_RCWax_RCWcx:
				if ((flags & Flags.NoMemoryUsage) == 0)
				{
					AddMemory(Register.ES, Register.SI, Register.None, 1, 0uL, MemorySize.Unknown, OpAccess.CondRead, CodeSize.Code16, 0);
					AddMemory(Register.ES, Register.DI, Register.None, 1, 0uL, MemorySize.Unknown, OpAccess.CondRead, CodeSize.Code16, 0);
					AddMemory(Register.ES, Register.DI, Register.None, 1, 0uL, MemorySize.Unknown, OpAccess.CondWrite, CodeSize.Code16, 0);
				}
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.BX, OpAccess.CondRead);
					AddRegister(flags, Register.SI, OpAccess.CondRead);
					AddRegister(flags, Register.DI, OpAccess.CondRead);
					if ((flags & Flags.Is64Bit) == 0)
					{
						AddRegister(flags, Register.ES, OpAccess.CondRead);
					}
					AddRegister(flags, Register.SI, OpAccess.CondWrite);
					AddRegister(flags, Register.AX, OpAccess.ReadCondWrite);
					AddRegister(flags, Register.CX, OpAccess.ReadCondWrite);
				}
				break;
			case ImpliedAccess.t_CRmem_CRmem_CWmem_CRebx_CResi_CRedi_CRes_CWesi_RCWeax_RCWecx:
				if ((flags & Flags.NoMemoryUsage) == 0)
				{
					AddMemory(Register.ES, Register.ESI, Register.None, 1, 0uL, MemorySize.Unknown, OpAccess.CondRead, CodeSize.Code32, 0);
					AddMemory(Register.ES, Register.EDI, Register.None, 1, 0uL, MemorySize.Unknown, OpAccess.CondRead, CodeSize.Code32, 0);
					AddMemory(Register.ES, Register.EDI, Register.None, 1, 0uL, MemorySize.Unknown, OpAccess.CondWrite, CodeSize.Code32, 0);
				}
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.EBX, OpAccess.CondRead);
					AddRegister(flags, Register.ESI, OpAccess.CondRead);
					AddRegister(flags, Register.EDI, OpAccess.CondRead);
					if ((flags & Flags.Is64Bit) == 0)
					{
						AddRegister(flags, Register.ES, OpAccess.CondRead);
					}
					AddRegister(flags, Register.ESI, OpAccess.CondWrite);
					AddRegister(flags, Register.EAX, OpAccess.ReadCondWrite);
					AddRegister(flags, Register.ECX, OpAccess.ReadCondWrite);
				}
				break;
			case ImpliedAccess.t_CRmem_CRmem_CWmem_CRrbx_CRrsi_CRrdi_CRes_CWrsi_RCWrax_RCWrcx:
				if ((flags & Flags.NoMemoryUsage) == 0)
				{
					AddMemory(Register.ES, Register.RSI, Register.None, 1, 0uL, MemorySize.Unknown, OpAccess.CondRead, CodeSize.Code64, 0);
					AddMemory(Register.ES, Register.RDI, Register.None, 1, 0uL, MemorySize.Unknown, OpAccess.CondRead, CodeSize.Code64, 0);
					AddMemory(Register.ES, Register.RDI, Register.None, 1, 0uL, MemorySize.Unknown, OpAccess.CondWrite, CodeSize.Code64, 0);
				}
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.RBX, OpAccess.CondRead);
					AddRegister(flags, Register.RSI, OpAccess.CondRead);
					AddRegister(flags, Register.RDI, OpAccess.CondRead);
					if ((flags & Flags.Is64Bit) == 0)
					{
						AddRegister(flags, Register.ES, OpAccess.CondRead);
					}
					AddRegister(flags, Register.RSI, OpAccess.CondWrite);
					AddRegister(flags, Register.RAX, OpAccess.ReadCondWrite);
					AddRegister(flags, Register.RCX, OpAccess.ReadCondWrite);
				}
				break;
			case ImpliedAccess.t_CRmem_CRmem_CRmem_CWmem_CRax_CRdx_CRbx_CRsi_CRdi_CRes_CWsi_CWdi_RCWcx:
				if ((flags & Flags.NoMemoryUsage) == 0)
				{
					AddMemory(Register.ES, Register.DX, Register.None, 1, 0uL, MemorySize.Unknown, OpAccess.CondRead, CodeSize.Code16, 0);
					AddMemory(Register.ES, Register.BX, Register.None, 1, 0uL, MemorySize.Unknown, OpAccess.CondRead, CodeSize.Code16, 0);
					AddMemory(Register.ES, Register.SI, Register.None, 1, 0uL, MemorySize.Unknown, OpAccess.CondRead, CodeSize.Code16, 0);
					AddMemory(Register.ES, Register.DI, Register.None, 1, 0uL, MemorySize.Unknown, OpAccess.CondWrite, CodeSize.Code16, 0);
				}
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.AX, OpAccess.CondRead);
					AddRegister(flags, Register.DX, OpAccess.CondRead);
					AddRegister(flags, Register.BX, OpAccess.CondRead);
					AddRegister(flags, Register.SI, OpAccess.CondRead);
					AddRegister(flags, Register.DI, OpAccess.CondRead);
					if ((flags & Flags.Is64Bit) == 0)
					{
						AddRegister(flags, Register.ES, OpAccess.CondRead);
					}
					AddRegister(flags, Register.SI, OpAccess.CondWrite);
					AddRegister(flags, Register.DI, OpAccess.CondWrite);
					AddRegister(flags, Register.CX, OpAccess.ReadCondWrite);
				}
				break;
			case ImpliedAccess.t_CRmem_CRmem_CRmem_CWmem_CReax_CRedx_CRebx_CResi_CRedi_CRes_CWesi_CWedi_RCWecx:
				if ((flags & Flags.NoMemoryUsage) == 0)
				{
					AddMemory(Register.ES, Register.EDX, Register.None, 1, 0uL, MemorySize.Unknown, OpAccess.CondRead, CodeSize.Code32, 0);
					AddMemory(Register.ES, Register.EBX, Register.None, 1, 0uL, MemorySize.Unknown, OpAccess.CondRead, CodeSize.Code32, 0);
					AddMemory(Register.ES, Register.ESI, Register.None, 1, 0uL, MemorySize.Unknown, OpAccess.CondRead, CodeSize.Code32, 0);
					AddMemory(Register.ES, Register.EDI, Register.None, 1, 0uL, MemorySize.Unknown, OpAccess.CondWrite, CodeSize.Code32, 0);
				}
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.EAX, OpAccess.CondRead);
					AddRegister(flags, Register.EDX, OpAccess.CondRead);
					AddRegister(flags, Register.EBX, OpAccess.CondRead);
					AddRegister(flags, Register.ESI, OpAccess.CondRead);
					AddRegister(flags, Register.EDI, OpAccess.CondRead);
					if ((flags & Flags.Is64Bit) == 0)
					{
						AddRegister(flags, Register.ES, OpAccess.CondRead);
					}
					AddRegister(flags, Register.ESI, OpAccess.CondWrite);
					AddRegister(flags, Register.EDI, OpAccess.CondWrite);
					AddRegister(flags, Register.ECX, OpAccess.ReadCondWrite);
				}
				break;
			case ImpliedAccess.t_CRmem_CRmem_CRmem_CWmem_CRrax_CRrdx_CRrbx_CRrsi_CRrdi_CRes_CWrsi_CWrdi_RCWrcx:
				if ((flags & Flags.NoMemoryUsage) == 0)
				{
					AddMemory(Register.ES, Register.RDX, Register.None, 1, 0uL, MemorySize.Unknown, OpAccess.CondRead, CodeSize.Code64, 0);
					AddMemory(Register.ES, Register.RBX, Register.None, 1, 0uL, MemorySize.Unknown, OpAccess.CondRead, CodeSize.Code64, 0);
					AddMemory(Register.ES, Register.RSI, Register.None, 1, 0uL, MemorySize.Unknown, OpAccess.CondRead, CodeSize.Code64, 0);
					AddMemory(Register.ES, Register.RDI, Register.None, 1, 0uL, MemorySize.Unknown, OpAccess.CondWrite, CodeSize.Code64, 0);
				}
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.RAX, OpAccess.CondRead);
					AddRegister(flags, Register.RDX, OpAccess.CondRead);
					AddRegister(flags, Register.RBX, OpAccess.CondRead);
					AddRegister(flags, Register.RSI, OpAccess.CondRead);
					AddRegister(flags, Register.RDI, OpAccess.CondRead);
					if ((flags & Flags.Is64Bit) == 0)
					{
						AddRegister(flags, Register.ES, OpAccess.CondRead);
					}
					AddRegister(flags, Register.RSI, OpAccess.CondWrite);
					AddRegister(flags, Register.RDI, OpAccess.CondWrite);
					AddRegister(flags, Register.RCX, OpAccess.ReadCondWrite);
				}
				break;
			case ImpliedAccess.t_gpr16_Wgs:
				CommandLastGpr(in instruction, flags, Register.AX);
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.GS, OpAccess.Write);
				}
				break;
			case ImpliedAccess.t_Wrsp_Wcs_Wss_pop5x8:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.RSP, OpAccess.Write);
					AddRegister(flags, Register.CS, OpAccess.Write);
					AddRegister(flags, Register.SS, OpAccess.Write);
				}
				CommandPop(in instruction, flags, 5, 8u);
				break;
			case ImpliedAccess.t_Rcs_Rss_Wrsp_pop5x8:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.CS, OpAccess.Read);
					AddRegister(flags, Register.SS, OpAccess.Read);
					AddRegister(flags, Register.RSP, OpAccess.Write);
				}
				CommandPop(in instruction, flags, 5, 8u);
				break;
			case ImpliedAccess.t_Reax_Recx_Wedx_Webx:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.EAX, OpAccess.Read);
					AddRegister(flags, Register.ECX, OpAccess.Read);
					AddRegister(flags, Register.EDX, OpAccess.Write);
					AddRegister(flags, Register.EBX, OpAccess.Write);
				}
				break;
			case ImpliedAccess.t_Reax_Recx_Redx_CRebx_CWedx_CWebx:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.EAX, OpAccess.Read);
					AddRegister(flags, Register.ECX, OpAccess.Read);
					AddRegister(flags, Register.EDX, OpAccess.Read);
					AddRegister(flags, Register.EBX, OpAccess.CondRead);
					AddRegister(flags, Register.EDX, OpAccess.CondWrite);
					AddRegister(flags, Register.EBX, OpAccess.CondWrite);
				}
				break;
			case ImpliedAccess.t_memdisplm64:
				CommandMemDispl(flags, -64);
				break;
			case ImpliedAccess.t_CRmem_CRmem_CWmem_CRsi_CRdi_CRes_CWsi_RCWcx:
				if ((flags & Flags.NoMemoryUsage) == 0)
				{
					AddMemory(Register.ES, Register.SI, Register.None, 1, 0uL, MemorySize.Unknown, OpAccess.CondRead, CodeSize.Code16, 0);
					AddMemory(Register.ES, Register.DI, Register.None, 1, 0uL, MemorySize.Unknown, OpAccess.CondRead, CodeSize.Code16, 0);
					AddMemory(Register.ES, Register.DI, Register.None, 1, 0uL, MemorySize.Unknown, OpAccess.CondWrite, CodeSize.Code16, 0);
				}
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.SI, OpAccess.CondRead);
					AddRegister(flags, Register.DI, OpAccess.CondRead);
					if ((flags & Flags.Is64Bit) == 0)
					{
						AddRegister(flags, Register.ES, OpAccess.CondRead);
					}
					AddRegister(flags, Register.SI, OpAccess.CondWrite);
					AddRegister(flags, Register.CX, OpAccess.ReadCondWrite);
				}
				break;
			case ImpliedAccess.t_CRmem_CRmem_CWmem_CResi_CRedi_CRes_CWesi_RCWecx:
				if ((flags & Flags.NoMemoryUsage) == 0)
				{
					AddMemory(Register.ES, Register.ESI, Register.None, 1, 0uL, MemorySize.Unknown, OpAccess.CondRead, CodeSize.Code32, 0);
					AddMemory(Register.ES, Register.EDI, Register.None, 1, 0uL, MemorySize.Unknown, OpAccess.CondRead, CodeSize.Code32, 0);
					AddMemory(Register.ES, Register.EDI, Register.None, 1, 0uL, MemorySize.Unknown, OpAccess.CondWrite, CodeSize.Code32, 0);
				}
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.ESI, OpAccess.CondRead);
					AddRegister(flags, Register.EDI, OpAccess.CondRead);
					if ((flags & Flags.Is64Bit) == 0)
					{
						AddRegister(flags, Register.ES, OpAccess.CondRead);
					}
					AddRegister(flags, Register.ESI, OpAccess.CondWrite);
					AddRegister(flags, Register.ECX, OpAccess.ReadCondWrite);
				}
				break;
			case ImpliedAccess.t_CRmem_CRmem_CWmem_CRrsi_CRrdi_CRes_CWrsi_RCWrcx:
				if ((flags & Flags.NoMemoryUsage) == 0)
				{
					AddMemory(Register.ES, Register.RSI, Register.None, 1, 0uL, MemorySize.Unknown, OpAccess.CondRead, CodeSize.Code64, 0);
					AddMemory(Register.ES, Register.RDI, Register.None, 1, 0uL, MemorySize.Unknown, OpAccess.CondRead, CodeSize.Code64, 0);
					AddMemory(Register.ES, Register.RDI, Register.None, 1, 0uL, MemorySize.Unknown, OpAccess.CondWrite, CodeSize.Code64, 0);
				}
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.RSI, OpAccess.CondRead);
					AddRegister(flags, Register.RDI, OpAccess.CondRead);
					if ((flags & Flags.Is64Bit) == 0)
					{
						AddRegister(flags, Register.ES, OpAccess.CondRead);
					}
					AddRegister(flags, Register.RSI, OpAccess.CondWrite);
					AddRegister(flags, Register.RCX, OpAccess.ReadCondWrite);
				}
				break;
			case ImpliedAccess.t_CRmem_CRmem_Rrcx_CRrsi_CRrdi_CRes_CRds_CWrcx:
				if ((flags & Flags.NoMemoryUsage) == 0)
				{
					AddMemory(Register.ES, Register.RDI, Register.None, 1, 0uL, MemorySize.Unknown, OpAccess.CondRead, CodeSize.Code64, 0);
					AddMemory(Register.DS, Register.RSI, Register.None, 1, 0uL, MemorySize.Unknown, OpAccess.CondRead, CodeSize.Code64, 0);
				}
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.RCX, OpAccess.Read);
					AddRegister(flags, Register.RSI, OpAccess.CondRead);
					AddRegister(flags, Register.RDI, OpAccess.CondRead);
					if ((flags & Flags.Is64Bit) == 0)
					{
						AddRegister(flags, Register.ES, OpAccess.CondRead);
					}
					if ((flags & Flags.Is64Bit) == 0)
					{
						AddRegister(flags, Register.DS, OpAccess.CondRead);
					}
					AddRegister(flags, Register.RCX, OpAccess.CondWrite);
				}
				break;
			case ImpliedAccess.t_CRmem_CWmem_Rrcx_CRrsi_CRrdi_CRes_CRds_CWrcx:
				if ((flags & Flags.NoMemoryUsage) == 0)
				{
					AddMemory(Register.DS, Register.RSI, Register.None, 1, 0uL, MemorySize.Unknown, OpAccess.CondRead, CodeSize.Code64, 0);
					AddMemory(Register.ES, Register.RDI, Register.None, 1, 0uL, MemorySize.Unknown, OpAccess.CondWrite, CodeSize.Code64, 0);
				}
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.RCX, OpAccess.Read);
					AddRegister(flags, Register.RSI, OpAccess.CondRead);
					AddRegister(flags, Register.RDI, OpAccess.CondRead);
					if ((flags & Flags.Is64Bit) == 0)
					{
						AddRegister(flags, Register.ES, OpAccess.CondRead);
					}
					if ((flags & Flags.Is64Bit) == 0)
					{
						AddRegister(flags, Register.DS, OpAccess.CondRead);
					}
					AddRegister(flags, Register.RCX, OpAccess.CondWrite);
				}
				break;
			case ImpliedAccess.t_Rdl_Rrax_Weax_Wrcx_Wrdx:
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, Register.DL, OpAccess.Read);
					AddRegister(flags, Register.RAX, OpAccess.Read);
					AddRegister(flags, Register.EAX, OpAccess.Write);
					AddRegister(flags, Register.RCX, OpAccess.Write);
					AddRegister(flags, Register.RDX, OpAccess.Write);
				}
				break;
			default:
				throw new InvalidOperationException();
			case ImpliedAccess.None:
			case ImpliedAccess.Shift_Ib_MASK1FMOD9:
			case ImpliedAccess.Shift_Ib_MASK1FMOD11:
			case ImpliedAccess.Shift_Ib_MASK1F:
			case ImpliedAccess.Shift_Ib_MASK3F:
				break;
			}
		}

		private static Register GetARDI(Instruction instruction)
		{
			return instruction.Op0Kind switch
			{
				OpKind.MemorySegDI => Register.DI, 
				OpKind.MemorySegEDI => Register.EDI, 
				_ => Register.RDI, 
			};
		}

		private static Register GetSegDefaultDS(Instruction instruction)
		{
			Register segmentPrefix = instruction.SegmentPrefix;
			if (segmentPrefix != 0)
			{
				return segmentPrefix;
			}
			return Register.DS;
		}

		private void CommandPush(in Instruction instruction, Flags flags, int count, uint opSize)
		{
			ulong xspMask;
			CodeSize addressSize;
			Register xSP = GetXSP(instruction.CodeSize, out xspMask, out addressSize);
			if ((flags & Flags.NoRegisterUsage) == 0)
			{
				if ((flags & Flags.Is64Bit) == 0)
				{
					AddRegister(flags, Register.SS, OpAccess.Read);
				}
				AddRegister(flags, xSP, OpAccess.ReadWrite);
			}
			if ((flags & Flags.NoMemoryUsage) == 0)
			{
				MemorySize memorySize = opSize switch
				{
					8u => MemorySize.UInt64, 
					4u => MemorySize.UInt32, 
					_ => MemorySize.UInt16, 
				};
				ulong num = 0uL - (ulong)opSize;
				int num2 = 0;
				while (num2 < count)
				{
					AddMemory(Register.SS, xSP, Register.None, 1, num & xspMask, memorySize, OpAccess.Write, addressSize, 0);
					num2++;
					num -= opSize;
				}
			}
		}

		private void CommandPop(in Instruction instruction, Flags flags, int count, uint opSize)
		{
			ulong xspMask;
			CodeSize addressSize;
			Register xSP = GetXSP(instruction.CodeSize, out xspMask, out addressSize);
			if ((flags & Flags.NoRegisterUsage) == 0)
			{
				if ((flags & Flags.Is64Bit) == 0)
				{
					AddRegister(flags, Register.SS, OpAccess.Read);
				}
				AddRegister(flags, xSP, OpAccess.ReadWrite);
			}
			if ((flags & Flags.NoMemoryUsage) == 0)
			{
				MemorySize memorySize = opSize switch
				{
					8u => MemorySize.UInt64, 
					4u => MemorySize.UInt32, 
					_ => MemorySize.UInt16, 
				};
				ulong num = 0uL;
				int num2 = 0;
				while (num2 < count)
				{
					AddMemory(Register.SS, xSP, Register.None, 1, num, memorySize, OpAccess.Read, addressSize, 0);
					num2++;
					num += opSize;
				}
			}
		}

		private void CommandPopRm(in Instruction instruction, Flags flags, uint opSize)
		{
			ulong xspMask;
			CodeSize addressSize;
			Register xSP = GetXSP(instruction.CodeSize, out xspMask, out addressSize);
			if ((flags & Flags.NoRegisterUsage) == 0)
			{
				if ((flags & Flags.Is64Bit) == 0)
				{
					AddRegister(flags, Register.SS, OpAccess.Read);
				}
				AddRegister(flags, xSP, OpAccess.ReadWrite);
			}
			if ((flags & Flags.NoMemoryUsage) != 0)
			{
				return;
			}
			MemorySize memorySize = opSize switch
			{
				8u => MemorySize.UInt64, 
				4u => MemorySize.UInt32, 
				_ => MemorySize.UInt16, 
			};
			if (instruction.Op0Kind == OpKind.Memory && (instruction.MemoryBase == Register.RSP || instruction.MemoryBase == Register.ESP))
			{
				ref UsedMemory reference = ref info.usedMemoryLocations.Array[0];
				ulong num = reference.Displacement + opSize;
				if (instruction.MemoryBase == Register.ESP)
				{
					num = (uint)num;
				}
				info.usedMemoryLocations.Array[0] = new UsedMemory(reference.Segment, reference.Base, reference.Index, reference.Scale, num, reference.MemorySize, reference.Access, reference.AddressSize, reference.VsibSize);
			}
			AddMemory(Register.SS, xSP, Register.None, 1, 0uL, memorySize, OpAccess.Read, addressSize, 0);
		}

		private void CommandPusha(in Instruction instruction, Flags flags, uint opSize)
		{
			ulong xspMask;
			CodeSize addressSize;
			Register xSP = GetXSP(instruction.CodeSize, out xspMask, out addressSize);
			if ((flags & Flags.NoRegisterUsage) == 0)
			{
				if ((flags & Flags.Is64Bit) == 0)
				{
					AddRegister(flags, Register.SS, OpAccess.Read);
				}
				AddRegister(flags, xSP, OpAccess.ReadWrite);
			}
			long num;
			MemorySize memorySize;
			Register register;
			if (opSize == 4)
			{
				num = -4L;
				memorySize = MemorySize.UInt32;
				register = Register.EAX;
			}
			else
			{
				num = -2L;
				memorySize = MemorySize.UInt16;
				register = Register.AX;
			}
			for (int i = 0; i < 8; i++)
			{
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, register + i, OpAccess.Read);
				}
				if ((flags & Flags.NoMemoryUsage) == 0)
				{
					AddMemory(Register.SS, xSP, Register.None, 1, (ulong)(num * (i + 1)) & xspMask, memorySize, OpAccess.Write, addressSize, 0);
				}
			}
		}

		private void CommandPopa(in Instruction instruction, Flags flags, uint opSize)
		{
			ulong xspMask;
			CodeSize addressSize;
			Register xSP = GetXSP(instruction.CodeSize, out xspMask, out addressSize);
			if ((flags & Flags.NoRegisterUsage) == 0)
			{
				if ((flags & Flags.Is64Bit) == 0)
				{
					AddRegister(flags, Register.SS, OpAccess.Read);
				}
				AddRegister(flags, xSP, OpAccess.ReadWrite);
			}
			MemorySize memorySize;
			Register register;
			if (opSize == 4)
			{
				memorySize = MemorySize.UInt32;
				register = Register.EAX;
			}
			else
			{
				memorySize = MemorySize.UInt16;
				register = Register.AX;
			}
			for (int i = 0; i < 8; i++)
			{
				if (i != 3)
				{
					if ((flags & Flags.NoRegisterUsage) == 0)
					{
						AddRegister(flags, register + 7 - i, OpAccess.Write);
					}
					if ((flags & Flags.NoMemoryUsage) == 0)
					{
						AddMemory(Register.SS, xSP, Register.None, 1, (opSize * (uint)i) & xspMask, memorySize, OpAccess.Read, addressSize, 0);
					}
				}
			}
		}

		private unsafe void CommandIns(in Instruction instruction, Flags flags)
		{
			CodeSize addressSize;
			Register register;
			Register reg;
			switch (instruction.Op0Kind)
			{
			case OpKind.MemoryESDI:
				addressSize = CodeSize.Code16;
				register = Register.DI;
				reg = Register.CX;
				break;
			case OpKind.MemoryESEDI:
				addressSize = CodeSize.Code32;
				register = Register.EDI;
				reg = Register.ECX;
				break;
			default:
				addressSize = CodeSize.Code64;
				register = Register.RDI;
				reg = Register.RCX;
				break;
			}
			if (instruction.Internal_HasRepeOrRepnePrefix)
			{
				info.opAccesses[0] = 4;
				info.opAccesses[1] = 2;
				if ((flags & Flags.NoMemoryUsage) == 0)
				{
					AddMemory(Register.ES, register, Register.None, 1, 0uL, MemorySize.Unknown, OpAccess.CondWrite, addressSize, 0);
				}
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					info.usedRegisters.Array[0] = new UsedRegister(Register.DX, OpAccess.CondRead);
					AddRegister(flags, reg, OpAccess.ReadCondWrite);
					if ((flags & Flags.Is64Bit) == 0)
					{
						AddRegister(flags, Register.ES, OpAccess.CondRead);
					}
					AddRegister(flags, register, OpAccess.CondRead);
					AddRegister(flags, register, OpAccess.CondWrite);
				}
				return;
			}
			if ((flags & Flags.NoMemoryUsage) == 0)
			{
				AddMemory(Register.ES, register, Register.None, 1, 0uL, instruction.MemorySize, OpAccess.Write, addressSize, 0);
			}
			if ((flags & Flags.NoRegisterUsage) == 0)
			{
				if ((flags & Flags.Is64Bit) == 0)
				{
					AddRegister(flags, Register.ES, OpAccess.Read);
				}
				AddRegister(flags, register, OpAccess.ReadWrite);
			}
		}

		private unsafe void CommandOuts(in Instruction instruction, Flags flags)
		{
			CodeSize addressSize;
			Register register;
			Register reg;
			switch (instruction.Op1Kind)
			{
			case OpKind.MemorySegSI:
				addressSize = CodeSize.Code16;
				register = Register.SI;
				reg = Register.CX;
				break;
			case OpKind.MemorySegESI:
				addressSize = CodeSize.Code32;
				register = Register.ESI;
				reg = Register.ECX;
				break;
			default:
				addressSize = CodeSize.Code64;
				register = Register.RSI;
				reg = Register.RCX;
				break;
			}
			if (instruction.Internal_HasRepeOrRepnePrefix)
			{
				info.opAccesses[0] = 2;
				info.opAccesses[1] = 2;
				if ((flags & Flags.NoMemoryUsage) == 0)
				{
					AddMemory(instruction.MemorySegment, register, Register.None, 1, 0uL, MemorySize.Unknown, OpAccess.CondRead, addressSize, 0);
				}
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					info.usedRegisters.Array[0] = new UsedRegister(Register.DX, OpAccess.CondRead);
					AddRegister(flags, reg, OpAccess.ReadCondWrite);
					AddMemorySegmentRegister(flags, instruction.MemorySegment, OpAccess.CondRead);
					AddRegister(flags, register, OpAccess.CondRead);
					AddRegister(flags, register, OpAccess.CondWrite);
				}
			}
			else
			{
				if ((flags & Flags.NoMemoryUsage) == 0)
				{
					AddMemory(instruction.MemorySegment, register, Register.None, 1, 0uL, instruction.MemorySize, OpAccess.Read, addressSize, 0);
				}
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddMemorySegmentRegister(flags, instruction.MemorySegment, OpAccess.Read);
					AddRegister(flags, register, OpAccess.ReadWrite);
				}
			}
		}

		private unsafe void CommandMovs(in Instruction instruction, Flags flags)
		{
			CodeSize addressSize;
			Register register;
			Register register2;
			Register reg;
			switch (instruction.Op0Kind)
			{
			case OpKind.MemoryESDI:
				addressSize = CodeSize.Code16;
				register = Register.SI;
				register2 = Register.DI;
				reg = Register.CX;
				break;
			case OpKind.MemoryESEDI:
				addressSize = CodeSize.Code32;
				register = Register.ESI;
				register2 = Register.EDI;
				reg = Register.ECX;
				break;
			default:
				addressSize = CodeSize.Code64;
				register = Register.RSI;
				register2 = Register.RDI;
				reg = Register.RCX;
				break;
			}
			if (instruction.Internal_HasRepeOrRepnePrefix)
			{
				info.opAccesses[0] = 4;
				info.opAccesses[1] = 2;
				if ((flags & Flags.NoMemoryUsage) == 0)
				{
					AddMemory(Register.ES, register2, Register.None, 1, 0uL, MemorySize.Unknown, OpAccess.CondWrite, addressSize, 0);
					AddMemory(instruction.MemorySegment, register, Register.None, 1, 0uL, MemorySize.Unknown, OpAccess.CondRead, addressSize, 0);
				}
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, reg, OpAccess.ReadCondWrite);
					if ((flags & Flags.Is64Bit) == 0)
					{
						AddRegister(flags, Register.ES, OpAccess.CondRead);
					}
					AddRegister(flags, register2, OpAccess.CondRead);
					AddRegister(flags, register2, OpAccess.CondWrite);
					AddMemorySegmentRegister(flags, instruction.MemorySegment, OpAccess.CondRead);
					AddRegister(flags, register, OpAccess.CondRead);
					AddRegister(flags, register, OpAccess.CondWrite);
				}
				return;
			}
			if ((flags & Flags.NoMemoryUsage) == 0)
			{
				AddMemory(Register.ES, register2, Register.None, 1, 0uL, instruction.MemorySize, OpAccess.Write, addressSize, 0);
				AddMemory(instruction.MemorySegment, register, Register.None, 1, 0uL, instruction.MemorySize, OpAccess.Read, addressSize, 0);
			}
			if ((flags & Flags.NoRegisterUsage) == 0)
			{
				if ((flags & Flags.Is64Bit) == 0)
				{
					AddRegister(flags, Register.ES, OpAccess.Read);
				}
				AddRegister(flags, register2, OpAccess.ReadWrite);
				AddMemorySegmentRegister(flags, instruction.MemorySegment, OpAccess.Read);
				AddRegister(flags, register, OpAccess.ReadWrite);
			}
		}

		private unsafe void CommandCmps(in Instruction instruction, Flags flags)
		{
			CodeSize addressSize;
			Register register;
			Register register2;
			Register reg;
			switch (instruction.Op0Kind)
			{
			case OpKind.MemorySegSI:
				addressSize = CodeSize.Code16;
				register = Register.SI;
				register2 = Register.DI;
				reg = Register.CX;
				break;
			case OpKind.MemorySegESI:
				addressSize = CodeSize.Code32;
				register = Register.ESI;
				register2 = Register.EDI;
				reg = Register.ECX;
				break;
			default:
				addressSize = CodeSize.Code64;
				register = Register.RSI;
				register2 = Register.RDI;
				reg = Register.RCX;
				break;
			}
			if (instruction.Internal_HasRepeOrRepnePrefix)
			{
				info.opAccesses[0] = 2;
				info.opAccesses[1] = 2;
				if ((flags & Flags.NoMemoryUsage) == 0)
				{
					AddMemory(instruction.MemorySegment, register, Register.None, 1, 0uL, MemorySize.Unknown, OpAccess.CondRead, addressSize, 0);
					AddMemory(Register.ES, register2, Register.None, 1, 0uL, MemorySize.Unknown, OpAccess.CondRead, addressSize, 0);
				}
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, reg, OpAccess.ReadCondWrite);
					AddMemorySegmentRegister(flags, instruction.MemorySegment, OpAccess.CondRead);
					AddRegister(flags, register, OpAccess.CondRead);
					AddRegister(flags, register, OpAccess.CondWrite);
					if ((flags & Flags.Is64Bit) == 0)
					{
						AddRegister(flags, Register.ES, OpAccess.CondRead);
					}
					AddRegister(flags, register2, OpAccess.CondRead);
					AddRegister(flags, register2, OpAccess.CondWrite);
				}
				return;
			}
			if ((flags & Flags.NoMemoryUsage) == 0)
			{
				AddMemory(instruction.MemorySegment, register, Register.None, 1, 0uL, instruction.MemorySize, OpAccess.Read, addressSize, 0);
				AddMemory(Register.ES, register2, Register.None, 1, 0uL, instruction.MemorySize, OpAccess.Read, addressSize, 0);
			}
			if ((flags & Flags.NoRegisterUsage) == 0)
			{
				AddMemorySegmentRegister(flags, instruction.MemorySegment, OpAccess.Read);
				AddRegister(flags, register, OpAccess.ReadWrite);
				if ((flags & Flags.Is64Bit) == 0)
				{
					AddRegister(flags, Register.ES, OpAccess.Read);
				}
				AddRegister(flags, register2, OpAccess.ReadWrite);
			}
		}

		private unsafe void CommandStos(in Instruction instruction, Flags flags)
		{
			CodeSize addressSize;
			Register register;
			Register reg;
			switch (instruction.Op0Kind)
			{
			case OpKind.MemoryESDI:
				addressSize = CodeSize.Code16;
				register = Register.DI;
				reg = Register.CX;
				break;
			case OpKind.MemoryESEDI:
				addressSize = CodeSize.Code32;
				register = Register.EDI;
				reg = Register.ECX;
				break;
			default:
				addressSize = CodeSize.Code64;
				register = Register.RDI;
				reg = Register.RCX;
				break;
			}
			if (instruction.Internal_HasRepeOrRepnePrefix)
			{
				info.opAccesses[0] = 4;
				info.opAccesses[1] = 2;
				if ((flags & Flags.NoMemoryUsage) == 0)
				{
					AddMemory(Register.ES, register, Register.None, 1, 0uL, MemorySize.Unknown, OpAccess.CondWrite, addressSize, 0);
				}
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					info.usedRegisters.Array[0] = new UsedRegister(info.usedRegisters.Array[0].Register, OpAccess.CondRead);
					AddRegister(flags, reg, OpAccess.ReadCondWrite);
					if ((flags & Flags.Is64Bit) == 0)
					{
						AddRegister(flags, Register.ES, OpAccess.CondRead);
					}
					AddRegister(flags, register, OpAccess.CondRead);
					AddRegister(flags, register, OpAccess.CondWrite);
				}
				return;
			}
			if ((flags & Flags.NoMemoryUsage) == 0)
			{
				AddMemory(Register.ES, register, Register.None, 1, 0uL, instruction.MemorySize, OpAccess.Write, addressSize, 0);
			}
			if ((flags & Flags.NoRegisterUsage) == 0)
			{
				if ((flags & Flags.Is64Bit) == 0)
				{
					AddRegister(flags, Register.ES, OpAccess.Read);
				}
				AddRegister(flags, register, OpAccess.ReadWrite);
			}
		}

		private unsafe void CommandLods(in Instruction instruction, Flags flags)
		{
			CodeSize addressSize;
			Register register;
			Register reg;
			switch (instruction.Op1Kind)
			{
			case OpKind.MemorySegSI:
				addressSize = CodeSize.Code16;
				register = Register.SI;
				reg = Register.CX;
				break;
			case OpKind.MemorySegESI:
				addressSize = CodeSize.Code32;
				register = Register.ESI;
				reg = Register.ECX;
				break;
			default:
				addressSize = CodeSize.Code64;
				register = Register.RSI;
				reg = Register.RCX;
				break;
			}
			if (instruction.Internal_HasRepeOrRepnePrefix)
			{
				info.opAccesses[0] = 4;
				info.opAccesses[1] = 2;
				if ((flags & Flags.NoMemoryUsage) == 0)
				{
					AddMemory(instruction.MemorySegment, register, Register.None, 1, 0uL, MemorySize.Unknown, OpAccess.CondRead, addressSize, 0);
				}
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					info.usedRegisters.Array[0] = new UsedRegister(info.usedRegisters.Array[0].Register, OpAccess.CondWrite);
					AddRegister(flags, reg, OpAccess.ReadCondWrite);
					AddMemorySegmentRegister(flags, instruction.MemorySegment, OpAccess.CondRead);
					AddRegister(flags, register, OpAccess.CondRead);
					AddRegister(flags, register, OpAccess.CondWrite);
				}
			}
			else
			{
				if ((flags & Flags.NoMemoryUsage) == 0)
				{
					AddMemory(instruction.MemorySegment, register, Register.None, 1, 0uL, instruction.MemorySize, OpAccess.Read, addressSize, 0);
				}
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddMemorySegmentRegister(flags, instruction.MemorySegment, OpAccess.Read);
					AddRegister(flags, register, OpAccess.ReadWrite);
				}
			}
		}

		private unsafe void CommandScas(in Instruction instruction, Flags flags)
		{
			CodeSize addressSize;
			Register register;
			Register reg;
			switch (instruction.Op1Kind)
			{
			case OpKind.MemoryESDI:
				addressSize = CodeSize.Code16;
				register = Register.DI;
				reg = Register.CX;
				break;
			case OpKind.MemoryESEDI:
				addressSize = CodeSize.Code32;
				register = Register.EDI;
				reg = Register.ECX;
				break;
			default:
				addressSize = CodeSize.Code64;
				register = Register.RDI;
				reg = Register.RCX;
				break;
			}
			if (instruction.Internal_HasRepeOrRepnePrefix)
			{
				info.opAccesses[0] = 2;
				info.opAccesses[1] = 2;
				if ((flags & Flags.NoMemoryUsage) == 0)
				{
					AddMemory(Register.ES, register, Register.None, 1, 0uL, MemorySize.Unknown, OpAccess.CondRead, addressSize, 0);
				}
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					info.usedRegisters.Array[0] = new UsedRegister(info.usedRegisters.Array[0].Register, OpAccess.CondRead);
					AddRegister(flags, reg, OpAccess.ReadCondWrite);
					if ((flags & Flags.Is64Bit) == 0)
					{
						AddRegister(flags, Register.ES, OpAccess.CondRead);
					}
					AddRegister(flags, register, OpAccess.CondRead);
					AddRegister(flags, register, OpAccess.CondWrite);
				}
				return;
			}
			if ((flags & Flags.NoMemoryUsage) == 0)
			{
				AddMemory(Register.ES, register, Register.None, 1, 0uL, instruction.MemorySize, OpAccess.Read, addressSize, 0);
			}
			if ((flags & Flags.NoRegisterUsage) == 0)
			{
				if ((flags & Flags.Is64Bit) == 0)
				{
					AddRegister(flags, Register.ES, OpAccess.Read);
				}
				AddRegister(flags, register, OpAccess.ReadWrite);
			}
		}

		private void CommandXstore(in Instruction instruction, Flags flags, uint size)
		{
			CodeSize addressSize;
			Register register;
			Register reg;
			switch (size)
			{
			case 2u:
				addressSize = CodeSize.Code16;
				register = Register.DI;
				reg = Register.CX;
				break;
			case 4u:
				addressSize = CodeSize.Code32;
				register = Register.EDI;
				reg = Register.ECX;
				break;
			default:
				addressSize = CodeSize.Code64;
				register = Register.RDI;
				reg = Register.RCX;
				break;
			}
			if (instruction.Internal_HasRepeOrRepnePrefix)
			{
				if ((flags & Flags.NoMemoryUsage) == 0)
				{
					AddMemory(Register.ES, register, Register.None, 1, 0uL, MemorySize.Unknown, OpAccess.CondWrite, addressSize, 0);
				}
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, reg, OpAccess.ReadCondWrite);
					if ((flags & Flags.Is64Bit) == 0)
					{
						AddRegister(flags, Register.ES, OpAccess.CondRead);
					}
					AddRegister(flags, register, OpAccess.CondRead);
					AddRegister(flags, register, OpAccess.CondWrite);
					AddRegister(flags, Register.EAX, OpAccess.CondWrite);
					AddRegister(flags, Register.EDX, OpAccess.CondRead);
				}
				return;
			}
			if ((flags & Flags.NoMemoryUsage) == 0)
			{
				AddMemory(Register.ES, register, Register.None, 1, 0uL, instruction.MemorySize, OpAccess.Write, addressSize, 0);
			}
			if ((flags & Flags.NoRegisterUsage) == 0)
			{
				if ((flags & Flags.Is64Bit) == 0)
				{
					AddRegister(flags, Register.ES, OpAccess.Read);
				}
				AddRegister(flags, register, OpAccess.ReadWrite);
				AddRegister(flags, Register.EAX, OpAccess.Write);
				AddRegister(flags, Register.EDX, OpAccess.Read);
			}
		}

		private void CommandEnter(in Instruction instruction, Flags flags, uint opSize)
		{
			ulong xspMask;
			CodeSize addressSize;
			Register xSP = GetXSP(instruction.CodeSize, out xspMask, out addressSize);
			if ((flags & Flags.NoRegisterUsage) == 0)
			{
				if ((flags & Flags.Is64Bit) == 0)
				{
					AddRegister(flags, Register.SS, OpAccess.Read);
				}
				AddRegister(flags, xSP, OpAccess.ReadWrite);
			}
			MemorySize memorySize;
			Register register;
			switch (opSize)
			{
			case 8u:
				memorySize = MemorySize.UInt64;
				register = Register.RSP;
				break;
			case 4u:
				memorySize = MemorySize.UInt32;
				register = Register.ESP;
				break;
			default:
				memorySize = MemorySize.UInt16;
				register = Register.SP;
				break;
			}
			if (register != xSP && (flags & Flags.NoRegisterUsage) == 0)
			{
				AddRegister(flags, register, OpAccess.ReadWrite);
			}
			int num = instruction.Immediate8_2nd & 0x1F;
			ulong num2 = 0uL;
			if ((flags & Flags.NoRegisterUsage) == 0)
			{
				AddRegister(flags, register + 1, OpAccess.ReadWrite);
			}
			if ((flags & Flags.NoMemoryUsage) == 0)
			{
				AddMemory(Register.SS, xSP, Register.None, 1, (num2 -= opSize) & xspMask, memorySize, OpAccess.Write, addressSize, 0);
			}
			if (num == 0)
			{
				return;
			}
			Register register2 = xSP + 1;
			ulong num3 = 0uL;
			for (int i = 1; i < num; i++)
			{
				if (i == 1 && register + 1 != register2 && (flags & Flags.NoRegisterUsage) == 0)
				{
					AddRegister(flags, register2, OpAccess.ReadWrite);
				}
				if ((flags & Flags.NoMemoryUsage) == 0)
				{
					AddMemory(Register.SS, register2, Register.None, 1, (num3 -= opSize) & xspMask, memorySize, OpAccess.Read, addressSize, 0);
					AddMemory(Register.SS, xSP, Register.None, 1, (num2 -= opSize) & xspMask, memorySize, OpAccess.Write, addressSize, 0);
				}
			}
			if ((flags & Flags.NoMemoryUsage) == 0)
			{
				AddMemory(Register.SS, xSP, Register.None, 1, (num2 -= opSize) & xspMask, memorySize, OpAccess.Write, addressSize, 0);
			}
		}

		private void CommandLeave(in Instruction instruction, Flags flags, uint opSize)
		{
			ulong xspMask;
			CodeSize addressSize;
			Register xSP = GetXSP(instruction.CodeSize, out xspMask, out addressSize);
			if ((flags & Flags.NoRegisterUsage) == 0)
			{
				if ((flags & Flags.Is64Bit) == 0)
				{
					AddRegister(flags, Register.SS, OpAccess.Read);
				}
				AddRegister(flags, xSP, OpAccess.Write);
			}
			switch (opSize)
			{
			case 8u:
				if ((flags & Flags.NoMemoryUsage) == 0)
				{
					AddMemory(Register.SS, xSP + 1, Register.None, 1, 0uL, MemorySize.UInt64, OpAccess.Read, addressSize, 0);
				}
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					if (xSP + 1 == Register.RBP)
					{
						AddRegister(flags, Register.RBP, OpAccess.ReadWrite);
						return;
					}
					AddRegister(flags, xSP + 1, OpAccess.Read);
					AddRegister(flags, Register.RBP, OpAccess.Write);
				}
				return;
			case 4u:
				if ((flags & Flags.NoMemoryUsage) == 0)
				{
					AddMemory(Register.SS, xSP + 1, Register.None, 1, 0uL, MemorySize.UInt32, OpAccess.Read, addressSize, 0);
				}
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					if (xSP + 1 == Register.EBP)
					{
						AddRegister(flags, Register.EBP, OpAccess.ReadWrite);
						return;
					}
					AddRegister(flags, xSP + 1, OpAccess.Read);
					AddRegister(flags, Register.EBP, OpAccess.Write);
				}
				return;
			}
			if ((flags & Flags.NoMemoryUsage) == 0)
			{
				AddMemory(Register.SS, xSP + 1, Register.None, 1, 0uL, MemorySize.UInt16, OpAccess.Read, addressSize, 0);
			}
			if ((flags & Flags.NoRegisterUsage) == 0)
			{
				if (xSP + 1 == Register.BP)
				{
					AddRegister(flags, Register.BP, OpAccess.ReadWrite);
					return;
				}
				AddRegister(flags, xSP + 1, OpAccess.Read);
				AddRegister(flags, Register.BP, OpAccess.Write);
			}
		}

		private unsafe void CommandClearRflags(in Instruction instruction, Flags flags)
		{
			if (instruction.Op0Register == instruction.Op1Register && instruction.Op0Kind == OpKind.Register && instruction.Op1Kind == OpKind.Register)
			{
				info.opAccesses[0] = 3;
				info.opAccesses[1] = 0;
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					info.usedRegisters.ValidLength = 0;
					AddRegister(flags, instruction.Op0Register, OpAccess.Write);
				}
			}
		}

		[MethodImpl(MethodImplOptions.AggressiveInlining)]
		private static bool IsClearInstr(in Instruction instruction)
		{
			MvexRegMemConv mvexRegMemConv = instruction.MvexRegMemConv;
			if ((uint)mvexRegMemConv <= 1u)
			{
				return true;
			}
			return false;
		}

		private unsafe void CommandClearRegRegmem(in Instruction instruction, Flags flags)
		{
			if (instruction.Op0Register == instruction.Op1Register && instruction.Op1Kind == OpKind.Register && IsClearInstr(in instruction))
			{
				info.opAccesses[0] = 3;
				info.opAccesses[1] = 0;
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					info.usedRegisters.Array[0] = new UsedRegister(instruction.Op0Register, OpAccess.Write);
					info.usedRegisters.ValidLength = 1;
				}
			}
		}

		private unsafe void CommandClearRegRegRegmem(in Instruction instruction, Flags flags)
		{
			if (instruction.Op1Register == instruction.Op2Register && instruction.Op2Kind == OpKind.Register && IsClearInstr(in instruction))
			{
				info.opAccesses[1] = 0;
				info.opAccesses[2] = 0;
				if ((flags & Flags.NoRegisterUsage) == 0)
				{
					info.usedRegisters.ValidLength -= 2;
				}
			}
		}

		private void CommandArpl(in Instruction instruction, Flags flags)
		{
			if ((flags & Flags.NoRegisterUsage) != 0)
			{
				return;
			}
			int num = ((instruction.Op0Kind != 0) ? (info.usedRegisters.ValidLength - 1) : 0);
			for (int i = 0; i < info.usedRegisters.ValidLength; i++)
			{
				if (i >= num)
				{
					UsedRegister usedRegister = info.usedRegisters.Array[i];
					int num2 = TryGetGpr163264Index(usedRegister.Register);
					if (num2 >= 4)
					{
						num2 += 4;
					}
					if (num2 >= 0)
					{
						info.usedRegisters.Array[i] = new UsedRegister((Register)(1 + num2), usedRegister.Access);
					}
				}
			}
		}

		private void CommandLastGpr(in Instruction instruction, Flags flags, Register baseReg)
		{
			if ((flags & Flags.NoRegisterUsage) != 0)
			{
				return;
			}
			int opCount = instruction.OpCount;
			int num = ((instruction.GetOpKind(opCount - 1) == OpKind.Immediate8) ? 1 : 0);
			int operand = opCount - 1 - num;
			if (instruction.GetOpKind(operand) == OpKind.Register)
			{
				int num2 = TryGetGpr163264Index(instruction.GetOpRegister(operand));
				if (num2 >= 4 && baseReg == Register.AL)
				{
					num2 += 4;
				}
				if (num2 >= 0)
				{
					info.usedRegisters.Array[info.usedRegisters.ValidLength - 1] = new UsedRegister(baseReg + num2, OpAccess.Read);
				}
			}
		}

		private void CommandLea(in Instruction instruction, Flags flags)
		{
			if ((flags & Flags.NoRegisterUsage) != 0)
			{
				return;
			}
			Register op0Register = instruction.Op0Register;
			for (int i = 1; i < info.usedRegisters.ValidLength; i++)
			{
				UsedRegister usedRegister = info.usedRegisters.Array[i];
				if (op0Register >= Register.EAX && op0Register <= Register.R15D)
				{
					if (usedRegister.Register >= Register.RAX && usedRegister.Register <= Register.R15)
					{
						Register register = usedRegister.Register - 53 + 37;
						info.usedRegisters.Array[i] = new UsedRegister(register, usedRegister.Access);
					}
					continue;
				}
				if (op0Register >= Register.AX && op0Register <= Register.R15W)
				{
					if (usedRegister.Register >= Register.EAX && usedRegister.Register <= Register.R15)
					{
						Register register2 = ((usedRegister.Register - 37) & Register.R10L) + 21;
						info.usedRegisters.Array[i] = new UsedRegister(register2, usedRegister.Access);
					}
					continue;
				}
				break;
			}
		}

		private void CommandEmmi(in Instruction instruction, Flags flags, OpAccess opAccess)
		{
			if ((flags & Flags.NoRegisterUsage) == 0 && instruction.Op0Kind == OpKind.Register)
			{
				Register op0Register = instruction.Op0Register;
				if (op0Register >= Register.MM0 && op0Register <= Register.MM7)
				{
					op0Register = ((op0Register - 225) ^ Register.AL) + 225;
					AddRegister(flags, op0Register, opAccess);
				}
			}
		}

		private void CommandMemDispl(Flags flags, int extraDispl)
		{
			if ((flags & Flags.NoMemoryUsage) == 0 && info.usedMemoryLocations.ValidLength == 1)
			{
				ref UsedMemory reference = ref info.usedMemoryLocations.Array[0];
				CodeSize addressSize = reference.AddressSize;
				ulong displ = (reference.Displacement + (ulong)extraDispl) & (addressSize switch
				{
					CodeSize.Code16 => 65535uL, 
					CodeSize.Code32 => 4294967295uL, 
					_ => ulong.MaxValue, 
				});
				info.usedMemoryLocations.Array[0] = new UsedMemory(reference.Segment, reference.Base, reference.Index, reference.Scale, displ, reference.MemorySize, reference.Access, reference.AddressSize, reference.VsibSize);
			}
		}

		private static int TryGetGpr163264Index(Register register)
		{
			int num = (int)(register - 37);
			if ((uint)num <= 15u)
			{
				return num;
			}
			num = (int)(register - 53);
			if ((uint)num <= 15u)
			{
				return num;
			}
			num = (int)(register - 21);
			if ((uint)num <= 15u)
			{
				return num;
			}
			return -1;
		}

		private void AddMemory(Register segReg, Register baseReg, Register indexReg, int scale, ulong displ, MemorySize memorySize, OpAccess access, CodeSize addressSize, int vsibSize)
		{
			if (addressSize == CodeSize.Unknown)
			{
				Register register = ((baseReg != 0) ? baseReg : indexReg);
				if (register.IsGPR64())
				{
					addressSize = CodeSize.Code64;
				}
				else if (register.IsGPR32())
				{
					addressSize = CodeSize.Code32;
				}
				else if (register.IsGPR16())
				{
					addressSize = CodeSize.Code16;
				}
			}
			if (access == OpAccess.NoMemAccess)
			{
				return;
			}
			int num = info.usedMemoryLocations.Array.Length;
			int validLength = info.usedMemoryLocations.ValidLength;
			if (num == validLength)
			{
				if (num == 0)
				{
					info.usedMemoryLocations.Array = new UsedMemory[1];
				}
				else
				{
					Array.Resize(ref info.usedMemoryLocations.Array, num * 2);
				}
			}
			info.usedMemoryLocations.Array[validLength] = new UsedMemory(segReg, baseReg, indexReg, scale, displ, memorySize, access, addressSize, vsibSize);
			info.usedMemoryLocations.ValidLength = validLength + 1;
		}

		[MethodImpl(MethodImplOptions.AggressiveInlining)]
		private void AddMemorySegmentRegister(Flags flags, Register seg, OpAccess access)
		{
			if ((flags & Flags.Is64Bit) == 0 || seg >= Register.FS)
			{
				AddRegister(flags, seg, access);
			}
		}

		private void AddRegister(Flags flags, Register reg, OpAccess access)
		{
			Register register = reg;
			if ((flags & (Flags.Is64Bit | Flags.ZeroExtVecRegs)) != 0 && (uint)(access - 3) <= 3u)
			{
				int num;
				if ((flags & Flags.Is64Bit) != 0 && (uint)(num = (int)(reg - 37)) <= 15u)
				{
					register = (Register)(53 + num);
				}
				else if ((flags & Flags.ZeroExtVecRegs) != 0 && (uint)(num = (int)(reg - 77)) <= 95u)
				{
					register = (Register)(141 + num % 32);
				}
				if (access != OpAccess.ReadWrite && access != OpAccess.ReadCondWrite)
				{
					reg = register;
				}
			}
			UsedRegister[] array = info.usedRegisters.Array;
			int validLength = info.usedRegisters.ValidLength;
			int num2 = array.Length;
			int num3 = ((register == reg) ? 1 : 2);
			if (validLength + num3 > num2)
			{
				if (num2 == 0)
				{
					array = (info.usedRegisters.Array = new UsedRegister[2]);
				}
				else
				{
					Array.Resize(ref info.usedRegisters.Array, num2 * 2);
					array = info.usedRegisters.Array;
				}
			}
			if (register == reg)
			{
				array[validLength] = new UsedRegister(reg, access);
				info.usedRegisters.ValidLength = validLength + 1;
				return;
			}
			array[validLength] = new UsedRegister(reg, OpAccess.Read);
			validLength++;
			OpAccess access2 = ((access == OpAccess.ReadWrite) ? OpAccess.Write : OpAccess.CondWrite);
			array[validLength] = new UsedRegister(register, access2);
			info.usedRegisters.ValidLength = validLength + 1;
		}
	}
	[DebuggerDisplay("Count = {Count}")]
	[DebuggerTypeProxy(typeof(InstructionListDebugView))]
	[EditorBrowsable(EditorBrowsableState.Never)]
	public sealed class InstructionList : IList<Instruction>, ICollection<Instruction>, IEnumerable<Instruction>, IEnumerable, IReadOnlyList<Instruction>, IReadOnlyCollection<Instruction>, IList, ICollection
	{
		public struct Enumerator : IEnumerator<Instruction>, IEnumerator, IDisposable
		{
			private readonly InstructionList list;

			private int index;

			public ref Instruction Current => ref list.elements[index];

			Instruction IEnumerator<Instruction>.Current => list.elements[index];

			object IEnumerator.Current => list.elements[index];

			internal Enumerator(InstructionList list)
			{
				this.list = list;
				index = -1;
			}

			public bool MoveNext()
			{
				index++;
				return index < list.count;
			}

			void IEnumerator.Reset()
			{
				throw new NotSupportedException();
			}

			public void Dispose()
			{
			}
		}

		private Instruction[] elements;

		private int count;

		public int Count => count;

		int ICollection<Instruction>.Count => count;

		int ICollection.Count => count;

		int IReadOnlyCollection<Instruction>.Count => count;

		public int Capacity => elements.Length;

		bool ICollection<Instruction>.IsReadOnly => false;

		bool IList.IsReadOnly => false;

		bool IList.IsFixedSize => false;

		bool ICollection.IsSynchronized => false;

		object ICollection.SyncRoot => this;

		public ref Instruction this[int index] => ref elements[index];

		Instruction IList<Instruction>.this[int index]
		{
			get
			{
				return elements[index];
			}
			set
			{
				elements[index] = value;
			}
		}

		Instruction IReadOnlyList<Instruction>.this[int index] => elements[index];

		object? IList.this[int index]
		{
			get
			{
				return elements[index];
			}
			set
			{
				if (value == null)
				{
					ThrowHelper.ThrowArgumentNullException_value();
				}
				if (!(value is Instruction))
				{
					ThrowHelper.ThrowArgumentException();
				}
				elements[index] = (Instruction)value;
			}
		}

		public InstructionList()
		{
			elements = Array2.Empty<Instruction>();
		}

		public InstructionList(int capacity)
		{
			if (capacity < 0)
			{
				ThrowHelper.ThrowArgumentOutOfRangeException_capacity();
			}
			elements = ((capacity == 0) ? Array2.Empty<Instruction>() : new Instruction[capacity]);
		}

		public InstructionList(InstructionList list)
		{
			if (list == null)
			{
				ThrowHelper.ThrowArgumentNullException_list();
			}
			int num = list.count;
			if (num == 0)
			{
				elements = Array2.Empty<Instruction>();
				return;
			}
			Instruction[] destinationArray = (elements = new Instruction[num]);
			count = num;
			Array.Copy(list.elements, 0, destinationArray, 0, num);
		}

		public InstructionList(IEnumerable<Instruction> collection)
		{
			if (collection == null)
			{
				ThrowHelper.ThrowArgumentNullException_collection();
			}
			if (collection is ICollection<Instruction> collection2)
			{
				int num = collection2.Count;
				if (num == 0)
				{
					elements = Array2.Empty<Instruction>();
					return;
				}
				collection2.CopyTo(elements = new Instruction[num], 0);
				count = num;
				return;
			}
			elements = Array2.Empty<Instruction>();
			foreach (Instruction item in collection)
			{
				Instruction instruction = item;
				Add(in instruction);
			}
		}

		private void SetMinCapacity(int minCapacity)
		{
			Instruction[] array = elements;
			uint num = (uint)array.Length;
			if (minCapacity > (int)num)
			{
				uint num2 = num * 2;
				if (num2 < 4)
				{
					num2 = 4u;
				}
				if (num2 < (uint)minCapacity)
				{
					num2 = (uint)minCapacity;
				}
				if (num2 > 2146435071)
				{
					num2 = 2146435071u;
				}
				Instruction[] destinationArray = new Instruction[num2];
				Array.Copy(array, 0, destinationArray, 0, count);
				elements = destinationArray;
			}
		}

		[MethodImpl(MethodImplOptions.AggressiveInlining)]
		public ref Instruction AllocUninitializedElement()
		{
			int num = count;
			Instruction[] array = elements;
			if (num == array.Length)
			{
				SetMinCapacity(num + 1);
				array = elements;
			}
			count = num + 1;
			return ref array[num];
		}

		private void MakeRoom(int index, int extraLength)
		{
			SetMinCapacity(count + extraLength);
			int num = count - index;
			if (num != 0)
			{
				Instruction[] array = elements;
				Array.Copy(array, index, array, index + extraLength, num);
			}
		}

		public void Insert(int index, in Instruction instruction)
		{
			int num = count;
			if ((uint)index > (uint)num)
			{
				ThrowHelper.ThrowArgumentOutOfRangeException_index();
			}
			MakeRoom(index, 1);
			elements[index] = instruction;
			count = num + 1;
		}

		void IList<Instruction>.Insert(int index, Instruction instruction)
		{
			Insert(index, in instruction);
		}

		void IList.Insert(int index, object value)
		{
			if (value == null)
			{
				ThrowHelper.ThrowArgumentNullException_value();
			}
			if (!(value is Instruction))
			{
				ThrowHelper.ThrowArgumentException();
			}
			Instruction instruction = (Instruction)value;
			Insert(index, in instruction);
		}

		public void RemoveAt(int index)
		{
			int num = count;
			if ((uint)index >= (uint)num)
			{
				ThrowHelper.ThrowArgumentOutOfRangeException_index();
			}
			int num2 = (count = num - 1) - index;
			if (num2 != 0)
			{
				Instruction[] array = elements;
				Array.Copy(array, index + 1, array, index, num2);
			}
		}

		void IList<Instruction>.RemoveAt(int index)
		{
			RemoveAt(index);
		}

		void IList.RemoveAt(int index)
		{
			RemoveAt(index);
		}

		public void AddRange(IEnumerable<Instruction> collection)
		{
			InsertRange(count, collection);
		}

		public void InsertRange(int index, IEnumerable<Instruction> collection)
		{
			if ((uint)index > (uint)count)
			{
				ThrowHelper.ThrowArgumentOutOfRangeException_index();
			}
			if (collection == null)
			{
				ThrowHelper.ThrowArgumentNullException_collection();
			}
			if (collection is InstructionList instructionList)
			{
				int num = instructionList.count;
				if (num != 0)
				{
					MakeRoom(index, num);
					count += num;
					Array.Copy(instructionList.elements, 0, elements, index, num);
				}
				return;
			}
			if (collection is IList<Instruction> list)
			{
				int num2 = list.Count;
				if (num2 != 0)
				{
					MakeRoom(index, num2);
					count += num2;
					Instruction[] array = elements;
					for (int i = 0; i < num2; i++)
					{
						array[index + i] = list[i];
					}
				}
				return;
			}
			if (collection is IReadOnlyList<Instruction> readOnlyList)
			{
				int num3 = readOnlyList.Count;
				if (num3 != 0)
				{
					MakeRoom(index, num3);
					count += num3;
					Instruction[] array2 = elements;
					for (int j = 0; j < num3; j++)
					{
						array2[index + j] = readOnlyList[j];
					}
				}
				return;
			}
			foreach (Instruction item in collection)
			{
				Instruction instruction = item;
				Insert(index++, in instruction);
			}
		}

		public void RemoveRange(int index, int count)
		{
			if (index < 0)
			{
				ThrowHelper.ThrowArgumentOutOfRangeException_index();
			}
			if (count < 0)
			{
				ThrowHelper.ThrowArgumentOutOfRangeException_count();
			}
			if ((uint)(index + count) > (uint)this.count)
			{
				ThrowHelper.ThrowArgumentOutOfRangeException_count();
			}
			int num = this.count;
			int num2 = (this.count = num - count) - index;
			if (num2 != 0)
			{
				Instruction[] array = elements;
				Array.Copy(array, index + count, array, index, num2);
			}
		}

		[MethodImpl(MethodImplOptions.AggressiveInlining)]
		public void Add(in Instruction instruction)
		{
			int num = count;
			Instruction[] array = elements;
			if (num == array.Length)
			{
				SetMinCapacity(num + 1);
				array = elements;
			}
			array[num] = instruction;
			count = num + 1;
		}

		void ICollection<Instruction>.Add(Instruction instruction)
		{
			Add(in instruction);
		}

		int IList.Add(object value)
		{
			if (value == null)
			{
				ThrowHelper.ThrowArgumentNullException_value();
			}
			if (!(value is Instruction))
			{
				ThrowHelper.ThrowArgumentException();
			}
			Instruction instruction = (Instruction)value;
			Add(in instruction);
			return count - 1;
		}

		public void Clear()
		{
			count = 0;
		}

		void ICollection<Instruction>.Clear()
		{
			Clear();
		}

		void IList.Clear()
		{
			Clear();
		}

		public bool Contains(in Instruction instruction)
		{
			return IndexOf(in instruction) >= 0;
		}

		bool ICollection<Instruction>.Contains(Instruction instruction)
		{
			return Contains(in instruction);
		}

		bool IList.Contains(object value)
		{
			if (value is Instruction instruction)
			{
				return Contains(in instruction);
			}
			return false;
		}

		public int IndexOf(in Instruction instruction)
		{
			Instruction[] array = elements;
			int num = count;
			for (int i = 0; i < num; i++)
			{
				if (array[i] == instruction)
				{
					return i;
				}
			}
			return -1;
		}

		int IList<Instruction>.IndexOf(Instruction instruction)
		{
			return IndexOf(in instruction);
		}

		int IList.IndexOf(object value)
		{
			if (value is Instruction instruction)
			{
				return IndexOf(in instruction);
			}
			return -1;
		}

		public int IndexOf(in Instruction instruction, int index)
		{
			int num = count;
			if ((uint)index > (uint)num)
			{
				ThrowHelper.ThrowArgumentOutOfRangeException_index();
			}
			Instruction[] array = elements;
			for (int i = index; i < num; i++)
			{
				if (array[i] == instruction)
				{
					return i;
				}
			}
			return -1;
		}

		public int IndexOf(in Instruction instruction, int index, int count)
		{
			if (index < 0)
			{
				ThrowHelper.ThrowArgumentOutOfRangeException_index();
			}
			if (count < 0)
			{
				ThrowHelper.ThrowArgumentOutOfRangeException_count();
			}
			int num = index + count;
			if ((uint)num > (uint)this.count)
			{
				ThrowHelper.ThrowArgumentOutOfRangeException_count();
			}
			Instruction[] array = elements;
			for (int i = index; i < num; i++)
			{
				if (array[i] == instruction)
				{
					return i;
				}
			}
			return -1;
		}

		public int LastIndexOf(in Instruction instruction)
		{
			for (int num = count - 1; num >= 0; num--)
			{
				if (elements[num] == instruction)
				{
					return num;
				}
			}
			return -1;
		}

		public int LastIndexOf(in Instruction instruction, int index)
		{
			int num = count;
			if ((uint)index > (uint)num)
			{
				ThrowHelper.ThrowArgumentOutOfRangeException_index();
			}
			Instruction[] array = elements;
			for (int num2 = num - 1; num2 >= index; num2--)
			{
				if (array[num2] == instruction)
				{
					return num2;
				}
			}
			return -1;
		}

		public int LastIndexOf(in Instruction instruction, int index, int count)
		{
			if (index < 0)
			{
				ThrowHelper.ThrowArgumentOutOfRangeException_index();
			}
			if (count < 0)
			{
				ThrowHelper.ThrowArgumentOutOfRangeException_count();
			}
			int num = index + count;
			if ((uint)num > (uint)this.count)
			{
				ThrowHelper.ThrowArgumentOutOfRangeException_count();
			}
			Instruction[] array = elements;
			for (int num2 = num - 1; num2 >= index; num2--)
			{
				if (array[num2] == instruction)
				{
					return num2;
				}
			}
			return -1;
		}

		public bool Remove(in Instruction instruction)
		{
			int num = IndexOf(in instruction);
			if (num >= 0)
			{
				RemoveAt(num);
			}
			return num >= 0;
		}

		bool ICollection<Instruction>.Remove(Instruction instruction)
		{
			return Remove(in instruction);
		}

		void IList.Remove(object value)
		{
			if (value is Instruction)
			{
				Instruction instruction = (Instruction)value;
				Remove(in instruction);
			}
		}

		public void CopyTo(Instruction[] array)
		{
			CopyTo(array, 0);
		}

		public void CopyTo(Instruction[] array, int arrayIndex)
		{
			Array.Copy(elements, 0, array, arrayIndex, count);
		}

		void ICollection<Instruction>.CopyTo(Instruction[] array, int arrayIndex)
		{
			CopyTo(array, arrayIndex);
		}

		void ICollection.CopyTo(Array array, int index)
		{
			if (array == null)
			{
				ThrowHelper.ThrowArgumentNullException_array();
			}
			else if (array is Instruction[] array2)
			{
				CopyTo(array2, index);
			}
			else
			{
				ThrowHelper.ThrowArgumentException();
			}
		}

		public void CopyTo(int index, Instruction[] array, int arrayIndex, int count)
		{
			Array.Copy(elements, index, array, arrayIndex, count);
		}

		public InstructionList GetRange(int index, int count)
		{
			if (index < 0)
			{
				ThrowHelper.ThrowArgumentOutOfRangeException_index();
			}
			if (count < 0)
			{
				ThrowHelper.ThrowArgumentOutOfRangeException_count();
			}
			if ((uint)(index + count) > (uint)this.count)
			{
				ThrowHelper.ThrowArgumentOutOfRangeException_count();
			}
			InstructionList instructionList = new InstructionList(count);
			Array.Copy(elements, index, instructionList.elements, 0, count);
			instructionList.count = count;
			return instructionList;
		}

		public Enumerator GetEnumerator()
		{
			return new Enumerator(this);
		}

		IEnumerator<Instruction> IEnumerable<Instruction>.GetEnumerator()
		{
			return new Enumerator(this);
		}

		IEnumerator IEnumerable.GetEnumerator()
		{
			return new Enumerator(this);
		}

		public ReadOnlyCollection<Instruction> AsReadOnly()
		{
			return new ReadOnlyCollection<Instruction>(this);
		}

		public Instruction[] ToArray()
		{
			int num = count;
			if (num == 0)
			{
				return Array2.Empty<Instruction>();
			}
			Instruction[] array = new Instruction[num];
			Array.Copy(elements, 0, array, 0, array.Length);
			return array;
		}
	}
	internal sealed class InstructionListDebugView
	{
		private readonly InstructionList list;

		[DebuggerBrowsable(DebuggerBrowsableState.RootHidden)]
		public Instruction[] Items => list.ToArray();

		public InstructionListDebugView(InstructionList list)
		{
			this.list = list ?? throw new ArgumentNullException("list");
		}
	}
	internal static class InstructionMemorySizes
	{
		internal static ReadOnlySpan<byte> SizesNormal => new byte[4911]
		{
			0, 0, 0, 0, 0, 1, 2, 3, 5, 1,
			2, 3, 5, 0, 0, 0, 0, 0, 0, 0,
			0, 1, 2, 3, 5, 1, 2, 3, 5, 0,
			0, 0, 0, 0, 0, 0, 1, 2, 3, 5,
			1, 2, 3, 5, 0, 0, 0, 0, 0, 0,
			0, 0, 1, 2, 3, 5, 1, 2, 3, 5,
			0, 0, 0, 0, 0, 0, 0, 0, 1, 2,
			3, 5, 1, 2, 3, 5, 0, 0, 0, 0,
			0, 1, 2, 3, 5, 1, 2, 3, 5, 0,
			0, 0, 0, 0, 1, 2, 3, 5, 1, 2,
			3, 5, 0, 0, 0, 0, 0, 1, 2, 3,
			5, 1, 2, 3, 5, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 22, 23, 2, 2, 10, 11,
			11, 0, 0, 0, 10, 11, 12, 0, 0, 0,
			10, 11, 12, 1, 2, 3, 1, 2, 3, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 1, 1, 1,
			1, 1, 1, 1, 1, 2, 3, 5, 2, 3,
			5, 2, 3, 5, 2, 3, 5, 2, 3, 5,
			2, 3, 5, 2, 3, 5, 2, 3, 5, 1,
			1, 1, 1, 1, 1, 1, 1, 2, 3, 5,
			2, 3, 5, 2, 3, 5, 2, 3, 5, 2,
			3, 5, 2, 3, 5, 2, 3, 5, 2, 3,
			5, 1, 2, 3, 5, 1, 2, 3, 5, 1,
			2, 3, 5, 1, 2, 3, 5, 2, 2, 2,
			0, 0, 0, 2, 2, 2, 2, 3, 5, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 1, 2, 3, 5, 1, 2, 3,
			5, 1, 2, 3, 5, 1, 2, 3, 5, 0,
			0, 0, 0, 1, 2, 3, 5, 1, 2, 3,
			5, 1, 2, 3, 5, 0, 0, 0, 0, 1,
			1, 1, 1, 1, 1, 1, 9, 2, 3, 5,
			2, 3, 5, 2, 3, 5, 2, 3, 5, 2,
			3, 5, 2, 3, 5, 2, 3, 5, 10, 11,
			12, 0, 0, 0, 0, 0, 0, 16, 17, 16,
			17, 1, 0, 2, 3, 5, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 1, 1, 1, 1,
			1, 1, 1, 9, 2, 3, 5, 2, 3, 5,
			2, 3, 5, 2, 3, 5, 2, 3, 5, 2,
			3, 5, 2, 3, 5, 10, 11, 12, 1, 1,
			1, 1, 1, 1, 1, 9, 2, 3, 5, 2,
			3, 5, 2, 3, 5, 2, 3, 5, 2, 3,
			5, 2, 3, 5, 2, 3, 5, 10, 11, 12,
			0, 0, 0, 1, 29, 29, 29, 29, 29, 29,
			29, 29, 0, 0, 0, 0, 0, 0, 0, 0,
			29, 29, 29, 34, 35, 2, 34, 34, 35, 35,
			2, 2, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 11, 11, 11, 11, 11, 11, 11,
			11, 0, 0, 0, 0, 0, 11, 11, 11, 11,
			31, 31, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 30,
			30, 30, 30, 30, 30, 30, 30, 0, 0, 0,
			0, 0, 0, 0, 0, 30, 12, 30, 30, 36,
			37, 36, 36, 37, 37, 2, 2, 0, 0, 0,
			0, 0, 0, 10, 10, 10, 10, 10, 10, 10,
			10, 0, 0, 0, 0, 0, 0, 0, 0, 10,
			10, 10, 10, 42, 12, 42, 12, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 1, 1, 1, 9, 1, 9, 1, 9, 2,
			3, 5, 2, 3, 5, 2, 3, 5, 10, 11,
			12, 2, 3, 5, 10, 11, 12, 2, 3, 5,
			10, 11, 12, 0, 0, 0, 0, 0, 0, 1,
			1, 2, 3, 5, 2, 3, 5, 19, 20, 21,
			16, 17, 18, 19, 20, 21, 16, 17, 18, 2,
			3, 5, 2, 2, 2, 2, 2, 2, 2, 2,
			2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
			19, 20, 26, 26, 27, 26, 26, 27, 26, 26,
			27, 26, 26, 27, 2, 2, 2, 5, 2, 2,
			2, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 2, 2, 2, 2, 2, 2, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			2, 3, 5, 1, 1, 1, 0, 1, 2, 3,
			1, 2, 3, 74, 74, 91, 74, 91, 108, 75,
			75, 92, 75, 92, 109, 29, 0, 29, 0, 29,
			30, 0, 30, 0, 30, 74, 74, 91, 74, 91,
			108, 75, 75, 92, 75, 92, 109, 29, 0, 29,
			0, 29, 30, 0, 30, 0, 30, 0, 63, 0,
			63, 0, 63, 30, 30, 30, 74, 74, 91, 74,
			91, 108, 30, 30, 92, 30, 92, 109, 63, 63,
			63, 30, 30, 30, 74, 74, 91, 74, 91, 108,
			75, 75, 92, 75, 92, 109, 74, 74, 91, 74,
			91, 108, 75, 75, 92, 75, 92, 109, 0, 0,
			0, 63, 63, 63, 30, 30, 30, 74, 74, 91,
			74, 91, 108, 63, 63, 63, 30, 30, 30, 2,
			3, 5, 2, 3, 5, 2, 3, 5, 2, 3,
			5, 2, 3, 5, 2, 3, 5, 2, 3, 5,
			2, 3, 5, 1, 1, 1, 1, 0, 24, 25,
			3, 5, 3, 5, 0, 24, 25, 3, 5, 3,
			5, 1, 0, 0, 0, 0, 2, 3, 5, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 74,
			74, 91, 74, 91, 108, 75, 75, 92, 75, 92,
			109, 74, 74, 91, 74, 91, 108, 75, 75, 92,
			75, 92, 109, 61, 61, 11, 12, 11, 12, 11,
			12, 11, 12, 11, 12, 11, 12, 74, 74, 91,
			74, 91, 108, 75, 75, 92, 75, 92, 109, 29,
			30, 63, 75, 29, 29, 29, 29, 29, 29, 30,
			30, 30, 30, 30, 30, 63, 75, 29, 29, 29,
			29, 29, 29, 30, 30, 30, 30, 30, 30, 29,
			29, 29, 30, 30, 30, 29, 30, 29, 30, 29,
			30, 0, 0, 0, 0, 0, 0, 0, 0, 2,
			3, 5, 2, 3, 5, 2, 3, 5, 2, 3,
			5, 2, 3, 5, 2, 3, 5, 2, 3, 5,
			2, 3, 5, 2, 3, 5, 2, 3, 5, 2,
			3, 5, 2, 3, 5, 2, 3, 5, 2, 3,
			5, 2, 3, 5, 2, 3, 5, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			74, 74, 91, 74, 91, 108, 75, 75, 92, 75,
			92, 109, 29, 29, 29, 30, 30, 30, 74, 74,
			91, 29, 29, 74, 74, 91, 29, 29, 74, 74,
			91, 74, 91, 108, 75, 75, 92, 75, 92, 109,
			74, 74, 91, 74, 91, 108, 75, 75, 92, 75,
			92, 109, 74, 74, 91, 74, 91, 108, 75, 75,
			92, 75, 92, 109, 74, 74, 91, 74, 91, 108,
			75, 75, 92, 75, 92, 109, 74, 74, 91, 74,
			91, 108, 75, 75, 92, 75, 92, 109, 29, 29,
			29, 30, 30, 30, 74, 74, 91, 74, 91, 108,
			75, 75, 92, 75, 92, 109, 29, 29, 29, 30,
			30, 30, 63, 63, 74, 63, 74, 91, 75, 75,
			92, 75, 92, 109, 29, 29, 29, 30, 30, 30,
			69, 69, 84, 69, 84, 102, 72, 87, 105, 74,
			74, 91, 74, 91, 108, 74, 74, 91, 74, 91,
			108, 74, 74, 91, 74, 91, 108, 75, 75, 92,
			75, 92, 109, 29, 29, 29, 30, 30, 30, 74,
			74, 91, 74, 91, 108, 75, 75, 92, 75, 92,
			109, 29, 29, 29, 30, 30, 30, 74, 74, 91,
			74, 91, 108, 75, 75, 92, 75, 92, 109, 29,
			29, 29, 30, 30, 30, 74, 74, 91, 74, 91,
			108, 75, 75, 92, 75, 92, 109, 29, 29, 29,
			30, 30, 30, 50, 64, 64, 79, 64, 79, 97,
			52, 66, 66, 81, 66, 81, 99, 11, 68, 68,
			83, 68, 83, 101, 59, 67, 67, 82, 67, 82,
			100, 57, 65, 65, 80, 65, 80, 98, 59, 67,
			67, 82, 67, 82, 100, 61, 69, 69, 84, 69,
			84, 102, 59, 67, 67, 82, 67, 82, 100, 56,
			64, 64, 79, 64, 79, 97, 58, 66, 66, 81,
			66, 81, 99, 60, 68, 68, 83, 68, 83, 101,
			61, 69, 69, 84, 69, 84, 102, 71, 71, 86,
			71, 86, 104, 71, 71, 86, 71, 86, 104, 3,
			5, 3, 5, 3, 5, 3, 5, 5, 68, 68,
			83, 68, 83, 101, 71, 86, 104, 68, 68, 83,
			68, 83, 101, 71, 86, 104, 64, 79, 97, 66,
			81, 99, 58, 68, 68, 83, 68, 83, 101, 66,
			66, 81, 66, 81, 99, 66, 66, 81, 66, 81,
			99, 0, 0, 0, 0, 66, 81, 99, 0, 0,
			0, 0, 67, 82, 100, 0, 0, 0, 0, 66,
			81, 99, 68, 83, 101, 71, 86, 104, 68, 83,
			101, 71, 86, 104, 0, 0, 0, 0, 68, 83,
			101, 0, 0, 0, 0, 69, 84, 102, 72, 87,
			105, 0, 0, 0, 0, 68, 83, 101, 0, 0,
			0, 0, 71, 86, 104, 0, 0, 0, 6, 88,
			106, 0, 0, 0, 0, 71, 86, 104, 0, 0,
			0, 6, 88, 106, 56, 64, 64, 79, 64, 79,
			97, 58, 66, 66, 81, 66, 81, 99, 60, 68,
			68, 83, 68, 83, 101, 0, 0, 0, 3, 5,
			74, 91, 108, 75, 92, 109, 0, 63, 74, 91,
			75, 92, 109, 29, 29, 0, 30, 30, 3, 5,
			74, 91, 108, 75, 92, 109, 0, 63, 74, 91,
			75, 92, 109, 29, 29, 0, 30, 30, 63, 74,
			91, 75, 92, 109, 60, 68, 83, 71, 86, 104,
			68, 83, 101, 71, 86, 104, 63, 74, 91, 75,
			92, 109, 3, 5, 3, 5, 75, 75, 92, 74,
			74, 91, 75, 75, 92, 74, 74, 91, 3, 5,
			3, 5, 3, 5, 3, 5, 5, 5, 5, 5,
			68, 68, 83, 68, 83, 101, 71, 86, 104, 68,
			68, 83, 68, 83, 101, 71, 86, 104, 64, 79,
			97, 66, 81, 99, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 1, 1, 1, 1, 1, 1, 1, 1,
			1, 1, 1, 1, 1, 1, 1, 1, 2, 5,
			1, 3, 2, 5, 1, 3, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 2,
			3, 5, 2, 3, 5, 2, 3, 5, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 2, 3, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 2, 3, 1,
			2, 3, 0, 0, 0, 0, 0, 0, 0, 2,
			3, 5, 2, 3, 5, 2, 3, 5, 38, 39,
			0, 0, 38, 39, 0, 0, 3, 0, 0, 3,
			3, 0, 0, 3, 40, 41, 3, 5, 40, 41,
			0, 0, 40, 41, 1, 0, 0, 5, 0, 0,
			0, 0, 0, 1, 1, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			10, 11, 12, 1, 2, 3, 5, 16, 17, 18,
			2, 3, 5, 16, 17, 18, 16, 17, 18, 1,
			1, 1, 2, 2, 2, 0, 0, 2, 3, 5,
			2, 3, 5, 2, 3, 5, 2, 3, 5, 2,
			3, 5, 2, 3, 5, 2, 3, 5, 2, 3,
			5, 2, 3, 5, 2, 3, 5, 2, 3, 5,
			9, 9, 9, 10, 10, 10, 1, 2, 3, 5,
			74, 74, 91, 74, 91, 108, 75, 75, 92, 75,
			92, 109, 29, 29, 29, 30, 30, 30, 3, 5,
			2, 2, 2, 2, 2, 2, 2, 2, 0, 0,
			0, 0, 0, 0, 0, 0, 74, 74, 91, 74,
			91, 108, 75, 75, 92, 75, 92, 109, 5, 6,
			40, 41, 40, 41, 40, 41, 5, 5, 5, 0,
			0, 0, 5, 0, 0, 0, 0, 0, 0, 0,
			0, 75, 75, 92, 74, 74, 91, 58, 66, 66,
			66, 66, 66, 66, 60, 68, 68, 68, 68, 68,
			68, 5, 71, 71, 71, 71, 71, 71, 5, 71,
			71, 86, 71, 86, 104, 59, 67, 67, 82, 67,
			82, 100, 5, 5, 5, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 56, 64, 64, 79, 64,
			79, 97, 58, 66, 66, 81, 66, 81, 99, 56,
			64, 64, 79, 64, 79, 97, 5, 6, 6, 88,
			68, 83, 101, 71, 86, 104, 56, 64, 64, 79,
			64, 79, 97, 58, 66, 66, 81, 66, 81, 99,
			56, 64, 64, 79, 64, 79, 97, 5, 6, 6,
			88, 68, 83, 101, 71, 86, 104, 56, 64, 64,
			79, 64, 79, 97, 59, 67, 67, 67, 67, 67,
			67, 61, 69, 69, 69, 69, 69, 69, 72, 72,
			72, 58, 66, 66, 81, 66, 81, 99, 58, 66,
			66, 81, 66, 81, 99, 59, 67, 67, 82, 67,
			82, 100, 75, 75, 92, 75, 92, 109, 61, 61,
			69, 61, 69, 84, 72, 87, 105, 75, 75, 92,
			75, 92, 109, 60, 68, 68, 83, 68, 83, 101,
			57, 65, 65, 80, 65, 80, 98, 59, 67, 67,
			82, 67, 82, 100, 59, 67, 67, 82, 67, 82,
			100, 5, 6, 6, 88, 68, 83, 101, 71, 86,
			104, 57, 65, 65, 80, 65, 80, 98, 59, 67,
			67, 82, 67, 82, 100, 59, 67, 67, 82, 67,
			82, 100, 5, 6, 6, 88, 68, 83, 101, 71,
			86, 104, 6, 6, 7, 58, 66, 66, 66, 66,
			66, 66, 60, 68, 68, 68, 68, 68, 68, 5,
			71, 71, 71, 71, 71, 71, 60, 68, 68, 83,
			68, 83, 101, 59, 67, 67, 82, 67, 82, 100,
			56, 64, 64, 79, 64, 79, 97, 5, 6, 6,
			56, 64, 64, 79, 64, 79, 97, 58, 66, 66,
			81, 66, 81, 99, 60, 68, 68, 83, 68, 83,
			101, 12, 71, 71, 86, 71, 86, 104, 56, 64,
			64, 79, 64, 79, 97, 58, 66, 66, 81, 66,
			81, 99, 60, 68, 68, 83, 68, 83, 101, 2,
			3, 5, 56, 64, 64, 79, 64, 79, 97, 58,
			66, 66, 81, 60, 68, 68, 83, 59, 67, 67,
			82, 57, 65, 65, 80, 65, 80, 98, 58, 66,
			66, 81, 60, 68, 68, 83, 59, 67, 67, 82,
			57, 65, 65, 80, 59, 67, 67, 82, 61, 69,
			69, 84, 59, 67, 67, 82, 67, 82, 100, 74,
			91, 74, 91, 108, 75, 92, 75, 92, 109, 74,
			91, 75, 92, 64, 66, 81, 99, 56, 64, 79,
			66, 81, 99, 50, 56, 64, 66, 81, 99, 48,
			50, 56, 62, 73, 62, 73, 90, 58, 66, 81,
			74, 68, 83, 101, 71, 86, 104, 52, 58, 66,
			75, 68, 83, 101, 71, 86, 104, 60, 68, 83,
			91, 91, 108, 92, 109, 6, 6, 7, 29, 29,
			29, 29, 29, 30, 63, 63, 30, 30, 32, 74,
			74, 75, 75, 91, 92, 57, 65, 65, 80, 65,
			80, 98, 59, 67, 67, 82, 67, 82, 100, 61,
			69, 69, 84, 69, 84, 102, 72, 87, 105, 57,
			57, 65, 57, 65, 80, 57, 65, 80, 51, 51,
			57, 51, 57, 65, 51, 57, 65, 49, 49, 51,
			49, 51, 57, 49, 51, 57, 59, 59, 67, 59,
			67, 82, 59, 67, 82, 53, 53, 59, 53, 59,
			67, 53, 59, 67, 61, 61, 69, 61, 69, 84,
			61, 69, 84, 64, 79, 97, 66, 81, 99, 64,
			79, 97, 66, 81, 99, 68, 83, 101, 71, 86,
			104, 68, 83, 101, 71, 86, 104, 69, 69, 84,
			69, 84, 102, 0, 0, 0, 0, 0, 0, 71,
			71, 86, 71, 86, 104, 0, 0, 0, 0, 0,
			0, 6, 6, 7, 6, 7, 8, 0, 0, 0,
			69, 69, 84, 69, 84, 102, 74, 91, 74, 91,
			108, 75, 92, 109, 75, 92, 29, 30, 74, 91,
			75, 92, 56, 56, 64, 56, 64, 79, 56, 64,
			79, 50, 50, 56, 50, 56, 64, 50, 56, 64,
			48, 48, 50, 48, 50, 56, 48, 50, 56, 58,
			58, 66, 58, 66, 81, 58, 66, 81, 52, 52,
			58, 52, 58, 66, 52, 58, 66, 60, 60, 68,
			60, 68, 83, 60, 68, 83, 83, 83, 101, 86,
			104, 72, 72, 87, 72, 87, 105, 65, 65, 80,
			65, 80, 98, 0, 0, 0, 0, 0, 0, 69,
			69, 84, 69, 84, 102, 72, 87, 105, 0, 0,
			0, 0, 0, 0, 66, 66, 81, 66, 81, 99,
			0, 0, 0, 68, 68, 83, 68, 83, 101, 71,
			86, 104, 65, 65, 80, 65, 80, 98, 69, 69,
			84, 69, 84, 102, 72, 87, 105, 66, 66, 81,
			66, 81, 99, 68, 68, 83, 68, 83, 101, 71,
			86, 104, 69, 69, 84, 69, 84, 102, 72, 87,
			105, 66, 66, 74, 91, 108, 75, 92, 109, 29,
			30, 68, 83, 101, 71, 86, 104, 68, 83, 71,
			86, 68, 83, 101, 71, 86, 104, 68, 83, 68,
			83, 101, 71, 86, 104, 68, 83, 71, 86, 68,
			83, 101, 71, 86, 104, 74, 91, 108, 75, 92,
			109, 29, 30, 74, 91, 108, 75, 92, 109, 29,
			30, 65, 80, 98, 65, 80, 98, 67, 82, 100,
			78, 96, 111, 67, 67, 82, 100, 67, 64, 79,
			97, 66, 81, 99, 68, 83, 101, 71, 86, 104,
			11, 11, 11, 11, 11, 12, 12, 60, 60, 60,
			12, 12, 12, 13, 68, 68, 71, 71, 83, 86,
			64, 79, 97, 66, 81, 99, 64, 79, 97, 66,
			81, 99, 68, 83, 101, 71, 86, 104, 74, 91,
			108, 75, 92, 109, 64, 79, 97, 66, 81, 99,
			68, 83, 101, 71, 86, 104, 66, 81, 99, 68,
			83, 101, 71, 86, 104, 66, 81, 99, 74, 91,
			108, 74, 91, 108, 68, 83, 101, 71, 86, 104,
			64, 79, 97, 66, 81, 99, 68, 83, 101, 71,
			86, 104, 74, 91, 108, 75, 92, 109, 9, 9,
			9, 9, 9, 10, 10, 10, 10, 10, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			64, 79, 97, 66, 81, 99, 68, 83, 101, 71,
			86, 104, 74, 91, 108, 75, 92, 109, 6, 6,
			6, 6, 6, 6, 71, 86, 104, 74, 91, 108,
			75, 92, 109, 68, 83, 101, 71, 86, 104, 74,
			91, 108, 75, 92, 109, 68, 83, 101, 71, 86,
			104, 68, 83, 71, 86, 64, 79, 97, 66, 81,
			99, 68, 83, 71, 86, 64, 79, 97, 11, 11,
			12, 12, 11, 11, 11, 12, 12, 12, 11, 11,
			12, 12, 11, 11, 11, 12, 12, 12, 29, 29,
			30, 30, 29, 29, 29, 30, 30, 30, 29, 29,
			30, 30, 29, 29, 29, 30, 30, 30, 74, 91,
			75, 92, 74, 91, 108, 75, 92, 109, 74, 91,
			75, 92, 74, 91, 108, 75, 92, 109, 74, 91,
			75, 92, 74, 91, 108, 75, 92, 109, 29, 30,
			29, 30, 74, 91, 75, 92, 74, 91, 108, 75,
			92, 109, 74, 29, 30, 29, 30, 74, 74, 91,
			75, 92, 74, 91, 108, 75, 92, 109, 29, 30,
			29, 30, 74, 91, 75, 92, 74, 91, 108, 75,
			92, 109, 29, 30, 29, 30, 11, 11, 11, 12,
			12, 12, 11, 11, 11, 12, 12, 12, 29, 29,
			29, 30, 30, 30, 29, 29, 29, 30, 30, 30,
			74, 91, 75, 92, 74, 91, 108, 75, 92, 109,
			74, 91, 75, 92, 74, 91, 108, 75, 92, 109,
			74, 91, 75, 92, 74, 91, 108, 75, 92, 109,
			29, 30, 29, 30, 74, 91, 75, 92, 74, 91,
			108, 75, 92, 109, 74, 29, 30, 29, 30, 74,
			74, 91, 75, 92, 74, 91, 108, 75, 92, 109,
			29, 30, 29, 30, 74, 91, 75, 92, 74, 91,
			108, 75, 92, 109, 29, 30, 29, 30, 70, 85,
			103, 70, 85, 103, 74, 91, 75, 92, 74, 91,
			108, 75, 92, 109, 74, 91, 75, 92, 74, 91,
			108, 75, 92, 109, 74, 91, 75, 92, 74, 91,
			108, 75, 92, 109, 29, 30, 29, 30, 74, 91,
			75, 92, 74, 91, 108, 75, 92, 109, 29, 30,
			29, 30, 74, 91, 75, 92, 74, 91, 108, 75,
			92, 109, 29, 30, 29, 30, 74, 91, 75, 92,
			74, 91, 108, 75, 92, 109, 29, 30, 29, 30,
			68, 83, 101, 71, 86, 104, 29, 30, 29, 30,
			29, 30, 29, 30, 29, 30, 29, 30, 29, 30,
			29, 30, 68, 108, 109, 68, 68, 108, 109, 68,
			29, 30, 68, 108, 109, 68, 29, 30, 64, 64,
			79, 64, 79, 97, 6, 6, 6, 6, 88, 6,
			88, 106, 6, 6, 88, 6, 88, 106, 6, 6,
			88, 6, 88, 106, 6, 6, 88, 6, 88, 106,
			2, 3, 5, 1, 1, 2, 3, 5, 2, 3,
			5, 3, 5, 3, 5, 3, 5, 3, 5, 3,
			5, 3, 5, 3, 5, 3, 5, 3, 5, 3,
			5, 3, 5, 3, 5, 3, 5, 3, 5, 11,
			12, 3, 5, 8, 8, 8, 8, 8, 8, 8,
			8, 8, 3, 5, 86, 86, 104, 92, 92, 109,
			68, 83, 68, 83, 101, 71, 86, 104, 74, 91,
			74, 91, 108, 75, 92, 75, 92, 109, 93, 74,
			74, 91, 74, 91, 108, 75, 75, 92, 75, 92,
			109, 29, 29, 29, 30, 30, 30, 74, 74, 91,
			75, 75, 92, 66, 66, 81, 56, 64, 64, 79,
			64, 79, 97, 1, 1, 1, 1, 1, 1, 2,
			2, 2, 2, 2, 2, 3, 5, 3, 5, 3,
			5, 29, 29, 29, 29, 29, 29, 32, 74, 74,
			75, 75, 32, 74, 74, 75, 75, 91, 92, 91,
			92, 62, 73, 62, 73, 90, 68, 83, 101, 71,
			86, 104, 69, 84, 102, 72, 87, 105, 1, 1,
			1, 1, 1, 1, 29, 29, 29, 3, 5, 3,
			5, 3, 5, 91, 108, 92, 109, 68, 83, 101,
			71, 86, 104, 74, 91, 108, 75, 92, 109, 29,
			30, 0, 0, 0, 0, 0, 0, 0, 0, 13,
			68, 68, 71, 71, 13, 68, 68, 71, 71, 83,
			86, 83, 86, 64, 79, 97, 66, 81, 99, 65,
			80, 98, 67, 82, 100, 74, 74, 91, 75, 75,
			64, 64, 79, 64, 79, 97, 83, 101, 86, 104,
			71, 71, 86, 71, 86, 104, 88, 74, 91, 74,
			91, 75, 92, 75, 92, 74, 91, 75, 92, 64,
			79, 74, 91, 108, 75, 92, 109, 29, 30, 74,
			91, 108, 75, 92, 109, 29, 30, 74, 91, 108,
			75, 92, 109, 29, 30, 74, 91, 74, 91, 75,
			92, 75, 92, 74, 91, 74, 91, 75, 92, 75,
			92, 64, 64, 64, 64, 64, 64, 64, 64, 64,
			64, 64, 64, 74, 91, 108, 75, 92, 109, 29,
			30, 74, 91, 74, 91, 75, 92, 75, 92, 29,
			29, 30, 30, 74, 91, 74, 91, 75, 92, 75,
			92, 29, 29, 30, 30, 66, 81, 99, 68, 83,
			101, 71, 86, 104, 66, 81, 99, 68, 83, 101,
			71, 86, 104, 74, 91, 74, 91, 75, 92, 75,
			92, 29, 29, 30, 30, 74, 91, 74, 91, 75,
			92, 75, 92, 29, 29, 30, 30, 68, 64, 64,
			79, 64, 79, 97, 64, 64, 79, 64, 79, 97,
			6, 6, 3, 5, 67, 67, 69, 69, 69, 67,
			67, 69, 69, 69, 6, 7, 6, 7, 64, 64,
			67, 67, 64, 66, 68, 71, 65, 67, 69, 72,
			64, 66, 68, 71, 3, 5, 3, 5, 3, 5,
			3, 5, 3, 5, 3, 5, 3, 5, 3, 5,
			3, 5, 0, 0, 0, 0, 74, 91, 75, 92,
			29, 30, 64, 64, 66, 66, 68, 68, 71, 71,
			64, 64, 66, 66, 68, 68, 71, 71, 65, 65,
			67, 67, 69, 69, 72, 72, 65, 65, 65, 67,
			67, 69, 64, 64, 64, 66, 66, 68, 65, 67,
			69, 3, 5, 3, 3, 3, 3, 59, 61, 63,
			63, 63, 63, 63, 63, 63, 63, 63, 63, 63,
			63, 63, 63, 63, 63, 63, 63, 63, 63, 63,
			59, 60, 56, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 1, 1, 1, 1,
			1, 0, 0, 0, 43, 0, 43, 0, 44, 44,
			44, 0, 0, 0, 0, 0, 0, 0, 3, 3,
			0, 0, 0, 45, 45, 45, 45, 45, 45, 0,
			0, 0, 0, 0, 0, 56, 59, 58, 56, 59,
			56, 59, 56, 57, 57, 59, 58, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 46, 46, 47, 47, 0, 46, 46,
			47, 47, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 65, 80, 65, 80, 67, 82,
			67, 82, 0, 0, 0, 0, 0, 0, 2, 2,
			2, 0, 0, 73, 90, 107, 28, 73, 90, 107,
			28, 28, 69, 84, 102, 75, 92, 109, 62, 73,
			90, 54, 62, 73, 62, 73, 90, 54, 62, 73,
			62, 73, 90, 54, 62, 73, 73, 90, 107, 73,
			90, 107, 74, 91, 108, 72, 87, 105, 30, 28,
			28, 28, 28, 28, 28, 11, 12, 29, 62, 73,
			90, 54, 62, 73, 62, 73, 90, 54, 62, 73,
			73, 90, 107, 73, 90, 107, 28, 28, 28, 28,
			68, 83, 101, 71, 86, 104, 3, 5, 66, 81,
			99, 67, 82, 100, 73, 90, 107, 28, 77, 95,
			110, 77, 95, 110, 54, 54, 77, 95, 110, 77,
			95, 110, 54, 54, 73, 90, 107, 73, 90, 107,
			73, 90, 107, 73, 90, 107, 73, 90, 107, 73,
			90, 107, 73, 90, 107, 73, 90, 107, 73, 90,
			107, 73, 90, 107, 73, 90, 107, 73, 90, 107,
			28, 28, 28, 28, 28, 28, 73, 90, 107, 73,
			90, 107, 73, 90, 107, 73, 90, 107, 73, 90,
			107, 73, 90, 107, 28, 28, 28, 28, 28, 28,
			73, 90, 107, 28, 73, 90, 107, 28, 73, 90,
			107, 28, 73, 90, 107, 28, 73, 90, 107, 28,
			28, 28, 0, 0, 2, 2, 2, 2, 73, 90,
			107, 28, 73, 90, 107, 28, 73, 90, 107, 28,
			73, 90, 107, 28, 73, 90, 107, 28, 73, 90,
			107, 28, 73, 90, 107, 28, 73, 90, 107, 28,
			28, 0, 0, 0, 0, 1, 1, 1, 1, 1,
			1, 1, 1, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 1, 1, 0, 0, 0, 0,
			0, 0, 0, 0, 3, 5, 3, 5, 3, 5,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 1, 1,
			3, 5, 3, 5, 3, 5, 3, 5, 64, 79,
			65, 80, 65, 80, 64, 79, 65, 80, 65, 80,
			0, 74, 91, 73, 90, 73, 90, 76, 94, 76,
			94, 28, 28, 33, 33, 70, 85, 70, 85, 3,
			5, 3, 5, 3, 5, 3, 5, 3, 5, 3,
			5, 3, 5, 3, 5, 3, 5, 3, 5, 3,
			5, 3, 5, 3, 5, 3, 5, 3, 5, 3,
			5
		};

		internal static ReadOnlySpan<byte> SizesBcst => new byte[4911]
		{
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 125, 140, 155,
			0, 0, 0, 126, 141, 156, 0, 0, 0, 125,
			140, 155, 0, 0, 0, 126, 141, 156, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 125, 140, 155, 0, 0, 0, 126,
			141, 156, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 125, 140, 155, 0, 0, 0, 126, 141, 156,
			0, 0, 0, 125, 140, 155, 0, 0, 0, 126,
			141, 156, 0, 0, 0, 125, 140, 155, 0, 0,
			0, 126, 141, 156, 0, 0, 0, 125, 140, 155,
			0, 0, 0, 126, 141, 156, 0, 0, 0, 125,
			140, 155, 0, 0, 0, 126, 141, 156, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 125, 140, 155,
			0, 0, 0, 126, 141, 156, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 116, 125, 140, 0, 0,
			0, 126, 141, 156, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 120, 135, 150, 123, 138, 153, 0,
			0, 0, 125, 140, 155, 0, 0, 0, 125, 140,
			155, 0, 0, 0, 125, 140, 155, 0, 0, 0,
			126, 141, 156, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 125, 140, 155, 0, 0, 0, 126, 141,
			156, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			125, 140, 155, 0, 0, 0, 126, 141, 156, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 125, 140,
			155, 0, 0, 0, 126, 141, 156, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 119, 134, 149, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 120,
			135, 150, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 119, 134, 149,
			0, 0, 0, 0, 120, 135, 150, 0, 0, 0,
			122, 137, 152, 0, 0, 0, 122, 137, 152, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 119, 134, 149, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 119, 134, 149, 122, 137, 152, 119, 134,
			149, 122, 137, 152, 0, 0, 0, 0, 119, 134,
			149, 0, 0, 0, 0, 120, 135, 150, 123, 138,
			153, 0, 0, 0, 0, 119, 134, 149, 0, 0,
			0, 0, 122, 137, 152, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 122, 137, 152, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 119, 134, 149, 0, 0, 0, 0, 0,
			125, 140, 155, 126, 141, 156, 0, 116, 125, 140,
			126, 141, 156, 0, 0, 0, 0, 0, 0, 0,
			125, 140, 155, 126, 141, 156, 0, 116, 125, 140,
			126, 141, 156, 0, 0, 0, 0, 0, 116, 125,
			140, 126, 141, 156, 113, 119, 134, 122, 137, 152,
			119, 134, 149, 122, 137, 152, 116, 125, 140, 126,
			141, 156, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 125, 140, 155, 0, 0, 0, 126,
			141, 156, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 125,
			140, 155, 0, 0, 0, 126, 141, 156, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 122, 137, 152, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			119, 134, 149, 122, 137, 152, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 119, 134, 149, 122, 137, 152, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 126, 141, 156, 0, 0,
			0, 114, 120, 135, 123, 138, 153, 0, 0, 0,
			126, 141, 156, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 119, 134, 149, 122, 137,
			152, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 119, 134, 149, 122,
			137, 152, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			129, 144, 159, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 119, 134,
			149, 0, 0, 0, 0, 122, 137, 152, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 119, 134, 149, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 125, 140, 155, 0, 0, 126, 141, 156, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 119, 134, 149, 122, 137, 152, 0, 0, 0,
			0, 119, 134, 149, 122, 137, 152, 0, 0, 0,
			0, 140, 155, 141, 156, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 120, 135, 150, 123, 138, 153, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 119, 134, 149, 122, 137,
			152, 119, 134, 149, 122, 137, 152, 0, 0, 0,
			128, 143, 160, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 122, 137, 152, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 120, 135, 150, 0, 0, 125, 140,
			155, 126, 141, 156, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 134, 149, 137,
			152, 0, 0, 0, 123, 138, 153, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 120, 135, 150, 123, 138, 153, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 119, 134, 149, 122,
			137, 152, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 120, 135, 150, 123, 138, 153, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 119, 134, 149, 122,
			137, 152, 0, 0, 0, 120, 135, 150, 123, 138,
			153, 0, 0, 125, 140, 155, 126, 141, 156, 0,
			0, 119, 134, 149, 122, 137, 152, 0, 0, 0,
			0, 119, 134, 149, 122, 137, 152, 0, 0, 119,
			134, 149, 122, 137, 152, 0, 0, 0, 0, 119,
			134, 149, 122, 137, 152, 125, 140, 155, 126, 141,
			156, 0, 0, 125, 140, 155, 126, 141, 156, 0,
			0, 119, 134, 149, 119, 134, 149, 127, 142, 158,
			131, 146, 161, 0, 127, 142, 158, 0, 0, 0,
			0, 0, 0, 0, 119, 134, 149, 122, 137, 152,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 119, 134, 149, 122, 137, 152, 125, 140,
			155, 126, 141, 156, 0, 0, 0, 0, 0, 0,
			119, 134, 149, 122, 137, 152, 0, 0, 0, 119,
			134, 149, 122, 137, 152, 0, 0, 0, 125, 140,
			155, 125, 140, 155, 119, 134, 149, 122, 137, 152,
			0, 0, 0, 0, 0, 0, 119, 134, 149, 122,
			137, 152, 125, 140, 155, 126, 141, 156, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 119, 134, 149, 122,
			137, 152, 125, 140, 155, 126, 141, 156, 0, 0,
			0, 0, 0, 0, 122, 137, 152, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 125, 140, 155, 126, 141, 156, 0, 0,
			0, 0, 125, 140, 155, 126, 141, 156, 0, 0,
			0, 0, 125, 140, 155, 126, 141, 156, 0, 0,
			0, 0, 0, 0, 0, 0, 125, 140, 155, 126,
			141, 156, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 125, 140, 155, 126, 141, 156, 0, 0,
			0, 0, 0, 0, 0, 0, 125, 140, 155, 126,
			141, 156, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 125, 140, 155, 126, 141, 156,
			0, 0, 0, 0, 125, 140, 155, 126, 141, 156,
			0, 0, 0, 0, 125, 140, 155, 126, 141, 156,
			0, 0, 0, 0, 0, 0, 0, 0, 125, 140,
			155, 126, 141, 156, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 125, 140, 155, 126, 141, 156,
			0, 0, 0, 0, 0, 0, 0, 0, 125, 140,
			155, 126, 141, 156, 0, 0, 0, 0, 121, 136,
			151, 121, 136, 151, 0, 0, 0, 0, 125, 140,
			155, 126, 141, 156, 0, 0, 0, 0, 125, 140,
			155, 126, 141, 156, 0, 0, 0, 0, 125, 140,
			155, 126, 141, 156, 0, 0, 0, 0, 0, 0,
			0, 0, 125, 140, 155, 126, 141, 156, 0, 0,
			0, 0, 0, 0, 0, 0, 125, 140, 155, 126,
			141, 156, 0, 0, 0, 0, 0, 0, 0, 0,
			125, 140, 155, 126, 141, 156, 0, 0, 0, 0,
			119, 134, 149, 122, 137, 152, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 155, 156, 0, 0, 155, 156, 0,
			0, 0, 0, 155, 156, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 137, 152, 0, 141, 156,
			0, 0, 119, 134, 149, 122, 137, 152, 0, 0,
			125, 140, 155, 0, 0, 126, 141, 156, 0, 0,
			0, 0, 125, 140, 155, 0, 0, 0, 126, 141,
			156, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 119, 134, 149, 122,
			137, 152, 120, 135, 150, 123, 138, 153, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 140, 155, 141, 156, 119, 134, 149,
			122, 137, 152, 125, 140, 155, 126, 141, 156, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 134, 149, 137, 152,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 125, 140, 155, 126, 141, 156, 0, 0, 125,
			140, 155, 126, 141, 156, 0, 0, 125, 140, 155,
			126, 141, 156, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 125, 140, 155, 126, 141, 156, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 119, 134,
			149, 122, 137, 152, 0, 0, 0, 119, 134, 149,
			122, 137, 152, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 122, 137, 152, 0, 0, 0, 122, 137, 152,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 124, 139, 154, 0, 124, 139, 154,
			0, 0, 120, 135, 150, 126, 141, 156, 115, 124,
			139, 112, 115, 124, 115, 124, 139, 112, 115, 124,
			115, 124, 139, 112, 115, 124, 124, 139, 154, 124,
			139, 154, 125, 140, 155, 123, 138, 153, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 115, 124,
			139, 112, 115, 124, 115, 124, 139, 112, 115, 124,
			124, 139, 154, 124, 139, 154, 0, 0, 0, 0,
			119, 134, 149, 122, 137, 152, 0, 0, 118, 133,
			148, 117, 132, 147, 124, 139, 154, 0, 130, 145,
			157, 130, 145, 157, 0, 0, 130, 145, 157, 130,
			145, 157, 0, 0, 124, 139, 154, 124, 139, 154,
			124, 139, 154, 124, 139, 154, 124, 139, 154, 124,
			139, 154, 124, 139, 154, 124, 139, 154, 124, 139,
			154, 124, 139, 154, 124, 139, 154, 124, 139, 154,
			0, 0, 0, 0, 0, 0, 124, 139, 154, 124,
			139, 154, 124, 139, 154, 124, 139, 154, 124, 139,
			154, 124, 139, 154, 0, 0, 0, 0, 0, 0,
			124, 139, 154, 0, 124, 139, 154, 0, 124, 139,
			154, 0, 124, 139, 154, 0, 124, 139, 154, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 124, 139,
			154, 0, 124, 139, 154, 0, 124, 139, 154, 0,
			124, 139, 154, 0, 124, 139, 154, 0, 124, 139,
			154, 0, 124, 139, 154, 0, 124, 139, 154, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0
		};
	}
	internal static class InstructionOpCounts
	{
		internal static ReadOnlySpan<byte> OpCount => new byte[4911]
		{
			0, 0, 0, 0, 0, 2, 2, 2, 2, 2,
			2, 2, 2, 2, 2, 2, 2, 1, 1, 1,
			1, 2, 2, 2, 2, 2, 2, 2, 2, 2,
			2, 2, 2, 1, 1, 1, 2, 2, 2, 2,
			2, 2, 2, 2, 2, 2, 2, 2, 1, 1,
			1, 1, 2, 2, 2, 2, 2, 2, 2, 2,
			2, 2, 2, 2, 1, 1, 1, 1, 2, 2,
			2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
			0, 2, 2, 2, 2, 2, 2, 2, 2, 2,
			2, 2, 2, 0, 2, 2, 2, 2, 2, 2,
			2, 2, 2, 2, 2, 2, 0, 2, 2, 2,
			2, 2, 2, 2, 2, 2, 2, 2, 2, 0,
			1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
			0, 0, 0, 0, 2, 2, 2, 2, 2, 2,
			2, 1, 1, 1, 3, 3, 3, 1, 1, 1,
			3, 3, 3, 2, 2, 2, 2, 2, 2, 1,
			1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
			1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
			1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
			1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
			1, 1, 1, 1, 1, 1, 1, 2, 2, 2,
			2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
			2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
			2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
			2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
			2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
			2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
			2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
			2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
			2, 2, 2, 2, 2, 2, 1, 1, 1, 0,
			0, 0, 2, 2, 2, 0, 0, 0, 0, 0,
			0, 0, 1, 1, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 2, 2, 2, 2, 2, 2, 2,
			2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
			2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
			2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
			2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
			2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
			2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
			2, 1, 1, 1, 0, 0, 0, 2, 2, 2,
			2, 2, 1, 2, 2, 2, 1, 1, 2, 2,
			2, 0, 0, 0, 1, 1, 1, 0, 0, 0,
			0, 1, 0, 0, 0, 0, 2, 2, 2, 2,
			2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
			2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
			2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
			2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
			2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
			2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
			1, 1, 0, 1, 1, 1, 1, 1, 1, 1,
			1, 1, 2, 2, 2, 2, 2, 2, 2, 2,
			1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
			1, 1, 1, 2, 0, 1, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 1, 1, 1, 1, 1, 1, 1,
			1, 2, 2, 2, 2, 0, 1, 1, 1, 1,
			1, 1, 2, 2, 2, 2, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 2, 2, 1,
			1, 1, 1, 1, 1, 1, 1, 2, 2, 2,
			2, 2, 2, 2, 2, 1, 1, 1, 1, 1,
			1, 1, 1, 1, 1, 1, 1, 1, 2, 1,
			1, 2, 2, 1, 1, 1, 1, 1, 1, 1,
			1, 2, 2, 2, 0, 2, 2, 2, 2, 1,
			1, 1, 1, 1, 1, 1, 1, 1, 2, 1,
			1, 1, 1, 1, 1, 2, 2, 1, 1, 1,
			1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
			1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
			1, 1, 1, 1, 1, 2, 2, 2, 2, 2,
			2, 1, 1, 1, 1, 1, 1, 1, 1, 1,
			1, 1, 2, 2, 2, 2, 2, 2, 0, 0,
			0, 2, 2, 1, 1, 1, 1, 1, 1, 2,
			2, 2, 2, 2, 2, 1, 1, 1, 1, 1,
			1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
			1, 1, 1, 0, 0, 0, 0, 0, 0, 1,
			1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
			1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
			1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
			1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
			1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
			1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
			1, 1, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 2, 2, 2, 2, 2, 2, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			2, 2, 2, 1, 1, 1, 0, 2, 2, 2,
			2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
			2, 2, 2, 2, 2, 2, 3, 2, 3, 2,
			2, 3, 2, 3, 2, 2, 2, 2, 2, 2,
			2, 2, 2, 2, 2, 2, 2, 2, 3, 2,
			3, 2, 2, 3, 2, 3, 2, 2, 2, 3,
			3, 3, 3, 2, 3, 3, 2, 2, 2, 2,
			2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
			2, 2, 2, 2, 2, 3, 3, 3, 3, 3,
			2, 3, 3, 3, 3, 3, 2, 3, 3, 3,
			3, 3, 2, 3, 3, 3, 3, 3, 2, 3,
			3, 2, 3, 3, 2, 3, 3, 2, 2, 2,
			2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
			2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
			2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
			2, 2, 2, 1, 1, 1, 1, 2, 2, 2,
			2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
			2, 1, 1, 1, 0, 0, 1, 1, 1, 2,
			2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
			2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
			2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
			2, 2, 2, 2, 2, 2, 2, 3, 3, 3,
			3, 2, 2, 3, 3, 3, 3, 2, 2, 2,
			2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
			2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
			2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
			2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
			2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
			2, 0, 0, 0, 0, 0, 0, 0, 0, 2,
			2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
			2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
			2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
			2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
			2, 2, 2, 2, 2, 2, 2, 3, 3, 3,
			3, 3, 3, 3, 3, 2, 2, 2, 2, 3,
			3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
			3, 3, 3, 3, 3, 3, 3, 3, 2, 2,
			2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
			2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
			2, 2, 2, 3, 3, 2, 3, 3, 2, 2,
			2, 2, 3, 2, 2, 2, 2, 3, 2, 3,
			3, 3, 3, 3, 2, 3, 3, 3, 3, 3,
			2, 3, 3, 3, 3, 3, 2, 3, 3, 3,
			3, 3, 2, 3, 3, 3, 3, 3, 2, 3,
			3, 3, 3, 3, 2, 3, 3, 3, 3, 3,
			2, 3, 3, 3, 3, 3, 2, 3, 3, 3,
			3, 3, 2, 3, 3, 3, 3, 3, 2, 3,
			3, 2, 3, 3, 2, 3, 3, 3, 3, 3,
			2, 3, 3, 3, 3, 3, 2, 3, 3, 2,
			3, 3, 2, 2, 2, 2, 2, 2, 2, 2,
			2, 2, 2, 2, 2, 3, 3, 2, 3, 3,
			2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
			2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
			2, 2, 3, 3, 3, 3, 3, 2, 3, 3,
			3, 3, 3, 2, 3, 3, 2, 3, 3, 2,
			3, 3, 3, 3, 3, 2, 3, 3, 3, 3,
			3, 2, 3, 3, 2, 3, 3, 2, 3, 3,
			3, 3, 3, 2, 3, 3, 3, 3, 3, 2,
			3, 3, 2, 3, 3, 2, 3, 3, 3, 3,
			3, 2, 3, 3, 3, 3, 3, 2, 3, 3,
			2, 3, 3, 2, 2, 3, 3, 3, 3, 3,
			2, 2, 3, 3, 3, 3, 3, 2, 2, 3,
			3, 3, 3, 3, 2, 2, 3, 3, 3, 3,
			3, 2, 2, 3, 3, 3, 3, 3, 2, 2,
			3, 3, 3, 3, 3, 2, 2, 3, 3, 3,
			3, 3, 2, 2, 3, 3, 3, 3, 3, 2,
			2, 3, 3, 3, 3, 3, 2, 2, 3, 3,
			3, 3, 3, 2, 2, 3, 3, 3, 3, 3,
			2, 2, 3, 3, 3, 3, 3, 2, 3, 3,
			3, 3, 3, 2, 3, 3, 3, 3, 3, 2,
			2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
			2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
			2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
			2, 2, 3, 3, 3, 3, 3, 3, 3, 3,
			3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
			3, 2, 2, 3, 3, 3, 3, 3, 2, 2,
			3, 3, 3, 3, 3, 2, 2, 3, 3, 3,
			3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
			3, 3, 3, 3, 2, 2, 3, 3, 3, 3,
			3, 2, 2, 3, 3, 3, 3, 3, 3, 3,
			3, 2, 2, 3, 3, 3, 3, 3, 2, 2,
			3, 3, 3, 3, 3, 2, 3, 3, 3, 3,
			3, 2, 2, 3, 3, 3, 3, 3, 2, 3,
			3, 3, 3, 3, 2, 2, 3, 3, 3, 3,
			3, 2, 2, 3, 3, 3, 3, 3, 2, 2,
			3, 3, 3, 3, 3, 0, 0, 0, 2, 2,
			2, 2, 2, 2, 2, 2, 3, 2, 2, 2,
			2, 2, 2, 2, 2, 4, 2, 2, 2, 2,
			2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
			2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
			2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
			2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
			2, 2, 3, 3, 3, 3, 2, 3, 3, 2,
			3, 3, 2, 3, 3, 2, 3, 3, 2, 2,
			2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
			2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
			2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
			2, 2, 2, 2, 1, 1, 1, 1, 1, 1,
			1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
			1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
			1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
			1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
			1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
			1, 1, 1, 1, 1, 1, 1, 1, 2, 2,
			2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
			2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
			2, 2, 1, 1, 1, 1, 1, 1, 0, 2,
			2, 2, 3, 3, 3, 3, 3, 3, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 2, 2, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 2, 2, 2,
			2, 2, 1, 1, 1, 1, 1, 1, 0, 2,
			2, 2, 3, 3, 3, 3, 3, 3, 1, 1,
			1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
			1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
			1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
			1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
			2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
			2, 2, 2, 2, 2, 1, 1, 2, 2, 2,
			2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
			2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
			2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
			2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
			3, 4, 4, 4, 4, 4, 3, 4, 4, 4,
			4, 4, 3, 4, 4, 3, 4, 4, 2, 2,
			3, 3, 3, 3, 4, 4, 4, 4, 3, 3,
			3, 3, 3, 3, 3, 3, 3, 4, 4, 4,
			4, 4, 3, 4, 4, 4, 4, 4, 1, 1,
			1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
			1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
			1, 2, 3, 3, 2, 3, 3, 2, 2, 3,
			3, 3, 3, 3, 2, 2, 3, 3, 3, 3,
			3, 2, 2, 3, 3, 3, 3, 3, 2, 2,
			3, 3, 3, 3, 3, 2, 2, 3, 3, 3,
			3, 3, 2, 2, 2, 2, 2, 2, 2, 2,
			2, 2, 2, 2, 2, 2, 2, 3, 3, 3,
			3, 3, 2, 2, 3, 3, 3, 3, 3, 2,
			2, 3, 3, 3, 3, 3, 2, 2, 3, 3,
			3, 3, 3, 3, 3, 3, 2, 2, 3, 3,
			3, 3, 3, 2, 2, 3, 3, 3, 3, 3,
			2, 2, 3, 3, 3, 3, 3, 2, 2, 3,
			3, 3, 3, 3, 3, 3, 3, 2, 2, 3,
			3, 3, 3, 3, 2, 2, 3, 3, 3, 3,
			3, 2, 2, 3, 3, 3, 3, 3, 3, 3,
			3, 2, 2, 3, 3, 3, 3, 3, 2, 2,
			3, 3, 3, 3, 3, 2, 2, 3, 3, 3,
			3, 3, 2, 2, 2, 2, 2, 2, 2, 2,
			2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
			2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
			2, 2, 3, 3, 3, 3, 3, 2, 2, 3,
			3, 3, 3, 3, 2, 2, 3, 3, 3, 3,
			3, 2, 2, 3, 3, 3, 3, 3, 3, 3,
			3, 2, 2, 3, 3, 3, 3, 3, 2, 2,
			3, 3, 3, 3, 3, 2, 2, 3, 3, 3,
			3, 3, 2, 2, 3, 3, 3, 3, 3, 3,
			3, 3, 2, 2, 2, 2, 2, 3, 3, 3,
			3, 3, 2, 2, 3, 3, 3, 3, 3, 2,
			2, 3, 3, 3, 3, 3, 2, 2, 3, 3,
			3, 3, 3, 2, 2, 3, 3, 3, 3, 3,
			2, 2, 3, 3, 3, 3, 3, 3, 3, 3,
			2, 2, 3, 3, 3, 3, 3, 2, 2, 3,
			3, 3, 3, 3, 2, 2, 3, 3, 3, 3,
			3, 2, 2, 3, 3, 3, 3, 3, 2, 2,
			3, 3, 3, 3, 3, 2, 2, 3, 3, 3,
			3, 3, 2, 2, 3, 3, 3, 3, 3, 2,
			2, 2, 2, 2, 3, 3, 3, 3, 3, 2,
			2, 3, 3, 2, 2, 3, 3, 2, 2, 3,
			3, 2, 2, 3, 3, 3, 3, 3, 2, 2,
			3, 3, 2, 2, 3, 3, 2, 2, 3, 3,
			2, 2, 3, 3, 2, 2, 3, 3, 2, 2,
			3, 3, 2, 2, 3, 3, 3, 3, 3, 3,
			3, 3, 3, 3, 3, 3, 3, 3, 3, 2,
			2, 2, 2, 2, 3, 3, 3, 2, 2, 2,
			3, 3, 3, 2, 2, 2, 3, 3, 3, 2,
			2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
			2, 3, 3, 3, 3, 3, 3, 2, 2, 2,
			2, 3, 3, 3, 3, 3, 3, 2, 2, 2,
			3, 3, 3, 3, 3, 2, 2, 2, 2, 2,
			2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
			2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
			2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
			2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
			2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
			2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
			2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
			2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
			2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
			2, 2, 2, 3, 3, 3, 3, 3, 3, 3,
			3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
			3, 3, 3, 3, 3, 3, 3, 2, 3, 3,
			3, 3, 3, 2, 2, 2, 2, 2, 2, 2,
			3, 3, 3, 3, 3, 2, 2, 2, 2, 2,
			2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
			2, 3, 3, 3, 3, 3, 3, 3, 3, 3,
			3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
			3, 3, 2, 2, 2, 2, 2, 2, 2, 2,
			2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
			2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
			2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
			2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
			2, 2, 2, 2, 2, 2, 3, 3, 3, 3,
			3, 2, 3, 3, 3, 3, 3, 2, 3, 3,
			3, 3, 3, 2, 2, 2, 2, 2, 2, 2,
			3, 3, 3, 3, 3, 3, 3, 3, 2, 2,
			2, 2, 2, 2, 2, 3, 3, 3, 3, 3,
			2, 2, 2, 2, 3, 3, 3, 3, 3, 3,
			3, 3, 2, 3, 3, 3, 3, 3, 2, 3,
			3, 3, 3, 3, 3, 3, 3, 2, 3, 3,
			3, 3, 3, 2, 3, 3, 3, 3, 3, 3,
			3, 3, 2, 3, 3, 3, 3, 3, 3, 3,
			3, 2, 2, 2, 2, 2, 2, 2, 2, 3,
			3, 2, 2, 2, 2, 2, 2, 3, 3, 3,
			3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
			3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
			3, 3, 3, 3, 3, 2, 2, 2, 2, 2,
			2, 3, 3, 2, 2, 2, 2, 2, 2, 3,
			3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
			3, 3, 3, 3, 3, 3, 3, 3, 2, 2,
			2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
			2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
			2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
			2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
			2, 2, 3, 3, 3, 3, 3, 3, 3, 3,
			3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
			3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
			3, 3, 3, 3, 3, 3, 3, 3, 2, 2,
			2, 3, 3, 3, 3, 3, 3, 3, 3, 3,
			3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
			3, 3, 3, 3, 3, 3, 3, 3, 2, 2,
			2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
			2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
			3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
			3, 3, 3, 3, 3, 3, 3, 3, 2, 2,
			2, 2, 2, 2, 3, 3, 3, 2, 2, 2,
			2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
			2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
			2, 3, 3, 3, 3, 3, 3, 3, 3, 3,
			3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
			3, 3, 2, 2, 2, 2, 2, 2, 3, 3,
			3, 3, 2, 2, 2, 2, 2, 2, 3, 3,
			3, 3, 2, 2, 2, 2, 2, 2, 3, 3,
			3, 3, 2, 2, 2, 2, 2, 2, 3, 3,
			3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
			3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
			3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
			3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
			3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
			3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
			3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
			3, 3, 3, 3, 3, 3, 2, 2, 2, 2,
			2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
			2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
			3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
			3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
			3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
			3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
			3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
			3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
			3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
			3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
			3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
			3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
			3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
			3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
			3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
			3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
			3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
			3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
			2, 2, 2, 2, 2, 2, 1, 1, 1, 1,
			1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
			1, 1, 2, 2, 2, 2, 2, 2, 2, 2,
			3, 3, 2, 2, 2, 2, 3, 3, 2, 3,
			3, 3, 3, 3, 2, 2, 2, 3, 3, 3,
			3, 3, 2, 3, 3, 3, 3, 3, 2, 3,
			3, 3, 3, 3, 2, 3, 3, 3, 3, 3,
			2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
			2, 3, 3, 2, 2, 2, 2, 2, 2, 3,
			3, 2, 2, 3, 3, 3, 3, 2, 2, 2,
			2, 2, 2, 3, 3, 3, 3, 3, 3, 3,
			3, 3, 3, 2, 2, 2, 2, 2, 2, 2,
			2, 2, 2, 2, 3, 3, 3, 3, 3, 3,
			4, 4, 4, 4, 4, 4, 4, 4, 3, 3,
			3, 3, 3, 3, 3, 3, 3, 3, 4, 3,
			3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
			3, 3, 4, 4, 3, 4, 4, 3, 4, 4,
			3, 4, 4, 3, 4, 4, 3, 3, 4, 4,
			4, 4, 4, 3, 3, 3, 3, 3, 3, 3,
			3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
			3, 3, 3, 3, 3, 3, 3, 4, 4, 4,
			4, 4, 3, 3, 3, 3, 3, 4, 4, 3,
			3, 3, 3, 3, 3, 3, 4, 4, 4, 4,
			4, 4, 4, 4, 4, 4, 4, 4, 3, 3,
			4, 4, 4, 4, 3, 4, 4, 3, 3, 4,
			4, 4, 4, 4, 4, 4, 4, 4, 4, 4,
			4, 4, 4, 3, 3, 3, 3, 3, 3, 4,
			4, 3, 3, 3, 3, 3, 3, 3, 3, 4,
			4, 4, 4, 4, 3, 3, 3, 3, 3, 4,
			4, 3, 3, 4, 4, 4, 4, 4, 4, 4,
			4, 4, 4, 4, 4, 3, 4, 4, 3, 4,
			3, 4, 4, 4, 4, 4, 4, 4, 4, 4,
			3, 4, 4, 4, 4, 4, 4, 5, 5, 5,
			5, 5, 5, 5, 5, 4, 4, 4, 4, 4,
			4, 4, 4, 4, 4, 4, 4, 4, 4, 4,
			4, 4, 4, 4, 4, 4, 4, 3, 3, 3,
			3, 3, 3, 4, 4, 4, 4, 4, 4, 4,
			4, 4, 4, 4, 4, 4, 4, 4, 4, 4,
			4, 3, 3, 3, 3, 3, 3, 3, 3, 3,
			3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
			3, 4, 4, 4, 4, 4, 4, 4, 4, 4,
			4, 4, 4, 4, 4, 4, 4, 4, 4, 4,
			4, 4, 4, 4, 4, 4, 4, 4, 4, 4,
			4, 4, 4, 4, 4, 4, 4, 4, 4, 4,
			4, 4, 4, 4, 4, 4, 4, 4, 4, 4,
			4, 4, 4, 4, 4, 4, 4, 4, 4, 4,
			4, 4, 4, 4, 4, 4, 4, 3, 3, 4,
			4, 4, 4, 4, 3, 4, 4, 4, 4, 4,
			3, 3, 3, 3, 4, 4, 4, 4, 4, 4,
			4, 4, 4, 4, 4, 4, 4, 4, 4, 4,
			4, 4, 3, 3, 3, 3, 4, 4, 4, 4,
			4, 4, 4, 4, 2, 2, 2, 2, 2, 2,
			2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
			2, 2, 1, 1, 1, 1, 2, 2, 2, 2,
			2, 2, 3, 3, 3, 3, 3, 3, 3, 3,
			3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
			3, 3, 3, 3, 3, 3, 2, 2, 2, 2,
			2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
			2, 3, 3, 3, 3, 3, 3, 2, 2, 2,
			2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
			2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
			2, 2, 2, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 1, 1, 1, 1,
			1, 0, 0, 0, 1, 0, 1, 1, 2, 2,
			2, 3, 3, 3, 3, 3, 1, 1, 1, 1,
			0, 0, 0, 2, 2, 1, 1, 1, 1, 0,
			0, 0, 0, 0, 0, 2, 2, 2, 2, 2,
			2, 2, 2, 2, 2, 2, 2, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 1, 1, 1, 1, 2, 2, 2,
			2, 2, 2, 2, 2, 2, 2, 0, 0, 0,
			0, 0, 1, 1, 3, 3, 3, 3, 3, 3,
			3, 3, 0, 0, 0, 0, 0, 0, 1, 1,
			1, 0, 0, 3, 3, 3, 3, 4, 4, 4,
			4, 2, 2, 2, 2, 2, 2, 2, 2, 2,
			2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
			2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
			2, 2, 2, 2, 2, 2, 2, 2, 3, 3,
			2, 2, 3, 2, 2, 3, 3, 3, 2, 2,
			2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
			2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
			2, 2, 2, 2, 2, 2, 3, 3, 2, 2,
			2, 2, 2, 2, 3, 3, 3, 3, 3, 3,
			3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
			3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
			3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
			3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
			3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
			3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
			3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
			3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
			3, 3, 3, 3, 2, 2, 2, 3, 3, 3,
			3, 4, 3, 3, 3, 3, 3, 3, 3, 3,
			2, 2, 3, 3, 2, 2, 2, 2, 3, 3,
			3, 3, 2, 2, 2, 3, 3, 3, 3, 4,
			3, 3, 3, 4, 2, 2, 2, 3, 3, 3,
			3, 3, 2, 2, 2, 3, 3, 3, 3, 3,
			2, 0, 0, 2, 2, 1, 1, 1, 1, 1,
			1, 1, 1, 2, 2, 2, 2, 2, 2, 2,
			2, 2, 2, 2, 2, 2, 2, 3, 3, 2,
			1, 1, 1, 1, 1, 1, 2, 2, 2, 2,
			2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
			3, 1, 1, 1, 1, 1, 1, 1, 1, 2,
			2, 2, 2, 2, 2, 2, 2, 3, 3, 3,
			3, 2, 2, 3, 3, 3, 2, 2, 3, 3,
			3, 3, 3, 2, 2, 2, 1, 1, 4, 4,
			3, 3, 3, 3, 2, 3, 3, 3, 3, 3,
			3, 2, 2, 2, 2, 3, 3, 3, 3, 3,
			3, 3, 2, 2, 3, 3, 3, 2, 2, 2,
			2, 3, 3, 3, 3, 3, 3, 3, 3, 3,
			3, 3, 3, 2, 2, 2, 2, 3, 3, 3,
			3, 3, 3, 3, 3, 3, 2, 2, 2, 2,
			3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
			3, 3, 3, 2, 2, 2, 2, 3, 3, 3,
			3, 3, 3, 3, 3, 3, 3, 2, 2, 2,
			2, 3, 3, 3, 3, 3, 3, 3, 3, 3,
			2, 2, 3, 3, 3, 3, 3, 3, 3, 3,
			3, 3, 2, 1, 1, 1, 1, 1, 1, 1,
			1, 2, 2, 2, 2, 3, 3, 3, 3, 3,
			2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
			2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
			2, 2, 4, 3, 4, 4, 3, 3, 3, 3,
			3, 3, 3, 3, 3, 3, 3, 3, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 1, 1,
			2, 2, 2, 2, 2, 2, 2, 2, 3, 3,
			3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
			3, 2, 2, 2, 2, 2, 2, 2, 2, 2,
			2, 2, 2, 2, 2, 3, 3, 3, 3, 3,
			3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
			3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
			3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
			3
		};
	}
	internal static class InstructionUtils
	{
		public static int GetAddressSizeInBytes(Register baseReg, Register indexReg, int displSize, CodeSize codeSize)
		{
			if ((Register.RAX <= baseReg && baseReg <= Register.R15) || (Register.RAX <= indexReg && indexReg <= Register.R15) || baseReg == Register.RIP)
			{
				return 8;
			}
			if ((Register.EAX <= baseReg && baseReg <= Register.R15D) || (Register.EAX <= indexReg && indexReg <= Register.R15D) || baseReg == Register.EIP)
			{
				return 4;
			}
			if ((Register.AX <= baseReg && baseReg <= Register.DI) || (Register.AX <= indexReg && indexReg <= Register.DI))
			{
				return 2;
			}
			if (displSize == 2 || displSize == 4 || displSize == 8)
			{
				return displSize;
			}
			return codeSize switch
			{
				CodeSize.Code64 => 8, 
				CodeSize.Code32 => 4, 
				CodeSize.Code16 => 2, 
				_ => 8, 
			};
		}
	}
	public sealed class IntelFormatter : Formatter
	{
		private readonly FormatterOptions options;

		private readonly ISymbolResolver symbolResolver;

		private readonly IFormatterOptionsProvider optionsProvider;

		private readonly FormatterString[] allRegisters;

		private readonly Iced.Intel.IntelFormatterInternal.InstrInfo[] instrInfos;

		private readonly Iced.Intel.IntelFormatterInternal.MemorySizes.Info[] allMemorySizes;

		private readonly NumberFormatter numberFormatter;

		private readonly FormatterString[] opSizeStrings;

		private readonly FormatterString[] addrSizeStrings;

		private readonly FormatterString[] rcStrings;

		private readonly FormatterString[] rcSaeStrings;

		private readonly FormatterString[][] branchInfos;

		private readonly string[] scaleNumbers;

		private readonly FormatterString[] mvexRegMemConsts32;

		private readonly FormatterString[] mvexRegMemConsts64;

		private static readonly FormatterString str_bnd = new FormatterString("bnd");

		private static readonly FormatterString str_far = new FormatterString("far");

		private static readonly FormatterString str_hint_not_taken = new FormatterString("hint-not-taken");

		private static readonly FormatterString str_hint_taken = new FormatterString("hint-taken");

		private static readonly FormatterString str_lock = new FormatterString("lock");

		private static readonly FormatterString str_notrack = new FormatterString("notrack");

		private static readonly FormatterString str_rep = new FormatterString("rep");

		private static readonly FormatterString[] str_repe = new FormatterString[2]
		{
			new FormatterString("repe"),
			new FormatterString("repz")
		};

		private static readonly FormatterString[] str_repne = new FormatterString[2]
		{
			new FormatterString("repne"),
			new FormatterString("repnz")
		};

		private static readonly FormatterString str_sae = new FormatterString("sae");

		private static readonly FormatterString str_xacquire = new FormatterString("xacquire");

		private static readonly FormatterString str_xrelease = new FormatterString("xrelease");

		private static readonly FormatterString str_z = new FormatterString("z");

		private static readonly FormatterString[] s_opSizeStrings = new FormatterString[4]
		{
			new FormatterString(""),
			new FormatterString("data16"),
			new FormatterString("data32"),
			new FormatterString("data64")
		};

		private static readonly FormatterString[] s_addrSizeStrings = new FormatterString[4]
		{
			new FormatterString(""),
			new FormatterString("addr16"),
			new FormatterString("addr32"),
			new FormatterString("addr64")
		};

		private static readonly FormatterString[] s_rcStrings = new FormatterString[4]
		{
			new FormatterString("rne"),
			new FormatterString("rd"),
			new FormatterString("ru"),
			new FormatterString("rz")
		};

		private static readonly FormatterString[] s_rcSaeStrings = new FormatterString[4]
		{
			new FormatterString("rne-sae"),
			new FormatterString("rd-sae"),
			new FormatterString("ru-sae"),
			new FormatterString("rz-sae")
		};

		private static readonly FormatterString[][] s_branchInfos = new FormatterString[2][]
		{
			null,
			new FormatterString[1]
			{
				new FormatterString("short")
			}
		};

		private static readonly string[] s_scaleNumbers = new string[4] { "1", "2", "4", "8" };

		private static readonly FormatterString[] s_mvexRegMemConsts32 = new FormatterString[17]
		{
			new FormatterString(""),
			new FormatterString(""),
			new FormatterString("cdab"),
			new FormatterString("badc"),
			new FormatterString("dacb"),
			new FormatterString("aaaa"),
			new FormatterString("bbbb"),
			new FormatterString("cccc"),
			new FormatterString("dddd"),
			new FormatterString(""),
			new FormatterString("1to16"),
			new FormatterString("4to16"),
			new FormatterString("float16"),
			new FormatterString("uint8"),
			new FormatterString("sint8"),
			new FormatterString("uint16"),
			new FormatterString("sint16")
		};

		private static readonly FormatterString[] s_mvexRegMemConsts64 = new FormatterString[17]
		{
			new FormatterString(""),
			new FormatterString(""),
			new FormatterString("cdab"),
			new FormatterString("badc"),
			new FormatterString("dacb"),
			new FormatterString("aaaa"),
			new FormatterString("bbbb"),
			new FormatterString("cccc"),
			new FormatterString("dddd"),
			new FormatterString(""),
			new FormatterString("1to8"),
			new FormatterString("4to8"),
			new FormatterString("float16"),
			new FormatterString("uint8"),
			new FormatterString("sint8"),
			new FormatterString("uint16"),
			new FormatterString("sint16")
		};

		private static readonly FormatterString str_eh = new FormatterString("eh");

		public override FormatterOptions Options => options;

		public IntelFormatter()
			: this(null, null, null)
		{
		}

		public IntelFormatter(ISymbolResolver? symbolResolver, IFormatterOptionsProvider? optionsProvider = null)
			: this(null, symbolResolver, optionsProvider)
		{
		}

		public IntelFormatter(FormatterOptions? options, ISymbolResolver? symbolResolver = null, IFormatterOptionsProvider? optionsProvider = null)
		{
			this.options = options ?? FormatterOptions.CreateIntel();
			this.symbolResolver = symbolResolver;
			this.optionsProvider = optionsProvider;
			allRegisters = Iced.Intel.IntelFormatterInternal.Registers.AllRegisters;
			instrInfos = Iced.Intel.IntelFormatterInternal.InstrInfos.AllInfos;
			allMemorySizes = Iced.Intel.IntelFormatterInternal.MemorySizes.AllMemorySizes;
			numberFormatter = new NumberFormatter(dummy: true);
			opSizeStrings = s_opSizeStrings;
			addrSizeStrings = s_addrSizeStrings;
			rcStrings = s_rcStrings;
			rcSaeStrings = s_rcSaeStrings;
			branchInfos = s_branchInfos;
			scaleNumbers = s_scaleNumbers;
			mvexRegMemConsts32 = s_mvexRegMemConsts32;
			mvexRegMemConsts64 = s_mvexRegMemConsts64;
		}

		public override void FormatMnemonic(in Instruction instruction, FormatterOutput output, FormatMnemonicOptions options)
		{
			instrInfos[(int)instruction.Code].GetOpInfo(this.options, in instruction, out var info);
			int column = 0;
			FormatMnemonic(in instruction, output, in info, ref column, options);
		}

		public override int GetOperandCount(in Instruction instruction)
		{
			instrInfos[(int)instruction.Code].GetOpInfo(options, in instruction, out var info);
			return info.OpCount;
		}

		public override bool TryGetOpAccess(in Instruction instruction, int operand, out OpAccess access)
		{
			instrInfos[(int)instruction.Code].GetOpInfo(options, in instruction, out var info);
			if ((uint)operand >= (uint)info.OpCount)
			{
				ThrowHelper.ThrowArgumentOutOfRangeException_operand();
			}
			return info.TryGetOpAccess(operand, out access);
		}

		public override int GetInstructionOperand(in Instruction instruction, int operand)
		{
			instrInfos[(int)instruction.Code].GetOpInfo(options, in instruction, out var info);
			if ((uint)operand >= (uint)info.OpCount)
			{
				ThrowHelper.ThrowArgumentOutOfRangeException_operand();
			}
			return info.GetInstructionIndex(operand);
		}

		public override int GetFormatterOperand(in Instruction instruction, int instructionOperand)
		{
			instrInfos[(int)instruction.Code].GetOpInfo(options, in instruction, out var info);
			if ((uint)instructionOperand >= (uint)instruction.OpCount)
			{
				ThrowHelper.ThrowArgumentOutOfRangeException_instructionOperand();
			}
			return info.GetOperandIndex(instructionOperand);
		}

		public override void FormatOperand(in Instruction instruction, FormatterOutput output, int operand)
		{
			instrInfos[(int)instruction.Code].GetOpInfo(options, in instruction, out var info);
			if ((uint)operand >= (uint)info.OpCount)
			{
				ThrowHelper.ThrowArgumentOutOfRangeException_operand();
			}
			FormatOperand(in instruction, output, in info, operand);
		}

		public override void FormatOperandSeparator(in Instruction instruction, FormatterOutput output)
		{
			if (output == null)
			{
				ThrowHelper.ThrowArgumentNullException_output();
			}
			output.Write(",", FormatterTextKind.Punctuation);
			if (options.SpaceAfterOperandSeparator)
			{
				output.Write(" ", FormatterTextKind.Text);
			}
		}

		public override void FormatAllOperands(in Instruction instruction, FormatterOutput output)
		{
			instrInfos[(int)instruction.Code].GetOpInfo(options, in instruction, out var info);
			FormatOperands(in instruction, output, in info);
		}

		public override void Format(in Instruction instruction, FormatterOutput output)
		{
			instrInfos[(int)instruction.Code].GetOpInfo(options, in instruction, out var info);
			int column = 0;
			FormatMnemonic(in instruction, output, in info, ref column, FormatMnemonicOptions.None);
			if (info.OpCount != 0)
			{
				FormatterUtils.AddTabs(output, column, options.FirstOperandCharIndex, options.TabSize);
				FormatOperands(in instruction, output, in info);
			}
		}

		private void FormatMnemonic(in Instruction instruction, FormatterOutput output, in Iced.Intel.IntelFormatterInternal.InstrOpInfo opInfo, ref int column, FormatMnemonicOptions mnemonicOptions)
		{
			if (output == null)
			{
				ThrowHelper.ThrowArgumentNullException_output();
			}
			bool needSpace = false;
			int num;
			if ((mnemonicOptions & FormatMnemonicOptions.NoPrefixes) == 0 && (opInfo.Flags & Iced.Intel.IntelFormatterInternal.InstrOpInfoFlags.MnemonicIsDirective) == 0)
			{
				Register segmentPrefix = instruction.SegmentPrefix;
				if (((uint)segmentPrefix | instruction.HasAnyOf_Lock_Rep_Repne_Prefix | (uint)(opInfo.Flags & (Iced.Intel.IntelFormatterInternal.InstrOpInfoFlags.OpSize64 | Iced.Intel.IntelFormatterInternal.InstrOpInfoFlags.AddrSize64 | Iced.Intel.IntelFormatterInternal.InstrOpInfoFlags.JccNotTaken | Iced.Intel.IntelFormatterInternal.InstrOpInfoFlags.JccTaken | Iced.Intel.IntelFormatterInternal.InstrOpInfoFlags.BndPrefix))) != 0)
				{
					FormatterString prefix = opSizeStrings[((int)opInfo.Flags >> 4) & 3];
					if (prefix.Length != 0)
					{
						FormatPrefix(output, in instruction, ref column, prefix, PrefixKind.OperandSize, ref needSpace);
					}
					prefix = addrSizeStrings[((int)opInfo.Flags >> 6) & 3];
					if (prefix.Length != 0)
					{
						FormatPrefix(output, in instruction, ref column, prefix, PrefixKind.AddressSize, ref needSpace);
					}
					if (segmentPrefix == Register.DS)
					{
						num = (FormatterUtils.IsNotrackPrefixBranch(instruction.Code) ? 1 : 0);
						if (num != 0)
						{
							goto IL_00e2;
						}
					}
					else
					{
						num = 0;
					}
					if (segmentPrefix != 0 && ShowSegmentPrefix(in instruction, in opInfo))
					{
						FormatPrefix(output, in instruction, ref column, allRegisters[(int)segmentPrefix], FormatterUtils.GetSegmentRegisterPrefixKind(segmentPrefix), ref needSpace);
					}
					goto IL_00e2;
				}
			}
			goto IL_0248;
			IL_00e2:
			if (instruction.HasXacquirePrefix)
			{
				FormatPrefix(output, in instruction, ref column, str_xacquire, PrefixKind.Xacquire, ref needSpace);
			}
			if (instruction.HasXreleasePrefix)
			{
				FormatPrefix(output, in instruction, ref column, str_xrelease, PrefixKind.Xrelease, ref needSpace);
			}
			if (instruction.HasLockPrefix)
			{
				FormatPrefix(output, in instruction, ref column, str_lock, PrefixKind.Lock, ref needSpace);
			}
			if ((opInfo.Flags & Iced.Intel.IntelFormatterInternal.InstrOpInfoFlags.JccNotTaken) != 0)
			{
				FormatPrefix(output, in instruction, ref column, str_hint_not_taken, PrefixKind.HintNotTaken, ref needSpace);
			}
			else if ((opInfo.Flags & Iced.Intel.IntelFormatterInternal.InstrOpInfoFlags.JccTaken) != 0)
			{
				FormatPrefix(output, in instruction, ref column, str_hint_taken, PrefixKind.HintTaken, ref needSpace);
			}
			if (num != 0)
			{
				FormatPrefix(output, in instruction, ref column, str_notrack, PrefixKind.Notrack, ref needSpace);
			}
			bool flag = (opInfo.Flags & Iced.Intel.IntelFormatterInternal.InstrOpInfoFlags.BndPrefix) != 0;
			if (flag)
			{
				FormatPrefix(output, in instruction, ref column, str_bnd, PrefixKind.Bnd, ref needSpace);
			}
			if (instruction.HasRepePrefix && FormatterUtils.ShowRepOrRepePrefix(instruction.Code, options))
			{
				if (FormatterUtils.IsRepeOrRepneInstruction(instruction.Code))
				{
					FormatPrefix(output, in instruction, ref column, MnemonicCC.GetMnemonicCC(options, 4, str_repe), PrefixKind.Repe, ref needSpace);
				}
				else
				{
					FormatPrefix(output, in instruction, ref column, str_rep, PrefixKind.Rep, ref needSpace);
				}
			}
			if (instruction.HasRepnePrefix && !flag && FormatterUtils.ShowRepnePrefix(instruction.Code, options))
			{
				FormatPrefix(output, in instruction, ref column, MnemonicCC.GetMnemonicCC(options, 5, str_repne), PrefixKind.Repne, ref needSpace);
			}
			goto IL_0248;
			IL_0248:
			if ((mnemonicOptions & FormatMnemonicOptions.NoMnemonic) == 0)
			{
				if (needSpace)
				{
					output.Write(" ", FormatterTextKind.Text);
					column++;
				}
				FormatterString mnemonic = opInfo.Mnemonic;
				if ((opInfo.Flags & Iced.Intel.IntelFormatterInternal.InstrOpInfoFlags.MnemonicIsDirective) != 0)
				{
					output.Write(mnemonic.Get(options.UppercaseKeywords || options.UppercaseAll), FormatterTextKind.Directive);
				}
				else
				{
					output.WriteMnemonic(in instruction, mnemonic.Get(options.UppercaseMnemonics || options.UppercaseAll));
				}
				column += mnemonic.Length;
				if ((opInfo.Flags & Iced.Intel.IntelFormatterInternal.InstrOpInfoFlags.FarMnemonic) != 0)
				{
					output.Write(" ", FormatterTextKind.Text);
					output.WriteMnemonic(in instruction, str_far.Get(options.UppercaseMnemonics || options.UppercaseAll));
					column += str_far.Length + 1;
				}
			}
		}

		private bool ShowSegmentPrefix(in Instruction instruction, in Iced.Intel.IntelFormatterInternal.InstrOpInfo opInfo)
		{
			if ((opInfo.Flags & Iced.Intel.IntelFormatterInternal.InstrOpInfoFlags.IgnoreSegmentPrefix) != 0)
			{
				return false;
			}
			switch (instruction.Code)
			{
			case Code.Monitorw:
			case Code.Monitord:
			case Code.Monitorq:
			case Code.Monitorxw:
			case Code.Monitorxd:
			case Code.Monitorxq:
			case Code.Clzerow:
			case Code.Clzerod:
			case Code.Clzeroq:
			case Code.Umonitor_r16:
			case Code.Umonitor_r32:
			case Code.Umonitor_r64:
				return FormatterUtils.ShowSegmentPrefix(Register.DS, in instruction, options);
			default:
			{
				for (int i = 0; i < opInfo.OpCount; i++)
				{
					switch (opInfo.GetOpKind(i))
					{
					case Iced.Intel.IntelFormatterInternal.InstrOpKind.MemorySegSI:
					case Iced.Intel.IntelFormatterInternal.InstrOpKind.MemorySegESI:
					case Iced.Intel.IntelFormatterInternal.InstrOpKind.MemorySegRSI:
					case Iced.Intel.IntelFormatterInternal.InstrOpKind.MemorySegDI:
					case Iced.Intel.IntelFormatterInternal.InstrOpKind.MemorySegEDI:
					case Iced.Intel.IntelFormatterInternal.InstrOpKind.MemorySegRDI:
					case Iced.Intel.IntelFormatterInternal.InstrOpKind.Memory:
						return false;
					default:
						throw new InvalidOperationException();
					case Iced.Intel.IntelFormatterInternal.InstrOpKind.Register:
					case Iced.Intel.IntelFormatterInternal.InstrOpKind.NearBranch16:
					case Iced.Intel.IntelFormatterInternal.InstrOpKind.NearBranch32:
					case Iced.Intel.IntelFormatterInternal.InstrOpKind.NearBranch64:
					case Iced.Intel.IntelFormatterInternal.InstrOpKind.FarBranch16:
					case Iced.Intel.IntelFormatterInternal.InstrOpKind.FarBranch32:
					case Iced.Intel.IntelFormatterInternal.InstrOpKind.Immediate8:
					case Iced.Intel.IntelFormatterInternal.InstrOpKind.Immediate8_2nd:
					case Iced.Intel.IntelFormatterInternal.InstrOpKind.Immediate16:
					case Iced.Intel.IntelFormatterInternal.InstrOpKind.Immediate32:
					case Iced.Intel.IntelFormatterInternal.InstrOpKind.Immediate64:
					case Iced.Intel.IntelFormatterInternal.InstrOpKind.Immediate8to16:
					case Iced.Intel.IntelFormatterInternal.InstrOpKind.Immediate8to32:
					case Iced.Intel.IntelFormatterInternal.InstrOpKind.Immediate8to64:
					case Iced.Intel.IntelFormatterInternal.InstrOpKind.Immediate32to64:
					case Iced.Intel.IntelFormatterInternal.InstrOpKind.MemoryESDI:
					case Iced.Intel.IntelFormatterInternal.InstrOpKind.MemoryESEDI:
					case Iced.Intel.IntelFormatterInternal.InstrOpKind.MemoryESRDI:
					case Iced.Intel.IntelFormatterInternal.InstrOpKind.DeclareByte:
					case Iced.Intel.IntelFormatterInternal.InstrOpKind.DeclareWord:
					case Iced.Intel.IntelFormatterInternal.InstrOpKind.DeclareDword:
					case Iced.Intel.IntelFormatterInternal.InstrOpKind.DeclareQword:
						break;
					}
				}
				return options.ShowUselessPrefixes;
			}
			}
		}

		private void FormatPrefix(FormatterOutput output, in Instruction instruction, ref int column, FormatterString prefix, PrefixKind prefixKind, ref bool needSpace)
		{
			if (needSpace)
			{
				column++;
				output.Write(" ", FormatterTextKind.Text);
			}
			output.WritePrefix(in instruction, prefix.Get(options.UppercasePrefixes || options.UppercaseAll), prefixKind);
			column += prefix.Length;
			needSpace = true;
		}

		private void FormatOperands(in Instruction instruction, FormatterOutput output, in Iced.Intel.IntelFormatterInternal.InstrOpInfo opInfo)
		{
			if (output == null)
			{
				ThrowHelper.ThrowArgumentNullException_output();
			}
			for (int i = 0; i < opInfo.OpCount; i++)
			{
				if (i > 0)
				{
					output.Write(",", FormatterTextKind.Punctuation);
					if (options.SpaceAfterOperandSeparator)
					{
						output.Write(" ", FormatterTextKind.Text);
					}
				}
				FormatOperand(in instruction, output, in opInfo, i);
			}
		}

		private void FormatOperand(in Instruction instruction, FormatterOutput output, in Iced.Intel.IntelFormatterInternal.InstrOpInfo opInfo, int operand)
		{
			if (output == null)
			{
				ThrowHelper.ThrowArgumentNullException_output();
			}
			int num;
			if (IcedConstants.IsMvex(instruction.Code))
			{
				int opCount = instruction.OpCount;
				num = ((instruction.GetOpKind(opCount - 1) == OpKind.Immediate8) ? (opCount - 2) : (opCount - 1));
			}
			else
			{
				num = -1;
			}
			int instructionIndex = opInfo.GetInstructionIndex(operand);
			Iced.Intel.IntelFormatterInternal.InstrOpKind opKind = opInfo.GetOpKind(operand);
			int addressSize;
			byte b;
			ushort num3;
			uint num4;
			SymbolResult symbol;
			ulong value;
			FormatterFlowControl flowControl;
			NumberFormattingOptions numberOptions;
			FormatterOperandOptions operandOptions;
			ISymbolResolver symbolResolver;
			ulong num2;
			NumberKind numberKind;
			string text;
			switch (opKind)
			{
			case Iced.Intel.IntelFormatterInternal.InstrOpKind.Register:
				FormatRegister(output, in instruction, operand, instructionIndex, opInfo.GetOpRegister(operand));
				break;
			case Iced.Intel.IntelFormatterInternal.InstrOpKind.NearBranch64:
				addressSize = 8;
				num2 = instruction.NearBranch64;
				numberKind = NumberKind.UInt64;
				goto IL_011e;
			case Iced.Intel.IntelFormatterInternal.InstrOpKind.NearBranch32:
				addressSize = 4;
				num2 = instruction.NearBranch32;
				numberKind = NumberKind.UInt32;
				goto IL_011e;
			case Iced.Intel.IntelFormatterInternal.InstrOpKind.NearBranch16:
				addressSize = 2;
				num2 = instruction.NearBranch16;
				numberKind = NumberKind.UInt16;
				goto IL_011e;
			case Iced.Intel.IntelFormatterInternal.InstrOpKind.FarBranch32:
				addressSize = 4;
				num2 = instruction.FarBranch32;
				numberKind = NumberKind.UInt32;
				goto IL_0283;
			case Iced.Intel.IntelFormatterInternal.InstrOpKind.FarBranch16:
				addressSize = 2;
				num2 = instruction.FarBranch16;
				numberKind = NumberKind.UInt16;
				goto IL_0283;
			case Iced.Intel.IntelFormatterInternal.InstrOpKind.Immediate8:
				b = instruction.Immediate8;
				goto IL_04cb;
			case Iced.Intel.IntelFormatterInternal.InstrOpKind.Immediate8_2nd:
				b = instruction.Immediate8_2nd;
				goto IL_04cb;
			case Iced.Intel.IntelFormatterInternal.InstrOpKind.DeclareByte:
				b = instruction.GetDeclareByteValue(operand);
				goto IL_04cb;
			case Iced.Intel.IntelFormatterInternal.InstrOpKind.Immediate16:
				num3 = instruction.Immediate16;
				goto IL_05ce;
			case Iced.Intel.IntelFormatterInternal.InstrOpKind.Immediate8to16:
				num3 = (ushort)instruction.Immediate8to16;
				goto IL_05ce;
			case Iced.Intel.IntelFormatterInternal.InstrOpKind.DeclareWord:
				num3 = instruction.GetDeclareWordValue(operand);
				goto IL_05ce;
			case Iced.Intel.IntelFormatterInternal.InstrOpKind.Immediate32:
				num4 = instruction.Immediate32;
				goto IL_06d1;
			case Iced.Intel.IntelFormatterInternal.InstrOpKind.Immediate8to32:
				num4 = (uint)instruction.Immediate8to32;
				goto IL_06d1;
			case Iced.Intel.IntelFormatterInternal.InstrOpKind.DeclareDword:
				num4 = instruction.GetDeclareDwordValue(operand);
				goto IL_06d1;
			case Iced.Intel.IntelFormatterInternal.InstrOpKind.Immediate32to64:
				num2 = (ulong)instruction.Immediate32to64;
				goto IL_07e0;
			case Iced.Intel.IntelFormatterInternal.InstrOpKind.Immediate8to64:
				num2 = (ulong)instruction.Immediate8to64;
				goto IL_07e0;
			case Iced.Intel.IntelFormatterInternal.InstrOpKind.Immediate64:
				num2 = instruction.Immediate64;
				goto IL_07e0;
			case Iced.Intel.IntelFormatterInternal.InstrOpKind.DeclareQword:
				num2 = instruction.GetDeclareQwordValue(operand);
				goto IL_07e0;
			case Iced.Intel.IntelFormatterInternal.InstrOpKind.MemorySegSI:
				FormatMemory(output, in instruction, operand, instructionIndex, instruction.MemorySegment, Register.SI, Register.None, 0, 0, 0L, 2, opInfo.Flags);
				break;
			case Iced.Intel.IntelFormatterInternal.InstrOpKind.MemorySegESI:
				FormatMemory(output, in instruction, operand, instructionIndex, instruction.MemorySegment, Register.ESI, Register.None, 0, 0, 0L, 4, opInfo.Flags);
				break;
			case Iced.Intel.IntelFormatterInternal.InstrOpKind.MemorySegRSI:
				FormatMemory(output, in instruction, operand, instructionIndex, instruction.MemorySegment, Register.RSI, Register.None, 0, 0, 0L, 8, opInfo.Flags);
				break;
			case Iced.Intel.IntelFormatterInternal.InstrOpKind.MemorySegDI:
				FormatMemory(output, in instruction, operand, instructionIndex, instruction.MemorySegment, Register.DI, Register.None, 0, 0, 0L, 2, opInfo.Flags);
				break;
			case Iced.Intel.IntelFormatterInternal.InstrOpKind.MemorySegEDI:
				FormatMemory(output, in instruction, operand, instructionIndex, instruction.MemorySegment, Register.EDI, Register.None, 0, 0, 0L, 4, opInfo.Flags);
				break;
			case Iced.Intel.IntelFormatterInternal.InstrOpKind.MemorySegRDI:
				FormatMemory(output, in instruction, operand, instructionIndex, instruction.MemorySegment, Register.RDI, Register.None, 0, 0, 0L, 8, opInfo.Flags);
				break;
			case Iced.Intel.IntelFormatterInternal.InstrOpKind.MemoryESDI:
				FormatMemory(output, in instruction, operand, instructionIndex, Register.ES, Register.DI, Register.None, 0, 0, 0L, 2, opInfo.Flags);
				break;
			case Iced.Intel.IntelFormatterInternal.InstrOpKind.MemoryESEDI:
				FormatMemory(output, in instruction, operand, instructionIndex, Register.ES, Register.EDI, Register.None, 0, 0, 0L, 4, opInfo.Flags);
				break;
			case Iced.Intel.IntelFormatterInternal.InstrOpKind.MemoryESRDI:
				FormatMemory(output, in instruction, operand, instructionIndex, Register.ES, Register.RDI, Register.None, 0, 0, 0L, 8, opInfo.Flags);
				break;
			case Iced.Intel.IntelFormatterInternal.InstrOpKind.Memory:
			{
				int memoryDisplSize = instruction.MemoryDisplSize;
				Register memoryBase = instruction.MemoryBase;
				Register indexReg = instruction.MemoryIndex;
				int addressSizeInBytes = InstructionUtils.GetAddressSizeInBytes(memoryBase, indexReg, memoryDisplSize, instruction.CodeSize);
				long displ = (long)((addressSizeInBytes != 8) ? instruction.MemoryDisplacement32 : instruction.MemoryDisplacement64);
				if ((opInfo.Flags & Iced.Intel.IntelFormatterInternal.InstrOpInfoFlags.IgnoreIndexReg) != 0)
				{
					indexReg = Register.None;
				}
				FormatMemory(output, in instruction, operand, instructionIndex, instruction.MemorySegment, memoryBase, indexReg, instruction.InternalMemoryIndexScale, memoryDisplSize, displ, addressSizeInBytes, opInfo.Flags);
				break;
			}
			default:
				{
					throw new InvalidOperationException();
				}
				IL_011e:
				numberOptions = NumberFormattingOptions.CreateBranchInternal(options);
				operandOptions = new FormatterOperandOptions((!options.ShowBranchSize) ? FormatterOperandOptions.Flags.NoBranchSize : FormatterOperandOptions.Flags.None);
				optionsProvider?.GetOperandOptions(in instruction, operand, instructionIndex, ref operandOptions, ref numberOptions);
				if ((symbolResolver = this.symbolResolver) != null && symbolResolver.TryGetSymbol(in instruction, operand, instructionIndex, num2, addressSize, out symbol))
				{
					FormatFlowControl(output, opInfo.Flags, operandOptions);
					output.Write(in instruction, operand, instructionIndex, options, in numberFormatter, in numberOptions, num2, in symbol, options.ShowSymbolAddress);
					break;
				}
				flowControl = FormatterUtils.GetFlowControl(in instruction);
				FormatFlowControl(output, opInfo.Flags, operandOptions);
				output.WriteNumber(in instruction, operand, instructionIndex, opKind switch
				{
					Iced.Intel.IntelFormatterInternal.InstrOpKind.NearBranch32 => numberFormatter.FormatUInt32(options, in numberOptions, instruction.NearBranch32, numberOptions.LeadingZeros), 
					Iced.Intel.IntelFormatterInternal.InstrOpKind.NearBranch64 => numberFormatter.FormatUInt64(options, in numberOptions, instruction.NearBranch64, numberOptions.LeadingZeros), 
					_ => numberFormatter.FormatUInt16(options, in numberOptions, instruction.NearBranch16, numberOptions.LeadingZeros), 
				}, num2, numberKind, FormatterUtils.IsCall(flowControl) ? FormatterTextKind.FunctionAddress : FormatterTextKind.LabelAddress);
				break;
				IL_07e0:
				numberOptions = NumberFormattingOptions.CreateImmediateInternal(options);
				operandOptions = default(FormatterOperandOptions);
				optionsProvider?.GetOperandOptions(in instruction, operand, instructionIndex, ref operandOptions, ref numberOptions);
				if ((symbolResolver = this.symbolResolver) != null && symbolResolver.TryGetSymbol(in instruction, operand, instructionIndex, num2, 8, out symbol))
				{
					output.Write(in instruction, operand, instructionIndex, options, in numberFormatter, in numberOptions, num2, in symbol, options.ShowSymbolAddress);
					break;
				}
				value = num2;
				if (numberOptions.SignedNumber)
				{
					numberKind = NumberKind.Int64;
					if ((long)num2 < 0L)
					{
						output.Write("-", FormatterTextKind.Operator);
						num2 = 0L - num2;
					}
				}
				else
				{
					numberKind = NumberKind.UInt64;
				}
				text = numberFormatter.FormatUInt64(options, in numberOptions, num2);
				output.WriteNumber(in instruction, operand, instructionIndex, text, value, numberKind, FormatterTextKind.Number);
				break;
				IL_0283:
				numberOptions = NumberFormattingOptions.CreateBranchInternal(options);
				operandOptions = new FormatterOperandOptions((!options.ShowBranchSize) ? FormatterOperandOptions.Flags.NoBranchSize : FormatterOperandOptions.Flags.None);
				optionsProvider?.GetOperandOptions(in instruction, operand, instructionIndex, ref operandOptions, ref numberOptions);
				if ((symbolResolver = this.symbolResolver) != null && symbolResolver.TryGetSymbol(in instruction, operand, instructionIndex, (uint)num2, addressSize, out symbol))
				{
					FormatFlowControl(output, opInfo.Flags, operandOptions);
					output.Write(in instruction, operand, instructionIndex, options, in numberFormatter, in numberOptions, num2, in symbol, options.ShowSymbolAddress);
					output.Write(",", FormatterTextKind.Punctuation);
					if (options.SpaceAfterOperandSeparator)
					{
						output.Write(" ", FormatterTextKind.Text);
					}
					if (!symbolResolver.TryGetSymbol(in instruction, operand + 1, instructionIndex, instruction.FarBranchSelector, 2, out var symbol2))
					{
						text = numberFormatter.FormatUInt16(options, in numberOptions, instruction.FarBranchSelector, numberOptions.LeadingZeros);
						output.WriteNumber(in instruction, operand, instructionIndex, text, instruction.FarBranchSelector, NumberKind.UInt16, FormatterTextKind.SelectorValue);
					}
					else
					{
						output.Write(in instruction, operand, instructionIndex, options, in numberFormatter, in numberOptions, instruction.FarBranchSelector, in symbol2, options.ShowSymbolAddress);
					}
				}
				else
				{
					flowControl = FormatterUtils.GetFlowControl(in instruction);
					FormatFlowControl(output, opInfo.Flags, operandOptions);
					text = ((opKind != Iced.Intel.IntelFormatterInternal.InstrOpKind.FarBranch32) ? numberFormatter.FormatUInt16(options, in numberOptions, instruction.FarBranch16, numberOptions.LeadingZeros) : numberFormatter.FormatUInt32(options, in numberOptions, instruction.FarBranch32, numberOptions.LeadingZeros));
					output.WriteNumber(in instruction, operand, instructionIndex, text, num2, numberKind, FormatterUtils.IsCall(flowControl) ? FormatterTextKind.FunctionAddress : FormatterTextKind.LabelAddress);
					output.Write(",", FormatterTextKind.Punctuation);
					if (options.SpaceAfterOperandSeparator)
					{
						output.Write(" ", FormatterTextKind.Text);
					}
					text = numberFormatter.FormatUInt16(options, in numberOptions, instruction.FarBranchSelector, numberOptions.LeadingZeros);
					output.WriteNumber(in instruction, operand, instructionIndex, text, instruction.FarBranchSelector, NumberKind.UInt16, FormatterTextKind.SelectorValue);
				}
				break;
				IL_04cb:
				numberOptions = NumberFormattingOptions.CreateImmediateInternal(options);
				operandOptions = default(FormatterOperandOptions);
				optionsProvider?.GetOperandOptions(in instruction, operand, instructionIndex, ref operandOptions, ref numberOptions);
				if ((symbolResolver = this.symbolResolver) != null && symbolResolver.TryGetSymbol(in instruction, operand, instructionIndex, b, 1, out symbol))
				{
					output.Write(in instruction, operand, instructionIndex, options, in numberFormatter, in numberOptions, b, in symbol, options.ShowSymbolAddress);
					break;
				}
				if (numberOptions.SignedNumber)
				{
					num2 = (ulong)(sbyte)b;
					numberKind = NumberKind.Int8;
					if ((sbyte)b < 0)
					{
						output.Write("-", FormatterTextKind.Operator);
						b = (byte)(-(sbyte)b);
					}
				}
				else
				{
					num2 = b;
					numberKind = NumberKind.UInt8;
				}
				text = numberFormatter.FormatUInt8(options, in numberOptions, b);
				output.WriteNumber(in instruction, operand, instructionIndex, text, num2, numberKind, FormatterTextKind.Number);
				break;
				IL_05ce:
				numberOptions = NumberFormattingOptions.CreateImmediateInternal(options);
				operandOptions = default(FormatterOperandOptions);
				optionsProvider?.GetOperandOptions(in instruction, operand, instructionIndex, ref operandOptions, ref numberOptions);
				if ((symbolResolver = this.symbolResolver) != null && symbolResolver.TryGetSymbol(in instruction, operand, instructionIndex, num3, 2, out symbol))
				{
					output.Write(in instruction, operand, instructionIndex, options, in numberFormatter, in numberOptions, num3, in symbol, options.ShowSymbolAddress);
					break;
				}
				if (numberOptions.SignedNumber)
				{
					num2 = (ulong)(short)num3;
					numberKind = NumberKind.Int16;
					if ((short)num3 < 0)
					{
						output.Write("-", FormatterTextKind.Operator);
						num3 = (ushort)(-(short)num3);
					}
				}
				else
				{
					num2 = num3;
					numberKind = NumberKind.UInt16;
				}
				text = numberFormatter.FormatUInt16(options, in numberOptions, num3);
				output.WriteNumber(in instruction, operand, instructionIndex, text, num2, numberKind, FormatterTextKind.Number);
				break;
				IL_06d1:
				numberOptions = NumberFormattingOptions.CreateImmediateInternal(options);
				operandOptions = default(FormatterOperandOptions);
				optionsProvider?.GetOperandOptions(in instruction, operand, instructionIndex, ref operandOptions, ref numberOptions);
				if ((symbolResolver = this.symbolResolver) != null && symbolResolver.TryGetSymbol(in instruction, operand, instructionIndex, num4, 4, out symbol))
				{
					output.Write(in instruction, operand, instructionIndex, options, in numberFormatter, in numberOptions, num4, in symbol, options.ShowSymbolAddress);
					break;
				}
				if (numberOptions.SignedNumber)
				{
					num2 = (ulong)(int)num4;
					numberKind = NumberKind.Int32;
					if ((int)num4 < 0)
					{
						output.Write("-", FormatterTextKind.Operator);
						num4 = 0 - num4;
					}
				}
				else
				{
					num2 = num4;
					numberKind = NumberKind.UInt32;
				}
				text = numberFormatter.FormatUInt32(options, in numberOptions, num4);
				output.WriteNumber(in instruction, operand, instructionIndex, text, num2, numberKind, FormatterTextKind.Number);
				break;
			}
			if (operand == 0 && instruction.HasOpMask_or_ZeroingMasking)
			{
				if (instruction.HasOpMask && (opInfo.Flags & Iced.Intel.IntelFormatterInternal.InstrOpInfoFlags.IgnoreOpMask) == 0)
				{
					output.Write("{", FormatterTextKind.Punctuation);
					FormatRegister(output, in instruction, operand, instructionIndex, instruction.OpMask);
					output.Write("}", FormatterTextKind.Punctuation);
				}
				if (instruction.ZeroingMasking)
				{
					FormatDecorator(output, in instruction, operand, instructionIndex, str_z, DecoratorKind.ZeroingMasking);
				}
			}
			if (operand == 0 && instruction.HasRoundingControlOrSae)
			{
				RoundingControl roundingControl = instruction.RoundingControl;
				if (roundingControl != 0 && FormatterUtils.CanShowRoundingControl(in instruction, options))
				{
					FormatterString text2 = ((!IcedConstants.IsMvex(instruction.Code)) ? rcSaeStrings[(int)(roundingControl - 1)] : (instruction.SuppressAllExceptions ? rcSaeStrings[(int)(roundingControl - 1)] : rcStrings[(int)(roundingControl - 1)]));
					FormatDecorator(output, in instruction, operand, instructionIndex, text2, DecoratorKind.RoundingControl);
				}
				else if (instruction.SuppressAllExceptions)
				{
					FormatDecorator(output, in instruction, operand, instructionIndex, str_sae, DecoratorKind.SuppressAllExceptions);
				}
			}
			if (num != operand)
			{
				return;
			}
			MvexRegMemConv mvexRegMemConv = instruction.MvexRegMemConv;
			if (mvexRegMemConv == MvexRegMemConv.None)
			{
				return;
			}
			MvexInfo mvexInfo = new MvexInfo(instruction.Code);
			if (mvexInfo.ConvFn != 0)
			{
				FormatterString text3 = (mvexInfo.IsConvFn32 ? mvexRegMemConsts32 : mvexRegMemConsts64)[(int)mvexRegMemConv];
				if (text3.Length != 0)
				{
					FormatDecorator(output, in instruction, operand, instructionIndex, text3, DecoratorKind.SwizzleMemConv);
				}
			}
		}

		private void FormatFlowControl(FormatterOutput output, Iced.Intel.IntelFormatterInternal.InstrOpInfoFlags flags, FormatterOperandOptions operandOptions)
		{
			if (!operandOptions.BranchSize)
			{
				return;
			}
			FormatterString[] array = branchInfos[((int)flags >> 3) & 1];
			if (array != null)
			{
				FormatterString[] array2 = array;
				foreach (FormatterString keyword in array2)
				{
					FormatKeyword(output, keyword);
					output.Write(" ", FormatterTextKind.Text);
				}
			}
		}

		private void FormatDecorator(FormatterOutput output, in Instruction instruction, int operand, int instructionOperand, FormatterString text, DecoratorKind decorator)
		{
			output.Write("{", FormatterTextKind.Punctuation);
			output.WriteDecorator(in instruction, operand, instructionOperand, text.Get(options.UppercaseDecorators || options.UppercaseAll), decorator);
			output.Write("}", FormatterTextKind.Punctuation);
		}

		[MethodImpl(MethodImplOptions.AggressiveInlining)]
		private string ToRegisterString(Register reg)
		{
			if (options.PreferST0 && reg == Register.DontUse0)
			{
				reg = Register.ST0;
			}
			FormatterString formatterString = allRegisters[(int)reg];
			return formatterString.Get(options.UppercaseRegisters || options.UppercaseAll);
		}

		[MethodImpl(MethodImplOptions.NoInlining)]
		private void FormatRegister(FormatterOutput output, in Instruction instruction, int operand, int instructionOperand, Register reg)
		{
			output.WriteRegister(in instruction, operand, instructionOperand, ToRegisterString(reg), reg);
		}

		private void FormatMemory(FormatterOutput output, in Instruction instruction, int operand, int instructionOperand, Register segReg, Register baseReg, Register indexReg, int scale, int displSize, long displ, int addrSize, Iced.Intel.IntelFormatterInternal.InstrOpInfoFlags flags)
		{
			NumberFormattingOptions numberOptions = NumberFormattingOptions.CreateDisplacementInternal(options);
			FormatterOperandOptions operandOptions = new FormatterOperandOptions(options.MemorySizeOptions);
			operandOptions.RipRelativeAddresses = options.RipRelativeAddresses;
			optionsProvider?.GetOperandOptions(in instruction, operand, instructionOperand, ref operandOptions, ref numberOptions);
			ulong address;
			switch (baseReg)
			{
			case Register.RIP:
				address = (ulong)displ;
				if (options.RipRelativeAddresses)
				{
					displ -= (long)instruction.NextIP;
				}
				else
				{
					baseReg = Register.None;
				}
				displSize = 8;
				break;
			case Register.EIP:
				address = (uint)displ;
				if (options.RipRelativeAddresses)
				{
					displ = (int)displ - (int)instruction.NextIP32;
				}
				else
				{
					baseReg = Register.None;
				}
				displSize = 4;
				break;
			default:
				address = (ulong)displ;
				break;
			}
			ISymbolResolver symbolResolver = this.symbolResolver;
			bool flag;
			SymbolResult symbol;
			if (symbolResolver != null)
			{
				flag = symbolResolver.TryGetSymbol(in instruction, operand, instructionOperand, address, addrSize, out symbol);
			}
			else
			{
				flag = false;
				symbol = default(SymbolResult);
			}
			bool flag2 = scale != 0 || options.AlwaysShowScale;
			if (!flag2 && baseReg == Register.None)
			{
				flag2 = true;
			}
			if (addrSize == 2 || !FormatterUtils.ShowIndexScale(in instruction, options))
			{
				flag2 = false;
			}
			FormatMemorySize(output, ref symbol, instruction.MemorySize, flags, operandOptions, flag);
			CodeSize codeSize = instruction.CodeSize;
			Register segmentPrefix = instruction.SegmentPrefix;
			bool flag3 = segmentPrefix == Register.DS && FormatterUtils.IsNotrackPrefixBranch(instruction.Code) && ((codeSize != CodeSize.Code16 && codeSize != CodeSize.Code32) || (baseReg != Register.BP && baseReg != Register.EBP && baseReg != Register.ESP));
			if (options.AlwaysShowSegmentRegister || (segmentPrefix != 0 && !flag3 && FormatterUtils.ShowSegmentPrefix(Register.None, in instruction, options)))
			{
				FormatRegister(output, in instruction, operand, instructionOperand, segReg);
				output.Write(":", FormatterTextKind.Punctuation);
			}
			output.Write("[", FormatterTextKind.Punctuation);
			if (options.SpaceAfterMemoryBracket)
			{
				output.Write(" ", FormatterTextKind.Text);
			}
			bool flag4 = false;
			if (baseReg != 0)
			{
				FormatRegister(output, in instruction, operand, instructionOperand, baseReg);
				flag4 = true;
			}
			if (indexReg != 0)
			{
				if (flag4)
				{
					if (options.SpaceBetweenMemoryAddOperators)
					{
						output.Write(" ", FormatterTextKind.Text);
					}
					output.Write("+", FormatterTextKind.Operator);
					if (options.SpaceBetweenMemoryAddOperators)
					{
						output.Write(" ", FormatterTextKind.Text);
					}
				}
				flag4 = true;
				if (!flag2)
				{
					FormatRegister(output, in instruction, operand, instructionOperand, indexReg);
				}
				else if (options.ScaleBeforeIndex)
				{
					output.WriteNumber(in instruction, operand, instructionOperand, scaleNumbers[scale], (uint)(1 << scale), NumberKind.Int32, FormatterTextKind.Number);
					if (options.SpaceBetweenMemoryMulOperators)
					{
						output.Write(" ", FormatterTextKind.Text);
					}
					output.Write("*", FormatterTextKind.Operator);
					if (options.SpaceBetweenMemoryMulOperators)
					{
						output.Write(" ", FormatterTextKind.Text);
					}
					FormatRegister(output, in instruction, operand, instructionOperand, indexReg);
				}
				else
				{
					FormatRegister(output, in instruction, operand, instructionOperand, indexReg);
					if (options.SpaceBetweenMemoryMulOperators)
					{
						output.Write(" ", FormatterTextKind.Text);
					}
					output.Write("*", FormatterTextKind.Operator);
					if (options.SpaceBetweenMemoryMulOperators)
					{
						output.Write(" ", FormatterTextKind.Text);
					}
					output.WriteNumber(in instruction, operand, instructionOperand, scaleNumbers[scale], (uint)(1 << scale), NumberKind.Int32, FormatterTextKind.Number);
				}
			}
			if (flag)
			{
				if (flag4)
				{
					if (options.SpaceBetweenMemoryAddOperators)
					{
						output.Write(" ", FormatterTextKind.Text);
					}
					if ((symbol.Flags & SymbolFlags.Signed) != 0)
					{
						output.Write("-", FormatterTextKind.Operator);
					}
					else
					{
						output.Write("+", FormatterTextKind.Operator);
					}
					if (options.SpaceBetweenMemoryAddOperators)
					{
						output.Write(" ", FormatterTextKind.Text);
					}
				}
				else if ((symbol.Flags & SymbolFlags.Signed) != 0)
				{
					output.Write("-", FormatterTextKind.Operator);
				}
				output.Write(in instruction, operand, instructionOperand, options, in numberFormatter, in numberOptions, address, in symbol, options.ShowSymbolAddress, writeMinusIfSigned: false, options.SpaceBetweenMemoryAddOperators);
			}
			else if (!flag4 || (displSize != 0 && (options.ShowZeroDisplacements || displ != 0L)))
			{
				ulong value = (ulong)displ;
				bool flag5;
				if (flag4)
				{
					flag5 = numberOptions.SignedNumber;
					if (options.SpaceBetweenMemoryAddOperators)
					{
						output.Write(" ", FormatterTextKind.Text);
					}
					switch (addrSize)
					{
					case 8:
						if (!numberOptions.SignedNumber)
						{
							output.Write("+", FormatterTextKind.Operator);
						}
						else if (displ < 0)
						{
							displ = -displ;
							output.Write("-", FormatterTextKind.Operator);
						}
						else
						{
							output.Write("+", FormatterTextKind.Operator);
						}
						if (numberOptions.DisplacementLeadingZeros)
						{
							displSize = 4;
						}
						break;
					case 4:
						if (!numberOptions.SignedNumber)
						{
							output.Write("+", FormatterTextKind.Operator);
						}
						else if ((int)displ < 0)
						{
							displ = (uint)(-(int)displ);
							output.Write("-", FormatterTextKind.Operator);
						}
						else
						{
							output.Write("+", FormatterTextKind.Operator);
						}
						if (numberOptions.DisplacementLeadingZeros)
						{
							displSize = 4;
						}
						break;
					default:
						if (!numberOptions.SignedNumber)
						{
							output.Write("+", FormatterTextKind.Operator);
						}
						else if ((short)displ < 0)
						{
							displ = (ushort)(-(short)displ);
							output.Write("-", FormatterTextKind.Operator);
						}
						else
						{
							output.Write("+", FormatterTextKind.Operator);
						}
						if (numberOptions.DisplacementLeadingZeros)
						{
							displSize = 2;
						}
						break;
					}
					if (options.SpaceBetweenMemoryAddOperators)
					{
						output.Write(" ", FormatterTextKind.Text);
					}
				}
				else
				{
					flag5 = false;
				}
				string text;
				NumberKind numberKind;
				if (displSize <= 1 && (ulong)displ <= 255uL)
				{
					text = numberFormatter.FormatDisplUInt8(options, in numberOptions, (byte)displ);
					numberKind = ((!flag5) ? NumberKind.UInt8 : NumberKind.Int8);
				}
				else if (displSize <= 2 && (ulong)displ <= 65535uL)
				{
					text = numberFormatter.FormatDisplUInt16(options, in numberOptions, (ushort)displ);
					numberKind = (flag5 ? NumberKind.Int16 : NumberKind.UInt16);
				}
				else if (displSize <= 4 && (ulong)displ <= 4294967295uL)
				{
					text = numberFormatter.FormatDisplUInt32(options, in numberOptions, (uint)displ);
					numberKind = (flag5 ? NumberKind.Int32 : NumberKind.UInt32);
				}
				else
				{
					if (displSize > 8)
					{
						throw new InvalidOperationException();
					}
					text = numberFormatter.FormatDisplUInt64(options, in numberOptions, (ulong)displ);
					numberKind = (flag5 ? NumberKind.Int64 : NumberKind.UInt64);
				}
				output.WriteNumber(in instruction, operand, instructionOperand, text, value, numberKind, FormatterTextKind.Number);
			}
			if (options.SpaceAfterMemoryBracket)
			{
				output.Write(" ", FormatterTextKind.Text);
			}
			output.Write("]", FormatterTextKind.Punctuation);
			MemorySize memorySize = instruction.MemorySize;
			FormatterString bcstTo = allMemorySizes[(int)memorySize].bcstTo;
			if (bcstTo.Length != 0)
			{
				FormatDecorator(output, in instruction, operand, instructionOperand, bcstTo, DecoratorKind.Broadcast);
			}
			if (instruction.IsMvexEvictionHint)
			{
				FormatDecorator(output, in instruction, operand, instructionOperand, str_eh, DecoratorKind.EvictionHint);
			}
		}

		private void FormatMemorySize(FormatterOutput output, ref SymbolResult symbol, MemorySize memSize, Iced.Intel.IntelFormatterInternal.InstrOpInfoFlags flags, FormatterOperandOptions operandOptions, bool useSymbol)
		{
			MemorySizeOptions memorySizeOptions = operandOptions.MemorySizeOptions;
			if (memorySizeOptions == MemorySizeOptions.Never || (flags & Iced.Intel.IntelFormatterInternal.InstrOpInfoFlags.MemSize_Nothing) != 0)
			{
				return;
			}
			Iced.Intel.IntelFormatterInternal.MemorySizes.Info info = allMemorySizes[(int)memSize];
			switch (memorySizeOptions)
			{
			case MemorySizeOptions.Default:
				if (useSymbol && symbol.HasSymbolSize)
				{
					if (IsSameMemSize(info.keywords, ref symbol))
					{
						return;
					}
				}
				else if ((flags & Iced.Intel.IntelFormatterInternal.InstrOpInfoFlags.ShowNoMemSize_ForceSize) == 0)
				{
					return;
				}
				break;
			case MemorySizeOptions.Minimal:
				if ((useSymbol && symbol.HasSymbolSize && IsSameMemSize(info.keywords, ref symbol)) || (flags & Iced.Intel.IntelFormatterInternal.InstrOpInfoFlags.ShowMinMemSize_ForceSize) == 0)
				{
					return;
				}
				break;
			}
			FormatterString[] keywords = info.keywords;
			foreach (FormatterString keyword in keywords)
			{
				FormatKeyword(output, keyword);
				output.Write(" ", FormatterTextKind.Text);
			}
		}

		private bool IsSameMemSize(FormatterString[] memSizeStrings, ref SymbolResult symbol)
		{
			FormatterString[] keywords = allMemorySizes[(int)symbol.SymbolSize].keywords;
			return IsSameMemSize(memSizeStrings, keywords);
		}

		private static bool IsSameMemSize(FormatterString[] a, FormatterString[] b)
		{
			if (a == b)
			{
				return true;
			}
			if (a.Length != b.Length)
			{
				return false;
			}
			for (int i = 0; i < a.Length; i++)
			{
				if (a[i].Get(upper: false) != b[i].Get(upper: false))
				{
					return false;
				}
			}
			return true;
		}

		private void FormatKeyword(FormatterOutput output, FormatterString keyword)
		{
			output.Write(keyword.Get(options.UppercaseKeywords || options.UppercaseAll), FormatterTextKind.Keyword);
		}

		public override string Format(Register register)
		{
			return ToRegisterString(register);
		}

		public override string FormatInt8(sbyte value, in NumberFormattingOptions numberOptions)
		{
			return numberFormatter.FormatInt8(options, in numberOptions, value);
		}

		public override string FormatInt16(short value, in NumberFormattingOptions numberOptions)
		{
			return numberFormatter.FormatInt16(options, in numberOptions, value);
		}

		public override string FormatInt32(int value, in NumberFormattingOptions numberOptions)
		{
			return numberFormatter.FormatInt32(options, in numberOptions, value);
		}

		public override string FormatInt64(long value, in NumberFormattingOptions numberOptions)
		{
			return numberFormatter.FormatInt64(options, in numberOptions, value);
		}

		public override string FormatUInt8(byte value, in NumberFormattingOptions numberOptions)
		{
			return numberFormatter.FormatUInt8(options, in numberOptions, value);
		}

		public override string FormatUInt16(ushort value, in NumberFormattingOptions numberOptions)
		{
			return numberFormatter.FormatUInt16(options, in numberOptions, value);
		}

		public override string FormatUInt32(uint value, in NumberFormattingOptions numberOptions)
		{
			return numberFormatter.FormatUInt32(options, in numberOptions, value);
		}

		public override string FormatUInt64(ulong value, in NumberFormattingOptions numberOptions)
		{
			return numberFormatter.FormatUInt64(options, in numberOptions, value);
		}
	}
	public interface ISymbolResolver
	{
		bool TryGetSymbol(in Instruction instruction, int operand, int instructionOperand, ulong address, int addressSize, out SymbolResult symbol);
	}
	[Flags]
	public enum SymbolFlags : uint
	{
		None = 0u,
		Relative = 1u,
		Signed = 2u,
		HasSymbolSize = 4u
	}
	public readonly struct SymbolResult
	{
		private const FormatterTextKind DefaultKind = FormatterTextKind.Label;

		public readonly ulong Address;

		public readonly TextInfo Text;

		public readonly SymbolFlags Flags;

		public readonly MemorySize SymbolSize;

		public bool HasSymbolSize => (Flags & SymbolFlags.HasSymbolSize) != 0;

		public SymbolResult(ulong address, string text)
		{
			Address = address;
			Text = new TextInfo(text, FormatterTextKind.Label);
			Flags = SymbolFlags.None;
			SymbolSize = MemorySize.Unknown;
		}

		public SymbolResult(ulong address, string text, MemorySize size)
		{
			Address = address;
			Text = new TextInfo(text, FormatterTextKind.Label);
			Flags = SymbolFlags.HasSymbolSize;
			SymbolSize = size;
		}

		public SymbolResult(ulong address, string text, FormatterTextKind color)
		{
			Address = address;
			Text = new TextInfo(text, color);
			Flags = SymbolFlags.None;
			SymbolSize = MemorySize.Unknown;
		}

		public SymbolResult(ulong address, string text, FormatterTextKind color, SymbolFlags flags)
		{
			Address = address;
			Text = new TextInfo(text, color);
			Flags = flags & ~SymbolFlags.HasSymbolSize;
			SymbolSize = MemorySize.Unknown;
		}

		public SymbolResult(ulong address, TextInfo text)
		{
			Address = address;
			Text = text;
			Flags = SymbolFlags.None;
			SymbolSize = MemorySize.Unknown;
		}

		public SymbolResult(ulong address, TextInfo text, MemorySize size)
		{
			Address = address;
			Text = text;
			Flags = SymbolFlags.HasSymbolSize;
			SymbolSize = size;
		}

		public SymbolResult(ulong address, TextInfo text, SymbolFlags flags)
		{
			Address = address;
			Text = text;
			Flags = flags & ~SymbolFlags.HasSymbolSize;
			SymbolSize = MemorySize.Unknown;
		}

		public SymbolResult(ulong address, TextInfo text, SymbolFlags flags, MemorySize size)
		{
			Address = address;
			Text = text;
			Flags = flags | SymbolFlags.HasSymbolSize;
			SymbolSize = size;
		}
	}
	public readonly struct TextInfo
	{
		public readonly TextPart Text;

		public readonly TextPart[]? TextArray;

		public bool IsDefault
		{
			get
			{
				if (TextArray == null)
				{
					return Text.Text == null;
				}
				return false;
			}
		}

		public TextInfo(string text, FormatterTextKind color)
		{
			Text = new TextPart(text, color);
			TextArray = null;
		}

		public TextInfo(TextPart text)
		{
			Text = text;
			TextArray = null;
		}

		public TextInfo(TextPart[] text)
		{
			Text = default(TextPart);
			TextArray = text;
		}
	}
	public readonly struct TextPart
	{
		public readonly string Text;

		public readonly FormatterTextKind Color;

		public TextPart(string text, FormatterTextKind color)
		{
			Text = text;
			Color = color;
		}
	}
	public enum MandatoryPrefix
	{
		None,
		PNP,
		P66,
		PF3,
		PF2
	}
	internal enum MandatoryPrefixByte : uint
	{
		None,
		P66,
		PF3,
		PF2
	}
	public sealed class MasmFormatter : Formatter
	{
		private readonly FormatterOptions options;

		private readonly ISymbolResolver symbolResolver;

		private readonly IFormatterOptionsProvider optionsProvider;

		private readonly FormatterString[] allRegisters;

		private readonly Iced.Intel.MasmFormatterInternal.InstrInfo[] instrInfos;

		private readonly Iced.Intel.MasmFormatterInternal.MemorySizes.Info[] allMemorySizes;

		private readonly NumberFormatter numberFormatter;

		private readonly FormatterString[] rcStrings;

		private readonly FormatterString[] rcSaeStrings;

		private readonly string[] scaleNumbers;

		private readonly FormatterString[] mvexRegMemConsts32;

		private readonly FormatterString[] mvexRegMemConsts64;

		private static readonly FormatterString str_bnd = new FormatterString("bnd");

		private static readonly FormatterString str_far = new FormatterString("far");

		private static readonly FormatterString str_hnt = new FormatterString("hnt");

		private static readonly FormatterString str_ht = new FormatterString("ht");

		private static readonly FormatterString str_lock = new FormatterString("lock");

		private static readonly FormatterString str_near = new FormatterString("near");

		private static readonly FormatterString str_notrack = new FormatterString("notrack");

		private static readonly FormatterString str_offset = new FormatterString("offset");

		private static readonly FormatterString str_ptr = new FormatterString("ptr");

		private static readonly FormatterString str_rep = new FormatterString("rep");

		private static readonly FormatterString[] str_repe = new FormatterString[2]
		{
			new FormatterString("repe"),
			new FormatterString("repz")
		};

		private static readonly FormatterString[] str_repne = new FormatterString[2]
		{
			new FormatterString("repne"),
			new FormatterString("repnz")
		};

		private static readonly FormatterString str_sae = new FormatterString("sae");

		private static readonly FormatterString str_short = new FormatterString("short");

		private static readonly FormatterString str_xacquire = new FormatterString("xacquire");

		private static readonly FormatterString str_xrelease = new FormatterString("xrelease");

		private static readonly FormatterString str_z = new FormatterString("z");

		private static readonly FormatterString[] s_rcStrings = new FormatterString[4]
		{
			new FormatterString("rn"),
			new FormatterString("rd"),
			new FormatterString("ru"),
			new FormatterString("rz")
		};

		private static readonly FormatterString[] s_rcSaeStrings = new FormatterString[4]
		{
			new FormatterString("rn-sae"),
			new FormatterString("rd-sae"),
			new FormatterString("ru-sae"),
			new FormatterString("rz-sae")
		};

		private static readonly string[] s_scaleNumbers = new string[4] { "1", "2", "4", "8" };

		private static readonly FormatterString[] s_mvexRegMemConsts32 = new FormatterString[17]
		{
			new FormatterString(""),
			new FormatterString(""),
			new FormatterString("cdab"),
			new FormatterString("badc"),
			new FormatterString("dacb"),
			new FormatterString("aaaa"),
			new FormatterString("bbbb"),
			new FormatterString("cccc"),
			new FormatterString("dddd"),
			new FormatterString(""),
			new FormatterString("1to16"),
			new FormatterString("4to16"),
			new FormatterString("float16"),
			new FormatterString("uint8"),
			new FormatterString("sint8"),
			new FormatterString("uint16"),
			new FormatterString("sint16")
		};

		private static readonly FormatterString[] s_mvexRegMemConsts64 = new FormatterString[17]
		{
			new FormatterString(""),
			new FormatterString(""),
			new FormatterString("cdab"),
			new FormatterString("badc"),
			new FormatterString("dacb"),
			new FormatterString("aaaa"),
			new FormatterString("bbbb"),
			new FormatterString("cccc"),
			new FormatterString("dddd"),
			new FormatterString(""),
			new FormatterString("1to8"),
			new FormatterString("4to8"),
			new FormatterString("float16"),
			new FormatterString("uint8"),
			new FormatterString("sint8"),
			new FormatterString("uint16"),
			new FormatterString("sint16")
		};

		private static readonly FormatterString str_eh = new FormatterString("eh");

		public override FormatterOptions Options => options;

		public MasmFormatter()
			: this(null, null, null)
		{
		}

		public MasmFormatter(ISymbolResolver? symbolResolver, IFormatterOptionsProvider? optionsProvider = null)
			: this(null, symbolResolver, optionsProvider)
		{
		}

		public MasmFormatter(FormatterOptions? options, ISymbolResolver? symbolResolver = null, IFormatterOptionsProvider? optionsProvider = null)
		{
			this.options = options ?? FormatterOptions.CreateMasm();
			this.symbolResolver = symbolResolver;
			this.optionsProvider = optionsProvider;
			allRegisters = Iced.Intel.MasmFormatterInternal.Registers.AllRegisters;
			instrInfos = Iced.Intel.MasmFormatterInternal.InstrInfos.AllInfos;
			allMemorySizes = Iced.Intel.MasmFormatterInternal.MemorySizes.AllMemorySizes;
			numberFormatter = new NumberFormatter(dummy: true);
			rcStrings = s_rcStrings;
			rcSaeStrings = s_rcSaeStrings;
			scaleNumbers = s_scaleNumbers;
			mvexRegMemConsts32 = s_mvexRegMemConsts32;
			mvexRegMemConsts64 = s_mvexRegMemConsts64;
		}

		public override void FormatMnemonic(in Instruction instruction, FormatterOutput output, FormatMnemonicOptions options)
		{
			instrInfos[(int)instruction.Code].GetOpInfo(this.options, in instruction, out var info);
			int column = 0;
			FormatMnemonic(in instruction, output, in info, ref column, options);
		}

		public override int GetOperandCount(in Instruction instruction)
		{
			instrInfos[(int)instruction.Code].GetOpInfo(options, in instruction, out var info);
			return info.OpCount;
		}

		public override bool TryGetOpAccess(in Instruction instruction, int operand, out OpAccess access)
		{
			instrInfos[(int)instruction.Code].GetOpInfo(options, in instruction, out var info);
			if ((uint)operand >= (uint)info.OpCount)
			{
				ThrowHelper.ThrowArgumentOutOfRangeException_operand();
			}
			return info.TryGetOpAccess(operand, out access);
		}

		public override int GetInstructionOperand(in Instruction instruction, int operand)
		{
			instrInfos[(int)instruction.Code].GetOpInfo(options, in instruction, out var info);
			if ((uint)operand >= (uint)info.OpCount)
			{
				ThrowHelper.ThrowArgumentOutOfRangeException_operand();
			}
			return info.GetInstructionIndex(operand);
		}

		public override int GetFormatterOperand(in Instruction instruction, int instructionOperand)
		{
			instrInfos[(int)instruction.Code].GetOpInfo(options, in instruction, out var info);
			if ((uint)instructionOperand >= (uint)instruction.OpCount)
			{
				ThrowHelper.ThrowArgumentOutOfRangeException_instructionOperand();
			}
			return info.GetOperandIndex(instructionOperand);
		}

		public override void FormatOperand(in Instruction instruction, FormatterOutput output, int operand)
		{
			instrInfos[(int)instruction.Code].GetOpInfo(options, in instruction, out var info);
			if ((uint)operand >= (uint)info.OpCount)
			{
				ThrowHelper.ThrowArgumentOutOfRangeException_operand();
			}
			FormatOperand(in instruction, output, in info, operand);
		}

		public override void FormatOperandSeparator(in Instruction instruction, FormatterOutput output)
		{
			if (output == null)
			{
				ThrowHelper.ThrowArgumentNullException_output();
			}
			output.Write(",", FormatterTextKind.Punctuation);
			if (options.SpaceAfterOperandSeparator)
			{
				output.Write(" ", FormatterTextKind.Text);
			}
		}

		public override void FormatAllOperands(in Instruction instruction, FormatterOutput output)
		{
			instrInfos[(int)instruction.Code].GetOpInfo(options, in instruction, out var info);
			FormatOperands(in instruction, output, in info);
		}

		public override void Format(in Instruction instruction, FormatterOutput output)
		{
			instrInfos[(int)instruction.Code].GetOpInfo(options, in instruction, out var info);
			int column = 0;
			FormatMnemonic(in instruction, output, in info, ref column, FormatMnemonicOptions.None);
			if (info.OpCount != 0)
			{
				FormatterUtils.AddTabs(output, column, options.FirstOperandCharIndex, options.TabSize);
				FormatOperands(in instruction, output, in info);
			}
		}

		private void FormatMnemonic(in Instruction instruction, FormatterOutput output, in Iced.Intel.MasmFormatterInternal.InstrOpInfo opInfo, ref int column, FormatMnemonicOptions mnemonicOptions)
		{
			if (output == null)
			{
				ThrowHelper.ThrowArgumentNullException_output();
			}
			bool needSpace = false;
			int num;
			if ((mnemonicOptions & FormatMnemonicOptions.NoPrefixes) == 0 && (opInfo.Flags & Iced.Intel.MasmFormatterInternal.InstrOpInfoFlags.MnemonicIsDirective) == 0)
			{
				Register segmentPrefix = instruction.SegmentPrefix;
				if (((uint)segmentPrefix | instruction.HasAnyOf_Lock_Rep_Repne_Prefix | (uint)(opInfo.Flags & (Iced.Intel.MasmFormatterInternal.InstrOpInfoFlags.JccNotTaken | Iced.Intel.MasmFormatterInternal.InstrOpInfoFlags.JccTaken | Iced.Intel.MasmFormatterInternal.InstrOpInfoFlags.BndPrefix))) != 0)
				{
					if (segmentPrefix == Register.DS)
					{
						num = (FormatterUtils.IsNotrackPrefixBranch(instruction.Code) ? 1 : 0);
						if (num != 0)
						{
							goto IL_0086;
						}
					}
					else
					{
						num = 0;
					}
					if (segmentPrefix != 0 && ShowSegmentPrefix(in instruction, in opInfo))
					{
						FormatPrefix(output, in instruction, ref column, allRegisters[(int)segmentPrefix], FormatterUtils.GetSegmentRegisterPrefixKind(segmentPrefix), ref needSpace);
					}
					goto IL_0086;
				}
			}
			goto IL_01e6;
			IL_0086:
			if (instruction.HasXacquirePrefix)
			{
				FormatPrefix(output, in instruction, ref column, str_xacquire, PrefixKind.Xacquire, ref needSpace);
			}
			if (instruction.HasXreleasePrefix)
			{
				FormatPrefix(output, in instruction, ref column, str_xrelease, PrefixKind.Xrelease, ref needSpace);
			}
			if (instruction.HasLockPrefix)
			{
				FormatPrefix(output, in instruction, ref column, str_lock, PrefixKind.Lock, ref needSpace);
			}
			if ((opInfo.Flags & Iced.Intel.MasmFormatterInternal.InstrOpInfoFlags.JccNotTaken) != 0)
			{
				FormatPrefix(output, in instruction, ref column, str_hnt, PrefixKind.HintNotTaken, ref needSpace);
			}
			else if ((opInfo.Flags & Iced.Intel.MasmFormatterInternal.InstrOpInfoFlags.JccTaken) != 0)
			{
				FormatPrefix(output, in instruction, ref column, str_ht, PrefixKind.HintTaken, ref needSpace);
			}
			if (num != 0)
			{
				FormatPrefix(output, in instruction, ref column, str_notrack, PrefixKind.Notrack, ref needSpace);
			}
			bool flag = (opInfo.Flags & Iced.Intel.MasmFormatterInternal.InstrOpInfoFlags.BndPrefix) != 0;
			if (flag)
			{
				FormatPrefix(output, in instruction, ref column, str_bnd, PrefixKind.Bnd, ref needSpace);
			}
			if (instruction.HasRepePrefix && FormatterUtils.ShowRepOrRepePrefix(instruction.Code, options))
			{
				if (FormatterUtils.IsRepeOrRepneInstruction(instruction.Code))
				{
					FormatPrefix(output, in instruction, ref column, MnemonicCC.GetMnemonicCC(options, 4, str_repe), PrefixKind.Repe, ref needSpace);
				}
				else
				{
					FormatPrefix(output, in instruction, ref column, str_rep, PrefixKind.Rep, ref needSpace);
				}
			}
			if (instruction.HasRepnePrefix && !flag && FormatterUtils.ShowRepnePrefix(instruction.Code, options))
			{
				FormatPrefix(output, in instruction, ref column, MnemonicCC.GetMnemonicCC(options, 5, str_repne), PrefixKind.Repne, ref needSpace);
			}
			goto IL_01e6;
			IL_01e6:
			if ((mnemonicOptions & FormatMnemonicOptions.NoMnemonic) == 0)
			{
				if (needSpace)
				{
					output.Write(" ", FormatterTextKind.Text);
					column++;
				}
				FormatterString mnemonic = opInfo.Mnemonic;
				if ((opInfo.Flags & Iced.Intel.MasmFormatterInternal.InstrOpInfoFlags.MnemonicIsDirective) != 0)
				{
					output.Write(mnemonic.Get(options.UppercaseKeywords || options.UppercaseAll), FormatterTextKind.Directive);
				}
				else
				{
					output.WriteMnemonic(in instruction, mnemonic.Get(options.UppercaseMnemonics || options.UppercaseAll));
				}
				column += mnemonic.Length;
			}
		}

		private bool ShowSegmentPrefix(in Instruction instruction, in Iced.Intel.MasmFormatterInternal.InstrOpInfo opInfo)
		{
			if ((opInfo.Flags & (Iced.Intel.MasmFormatterInternal.InstrOpInfoFlags.JccNotTaken | Iced.Intel.MasmFormatterInternal.InstrOpInfoFlags.JccTaken)) != 0)
			{
				return false;
			}
			switch (instruction.Code)
			{
			case Code.Monitorw:
			case Code.Monitord:
			case Code.Monitorq:
			case Code.Monitorxw:
			case Code.Monitorxd:
			case Code.Monitorxq:
			case Code.Clzerow:
			case Code.Clzerod:
			case Code.Clzeroq:
			case Code.Umonitor_r16:
			case Code.Umonitor_r32:
			case Code.Umonitor_r64:
				return FormatterUtils.ShowSegmentPrefix(Register.DS, in instruction, options);
			default:
			{
				for (int i = 0; i < opInfo.OpCount; i++)
				{
					switch (opInfo.GetOpKind(i))
					{
					case Iced.Intel.MasmFormatterInternal.InstrOpKind.MemorySegSI:
					case Iced.Intel.MasmFormatterInternal.InstrOpKind.MemorySegESI:
					case Iced.Intel.MasmFormatterInternal.InstrOpKind.MemorySegRSI:
					case Iced.Intel.MasmFormatterInternal.InstrOpKind.MemorySegDI:
					case Iced.Intel.MasmFormatterInternal.InstrOpKind.MemorySegEDI:
					case Iced.Intel.MasmFormatterInternal.InstrOpKind.MemorySegRDI:
					case Iced.Intel.MasmFormatterInternal.InstrOpKind.Memory:
						return false;
					default:
						throw new InvalidOperationException();
					case Iced.Intel.MasmFormatterInternal.InstrOpKind.Register:
					case Iced.Intel.MasmFormatterInternal.InstrOpKind.NearBranch16:
					case Iced.Intel.MasmFormatterInternal.InstrOpKind.NearBranch32:
					case Iced.Intel.MasmFormatterInternal.InstrOpKind.NearBranch64:
					case Iced.Intel.MasmFormatterInternal.InstrOpKind.FarBranch16:
					case Iced.Intel.MasmFormatterInternal.InstrOpKind.FarBranch32:
					case Iced.Intel.MasmFormatterInternal.InstrOpKind.Immediate8:
					case Iced.Intel.MasmFormatterInternal.InstrOpKind.Immediate8_2nd:
					case Iced.Intel.MasmFormatterInternal.InstrOpKind.Immediate16:
					case Iced.Intel.MasmFormatterInternal.InstrOpKind.Immediate32:
					case Iced.Intel.MasmFormatterInternal.InstrOpKind.Immediate64:
					case Iced.Intel.MasmFormatterInternal.InstrOpKind.Immediate8to16:
					case Iced.Intel.MasmFormatterInternal.InstrOpKind.Immediate8to32:
					case Iced.Intel.MasmFormatterInternal.InstrOpKind.Immediate8to64:
					case Iced.Intel.MasmFormatterInternal.InstrOpKind.Immediate32to64:
					case Iced.Intel.MasmFormatterInternal.InstrOpKind.MemoryESDI:
					case Iced.Intel.MasmFormatterInternal.InstrOpKind.MemoryESEDI:
					case Iced.Intel.MasmFormatterInternal.InstrOpKind.MemoryESRDI:
					case Iced.Intel.MasmFormatterInternal.InstrOpKind.ExtraImmediate8_Value3:
					case Iced.Intel.MasmFormatterInternal.InstrOpKind.DeclareByte:
					case Iced.Intel.MasmFormatterInternal.InstrOpKind.DeclareWord:
					case Iced.Intel.MasmFormatterInternal.InstrOpKind.DeclareDword:
					case Iced.Intel.MasmFormatterInternal.InstrOpKind.DeclareQword:
						break;
					}
				}
				return options.ShowUselessPrefixes;
			}
			}
		}

		private void FormatPrefix(FormatterOutput output, in Instruction instruction, ref int column, FormatterString prefix, PrefixKind prefixKind, ref bool needSpace)
		{
			if (needSpace)
			{
				column++;
				output.Write(" ", FormatterTextKind.Text);
			}
			output.WritePrefix(in instruction, prefix.Get(options.UppercasePrefixes || options.UppercaseAll), prefixKind);
			column += prefix.Length;
			needSpace = true;
		}

		private void FormatOperands(in Instruction instruction, FormatterOutput output, in Iced.Intel.MasmFormatterInternal.InstrOpInfo opInfo)
		{
			if (output == null)
			{
				ThrowHelper.ThrowArgumentNullException_output();
			}
			for (int i = 0; i < opInfo.OpCount; i++)
			{
				if (i > 0)
				{
					output.Write(",", FormatterTextKind.Punctuation);
					if (options.SpaceAfterOperandSeparator)
					{
						output.Write(" ", FormatterTextKind.Text);
					}
				}
				FormatOperand(in instruction, output, in opInfo, i);
			}
		}

		private void FormatOperand(in Instruction instruction, FormatterOutput output, in Iced.Intel.MasmFormatterInternal.InstrOpInfo opInfo, int operand)
		{
			if (output == null)
			{
				ThrowHelper.ThrowArgumentNullException_output();
			}
			int num;
			if (IcedConstants.IsMvex(instruction.Code))
			{
				int opCount = instruction.OpCount;
				num = ((instruction.GetOpKind(opCount - 1) == OpKind.Immediate8) ? (opCount - 2) : (opCount - 1));
			}
			else
			{
				num = -1;
			}
			int instructionIndex = opInfo.GetInstructionIndex(operand);
			Iced.Intel.MasmFormatterInternal.InstrOpKind opKind = opInfo.GetOpKind(operand);
			int addressSize;
			byte b;
			ushort num3;
			uint num4;
			SymbolResult symbol;
			ulong value;
			FormatterFlowControl flowControl;
			NumberFormattingOptions numberOptions;
			FormatterOperandOptions formatterOperandOptions;
			ISymbolResolver symbolResolver;
			ulong num2;
			NumberKind numberKind;
			string text;
			switch (opKind)
			{
			case Iced.Intel.MasmFormatterInternal.InstrOpKind.Register:
				FormatRegister(output, in instruction, operand, instructionIndex, opInfo.GetOpRegister(operand));
				break;
			case Iced.Intel.MasmFormatterInternal.InstrOpKind.NearBranch64:
				addressSize = 8;
				num2 = instruction.NearBranch64;
				numberKind = NumberKind.UInt64;
				goto IL_0122;
			case Iced.Intel.MasmFormatterInternal.InstrOpKind.NearBranch32:
				addressSize = 4;
				num2 = instruction.NearBranch32;
				numberKind = NumberKind.UInt32;
				goto IL_0122;
			case Iced.Intel.MasmFormatterInternal.InstrOpKind.NearBranch16:
				addressSize = 2;
				num2 = instruction.NearBranch16;
				numberKind = NumberKind.UInt16;
				goto IL_0122;
			case Iced.Intel.MasmFormatterInternal.InstrOpKind.FarBranch32:
				addressSize = 4;
				num2 = instruction.FarBranch32;
				numberKind = NumberKind.UInt32;
				goto IL_0282;
			case Iced.Intel.MasmFormatterInternal.InstrOpKind.FarBranch16:
				addressSize = 2;
				num2 = instruction.FarBranch16;
				numberKind = NumberKind.UInt16;
				goto IL_0282;
			case Iced.Intel.MasmFormatterInternal.InstrOpKind.Immediate8:
				b = instruction.Immediate8;
				goto IL_049b;
			case Iced.Intel.MasmFormatterInternal.InstrOpKind.ExtraImmediate8_Value3:
				b = 3;
				goto IL_049b;
			case Iced.Intel.MasmFormatterInternal.InstrOpKind.Immediate8_2nd:
				b = instruction.Immediate8_2nd;
				goto IL_049b;
			case Iced.Intel.MasmFormatterInternal.InstrOpKind.DeclareByte:
				b = instruction.GetDeclareByteValue(operand);
				goto IL_049b;
			case Iced.Intel.MasmFormatterInternal.InstrOpKind.Immediate16:
				num3 = instruction.Immediate16;
				goto IL_05c1;
			case Iced.Intel.MasmFormatterInternal.InstrOpKind.Immediate8to16:
				num3 = (ushort)instruction.Immediate8to16;
				goto IL_05c1;
			case Iced.Intel.MasmFormatterInternal.InstrOpKind.DeclareWord:
				num3 = instruction.GetDeclareWordValue(operand);
				goto IL_05c1;
			case Iced.Intel.MasmFormatterInternal.InstrOpKind.Immediate32:
				num4 = instruction.Immediate32;
				goto IL_06e7;
			case Iced.Intel.MasmFormatterInternal.InstrOpKind.Immediate8to32:
				num4 = (uint)instruction.Immediate8to32;
				goto IL_06e7;
			case Iced.Intel.MasmFormatterInternal.InstrOpKind.DeclareDword:
				num4 = instruction.GetDeclareDwordValue(operand);
				goto IL_06e7;
			case Iced.Intel.MasmFormatterInternal.InstrOpKind.Immediate32to64:
				num2 = (ulong)instruction.Immediate32to64;
				goto IL_0819;
			case Iced.Intel.MasmFormatterInternal.InstrOpKind.Immediate8to64:
				num2 = (ulong)instruction.Immediate8to64;
				goto IL_0819;
			case Iced.Intel.MasmFormatterInternal.InstrOpKind.Immediate64:
				num2 = instruction.Immediate64;
				goto IL_0819;
			case Iced.Intel.MasmFormatterInternal.InstrOpKind.DeclareQword:
				num2 = instruction.GetDeclareQwordValue(operand);
				goto IL_0819;
			case Iced.Intel.MasmFormatterInternal.InstrOpKind.MemorySegSI:
				FormatMemory(output, in instruction, operand, instructionIndex, instruction.MemorySegment, Register.SI, Register.None, 0, 0, 0L, 2, opInfo.Flags);
				break;
			case Iced.Intel.MasmFormatterInternal.InstrOpKind.MemorySegESI:
				FormatMemory(output, in instruction, operand, instructionIndex, instruction.MemorySegment, Register.ESI, Register.None, 0, 0, 0L, 4, opInfo.Flags);
				break;
			case Iced.Intel.MasmFormatterInternal.InstrOpKind.MemorySegRSI:
				FormatMemory(output, in instruction, operand, instructionIndex, instruction.MemorySegment, Register.RSI, Register.None, 0, 0, 0L, 8, opInfo.Flags);
				break;
			case Iced.Intel.MasmFormatterInternal.InstrOpKind.MemorySegDI:
				FormatMemory(output, in instruction, operand, instructionIndex, instruction.MemorySegment, Register.DI, Register.None, 0, 0, 0L, 2, opInfo.Flags);
				break;
			case Iced.Intel.MasmFormatterInternal.InstrOpKind.MemorySegEDI:
				FormatMemory(output, in instruction, operand, instructionIndex, instruction.MemorySegment, Register.EDI, Register.None, 0, 0, 0L, 4, opInfo.Flags);
				break;
			case Iced.Intel.MasmFormatterInternal.InstrOpKind.MemorySegRDI:
				FormatMemory(output, in instruction, operand, instructionIndex, instruction.MemorySegment, Register.RDI, Register.None, 0, 0, 0L, 8, opInfo.Flags);
				break;
			case Iced.Intel.MasmFormatterInternal.InstrOpKind.MemoryESDI:
				FormatMemory(output, in instruction, operand, instructionIndex, Register.ES, Register.DI, Register.None, 0, 0, 0L, 2, opInfo.Flags);
				break;
			case Iced.Intel.MasmFormatterInternal.InstrOpKind.MemoryESEDI:
				FormatMemory(output, in instruction, operand, instructionIndex, Register.ES, Register.EDI, Register.None, 0, 0, 0L, 4, opInfo.Flags);
				break;
			case Iced.Intel.MasmFormatterInternal.InstrOpKind.MemoryESRDI:
				FormatMemory(output, in instruction, operand, instructionIndex, Register.ES, Register.RDI, Register.None, 0, 0, 0L, 8, opInfo.Flags);
				break;
			case Iced.Intel.MasmFormatterInternal.InstrOpKind.Memory:
			{
				int memoryDisplSize = instruction.MemoryDisplSize;
				Register memoryBase = instruction.MemoryBase;
				Register indexReg = instruction.MemoryIndex;
				int addressSizeInBytes = InstructionUtils.GetAddressSizeInBytes(memoryBase, indexReg, memoryDisplSize, instruction.CodeSize);
				long displ = (long)((addressSizeInBytes != 8) ? instruction.MemoryDisplacement32 : instruction.MemoryDisplacement64);
				if ((opInfo.Flags & Iced.Intel.MasmFormatterInternal.InstrOpInfoFlags.IgnoreIndexReg) != 0)
				{
					indexReg = Register.None;
				}
				FormatMemory(output, in instruction, operand, instructionIndex, instruction.MemorySegment, memoryBase, indexReg, instruction.InternalMemoryIndexScale, memoryDisplSize, displ, addressSizeInBytes, opInfo.Flags);
				break;
			}
			default:
				{
					throw new InvalidOperationException();
				}
				IL_049b:
				numberOptions = NumberFormattingOptions.CreateImmediateInternal(options);
				formatterOperandOptions = default(FormatterOperandOptions);
				optionsProvider?.GetOperandOptions(in instruction, operand, instructionIndex, ref formatterOperandOptions, ref numberOptions);
				if ((symbolResolver = this.symbolResolver) != null && symbolResolver.TryGetSymbol(in instruction, operand, instructionIndex, b, 1, out symbol))
				{
					if ((symbol.Flags & SymbolFlags.Relative) == 0)
					{
						FormatKeyword(output, str_offset);
						output.Write(" ", FormatterTextKind.Text);
					}
					output.Write(in instruction, operand, instructionIndex, options, in numberFormatter, in numberOptions, b, in symbol, options.ShowSymbolAddress);
					break;
				}
				if (numberOptions.SignedNumber)
				{
					num2 = (ulong)(sbyte)b;
					numberKind = NumberKind.Int8;
					if ((sbyte)b < 0)
					{
						output.Write("-", FormatterTextKind.Operator);
						b = (byte)(-(sbyte)b);
					}
				}
				else
				{
					num2 = b;
					numberKind = NumberKind.UInt8;
				}
				text = numberFormatter.FormatUInt8(options, in numberOptions, b);
				output.WriteNumber(in instruction, operand, instructionIndex, text, num2, numberKind, FormatterTextKind.Number);
				break;
				IL_0282:
				numberOptions = NumberFormattingOptions.CreateBranchInternal(options);
				formatterOperandOptions = new FormatterOperandOptions((!options.ShowBranchSize) ? FormatterOperandOptions.Flags.NoBranchSize : FormatterOperandOptions.Flags.None);
				optionsProvider?.GetOperandOptions(in instruction, operand, instructionIndex, ref formatterOperandOptions, ref numberOptions);
				if ((symbolResolver = this.symbolResolver) != null && symbolResolver.TryGetSymbol(in instruction, operand, instructionIndex, (uint)num2, addressSize, out symbol))
				{
					FormatFlowControl(output, FormatterUtils.GetFlowControl(in instruction), formatterOperandOptions);
					if (!symbolResolver.TryGetSymbol(in instruction, operand + 1, instructionIndex, instruction.FarBranchSelector, 2, out var symbol2))
					{
						text = numberFormatter.FormatUInt16(options, in numberOptions, instruction.FarBranchSelector, numberOptions.LeadingZeros);
						output.WriteNumber(in instruction, operand, instructionIndex, text, instruction.FarBranchSelector, NumberKind.UInt16, FormatterTextKind.SelectorValue);
					}
					else
					{
						output.Write(in instruction, operand, instructionIndex, options, in numberFormatter, in numberOptions, instruction.FarBranchSelector, in symbol2, options.ShowSymbolAddress);
					}
					output.Write(":", FormatterTextKind.Punctuation);
					output.Write(in instruction, operand, instructionIndex, options, in numberFormatter, in numberOptions, num2, in symbol, options.ShowSymbolAddress);
				}
				else
				{
					flowControl = FormatterUtils.GetFlowControl(in instruction);
					FormatFlowControl(output, flowControl, formatterOperandOptions);
					text = numberFormatter.FormatUInt16(options, in numberOptions, instruction.FarBranchSelector, numberOptions.LeadingZeros);
					output.WriteNumber(in instruction, operand, instructionIndex, text, instruction.FarBranchSelector, NumberKind.UInt16, FormatterTextKind.SelectorValue);
					output.Write(":", FormatterTextKind.Punctuation);
					text = ((opKind != Iced.Intel.MasmFormatterInternal.InstrOpKind.FarBranch32) ? numberFormatter.FormatUInt16(options, in numberOptions, instruction.FarBranch16, numberOptions.LeadingZeros) : numberFormatter.FormatUInt32(options, in numberOptions, instruction.FarBranch32, numberOptions.LeadingZeros));
					output.WriteNumber(in instruction, operand, instructionIndex, text, num2, numberKind, FormatterUtils.IsCall(flowControl) ? FormatterTextKind.FunctionAddress : FormatterTextKind.LabelAddress);
				}
				break;
				IL_0819:
				numberOptions = NumberFormattingOptions.CreateImmediateInternal(options);
				formatterOperandOptions = default(FormatterOperandOptions);
				optionsProvider?.GetOperandOptions(in instruction, operand, instructionIndex, ref formatterOperandOptions, ref numberOptions);
				if ((symbolResolver = this.symbolResolver) != null && symbolResolver.TryGetSymbol(in instruction, operand, instructionIndex, num2, 8, out symbol))
				{
					if ((symbol.Flags & SymbolFlags.Relative) == 0)
					{
						FormatKeyword(output, str_offset);
						output.Write(" ", FormatterTextKind.Text);
					}
					output.Write(in instruction, operand, instructionIndex, options, in numberFormatter, in numberOptions, num2, in symbol, options.ShowSymbolAddress);
					break;
				}
				value = num2;
				if (numberOptions.SignedNumber)
				{
					numberKind = NumberKind.Int64;
					if ((long)num2 < 0L)
					{
						output.Write("-", FormatterTextKind.Operator);
						num2 = 0L - num2;
					}
				}
				else
				{
					numberKind = NumberKind.UInt64;
				}
				text = numberFormatter.FormatUInt64(options, in numberOptions, num2);
				output.WriteNumber(in instruction, operand, instructionIndex, text, value, numberKind, FormatterTextKind.Number);
				break;
				IL_0122:
				numberOptions = NumberFormattingOptions.CreateBranchInternal(options);
				formatterOperandOptions = new FormatterOperandOptions((!options.ShowBranchSize) ? FormatterOperandOptions.Flags.NoBranchSize : FormatterOperandOptions.Flags.None);
				optionsProvider?.GetOperandOptions(in instruction, operand, instructionIndex, ref formatterOperandOptions, ref numberOptions);
				if ((symbolResolver = this.symbolResolver) != null && symbolResolver.TryGetSymbol(in instruction, operand, instructionIndex, num2, addressSize, out symbol))
				{
					FormatFlowControl(output, FormatterUtils.GetFlowControl(in instruction), formatterOperandOptions);
					output.Write(in instruction, operand, instructionIndex, options, in numberFormatter, in numberOptions, num2, in symbol, options.ShowSymbolAddress);
					break;
				}
				flowControl = FormatterUtils.GetFlowControl(in instruction);
				FormatFlowControl(output, flowControl, formatterOperandOptions);
				output.WriteNumber(in instruction, operand, instructionIndex, opKind switch
				{
					Iced.Intel.MasmFormatterInternal.InstrOpKind.NearBranch32 => numberFormatter.FormatUInt32(options, in numberOptions, instruction.NearBranch32, numberOptions.LeadingZeros), 
					Iced.Intel.MasmFormatterInternal.InstrOpKind.NearBranch64 => numberFormatter.FormatUInt64(options, in numberOptions, instruction.NearBranch64, numberOptions.LeadingZeros), 
					_ => numberFormatter.FormatUInt16(options, in numberOptions, instruction.NearBranch16, numberOptions.LeadingZeros), 
				}, num2, numberKind, FormatterUtils.IsCall(flowControl) ? FormatterTextKind.FunctionAddress : FormatterTextKind.LabelAddress);
				break;
				IL_05c1:
				numberOptions = NumberFormattingOptions.CreateImmediateInternal(options);
				formatterOperandOptions = default(FormatterOperandOptions);
				optionsProvider?.GetOperandOptions(in instruction, operand, instructionIndex, ref formatterOperandOptions, ref numberOptions);
				if ((symbolResolver = this.symbolResolver) != null && symbolResolver.TryGetSymbol(in instruction, operand, instructionIndex, num3, 2, out symbol))
				{
					if ((symbol.Flags & SymbolFlags.Relative) == 0)
					{
						FormatKeyword(output, str_offset);
						output.Write(" ", FormatterTextKind.Text);
					}
					output.Write(in instruction, operand, instructionIndex, options, in numberFormatter, in numberOptions, num3, in symbol, options.ShowSymbolAddress);
					break;
				}
				if (numberOptions.SignedNumber)
				{
					num2 = (ulong)(short)num3;
					numberKind = NumberKind.Int16;
					if ((short)num3 < 0)
					{
						output.Write("-", FormatterTextKind.Operator);
						num3 = (ushort)(-(short)num3);
					}
				}
				else
				{
					num2 = num3;
					numberKind = NumberKind.UInt16;
				}
				text = numberFormatter.FormatUInt16(options, in numberOptions, num3);
				output.WriteNumber(in instruction, operand, instructionIndex, text, num2, numberKind, FormatterTextKind.Number);
				break;
				IL_06e7:
				numberOptions = NumberFormattingOptions.CreateImmediateInternal(options);
				formatterOperandOptions = default(FormatterOperandOptions);
				optionsProvider?.GetOperandOptions(in instruction, operand, instructionIndex, ref formatterOperandOptions, ref numberOptions);
				if ((symbolResolver = this.symbolResolver) != null && symbolResolver.TryGetSymbol(in instruction, operand, instructionIndex, num4, 4, out symbol))
				{
					if ((symbol.Flags & SymbolFlags.Relative) == 0)
					{
						FormatKeyword(output, str_offset);
						output.Write(" ", FormatterTextKind.Text);
					}
					output.Write(in instruction, operand, instructionIndex, options, in numberFormatter, in numberOptions, num4, in symbol, options.ShowSymbolAddress);
					break;
				}
				if (numberOptions.SignedNumber)
				{
					num2 = (ulong)(int)num4;
					numberKind = NumberKind.Int32;
					if ((int)num4 < 0)
					{
						output.Write("-", FormatterTextKind.Operator);
						num4 = 0 - num4;
					}
				}
				else
				{
					num2 = num4;
					numberKind = NumberKind.UInt32;
				}
				text = numberFormatter.FormatUInt32(options, in numberOptions, num4);
				output.WriteNumber(in instruction, operand, instructionIndex, text, num2, numberKind, FormatterTextKind.Number);
				break;
			}
			if (operand == 0 && instruction.HasOpMask_or_ZeroingMasking)
			{
				if (instruction.HasOpMask)
				{
					output.Write("{", FormatterTextKind.Punctuation);
					FormatRegister(output, in instruction, operand, instructionIndex, instruction.OpMask);
					output.Write("}", FormatterTextKind.Punctuation);
				}
				if (instruction.ZeroingMasking)
				{
					FormatDecorator(output, in instruction, operand, instructionIndex, str_z, DecoratorKind.ZeroingMasking);
				}
			}
			if (operand + 1 == opInfo.OpCount && instruction.HasRoundingControlOrSae)
			{
				RoundingControl roundingControl = instruction.RoundingControl;
				if (roundingControl != 0 && FormatterUtils.CanShowRoundingControl(in instruction, options))
				{
					FormatterString text2 = ((!IcedConstants.IsMvex(instruction.Code)) ? rcSaeStrings[(int)(roundingControl - 1)] : (instruction.SuppressAllExceptions ? rcSaeStrings[(int)(roundingControl - 1)] : rcStrings[(int)(roundingControl - 1)]));
					FormatDecorator(output, in instruction, operand, instructionIndex, text2, DecoratorKind.RoundingControl);
				}
				else if (instruction.SuppressAllExceptions)
				{
					FormatDecorator(output, in instruction, operand, instructionIndex, str_sae, DecoratorKind.SuppressAllExceptions);
				}
			}
			if (num != operand)
			{
				return;
			}
			MvexRegMemConv mvexRegMemConv = instruction.MvexRegMemConv;
			if (mvexRegMemConv == MvexRegMemConv.None)
			{
				return;
			}
			MvexInfo mvexInfo = new MvexInfo(instruction.Code);
			if (mvexInfo.ConvFn != 0)
			{
				FormatterString text3 = (mvexInfo.IsConvFn32 ? mvexRegMemConsts32 : mvexRegMemConsts64)[(int)mvexRegMemConv];
				if (text3.Length != 0)
				{
					FormatDecorator(output, in instruction, operand, instructionIndex, text3, DecoratorKind.SwizzleMemConv);
				}
			}
		}

		private void FormatDecorator(FormatterOutput output, in Instruction instruction, int operand, int instructionOperand, FormatterString text, DecoratorKind decorator)
		{
			output.Write("{", FormatterTextKind.Punctuation);
			output.WriteDecorator(in instruction, operand, instructionOperand, text.Get(options.UppercaseDecorators || options.UppercaseAll), decorator);
			output.Write("}", FormatterTextKind.Punctuation);
		}

		[MethodImpl(MethodImplOptions.AggressiveInlining)]
		private string ToRegisterString(Register reg)
		{
			if (options.PreferST0 && reg == Register.DontUse0)
			{
				reg = Register.ST0;
			}
			FormatterString formatterString = allRegisters[(int)reg];
			return formatterString.Get(options.UppercaseRegisters || options.UppercaseAll);
		}

		[MethodImpl(MethodImplOptions.NoInlining)]
		private void FormatRegister(FormatterOutput output, in Instruction instruction, int operand, int instructionOperand, Register reg)
		{
			output.WriteRegister(in instruction, operand, instructionOperand, ToRegisterString(reg), reg);
		}

		private void FormatMemory(FormatterOutput output, in Instruction instruction, int operand, int instructionOperand, Register segReg, Register baseReg, Register indexReg, int scale, int displSize, long displ, int addrSize, Iced.Intel.MasmFormatterInternal.InstrOpInfoFlags flags)
		{
			NumberFormattingOptions numberOptions = NumberFormattingOptions.CreateDisplacementInternal(options);
			FormatterOperandOptions operandOptions = new FormatterOperandOptions(options.MemorySizeOptions);
			operandOptions.RipRelativeAddresses = options.RipRelativeAddresses;
			optionsProvider?.GetOperandOptions(in instruction, operand, instructionOperand, ref operandOptions, ref numberOptions);
			ulong num;
			switch (baseReg)
			{
			case Register.RIP:
				num = (ulong)displ;
				if (options.RipRelativeAddresses)
				{
					displ -= (long)instruction.NextIP;
				}
				else
				{
					baseReg = Register.None;
				}
				displSize = 8;
				break;
			case Register.EIP:
				num = (uint)displ;
				if (options.RipRelativeAddresses)
				{
					displ = (int)displ - (int)instruction.NextIP32;
				}
				else
				{
					baseReg = Register.None;
				}
				displSize = 4;
				break;
			default:
				num = (ulong)displ;
				break;
			}
			ISymbolResolver symbolResolver = this.symbolResolver;
			bool flag;
			SymbolResult symbol;
			if (symbolResolver != null)
			{
				flag = symbolResolver.TryGetSymbol(in instruction, operand, instructionOperand, num, addrSize, out symbol);
			}
			else
			{
				flag = false;
				symbol = default(SymbolResult);
			}
			bool flag2 = scale != 0 || options.AlwaysShowScale;
			if (!flag2 && baseReg == Register.None)
			{
				flag2 = true;
			}
			if (addrSize == 2 || !FormatterUtils.ShowIndexScale(in instruction, options))
			{
				flag2 = false;
			}
			CodeSize codeSize;
			bool flag3 = (codeSize = instruction.CodeSize) == CodeSize.Code16 || codeSize == CodeSize.Code32;
			bool flag4 = baseReg != 0 || indexReg != Register.None;
			bool flag5 = (flag ? options.MasmSymbolDisplInBrackets : options.MasmDisplInBrackets);
			Register segmentPrefix = instruction.SegmentPrefix;
			if ((!flag3 && !flag4 && !flag) || (flag3 && !flag4 && !flag && !options.MasmAddDsPrefix32 && segmentPrefix == Register.None))
			{
				flag5 = true;
			}
			bool num2 = flag4 || flag5;
			FormatMemorySize(output, in instruction, ref symbol, instruction.MemorySize, flags, operandOptions, flag);
			bool flag6 = segmentPrefix == Register.DS && FormatterUtils.IsNotrackPrefixBranch(instruction.Code) && ((codeSize != CodeSize.Code16 && codeSize != CodeSize.Code32) || (baseReg != Register.BP && baseReg != Register.EBP && baseReg != Register.ESP));
			if (options.AlwaysShowSegmentRegister || (segmentPrefix != 0 && !flag6 && FormatterUtils.ShowSegmentPrefix(Register.None, in instruction, options)) || (flag3 && !flag4 && !flag && options.MasmAddDsPrefix32))
			{
				FormatRegister(output, in instruction, operand, instructionOperand, segReg);
				output.Write(":", FormatterTextKind.Punctuation);
			}
			if (!flag5)
			{
				FormatMemoryDispl(output, in instruction, operand, instructionOperand, in symbol, ref numberOptions, num, displ, displSize, addrSize, flag, needPlus: false, !flag4);
			}
			if (num2)
			{
				output.Write("[", FormatterTextKind.Punctuation);
				if (options.SpaceAfterMemoryBracket)
				{
					output.Write(" ", FormatterTextKind.Text);
				}
			}
			bool flag7 = false;
			if (baseReg != 0)
			{
				FormatRegister(output, in instruction, operand, instructionOperand, baseReg);
				flag7 = true;
			}
			if (indexReg != 0)
			{
				if (flag7)
				{
					if (options.SpaceBetweenMemoryAddOperators)
					{
						output.Write(" ", FormatterTextKind.Text);
					}
					output.Write("+", FormatterTextKind.Operator);
					if (options.SpaceBetweenMemoryAddOperators)
					{
						output.Write(" ", FormatterTextKind.Text);
					}
				}
				flag7 = true;
				if (!flag2)
				{
					FormatRegister(output, in instruction, operand, instructionOperand, indexReg);
				}
				else if (options.ScaleBeforeIndex)
				{
					output.WriteNumber(in instruction, operand, instructionOperand, scaleNumbers[scale], (uint)(1 << scale), NumberKind.Int32, FormatterTextKind.Number);
					if (options.SpaceBetweenMemoryMulOperators)
					{
						output.Write(" ", FormatterTextKind.Text);
					}
					output.Write("*", FormatterTextKind.Operator);
					if (options.SpaceBetweenMemoryMulOperators)
					{
						output.Write(" ", FormatterTextKind.Text);
					}
					FormatRegister(output, in instruction, operand, instructionOperand, indexReg);
				}
				else
				{
					FormatRegister(output, in instruction, operand, instructionOperand, indexReg);
					if (options.SpaceBetweenMemoryMulOperators)
					{
						output.Write(" ", FormatterTextKind.Text);
					}
					output.Write("*", FormatterTextKind.Operator);
					if (options.SpaceBetweenMemoryMulOperators)
					{
						output.Write(" ", FormatterTextKind.Text);
					}
					output.WriteNumber(in instruction, operand, instructionOperand, scaleNumbers[scale], (uint)(1 << scale), NumberKind.Int32, FormatterTextKind.Number);
				}
			}
			if (flag5)
			{
				FormatMemoryDispl(output, in instruction, operand, instructionOperand, in symbol, ref numberOptions, num, displ, displSize, addrSize, flag, flag7, !flag7);
			}
			if (num2)
			{
				if (options.SpaceAfterMemoryBracket)
				{
					output.Write(" ", FormatterTextKind.Text);
				}
				output.Write("]", FormatterTextKind.Punctuation);
			}
			if (instruction.IsMvexEvictionHint)
			{
				FormatDecorator(output, in instruction, operand, instructionOperand, str_eh, DecoratorKind.EvictionHint);
			}
		}

		private void FormatMemoryDispl(FormatterOutput output, in Instruction instruction, int operand, int instructionOperand, in SymbolResult symbol, ref NumberFormattingOptions numberOptions, ulong absAddr, long displ, int displSize, int addrSize, bool useSymbol, bool needPlus, bool forceDispl)
		{
			if (useSymbol)
			{
				if (needPlus)
				{
					if (options.SpaceBetweenMemoryAddOperators)
					{
						output.Write(" ", FormatterTextKind.Text);
					}
					if ((symbol.Flags & SymbolFlags.Signed) != 0)
					{
						output.Write("-", FormatterTextKind.Operator);
					}
					else
					{
						output.Write("+", FormatterTextKind.Operator);
					}
					if (options.SpaceBetweenMemoryAddOperators)
					{
						output.Write(" ", FormatterTextKind.Text);
					}
				}
				else if ((symbol.Flags & SymbolFlags.Signed) != 0)
				{
					output.Write("-", FormatterTextKind.Operator);
				}
				output.Write(in instruction, operand, instructionOperand, options, in numberFormatter, in numberOptions, absAddr, in symbol, options.ShowSymbolAddress, writeMinusIfSigned: false, options.SpaceBetweenMemoryAddOperators);
			}
			else
			{
				if (!forceDispl && (displSize == 0 || (!options.ShowZeroDisplacements && displ == 0L)))
				{
					return;
				}
				ulong value = (ulong)displ;
				bool flag;
				if (needPlus)
				{
					flag = numberOptions.SignedNumber;
					if (options.SpaceBetweenMemoryAddOperators)
					{
						output.Write(" ", FormatterTextKind.Text);
					}
					switch (addrSize)
					{
					case 8:
						if (!numberOptions.SignedNumber)
						{
							output.Write("+", FormatterTextKind.Operator);
						}
						else if (displ < 0)
						{
							displ = -displ;
							output.Write("-", FormatterTextKind.Operator);
						}
						else
						{
							output.Write("+", FormatterTextKind.Operator);
						}
						if (numberOptions.DisplacementLeadingZeros)
						{
							displSize = 4;
						}
						break;
					case 4:
						if (!numberOptions.SignedNumber)
						{
							output.Write("+", FormatterTextKind.Operator);
						}
						else if ((int)displ < 0)
						{
							displ = (uint)(-(int)displ);
							output.Write("-", FormatterTextKind.Operator);
						}
						else
						{
							output.Write("+", FormatterTextKind.Operator);
						}
						if (numberOptions.DisplacementLeadingZeros)
						{
							displSize = 4;
						}
						break;
					default:
						if (!numberOptions.SignedNumber)
						{
							output.Write("+", FormatterTextKind.Operator);
						}
						else if ((short)displ < 0)
						{
							displ = (ushort)(-(short)displ);
							output.Write("-", FormatterTextKind.Operator);
						}
						else
						{
							output.Write("+", FormatterTextKind.Operator);
						}
						if (numberOptions.DisplacementLeadingZeros)
						{
							displSize = 2;
						}
						break;
					}
					if (options.SpaceBetweenMemoryAddOperators)
					{
						output.Write(" ", FormatterTextKind.Text);
					}
				}
				else
				{
					flag = false;
				}
				string text;
				NumberKind numberKind;
				if (displSize <= 1 && (ulong)displ <= 255uL)
				{
					text = numberFormatter.FormatDisplUInt8(options, in numberOptions, (byte)displ);
					numberKind = ((!flag) ? NumberKind.UInt8 : NumberKind.Int8);
				}
				else if (displSize <= 2 && (ulong)displ <= 65535uL)
				{
					text = numberFormatter.FormatDisplUInt16(options, in numberOptions, (ushort)displ);
					numberKind = (flag ? NumberKind.Int16 : NumberKind.UInt16);
				}
				else if (displSize <= 4 && (ulong)displ <= 4294967295uL)
				{
					text = numberFormatter.FormatDisplUInt32(options, in numberOptions, (uint)displ);
					numberKind = (flag ? NumberKind.Int32 : NumberKind.UInt32);
				}
				else
				{
					if (displSize > 8)
					{
						throw new InvalidOperationException();
					}
					text = numberFormatter.FormatDisplUInt64(options, in numberOptions, (ulong)displ);
					numberKind = (flag ? NumberKind.Int64 : NumberKind.UInt64);
				}
				output.WriteNumber(in instruction, operand, instructionOperand, text, value, numberKind, FormatterTextKind.Number);
			}
		}

		private void FormatMemorySize(FormatterOutput output, in Instruction instruction, ref SymbolResult symbol, MemorySize memSize, Iced.Intel.MasmFormatterInternal.InstrOpInfoFlags flags, FormatterOperandOptions operandOptions, bool useSymbol)
		{
			MemorySizeOptions memorySizeOptions = operandOptions.MemorySizeOptions;
			if (memorySizeOptions == MemorySizeOptions.Never)
			{
				return;
			}
			Iced.Intel.MasmFormatterInternal.InstrOpInfoFlags instrOpInfoFlags = flags & Iced.Intel.MasmFormatterInternal.InstrOpInfoFlags.MemSize_Mask;
			if (instrOpInfoFlags == Iced.Intel.MasmFormatterInternal.InstrOpInfoFlags.MemSize_Nothing)
			{
				return;
			}
			Iced.Intel.MasmFormatterInternal.MemorySizes.Info info = allMemorySizes[(int)memSize];
			FormatterString[] array = info.keywords;
			switch (info.size)
			{
			case 0:
				if (instrOpInfoFlags == Iced.Intel.MasmFormatterInternal.InstrOpInfoFlags.MemSize_DwordOrQword)
				{
					array = ((instruction.CodeSize != CodeSize.Code16 && instruction.CodeSize != CodeSize.Code32) ? Iced.Intel.MasmFormatterInternal.MemorySizes.qword_ptr : Iced.Intel.MasmFormatterInternal.MemorySizes.dword_ptr);
				}
				break;
			case 8:
				if (instrOpInfoFlags == Iced.Intel.MasmFormatterInternal.InstrOpInfoFlags.MemSize_Mmx)
				{
					array = Iced.Intel.MasmFormatterInternal.MemorySizes.mmword_ptr;
				}
				break;
			case 16:
				if (instrOpInfoFlags == Iced.Intel.MasmFormatterInternal.InstrOpInfoFlags.MemSize_Normal)
				{
					array = Iced.Intel.MasmFormatterInternal.MemorySizes.oword_ptr;
				}
				break;
			}
			if (instrOpInfoFlags == Iced.Intel.MasmFormatterInternal.InstrOpInfoFlags.MemSize_XmmwordPtr)
			{
				array = Iced.Intel.MasmFormatterInternal.MemorySizes.xmmword_ptr;
			}
			switch (memorySizeOptions)
			{
			case MemorySizeOptions.Default:
				if (useSymbol && symbol.HasSymbolSize)
				{
					if (IsSameMemSize(array, info.isBroadcast, ref symbol))
					{
						return;
					}
				}
				else if ((flags & Iced.Intel.MasmFormatterInternal.InstrOpInfoFlags.ShowNoMemSize_ForceSize) == 0 && !info.isBroadcast)
				{
					return;
				}
				break;
			case MemorySizeOptions.Minimal:
				if ((useSymbol && symbol.HasSymbolSize && IsSameMemSize(array, info.isBroadcast, ref symbol)) || ((flags & Iced.Intel.MasmFormatterInternal.InstrOpInfoFlags.ShowMinMemSize_ForceSize) == 0 && !info.isBroadcast))
				{
					return;
				}
				break;
			}
			FormatterString[] array2 = array;
			foreach (FormatterString keyword in array2)
			{
				FormatKeyword(output, keyword);
				output.Write(" ", FormatterTextKind.Text);
			}
		}

		private bool IsSameMemSize(FormatterString[] memSizeStrings, bool isBroadcast, ref SymbolResult symbol)
		{
			if (isBroadcast)
			{
				return false;
			}
			Iced.Intel.MasmFormatterInternal.MemorySizes.Info info = allMemorySizes[(int)symbol.SymbolSize];
			if (info.isBroadcast)
			{
				return false;
			}
			FormatterString[] keywords = info.keywords;
			return IsSameMemSize(memSizeStrings, keywords);
		}

		private static bool IsSameMemSize(FormatterString[] a, FormatterString[] b)
		{
			if (a == b)
			{
				return true;
			}
			if (a.Length != b.Length)
			{
				return false;
			}
			for (int i = 0; i < a.Length; i++)
			{
				if (a[i].Get(upper: false) != b[i].Get(upper: false))
				{
					return false;
				}
			}
			return true;
		}

		private void FormatKeyword(FormatterOutput output, FormatterString keyword)
		{
			output.Write(keyword.Get(options.UppercaseKeywords || options.UppercaseAll), FormatterTextKind.Keyword);
		}

		private void FormatFlowControl(FormatterOutput output, FormatterFlowControl kind, FormatterOperandOptions operandOptions)
		{
			if (operandOptions.BranchSize)
			{
				switch (kind)
				{
				case FormatterFlowControl.ShortBranch:
					FormatKeyword(output, str_short);
					output.Write(" ", FormatterTextKind.Text);
					break;
				case FormatterFlowControl.NearBranch:
					FormatKeyword(output, str_near);
					output.Write(" ", FormatterTextKind.Text);
					FormatKeyword(output, str_ptr);
					output.Write(" ", FormatterTextKind.Text);
					break;
				case FormatterFlowControl.FarBranch:
				case FormatterFlowControl.FarCall:
					FormatKeyword(output, str_far);
					output.Write(" ", FormatterTextKind.Text);
					FormatKeyword(output, str_ptr);
					output.Write(" ", FormatterTextKind.Text);
					break;
				default:
					throw new ArgumentOutOfRangeException("kind");
				case FormatterFlowControl.AlwaysShortBranch:
				case FormatterFlowControl.NearCall:
				case FormatterFlowControl.Xbegin:
					break;
				}
			}
		}

		public override string Format(Register register)
		{
			return ToRegisterString(register);
		}

		public override string FormatInt8(sbyte value, in NumberFormattingOptions numberOptions)
		{
			return numberFormatter.FormatInt8(options, in numberOptions, value);
		}

		public override string FormatInt16(short value, in NumberFormattingOptions numberOptions)
		{
			return numberFormatter.FormatInt16(options, in numberOptions, value);
		}

		public override string FormatInt32(int value, in NumberFormattingOptions numberOptions)
		{
			return numberFormatter.FormatInt32(options, in numberOptions, value);
		}

		public override string FormatInt64(long value, in NumberFormattingOptions numberOptions)
		{
			return numberFormatter.FormatInt64(options, in numberOptions, value);
		}

		public override string FormatUInt8(byte value, in NumberFormattingOptions numberOptions)
		{
			return numberFormatter.FormatUInt8(options, in numberOptions, value);
		}

		public override string FormatUInt16(ushort value, in NumberFormattingOptions numberOptions)
		{
			return numberFormatter.FormatUInt16(options, in numberOptions, value);
		}

		public override string FormatUInt32(uint value, in NumberFormattingOptions numberOptions)
		{
			return numberFormatter.FormatUInt32(options, in numberOptions, value);
		}

		public override string FormatUInt64(ulong value, in NumberFormattingOptions numberOptions)
		{
			return numberFormatter.FormatUInt64(options, in numberOptions, value);
		}
	}
	public readonly struct MemoryOperand
	{
		public readonly Register SegmentPrefix;

		public readonly Register Base;

		public readonly Register Index;

		public readonly int Scale;

		public readonly long Displacement;

		public readonly int DisplSize;

		public readonly bool IsBroadcast;

		public MemoryOperand(Register @base, Register index, int scale, long displacement, int displSize, bool isBroadcast, Register segmentPrefix)
		{
			SegmentPrefix = segmentPrefix;
			Base = @base;
			Index = index;
			Scale = scale;
			Displacement = displacement;
			DisplSize = displSize;
			IsBroadcast = isBroadcast;
		}

		public MemoryOperand(Register @base, Register index, int scale, bool isBroadcast, Register segmentPrefix)
		{
			SegmentPrefix = segmentPrefix;
			Base = @base;
			Index = index;
			Scale = scale;
			Displacement = 0L;
			DisplSize = 0;
			IsBroadcast = isBroadcast;
		}

		public MemoryOperand(Register @base, long displacement, int displSize, bool isBroadcast, Register segmentPrefix)
		{
			SegmentPrefix = segmentPrefix;
			Base = @base;
			Index = Register.None;
			Scale = 1;
			Displacement = displacement;
			DisplSize = displSize;
			IsBroadcast = isBroadcast;
		}

		public MemoryOperand(Register index, int scale, long displacement, int displSize, bool isBroadcast, Register segmentPrefix)
		{
			SegmentPrefix = segmentPrefix;
			Base = Register.None;
			Index = index;
			Scale = scale;
			Displacement = displacement;
			DisplSize = displSize;
			IsBroadcast = isBroadcast;
		}

		public MemoryOperand(Register @base, long displacement, bool isBroadcast, Register segmentPrefix)
		{
			SegmentPrefix = segmentPrefix;
			Base = @base;
			Index = Register.None;
			Scale = 1;
			Displacement = displacement;
			DisplSize = 1;
			IsBroadcast = isBroadcast;
		}

		public MemoryOperand(Register @base, Register index, int scale, long displacement, int displSize)
		{
			SegmentPrefix = Register.None;
			Base = @base;
			Index = index;
			Scale = scale;
			Displacement = displacement;
			DisplSize = displSize;
			IsBroadcast = false;
		}

		public MemoryOperand(Register @base, Register index, int scale)
		{
			SegmentPrefix = Register.None;
			Base = @base;
			Index = index;
			Scale = scale;
			Displacement = 0L;
			DisplSize = 0;
			IsBroadcast = false;
		}

		public MemoryOperand(Register @base, Register index)
		{
			SegmentPrefix = Register.None;
			Base = @base;
			Index = index;
			Scale = 1;
			Displacement = 0L;
			DisplSize = 0;
			IsBroadcast = false;
		}

		public MemoryOperand(Register @base, long displacement, int displSize)
		{
			SegmentPrefix = Register.None;
			Base = @base;
			Index = Register.None;
			Scale = 1;
			Displacement = displacement;
			DisplSize = displSize;
			IsBroadcast = false;
		}

		public MemoryOperand(Register index, int scale, long displacement, int displSize)
		{
			SegmentPrefix = Register.None;
			Base = Register.None;
			Index = index;
			Scale = scale;
			Displacement = displacement;
			DisplSize = displSize;
			IsBroadcast = false;
		}

		public MemoryOperand(Register @base, long displacement)
		{
			SegmentPrefix = Register.None;
			Base = @base;
			Index = Register.None;
			Scale = 1;
			Displacement = displacement;
			DisplSize = 1;
			IsBroadcast = false;
		}

		public MemoryOperand(Register @base)
		{
			SegmentPrefix = Register.None;
			Base = @base;
			Index = Register.None;
			Scale = 1;
			Displacement = 0L;
			DisplSize = 0;
			IsBroadcast = false;
		}

		public MemoryOperand(ulong displacement, int displSize)
		{
			SegmentPrefix = Register.None;
			Base = Register.None;
			Index = Register.None;
			Scale = 1;
			Displacement = (long)displacement;
			DisplSize = displSize;
			IsBroadcast = false;
		}
	}
	public enum MemorySize
	{
		Unknown,
		UInt8,
		UInt16,
		UInt32,
		UInt52,
		UInt64,
		UInt128,
		UInt256,
		UInt512,
		Int8,
		Int16,
		Int32,
		Int64,
		Int128,
		Int256,
		Int512,
		SegPtr16,
		SegPtr32,
		SegPtr64,
		WordOffset,
		DwordOffset,
		QwordOffset,
		Bound16_WordWord,
		Bound32_DwordDword,
		Bnd32,
		Bnd64,
		Fword6,
		Fword10,
		Float16,
		Float32,
		Float64,
		Float80,
		Float128,
		BFloat16,
		FpuEnv14,
		FpuEnv28,
		FpuState94,
		FpuState108,
		Fxsave_512Byte,
		Fxsave64_512Byte,
		Xsave,
		Xsave64,
		Bcd,
		Tilecfg,
		Tile,
		SegmentDescSelector,
		KLHandleAes128,
		KLHandleAes256,
		Packed16_UInt8,
		Packed16_Int8,
		Packed32_UInt8,
		Packed32_Int8,
		Packed32_UInt16,
		Packed32_Int16,
		Packed32_Float16,
		Packed32_BFloat16,
		Packed64_UInt8,
		Packed64_Int8,
		Packed64_UInt16,
		Packed64_Int16,
		Packed64_UInt32,
		Packed64_Int32,
		Packed64_Float16,
		Packed64_Float32,
		Packed128_UInt8,
		Packed128_Int8,
		Packed128_UInt16,
		Packed128_Int16,
		Packed128_UInt32,
		Packed128_Int32,
		Packed128_UInt52,
		Packed128_UInt64,
		Packed128_Int64,
		Packed128_Float16,
		Packed128_Float32,
		Packed128_Float64,
		Packed128_BFloat16,
		Packed128_2xFloat16,
		Packed128_2xBFloat16,
		Packed256_UInt8,
		Packed256_Int8,
		Packed256_UInt16,
		Packed256_Int16,
		Packed256_UInt32,
		Packed256_Int32,
		Packed256_UInt52,
		Packed256_UInt64,
		Packed256_Int64,
		Packed256_UInt128,
		Packed256_Int128,
		Packed256_Float16,
		Packed256_Float32,
		Packed256_Float64,
		Packed256_Float128,
		Packed256_BFloat16,
		Packed256_2xFloat16,
		Packed256_2xBFloat16,
		Packed512_UInt8,
		Packed512_Int8,
		Packed512_UInt16,
		Packed512_Int16,
		Packed512_UInt32,
		Packed512_Int32,
		Packed512_UInt52,
		Packed512_UInt64,
		Packed512_Int64,
		Packed512_UInt128,
		Packed512_Float16,
		Packed512_Float32,
		Packed512_Float64,
		Packed512_2xFloat16,
		Packed512_2xBFloat16,
		Broadcast32_Float16,
		Broadcast64_UInt32,
		Broadcast64_Int32,
		Broadcast64_Float16,
		Broadcast64_Float32,
		Broadcast128_Int16,
		Broadcast128_UInt16,
		Broadcast128_UInt32,
		Broadcast128_Int32,
		Broadcast128_UInt52,
		Broadcast128_UInt64,
		Broadcast128_Int64,
		Broadcast128_Float16,
		Broadcast128_Float32,
		Broadcast128_Float64,
		Broadcast128_2xInt16,
		Broadcast128_2xInt32,
		Broadcast128_2xUInt32,
		Broadcast128_2xFloat16,
		Broadcast128_2xBFloat16,
		Broadcast256_Int16,
		Broadcast256_UInt16,
		Broadcast256_UInt32,
		Broadcast256_Int32,
		Broadcast256_UInt52,
		Broadcast256_UInt64,
		Broadcast256_Int64,
		Broadcast256_Float16,
		Broadcast256_Float32,
		Broadcast256_Float64,
		Broadcast256_2xInt16,
		Broadcast256_2xInt32,
		Broadcast256_2xUInt32,
		Broadcast256_2xFloat16,
		Broadcast256_2xBFloat16,
		Broadcast512_Int16,
		Broadcast512_UInt16,
		Broadcast512_UInt32,
		Broadcast512_Int32,
		Broadcast512_UInt52,
		Broadcast512_UInt64,
		Broadcast512_Int64,
		Broadcast512_Float16,
		Broadcast512_Float32,
		Broadcast512_Float64,
		Broadcast512_2xFloat16,
		Broadcast512_2xInt16,
		Broadcast512_2xUInt32,
		Broadcast512_2xInt32,
		Broadcast512_2xBFloat16
	}
	public static class MemorySizeExtensions
	{
		internal static readonly MemorySizeInfo[] MemorySizeInfos = GetMemorySizeInfos();

		public static bool IsBroadcast(this MemorySize memorySize)
		{
			return memorySize >= MemorySize.Broadcast32_Float16;
		}

		private static MemorySizeInfo[] GetMemorySizeInfos()
		{
			ReadOnlySpan<byte> readOnlySpan = new byte[486]
			{
				0, 0, 0, 1, 33, 0, 2, 66, 0, 3,
				99, 0, 4, 165, 0, 5, 165, 0, 6, 8,
				1, 7, 74, 1, 8, 140, 1, 9, 33, 128,
				10, 66, 128, 11, 99, 128, 12, 165, 128, 13,
				8, 129, 14, 74, 129, 15, 140, 129, 16, 99,
				0, 17, 132, 0, 18, 198, 0, 19, 66, 0,
				20, 99, 0, 21, 165, 0, 2, 67, 0, 3,
				101, 0, 24, 165, 0, 25, 8, 1, 26, 132,
				0, 27, 198, 0, 28, 66, 128, 29, 99, 128,
				30, 165, 128, 31, 198, 128, 32, 8, 129, 33,
				66, 128, 34, 231, 0, 35, 41, 1, 36, 173,
				1, 37, 206, 1, 38, 239, 1, 39, 239, 1,
				40, 0, 0, 41, 0, 0, 42, 198, 128, 43,
				140, 1, 44, 0, 0, 45, 198, 0, 46, 107,
				1, 47, 140, 1, 1, 34, 0, 9, 34, 128,
				1, 35, 0, 9, 35, 128, 2, 67, 0, 10,
				67, 128, 28, 67, 128, 33, 67, 128, 1, 37,
				0, 9, 37, 128, 2, 69, 0, 10, 69, 128,
				3, 101, 0, 11, 101, 128, 28, 69, 128, 29,
				101, 128, 1, 40, 0, 9, 40, 128, 2, 72,
				0, 10, 72, 128, 3, 104, 0, 11, 104, 128,
				4, 168, 0, 5, 168, 0, 12, 168, 128, 28,
				72, 128, 29, 104, 128, 30, 168, 128, 33, 72,
				128, 54, 104, 128, 55, 104, 128, 1, 42, 0,
				9, 42, 128, 2, 74, 0, 10, 74, 128, 3,
				106, 0, 11, 106, 128, 4, 170, 0, 5, 170,
				0, 12, 170, 128, 6, 10, 1, 13, 10, 129,
				28, 74, 128, 29, 106, 128, 30, 170, 128, 32,
				10, 129, 33, 74, 128, 54, 106, 128, 55, 106,
				128, 1, 44, 0, 9, 44, 128, 2, 76, 0,
				10, 76, 128, 3, 108, 0, 11, 108, 128, 4,
				172, 0, 5, 172, 0, 12, 172, 128, 6, 12,
				1, 28, 76, 128, 29, 108, 128, 30, 172, 128,
				54, 108, 128, 55, 108, 128, 28, 66, 128, 3,
				99, 0, 11, 99, 128, 28, 66, 128, 29, 99,
				128, 10, 66, 0, 2, 66, 0, 3, 99, 0,
				11, 99, 128, 4, 165, 0, 5, 165, 0, 12,
				165, 128, 28, 66, 128, 29, 99, 128, 30, 165,
				128, 53, 99, 128, 61, 165, 128, 60, 165, 0,
				54, 99, 128, 55, 99, 128, 10, 66, 0, 2,
				66, 0, 3, 99, 0, 11, 99, 128, 4, 165,
				0, 5, 165, 0, 12, 165, 128, 28, 66, 128,
				29, 99, 128, 30, 165, 128, 53, 99, 128, 61,
				165, 128, 60, 165, 0, 54, 99, 128, 55, 99,
				128, 10, 66, 0, 2, 66, 0, 3, 99, 0,
				11, 99, 128, 4, 165, 0, 5, 165, 0, 12,
				165, 128, 28, 66, 128, 29, 99, 128, 30, 165,
				128, 54, 99, 128, 53, 99, 128, 60, 165, 0,
				61, 165, 128, 55, 99, 128
			};
			ushort[] array = new ushort[16]
			{
				0, 1, 2, 4, 6, 8, 10, 14, 16, 28,
				32, 48, 64, 94, 108, 512
			};
			MemorySizeInfo[] array2 = new MemorySizeInfo[162];
			int num = 0;
			int num2 = 0;
			while (num < array2.Length)
			{
				MemorySize elementType = (MemorySize)readOnlySpan[num2];
				uint num3 = (uint)((readOnlySpan[num2 + 2] << 8) | readOnlySpan[num2 + 1]);
				ushort size = array[num3 & 0x1F];
				ushort elementSize = array[(num3 >> 5) & 0x1F];
				array2[num] = new MemorySizeInfo((MemorySize)num, size, elementSize, elementType, (num3 & 0x8000) != 0, num >= 112);
				num++;
				num2 += 3;
			}
			return array2;
		}

		public static MemorySizeInfo GetInfo(this MemorySize memorySize)
		{
			MemorySizeInfo[] memorySizeInfos = MemorySizeInfos;
			if ((uint)memorySize >= (uint)memorySizeInfos.Length)
			{
				ThrowHelper.ThrowArgumentOutOfRangeException_memorySize();
			}
			return memorySizeInfos[(int)memorySize];
		}

		public static int GetSize(this MemorySize memorySize)
		{
			return memorySize.GetInfo().Size;
		}

		public static int GetElementSize(this MemorySize memorySize)
		{
			return memorySize.GetInfo().ElementSize;
		}

		public static MemorySize GetElementType(this MemorySize memorySize)
		{
			return memorySize.GetInfo().ElementType;
		}

		public static MemorySizeInfo GetElementTypeInfo(this MemorySize memorySize)
		{
			return memorySize.GetInfo().ElementType.GetInfo();
		}

		public static bool IsSigned(this MemorySize memorySize)
		{
			return memorySize.GetInfo().IsSigned;
		}

		public static bool IsPacked(this MemorySize memorySize)
		{
			return memorySize.GetInfo().IsPacked;
		}

		public static int GetElementCount(this MemorySize memorySize)
		{
			return memorySize.GetInfo().ElementCount;
		}
	}
	public readonly struct MemorySizeInfo
	{
		private readonly ushort size;

		private readonly ushort elementSize;

		private readonly byte memorySize;

		private readonly byte elementType;

		private readonly bool isSigned;

		private readonly bool isBroadcast;

		public MemorySize MemorySize => (MemorySize)memorySize;

		public int Size => size;

		public int ElementSize => elementSize;

		public MemorySize ElementType => (MemorySize)elementType;

		public bool IsSigned => isSigned;

		public bool IsBroadcast => isBroadcast;

		public bool IsPacked => elementSize < size;

		public int ElementCount
		{
			get
			{
				if (elementSize != size)
				{
					return size / elementSize;
				}
				return 1;
			}
		}

		public MemorySizeInfo(MemorySize memorySize, int size, int elementSize, MemorySize elementType, bool isSigned, bool isBroadcast)
		{
			if (size < 0)
			{
				ThrowHelper.ThrowArgumentOutOfRangeException_size();
			}
			if (elementSize < 0)
			{
				ThrowHelper.ThrowArgumentOutOfRangeException_elementSize();
			}
			if (elementSize > size)
			{
				ThrowHelper.ThrowArgumentOutOfRangeException_elementSize();
			}
			this.memorySize = (byte)memorySize;
			this.size = (ushort)size;
			this.elementSize = (ushort)elementSize;
			this.elementType = (byte)elementType;
			this.isSigned = isSigned;
			this.isBroadcast = isBroadcast;
		}
	}
	public enum MemorySizeOptions
	{
		Default,
		Always,
		Minimal,
		Never
	}
	public enum Mnemonic
	{
		INVALID,
		Aaa,
		Aad,
		Aam,
		Aas,
		Adc,
		Adcx,
		Add,
		Addpd,
		Addps,
		Addsd,
		Addss,
		Addsubpd,
		Addsubps,
		Adox,
		Aesdec,
		Aesdeclast,
		Aesenc,
		Aesenclast,
		Aesimc,
		Aeskeygenassist,
		And,
		Andn,
		Andnpd,
		Andnps,
		Andpd,
		Andps,
		Arpl,
		Bextr,
		Blcfill,
		Blci,
		Blcic,
		Blcmsk,
		Blcs,
		Blendpd,
		Blendps,
		Blendvpd,
		Blendvps,
		Blsfill,
		Blsi,
		Blsic,
		Blsmsk,
		Blsr,
		Bndcl,
		Bndcn,
		Bndcu,
		Bndldx,
		Bndmk,
		Bndmov,
		Bndstx,
		Bound,
		Bsf,
		Bsr,
		Bswap,
		Bt,
		Btc,
		Btr,
		Bts,
		Bzhi,
		Call,
		Cbw,
		Cdq,
		Cdqe,
		Cl1invmb,
		Clac,
		Clc,
		Cld,
		Cldemote,
		Clflush,
		Clflushopt,
		Clgi,
		Cli,
		Clrssbsy,
		Clts,
		Clwb,
		Clzero,
		Cmc,
		Cmova,
		Cmovae,
		Cmovb,
		Cmovbe,
		Cmove,
		Cmovg,
		Cmovge,
		Cmovl,
		Cmovle,
		Cmovne,
		Cmovno,
		Cmovnp,
		Cmovns,
		Cmovo,
		Cmovp,
		Cmovs,
		Cmp,
		Cmppd,
		Cmpps,
		Cmpsb,
		Cmpsd,
		Cmpsq,
		Cmpss,
		Cmpsw,
		Cmpxchg,
		Cmpxchg16b,
		Cmpxchg8b,
		Comisd,
		Comiss,
		Cpuid,
		Cqo,
		Crc32,
		Cvtdq2pd,
		Cvtdq2ps,
		Cvtpd2dq,
		Cvtpd2pi,
		Cvtpd2ps,
		Cvtpi2pd,
		Cvtpi2ps,
		Cvtps2dq,
		Cvtps2pd,
		Cvtps2pi,
		Cvtsd2si,
		Cvtsd2ss,
		Cvtsi2sd,
		Cvtsi2ss,
		Cvtss2sd,
		Cvtss2si,
		Cvttpd2dq,
		Cvttpd2pi,
		Cvttps2dq,
		Cvttps2pi,
		Cvttsd2si,
		Cvttss2si,
		Cwd,
		Cwde,
		Daa,
		Das,
		Db,
		Dd,
		Dec,
		Div,
		Divpd,
		Divps,
		Divsd,
		Divss,
		Dppd,
		Dpps,
		Dq,
		Dw,
		Emms,
		Encls,
		Enclu,
		Enclv,
		Endbr32,
		Endbr64,
		Enqcmd,
		Enqcmds,
		Enter,
		Extractps,
		Extrq,
		F2xm1,
		Fabs,
		Fadd,
		Faddp,
		Fbld,
		Fbstp,
		Fchs,
		Fclex,
		Fcmovb,
		Fcmovbe,
		Fcmove,
		Fcmovnb,
		Fcmovnbe,
		Fcmovne,
		Fcmovnu,
		Fcmovu,
		Fcom,
		Fcomi,
		Fcomip,
		Fcomp,
		Fcompp,
		Fcos,
		Fdecstp,
		Fdisi,
		Fdiv,
		Fdivp,
		Fdivr,
		Fdivrp,
		Femms,
		Feni,
		Ffree,
		Ffreep,
		Fiadd,
		Ficom,
		Ficomp,
		Fidiv,
		Fidivr,
		Fild,
		Fimul,
		Fincstp,
		Finit,
		Fist,
		Fistp,
		Fisttp,
		Fisub,
		Fisubr,
		Fld,
		Fld1,
		Fldcw,
		Fldenv,
		Fldl2e,
		Fldl2t,
		Fldlg2,
		Fldln2,
		Fldpi,
		Fldz,
		Fmul,
		Fmulp,
		Fnclex,
		Fndisi,
		Fneni,
		Fninit,
		Fnop,
		Fnsave,
		Fnsetpm,
		Fnstcw,
		Fnstenv,
		Fnstsw,
		Fpatan,
		Fprem,
		Fprem1,
		Fptan,
		Frndint,
		Frstor,
		Frstpm,
		Fsave,
		Fscale,
		Fsetpm,
		Fsin,
		Fsincos,
		Fsqrt,
		Fst,
		Fstcw,
		Fstdw,
		Fstenv,
		Fstp,
		Fstpnce,
		Fstsg,
		Fstsw,
		Fsub,
		Fsubp,
		Fsubr,
		Fsubrp,
		Ftst,
		Fucom,
		Fucomi,
		Fucomip,
		Fucomp,
		Fucompp,
		Fxam,
		Fxch,
		Fxrstor,
		Fxrstor64,
		Fxsave,
		Fxsave64,
		Fxtract,
		Fyl2x,
		Fyl2xp1,
		Getsec,
		Gf2p8affineinvqb,
		Gf2p8affineqb,
		Gf2p8mulb,
		Haddpd,
		Haddps,
		Hlt,
		Hsubpd,
		Hsubps,
		Ibts,
		Idiv,
		Imul,
		In,
		Inc,
		Incsspd,
		Incsspq,
		Insb,
		Insd,
		Insertps,
		Insertq,
		Insw,
		Int,
		Int1,
		Into,
		Invd,
		Invept,
		Invlpg,
		Invlpga,
		Invpcid,
		Invvpid,
		Iret,
		Ja,
		Jae,
		Jb,
		Jbe,
		Jcxz,
		Je,
		Jecxz,
		Jg,
		Jge,
		Jl,
		Jle,
		Jmp,
		Jmpe,
		Jne,
		Jno,
		Jnp,
		Jns,
		Jo,
		Jp,
		Jrcxz,
		Js,
		Kaddb,
		Kaddd,
		Kaddq,
		Kaddw,
		Kandb,
		Kandd,
		Kandnb,
		Kandnd,
		Kandnq,
		Kandnw,
		Kandq,
		Kandw,
		Kmovb,
		Kmovd,
		Kmovq,
		Kmovw,
		Knotb,
		Knotd,
		Knotq,
		Knotw,
		Korb,
		Kord,
		Korq,
		Kortestb,
		Kortestd,
		Kortestq,
		Kortestw,
		Korw,
		Kshiftlb,
		Kshiftld,
		Kshiftlq,
		Kshiftlw,
		Kshiftrb,
		Kshiftrd,
		Kshiftrq,
		Kshiftrw,
		Ktestb,
		Ktestd,
		Ktestq,
		Ktestw,
		Kunpckbw,
		Kunpckdq,
		Kunpckwd,
		Kxnorb,
		Kxnord,
		Kxnorq,
		Kxnorw,
		Kxorb,
		Kxord,
		Kxorq,
		Kxorw,
		Lahf,
		Lar,
		Lddqu,
		Ldmxcsr,
		Lds,
		Lea,
		Leave,
		Les,
		Lfence,
		Lfs,
		Lgdt,
		Lgs,
		Lidt,
		Lldt,
		Llwpcb,
		Lmsw,
		Loadall,
		Lodsb,
		Lodsd,
		Lodsq,
		Lodsw,
		Loop,
		Loope,
		Loopne,
		Lsl,
		Lss,
		Ltr,
		Lwpins,
		Lwpval,
		Lzcnt,
		Maskmovdqu,
		Maskmovq,
		Maxpd,
		Maxps,
		Maxsd,
		Maxss,
		Mcommit,
		Mfence,
		Minpd,
		Minps,
		Minsd,
		Minss,
		Monitor,
		Monitorx,
		Montmul,
		Mov,
		Movapd,
		Movaps,
		Movbe,
		Movd,
		Movddup,
		Movdir64b,
		Movdiri,
		Movdq2q,
		Movdqa,
		Movdqu,
		Movhlps,
		Movhpd,
		Movhps,
		Movlhps,
		Movlpd,
		Movlps,
		Movmskpd,
		Movmskps,
		Movntdq,
		Movntdqa,
		Movnti,
		Movntpd,
		Movntps,
		Movntq,
		Movntsd,
		Movntss,
		Movq,
		Movq2dq,
		Movsb,
		Movsd,
		Movshdup,
		Movsldup,
		Movsq,
		Movss,
		Movsw,
		Movsx,
		Movsxd,
		Movupd,
		Movups,
		Movzx,
		Mpsadbw,
		Mul,
		Mulpd,
		Mulps,
		Mulsd,
		Mulss,
		Mulx,
		Mwait,
		Mwaitx,
		Neg,
		Nop,
		Not,
		Or,
		Orpd,
		Orps,
		Out,
		Outsb,
		Outsd,
		Outsw,
		Pabsb,
		Pabsd,
		Pabsw,
		Packssdw,
		Packsswb,
		Packusdw,
		Packuswb,
		Paddb,
		Paddd,
		Paddq,
		Paddsb,
		Paddsw,
		Paddusb,
		Paddusw,
		Paddw,
		Palignr,
		Pand,
		Pandn,
		Pause,
		Pavgb,
		Pavgusb,
		Pavgw,
		Pblendvb,
		Pblendw,
		Pclmulqdq,
		Pcmpeqb,
		Pcmpeqd,
		Pcmpeqq,
		Pcmpeqw,
		Pcmpestri,
		Pcmpestri64,
		Pcmpestrm,
		Pcmpestrm64,
		Pcmpgtb,
		Pcmpgtd,
		Pcmpgtq,
		Pcmpgtw,
		Pcmpistri,
		Pcmpistrm,
		Pcommit,
		Pconfig,
		Pdep,
		Pext,
		Pextrb,
		Pextrd,
		Pextrq,
		Pextrw,
		Pf2id,
		Pf2iw,
		Pfacc,
		Pfadd,
		Pfcmpeq,
		Pfcmpge,
		Pfcmpgt,
		Pfmax,
		Pfmin,
		Pfmul,
		Pfnacc,
		Pfpnacc,
		Pfrcp,
		Pfrcpit1,
		Pfrcpit2,
		Pfrcpv,
		Pfrsqit1,
		Pfrsqrt,
		Pfrsqrtv,
		Pfsub,
		Pfsubr,
		Phaddd,
		Phaddsw,
		Phaddw,
		Phminposuw,
		Phsubd,
		Phsubsw,
		Phsubw,
		Pi2fd,
		Pi2fw,
		Pinsrb,
		Pinsrd,
		Pinsrq,
		Pinsrw,
		Pmaddubsw,
		Pmaddwd,
		Pmaxsb,
		Pmaxsd,
		Pmaxsw,
		Pmaxub,
		Pmaxud,
		Pmaxuw,
		Pminsb,
		Pminsd,
		Pminsw,
		Pminub,
		Pminud,
		Pminuw,
		Pmovmskb,
		Pmovsxbd,
		Pmovsxbq,
		Pmovsxbw,
		Pmovsxdq,
		Pmovsxwd,
		Pmovsxwq,
		Pmovzxbd,
		Pmovzxbq,
		Pmovzxbw,
		Pmovzxdq,
		Pmovzxwd,
		Pmovzxwq,
		Pmuldq,
		Pmulhrsw,
		Pmulhrw,
		Pmulhuw,
		Pmulhw,
		Pmulld,
		Pmullw,
		Pmuludq,
		Pop,
		Popa,
		Popcnt,
		Popf,
		Por,
		Prefetch,
		Prefetchnta,
		Prefetcht0,
		Prefetcht1,
		Prefetcht2,
		Prefetchw,
		Prefetchwt1,
		Psadbw,
		Pshufb,
		Pshufd,
		Pshufhw,
		Pshuflw,
		Pshufw,
		Psignb,
		Psignd,
		Psignw,
		Pslld,
		Pslldq,
		Psllq,
		Psllw,
		Psrad,
		Psraw,
		Psrld,
		Psrldq,
		Psrlq,
		Psrlw,
		Psubb,
		Psubd,
		Psubq,
		Psubsb,
		Psubsw,
		Psubusb,
		Psubusw,
		Psubw,
		Pswapd,
		Ptest,
		Ptwrite,
		Punpckhbw,
		Punpckhdq,
		Punpckhqdq,
		Punpckhwd,
		Punpcklbw,
		Punpckldq,
		Punpcklqdq,
		Punpcklwd,
		Push,
		Pusha,
		Pushf,
		Pxor,
		Rcl,
		Rcpps,
		Rcpss,
		Rcr,
		Rdfsbase,
		Rdgsbase,
		Rdmsr,
		Rdpid,
		Rdpkru,
		Rdpmc,
		Rdpru,
		Rdrand,
		Rdseed,
		Rdsspd,
		Rdsspq,
		Rdtsc,
		Rdtscp,
		Reservednop,
		Ret,
		Retf,
		Rol,
		Ror,
		Rorx,
		Roundpd,
		Roundps,
		Roundsd,
		Roundss,
		Rsm,
		Rsqrtps,
		Rsqrtss,
		Rstorssp,
		Sahf,
		Sal,
		Salc,
		Sar,
		Sarx,
		Saveprevssp,
		Sbb,
		Scasb,
		Scasd,
		Scasq,
		Scasw,
		Seta,
		Setae,
		Setb,
		Setbe,
		Sete,
		Setg,
		Setge,
		Setl,
		Setle,
		Setne,
		Setno,
		Setnp,
		Setns,
		Seto,
		Setp,
		Sets,
		Setssbsy,
		Sfence,
		Sgdt,
		Sha1msg1,
		Sha1msg2,
		Sha1nexte,
		Sha1rnds4,
		Sha256msg1,
		Sha256msg2,
		Sha256rnds2,
		Shl,
		Shld,
		Shlx,
		Shr,
		Shrd,
		Shrx,
		Shufpd,
		Shufps,
		Sidt,
		Skinit,
		Sldt,
		Slwpcb,
		Smsw,
		Sqrtpd,
		Sqrtps,
		Sqrtsd,
		Sqrtss,
		Stac,
		Stc,
		Std,
		Stgi,
		Sti,
		Stmxcsr,
		Stosb,
		Stosd,
		Stosq,
		Stosw,
		Str,
		Sub,
		Subpd,
		Subps,
		Subsd,
		Subss,
		Swapgs,
		Syscall,
		Sysenter,
		Sysexit,
		Sysret,
		T1mskc,
		Test,
		Tpause,
		Tzcnt,
		Tzmsk,
		Ucomisd,
		Ucomiss,
		Ud0,
		Ud1,
		Ud2,
		Umonitor,
		Umov,
		Umwait,
		Unpckhpd,
		Unpckhps,
		Unpcklpd,
		Unpcklps,
		V4fmaddps,
		V4fmaddss,
		V4fnmaddps,
		V4fnmaddss,
		Vaddpd,
		Vaddps,
		Vaddsd,
		Vaddss,
		Vaddsubpd,
		Vaddsubps,
		Vaesdec,
		Vaesdeclast,
		Vaesenc,
		Vaesenclast,
		Vaesimc,
		Vaeskeygenassist,
		Valignd,
		Valignq,
		Vandnpd,
		Vandnps,
		Vandpd,
		Vandps,
		Vblendmpd,
		Vblendmps,
		Vblendpd,
		Vblendps,
		Vblendvpd,
		Vblendvps,
		Vbroadcastf128,
		Vbroadcastf32x2,
		Vbroadcastf32x4,
		Vbroadcastf32x8,
		Vbroadcastf64x2,
		Vbroadcastf64x4,
		Vbroadcasti128,
		Vbroadcasti32x2,
		Vbroadcasti32x4,
		Vbroadcasti32x8,
		Vbroadcasti64x2,
		Vbroadcasti64x4,
		Vbroadcastsd,
		Vbroadcastss,
		Vcmppd,
		Vcmpps,
		Vcmpsd,
		Vcmpss,
		Vcomisd,
		Vcomiss,
		Vcompresspd,
		Vcompressps,
		Vcvtdq2pd,
		Vcvtdq2ps,
		Vcvtne2ps2bf16,
		Vcvtneps2bf16,
		Vcvtpd2dq,
		Vcvtpd2ps,
		Vcvtpd2qq,
		Vcvtpd2udq,
		Vcvtpd2uqq,
		Vcvtph2ps,
		Vcvtps2dq,
		Vcvtps2pd,
		Vcvtps2ph,
		Vcvtps2qq,
		Vcvtps2udq,
		Vcvtps2uqq,
		Vcvtqq2pd,
		Vcvtqq2ps,
		Vcvtsd2si,
		Vcvtsd2ss,
		Vcvtsd2usi,
		Vcvtsi2sd,
		Vcvtsi2ss,
		Vcvtss2sd,
		Vcvtss2si,
		Vcvtss2usi,
		Vcvttpd2dq,
		Vcvttpd2qq,
		Vcvttpd2udq,
		Vcvttpd2uqq,
		Vcvttps2dq,
		Vcvttps2qq,
		Vcvttps2udq,
		Vcvttps2uqq,
		Vcvttsd2si,
		Vcvttsd2usi,
		Vcvttss2si,
		Vcvttss2usi,
		Vcvtudq2pd,
		Vcvtudq2ps,
		Vcvtuqq2pd,
		Vcvtuqq2ps,
		Vcvtusi2sd,
		Vcvtusi2ss,
		Vdbpsadbw,
		Vdivpd,
		Vdivps,
		Vdivsd,
		Vdivss,
		Vdpbf16ps,
		Vdppd,
		Vdpps,
		Verr,
		Verw,
		Vexp2pd,
		Vexp2ps,
		Vexpandpd,
		Vexpandps,
		Vextractf128,
		Vextractf32x4,
		Vextractf32x8,
		Vextractf64x2,
		Vextractf64x4,
		Vextracti128,
		Vextracti32x4,
		Vextracti32x8,
		Vextracti64x2,
		Vextracti64x4,
		Vextractps,
		Vfixupimmpd,
		Vfixupimmps,
		Vfixupimmsd,
		Vfixupimmss,
		Vfmadd132pd,
		Vfmadd132ps,
		Vfmadd132sd,
		Vfmadd132ss,
		Vfmadd213pd,
		Vfmadd213ps,
		Vfmadd213sd,
		Vfmadd213ss,
		Vfmadd231pd,
		Vfmadd231ps,
		Vfmadd231sd,
		Vfmadd231ss,
		Vfmaddpd,
		Vfmaddps,
		Vfmaddsd,
		Vfmaddss,
		Vfmaddsub132pd,
		Vfmaddsub132ps,
		Vfmaddsub213pd,
		Vfmaddsub213ps,
		Vfmaddsub231pd,
		Vfmaddsub231ps,
		Vfmaddsubpd,
		Vfmaddsubps,
		Vfmsub132pd,
		Vfmsub132ps,
		Vfmsub132sd,
		Vfmsub132ss,
		Vfmsub213pd,
		Vfmsub213ps,
		Vfmsub213sd,
		Vfmsub213ss,
		Vfmsub231pd,
		Vfmsub231ps,
		Vfmsub231sd,
		Vfmsub231ss,
		Vfmsubadd132pd,
		Vfmsubadd132ps,
		Vfmsubadd213pd,
		Vfmsubadd213ps,
		Vfmsubadd231pd,
		Vfmsubadd231ps,
		Vfmsubaddpd,
		Vfmsubaddps,
		Vfmsubpd,
		Vfmsubps,
		Vfmsubsd,
		Vfmsubss,
		Vfnmadd132pd,
		Vfnmadd132ps,
		Vfnmadd132sd,
		Vfnmadd132ss,
		Vfnmadd213pd,
		Vfnmadd213ps,
		Vfnmadd213sd,
		Vfnmadd213ss,
		Vfnmadd231pd,
		Vfnmadd231ps,
		Vfnmadd231sd,
		Vfnmadd231ss,
		Vfnmaddpd,
		Vfnmaddps,
		Vfnmaddsd,
		Vfnmaddss,
		Vfnmsub132pd,
		Vfnmsub132ps,
		Vfnmsub132sd,
		Vfnmsub132ss,
		Vfnmsub213pd,
		Vfnmsub213ps,
		Vfnmsub213sd,
		Vfnmsub213ss,
		Vfnmsub231pd,
		Vfnmsub231ps,
		Vfnmsub231sd,
		Vfnmsub231ss,
		Vfnmsubpd,
		Vfnmsubps,
		Vfnmsubsd,
		Vfnmsubss,
		Vfpclasspd,
		Vfpclassps,
		Vfpclasssd,
		Vfpclassss,
		Vfrczpd,
		Vfrczps,
		Vfrczsd,
		Vfrczss,
		Vgatherdpd,
		Vgatherdps,
		Vgatherpf0dpd,
		Vgatherpf0dps,
		Vgatherpf0qpd,
		Vgatherpf0qps,
		Vgatherpf1dpd,
		Vgatherpf1dps,
		Vgatherpf1qpd,
		Vgatherpf1qps,
		Vgatherqpd,
		Vgatherqps,
		Vgetexppd,
		Vgetexpps,
		Vgetexpsd,
		Vgetexpss,
		Vgetmantpd,
		Vgetmantps,
		Vgetmantsd,
		Vgetmantss,
		Vgf2p8affineinvqb,
		Vgf2p8affineqb,
		Vgf2p8mulb,
		Vhaddpd,
		Vhaddps,
		Vhsubpd,
		Vhsubps,
		Vinsertf128,
		Vinsertf32x4,
		Vinsertf32x8,
		Vinsertf64x2,
		Vinsertf64x4,
		Vinserti128,
		Vinserti32x4,
		Vinserti32x8,
		Vinserti64x2,
		Vinserti64x4,
		Vinsertps,
		Vlddqu,
		Vldmxcsr,
		Vmaskmovdqu,
		Vmaskmovpd,
		Vmaskmovps,
		Vmaxpd,
		Vmaxps,
		Vmaxsd,
		Vmaxss,
		Vmcall,
		Vmclear,
		Vmfunc,
		Vminpd,
		Vminps,
		Vminsd,
		Vminss,
		Vmlaunch,
		Vmload,
		Vmmcall,
		Vmovapd,
		Vmovaps,
		Vmovd,
		Vmovddup,
		Vmovdqa,
		Vmovdqa32,
		Vmovdqa64,
		Vmovdqu,
		Vmovdqu16,
		Vmovdqu32,
		Vmovdqu64,
		Vmovdqu8,
		Vmovhlps,
		Vmovhpd,
		Vmovhps,
		Vmovlhps,
		Vmovlpd,
		Vmovlps,
		Vmovmskpd,
		Vmovmskps,
		Vmovntdq,
		Vmovntdqa,
		Vmovntpd,
		Vmovntps,
		Vmovq,
		Vmovsd,
		Vmovshdup,
		Vmovsldup,
		Vmovss,
		Vmovupd,
		Vmovups,
		Vmpsadbw,
		Vmptrld,
		Vmptrst,
		Vmread,
		Vmresume,
		Vmrun,
		Vmsave,
		Vmulpd,
		Vmulps,
		Vmulsd,
		Vmulss,
		Vmwrite,
		Vmxoff,
		Vmxon,
		Vorpd,
		Vorps,
		Vp2intersectd,
		Vp2intersectq,
		Vp4dpwssd,
		Vp4dpwssds,
		Vpabsb,
		Vpabsd,
		Vpabsq,
		Vpabsw,
		Vpackssdw,
		Vpacksswb,
		Vpackusdw,
		Vpackuswb,
		Vpaddb,
		Vpaddd,
		Vpaddq,
		Vpaddsb,
		Vpaddsw,
		Vpaddusb,
		Vpaddusw,
		Vpaddw,
		Vpalignr,
		Vpand,
		Vpandd,
		Vpandn,
		Vpandnd,
		Vpandnq,
		Vpandq,
		Vpavgb,
		Vpavgw,
		Vpblendd,
		Vpblendmb,
		Vpblendmd,
		Vpblendmq,
		Vpblendmw,
		Vpblendvb,
		Vpblendw,
		Vpbroadcastb,
		Vpbroadcastd,
		Vpbroadcastmb2q,
		Vpbroadcastmw2d,
		Vpbroadcastq,
		Vpbroadcastw,
		Vpclmulqdq,
		Vpcmov,
		Vpcmpb,
		Vpcmpd,
		Vpcmpeqb,
		Vpcmpeqd,
		Vpcmpeqq,
		Vpcmpeqw,
		Vpcmpestri,
		Vpcmpestri64,
		Vpcmpestrm,
		Vpcmpestrm64,
		Vpcmpgtb,
		Vpcmpgtd,
		Vpcmpgtq,
		Vpcmpgtw,
		Vpcmpistri,
		Vpcmpistrm,
		Vpcmpq,
		Vpcmpub,
		Vpcmpud,
		Vpcmpuq,
		Vpcmpuw,
		Vpcmpw,
		Vpcomb,
		Vpcomd,
		Vpcompressb,
		Vpcompressd,
		Vpcompressq,
		Vpcompressw,
		Vpcomq,
		Vpcomub,
		Vpcomud,
		Vpcomuq,
		Vpcomuw,
		Vpcomw,
		Vpconflictd,
		Vpconflictq,
		Vpdpbusd,
		Vpdpbusds,
		Vpdpwssd,
		Vpdpwssds,
		Vperm2f128,
		Vperm2i128,
		Vpermb,
		Vpermd,
		Vpermi2b,
		Vpermi2d,
		Vpermi2pd,
		Vpermi2ps,
		Vpermi2q,
		Vpermi2w,
		Vpermil2pd,
		Vpermil2ps,
		Vpermilpd,
		Vpermilps,
		Vpermpd,
		Vpermps,
		Vpermq,
		Vpermt2b,
		Vpermt2d,
		Vpermt2pd,
		Vpermt2ps,
		Vpermt2q,
		Vpermt2w,
		Vpermw,
		Vpexpandb,
		Vpexpandd,
		Vpexpandq,
		Vpexpandw,
		Vpextrb,
		Vpextrd,
		Vpextrq,
		Vpextrw,
		Vpgatherdd,
		Vpgatherdq,
		Vpgatherqd,
		Vpgatherqq,
		Vphaddbd,
		Vphaddbq,
		Vphaddbw,
		Vphaddd,
		Vphadddq,
		Vphaddsw,
		Vphaddubd,
		Vphaddubq,
		Vphaddubw,
		Vphaddudq,
		Vphadduwd,
		Vphadduwq,
		Vphaddw,
		Vphaddwd,
		Vphaddwq,
		Vphminposuw,
		Vphsubbw,
		Vphsubd,
		Vphsubdq,
		Vphsubsw,
		Vphsubw,
		Vphsubwd,
		Vpinsrb,
		Vpinsrd,
		Vpinsrq,
		Vpinsrw,
		Vplzcntd,
		Vplzcntq,
		Vpmacsdd,
		Vpmacsdqh,
		Vpmacsdql,
		Vpmacssdd,
		Vpmacssdqh,
		Vpmacssdql,
		Vpmacsswd,
		Vpmacssww,
		Vpmacswd,
		Vpmacsww,
		Vpmadcsswd,
		Vpmadcswd,
		Vpmadd52huq,
		Vpmadd52luq,
		Vpmaddubsw,
		Vpmaddwd,
		Vpmaskmovd,
		Vpmaskmovq,
		Vpmaxsb,
		Vpmaxsd,
		Vpmaxsq,
		Vpmaxsw,
		Vpmaxub,
		Vpmaxud,
		Vpmaxuq,
		Vpmaxuw,
		Vpminsb,
		Vpminsd,
		Vpminsq,
		Vpminsw,
		Vpminub,
		Vpminud,
		Vpminuq,
		Vpminuw,
		Vpmovb2m,
		Vpmovd2m,
		Vpmovdb,
		Vpmovdw,
		Vpmovm2b,
		Vpmovm2d,
		Vpmovm2q,
		Vpmovm2w,
		Vpmovmskb,
		Vpmovq2m,
		Vpmovqb,
		Vpmovqd,
		Vpmovqw,
		Vpmovsdb,
		Vpmovsdw,
		Vpmovsqb,
		Vpmovsqd,
		Vpmovsqw,
		Vpmovswb,
		Vpmovsxbd,
		Vpmovsxbq,
		Vpmovsxbw,
		Vpmovsxdq,
		Vpmovsxwd,
		Vpmovsxwq,
		Vpmovusdb,
		Vpmovusdw,
		Vpmovusqb,
		Vpmovusqd,
		Vpmovusqw,
		Vpmovuswb,
		Vpmovw2m,
		Vpmovwb,
		Vpmovzxbd,
		Vpmovzxbq,
		Vpmovzxbw,
		Vpmovzxdq,
		Vpmovzxwd,
		Vpmovzxwq,
		Vpmuldq,
		Vpmulhrsw,
		Vpmulhuw,
		Vpmulhw,
		Vpmulld,
		Vpmullq,
		Vpmullw,
		Vpmultishiftqb,
		Vpmuludq,
		Vpopcntb,
		Vpopcntd,
		Vpopcntq,
		Vpopcntw,
		Vpor,
		Vpord,
		Vporq,
		Vpperm,
		Vprold,
		Vprolq,
		Vprolvd,
		Vprolvq,
		Vprord,
		Vprorq,
		Vprorvd,
		Vprorvq,
		Vprotb,
		Vprotd,
		Vprotq,
		Vprotw,
		Vpsadbw,
		Vpscatterdd,
		Vpscatterdq,
		Vpscatterqd,
		Vpscatterqq,
		Vpshab,
		Vpshad,
		Vpshaq,
		Vpshaw,
		Vpshlb,
		Vpshld,
		Vpshldd,
		Vpshldq,
		Vpshldvd,
		Vpshldvq,
		Vpshldvw,
		Vpshldw,
		Vpshlq,
		Vpshlw,
		Vpshrdd,
		Vpshrdq,
		Vpshrdvd,
		Vpshrdvq,
		Vpshrdvw,
		Vpshrdw,
		Vpshufb,
		Vpshufbitqmb,
		Vpshufd,
		Vpshufhw,
		Vpshuflw,
		Vpsignb,
		Vpsignd,
		Vpsignw,
		Vpslld,
		Vpslldq,
		Vpsllq,
		Vpsllvd,
		Vpsllvq,
		Vpsllvw,
		Vpsllw,
		Vpsrad,
		Vpsraq,
		Vpsravd,
		Vpsravq,
		Vpsravw,
		Vpsraw,
		Vpsrld,
		Vpsrldq,
		Vpsrlq,
		Vpsrlvd,
		Vpsrlvq,
		Vpsrlvw,
		Vpsrlw,
		Vpsubb,
		Vpsubd,
		Vpsubq,
		Vpsubsb,
		Vpsubsw,
		Vpsubusb,
		Vpsubusw,
		Vpsubw,
		Vpternlogd,
		Vpternlogq,
		Vptest,
		Vptestmb,
		Vptestmd,
		Vptestmq,
		Vptestmw,
		Vptestnmb,
		Vptestnmd,
		Vptestnmq,
		Vptestnmw,
		Vpunpckhbw,
		Vpunpckhdq,
		Vpunpckhqdq,
		Vpunpckhwd,
		Vpunpcklbw,
		Vpunpckldq,
		Vpunpcklqdq,
		Vpunpcklwd,
		Vpxor,
		Vpxord,
		Vpxorq,
		Vrangepd,
		Vrangeps,
		Vrangesd,
		Vrangess,
		Vrcp14pd,
		Vrcp14ps,
		Vrcp14sd,
		Vrcp14ss,
		Vrcp28pd,
		Vrcp28ps,
		Vrcp28sd,
		Vrcp28ss,
		Vrcpps,
		Vrcpss,
		Vreducepd,
		Vreduceps,
		Vreducesd,
		Vreducess,
		Vrndscalepd,
		Vrndscaleps,
		Vrndscalesd,
		Vrndscaless,
		Vroundpd,
		Vroundps,
		Vroundsd,
		Vroundss,
		Vrsqrt14pd,
		Vrsqrt14ps,
		Vrsqrt14sd,
		Vrsqrt14ss,
		Vrsqrt28pd,
		Vrsqrt28ps,
		Vrsqrt28sd,
		Vrsqrt28ss,
		Vrsqrtps,
		Vrsqrtss,
		Vscalefpd,
		Vscalefps,
		Vscalefsd,
		Vscalefss,
		Vscatterdpd,
		Vscatterdps,
		Vscatterpf0dpd,
		Vscatterpf0dps,
		Vscatterpf0qpd,
		Vscatterpf0qps,
		Vscatterpf1dpd,
		Vscatterpf1dps,
		Vscatterpf1qpd,
		Vscatterpf1qps,
		Vscatterqpd,
		Vscatterqps,
		Vshuff32x4,
		Vshuff64x2,
		Vshufi32x4,
		Vshufi64x2,
		Vshufpd,
		Vshufps,
		Vsqrtpd,
		Vsqrtps,
		Vsqrtsd,
		Vsqrtss,
		Vstmxcsr,
		Vsubpd,
		Vsubps,
		Vsubsd,
		Vsubss,
		Vtestpd,
		Vtestps,
		Vucomisd,
		Vucomiss,
		Vunpckhpd,
		Vunpckhps,
		Vunpcklpd,
		Vunpcklps,
		Vxorpd,
		Vxorps,
		Vzeroall,
		Vzeroupper,
		Wait,
		Wbinvd,
		Wbnoinvd,
		Wrfsbase,
		Wrgsbase,
		Wrmsr,
		Wrpkru,
		Wrssd,
		Wrssq,
		Wrussd,
		Wrussq,
		Xabort,
		Xadd,
		Xbegin,
		Xbts,
		Xchg,
		Xcryptcbc,
		Xcryptcfb,
		Xcryptctr,
		Xcryptecb,
		Xcryptofb,
		Xend,
		Xgetbv,
		Xlatb,
		Xor,
		Xorpd,
		Xorps,
		Xrstor,
		Xrstor64,
		Xrstors,
		Xrstors64,
		Xsave,
		Xsave64,
		Xsavec,
		Xsavec64,
		Xsaveopt,
		Xsaveopt64,
		Xsaves,
		Xsaves64,
		Xsetbv,
		Xsha1,
		Xsha256,
		Xstore,
		Xtest,
		Rmpadjust,
		Rmpupdate,
		Psmash,
		Pvalidate,
		Serialize,
		Xsusldtrk,
		Xresldtrk,
		Invlpgb,
		Tlbsync,
		Vmgexit,
		Getsecq,
		Sysexitq,
		Ldtilecfg,
		Tilerelease,
		Sttilecfg,
		Tilezero,
		Tileloaddt1,
		Tilestored,
		Tileloadd,
		Tdpbf16ps,
		Tdpbuud,
		Tdpbusd,
		Tdpbsud,
		Tdpbssd,
		Sysretq,
		Fnstdw,
		Fnstsg,
		Rdshr,
		Wrshr,
		Smint,
		Dmint,
		Rdm,
		Svdc,
		Rsdc,
		Svldt,
		Rsldt,
		Svts,
		Rsts,
		Bb0_reset,
		Bb1_reset,
		Cpu_write,
		Cpu_read,
		Altinst,
		Paveb,
		Paddsiw,
		Pmagw,
		Pdistib,
		Psubsiw,
		Pmvzb,
		Pmvnzb,
		Pmvlzb,
		Pmvgezb,
		Pmulhriw,
		Pmachriw,
		Ftstp,
		Frint2,
		Frichop,
		Frinear,
		Undoc,
		Tdcall,
		Seamret,
		Seamops,
		Seamcall,
		Aesencwide128kl,
		Aesdecwide128kl,
		Aesencwide256kl,
		Aesdecwide256kl,
		Loadiwkey,
		Aesenc128kl,
		Aesdec128kl,
		Aesenc256kl,
		Aesdec256kl,
		Encodekey128,
		Encodekey256,
		Pushad,
		Popad,
		Pushfd,
		Pushfq,
		Popfd,
		Popfq,
		Iretd,
		Iretq,
		Int3,
		Uiret,
		Testui,
		Clui,
		Stui,
		Senduipi,
		Hreset,
		Ccs_hash,
		Ccs_encrypt,
		Lkgs,
		Eretu,
		Erets,
		Storeall,
		Vaddph,
		Vaddsh,
		Vcmpph,
		Vcmpsh,
		Vcomish,
		Vcvtdq2ph,
		Vcvtpd2ph,
		Vcvtph2dq,
		Vcvtph2pd,
		Vcvtph2psx,
		Vcvtph2qq,
		Vcvtph2udq,
		Vcvtph2uqq,
		Vcvtph2uw,
		Vcvtph2w,
		Vcvtps2phx,
		Vcvtqq2ph,
		Vcvtsd2sh,
		Vcvtsh2sd,
		Vcvtsh2si,
		Vcvtsh2ss,
		Vcvtsh2usi,
		Vcvtsi2sh,
		Vcvtss2sh,
		Vcvttph2dq,
		Vcvttph2qq,
		Vcvttph2udq,
		Vcvttph2uqq,
		Vcvttph2uw,
		Vcvttph2w,
		Vcvttsh2si,
		Vcvttsh2usi,
		Vcvtudq2ph,
		Vcvtuqq2ph,
		Vcvtusi2sh,
		Vcvtuw2ph,
		Vcvtw2ph,
		Vdivph,
		Vdivsh,
		Vfcmaddcph,
		Vfmaddcph,
		Vfcmaddcsh,
		Vfmaddcsh,
		Vfcmulcph,
		Vfmulcph,
		Vfcmulcsh,
		Vfmulcsh,
		Vfmaddsub132ph,
		Vfmaddsub213ph,
		Vfmaddsub231ph,
		Vfmsubadd132ph,
		Vfmsubadd213ph,
		Vfmsubadd231ph,
		Vfmadd132ph,
		Vfmadd213ph,
		Vfmadd231ph,
		Vfnmadd132ph,
		Vfnmadd213ph,
		Vfnmadd231ph,
		Vfmadd132sh,
		Vfmadd213sh,
		Vfmadd231sh,
		Vfnmadd132sh,
		Vfnmadd213sh,
		Vfnmadd231sh,
		Vfmsub132ph,
		Vfmsub213ph,
		Vfmsub231ph,
		Vfnmsub132ph,
		Vfnmsub213ph,
		Vfnmsub231ph,
		Vfmsub132sh,
		Vfmsub213sh,
		Vfmsub231sh,
		Vfnmsub132sh,
		Vfnmsub213sh,
		Vfnmsub231sh,
		Vfpclassph,
		Vfpclasssh,
		Vgetexpph,
		Vgetexpsh,
		Vgetmantph,
		Vgetmantsh,
		Vmaxph,
		Vmaxsh,
		Vminph,
		Vminsh,
		Vmovsh,
		Vmovw,
		Vmulph,
		Vmulsh,
		Vrcpph,
		Vrcpsh,
		Vreduceph,
		Vreducesh,
		Vrndscaleph,
		Vrndscalesh,
		Vrsqrtph,
		Vrsqrtsh,
		Vscalefph,
		Vscalefsh,
		Vsqrtph,
		Vsqrtsh,
		Vsubph,
		Vsubsh,
		Vucomish,
		Rdudbg,
		Wrudbg,
		Clevict0,
		Clevict1,
		Delay,
		Jknzd,
		Jkzd,
		Kand,
		Kandn,
		Kandnr,
		Kconcath,
		Kconcatl,
		Kextract,
		Kmerge2l1h,
		Kmerge2l1l,
		Kmov,
		Knot,
		Kor,
		Kortest,
		Kxnor,
		Kxor,
		Spflt,
		Tzcnti,
		Vaddnpd,
		Vaddnps,
		Vaddsetsps,
		Vcvtfxpntdq2ps,
		Vcvtfxpntpd2dq,
		Vcvtfxpntpd2udq,
		Vcvtfxpntps2dq,
		Vcvtfxpntps2udq,
		Vcvtfxpntudq2ps,
		Vexp223ps,
		Vfixupnanpd,
		Vfixupnanps,
		Vfmadd233ps,
		Vgatherpf0hintdpd,
		Vgatherpf0hintdps,
		Vgmaxabsps,
		Vgmaxpd,
		Vgmaxps,
		Vgminpd,
		Vgminps,
		Vloadunpackhd,
		Vloadunpackhpd,
		Vloadunpackhps,
		Vloadunpackhq,
		Vloadunpackld,
		Vloadunpacklpd,
		Vloadunpacklps,
		Vloadunpacklq,
		Vlog2ps,
		Vmovnrapd,
		Vmovnraps,
		Vmovnrngoapd,
		Vmovnrngoaps,
		Vpackstorehd,
		Vpackstorehpd,
		Vpackstorehps,
		Vpackstorehq,
		Vpackstoreld,
		Vpackstorelpd,
		Vpackstorelps,
		Vpackstorelq,
		Vpadcd,
		Vpaddsetcd,
		Vpaddsetsd,
		Vpcmpltd,
		Vpermf32x4,
		Vpmadd231d,
		Vpmadd233d,
		Vpmulhd,
		Vpmulhud,
		Vprefetch0,
		Vprefetch1,
		Vprefetch2,
		Vprefetche0,
		Vprefetche1,
		Vprefetche2,
		Vprefetchenta,
		Vprefetchnta,
		Vpsbbd,
		Vpsbbrd,
		Vpsubrd,
		Vpsubrsetbd,
		Vpsubsetbd,
		Vrcp23ps,
		Vrndfxpntpd,
		Vrndfxpntps,
		Vrsqrt23ps,
		Vscaleps,
		Vscatterpf0hintdpd,
		Vscatterpf0hintdps,
		Vsubrpd,
		Vsubrps,
		Xsha512,
		Xstore_alt,
		Xsha512_alt,
		Zero_bytes,
		Aadd,
		Aand,
		Aor,
		Axor,
		Cmpbexadd,
		Cmpbxadd,
		Cmplexadd,
		Cmplxadd,
		Cmpnbexadd,
		Cmpnbxadd,
		Cmpnlexadd,
		Cmpnlxadd,
		Cmpnoxadd,
		Cmpnpxadd,
		Cmpnsxadd,
		Cmpnzxadd,
		Cmpoxadd,
		Cmppxadd,
		Cmpsxadd,
		Cmpzxadd,
		Prefetchit0,
		Prefetchit1,
		Rdmsrlist,
		Rmpquery,
		Tdpfp16ps,
		Vbcstnebf162ps,
		Vbcstnesh2ps,
		Vcvtneebf162ps,
		Vcvtneeph2ps,
		Vcvtneobf162ps,
		Vcvtneoph2ps,
		Vpdpbssd,
		Vpdpbssds,
		Vpdpbsud,
		Vpdpbsuds,
		Vpdpbuud,
		Vpdpbuuds,
		Wrmsrlist,
		Wrmsrns
	}
	public static class MnemonicUtils
	{
		[MethodImpl(MethodImplOptions.AggressiveInlining)]
		public static Mnemonic Mnemonic(this Code code)
		{
			return (Mnemonic)MnemonicUtilsData.toMnemonic[(int)code];
		}
	}
	internal static class MnemonicUtilsData
	{
		internal static readonly ushort[] toMnemonic = new ushort[4911]
		{
			0, 135, 146, 136, 145, 7, 7, 7, 7, 7,
			7, 7, 7, 7, 7, 7, 7, 640, 640, 590,
			590, 467, 467, 467, 467, 467, 467, 467, 467, 467,
			467, 467, 467, 640, 640, 590, 5, 5, 5, 5,
			5, 5, 5, 5, 5, 5, 5, 5, 640, 640,
			590, 590, 681, 681, 681, 681, 681, 681, 681, 681,
			681, 681, 681, 681, 640, 640, 590, 590, 21, 21,
			21, 21, 21, 21, 21, 21, 21, 21, 21, 21,
			133, 740, 740, 740, 740, 740, 740, 740, 740, 740,
			740, 740, 740, 134, 1518, 1518, 1518, 1518, 1518, 1518,
			1518, 1518, 1518, 1518, 1518, 1518, 1, 93, 93, 93,
			93, 93, 93, 93, 93, 93, 93, 93, 93, 4,
			279, 279, 137, 137, 640, 640, 640, 590, 590, 590,
			641, 1612, 591, 1613, 50, 50, 27, 27, 451, 451,
			451, 640, 640, 640, 277, 277, 277, 640, 640, 640,
			277, 277, 277, 282, 286, 283, 471, 473, 472, 314,
			314, 314, 311, 311, 311, 299, 299, 299, 298, 298,
			298, 302, 302, 302, 310, 310, 310, 300, 300, 300,
			297, 297, 297, 317, 317, 317, 313, 313, 313, 315,
			315, 315, 312, 312, 312, 306, 306, 306, 305, 305,
			305, 307, 307, 307, 304, 304, 304, 7, 467, 5,
			681, 21, 740, 1518, 93, 7, 7, 7, 467, 467,
			467, 5, 5, 5, 681, 681, 681, 21, 21, 21,
			740, 740, 740, 1518, 1518, 1518, 93, 93, 93, 7,
			467, 5, 681, 21, 740, 1518, 93, 7, 7, 7,
			467, 467, 467, 5, 5, 5, 681, 681, 681, 21,
			21, 21, 740, 740, 740, 1518, 1518, 1518, 93, 93,
			93, 751, 751, 751, 751, 1509, 1509, 1509, 1509, 414,
			414, 414, 414, 414, 414, 414, 414, 414, 414, 414,
			374, 374, 374, 414, 414, 414, 590, 590, 590, 465,
			465, 465, 1509, 1509, 1509, 492, 60, 132, 62, 131,
			61, 107, 59, 59, 1494, 642, 1614, 1615, 593, 1616,
			1617, 675, 369, 414, 414, 414, 414, 414, 414, 414,
			414, 443, 449, 444, 447, 96, 100, 97, 98, 751,
			751, 751, 751, 735, 738, 736, 737, 386, 389, 387,
			388, 682, 685, 683, 684, 414, 414, 414, 414, 664,
			665, 644, 647, 712, 715, 676, 678, 664, 664, 664,
			665, 665, 665, 644, 644, 644, 647, 647, 647, 712,
			712, 712, 715, 715, 715, 676, 676, 676, 678, 678,
			678, 662, 662, 662, 662, 662, 662, 376, 376, 373,
			373, 414, 1505, 414, 414, 414, 1507, 1507, 155, 155,
			155, 375, 375, 375, 663, 663, 663, 663, 663, 663,
			1620, 287, 289, 296, 1618, 1619, 664, 665, 644, 647,
			712, 715, 676, 678, 664, 664, 664, 665, 665, 665,
			644, 644, 644, 647, 647, 647, 712, 712, 712, 715,
			715, 715, 676, 676, 676, 678, 678, 678, 664, 665,
			644, 647, 712, 715, 676, 678, 664, 664, 664, 665,
			665, 665, 644, 644, 644, 647, 647, 647, 712, 712,
			712, 715, 715, 715, 676, 676, 676, 678, 678, 678,
			3, 2, 677, 1517, 160, 214, 174, 177, 247, 249,
			182, 184, 160, 214, 174, 177, 247, 249, 182, 184,
			204, 239, 243, 207, 207, 206, 224, 242, 224, 242,
			223, 240, 204, 258, 220, 244, 164, 159, 251, 257,
			205, 209, 208, 212, 210, 211, 213, 158, 264, 229,
			226, 263, 228, 180, 197, 227, 265, 238, 237, 230,
			234, 236, 179, 190, 196, 191, 192, 202, 203, 193,
			194, 166, 168, 167, 173, 256, 195, 201, 199, 200,
			204, 243, 169, 171, 170, 172, 218, 187, 217, 181,
			216, 165, 219, 198, 222, 235, 232, 253, 175, 160,
			214, 174, 177, 247, 249, 182, 184, 160, 214, 174,
			177, 249, 247, 184, 182, 204, 201, 239, 243, 231,
			231, 221, 233, 221, 233, 225, 246, 188, 258, 239,
			243, 252, 255, 190, 196, 191, 192, 202, 203, 193,
			194, 161, 215, 177, 178, 250, 248, 185, 183, 195,
			201, 199, 200, 162, 195, 163, 200, 189, 258, 243,
			243, 225, 246, 241, 245, 254, 176, 392, 392, 392,
			392, 392, 392, 392, 391, 391, 391, 391, 391, 391,
			391, 390, 390, 390, 390, 390, 390, 390, 301, 301,
			303, 303, 303, 316, 316, 278, 278, 278, 470, 470,
			470, 59, 59, 59, 308, 308, 308, 308, 308, 308,
			308, 308, 278, 278, 278, 470, 470, 470, 288, 272,
			76, 751, 751, 466, 464, 456, 277, 138, 276, 751,
			751, 751, 751, 751, 751, 466, 466, 466, 464, 464,
			464, 456, 456, 456, 277, 277, 277, 138, 138, 138,
			276, 276, 276, 65, 730, 71, 733, 66, 731, 279,
			137, 279, 279, 279, 137, 137, 137, 59, 59, 59,
			59, 59, 59, 308, 308, 308, 308, 308, 308, 640,
			640, 640, 722, 722, 722, 739, 739, 739, 382, 382,
			382, 395, 395, 395, 869, 869, 869, 870, 870, 870,
			309, 309, 704, 704, 704, 720, 720, 720, 379, 379,
			379, 381, 381, 381, 724, 724, 724, 674, 384, 384,
			384, 292, 150, 1025, 1032, 1070, 1078, 514, 411, 411,
			411, 462, 64, 729, 148, 1516, 1533, 1027, 1515, 1537,
			149, 1071, 1071, 1071, 1034, 1033, 1033, 1033, 1072, 1072,
			1072, 732, 70, 721, 293, 293, 293, 702, 680, 652,
			1500, 745, 660, 412, 412, 412, 405, 463, 75, 75,
			75, 654, 370, 370, 370, 393, 393, 393, 1632, 385,
			746, 73, 385, 749, 1562, 290, 1495, 1496, 63, 759,
			661, 661, 661, 595, 600, 601, 186, 761, 761, 761,
			761, 761, 761, 453, 1065, 1065, 1065, 1065, 1065, 452,
			1064, 1064, 1064, 1064, 1064, 448, 1063, 1063, 1063, 1063,
			444, 1060, 1060, 1060, 1060, 453, 1065, 1065, 1065, 1065,
			1065, 452, 1064, 1064, 1064, 1064, 1064, 448, 1063, 1063,
			1063, 1063, 444, 1060, 1060, 1060, 1060, 425, 430, 1047,
			1052, 1047, 1052, 429, 1051, 1051, 446, 1062, 1062, 1062,
			1062, 1062, 419, 1038, 1038, 1038, 1038, 1038, 430, 1052,
			1052, 429, 1051, 1051, 766, 1489, 1489, 1489, 1489, 1489,
			765, 1488, 1488, 1488, 1488, 1488, 764, 1487, 1487, 1487,
			1487, 1487, 763, 1486, 1486, 1486, 1486, 1486, 428, 1050,
			1050, 427, 1049, 1049, 426, 1048, 1048, 445, 1061, 1061,
			1061, 1061, 1061, 427, 1049, 1049, 426, 1048, 1048, 661,
			661, 661, 661, 661, 661, 661, 661, 661, 661, 661,
			661, 661, 661, 661, 661, 661, 661, 661, 661, 661,
			661, 661, 661, 596, 597, 598, 599, 46, 48, 48,
			43, 43, 45, 45, 49, 48, 48, 47, 47, 44,
			44, 67, 657, 658, 152, 151, 465, 465, 465, 414,
			414, 414, 414, 414, 414, 414, 414, 414, 414, 416,
			1036, 1036, 1036, 1036, 1036, 415, 1035, 1035, 1035, 1035,
			1035, 416, 1036, 1036, 1036, 1036, 1036, 415, 1035, 1035,
			1035, 1035, 1035, 115, 114, 122, 122, 839, 839, 839,
			839, 121, 121, 838, 838, 838, 838, 437, 1058, 1058,
			1058, 1058, 1058, 436, 1057, 1057, 1057, 1057, 1057, 440,
			439, 128, 126, 130, 130, 853, 853, 853, 853, 129,
			129, 851, 851, 851, 851, 118, 112, 124, 124, 841,
			841, 841, 841, 119, 119, 835, 835, 835, 835, 756,
			1485, 1485, 755, 1484, 1484, 105, 104, 814, 813, 814,
			813, 1499, 659, 650, 653, 747, 748, 1549, 266, 90,
			90, 90, 87, 87, 87, 79, 79, 79, 78, 78,
			78, 81, 81, 81, 86, 86, 86, 80, 80, 80,
			77, 77, 77, 92, 92, 92, 89, 89, 89, 91,
			91, 91, 88, 88, 88, 84, 84, 84, 83, 83,
			83, 85, 85, 85, 82, 82, 82, 329, 328, 322,
			323, 327, 326, 324, 325, 337, 336, 334, 335, 345,
			340, 338, 339, 364, 363, 361, 362, 368, 367, 365,
			366, 321, 320, 318, 319, 360, 359, 358, 432, 432,
			1054, 1054, 1054, 1054, 431, 431, 1053, 1053, 1053, 1053,
			726, 1474, 1474, 1474, 1474, 1474, 725, 1473, 1473, 1473,
			1473, 1473, 728, 1476, 1476, 727, 1475, 1475, 672, 1449,
			1449, 673, 1450, 645, 1427, 1427, 646, 1428, 26, 788,
			788, 788, 788, 788, 25, 787, 787, 787, 787, 787,
			24, 786, 786, 786, 786, 786, 23, 785, 785, 785,
			785, 785, 469, 1081, 1081, 1081, 1081, 1081, 468, 1080,
			1080, 1080, 1080, 1080, 1520, 1491, 1491, 1491, 1491, 1491,
			1519, 1490, 1490, 1490, 1490, 1490, 9, 772, 772, 772,
			772, 772, 8, 771, 771, 771, 771, 771, 11, 774,
			774, 10, 773, 773, 458, 1074, 1074, 1074, 1074, 1074,
			457, 1073, 1073, 1073, 1073, 1073, 460, 1076, 1076, 459,
			1075, 1075, 117, 828, 828, 828, 828, 828, 113, 822,
			822, 822, 822, 822, 123, 840, 840, 120, 836, 836,
			110, 818, 818, 818, 818, 818, 834, 834, 834, 116,
			827, 827, 827, 827, 827, 127, 847, 847, 847, 847,
			847, 742, 1479, 1479, 1479, 1479, 1479, 741, 1478, 1478,
			1478, 1478, 1478, 744, 1481, 1481, 743, 1480, 1480, 408,
			1029, 1029, 1029, 1029, 1029, 407, 1028, 1028, 1028, 1028,
			1028, 410, 1031, 1031, 409, 1030, 1030, 140, 863, 863,
			863, 863, 863, 139, 862, 862, 862, 862, 862, 142,
			865, 865, 141, 864, 864, 402, 1022, 1022, 1022, 1022,
			1022, 401, 1021, 1021, 1021, 1021, 1021, 404, 1024, 1024,
			403, 1023, 1023, 636, 636, 1408, 1408, 1408, 1408, 1408,
			639, 639, 1411, 1411, 1411, 1411, 1411, 637, 637, 1409,
			1409, 1409, 1409, 1409, 478, 478, 1091, 1091, 1091, 1091,
			1091, 507, 507, 1136, 1136, 1136, 1136, 1136, 510, 510,
			1139, 1139, 1139, 1139, 1139, 508, 508, 1137, 1137, 1137,
			1137, 1137, 480, 480, 1093, 1093, 1093, 1093, 1093, 632,
			632, 1404, 1404, 1404, 1404, 1404, 635, 635, 1407, 1407,
			1407, 1407, 1407, 633, 633, 1405, 1405, 1405, 1405, 1405,
			477, 477, 1090, 1090, 1090, 1090, 1090, 638, 1410, 1410,
			1410, 1410, 1410, 634, 1406, 1406, 1406, 1406, 1406, 418,
			441, 418, 441, 1037, 1059, 1037, 1059, 441, 423, 1039,
			1039, 1040, 1040, 1040, 1041, 1041, 1041, 424, 1042, 1042,
			1044, 1044, 1044, 1045, 1045, 1045, 1046, 1046, 1046, 1043,
			1043, 1043, 607, 604, 1359, 1359, 1359, 1359, 1359, 605,
			1360, 1360, 1360, 1360, 1360, 606, 1361, 1361, 1361, 1361,
			1361, 620, 620, 1384, 1384, 1384, 1384, 1384, 616, 616,
			1377, 1377, 1377, 1377, 1377, 614, 614, 1371, 1371, 1371,
			1371, 1371, 1324, 1324, 1324, 1325, 1325, 1325, 1320, 1320,
			1320, 1321, 1321, 1321, 617, 617, 1378, 1378, 1378, 1378,
			1378, 615, 615, 1372, 1372, 1372, 1372, 1372, 1373, 1373,
			1373, 611, 611, 1365, 1365, 1365, 1365, 1365, 619, 619,
			1380, 1380, 1380, 1380, 1380, 618, 1379, 1379, 1379, 1379,
			1379, 613, 613, 1367, 1367, 1367, 1367, 1367, 612, 1366,
			1366, 1366, 1366, 1366, 499, 499, 1128, 1128, 1128, 1128,
			1128, 502, 502, 1131, 1131, 1131, 1131, 1131, 500, 500,
			1129, 1129, 1129, 1129, 1129, 147, 1493, 1492, 1069, 1069,
			849, 849, 849, 845, 845, 845, 157, 850, 850, 850,
			846, 846, 846, 854, 854, 285, 852, 852, 1077, 1077,
			831, 831, 831, 824, 824, 824, 157, 832, 832, 832,
			825, 825, 825, 842, 842, 285, 837, 837, 848, 848,
			848, 844, 844, 844, 855, 855, 855, 857, 857, 857,
			856, 856, 856, 858, 858, 858, 830, 830, 830, 823,
			823, 823, 860, 860, 859, 859, 270, 1001, 1001, 271,
			1002, 1002, 273, 1003, 1003, 274, 1004, 1004, 418, 441,
			418, 441, 1037, 1059, 1037, 1059, 441, 1059, 1059, 441,
			423, 1039, 1039, 1040, 1040, 1040, 1041, 1041, 1041, 424,
			1042, 1042, 1044, 1044, 1044, 1045, 1045, 1045, 1046, 1046,
			1046, 1043, 1043, 1043, 314, 314, 314, 311, 311, 311,
			299, 299, 299, 298, 298, 298, 302, 302, 302, 310,
			310, 310, 300, 300, 300, 297, 297, 297, 317, 317,
			317, 313, 313, 313, 315, 315, 315, 312, 312, 312,
			306, 306, 306, 305, 305, 305, 307, 307, 307, 304,
			304, 304, 699, 696, 688, 687, 690, 695, 689, 686,
			701, 698, 700, 697, 693, 692, 694, 691, 333, 332,
			330, 331, 333, 332, 330, 331, 333, 330, 331, 332,
			333, 330, 331, 332, 344, 343, 341, 342, 357, 356,
			354, 355, 640, 640, 640, 590, 590, 590, 106, 54,
			54, 54, 713, 713, 713, 713, 713, 713, 413, 413,
			413, 1534, 1534, 1534, 1535, 1535, 1535, 1508, 1508, 1536,
			1536, 1536, 1513, 1513, 1513, 1510, 1510, 1510, 1512, 1512,
			1512, 1511, 1511, 1511, 1514, 1514, 1514, 275, 275, 101,
			101, 101, 640, 640, 640, 590, 590, 590, 671, 57,
			57, 57, 716, 716, 716, 716, 716, 716, 261, 262,
			648, 648, 259, 260, 649, 649, 372, 1497, 1497, 1017,
			734, 1498, 1498, 1477, 1525, 1526, 631, 631, 1521, 1522,
			280, 281, 1529, 1530, 74, 752, 752, 72, 760, 760,
			760, 762, 762, 68, 69, 377, 377, 377, 377, 377,
			377, 377, 377, 406, 406, 406, 406, 406, 406, 406,
			406, 703, 703, 703, 703, 703, 703, 703, 703, 513,
			277, 277, 277, 101, 101, 101, 101, 394, 394, 394,
			56, 56, 56, 378, 378, 378, 380, 380, 380, 454,
			454, 454, 454, 454, 454, 309, 309, 592, 592, 592,
			758, 758, 758, 54, 54, 54, 57, 57, 57, 56,
			56, 56, 55, 55, 55, 55, 55, 55, 51, 51,
			51, 753, 753, 753, 52, 52, 52, 398, 398, 398,
			450, 450, 450, 450, 450, 450, 1506, 1506, 1506, 1506,
			95, 810, 810, 810, 810, 810, 94, 809, 809, 809,
			809, 809, 99, 812, 812, 97, 811, 811, 435, 435,
			554, 554, 554, 554, 1227, 1227, 1227, 1227, 520, 520,
			520, 520, 1197, 1197, 1197, 1197, 719, 1472, 1472, 1472,
			1472, 1472, 718, 1471, 1471, 1471, 1471, 1471, 103, 102,
			1523, 1524, 1527, 1528, 1531, 1532, 1067, 1026, 1079, 655,
			655, 655, 1068, 656, 656, 656, 651, 651, 53, 53,
			53, 12, 775, 775, 13, 776, 776, 620, 620, 1384,
			1384, 1384, 1384, 1384, 617, 617, 1378, 1378, 1378, 1378,
			1378, 619, 619, 1380, 1380, 1380, 1380, 1380, 483, 483,
			1096, 1096, 1096, 1096, 1096, 588, 588, 1309, 1309, 1309,
			1309, 1309, 441, 1059, 1059, 442, 422, 569, 569, 569,
			569, 1272, 1272, 1272, 1272, 626, 626, 1390, 1390, 1390,
			1390, 1390, 627, 627, 1391, 1391, 1391, 1391, 1391, 566,
			566, 1260, 1260, 1260, 1260, 1260, 490, 490, 1103, 1103,
			1104, 1104, 1104, 1108, 1108, 1108, 486, 486, 1099, 1099,
			1099, 1099, 1099, 487, 487, 1100, 1100, 1100, 1100, 1100,
			560, 560, 1252, 1252, 1252, 1252, 1252, 491, 491, 1105,
			1105, 1106, 1106, 1106, 1107, 1107, 1107, 493, 493, 1109,
			1109, 1109, 1109, 1109, 616, 616, 1377, 1377, 1377, 1377,
			1377, 615, 615, 1372, 1372, 1372, 1372, 1372, 1373, 1373,
			1373, 495, 495, 1110, 1110, 1110, 1110, 1110, 585, 585,
			1305, 1305, 1305, 1305, 1305, 586, 586, 1306, 1306, 1306,
			1306, 1306, 125, 843, 843, 843, 843, 843, 109, 817,
			817, 817, 817, 817, 833, 833, 833, 111, 821, 821,
			821, 821, 821, 438, 433, 1055, 1055, 1055, 1055, 1055,
			624, 624, 1388, 1388, 1388, 1388, 1388, 625, 625, 1389,
			1389, 1389, 1389, 1389, 565, 565, 1259, 1259, 1259, 1259,
			1259, 594, 594, 1316, 1316, 1317, 1317, 1317, 1318, 1318,
			1318, 484, 484, 1097, 1097, 1097, 1097, 1097, 485, 485,
			1098, 1098, 1098, 1098, 1098, 559, 559, 1251, 1251, 1251,
			1251, 1251, 643, 643, 1412, 1412, 1413, 1413, 1413, 1414,
			1414, 1414, 371, 1016, 1016, 614, 614, 1371, 1371, 1371,
			1371, 1371, 611, 611, 1365, 1365, 1365, 1365, 1365, 613,
			613, 1367, 1367, 1367, 1367, 1367, 589, 589, 1311, 1311,
			1311, 1311, 1311, 556, 556, 1245, 1245, 1245, 1245, 1245,
			602, 602, 1332, 1332, 1332, 1332, 1332, 400, 399, 1018,
			621, 621, 1385, 1385, 1385, 1385, 1385, 628, 628, 1392,
			1392, 1392, 1392, 1392, 622, 622, 1386, 1386, 1386, 1386,
			1386, 623, 623, 1387, 1387, 1387, 1387, 1387, 481, 481,
			1094, 1094, 1094, 1094, 1094, 488, 488, 1101, 1101, 1101,
			1101, 1101, 482, 482, 1095, 1095, 1095, 1095, 1095, 757,
			757, 757, 603, 603, 1357, 1357, 1357, 1357, 1357, 544,
			544, 1214, 1214, 542, 542, 1205, 1205, 543, 543, 1207,
			1207, 555, 555, 1244, 1244, 1244, 1244, 1244, 548, 548,
			1222, 1222, 546, 546, 1219, 1219, 547, 547, 1221, 1221,
			608, 608, 1362, 1362, 610, 610, 1364, 1364, 609, 609,
			1363, 1363, 583, 583, 1304, 1304, 1304, 1304, 1304, 1179,
			1179, 1179, 1179, 1179, 1178, 1178, 1178, 1178, 1178, 1483,
			1483, 1482, 1482, 496, 1383, 1383, 1383, 1294, 1294, 1294,
			1376, 1376, 1376, 1289, 1289, 1289, 1370, 1370, 1370, 1291,
			1291, 1291, 826, 826, 826, 826, 826, 1290, 1290, 1290,
			37, 1326, 1326, 1326, 1327, 1327, 1327, 1293, 1293, 1293,
			36, 1322, 1322, 1322, 1323, 1323, 1323, 1292, 1292, 1292,
			1181, 1181, 1181, 1180, 1180, 630, 1395, 1395, 808, 808,
			808, 808, 808, 807, 796, 796, 807, 807, 795, 797,
			797, 799, 799, 798, 800, 474, 474, 1086, 1086, 1086,
			1086, 1086, 476, 476, 1089, 1089, 1089, 1089, 1089, 475,
			475, 1087, 1087, 1087, 1087, 1087, 1088, 1088, 1088, 572,
			1285, 1285, 1285, 1285, 1285, 1282, 1282, 1282, 570, 1283,
			1283, 1283, 1283, 1283, 1277, 1277, 1277, 571, 1284, 1284,
			1284, 1284, 1284, 1279, 1279, 1279, 574, 1287, 1287, 1287,
			1287, 1287, 1278, 1278, 1278, 575, 1288, 1288, 1288, 1288,
			1288, 1281, 1281, 1281, 573, 1286, 1286, 1286, 1286, 1286,
			1280, 1280, 1280, 1396, 1396, 1396, 1399, 1399, 1399, 1400,
			1400, 1400, 1403, 1403, 1403, 1397, 1397, 1397, 1398, 1398,
			1398, 1401, 1401, 1401, 1402, 1402, 1402, 582, 1303, 1303,
			1303, 1303, 1303, 1268, 1268, 1268, 1271, 1271, 1271, 501,
			1130, 1130, 1130, 1130, 1130, 1264, 1264, 1264, 1295, 1295,
			1295, 434, 1056, 1056, 1056, 1056, 1056, 1120, 1120, 1120,
			479, 1092, 1092, 1092, 1092, 1092, 1020, 1020, 1452, 1452,
			1452, 1451, 1451, 1451, 1019, 1019, 1454, 1453, 1020, 1020,
			1019, 1019, 578, 1299, 1299, 1299, 1299, 1299, 1296, 1296,
			1296, 576, 1297, 1297, 1297, 1297, 1297, 1266, 1266, 1266,
			577, 1298, 1298, 1298, 1298, 1298, 1274, 1274, 1274, 580,
			1301, 1301, 1301, 1301, 1301, 1267, 1267, 1267, 581, 1302,
			1302, 1302, 1302, 1302, 1276, 1276, 1276, 579, 1300, 1300,
			1300, 1300, 1300, 1275, 1275, 1275, 1169, 1169, 1169, 1182,
			1182, 509, 1138, 1138, 1138, 1138, 1138, 563, 1256, 1256,
			1256, 1256, 1256, 1269, 1269, 1269, 1270, 1270, 1270, 564,
			1257, 1257, 1257, 1257, 1257, 1258, 1258, 1258, 1265, 1265,
			1265, 1273, 1273, 1273, 568, 1263, 1263, 1263, 1263, 1263,
			1121, 1121, 1121, 567, 1261, 1261, 1261, 1261, 1261, 1262,
			1262, 1262, 557, 1248, 1248, 1248, 1248, 1248, 558, 1249,
			1249, 1249, 1249, 1249, 1250, 1250, 1250, 562, 1255, 1255,
			1255, 1255, 1255, 561, 1253, 1253, 1253, 1253, 1253, 1254,
			1254, 1254, 587, 1307, 1307, 1307, 1307, 1307, 1308, 1308,
			1308, 545, 1217, 991, 991, 991, 990, 990, 990, 993,
			992, 1228, 1228, 1228, 1229, 1229, 1229, 1381, 1381, 1382,
			1382, 1381, 1381, 1381, 1382, 1382, 1382, 1374, 1374, 1374,
			1374, 1374, 1375, 1375, 1375, 1368, 1368, 1369, 1369, 1368,
			1368, 1368, 1369, 1369, 1369, 1420, 1420, 1420, 1419, 1419,
			1419, 1422, 1421, 1442, 1442, 1442, 1441, 1441, 1441, 1444,
			1443, 1162, 1162, 1162, 1163, 1163, 1163, 1164, 1164, 1164,
			866, 866, 866, 1084, 1165, 1165, 1165, 1085, 1312, 1312,
			1312, 1315, 1315, 1315, 1313, 1313, 1313, 1314, 1314, 1314,
			1119, 1119, 1119, 1119, 1119, 1122, 1122, 802, 802, 802,
			1122, 1122, 1122, 801, 803, 803, 805, 805, 804, 806,
			1190, 1190, 1190, 1193, 1193, 1193, 1150, 1150, 1150, 1153,
			1153, 1153, 1113, 1113, 1113, 1114, 1114, 1114, 790, 790,
			790, 789, 789, 789, 1112, 1112, 1112, 1115, 1115, 1115,
			1082, 1082, 1082, 1083, 1083, 1083, 1347, 1347, 1347, 1345,
			1345, 1345, 1346, 1346, 1346, 1355, 1355, 1355, 820, 820,
			820, 819, 819, 819, 1353, 1353, 1353, 1354, 1354, 1354,
			1170, 1170, 1170, 1175, 1175, 1175, 1171, 1171, 1171, 1174,
			1174, 1174, 1173, 1173, 1173, 1172, 1172, 1172, 1118, 1118,
			1118, 1118, 1118, 1123, 1123, 1123, 1123, 1123, 1118, 1118,
			1118, 1123, 1123, 1123, 1119, 1119, 1119, 1122, 1122, 1122,
			1183, 1183, 1183, 1188, 1188, 1188, 1184, 1184, 1184, 1187,
			1187, 1187, 1186, 1186, 1186, 1185, 1185, 1185, 291, 291,
			295, 295, 294, 294, 1310, 1310, 1310, 874, 874, 874,
			873, 873, 873, 1191, 1191, 1191, 1192, 1192, 1192, 816,
			816, 816, 815, 815, 815, 1151, 1151, 1151, 1152, 1152,
			1152, 1246, 1246, 1247, 1247, 1168, 1168, 1168, 1189, 1189,
			1189, 1246, 1246, 1247, 1247, 1358, 1358, 1358, 1198, 1198,
			1199, 1199, 1198, 1198, 1198, 1199, 1199, 1199, 1200, 1200,
			1201, 1201, 1200, 1200, 1200, 1201, 1201, 1201, 979, 979,
			978, 978, 979, 979, 979, 978, 978, 978, 989, 989,
			988, 988, 989, 989, 989, 988, 988, 988, 907, 907,
			906, 906, 907, 907, 907, 906, 906, 906, 927, 927,
			926, 926, 927, 927, 927, 926, 926, 926, 891, 891,
			890, 890, 891, 891, 891, 890, 890, 890, 893, 892,
			893, 892, 915, 915, 914, 914, 915, 915, 915, 914,
			914, 914, 767, 917, 916, 917, 916, 768, 939, 939,
			938, 938, 939, 939, 939, 938, 938, 938, 941, 940,
			941, 940, 955, 955, 954, 954, 955, 955, 955, 954,
			954, 954, 957, 956, 957, 956, 1333, 1333, 1333, 1334,
			1334, 1334, 1335, 1335, 1335, 1336, 1336, 1336, 1456, 1456,
			1456, 1455, 1455, 1455, 1466, 1466, 1466, 1465, 1465, 1465,
			909, 909, 908, 908, 909, 909, 909, 908, 908, 908,
			929, 929, 928, 928, 929, 929, 929, 928, 928, 928,
			895, 895, 894, 894, 895, 895, 895, 894, 894, 894,
			897, 896, 897, 896, 919, 919, 918, 918, 919, 919,
			919, 918, 918, 918, 769, 921, 920, 921, 920, 770,
			943, 943, 942, 942, 943, 943, 943, 942, 942, 942,
			945, 944, 945, 944, 959, 959, 958, 958, 959, 959,
			959, 958, 958, 958, 961, 960, 961, 960, 1243, 1243,
			1243, 1242, 1242, 1242, 911, 911, 910, 910, 911, 911,
			911, 910, 910, 910, 931, 931, 930, 930, 931, 931,
			931, 930, 930, 930, 899, 899, 898, 898, 899, 899,
			899, 898, 898, 898, 901, 900, 901, 900, 923, 923,
			922, 922, 923, 923, 923, 922, 922, 922, 925, 924,
			925, 924, 947, 947, 946, 946, 947, 947, 947, 946,
			946, 946, 949, 948, 949, 948, 963, 963, 962, 962,
			963, 963, 963, 962, 962, 962, 965, 964, 965, 964,
			1160, 1160, 1160, 1161, 1161, 1161, 981, 980, 985, 984,
			1458, 1457, 1462, 1461, 983, 982, 987, 986, 1460, 1459,
			1464, 1463, 707, 872, 871, 705, 706, 1424, 1423, 711,
			1426, 1425, 709, 1446, 1445, 710, 1448, 1447, 269, 1000,
			1000, 1000, 1000, 1000, 19, 781, 17, 779, 779, 779,
			779, 779, 18, 780, 780, 780, 780, 780, 15, 777,
			777, 777, 777, 777, 16, 778, 778, 778, 778, 778,
			417, 417, 417, 108, 108, 417, 417, 417, 108, 108,
			108, 22, 22, 42, 42, 41, 41, 39, 39, 58,
			58, 1503, 1504, 516, 516, 515, 515, 1501, 1502, 6,
			6, 14, 14, 461, 461, 28, 28, 714, 714, 679,
			679, 717, 717, 420, 420, 420, 154, 154, 154, 153,
			153, 153, 421, 421, 1182, 1182, 1182, 1180, 1180, 1180,
			1111, 1111, 783, 783, 783, 784, 784, 784, 1179, 1179,
			1179, 1179, 1179, 1178, 1178, 1178, 1178, 1178, 1166, 668,
			1438, 1438, 1434, 1434, 1434, 667, 1437, 1437, 1433, 1433,
			1433, 670, 1440, 1436, 669, 1439, 1435, 35, 792, 792,
			34, 791, 791, 497, 1117, 1117, 489, 489, 1102, 1102,
			1102, 1102, 1102, 517, 517, 1194, 1194, 1194, 1194, 520,
			520, 1197, 1197, 1197, 1197, 518, 519, 1195, 1196, 1195,
			1196, 156, 156, 885, 885, 885, 885, 1005, 1006, 1006,
			1008, 1008, 875, 876, 876, 878, 878, 1007, 1009, 877,
			879, 829, 829, 829, 829, 829, 1144, 1144, 1144, 1145,
			1145, 1145, 1127, 1127, 1127, 1142, 1142, 1142, 551, 551,
			1224, 1224, 1224, 1224, 284, 1015, 1015, 552, 553, 1225,
			1226, 1225, 1226, 1467, 1467, 1468, 1468, 1393, 1393, 1393,
			1394, 1394, 1394, 995, 995, 995, 994, 994, 994, 997,
			996, 350, 353, 351, 352, 346, 349, 347, 348, 1010,
			1011, 1011, 1013, 1013, 880, 881, 881, 883, 883, 1012,
			1014, 882, 884, 1143, 1143, 1143, 1146, 1146, 1146, 1126,
			1126, 1126, 1147, 1147, 1147, 144, 868, 868, 143, 867,
			455, 1066, 1066, 861, 861, 861, 1469, 1469, 1470, 1470,
			498, 1124, 1124, 1124, 1124, 1124, 1167, 1177, 1177, 1177,
			1177, 1176, 1176, 1176, 1176, 794, 794, 793, 793, 1116,
			1116, 1416, 1416, 1416, 1415, 1415, 1415, 1418, 1417, 887,
			887, 887, 886, 886, 886, 889, 888, 1430, 1430, 1430,
			1429, 1429, 1429, 1432, 1431, 913, 913, 913, 913, 912,
			912, 912, 912, 933, 933, 933, 933, 932, 932, 932,
			932, 505, 506, 1134, 1135, 503, 504, 1132, 1133, 512,
			1141, 511, 1140, 971, 971, 971, 970, 970, 970, 973,
			972, 903, 903, 903, 903, 902, 902, 902, 902, 905,
			905, 904, 904, 935, 935, 935, 935, 934, 934, 934,
			934, 937, 937, 936, 936, 1348, 1348, 1348, 1343, 1343,
			1343, 1344, 1344, 1344, 1356, 1356, 1356, 1351, 1351, 1351,
			1352, 1352, 1352, 951, 951, 951, 951, 950, 950, 950,
			950, 953, 953, 952, 952, 967, 967, 967, 967, 966,
			966, 966, 966, 969, 969, 968, 968, 708, 268, 999,
			999, 999, 999, 999, 267, 998, 998, 998, 998, 998,
			20, 782, 666, 666, 1237, 1236, 1235, 1233, 1234, 1239,
			1238, 1232, 1230, 1231, 1125, 1125, 1125, 1125, 1319, 1319,
			1240, 1241, 1328, 1331, 1329, 1330, 1148, 1159, 1149, 1154,
			1155, 1158, 1156, 1157, 29, 29, 38, 38, 33, 33,
			754, 754, 31, 31, 40, 40, 750, 750, 32, 32,
			30, 30, 383, 383, 723, 723, 975, 975, 974, 974,
			977, 976, 1328, 1328, 1331, 1331, 1329, 1329, 1330, 1330,
			1341, 1341, 1350, 1350, 1342, 1342, 1349, 1349, 1337, 1337,
			1340, 1340, 1338, 1338, 1339, 1339, 1204, 1202, 1203, 1215,
			1216, 1206, 1210, 1208, 1209, 1212, 1213, 1211, 1218, 1223,
			1220, 28, 28, 396, 396, 397, 397, 550, 549, 522,
			521, 536, 539, 531, 532, 526, 529, 533, 538, 540,
			524, 527, 528, 534, 537, 541, 523, 525, 530, 535,
			584, 629, 494, 1538, 1539, 1540, 1541, 1541, 1541, 1542,
			1543, 1544, 1545, 1545, 1545, 1546, 600, 595, 595, 595,
			595, 757, 1547, 1548, 1550, 1551, 1552, 1553, 1554, 1555,
			1556, 1557, 1558, 1559, 1560, 1561, 1563, 1564, 1565, 1566,
			1567, 1568, 1569, 1570, 1571, 1572, 1573, 1574, 1575, 1567,
			1576, 1577, 1578, 1579, 1580, 1581, 1582, 1583, 1584, 1585,
			1586, 584, 1587, 1588, 1589, 1590, 1591, 1596, 1596, 1592,
			1596, 1593, 1594, 1596, 1596, 1596, 1596, 1596, 1595, 1597,
			1598, 1599, 1600, 1601, 1602, 1603, 1604, 1605, 1606, 1607,
			1608, 1609, 1610, 1611, 808, 808, 807, 1547, 1621, 1622,
			1623, 1624, 1625, 1626, 1162, 1162, 1163, 1163, 1164, 1164,
			1165, 1165, 1627, 1627, 1627, 1628, 1628, 1628, 1629, 1629,
			1629, 1630, 1631, 1633, 1633, 1633, 1634, 1635, 1635, 1635,
			1636, 1637, 1638, 1638, 1638, 1639, 1639, 1639, 1640, 1640,
			1640, 1641, 1641, 1641, 1642, 1642, 1642, 1643, 1643, 1643,
			1644, 1644, 1644, 1645, 1645, 1645, 1646, 1646, 1646, 1647,
			1647, 1647, 1648, 1648, 1648, 1649, 1649, 1649, 1650, 1651,
			1652, 1652, 1653, 1654, 1654, 1655, 1655, 1656, 1657, 1657,
			1657, 1658, 1658, 1658, 1659, 1659, 1659, 1660, 1660, 1660,
			1661, 1661, 1661, 1662, 1662, 1662, 1663, 1663, 1664, 1664,
			1665, 1665, 1665, 1666, 1666, 1666, 1667, 1667, 1668, 1668,
			1668, 1669, 1669, 1669, 1670, 1670, 1670, 1671, 1672, 1672,
			1672, 1673, 1673, 1673, 1674, 1675, 1676, 1676, 1676, 1677,
			1677, 1677, 1678, 1679, 1680, 1680, 1680, 1681, 1681, 1681,
			1682, 1682, 1682, 1683, 1683, 1683, 1684, 1684, 1684, 1685,
			1685, 1685, 1686, 1686, 1686, 1687, 1687, 1687, 1688, 1688,
			1688, 1689, 1689, 1689, 1690, 1690, 1690, 1691, 1691, 1691,
			1692, 1693, 1694, 1695, 1696, 1697, 1698, 1698, 1698, 1699,
			1699, 1699, 1700, 1700, 1700, 1701, 1701, 1701, 1702, 1702,
			1702, 1703, 1703, 1703, 1704, 1705, 1706, 1707, 1708, 1709,
			1710, 1710, 1710, 1711, 1712, 1712, 1712, 1713, 1714, 1714,
			1714, 1715, 1716, 1716, 1716, 1717, 1718, 1718, 1718, 1719,
			1720, 1720, 1720, 1720, 1721, 1721, 1721, 1721, 1722, 1722,
			1722, 1723, 1724, 1724, 1724, 1725, 1726, 1726, 1726, 1727,
			1728, 1728, 1728, 1729, 1730, 1730, 1730, 1731, 1732, 1732,
			1732, 1733, 1734, 1734, 1734, 1735, 1736, 1736, 1736, 1737,
			1738, 1739, 1740, 1745, 1744, 1819, 1812, 1813, 1814, 1818,
			1815, 1816, 1817, 1746, 1747, 1748, 1755, 1756, 1758, 1759,
			1752, 1753, 1745, 1744, 1754, 1754, 1754, 1749, 1750, 1757,
			1743, 1743, 1760, 1760, 1742, 1741, 592, 592, 753, 753,
			1761, 1761, 398, 398, 1596, 1596, 1596, 1596, 1596, 1596,
			1751, 1819, 1812, 1813, 1814, 1818, 1815, 1816, 1817, 1036,
			1035, 1036, 1035, 1791, 1793, 1792, 1794, 772, 771, 1074,
			1073, 828, 822, 1479, 1478, 1137, 1040, 1041, 1359, 1378,
			1372, 1365, 1129, 855, 1040, 1041, 1742, 1741, 810, 809,
			1104, 1108, 1106, 1107, 817, 1317, 1318, 1413, 1414, 1386,
			1095, 808, 807, 797, 800, 1397, 1169, 1257, 1261, 1249,
			1253, 1307, 991, 990, 1381, 1374, 1368, 1596, 1596, 1596,
			1596, 1763, 1762, 1777, 1781, 1780, 1779, 1778, 1596, 1773,
			1772, 1596, 1596, 1119, 1122, 803, 806, 1803, 1804, 1820,
			1824, 1113, 1114, 790, 789, 1596, 1596, 1596, 1596, 1596,
			1822, 1833, 1832, 1821, 1823, 1596, 1596, 1596, 1596, 1806,
			1829, 1811, 1810, 1198, 1199, 979, 978, 1596, 1596, 891,
			890, 915, 914, 939, 938, 955, 954, 1333, 1334, 1456,
			1455, 1774, 895, 894, 919, 918, 943, 942, 959, 958,
			1596, 1596, 1809, 1808, 899, 898, 923, 922, 947, 946,
			963, 962, 1596, 1776, 1775, 981, 985, 1831, 1830, 1458,
			1462, 1771, 1790, 1825, 1828, 1764, 1805, 1596, 1596, 1596,
			1786, 1789, 1799, 1802, 1788, 1787, 1801, 1800, 1596, 1596,
			1596, 1782, 1785, 1795, 1798, 1784, 1783, 1797, 1796, 1596,
			1596, 1596, 783, 1807, 1144, 1127, 995, 994, 1827, 1826,
			1770, 1769, 1767, 1765, 1768, 1596, 1596, 1766, 1596, 1596,
			1596, 1596, 1596, 1596, 1834, 1834, 1834, 1835, 1835, 1835,
			1836, 1836, 1836, 1837, 1876, 1875, 1860, 1861, 1859, 1858,
			1838, 1838, 1839, 1839, 1841, 1841, 1840, 1840, 1873, 1873,
			1871, 1871, 1869, 1869, 1874, 1874, 1872, 1872, 1870, 1870,
			1862, 820, 820, 1868, 1868, 1866, 1866, 1865, 1865, 1867,
			1867, 1864, 1864, 1863, 1863, 1243, 1243, 1242, 1242, 1854,
			1854, 1850, 1850, 1843, 1843, 1847, 1847, 1857, 1857, 1853,
			1853, 1842, 1842, 1846, 1846, 1856, 1856, 1852, 1852, 1855,
			1855, 1851, 1851, 1845, 1845, 1849, 1849, 1844, 1844, 1848,
			1848
		};
	}
	public enum MvexConvFn
	{
		None,
		Sf32,
		Sf64,
		Si32,
		Si64,
		Uf32,
		Uf64,
		Ui32,
		Ui64,
		Df32,
		Df64,
		Di32,
		Di64
	}
	public enum MvexEHBit
	{
		None,
		EH0,
		EH1
	}
	internal readonly struct MvexInfo
	{
		private readonly int index;

		public MvexTupleTypeLutKind TupleTypeLutKind => (MvexTupleTypeLutKind)MvexInfoData.Data[index * 8];

		public MvexEHBit EHBit => (MvexEHBit)MvexInfoData.Data[index * 8 + 1];

		public MvexConvFn ConvFn => (MvexConvFn)MvexInfoData.Data[index * 8 + 2];

		public uint InvalidConvFns => MvexInfoData.Data[index * 8 + 3];

		public uint InvalidSwizzleFns => MvexInfoData.Data[index * 8 + 4];

		public bool IsNDD => (MvexInfoData.Data[index * 8 + 5] & 1) != 0;

		public bool IsNDS => (MvexInfoData.Data[index * 8 + 5] & 2) != 0;

		public bool CanUseEvictionHint => (MvexInfoData.Data[index * 8 + 5] & 4) != 0;

		public bool CanUseImmRoundingControl => (MvexInfoData.Data[index * 8 + 5] & 8) != 0;

		public bool CanUseRoundingControl => (MvexInfoData.Data[index * 8 + 5] & 0x10) != 0;

		public bool CanUseSuppressAllExceptions => (MvexInfoData.Data[index * 8 + 5] & 0x20) != 0;

		public bool IgnoresOpMaskRegister => (MvexInfoData.Data[index * 8 + 5] & 0x40) != 0;

		public bool RequireOpMaskRegister => (MvexInfoData.Data[index * 8 + 5] & 0x80) != 0;

		public bool NoSaeRc => (MvexInfoData.Data[index * 8 + 6] & 1) != 0;

		public bool IsConvFn32 => (MvexInfoData.Data[index * 8 + 6] & 2) != 0;

		public bool IgnoresEvictionHint => (MvexInfoData.Data[index * 8 + 6] & 4) != 0;

		public MvexInfo(Code code)
		{
			index = (int)(code - 4611);
		}

		public TupleType GetTupleType(int sss)
		{
			return (TupleType)MvexTupleTypeLut.Data[(int)TupleTypeLutKind * 8 + sss];
		}
	}
	internal static class MvexInfoData
	{
		public const int StructSize = 8;

		public const int TupleTypeLutKindIndex = 0;

		public const int EHBitIndex = 1;

		public const int ConvFnIndex = 2;

		public const int InvalidConvFnsIndex = 3;

		public const int InvalidSwizzleFnsIndex = 4;

		public const int Flags1Index = 5;

		public const int Flags2Index = 6;

		internal static readonly byte[] Data = new byte[1656]
		{
			0, 0, 0, 254, 255, 64, 6, 0, 0, 0,
			0, 254, 255, 64, 6, 0, 0, 0, 0, 254,
			255, 64, 6, 0, 0, 0, 0, 254, 255, 64,
			6, 0, 0, 0, 0, 254, 255, 64, 6, 0,
			0, 0, 0, 254, 255, 64, 6, 0, 0, 0,
			0, 254, 255, 64, 6, 0, 0, 0, 0, 254,
			255, 64, 6, 0, 7, 0, 1, 6, 0, 4,
			3, 0, 11, 0, 2, 254, 0, 4, 1, 0,
			7, 0, 9, 6, 255, 4, 2, 0, 11, 0,
			10, 254, 255, 4, 0, 0, 11, 1, 10, 254,
			255, 0, 0, 0, 11, 2, 10, 254, 255, 0,
			0, 0, 7, 1, 9, 6, 255, 0, 2, 0,
			7, 2, 9, 6, 255, 0, 2, 0, 7, 0,
			1, 0, 0, 54, 2, 0, 11, 0, 2, 248,
			0, 54, 0, 0, 7, 0, 1, 0, 0, 54,
			2, 0, 11, 0, 2, 248, 0, 54, 0, 0,
			8, 0, 1, 248, 0, 36, 2, 0, 11, 0,
			2, 248, 0, 52, 0, 0, 7, 0, 1, 0,
			0, 54, 2, 0, 11, 0, 2, 248, 0, 54,
			0, 0, 0, 0, 3, 8, 0, 6, 3, 0,
			0, 0, 3, 14, 0, 4, 3, 0, 4, 0,
			4, 254, 0, 4, 1, 0, 0, 0, 0, 254,
			254, 4, 3, 0, 0, 0, 3, 8, 0, 5,
			3, 0, 0, 0, 3, 8, 0, 5, 3, 0,
			0, 0, 3, 8, 0, 5, 3, 0, 0, 0,
			3, 8, 0, 6, 3, 0, 1, 0, 3, 248,
			0, 4, 2, 0, 0, 0, 11, 14, 255, 4,
			2, 0, 4, 0, 12, 254, 255, 4, 0, 0,
			0, 0, 0, 254, 255, 64, 6, 0, 0, 0,
			0, 254, 255, 64, 6, 0, 7, 0, 1, 0,
			0, 38, 2, 0, 11, 0, 2, 248, 0, 38,
			0, 0, 0, 0, 3, 8, 0, 6, 2, 0,
			4, 0, 4, 248, 0, 6, 0, 0, 0, 0,
			3, 8, 0, 6, 2, 0, 4, 0, 4, 248,
			0, 6, 0, 0, 1, 0, 3, 248, 0, 4,
			2, 0, 0, 0, 3, 8, 0, 6, 2, 0,
			4, 0, 4, 248, 0, 6, 0, 0, 0, 0,
			3, 8, 0, 6, 2, 0, 4, 0, 4, 248,
			0, 6, 0, 0, 0, 0, 3, 8, 0, 6,
			2, 0, 0, 0, 3, 8, 0, 6, 2, 0,
			10, 0, 5, 6, 255, 4, 2, 0, 13, 0,
			6, 254, 255, 4, 0, 0, 9, 0, 5, 6,
			255, 4, 2, 0, 12, 0, 6, 254, 255, 4,
			0, 0, 0, 0, 3, 8, 0, 6, 3, 0,
			0, 0, 0, 254, 254, 6, 3, 0, 0, 0,
			3, 8, 0, 6, 2, 0, 0, 0, 3, 8,
			0, 6, 2, 0, 0, 0, 3, 8, 0, 6,
			2, 0, 0, 0, 3, 8, 0, 6, 2, 0,
			0, 0, 3, 8, 0, 6, 2, 0, 7, 0,
			1, 0, 0, 36, 2, 0, 11, 0, 2, 248,
			0, 36, 0, 0, 0, 0, 3, 8, 0, 6,
			2, 0, 0, 0, 3, 8, 0, 6, 2, 0,
			0, 0, 3, 8, 0, 6, 2, 0, 7, 0,
			0, 0, 0, 52, 2, 0, 7, 0, 0, 0,
			0, 52, 2, 0, 7, 0, 0, 0, 0, 52,
			2, 0, 7, 0, 0, 0, 0, 52, 2, 0,
			7, 0, 1, 0, 0, 54, 2, 0, 11, 0,
			2, 248, 0, 54, 0, 0, 7, 0, 1, 0,
			0, 38, 2, 0, 7, 0, 1, 0, 0, 38,
			2, 0, 11, 0, 2, 248, 0, 38, 0, 0,
			7, 0, 1, 0, 0, 38, 2, 0, 11, 0,
			2, 248, 0, 38, 0, 0, 7, 0, 0, 0,
			0, 54, 2, 0, 0, 0, 3, 8, 0, 38,
			2, 0, 4, 0, 4, 248, 0, 38, 0, 0,
			7, 0, 0, 0, 0, 54, 2, 0, 7, 0,
			0, 0, 0, 54, 2, 0, 3, 0, 7, 14,
			255, 4, 2, 0, 6, 0, 8, 254, 255, 4,
			0, 0, 2, 0, 7, 14, 255, 4, 2, 0,
			5, 0, 8, 254, 255, 4, 0, 0, 0, 0,
			3, 8, 0, 6, 3, 0, 0, 0, 3, 8,
			0, 6, 3, 0, 0, 0, 3, 8, 0, 6,
			3, 0, 0, 0, 3, 8, 0, 6, 3, 0,
			0, 0, 3, 8, 0, 6, 2, 0, 4, 0,
			4, 248, 0, 6, 0, 0, 7, 0, 1, 0,
			0, 6, 2, 0, 11, 0, 2, 248, 0, 6,
			0, 0, 7, 0, 0, 0, 0, 54, 2, 0,
			7, 0, 0, 0, 0, 52, 2, 0, 7, 0,
			0, 0, 0, 52, 2, 0, 7, 0, 0, 0,
			0, 52, 2, 0, 7, 0, 0, 0, 0, 52,
			2, 0, 0, 0, 3, 8, 0, 6, 2, 0,
			7, 0, 1, 0, 0, 54, 2, 0, 11, 0,
			2, 248, 0, 54, 0, 0, 0, 0, 3, 8,
			0, 6, 3, 0, 0, 0, 3, 8, 0, 6,
			3, 0, 7, 0, 0, 0, 0, 54, 2, 0,
			7, 0, 0, 0, 0, 54, 2, 0, 7, 0,
			0, 0, 0, 54, 2, 0, 7, 0, 0, 0,
			0, 54, 2, 0, 0, 0, 3, 8, 0, 6,
			3, 0, 0, 0, 3, 8, 0, 54, 2, 0,
			0, 0, 3, 8, 0, 6, 2, 0, 0, 0,
			3, 8, 0, 6, 2, 0, 3, 0, 7, 14,
			255, 132, 2, 0, 6, 0, 8, 254, 255, 132,
			0, 0, 10, 0, 5, 6, 255, 132, 2, 0,
			13, 0, 6, 254, 255, 132, 0, 0, 7, 0,
			0, 0, 0, 54, 2, 0, 7, 0, 0, 0,
			0, 54, 2, 0, 7, 0, 1, 0, 0, 54,
			2, 0, 11, 0, 2, 248, 0, 54, 0, 0,
			7, 0, 1, 0, 0, 54, 2, 0, 11, 0,
			2, 248, 0, 54, 0, 0, 7, 0, 1, 0,
			0, 54, 2, 0, 11, 0, 2, 248, 0, 54,
			0, 0, 7, 0, 1, 0, 0, 54, 2, 0,
			11, 0, 2, 248, 0, 54, 0, 0, 3, 0,
			11, 14, 255, 132, 2, 0, 6, 0, 12, 254,
			255, 132, 0, 0, 10, 0, 9, 6, 255, 132,
			2, 0, 13, 0, 10, 254, 255, 132, 0, 0,
			7, 0, 1, 250, 254, 54, 2, 0, 7, 0,
			1, 0, 0, 54, 2, 0, 11, 0, 2, 248,
			0, 54, 0, 0, 7, 0, 1, 0, 0, 54,
			2, 0, 11, 0, 2, 248, 0, 54, 0, 0,
			7, 0, 1, 0, 0, 54, 2, 0, 11, 0,
			2, 248, 0, 54, 0, 0, 7, 0, 1, 0,
			0, 54, 2, 0, 11, 0, 2, 248, 0, 54,
			0, 0, 10, 0, 0, 0, 255, 180, 2, 0,
			10, 0, 0, 0, 255, 180, 2, 0, 0, 0,
			3, 250, 254, 6, 2, 0, 0, 0, 3, 8,
			0, 6, 2, 0, 7, 0, 1, 0, 0, 54,
			2, 0, 11, 0, 2, 248, 0, 54, 0, 0,
			7, 0, 1, 0, 0, 54, 2, 0, 11, 0,
			2, 248, 0, 54, 0, 0, 7, 0, 1, 0,
			0, 54, 2, 0, 11, 0, 2, 248, 0, 54,
			0, 0, 7, 0, 1, 0, 0, 54, 2, 0,
			11, 0, 2, 248, 0, 54, 0, 0, 10, 0,
			0, 0, 255, 180, 2, 0, 10, 0, 5, 6,
			255, 132, 2, 0, 13, 0, 6, 254, 255, 132,
			0, 0, 10, 0, 5, 6, 255, 132, 2, 0,
			10, 0, 5, 6, 255, 132, 2, 0, 10, 0,
			5, 6, 255, 132, 2, 0, 13, 0, 6, 254,
			255, 132, 0, 0, 10, 0, 5, 6, 255, 132,
			2, 0, 10, 0, 5, 6, 255, 132, 2, 0,
			0, 0, 0, 254, 254, 36, 2, 0, 7, 0,
			0, 254, 254, 36, 2, 0, 7, 0, 0, 254,
			254, 36, 2, 0, 7, 0, 0, 254, 254, 36,
			2, 0, 7, 0, 1, 0, 0, 182, 2, 0,
			0, 0, 3, 8, 0, 134, 2, 0, 7, 0,
			0, 0, 0, 54, 2, 0, 7, 0, 0, 0,
			0, 54, 2, 0, 7, 0, 0, 0, 0, 54,
			2, 0, 3, 0, 7, 14, 255, 4, 2, 0,
			6, 0, 8, 254, 255, 4, 0, 0, 3, 0,
			11, 14, 255, 4, 2, 0, 6, 0, 12, 254,
			255, 4, 0, 0, 10, 0, 5, 6, 255, 4,
			2, 0, 13, 0, 6, 254, 255, 4, 0, 0,
			10, 0, 9, 6, 255, 4, 2, 0, 13, 0,
			10, 254, 255, 4, 0, 0, 7, 0, 0, 0,
			0, 52, 2, 0, 7, 0, 0, 0, 0, 52,
			2, 0, 7, 0, 0, 0, 0, 52, 2, 0,
			3, 0, 7, 14, 255, 4, 2, 0, 6, 0,
			8, 254, 255, 4, 0, 0, 3, 0, 11, 14,
			255, 4, 2, 0, 6, 0, 12, 254, 255, 4,
			0, 0, 10, 0, 5, 6, 255, 4, 2, 0,
			13, 0, 6, 254, 255, 4, 0, 0, 10, 0,
			9, 6, 255, 4, 2, 0, 13, 0, 10, 254,
			255, 4, 0, 0, 7, 0, 0, 0, 0, 52,
			2, 0, 7, 0, 0, 0, 0, 52, 2, 0,
			7, 0, 0, 0, 0, 52, 2, 0, 0, 0,
			0, 254, 254, 6, 3, 0, 7, 0, 0, 254,
			254, 4, 3, 0, 0, 0, 3, 8, 0, 6,
			3, 0, 0, 0, 3, 8, 0, 6, 3, 0,
			7, 0, 1, 0, 0, 36, 2, 0, 11, 0,
			2, 248, 0, 36, 0, 0, 7, 0, 1, 0,
			0, 44, 2, 0, 11, 0, 2, 248, 0, 44,
			0, 0, 0, 0, 3, 8, 0, 44, 2, 0,
			7, 0, 1, 0, 0, 44, 2, 0, 11, 0,
			2, 248, 0, 44, 0, 0, 0, 0, 3, 8,
			0, 44, 2, 0, 7, 0, 1, 0, 0, 44,
			2, 0, 7, 0, 0, 0, 0, 52, 2, 0,
			7, 0, 0, 0, 0, 52, 2, 0, 11, 0,
			2, 248, 0, 44, 0, 0
		};
	}
	[Flags]
	internal enum MvexInfoFlags1
	{
		None = 0,
		NDD = 1,
		NDS = 2,
		EvictionHint = 4,
		ImmRoundingControl = 8,
		RoundingControl = 0x10,
		SuppressAllExceptions = 0x20,
		IgnoresOpMaskRegister = 0x40,
		RequireOpMaskRegister = 0x80
	}
	[Flags]
	internal enum MvexInfoFlags2
	{
		None = 0,
		NoSaeRoundingControl = 1,
		ConvFn32 = 2,
		IgnoresEvictionHint = 4
	}
	internal static class MvexMemorySizeLut
	{
		public static readonly byte[] Data = new byte[112]
		{
			102, 11, 69, 90, 64, 65, 81, 82, 84, 11,
			69, 73, 56, 57, 66, 67, 69, 0, 0, 62,
			50, 51, 58, 59, 11, 0, 0, 28, 1, 9,
			2, 10, 105, 12, 87, 73, 56, 57, 66, 67,
			87, 0, 0, 62, 50, 51, 58, 59, 12, 0,
			0, 28, 1, 9, 2, 10, 108, 29, 74, 90,
			64, 65, 81, 82, 91, 29, 74, 73, 56, 57,
			66, 67, 74, 0, 0, 62, 50, 51, 58, 59,
			29, 0, 0, 28, 1, 9, 2, 10, 109, 30,
			92, 73, 56, 57, 66, 67, 92, 0, 0, 62,
			50, 51, 58, 59, 30, 0, 0, 28, 1, 9,
			2, 10
		};
	}
	public enum MvexRegMemConv
	{
		None,
		RegSwizzleNone,
		RegSwizzleCdab,
		RegSwizzleBadc,
		RegSwizzleDacb,
		RegSwizzleAaaa,
		RegSwizzleBbbb,
		RegSwizzleCccc,
		RegSwizzleDddd,
		MemConvNone,
		MemConvBroadcast1,
		MemConvBroadcast4,
		MemConvFloat16,
		MemConvUint8,
		MemConvSint8,
		MemConvUint16,
		MemConvSint16
	}
	internal static class MvexTupleTypeLut
	{
		public static readonly byte[] Data = new byte[112]
		{
			6, 2, 4, 5, 4, 4, 5, 5, 5, 2,
			4, 4, 3, 3, 4, 4, 4, 0, 0, 3,
			2, 2, 3, 3, 2, 0, 0, 1, 0, 0,
			1, 1, 6, 3, 5, 4, 3, 3, 4, 4,
			5, 0, 0, 3, 2, 2, 3, 3, 3, 0,
			0, 1, 0, 0, 1, 1, 6, 2, 4, 5,
			4, 4, 5, 5, 5, 2, 4, 4, 3, 3,
			4, 4, 4, 0, 0, 3, 2, 2, 3, 3,
			2, 0, 0, 1, 0, 0, 1, 1, 6, 3,
			5, 4, 3, 3, 4, 4, 5, 0, 0, 3,
			2, 2, 3, 3, 3, 0, 0, 1, 0, 0,
			1, 1
		};
	}
	public enum MvexTupleTypeLutKind
	{
		Int32,
		Int32_Half,
		Int32_4to16,
		Int32_1to16_or_elem,
		Int64,
		Int64_4to8,
		Int64_1to8_or_elem,
		Float32,
		Float32_Half,
		Float32_4to16,
		Float32_1to16_or_elem,
		Float64,
		Float64_4to8,
		Float64_1to8_or_elem
	}
	public sealed class NasmFormatter : Formatter
	{
		private readonly FormatterOptions options;

		private readonly ISymbolResolver symbolResolver;

		private readonly IFormatterOptionsProvider optionsProvider;

		private readonly FormatterString[] allRegisters;

		private readonly Iced.Intel.NasmFormatterInternal.InstrInfo[] instrInfos;

		private readonly Iced.Intel.NasmFormatterInternal.MemorySizes.Info[] allMemorySizes;

		private readonly NumberFormatter numberFormatter;

		private readonly FormatterString[] opSizeStrings;

		private readonly FormatterString[] addrSizeStrings;

		private readonly FormatterString[][] branchInfos;

		private readonly string[] scaleNumbers;

		private readonly FormatterString[] mvexRegMemConsts32;

		private readonly FormatterString[] mvexRegMemConsts64;

		private readonly FormatterString[] memSizeInfos;

		private readonly FormatterString[] farMemSizeInfos;

		private static readonly FormatterString str_bnd = new FormatterString("bnd");

		private static readonly FormatterString str_byte = new FormatterString("byte");

		private static readonly FormatterString str_dword = new FormatterString("dword");

		private static readonly FormatterString str_lock = new FormatterString("lock");

		private static readonly FormatterString str_notrack = new FormatterString("notrack");

		private static readonly FormatterString str_qword = new FormatterString("qword");

		private static readonly FormatterString str_rel = new FormatterString("rel");

		private static readonly FormatterString str_rep = new FormatterString("rep");

		private static readonly FormatterString[] str_repe = new FormatterString[2]
		{
			new FormatterString("repe"),
			new FormatterString("repz")
		};

		private static readonly FormatterString[] str_repne = new FormatterString[2]
		{
			new FormatterString("repne"),
			new FormatterString("repnz")
		};

		private static readonly FormatterString str_rn_sae = new FormatterString("rn-sae");

		private static readonly FormatterString str_rd_sae = new FormatterString("rd-sae");

		private static readonly FormatterString str_ru_sae = new FormatterString("ru-sae");

		private static readonly FormatterString str_rz_sae = new FormatterString("rz-sae");

		private static readonly FormatterString str_sae = new FormatterString("sae");

		private static readonly FormatterString str_rn = new FormatterString("rn");

		private static readonly FormatterString str_rd = new FormatterString("rd");

		private static readonly FormatterString str_ru = new FormatterString("ru");

		private static readonly FormatterString str_rz = new FormatterString("rz");

		private static readonly FormatterString str_to = new FormatterString("to");

		private static readonly FormatterString str_word = new FormatterString("word");

		private static readonly FormatterString str_xacquire = new FormatterString("xacquire");

		private static readonly FormatterString str_xrelease = new FormatterString("xrelease");

		private static readonly FormatterString str_z = new FormatterString("z");

		private static readonly FormatterString[] s_opSizeStrings = new FormatterString[4]
		{
			new FormatterString(""),
			new FormatterString("o16"),
			new FormatterString("o32"),
			new FormatterString("o64")
		};

		private static readonly FormatterString[] s_addrSizeStrings = new FormatterString[4]
		{
			new FormatterString(""),
			new FormatterString("a16"),
			new FormatterString("a32"),
			new FormatterString("a64")
		};

		private static readonly FormatterString[][] s_branchInfos = new FormatterString[8][]
		{
			null,
			new FormatterString[1]
			{
				new FormatterString("near")
			},
			new FormatterString[2]
			{
				new FormatterString("near"),
				new FormatterString("word")
			},
			new FormatterString[2]
			{
				new FormatterString("near"),
				new FormatterString("dword")
			},
			new FormatterString[1]
			{
				new FormatterString("word")
			},
			new FormatterString[1]
			{
				new FormatterString("dword")
			},
			new FormatterString[1]
			{
				new FormatterString("short")
			},
			null
		};

		private static readonly FormatterString[] s_memSizeInfos = new FormatterString[4]
		{
			new FormatterString(""),
			new FormatterString("word"),
			new FormatterString("dword"),
			new FormatterString("qword")
		};

		private static readonly FormatterString[] s_farMemSizeInfos = new FormatterString[4]
		{
			new FormatterString(""),
			new FormatterString("word"),
			new FormatterString("dword"),
			new FormatterString("")
		};

		private static readonly string[] s_scaleNumbers = new string[4] { "1", "2", "4", "8" };

		private static readonly FormatterString[] s_mvexRegMemConsts32 = new FormatterString[17]
		{
			new FormatterString(""),
			new FormatterString(""),
			new FormatterString("cdab"),
			new FormatterString("badc"),
			new FormatterString("dacb"),
			new FormatterString("aaaa"),
			new FormatterString("bbbb"),
			new FormatterString("cccc"),
			new FormatterString("dddd"),
			new FormatterString(""),
			new FormatterString("1to16"),
			new FormatterString("4to16"),
			new FormatterString("float16"),
			new FormatterString("uint8"),
			new FormatterString("sint8"),
			new FormatterString("uint16"),
			new FormatterString("sint16")
		};

		private static readonly FormatterString[] s_mvexRegMemConsts64 = new FormatterString[17]
		{
			new FormatterString(""),
			new FormatterString(""),
			new FormatterString("cdab"),
			new FormatterString("badc"),
			new FormatterString("dacb"),
			new FormatterString("aaaa"),
			new FormatterString("bbbb"),
			new FormatterString("cccc"),
			new FormatterString("dddd"),
			new FormatterString(""),
			new FormatterString("1to8"),
			new FormatterString("4to8"),
			new FormatterString("float16"),
			new FormatterString("uint8"),
			new FormatterString("sint8"),
			new FormatterString("uint16"),
			new FormatterString("sint16")
		};

		private static readonly FormatterString str_eh = new FormatterString("eh");

		public override FormatterOptions Options => options;

		public NasmFormatter()
			: this(null, null, null)
		{
		}

		public NasmFormatter(ISymbolResolver? symbolResolver, IFormatterOptionsProvider? optionsProvider = null)
			: this(null, symbolResolver, optionsProvider)
		{
		}

		public NasmFormatter(FormatterOptions? options, ISymbolResolver? symbolResolver = null, IFormatterOptionsProvider? optionsProvider = null)
		{
			this.options = options ?? FormatterOptions.CreateNasm();
			this.symbolResolver = symbolResolver;
			this.optionsProvider = optionsProvider;
			allRegisters = Iced.Intel.NasmFormatterInternal.Registers.AllRegisters;
			instrInfos = Iced.Intel.NasmFormatterInternal.InstrInfos.AllInfos;
			allMemorySizes = Iced.Intel.NasmFormatterInternal.MemorySizes.AllMemorySizes;
			numberFormatter = new NumberFormatter(dummy: true);
			opSizeStrings = s_opSizeStrings;
			addrSizeStrings = s_addrSizeStrings;
			branchInfos = s_branchInfos;
			scaleNumbers = s_scaleNumbers;
			mvexRegMemConsts32 = s_mvexRegMemConsts32;
			mvexRegMemConsts64 = s_mvexRegMemConsts64;
			memSizeInfos = s_memSizeInfos;
			farMemSizeInfos = s_farMemSizeInfos;
		}

		public override void FormatMnemonic(in Instruction instruction, FormatterOutput output, FormatMnemonicOptions options)
		{
			instrInfos[(int)instruction.Code].GetOpInfo(this.options, in instruction, out var info);
			int column = 0;
			FormatMnemonic(in instruction, output, in info, ref column, options);
		}

		public override int GetOperandCount(in Instruction instruction)
		{
			instrInfos[(int)instruction.Code].GetOpInfo(options, in instruction, out var info);
			return info.OpCount;
		}

		public override bool TryGetOpAccess(in Instruction instruction, int operand, out OpAccess access)
		{
			instrInfos[(int)instruction.Code].GetOpInfo(options, in instruction, out var info);
			if ((uint)operand >= (uint)info.OpCount)
			{
				ThrowHelper.ThrowArgumentOutOfRangeException_operand();
			}
			return info.TryGetOpAccess(operand, out access);
		}

		public override int GetInstructionOperand(in Instruction instruction, int operand)
		{
			instrInfos[(int)instruction.Code].GetOpInfo(options, in instruction, out var info);
			if ((uint)operand >= (uint)info.OpCount)
			{
				ThrowHelper.ThrowArgumentOutOfRangeException_operand();
			}
			return info.GetInstructionIndex(operand);
		}

		public override int GetFormatterOperand(in Instruction instruction, int instructionOperand)
		{
			instrInfos[(int)instruction.Code].GetOpInfo(options, in instruction, out var info);
			if ((uint)instructionOperand >= (uint)instruction.OpCount)
			{
				ThrowHelper.ThrowArgumentOutOfRangeException_instructionOperand();
			}
			return info.GetOperandIndex(instructionOperand);
		}

		public override void FormatOperand(in Instruction instruction, FormatterOutput output, int operand)
		{
			instrInfos[(int)instruction.Code].GetOpInfo(options, in instruction, out var info);
			if ((uint)operand >= (uint)info.OpCount)
			{
				ThrowHelper.ThrowArgumentOutOfRangeException_operand();
			}
			FormatOperand(in instruction, output, in info, operand);
		}

		public override void FormatOperandSeparator(in Instruction instruction, FormatterOutput output)
		{
			if (output == null)
			{
				ThrowHelper.ThrowArgumentNullException_output();
			}
			output.Write(",", FormatterTextKind.Punctuation);
			if (options.SpaceAfterOperandSeparator)
			{
				output.Write(" ", FormatterTextKind.Text);
			}
		}

		public override void FormatAllOperands(in Instruction instruction, FormatterOutput output)
		{
			instrInfos[(int)instruction.Code].GetOpInfo(options, in instruction, out var info);
			FormatOperands(in instruction, output, in info);
		}

		public override void Format(in Instruction instruction, FormatterOutput output)
		{
			instrInfos[(int)instruction.Code].GetOpInfo(options, in instruction, out var info);
			int column = 0;
			FormatMnemonic(in instruction, output, in info, ref column, FormatMnemonicOptions.None);
			if (info.OpCount != 0)
			{
				FormatterUtils.AddTabs(output, column, options.FirstOperandCharIndex, options.TabSize);
				FormatOperands(in instruction, output, in info);
			}
		}

		private void FormatMnemonic(in Instruction instruction, FormatterOutput output, in Iced.Intel.NasmFormatterInternal.InstrOpInfo opInfo, ref int column, FormatMnemonicOptions mnemonicOptions)
		{
			if (output == null)
			{
				ThrowHelper.ThrowArgumentNullException_output();
			}
			bool needSpace = false;
			int num;
			if ((mnemonicOptions & FormatMnemonicOptions.NoPrefixes) == 0 && (opInfo.Flags & Iced.Intel.NasmFormatterInternal.InstrOpInfoFlags.MnemonicIsDirective) == 0)
			{
				Register segmentPrefix = instruction.SegmentPrefix;
				if (((uint)segmentPrefix | instruction.HasAnyOf_Lock_Rep_Repne_Prefix | (uint)(opInfo.Flags & (Iced.Intel.NasmFormatterInternal.InstrOpInfoFlags.OpSize64 | Iced.Intel.NasmFormatterInternal.InstrOpInfoFlags.AddrSize64 | Iced.Intel.NasmFormatterInternal.InstrOpInfoFlags.BndPrefix))) != 0)
				{
					FormatterString prefix = opSizeStrings[((int)opInfo.Flags >> 3) & 3];
					if (prefix.Length != 0)
					{
						FormatPrefix(output, in instruction, ref column, prefix, PrefixKind.OperandSize, ref needSpace);
					}
					prefix = addrSizeStrings[((int)opInfo.Flags >> 5) & 3];
					if (prefix.Length != 0)
					{
						FormatPrefix(output, in instruction, ref column, prefix, PrefixKind.AddressSize, ref needSpace);
					}
					if (segmentPrefix == Register.DS)
					{
						num = (FormatterUtils.IsNotrackPrefixBranch(instruction.Code) ? 1 : 0);
						if (num != 0)
						{
							goto IL_00e2;
						}
					}
					else
					{
						num = 0;
					}
					if (segmentPrefix != 0 && ShowSegmentPrefix(in instruction, in opInfo))
					{
						FormatPrefix(output, in instruction, ref column, allRegisters[(int)segmentPrefix], FormatterUtils.GetSegmentRegisterPrefixKind(segmentPrefix), ref needSpace);
					}
					goto IL_00e2;
				}
			}
			goto IL_0204;
			IL_00e2:
			if (instruction.HasXacquirePrefix)
			{
				FormatPrefix(output, in instruction, ref column, str_xacquire, PrefixKind.Xacquire, ref needSpace);
			}
			if (instruction.HasXreleasePrefix)
			{
				FormatPrefix(output, in instruction, ref column, str_xrelease, PrefixKind.Xrelease, ref needSpace);
			}
			if (instruction.HasLockPrefix)
			{
				FormatPrefix(output, in instruction, ref column, str_lock, PrefixKind.Lock, ref needSpace);
			}
			if (num != 0)
			{
				FormatPrefix(output, in instruction, ref column, str_notrack, PrefixKind.Notrack, ref needSpace);
			}
			bool flag = (opInfo.Flags & Iced.Intel.NasmFormatterInternal.InstrOpInfoFlags.BndPrefix) != 0;
			if (flag)
			{
				FormatPrefix(output, in instruction, ref column, str_bnd, PrefixKind.Bnd, ref needSpace);
			}
			if (instruction.HasRepePrefix && FormatterUtils.ShowRepOrRepePrefix(instruction.Code, options))
			{
				if (FormatterUtils.IsRepeOrRepneInstruction(instruction.Code))
				{
					FormatPrefix(output, in instruction, ref column, MnemonicCC.GetMnemonicCC(options, 4, str_repe), PrefixKind.Repe, ref needSpace);
				}
				else
				{
					FormatPrefix(output, in instruction, ref column, str_rep, PrefixKind.Rep, ref needSpace);
				}
			}
			if (instruction.HasRepnePrefix && !flag && FormatterUtils.ShowRepnePrefix(instruction.Code, options))
			{
				FormatPrefix(output, in instruction, ref column, MnemonicCC.GetMnemonicCC(options, 5, str_repne), PrefixKind.Repne, ref needSpace);
			}
			goto IL_0204;
			IL_0204:
			if ((mnemonicOptions & FormatMnemonicOptions.NoMnemonic) == 0)
			{
				if (needSpace)
				{
					output.Write(" ", FormatterTextKind.Text);
					column++;
				}
				FormatterString mnemonic = opInfo.Mnemonic;
				if ((opInfo.Flags & Iced.Intel.NasmFormatterInternal.InstrOpInfoFlags.MnemonicIsDirective) != 0)
				{
					output.Write(mnemonic.Get(options.UppercaseKeywords || options.UppercaseAll), FormatterTextKind.Directive);
				}
				else
				{
					output.WriteMnemonic(in instruction, mnemonic.Get(options.UppercaseMnemonics || options.UppercaseAll));
				}
				column += mnemonic.Length;
			}
		}

		private bool ShowSegmentPrefix(in Instruction instruction, in Iced.Intel.NasmFormatterInternal.InstrOpInfo opInfo)
		{
			if ((opInfo.Flags & (Iced.Intel.NasmFormatterInternal.InstrOpInfoFlags.JccNotTaken | Iced.Intel.NasmFormatterInternal.InstrOpInfoFlags.JccTaken)) != 0)
			{
				return true;
			}
			switch (instruction.Code)
			{
			case Code.Outsb_DX_m8:
			case Code.Outsw_DX_m16:
			case Code.Outsd_DX_m32:
			case Code.Movsb_m8_m8:
			case Code.Movsw_m16_m16:
			case Code.Movsd_m32_m32:
			case Code.Movsq_m64_m64:
			case Code.Cmpsb_m8_m8:
			case Code.Cmpsw_m16_m16:
			case Code.Cmpsd_m32_m32:
			case Code.Cmpsq_m64_m64:
			case Code.Lodsb_AL_m8:
			case Code.Lodsw_AX_m16:
			case Code.Lodsd_EAX_m32:
			case Code.Lodsq_RAX_m64:
			case Code.Xlat_m8:
			case Code.Monitorw:
			case Code.Monitord:
			case Code.Monitorq:
			case Code.Monitorxw:
			case Code.Monitorxd:
			case Code.Monitorxq:
			case Code.Clzerow:
			case Code.Clzerod:
			case Code.Clzeroq:
			case Code.Umonitor_r16:
			case Code.Umonitor_r32:
			case Code.Umonitor_r64:
			case Code.Maskmovq_rDI_mm_mm:
			case Code.Maskmovdqu_rDI_xmm_xmm:
			case Code.VEX_Vmaskmovdqu_rDI_xmm_xmm:
				return FormatterUtils.ShowSegmentPrefix(Register.DS, in instruction, options);
			default:
			{
				for (int i = 0; i < opInfo.OpCount; i++)
				{
					switch (opInfo.GetOpKind(i))
					{
					case Iced.Intel.NasmFormatterInternal.InstrOpKind.MemorySegSI:
					case Iced.Intel.NasmFormatterInternal.InstrOpKind.MemorySegESI:
					case Iced.Intel.NasmFormatterInternal.InstrOpKind.MemorySegRSI:
					case Iced.Intel.NasmFormatterInternal.InstrOpKind.MemorySegDI:
					case Iced.Intel.NasmFormatterInternal.InstrOpKind.MemorySegEDI:
					case Iced.Intel.NasmFormatterInternal.InstrOpKind.MemorySegRDI:
					case Iced.Intel.NasmFormatterInternal.InstrOpKind.Memory:
						return false;
					default:
						throw new InvalidOperationException();
					case Iced.Intel.NasmFormatterInternal.InstrOpKind.Register:
					case Iced.Intel.NasmFormatterInternal.InstrOpKind.NearBranch16:
					case Iced.Intel.NasmFormatterInternal.InstrOpKind.NearBranch32:
					case Iced.Intel.NasmFormatterInternal.InstrOpKind.NearBranch64:
					case Iced.Intel.NasmFormatterInternal.InstrOpKind.FarBranch16:
					case Iced.Intel.NasmFormatterInternal.InstrOpKind.FarBranch32:
					case Iced.Intel.NasmFormatterInternal.InstrOpKind.Immediate8:
					case Iced.Intel.NasmFormatterInternal.InstrOpKind.Immediate8_2nd:
					case Iced.Intel.NasmFormatterInternal.InstrOpKind.Immediate16:
					case Iced.Intel.NasmFormatterInternal.InstrOpKind.Immediate32:
					case Iced.Intel.NasmFormatterInternal.InstrOpKind.Immediate64:
					case Iced.Intel.NasmFormatterInternal.InstrOpKind.Immediate8to16:
					case Iced.Intel.NasmFormatterInternal.InstrOpKind.Immediate8to32:
					case Iced.Intel.NasmFormatterInternal.InstrOpKind.Immediate8to64:
					case Iced.Intel.NasmFormatterInternal.InstrOpKind.Immediate32to64:
					case Iced.Intel.NasmFormatterInternal.InstrOpKind.MemoryESDI:
					case Iced.Intel.NasmFormatterInternal.InstrOpKind.MemoryESEDI:
					case Iced.Intel.NasmFormatterInternal.InstrOpKind.MemoryESRDI:
					case Iced.Intel.NasmFormatterInternal.InstrOpKind.Sae:
					case Iced.Intel.NasmFormatterInternal.InstrOpKind.RnSae:
					case Iced.Intel.NasmFormatterInternal.InstrOpKind.RdSae:
					case Iced.Intel.NasmFormatterInternal.InstrOpKind.RuSae:
					case Iced.Intel.NasmFormatterInternal.InstrOpKind.RzSae:
					case Iced.Intel.NasmFormatterInternal.InstrOpKind.Rn:
					case Iced.Intel.NasmFormatterInternal.InstrOpKind.Rd:
					case Iced.Intel.NasmFormatterInternal.InstrOpKind.Ru:
					case Iced.Intel.NasmFormatterInternal.InstrOpKind.Rz:
					case Iced.Intel.NasmFormatterInternal.InstrOpKind.DeclareByte:
					case Iced.Intel.NasmFormatterInternal.InstrOpKind.DeclareWord:
					case Iced.Intel.NasmFormatterInternal.InstrOpKind.DeclareDword:
					case Iced.Intel.NasmFormatterInternal.InstrOpKind.DeclareQword:
						break;
					}
				}
				return options.ShowUselessPrefixes;
			}
			}
		}

		private void FormatPrefix(FormatterOutput output, in Instruction instruction, ref int column, FormatterString prefix, PrefixKind prefixKind, ref bool needSpace)
		{
			if (needSpace)
			{
				column++;
				output.Write(" ", FormatterTextKind.Text);
			}
			output.WritePrefix(in instruction, prefix.Get(options.UppercasePrefixes || options.UppercaseAll), prefixKind);
			column += prefix.Length;
			needSpace = true;
		}

		private void FormatOperands(in Instruction instruction, FormatterOutput output, in Iced.Intel.NasmFormatterInternal.InstrOpInfo opInfo)
		{
			if (output == null)
			{
				ThrowHelper.ThrowArgumentNullException_output();
			}
			for (int i = 0; i < opInfo.OpCount; i++)
			{
				if (i > 0)
				{
					output.Write(",", FormatterTextKind.Punctuation);
					if (options.SpaceAfterOperandSeparator)
					{
						output.Write(" ", FormatterTextKind.Text);
					}
				}
				FormatOperand(in instruction, output, in opInfo, i);
			}
		}

		private void FormatOperand(in Instruction instruction, FormatterOutput output, in Iced.Intel.NasmFormatterInternal.InstrOpInfo opInfo, int operand)
		{
			if (output == null)
			{
				ThrowHelper.ThrowArgumentNullException_output();
			}
			int num;
			if (IcedConstants.IsMvex(instruction.Code))
			{
				int opCount = instruction.OpCount;
				num = ((instruction.GetOpKind(opCount - 1) == OpKind.Immediate8) ? (opCount - 2) : (opCount - 1));
			}
			else
			{
				num = -1;
			}
			int instructionIndex = opInfo.GetInstructionIndex(operand);
			Iced.Intel.NasmFormatterInternal.InstrOpKind opKind = opInfo.GetOpKind(operand);
			int addressSize;
			byte b;
			SymbolResult symbol;
			FormatterOperandOptions operandOptions;
			ulong num2;
			NumberKind numberKind;
			string text;
			NumberFormattingOptions numberOptions;
			ISymbolResolver symbolResolver;
			FormatterFlowControl flowControl;
			switch (opKind)
			{
			case Iced.Intel.NasmFormatterInternal.InstrOpKind.Register:
				if ((opInfo.Flags & Iced.Intel.NasmFormatterInternal.InstrOpInfoFlags.RegisterTo) != 0)
				{
					FormatKeyword(output, str_to);
					output.Write(" ", FormatterTextKind.Text);
				}
				FormatRegister(output, in instruction, operand, instructionIndex, opInfo.GetOpRegister(operand));
				break;
			case Iced.Intel.NasmFormatterInternal.InstrOpKind.NearBranch64:
				addressSize = 8;
				num2 = instruction.NearBranch64;
				numberKind = NumberKind.UInt64;
				goto IL_0168;
			case Iced.Intel.NasmFormatterInternal.InstrOpKind.NearBranch32:
				addressSize = 4;
				num2 = instruction.NearBranch32;
				numberKind = NumberKind.UInt32;
				goto IL_0168;
			case Iced.Intel.NasmFormatterInternal.InstrOpKind.NearBranch16:
				addressSize = 2;
				num2 = instruction.NearBranch16;
				numberKind = NumberKind.UInt16;
				goto IL_0168;
			case Iced.Intel.NasmFormatterInternal.InstrOpKind.FarBranch32:
				addressSize = 4;
				num2 = instruction.FarBranch32;
				numberKind = NumberKind.UInt32;
				goto IL_02fe;
			case Iced.Intel.NasmFormatterInternal.InstrOpKind.FarBranch16:
				addressSize = 2;
				num2 = instruction.FarBranch16;
				numberKind = NumberKind.UInt16;
				goto IL_02fe;
			case Iced.Intel.NasmFormatterInternal.InstrOpKind.Immediate8:
				b = instruction.Immediate8;
				goto IL_0511;
			case Iced.Intel.NasmFormatterInternal.InstrOpKind.Immediate8_2nd:
				b = instruction.Immediate8_2nd;
				goto IL_0511;
			case Iced.Intel.NasmFormatterInternal.InstrOpKind.DeclareByte:
				b = instruction.GetDeclareByteValue(operand);
				goto IL_0511;
			case Iced.Intel.NasmFormatterInternal.InstrOpKind.Immediate16:
			case Iced.Intel.NasmFormatterInternal.InstrOpKind.Immediate8to16:
			case Iced.Intel.NasmFormatterInternal.InstrOpKind.DeclareWord:
			{
				ShowSignExtendInfo(output, opInfo.Flags);
				ushort num3 = opKind switch
				{
					Iced.Intel.NasmFormatterInternal.InstrOpKind.Immediate16 => instruction.Immediate16, 
					Iced.Intel.NasmFormatterInternal.InstrOpKind.Immediate8to16 => (ushort)instruction.Immediate8to16, 
					_ => instruction.GetDeclareWordValue(operand), 
				};
				numberOptions = NumberFormattingOptions.CreateImmediateInternal(options);
				operandOptions = default(FormatterOperandOptions);
				optionsProvider?.GetOperandOptions(in instruction, operand, instructionIndex, ref operandOptions, ref numberOptions);
				if ((symbolResolver = this.symbolResolver) != null && symbolResolver.TryGetSymbol(in instruction, operand, instructionIndex, num3, 2, out symbol))
				{
					output.Write(in instruction, operand, instructionIndex, options, in numberFormatter, in numberOptions, num3, in symbol, options.ShowSymbolAddress);
					break;
				}
				if (numberOptions.SignedNumber)
				{
					num2 = (ulong)(short)num3;
					numberKind = NumberKind.Int16;
					if ((short)num3 < 0)
					{
						output.Write("-", FormatterTextKind.Operator);
						num3 = (ushort)(-(short)num3);
					}
				}
				else
				{
					num2 = num3;
					numberKind = NumberKind.UInt16;
				}
				text = numberFormatter.FormatUInt16(options, in numberOptions, num3);
				output.WriteNumber(in instruction, operand, instructionIndex, text, num2, numberKind, FormatterTextKind.Number);
				break;
			}
			case Iced.Intel.NasmFormatterInternal.InstrOpKind.Immediate32:
			case Iced.Intel.NasmFormatterInternal.InstrOpKind.Immediate8to32:
			case Iced.Intel.NasmFormatterInternal.InstrOpKind.DeclareDword:
			{
				ShowSignExtendInfo(output, opInfo.Flags);
				uint num4 = opKind switch
				{
					Iced.Intel.NasmFormatterInternal.InstrOpKind.Immediate32 => instruction.Immediate32, 
					Iced.Intel.NasmFormatterInternal.InstrOpKind.Immediate8to32 => (uint)instruction.Immediate8to32, 
					_ => instruction.GetDeclareDwordValue(operand), 
				};
				numberOptions = NumberFormattingOptions.CreateImmediateInternal(options);
				operandOptions = default(FormatterOperandOptions);
				optionsProvider?.GetOperandOptions(in instruction, operand, instructionIndex, ref operandOptions, ref numberOptions);
				if ((symbolResolver = this.symbolResolver) != null && symbolResolver.TryGetSymbol(in instruction, operand, instructionIndex, num4, 4, out symbol))
				{
					output.Write(in instruction, operand, instructionIndex, options, in numberFormatter, in numberOptions, num4, in symbol, options.ShowSymbolAddress);
					break;
				}
				if (numberOptions.SignedNumber)
				{
					num2 = (ulong)(int)num4;
					numberKind = NumberKind.Int32;
					if ((int)num4 < 0)
					{
						output.Write("-", FormatterTextKind.Operator);
						num4 = 0 - num4;
					}
				}
				else
				{
					num2 = num4;
					numberKind = NumberKind.UInt32;
				}
				text = numberFormatter.FormatUInt32(options, in numberOptions, num4);
				output.WriteNumber(in instruction, operand, instructionIndex, text, num2, numberKind, FormatterTextKind.Number);
				break;
			}
			case Iced.Intel.NasmFormatterInternal.InstrOpKind.Immediate64:
			case Iced.Intel.NasmFormatterInternal.InstrOpKind.Immediate8to64:
			case Iced.Intel.NasmFormatterInternal.InstrOpKind.Immediate32to64:
			case Iced.Intel.NasmFormatterInternal.InstrOpKind.DeclareQword:
			{
				ShowSignExtendInfo(output, opInfo.Flags);
				num2 = opKind switch
				{
					Iced.Intel.NasmFormatterInternal.InstrOpKind.Immediate32to64 => (ulong)instruction.Immediate32to64, 
					Iced.Intel.NasmFormatterInternal.InstrOpKind.Immediate8to64 => (ulong)instruction.Immediate8to64, 
					Iced.Intel.NasmFormatterInternal.InstrOpKind.Immediate64 => instruction.Immediate64, 
					_ => instruction.GetDeclareQwordValue(operand), 
				};
				numberOptions = NumberFormattingOptions.CreateImmediateInternal(options);
				operandOptions = default(FormatterOperandOptions);
				optionsProvider?.GetOperandOptions(in instruction, operand, instructionIndex, ref operandOptions, ref numberOptions);
				if ((symbolResolver = this.symbolResolver) != null && symbolResolver.TryGetSymbol(in instruction, operand, instructionIndex, num2, 8, out symbol))
				{
					output.Write(in instruction, operand, instructionIndex, options, in numberFormatter, in numberOptions, num2, in symbol, options.ShowSymbolAddress);
					break;
				}
				ulong value = num2;
				if (numberOptions.SignedNumber)
				{
					numberKind = NumberKind.Int64;
					if ((long)num2 < 0L)
					{
						output.Write("-", FormatterTextKind.Operator);
						num2 = 0L - num2;
					}
				}
				else
				{
					numberKind = NumberKind.UInt64;
				}
				text = numberFormatter.FormatUInt64(options, in numberOptions, num2);
				output.WriteNumber(in instruction, operand, instructionIndex, text, value, numberKind, FormatterTextKind.Number);
				break;
			}
			case Iced.Intel.NasmFormatterInternal.InstrOpKind.MemorySegSI:
				FormatMemory(output, in instruction, operand, instructionIndex, opInfo.MemorySize, instruction.MemorySegment, Register.SI, Register.None, 0, 0, 0L, 2, opInfo.Flags);
				break;
			case Iced.Intel.NasmFormatterInternal.InstrOpKind.MemorySegESI:
				FormatMemory(output, in instruction, operand, instructionIndex, opInfo.MemorySize, instruction.MemorySegment, Register.ESI, Register.None, 0, 0, 0L, 4, opInfo.Flags);
				break;
			case Iced.Intel.NasmFormatterInternal.InstrOpKind.MemorySegRSI:
				FormatMemory(output, in instruction, operand, instructionIndex, opInfo.MemorySize, instruction.MemorySegment, Register.RSI, Register.None, 0, 0, 0L, 8, opInfo.Flags);
				break;
			case Iced.Intel.NasmFormatterInternal.InstrOpKind.MemorySegDI:
				FormatMemory(output, in instruction, operand, instructionIndex, opInfo.MemorySize, instruction.MemorySegment, Register.DI, Register.None, 0, 0, 0L, 2, opInfo.Flags);
				break;
			case Iced.Intel.NasmFormatterInternal.InstrOpKind.MemorySegEDI:
				FormatMemory(output, in instruction, operand, instructionIndex, opInfo.MemorySize, instruction.MemorySegment, Register.EDI, Register.None, 0, 0, 0L, 4, opInfo.Flags);
				break;
			case Iced.Intel.NasmFormatterInternal.InstrOpKind.MemorySegRDI:
				FormatMemory(output, in instruction, operand, instructionIndex, opInfo.MemorySize, instruction.MemorySegment, Register.RDI, Register.None, 0, 0, 0L, 8, opInfo.Flags);
				break;
			case Iced.Intel.NasmFormatterInternal.InstrOpKind.MemoryESDI:
				FormatMemory(output, in instruction, operand, instructionIndex, opInfo.MemorySize, Register.ES, Register.DI, Register.None, 0, 0, 0L, 2, opInfo.Flags);
				break;
			case Iced.Intel.NasmFormatterInternal.InstrOpKind.MemoryESEDI:
				FormatMemory(output, in instruction, operand, instructionIndex, opInfo.MemorySize, Register.ES, Register.EDI, Register.None, 0, 0, 0L, 4, opInfo.Flags);
				break;
			case Iced.Intel.NasmFormatterInternal.InstrOpKind.MemoryESRDI:
				FormatMemory(output, in instruction, operand, instructionIndex, opInfo.MemorySize, Register.ES, Register.RDI, Register.None, 0, 0, 0L, 8, opInfo.Flags);
				break;
			case Iced.Intel.NasmFormatterInternal.InstrOpKind.Memory:
			{
				int memoryDisplSize = instruction.MemoryDisplSize;
				Register memoryBase = instruction.MemoryBase;
				Register memoryIndex = instruction.MemoryIndex;
				int addressSizeInBytes = InstructionUtils.GetAddressSizeInBytes(memoryBase, memoryIndex, memoryDisplSize, instruction.CodeSize);
				FormatMemory(displ: (long)((addressSizeInBytes != 8) ? instruction.MemoryDisplacement32 : instruction.MemoryDisplacement64), output: output, instruction: in instruction, operand: operand, instructionOperand: instructionIndex, memSize: opInfo.MemorySize, segReg: instruction.MemorySegment, baseReg: memoryBase, indexReg: memoryIndex, scale: instruction.InternalMemoryIndexScale, displSize: memoryDisplSize, addrSize: addressSizeInBytes, flags: opInfo.Flags);
				break;
			}
			case Iced.Intel.NasmFormatterInternal.InstrOpKind.Sae:
				FormatDecorator(output, in instruction, operand, instructionIndex, str_sae, DecoratorKind.SuppressAllExceptions);
				break;
			case Iced.Intel.NasmFormatterInternal.InstrOpKind.RnSae:
				FormatDecorator(output, in instruction, operand, instructionIndex, str_rn_sae, DecoratorKind.RoundingControl);
				break;
			case Iced.Intel.NasmFormatterInternal.InstrOpKind.RdSae:
				FormatDecorator(output, in instruction, operand, instructionIndex, str_rd_sae, DecoratorKind.RoundingControl);
				break;
			case Iced.Intel.NasmFormatterInternal.InstrOpKind.RuSae:
				FormatDecorator(output, in instruction, operand, instructionIndex, str_ru_sae, DecoratorKind.RoundingControl);
				break;
			case Iced.Intel.NasmFormatterInternal.InstrOpKind.RzSae:
				FormatDecorator(output, in instruction, operand, instructionIndex, str_rz_sae, DecoratorKind.RoundingControl);
				break;
			case Iced.Intel.NasmFormatterInternal.InstrOpKind.Rn:
				FormatDecorator(output, in instruction, operand, instructionIndex, str_rn, DecoratorKind.RoundingControl);
				break;
			case Iced.Intel.NasmFormatterInternal.InstrOpKind.Rd:
				FormatDecorator(output, in instruction, operand, instructionIndex, str_rd, DecoratorKind.RoundingControl);
				break;
			case Iced.Intel.NasmFormatterInternal.InstrOpKind.Ru:
				FormatDecorator(output, in instruction, operand, instructionIndex, str_ru, DecoratorKind.RoundingControl);
				break;
			case Iced.Intel.NasmFormatterInternal.InstrOpKind.Rz:
				FormatDecorator(output, in instruction, operand, instructionIndex, str_rz, DecoratorKind.RoundingControl);
				break;
			default:
				{
					throw new InvalidOperationException();
				}
				IL_02fe:
				numberOptions = NumberFormattingOptions.CreateBranchInternal(options);
				operandOptions = new FormatterOperandOptions((!options.ShowBranchSize) ? FormatterOperandOptions.Flags.NoBranchSize : FormatterOperandOptions.Flags.None);
				optionsProvider?.GetOperandOptions(in instruction, operand, instructionIndex, ref operandOptions, ref numberOptions);
				if ((symbolResolver = this.symbolResolver) != null && symbolResolver.TryGetSymbol(in instruction, operand, instructionIndex, (uint)num2, addressSize, out symbol))
				{
					FormatFlowControl(output, opInfo.Flags, operandOptions);
					if (!symbolResolver.TryGetSymbol(in instruction, operand + 1, instructionIndex, instruction.FarBranchSelector, 2, out var symbol2))
					{
						text = numberFormatter.FormatUInt16(options, in numberOptions, instruction.FarBranchSelector, numberOptions.LeadingZeros);
						output.WriteNumber(in instruction, operand, instructionIndex, text, instruction.FarBranchSelector, NumberKind.UInt16, FormatterTextKind.SelectorValue);
					}
					else
					{
						output.Write(in instruction, operand, instructionIndex, options, in numberFormatter, in numberOptions, instruction.FarBranchSelector, in symbol2, options.ShowSymbolAddress);
					}
					output.Write(":", FormatterTextKind.Punctuation);
					output.Write(in instruction, operand, instructionIndex, options, in numberFormatter, in numberOptions, num2, in symbol, options.ShowSymbolAddress);
				}
				else
				{
					flowControl = FormatterUtils.GetFlowControl(in instruction);
					FormatFlowControl(output, opInfo.Flags, operandOptions);
					text = numberFormatter.FormatUInt16(options, in numberOptions, instruction.FarBranchSelector, numberOptions.LeadingZeros);
					output.WriteNumber(in instruction, operand, instructionIndex, text, instruction.FarBranchSelector, NumberKind.UInt16, FormatterTextKind.SelectorValue);
					output.Write(":", FormatterTextKind.Punctuation);
					text = ((opKind != Iced.Intel.NasmFormatterInternal.InstrOpKind.FarBranch32) ? numberFormatter.FormatUInt16(options, in numberOptions, instruction.FarBranch16, numberOptions.LeadingZeros) : numberFormatter.FormatUInt32(options, in numberOptions, instruction.FarBranch32, numberOptions.LeadingZeros));
					output.WriteNumber(in instruction, operand, instructionIndex, text, num2, numberKind, FormatterUtils.IsCall(flowControl) ? FormatterTextKind.FunctionAddress : FormatterTextKind.LabelAddress);
				}
				break;
				IL_0511:
				numberOptions = NumberFormattingOptions.CreateImmediateInternal(options);
				operandOptions = default(FormatterOperandOptions);
				optionsProvider?.GetOperandOptions(in instruction, operand, instructionIndex, ref operandOptions, ref numberOptions);
				if ((symbolResolver = this.symbolResolver) != null && symbolResolver.TryGetSymbol(in instruction, operand, instructionIndex, b, 1, out symbol))
				{
					output.Write(in instruction, operand, instructionIndex, options, in numberFormatter, in numberOptions, b, in symbol, options.ShowSymbolAddress);
					break;
				}
				if (numberOptions.SignedNumber)
				{
					num2 = (ulong)(sbyte)b;
					numberKind = NumberKind.Int8;
					if ((sbyte)b < 0)
					{
						output.Write("-", FormatterTextKind.Operator);
						b = (byte)(-(sbyte)b);
					}
				}
				else
				{
					num2 = b;
					numberKind = NumberKind.UInt8;
				}
				text = numberFormatter.FormatUInt8(options, in numberOptions, b);
				output.WriteNumber(in instruction, operand, instructionIndex, text, num2, numberKind, FormatterTextKind.Number);
				break;
				IL_0168:
				numberOptions = NumberFormattingOptions.CreateBranchInternal(options);
				operandOptions = new FormatterOperandOptions((!options.ShowBranchSize) ? FormatterOperandOptions.Flags.NoBranchSize : FormatterOperandOptions.Flags.None);
				optionsProvider?.GetOperandOptions(in instruction, operand, instructionIndex, ref operandOptions, ref numberOptions);
				if ((symbolResolver = this.symbolResolver) != null && symbolResolver.TryGetSymbol(in instruction, operand, instructionIndex, num2, addressSize, out symbol))
				{
					FormatFlowControl(output, opInfo.Flags, operandOptions);
					output.Write(in instruction, operand, instructionIndex, options, in numberFormatter, in numberOptions, num2, in symbol, options.ShowSymbolAddress);
					break;
				}
				operandOptions = new FormatterOperandOptions((!options.ShowBranchSize) ? FormatterOperandOptions.Flags.NoBranchSize : FormatterOperandOptions.Flags.None);
				optionsProvider?.GetOperandOptions(in instruction, operand, instructionIndex, ref operandOptions, ref numberOptions);
				flowControl = FormatterUtils.GetFlowControl(in instruction);
				FormatFlowControl(output, opInfo.Flags, operandOptions);
				output.WriteNumber(in instruction, operand, instructionIndex, opKind switch
				{
					Iced.Intel.NasmFormatterInternal.InstrOpKind.NearBranch32 => numberFormatter.FormatUInt32(options, in numberOptions, instruction.NearBranch32, numberOptions.LeadingZeros), 
					Iced.Intel.NasmFormatterInternal.InstrOpKind.NearBranch64 => numberFormatter.FormatUInt64(options, in numberOptions, instruction.NearBranch64, numberOptions.LeadingZeros), 
					_ => numberFormatter.FormatUInt16(options, in numberOptions, instruction.NearBranch16, numberOptions.LeadingZeros), 
				}, num2, numberKind, FormatterUtils.IsCall(flowControl) ? FormatterTextKind.FunctionAddress : FormatterTextKind.LabelAddress);
				break;
			}
			if (operand == 0 && instruction.HasOpMask_or_ZeroingMasking)
			{
				if (instruction.HasOpMask)
				{
					output.Write("{", FormatterTextKind.Punctuation);
					FormatRegister(output, in instruction, operand, instructionIndex, instruction.OpMask);
					output.Write("}", FormatterTextKind.Punctuation);
				}
				if (instruction.ZeroingMasking)
				{
					FormatDecorator(output, in instruction, operand, instructionIndex, str_z, DecoratorKind.ZeroingMasking);
				}
			}
			if (num != operand)
			{
				return;
			}
			MvexRegMemConv mvexRegMemConv = instruction.MvexRegMemConv;
			if (mvexRegMemConv == MvexRegMemConv.None)
			{
				return;
			}
			MvexInfo mvexInfo = new MvexInfo(instruction.Code);
			if (mvexInfo.ConvFn != 0)
			{
				FormatterString text2 = (mvexInfo.IsConvFn32 ? mvexRegMemConsts32 : mvexRegMemConsts64)[(int)mvexRegMemConv];
				if (text2.Length != 0)
				{
					FormatDecorator(output, in instruction, operand, instructionIndex, text2, DecoratorKind.SwizzleMemConv);
				}
			}
		}

		private void ShowSignExtendInfo(FormatterOutput output, Iced.Intel.NasmFormatterInternal.InstrOpInfoFlags flags)
		{
			if (options.NasmShowSignExtendedImmediateSize)
			{
				FormatterString keyword;
				switch ((SignExtendInfo)(((int)flags >> 10) & 7))
				{
				case SignExtendInfo.None:
					return;
				case SignExtendInfo.Sex1to2:
				case SignExtendInfo.Sex1to4:
				case SignExtendInfo.Sex1to8:
					keyword = str_byte;
					break;
				case SignExtendInfo.Sex2:
					keyword = str_word;
					break;
				case SignExtendInfo.Sex4:
					keyword = str_dword;
					break;
				case SignExtendInfo.Sex4to8:
					keyword = str_qword;
					break;
				default:
					throw new InvalidOperationException();
				}
				FormatKeyword(output, keyword);
				output.Write(" ", FormatterTextKind.Text);
			}
		}

		private void FormatFlowControl(FormatterOutput output, Iced.Intel.NasmFormatterInternal.InstrOpInfoFlags flags, FormatterOperandOptions operandOptions)
		{
			if (!operandOptions.BranchSize)
			{
				return;
			}
			FormatterString[] array = branchInfos[((int)flags >> 7) & 7];
			if (array != null)
			{
				FormatterString[] array2 = array;
				foreach (FormatterString keyword in array2)
				{
					FormatKeyword(output, keyword);
					output.Write(" ", FormatterTextKind.Text);
				}
			}
		}

		private void FormatDecorator(FormatterOutput output, in Instruction instruction, int operand, int instructionOperand, FormatterString text, DecoratorKind decorator)
		{
			output.Write("{", FormatterTextKind.Punctuation);
			output.WriteDecorator(in instruction, operand, instructionOperand, text.Get(options.UppercaseDecorators || options.UppercaseAll), decorator);
			output.Write("}", FormatterTextKind.Punctuation);
		}

		[MethodImpl(MethodImplOptions.AggressiveInlining)]
		private string ToRegisterString(Register reg)
		{
			FormatterString formatterString = allRegisters[(int)reg];
			return formatterString.Get(options.UppercaseRegisters || options.UppercaseAll);
		}

		[MethodImpl(MethodImplOptions.NoInlining)]
		private void FormatRegister(FormatterOutput output, in Instruction instruction, int operand, int instructionOperand, Register reg)
		{
			output.WriteRegister(in instruction, operand, instructionOperand, ToRegisterString(reg), reg);
		}

		private void FormatMemory(FormatterOutput output, in Instruction instruction, int operand, int instructionOperand, MemorySize memSize, Register segReg, Register baseReg, Register indexReg, int scale, int displSize, long displ, int addrSize, Iced.Intel.NasmFormatterInternal.InstrOpInfoFlags flags)
		{
			NumberFormattingOptions numberOptions = NumberFormattingOptions.CreateDisplacementInternal(options);
			FormatterOperandOptions operandOptions = new FormatterOperandOptions(options.MemorySizeOptions);
			operandOptions.RipRelativeAddresses = options.RipRelativeAddresses;
			optionsProvider?.GetOperandOptions(in instruction, operand, instructionOperand, ref operandOptions, ref numberOptions);
			bool flag = false;
			ulong address;
			switch (baseReg)
			{
			case Register.RIP:
				address = (ulong)displ;
				if (options.RipRelativeAddresses)
				{
					displ -= (long)instruction.NextIP;
				}
				else
				{
					baseReg = Register.None;
					flags &= (Iced.Intel.NasmFormatterInternal.InstrOpInfoFlags)4294942719u;
					flag = true;
				}
				displSize = 8;
				break;
			case Register.EIP:
				address = (uint)displ;
				if (options.RipRelativeAddresses)
				{
					displ = (int)displ - (int)instruction.NextIP32;
				}
				else
				{
					baseReg = Register.None;
					flags = (flags & (Iced.Intel.NasmFormatterInternal.InstrOpInfoFlags)4294942719u) | (Iced.Intel.NasmFormatterInternal.InstrOpInfoFlags)16384u;
					flag = true;
				}
				displSize = 4;
				break;
			default:
				address = (ulong)displ;
				break;
			}
			ISymbolResolver symbolResolver = this.symbolResolver;
			bool flag2;
			SymbolResult symbol;
			if (symbolResolver != null)
			{
				flag2 = symbolResolver.TryGetSymbol(in instruction, operand, instructionOperand, address, addrSize, out symbol);
			}
			else
			{
				flag2 = false;
				symbol = default(SymbolResult);
			}
			bool flag3 = scale != 0 || options.AlwaysShowScale;
			if (!flag3 && baseReg == Register.None)
			{
				flag3 = true;
			}
			if (addrSize == 2 || !FormatterUtils.ShowIndexScale(in instruction, options))
			{
				flag3 = false;
			}
			FormatMemorySize(output, memSize, flags, operandOptions);
			output.Write("[", FormatterTextKind.Punctuation);
			if (options.SpaceAfterMemoryBracket)
			{
				output.Write(" ", FormatterTextKind.Text);
			}
			FormatterString keyword = memSizeInfos[((int)flags >> 13) & 3];
			if (keyword.Length != 0)
			{
				FormatKeyword(output, keyword);
				output.Write(" ", FormatterTextKind.Text);
			}
			if (flag)
			{
				FormatKeyword(output, str_rel);
				output.Write(" ", FormatterTextKind.Text);
			}
			CodeSize codeSize = instruction.CodeSize;
			Register segmentPrefix = instruction.SegmentPrefix;
			bool flag4 = segmentPrefix == Register.DS && FormatterUtils.IsNotrackPrefixBranch(instruction.Code) && ((codeSize != CodeSize.Code16 && codeSize != CodeSize.Code32) || (baseReg != Register.BP && baseReg != Register.EBP && baseReg != Register.ESP));
			if (options.AlwaysShowSegmentRegister || (segmentPrefix != 0 && !flag4 && FormatterUtils.ShowSegmentPrefix(Register.None, in instruction, options)))
			{
				FormatRegister(output, in instruction, operand, instructionOperand, segReg);
				output.Write(":", FormatterTextKind.Punctuation);
			}
			bool flag5 = false;
			if (baseReg != 0)
			{
				FormatRegister(output, in instruction, operand, instructionOperand, baseReg);
				flag5 = true;
			}
			if (indexReg != 0)
			{
				if (flag5)
				{
					if (options.SpaceBetweenMemoryAddOperators)
					{
						output.Write(" ", FormatterTextKind.Text);
					}
					output.Write("+", FormatterTextKind.Operator);
					if (options.SpaceBetweenMemoryAddOperators)
					{
						output.Write(" ", FormatterTextKind.Text);
					}
				}
				flag5 = true;
				if (!flag3)
				{
					FormatRegister(output, in instruction, operand, instructionOperand, indexReg);
				}
				else if (options.ScaleBeforeIndex)
				{
					output.WriteNumber(in instruction, operand, instructionOperand, scaleNumbers[scale], (uint)(1 << scale), NumberKind.Int32, FormatterTextKind.Number);
					if (options.SpaceBetweenMemoryMulOperators)
					{
						output.Write(" ", FormatterTextKind.Text);
					}
					output.Write("*", FormatterTextKind.Operator);
					if (options.SpaceBetweenMemoryMulOperators)
					{
						output.Write(" ", FormatterTextKind.Text);
					}
					FormatRegister(output, in instruction, operand, instructionOperand, indexReg);
				}
				else
				{
					FormatRegister(output, in instruction, operand, instructionOperand, indexReg);
					if (options.SpaceBetweenMemoryMulOperators)
					{
						output.Write(" ", FormatterTextKind.Text);
					}
					output.Write("*", FormatterTextKind.Operator);
					if (options.SpaceBetweenMemoryMulOperators)
					{
						output.Write(" ", FormatterTextKind.Text);
					}
					output.WriteNumber(in instruction, operand, instructionOperand, scaleNumbers[scale], (uint)(1 << scale), NumberKind.Int32, FormatterTextKind.Number);
				}
			}
			if (flag2)
			{
				if (flag5)
				{
					if (options.SpaceBetweenMemoryAddOperators)
					{
						output.Write(" ", FormatterTextKind.Text);
					}
					if ((symbol.Flags & SymbolFlags.Signed) != 0)
					{
						output.Write("-", FormatterTextKind.Operator);
					}
					else
					{
						output.Write("+", FormatterTextKind.Operator);
					}
					if (options.SpaceBetweenMemoryAddOperators)
					{
						output.Write(" ", FormatterTextKind.Text);
					}
				}
				else if ((symbol.Flags & SymbolFlags.Signed) != 0)
				{
					output.Write("-", FormatterTextKind.Operator);
				}
				output.Write(in instruction, operand, instructionOperand, options, in numberFormatter, in numberOptions, address, in symbol, options.ShowSymbolAddress, writeMinusIfSigned: false, options.SpaceBetweenMemoryAddOperators);
			}
			else if (!flag5 || (displSize != 0 && (options.ShowZeroDisplacements || displ != 0L)))
			{
				ulong value = (ulong)displ;
				bool flag6;
				if (flag5)
				{
					flag6 = numberOptions.SignedNumber;
					if (options.SpaceBetweenMemoryAddOperators)
					{
						output.Write(" ", FormatterTextKind.Text);
					}
					switch (addrSize)
					{
					case 8:
						if (!numberOptions.SignedNumber)
						{
							output.Write("+", FormatterTextKind.Operator);
						}
						else if (displ < 0)
						{
							displ = -displ;
							output.Write("-", FormatterTextKind.Operator);
						}
						else
						{
							output.Write("+", FormatterTextKind.Operator);
						}
						if (numberOptions.DisplacementLeadingZeros)
						{
							displSize = 4;
						}
						break;
					case 4:
						if (!numberOptions.SignedNumber)
						{
							output.Write("+", FormatterTextKind.Operator);
						}
						else if ((int)displ < 0)
						{
							displ = (uint)(-(int)displ);
							output.Write("-", FormatterTextKind.Operator);
						}
						else
						{
							output.Write("+", FormatterTextKind.Operator);
						}
						if (numberOptions.DisplacementLeadingZeros)
						{
							displSize = 4;
						}
						break;
					default:
						if (!numberOptions.SignedNumber)
						{
							output.Write("+", FormatterTextKind.Operator);
						}
						else if ((short)displ < 0)
						{
							displ = (ushort)(-(short)displ);
							output.Write("-", FormatterTextKind.Operator);
						}
						else
						{
							output.Write("+", FormatterTextKind.Operator);
						}
						if (numberOptions.DisplacementLeadingZeros)
						{
							displSize = 2;
						}
						break;
					}
					if (options.SpaceBetweenMemoryAddOperators)
					{
						output.Write(" ", FormatterTextKind.Text);
					}
				}
				else
				{
					flag6 = false;
				}
				string text;
				NumberKind numberKind;
				if (displSize <= 1 && (ulong)displ <= 255uL)
				{
					text = numberFormatter.FormatDisplUInt8(options, in numberOptions, (byte)displ);
					numberKind = ((!flag6) ? NumberKind.UInt8 : NumberKind.Int8);
				}
				else if (displSize <= 2 && (ulong)displ <= 65535uL)
				{
					text = numberFormatter.FormatDisplUInt16(options, in numberOptions, (ushort)displ);
					numberKind = (flag6 ? NumberKind.Int16 : NumberKind.UInt16);
				}
				else if (displSize <= 4 && (ulong)displ <= 4294967295uL)
				{
					text = numberFormatter.FormatDisplUInt32(options, in numberOptions, (uint)displ);
					numberKind = (flag6 ? NumberKind.Int32 : NumberKind.UInt32);
				}
				else
				{
					if (displSize > 8)
					{
						throw new InvalidOperationException();
					}
					text = numberFormatter.FormatDisplUInt64(options, in numberOptions, (ulong)displ);
					numberKind = (flag6 ? NumberKind.Int64 : NumberKind.UInt64);
				}
				output.WriteNumber(in instruction, operand, instructionOperand, text, value, numberKind, FormatterTextKind.Number);
			}
			if (options.SpaceAfterMemoryBracket)
			{
				output.Write(" ", FormatterTextKind.Text);
			}
			output.Write("]", FormatterTextKind.Punctuation);
			FormatterString bcstTo = allMemorySizes[(int)memSize].bcstTo;
			if (bcstTo.Length != 0)
			{
				FormatDecorator(output, in instruction, operand, instructionOperand, bcstTo, DecoratorKind.Broadcast);
			}
			if (instruction.IsMvexEvictionHint)
			{
				FormatDecorator(output, in instruction, operand, instructionOperand, str_eh, DecoratorKind.EvictionHint);
			}
		}

		private void FormatMemorySize(FormatterOutput output, MemorySize memSize, Iced.Intel.NasmFormatterInternal.InstrOpInfoFlags flags, FormatterOperandOptions operandOptions)
		{
			MemorySizeOptions memorySizeOptions = operandOptions.MemorySizeOptions;
			if (memorySizeOptions == MemorySizeOptions.Never || (flags & Iced.Intel.NasmFormatterInternal.InstrOpInfoFlags.MemSize_Nothing) != 0)
			{
				return;
			}
			FormatterString keyword = allMemorySizes[(int)memSize].keyword;
			if (keyword.Length == 0)
			{
				return;
			}
			switch (memorySizeOptions)
			{
			case MemorySizeOptions.Default:
				if ((flags & Iced.Intel.NasmFormatterInternal.InstrOpInfoFlags.ShowNoMemSize_ForceSize) == 0)
				{
					return;
				}
				break;
			case MemorySizeOptions.Minimal:
				if ((flags & Iced.Intel.NasmFormatterInternal.InstrOpInfoFlags.ShowMinMemSize_ForceSize) == 0)
				{
					return;
				}
				break;
			}
			FormatterString keyword2 = farMemSizeInfos[((int)flags >> 15) & 3];
			if (keyword2.Length != 0)
			{
				FormatKeyword(output, keyword2);
				output.Write(" ", FormatterTextKind.Text);
			}
			FormatKeyword(output, keyword);
			output.Write(" ", FormatterTextKind.Text);
		}

		private void FormatKeyword(FormatterOutput output, FormatterString keyword)
		{
			output.Write(keyword.Get(options.UppercaseKeywords || options.UppercaseAll), FormatterTextKind.Keyword);
		}

		public override string Format(Register register)
		{
			return ToRegisterString(register);
		}

		public override string FormatInt8(sbyte value, in NumberFormattingOptions numberOptions)
		{
			return numberFormatter.FormatInt8(options, in numberOptions, value);
		}

		public override string FormatInt16(short value, in NumberFormattingOptions numberOptions)
		{
			return numberFormatter.FormatInt16(options, in numberOptions, value);
		}

		public override string FormatInt32(int value, in NumberFormattingOptions numberOptions)
		{
			return numberFormatter.FormatInt32(options, in numberOptions, value);
		}

		public override string FormatInt64(long value, in NumberFormattingOptions numberOptions)
		{
			return numberFormatter.FormatInt64(options, in numberOptions, value);
		}

		public override string FormatUInt8(byte value, in NumberFormattingOptions numberOptions)
		{
			return numberFormatter.FormatUInt8(options, in numberOptions, value);
		}

		public override string FormatUInt16(ushort value, in NumberFormattingOptions numberOptions)
		{
			return numberFormatter.FormatUInt16(options, in numberOptions, value);
		}

		public override string FormatUInt32(uint value, in NumberFormattingOptions numberOptions)
		{
			return numberFormatter.FormatUInt32(options, in numberOptions, value);
		}

		public override string FormatUInt64(ulong value, in NumberFormattingOptions numberOptions)
		{
			return numberFormatter.FormatUInt64(options, in numberOptions, value);
		}
	}
	[Flags]
	internal enum NumberFormatterFlags
	{
		None = 0,
		AddMinusSign = 1,
		LeadingZeros = 2,
		SmallHexNumbersInDecimal = 4
	}
	internal readonly struct NumberFormatter
	{
		private const ulong SmallPositiveNumber = 9uL;

		private readonly StringBuilder sb;

		private static readonly ulong[] divs = new ulong[20]
		{
			1uL, 10uL, 100uL, 1000uL, 10000uL, 100000uL, 1000000uL, 10000000uL, 100000000uL, 1000000000uL,
			10000000000uL, 100000000000uL, 1000000000000uL, 10000000000000uL, 100000000000000uL, 1000000000000000uL, 10000000000000000uL, 100000000000000000uL, 1000000000000000000uL, 10000000000000000000uL
		};

		private static readonly string[] smallDecimalValues = new string[10] { "0", "1", "2", "3", "4", "5", "6", "7", "8", "9" };

		public NumberFormatter(bool dummy)
		{
			sb = new StringBuilder(81);
		}

		[MethodImpl(MethodImplOptions.AggressiveInlining)]
		private static void ToHexadecimal(StringBuilder sb, ulong value, int digitGroupSize, string digitSeparator, int digits, bool upper, bool leadingZero)
		{
			if (digits == 0)
			{
				digits = 1;
				ulong num = value;
				while (true)
				{
					num >>= 4;
					if (num == 0L)
					{
						break;
					}
					digits++;
				}
			}
			int num2 = (upper ? 55 : 87);
			if (leadingZero && digits < 17 && (int)((value >> (digits - 1 << 2)) & 0xF) > 9)
			{
				digits++;
			}
			bool flag = digitGroupSize > 0 && !string.IsNullOrEmpty(digitSeparator);
			for (int i = 0; i < digits; i++)
			{
				int num3 = digits - i - 1;
				int num4 = (int)((num3 < 16) ? ((value >> (num3 << 2)) & 0xF) : 0);
				if (num4 > 9)
				{
					sb.Append((char)(num4 + num2));
				}
				else
				{
					sb.Append((char)(num4 + 48));
				}
				if (flag && num3 > 0 && num3 % digitGroupSize == 0)
				{
					sb.Append(digitSeparator);
				}
			}
		}

		[MethodImpl(MethodImplOptions.AggressiveInlining)]
		private static void ToDecimal(StringBuilder sb, ulong value, int digitGroupSize, string digitSeparator, int digits)
		{
			if (digits == 0)
			{
				digits = 1;
				ulong num = value;
				while (true)
				{
					num /= 10;
					if (num == 0L)
					{
						break;
					}
					digits++;
				}
			}
			bool flag = digitGroupSize > 0 && !string2.IsNullOrEmpty(digitSeparator);
			ulong[] array = divs;
			for (int i = 0; i < digits; i++)
			{
				int num2 = digits - i - 1;
				if ((uint)num2 < (uint)array.Length)
				{
					int num3 = (int)(value / array[num2] % 10);
					sb.Append((char)(num3 + 48));
				}
				else
				{
					sb.Append('0');
				}
				if (flag && num2 > 0 && num2 % digitGroupSize == 0)
				{
					sb.Append(digitSeparator);
				}
			}
		}

		[MethodImpl(MethodImplOptions.AggressiveInlining)]
		private static void ToOctal(StringBuilder sb, ulong value, int digitGroupSize, string digitSeparator, int digits, string prefix)
		{
			if (digits == 0)
			{
				digits = 1;
				ulong num = value;
				while (true)
				{
					num >>= 3;
					if (num == 0L)
					{
						break;
					}
					digits++;
				}
			}
			if (!string.IsNullOrEmpty(prefix))
			{
				if (prefix == "0")
				{
					if (digits < 23 && (uint)((value >> (digits - 1) * 3) & 7) != 0)
					{
						digits++;
					}
				}
				else
				{
					sb.Append(prefix);
				}
			}
			bool flag = digitGroupSize > 0 && !string2.IsNullOrEmpty(digitSeparator);
			for (int i = 0; i < digits; i++)
			{
				int num2 = digits - i - 1;
				int num3 = (int)((num2 < 22) ? ((value >> num2 * 3) & 7) : 0);
				sb.Append((char)(num3 + 48));
				if (flag && num2 > 0 && num2 % digitGroupSize == 0)
				{
					sb.Append(digitSeparator);
				}
			}
		}

		[MethodImpl(MethodImplOptions.AggressiveInlining)]
		private static void ToBinary(StringBuilder sb, ulong value, int digitGroupSize, string digitSeparator, int digits)
		{
			if (digits == 0)
			{
				digits = 1;
				ulong num = value;
				while (true)
				{
					num >>= 1;
					if (num == 0L)
					{
						break;
					}
					digits++;
				}
			}
			bool flag = digitGroupSize > 0 && !string2.IsNullOrEmpty(digitSeparator);
			for (int i = 0; i < digits; i++)
			{
				int num2 = digits - i - 1;
				int num3 = (int)((num2 < 64) ? ((value >> num2) & 1) : 0);
				sb.Append((char)(num3 + 48));
				if (flag && num2 > 0 && num2 % digitGroupSize == 0)
				{
					sb.Append(digitSeparator);
				}
			}
		}

		[MethodImpl(MethodImplOptions.AggressiveInlining)]
		private static NumberFormatterFlags GetFlags(bool leadingZeros, bool smallHexNumbersInDecimal)
		{
			NumberFormatterFlags numberFormatterFlags = NumberFormatterFlags.None;
			if (leadingZeros)
			{
				numberFormatterFlags |= NumberFormatterFlags.LeadingZeros;
			}
			if (smallHexNumbersInDecimal)
			{
				numberFormatterFlags |= NumberFormatterFlags.SmallHexNumbersInDecimal;
			}
			return numberFormatterFlags;
		}

		public string FormatInt8(FormatterOptions formatterOptions, in NumberFormattingOptions options, sbyte value)
		{
			NumberFormatterFlags numberFormatterFlags = GetFlags(options.LeadingZeros, options.SmallHexNumbersInDecimal);
			if (value < 0)
			{
				numberFormatterFlags |= NumberFormatterFlags.AddMinusSign;
				value = (sbyte)(-value);
			}
			return FormatUnsignedInteger(formatterOptions, in options, (byte)value, 8, numberFormatterFlags);
		}

		public string FormatInt16(FormatterOptions formatterOptions, in NumberFormattingOptions options, short value)
		{
			NumberFormatterFlags numberFormatterFlags = GetFlags(options.LeadingZeros, options.SmallHexNumbersInDecimal);
			if (value < 0)
			{
				numberFormatterFlags |= NumberFormatterFlags.AddMinusSign;
				value = (short)(-value);
			}
			return FormatUnsignedInteger(formatterOptions, in options, (ushort)value, 16, numberFormatterFlags);
		}

		public string FormatInt32(FormatterOptions formatterOptions, in NumberFormattingOptions options, int value)
		{
			NumberFormatterFlags numberFormatterFlags = GetFlags(options.LeadingZeros, options.SmallHexNumbersInDecimal);
			if (value < 0)
			{
				numberFormatterFlags |= NumberFormatterFlags.AddMinusSign;
				value = -value;
			}
			return FormatUnsignedInteger(formatterOptions, in options, (uint)value, 32, numberFormatterFlags);
		}

		public string FormatInt64(FormatterOptions formatterOptions, in NumberFormattingOptions options, long value)
		{
			NumberFormatterFlags numberFormatterFlags = GetFlags(options.LeadingZeros, options.SmallHexNumbersInDecimal);
			if (value < 0)
			{
				numberFormatterFlags |= NumberFormatterFlags.AddMinusSign;
				value = -value;
			}
			return FormatUnsignedInteger(formatterOptions, in options, (ulong)value, 64, numberFormatterFlags);
		}

		public string FormatUInt8(FormatterOptions formatterOptions, in NumberFormattingOptions options, byte value)
		{
			return FormatUnsignedInteger(formatterOptions, in options, value, 8, GetFlags(options.LeadingZeros, options.SmallHexNumbersInDecimal));
		}

		public string FormatUInt16(FormatterOptions formatterOptions, in NumberFormattingOptions options, ushort value)
		{
			return FormatUnsignedInteger(formatterOptions, in options, value, 16, GetFlags(options.LeadingZeros, options.SmallHexNumbersInDecimal));
		}

		public string FormatUInt32(FormatterOptions formatterOptions, in NumberFormattingOptions options, uint value)
		{
			return FormatUnsignedInteger(formatterOptions, in options, value, 32, GetFlags(options.LeadingZeros, options.SmallHexNumbersInDecimal));
		}

		public string FormatUInt64(FormatterOptions formatterOptions, in NumberFormattingOptions options, ulong value)
		{
			return FormatUnsignedInteger(formatterOptions, in options, value, 64, GetFlags(options.LeadingZeros, options.SmallHexNumbersInDecimal));
		}

		public string FormatDisplUInt8(FormatterOptions formatterOptions, in NumberFormattingOptions options, byte value)
		{
			return FormatUnsignedInteger(formatterOptions, in options, value, 8, GetFlags(options.DisplacementLeadingZeros, options.SmallHexNumbersInDecimal));
		}

		public string FormatDisplUInt16(FormatterOptions formatterOptions, in NumberFormattingOptions options, ushort value)
		{
			return FormatUnsignedInteger(formatterOptions, in options, value, 16, GetFlags(options.DisplacementLeadingZeros, options.SmallHexNumbersInDecimal));
		}

		public string FormatDisplUInt32(FormatterOptions formatterOptions, in NumberFormattingOptions options, uint value)
		{
			return FormatUnsignedInteger(formatterOptions, in options, value, 32, GetFlags(options.DisplacementLeadingZeros, options.SmallHexNumbersInDecimal));
		}

		public string FormatDisplUInt64(FormatterOptions formatterOptions, in NumberFormattingOptions options, ulong value)
		{
			return FormatUnsignedInteger(formatterOptions, in options, value, 64, GetFlags(options.DisplacementLeadingZeros, options.SmallHexNumbersInDecimal));
		}

		public string FormatUInt16(FormatterOptions formatterOptions, in NumberFormattingOptions options, ushort value, bool leadingZeros)
		{
			return FormatUnsignedInteger(formatterOptions, in options, value, 16, GetFlags(leadingZeros, options.SmallHexNumbersInDecimal));
		}

		public string FormatUInt32(FormatterOptions formatterOptions, in NumberFormattingOptions options, uint value, bool leadingZeros)
		{
			return FormatUnsignedInteger(formatterOptions, in options, value, 32, GetFlags(leadingZeros, options.SmallHexNumbersInDecimal));
		}

		public string FormatUInt64(FormatterOptions formatterOptions, in NumberFormattingOptions options, ulong value, bool leadingZeros)
		{
			return FormatUnsignedInteger(formatterOptions, in options, value, 64, GetFlags(leadingZeros, options.SmallHexNumbersInDecimal));
		}

		private string FormatUnsignedInteger(FormatterOptions formatterOptions, in NumberFormattingOptions options, ulong value, int valueSize, NumberFormatterFlags flags)
		{
			sb.Clear();
			if ((flags & NumberFormatterFlags.AddMinusSign) != 0)
			{
				sb.Append('-');
			}
			string value2;
			switch (options.NumberBase)
			{
			case NumberBase.Hexadecimal:
				if ((flags & NumberFormatterFlags.SmallHexNumbersInDecimal) != 0 && value <= 9)
				{
					if (string.IsNullOrEmpty(formatterOptions.DecimalPrefix) && string.IsNullOrEmpty(formatterOptions.DecimalSuffix))
					{
						return smallDecimalValues[(uint)value];
					}
					if (!string.IsNullOrEmpty(formatterOptions.DecimalPrefix))
					{
						sb.Append(formatterOptions.DecimalPrefix);
					}
					sb.Append(smallDecimalValues[(uint)value]);
					value2 = formatterOptions.DecimalSuffix;
				}
				else
				{
					if (!string.IsNullOrEmpty(options.Prefix))
					{
						sb.Append(options.Prefix);
					}
					ToHexadecimal(sb, value, options.DigitGroupSize, options.DigitSeparator, ((flags & NumberFormatterFlags.LeadingZeros) != 0) ? (valueSize + 3 >> 2) : 0, options.UppercaseHex, options.AddLeadingZeroToHexNumbers && string.IsNullOrEmpty(options.Prefix));
					value2 = options.Suffix;
				}
				break;
			case NumberBase.Decimal:
				if (!string.IsNullOrEmpty(options.Prefix))
				{
					sb.Append(options.Prefix);
				}
				ToDecimal(sb, value, options.DigitGroupSize, options.DigitSeparator, 0);
				value2 = options.Suffix;
				break;
			case NumberBase.Octal:
				ToOctal(sb, value, options.DigitGroupSize, options.DigitSeparator, ((flags & NumberFormatterFlags.LeadingZeros) != 0) ? ((valueSize + 2) / 3) : 0, options.Prefix);
				value2 = options.Suffix;
				break;
			case NumberBase.Binary:
				if (!string.IsNullOrEmpty(options.Prefix))
				{
					sb.Append(options.Prefix);
				}
				ToBinary(sb, value, options.DigitGroupSize, options.DigitSeparator, ((flags & NumberFormatterFlags.LeadingZeros) != 0) ? valueSize : 0);
				value2 = options.Suffix;
				break;
			default:
				throw new InvalidOperationException();
			}
			if (!string.IsNullOrEmpty(value2))
			{
				sb.Append(value2);
			}
			return sb.ToString();
		}
	}
	public enum OpAccess
	{
		None,
		Read,
		CondRead,
		Write,
		CondWrite,
		ReadWrite,
		ReadCondWrite,
		NoMemAccess
	}
	public sealed class OpCodeInfo
	{
		[Flags]
		private enum Flags : uint
		{
			None = 0u,
			IgnoresRoundingControl = 1u,
			AmdLockRegBit = 2u,
			LIG = 4u,
			W = 8u,
			WIG = 0x10u,
			WIG32 = 0x20u,
			CPL0 = 0x40u,
			CPL1 = 0x80u,
			CPL2 = 0x100u,
			CPL3 = 0x200u
		}

		private readonly string toOpCodeStringValue;

		private readonly string toInstructionStringValue;

		private readonly EncFlags2 encFlags2;

		private readonly EncFlags3 encFlags3;

		private readonly OpCodeInfoFlags1 opcFlags1;

		private readonly OpCodeInfoFlags2 opcFlags2;

		private readonly ushort code;

		private readonly byte encoding;

		private readonly byte operandSize;

		private readonly byte addressSize;

		private readonly byte l;

		private readonly byte tupleType;

		private readonly byte table;

		private readonly byte mandatoryPrefix;

		private readonly sbyte groupIndex;

		private readonly sbyte rmGroupIndex;

		private readonly byte op0Kind;

		private readonly byte op1Kind;

		private readonly byte op2Kind;

		private readonly byte op3Kind;

		private readonly byte op4Kind;

		private readonly Flags flags;

		private static readonly DecoderOptions[] toDecoderOptions = new DecoderOptions[18]
		{
			DecoderOptions.None,
			DecoderOptions.ALTINST,
			DecoderOptions.Cl1invmb,
			DecoderOptions.Cmpxchg486A,
			DecoderOptions.Cyrix,
			DecoderOptions.Cyrix_DMI,
			DecoderOptions.Cyrix_SMINT_0F7E,
			DecoderOptions.Jmpe,
			DecoderOptions.Loadall286,
			DecoderOptions.Loadall386,
			DecoderOptions.MovTr,
			DecoderOptions.MPX,
			DecoderOptions.OldFpu,
			DecoderOptions.Pcommit,
			DecoderOptions.Umov,
			DecoderOptions.Xbts,
			DecoderOptions.Udbg,
			DecoderOptions.KNC
		};

		public Code Code => (Code)code;

		public Mnemonic Mnemonic => Code.Mnemonic();

		public EncodingKind Encoding => (EncodingKind)encoding;

		public bool IsInstruction
		{
			get
			{
				if (code > 4)
				{
					return code != 4833;
				}
				return false;
			}
		}

		public bool Mode16 => (encFlags3 & EncFlags3.Bit16or32) != 0;

		public bool Mode32 => (encFlags3 & EncFlags3.Bit16or32) != 0;

		public bool Mode64 => (encFlags3 & EncFlags3.Bit64) != 0;

		public bool Fwait => (encFlags3 & EncFlags3.Fwait) != 0;

		public int OperandSize => operandSize;

		public int AddressSize => addressSize;

		public uint L => l;

		public uint W
		{
			get
			{
				if ((flags & Flags.W) == 0)
				{
					return 0u;
				}
				return 1u;
			}
		}

		public bool IsLIG => (flags & Flags.LIG) != 0;

		public bool IsWIG => (flags & Flags.WIG) != 0;

		public bool IsWIG32 => (flags & Flags.WIG32) != 0;

		public TupleType TupleType => (TupleType)tupleType;

		public MvexEHBit MvexEHBit
		{
			get
			{
				if (Encoding != EncodingKind.MVEX)
				{
					return MvexEHBit.None;
				}
				return new MvexInfo(Code).EHBit;
			}
		}

		public bool MvexCanUseEvictionHint
		{
			get
			{
				if (Encoding == EncodingKind.MVEX)
				{
					return new MvexInfo(Code).CanUseEvictionHint;
				}
				return false;
			}
		}

		public bool MvexCanUseImmRoundingControl
		{
			get
			{
				if (Encoding == EncodingKind.MVEX)
				{
					return new MvexInfo(Code).CanUseImmRoundingControl;
				}
				return false;
			}
		}

		public bool MvexIgnoresOpMaskRegister
		{
			get
			{
				if (Encoding == EncodingKind.MVEX)
				{
					return new MvexInfo(Code).IgnoresOpMaskRegister;
				}
				return false;
			}
		}

		public bool MvexNoSaeRc
		{
			get
			{
				if (Encoding == EncodingKind.MVEX)
				{
					return new MvexInfo(Code).NoSaeRc;
				}
				return false;
			}
		}

		public MvexTupleTypeLutKind MvexTupleTypeLutKind
		{
			get
			{
				if (Encoding != EncodingKind.MVEX)
				{
					return MvexTupleTypeLutKind.Int32;
				}
				return new MvexInfo(Code).TupleTypeLutKind;
			}
		}

		public MvexConvFn MvexConversionFunc
		{
			get
			{
				if (Encoding != EncodingKind.MVEX)
				{
					return MvexConvFn.None;
				}
				return new MvexInfo(Code).ConvFn;
			}
		}

		public byte MvexValidConversionFuncsMask => (byte)((Encoding == EncodingKind.MVEX) ? (~new MvexInfo(Code).InvalidConvFns) : 0u);

		public byte MvexValidSwizzleFuncsMask => (byte)((Encoding == EncodingKind.MVEX) ? (~new MvexInfo(Code).InvalidSwizzleFns) : 0u);

		public MemorySize MemorySize => (MemorySize)InstructionMemorySizes.SizesNormal[code];

		public MemorySize BroadcastMemorySize => (MemorySize)InstructionMemorySizes.SizesBcst[code];

		public bool CanBroadcast => (encFlags3 & EncFlags3.Broadcast) != 0;

		public bool CanUseRoundingControl => (encFlags3 & EncFlags3.RoundingControl) != 0;

		public bool CanSuppressAllExceptions => (encFlags3 & EncFlags3.SuppressAllExceptions) != 0;

		public bool CanUseOpMaskRegister => (encFlags3 & EncFlags3.OpMaskRegister) != 0;

		public bool RequireOpMaskRegister => ((uint)encFlags3 & 0x80000000u) != 0;

		public bool CanUseZeroingMasking => (encFlags3 & EncFlags3.ZeroingMasking) != 0;

		public bool CanUseLockPrefix => (encFlags3 & EncFlags3.Lock) != 0;

		public bool CanUseXacquirePrefix => (encFlags3 & EncFlags3.Xacquire) != 0;

		public bool CanUseXreleasePrefix => (encFlags3 & EncFlags3.Xrelease) != 0;

		public bool CanUseRepPrefix => (encFlags3 & EncFlags3.Rep) != 0;

		public bool CanUseRepnePrefix => (encFlags3 & EncFlags3.Repne) != 0;

		public bool CanUseBndPrefix => (encFlags3 & EncFlags3.Bnd) != 0;

		public bool CanUseHintTakenPrefix => (encFlags3 & EncFlags3.HintTaken) != 0;

		public bool CanUseNotrackPrefix => (encFlags3 & EncFlags3.Notrack) != 0;

		public bool IgnoresRoundingControl => (flags & Flags.IgnoresRoundingControl) != 0;

		public bool AmdLockRegBit => (flags & Flags.AmdLockRegBit) != 0;

		public bool DefaultOpSize64 => (encFlags3 & EncFlags3.DefaultOpSize64) != 0;

		public bool ForceOpSize64 => (opcFlags1 & OpCodeInfoFlags1.ForceOpSize64) != 0;

		public bool IntelForceOpSize64 => (encFlags3 & EncFlags3.IntelForceOpSize64) != 0;

		public bool MustBeCpl0 => (flags & (Flags.CPL0 | Flags.CPL1 | Flags.CPL2 | Flags.CPL3)) == Flags.CPL0;

		public bool Cpl0 => (flags & Flags.CPL0) != 0;

		public bool Cpl1 => (flags & Flags.CPL1) != 0;

		public bool Cpl2 => (flags & Flags.CPL2) != 0;

		public bool Cpl3 => (flags & Flags.CPL3) != 0;

		public bool IsInputOutput => (opcFlags1 & OpCodeInfoFlags1.InputOutput) != 0;

		public bool IsNop => (opcFlags1 & OpCodeInfoFlags1.Nop) != 0;

		public bool IsReservedNop => (opcFlags1 & OpCodeInfoFlags1.ReservedNop) != 0;

		public bool IsSerializingIntel => (opcFlags1 & OpCodeInfoFlags1.SerializingIntel) != 0;

		public bool IsSerializingAmd => (opcFlags1 & OpCodeInfoFlags1.SerializingAmd) != 0;

		public bool MayRequireCpl0 => (opcFlags1 & OpCodeInfoFlags1.MayRequireCpl0) != 0;

		public bool IsCetTracked => (opcFlags1 & OpCodeInfoFlags1.CetTracked) != 0;

		public bool IsNonTemporal => (opcFlags1 & OpCodeInfoFlags1.NonTemporal) != 0;

		public bool IsFpuNoWait => (opcFlags1 & OpCodeInfoFlags1.FpuNoWait) != 0;

		public bool IgnoresModBits => (opcFlags1 & OpCodeInfoFlags1.IgnoresModBits) != 0;

		public bool No66 => (opcFlags1 & OpCodeInfoFlags1.No66) != 0;

		public bool NFx => (opcFlags1 & OpCodeInfoFlags1.NFx) != 0;

		public bool RequiresUniqueRegNums => (opcFlags1 & OpCodeInfoFlags1.RequiresUniqueRegNums) != 0;

		public bool RequiresUniqueDestRegNum => ((uint)opcFlags1 & 0x80000000u) != 0;

		public bool IsPrivileged => (opcFlags1 & OpCodeInfoFlags1.Privileged) != 0;

		public bool IsSaveRestore => (opcFlags1 & OpCodeInfoFlags1.SaveRestore) != 0;

		public bool IsStackInstruction => (opcFlags1 & OpCodeInfoFlags1.StackInstruction) != 0;

		public bool IgnoresSegment => (opcFlags1 & OpCodeInfoFlags1.IgnoresSegment) != 0;

		public bool IsOpMaskReadWrite => (opcFlags1 & OpCodeInfoFlags1.OpMaskReadWrite) != 0;

		public bool RealMode => (opcFlags2 & OpCodeInfoFlags2.RealMode) != 0;

		public bool ProtectedMode => (opcFlags2 & OpCodeInfoFlags2.ProtectedMode) != 0;

		public bool Virtual8086Mode => (opcFlags2 & OpCodeInfoFlags2.Virtual8086Mode) != 0;

		public bool CompatibilityMode => (opcFlags2 & OpCodeInfoFlags2.CompatibilityMode) != 0;

		public bool LongMode => (encFlags3 & EncFlags3.Bit64) != 0;

		public bool UseOutsideSmm => (opcFlags2 & OpCodeInfoFlags2.UseOutsideSmm) != 0;

		public bool UseInSmm => (opcFlags2 & OpCodeInfoFlags2.UseInSmm) != 0;

		public bool UseOutsideEnclaveSgx => (opcFlags2 & OpCodeInfoFlags2.UseOutsideEnclaveSgx) != 0;

		public bool UseInEnclaveSgx1 => (opcFlags2 & OpCodeInfoFlags2.UseInEnclaveSgx1) != 0;

		public bool UseInEnclaveSgx2 => (opcFlags2 & OpCodeInfoFlags2.UseInEnclaveSgx2) != 0;

		public bool UseOutsideVmxOp => (opcFlags2 & OpCodeInfoFlags2.UseOutsideVmxOp) != 0;

		public bool UseInVmxRootOp => (opcFlags2 & OpCodeInfoFlags2.UseInVmxRootOp) != 0;

		public bool UseInVmxNonRootOp => (opcFlags2 & OpCodeInfoFlags2.UseInVmxNonRootOp) != 0;

		public bool UseOutsideSeam => (opcFlags2 & OpCodeInfoFlags2.UseOutsideSeam) != 0;

		public bool UseInSeam => (opcFlags2 & OpCodeInfoFlags2.UseInSeam) != 0;

		public bool TdxNonRootGenUd => (opcFlags2 & OpCodeInfoFlags2.TdxNonRootGenUd) != 0;

		public bool TdxNonRootGenVe => (opcFlags2 & OpCodeInfoFlags2.TdxNonRootGenVe) != 0;

		public bool TdxNonRootMayGenEx => (opcFlags2 & OpCodeInfoFlags2.TdxNonRootMayGenEx) != 0;

		public bool IntelVmExit => (opcFlags2 & OpCodeInfoFlags2.IntelVmExit) != 0;

		public bool IntelMayVmExit => (opcFlags2 & OpCodeInfoFlags2.IntelMayVmExit) != 0;

		public bool IntelSmmVmExit => (opcFlags2 & OpCodeInfoFlags2.IntelSmmVmExit) != 0;

		public bool AmdVmExit => (opcFlags2 & OpCodeInfoFlags2.AmdVmExit) != 0;

		public bool AmdMayVmExit => (opcFlags2 & OpCodeInfoFlags2.AmdMayVmExit) != 0;

		public bool TsxAbort => (opcFlags2 & OpCodeInfoFlags2.TsxAbort) != 0;

		public bool TsxImplAbort => (opcFlags2 & OpCodeInfoFlags2.TsxImplAbort) != 0;

		public bool TsxMayAbort => (opcFlags2 & OpCodeInfoFlags2.TsxMayAbort) != 0;

		public bool IntelDecoder16 => (opcFlags2 & OpCodeInfoFlags2.IntelDecoder16or32) != 0;

		public bool IntelDecoder32 => (opcFlags2 & OpCodeInfoFlags2.IntelDecoder16or32) != 0;

		public bool IntelDecoder64 => (opcFlags2 & OpCodeInfoFlags2.IntelDecoder64) != 0;

		public bool AmdDecoder16 => (opcFlags2 & OpCodeInfoFlags2.AmdDecoder16or32) != 0;

		public bool AmdDecoder32 => (opcFlags2 & OpCodeInfoFlags2.AmdDecoder16or32) != 0;

		public bool AmdDecoder64 => (opcFlags2 & OpCodeInfoFlags2.AmdDecoder64) != 0;

		public DecoderOptions DecoderOption => toDecoderOptions[((uint)opcFlags1 >> 21) & 0x1F];

		public OpCodeTableKind Table => (OpCodeTableKind)table;

		public MandatoryPrefix MandatoryPrefix => (MandatoryPrefix)mandatoryPrefix;

		public uint OpCode => (ushort)encFlags2;

		public int OpCodeLength
		{
			get
			{
				if ((encFlags2 & EncFlags2.OpCodeIs2Bytes) == 0)
				{
					return 1;
				}
				return 2;
			}
		}

		public bool IsGroup => GroupIndex >= 0;

		public int GroupIndex => groupIndex;

		public bool IsRmGroup => RmGroupIndex >= 0;

		public int RmGroupIndex => rmGroupIndex;

		public int OpCount => InstructionOpCounts.OpCount[code];

		public OpCodeOperandKind Op0Kind => (OpCodeOperandKind)op0Kind;

		public OpCodeOperandKind Op1Kind => (OpCodeOperandKind)op1Kind;

		public OpCodeOperandKind Op2Kind => (OpCodeOperandKind)op2Kind;

		public OpCodeOperandKind Op3Kind => (OpCodeOperandKind)op3Kind;

		public OpCodeOperandKind Op4Kind => (OpCodeOperandKind)op4Kind;

		internal OpCodeInfo(Code code, EncFlags1 encFlags1, EncFlags2 encFlags2, EncFlags3 encFlags3, OpCodeInfoFlags1 opcFlags1, OpCodeInfoFlags2 opcFlags2, StringBuilder sb)
		{
			this.code = (ushort)code;
			this.encFlags2 = encFlags2;
			this.encFlags3 = encFlags3;
			this.opcFlags1 = opcFlags1;
			this.opcFlags2 = opcFlags2;
			if ((encFlags1 & EncFlags1.IgnoresRoundingControl) != 0)
			{
				this.flags |= Flags.IgnoresRoundingControl;
			}
			if ((encFlags1 & EncFlags1.AmdLockRegBit) != 0)
			{
				this.flags |= Flags.AmdLockRegBit;
			}
			Flags flags = this.flags;
			this.flags = flags | ((opcFlags1 & (OpCodeInfoFlags1.Cpl0Only | OpCodeInfoFlags1.Cpl3Only)) switch
			{
				OpCodeInfoFlags1.Cpl0Only => Flags.CPL0, 
				OpCodeInfoFlags1.Cpl3Only => Flags.CPL3, 
				_ => Flags.CPL0 | Flags.CPL1 | Flags.CPL2 | Flags.CPL3, 
			});
			encoding = (byte)(encFlags3 & EncFlags3.EncodingMask);
			mandatoryPrefix = (MandatoryPrefixByte)(((uint)encFlags2 >> 20) & 3) switch
			{
				MandatoryPrefixByte.None => (byte)(((encFlags2 & EncFlags2.HasMandatoryPrefix) != 0) ? 1u : 0u), 
				MandatoryPrefixByte.P66 => 2, 
				MandatoryPrefixByte.PF3 => 3, 
				MandatoryPrefixByte.PF2 => 4, 
				_ => throw new InvalidOperationException(), 
			};
			operandSize = (CodeSize)(((uint)encFlags3 >> 3) & 3) switch
			{
				CodeSize.Unknown => 0, 
				CodeSize.Code16 => 16, 
				CodeSize.Code32 => 32, 
				CodeSize.Code64 => 64, 
				_ => throw new InvalidOperationException(), 
			};
			addressSize = (CodeSize)(((uint)encFlags3 >> 5) & 3) switch
			{
				CodeSize.Unknown => 0, 
				CodeSize.Code16 => 16, 
				CodeSize.Code32 => 32, 
				CodeSize.Code64 => 64, 
				_ => throw new InvalidOperationException(), 
			};
			groupIndex = (sbyte)((((uint)encFlags2 & 0x80000000u) == 0) ? (-1) : ((int)(((uint)encFlags2 >> 27) & 7)));
			rmGroupIndex = (sbyte)(((encFlags3 & EncFlags3.HasRmGroupIndex) == 0) ? (-1) : ((int)(((uint)encFlags2 >> 27) & 7)));
			tupleType = (byte)(((uint)encFlags3 >> 7) & 0x1Fu);
			LKind lkind;
			switch ((LBit)(((uint)encFlags2 >> 24) & 7))
			{
			case LBit.LZ:
				lkind = LKind.LZ;
				l = 0;
				break;
			case LBit.L0:
				lkind = LKind.L0;
				l = 0;
				break;
			case LBit.L1:
				lkind = LKind.L0;
				l = 1;
				break;
			case LBit.L128:
				lkind = LKind.L128;
				l = 0;
				break;
			case LBit.L256:
				lkind = LKind.L128;
				l = 1;
				break;
			case LBit.L512:
				lkind = LKind.L128;
				l = 2;
				break;
			case LBit.LIG:
				lkind = LKind.None;
				l = 0;
				this.flags |= Flags.LIG;
				break;
			default:
				throw new InvalidOperationException();
			}
			switch ((WBit)(((uint)encFlags2 >> 22) & 3))
			{
			case WBit.W1:
				this.flags |= Flags.W;
				break;
			case WBit.WIG:
				this.flags |= Flags.WIG;
				break;
			case WBit.WIG32:
				this.flags |= Flags.WIG32;
				break;
			default:
				throw new InvalidOperationException();
			case WBit.W0:
				break;
			}
			string text = null;
			string text2 = null;
			switch ((EncodingKind)encoding)
			{
			case EncodingKind.Legacy:
			{
				ReadOnlySpan<byte> mvexOpKinds = OpCodeOperandKinds.LegacyOpKinds;
				op0Kind = mvexOpKinds[(int)(encFlags1 & EncFlags1.Legacy_OpMask)];
				op1Kind = mvexOpKinds[(int)(((uint)encFlags1 >> 7) & 0x7F)];
				op2Kind = mvexOpKinds[(int)(((uint)encFlags1 >> 14) & 0x7F)];
				op3Kind = mvexOpKinds[(int)(((uint)encFlags1 >> 21) & 0x7F)];
				table = (LegacyOpCodeTable)(((uint)encFlags2 >> 17) & 7) switch
				{
					LegacyOpCodeTable.MAP0 => 0, 
					LegacyOpCodeTable.MAP0F => 1, 
					LegacyOpCodeTable.MAP0F38 => 2, 
					LegacyOpCodeTable.MAP0F3A => 3, 
					_ => throw new InvalidOperationException(), 
				};
				break;
			}
			case EncodingKind.VEX:
			{
				ReadOnlySpan<byte> mvexOpKinds = OpCodeOperandKinds.VexOpKinds;
				op0Kind = mvexOpKinds[(int)(encFlags1 & EncFlags1.VEX_OpMask)];
				op1Kind = mvexOpKinds[(int)(((uint)encFlags1 >> 6) & 0x3F)];
				op2Kind = mvexOpKinds[(int)(((uint)encFlags1 >> 12) & 0x3F)];
				op3Kind = mvexOpKinds[(int)(((uint)encFlags1 >> 18) & 0x3F)];
				op4Kind = mvexOpKinds[(int)(((uint)encFlags1 >> 24) & 0x3F)];
				table = (VexOpCodeTable)(((uint)encFlags2 >> 17) & 7) switch
				{
					VexOpCodeTable.MAP0 => 0, 
					VexOpCodeTable.MAP0F => 1, 
					VexOpCodeTable.MAP0F38 => 2, 
					VexOpCodeTable.MAP0F3A => 3, 
					_ => throw new InvalidOperationException(), 
				};
				break;
			}
			case EncodingKind.EVEX:
			{
				ReadOnlySpan<byte> mvexOpKinds = OpCodeOperandKinds.EvexOpKinds;
				op0Kind = mvexOpKinds[(int)(encFlags1 & EncFlags1.XOP_OpMask)];
				op1Kind = mvexOpKinds[(int)(((uint)encFlags1 >> 5) & 0x1F)];
				op2Kind = mvexOpKinds[(int)(((uint)encFlags1 >> 10) & 0x1F)];
				op3Kind = mvexOpKinds[(int)(((uint)encFlags1 >> 15) & 0x1F)];
				table = (EvexOpCodeTable)(((uint)encFlags2 >> 17) & 7) switch
				{
					EvexOpCodeTable.MAP0F => 1, 
					EvexOpCodeTable.MAP0F38 => 2, 
					EvexOpCodeTable.MAP0F3A => 3, 
					EvexOpCodeTable.MAP5 => 4, 
					EvexOpCodeTable.MAP6 => 5, 
					_ => throw new InvalidOperationException(), 
				};
				break;
			}
			case EncodingKind.XOP:
			{
				ReadOnlySpan<byte> mvexOpKinds = OpCodeOperandKinds.XopOpKinds;
				op0Kind = mvexOpKinds[(int)(encFlags1 & EncFlags1.XOP_OpMask)];
				op1Kind = mvexOpKinds[(int)(((uint)encFlags1 >> 5) & 0x1F)];
				op2Kind = mvexOpKinds[(int)(((uint)encFlags1 >> 10) & 0x1F)];
				op3Kind = mvexOpKinds[(int)(((uint)encFlags1 >> 15) & 0x1F)];
				table = (XopOpCodeTable)(((uint)encFlags2 >> 17) & 7) switch
				{
					XopOpCodeTable.MAP8 => 6, 
					XopOpCodeTable.MAP9 => 7, 
					XopOpCodeTable.MAP10 => 8, 
					_ => throw new InvalidOperationException(), 
				};
				break;
			}
			case EncodingKind.D3NOW:
				op0Kind = 46;
				op1Kind = 19;
				table = 1;
				break;
			case EncodingKind.MVEX:
			{
				ReadOnlySpan<byte> mvexOpKinds = OpCodeOperandKinds.MvexOpKinds;
				op0Kind = mvexOpKinds[(int)(encFlags1 & EncFlags1.XOP_Op3Shift)];
				op1Kind = mvexOpKinds[(int)(((uint)encFlags1 >> 4) & 0xF)];
				op2Kind = mvexOpKinds[(int)(((uint)encFlags1 >> 8) & 0xF)];
				op3Kind = mvexOpKinds[(int)(((uint)encFlags1 >> 12) & 0xF)];
				table = (MvexOpCodeTable)(((uint)encFlags2 >> 17) & 7) switch
				{
					MvexOpCodeTable.MAP0F => 1, 
					MvexOpCodeTable.MAP0F38 => 2, 
					MvexOpCodeTable.MAP0F3A => 3, 
					_ => throw new InvalidOperationException(), 
				};
				break;
			}
			default:
				throw new InvalidOperationException();
			}
			toOpCodeStringValue = text ?? new OpCodeFormatter(this, sb, lkind, (opcFlags1 & OpCodeInfoFlags1.ModRegRmString) != 0).Format();
			InstrStrFmtOption fmtOption = (InstrStrFmtOption)((int)((uint)opcFlags2 >> 29) & 7);
			toInstructionStringValue = text2 ?? new InstructionFormatter(this, fmtOption, sb).Format();
		}

		public OpCodeOperandKind GetOpKind(int operand)
		{
			return operand switch
			{
				0 => Op0Kind, 
				1 => Op1Kind, 
				2 => Op2Kind, 
				3 => Op3Kind, 
				4 => Op4Kind, 
				_ => throw new ArgumentOutOfRangeException("operand"), 
			};
		}

		public bool IsAvailableInMode(int bitness)
		{
			return bitness switch
			{
				16 => Mode16, 
				32 => Mode32, 
				64 => Mode64, 
				_ => throw new ArgumentOutOfRangeException("bitness"), 
			};
		}

		public string ToOpCodeString()
		{
			return toOpCodeStringValue;
		}

		public string ToInstructionString()
		{
			return toInstructionStringValue;
		}

		public override string ToString()
		{
			return ToInstructionString();
		}
	}
	public enum OpCodeOperandKind
	{
		None,
		farbr2_2,
		farbr4_2,
		mem_offs,
		mem,
		mem_mpx,
		mem_mib,
		mem_vsib32x,
		mem_vsib64x,
		mem_vsib32y,
		mem_vsib64y,
		mem_vsib32z,
		mem_vsib64z,
		r8_or_mem,
		r16_or_mem,
		r32_or_mem,
		r32_or_mem_mpx,
		r64_or_mem,
		r64_or_mem_mpx,
		mm_or_mem,
		xmm_or_mem,
		ymm_or_mem,
		zmm_or_mem,
		bnd_or_mem_mpx,
		k_or_mem,
		r8_reg,
		r8_opcode,
		r16_reg,
		r16_reg_mem,
		r16_rm,
		r16_opcode,
		r32_reg,
		r32_reg_mem,
		r32_rm,
		r32_opcode,
		r32_vvvv,
		r64_reg,
		r64_reg_mem,
		r64_rm,
		r64_opcode,
		r64_vvvv,
		seg_reg,
		k_reg,
		kp1_reg,
		k_rm,
		k_vvvv,
		mm_reg,
		mm_rm,
		xmm_reg,
		xmm_rm,
		xmm_vvvv,
		xmmp3_vvvv,
		xmm_is4,
		xmm_is5,
		ymm_reg,
		ymm_rm,
		ymm_vvvv,
		ymm_is4,
		ymm_is5,
		zmm_reg,
		zmm_rm,
		zmm_vvvv,
		zmmp3_vvvv,
		cr_reg,
		dr_reg,
		tr_reg,
		bnd_reg,
		es,
		cs,
		ss,
		ds,
		fs,
		gs,
		al,
		cl,
		ax,
		dx,
		eax,
		rax,
		st0,
		sti_opcode,
		imm4_m2z,
		imm8,
		imm8_const_1,
		imm8sex16,
		imm8sex32,
		imm8sex64,
		imm16,
		imm32,
		imm32sex64,
		imm64,
		seg_rSI,
		es_rDI,
		seg_rDI,
		seg_rBX_al,
		br16_1,
		br32_1,
		br64_1,
		br16_2,
		br32_4,
		br64_4,
		xbegin_2,
		xbegin_4,
		brdisp_2,
		brdisp_4,
		sibmem,
		tmm_reg,
		tmm_rm,
		tmm_vvvv
	}
	public enum OpCodeTableKind
	{
		Normal,
		T0F,
		T0F38,
		T0F3A,
		MAP5,
		MAP6,
		MAP8,
		MAP9,
		MAP10
	}
	public enum OpKind
	{
		Register,
		NearBranch16,
		NearBranch32,
		NearBranch64,
		FarBranch16,
		FarBranch32,
		Immediate8,
		Immediate8_2nd,
		Immediate16,
		Immediate32,
		Immediate64,
		Immediate8to16,
		Immediate8to32,
		Immediate8to64,
		Immediate32to64,
		MemorySegSI,
		MemorySegESI,
		MemorySegRSI,
		MemorySegDI,
		MemorySegEDI,
		MemorySegRDI,
		MemoryESDI,
		MemoryESEDI,
		MemoryESRDI,
		Memory
	}
	public enum Register
	{
		None,
		AL,
		CL,
		DL,
		BL,
		AH,
		CH,
		DH,
		BH,
		SPL,
		BPL,
		SIL,
		DIL,
		R8L,
		R9L,
		R10L,
		R11L,
		R12L,
		R13L,
		R14L,
		R15L,
		AX,
		CX,
		DX,
		BX,
		SP,
		BP,
		SI,
		DI,
		R8W,
		R9W,
		R10W,
		R11W,
		R12W,
		R13W,
		R14W,
		R15W,
		EAX,
		ECX,
		EDX,
		EBX,
		ESP,
		EBP,
		ESI,
		EDI,
		R8D,
		R9D,
		R10D,
		R11D,
		R12D,
		R13D,
		R14D,
		R15D,
		RAX,
		RCX,
		RDX,
		RBX,
		RSP,
		RBP,
		RSI,
		RDI,
		R8,
		R9,
		R10,
		R11,
		R12,
		R13,
		R14,
		R15,
		EIP,
		RIP,
		ES,
		CS,
		SS,
		DS,
		FS,
		GS,
		XMM0,
		XMM1,
		XMM2,
		XMM3,
		XMM4,
		XMM5,
		XMM6,
		XMM7,
		XMM8,
		XMM9,
		XMM10,
		XMM11,
		XMM12,
		XMM13,
		XMM14,
		XMM15,
		XMM16,
		XMM17,
		XMM18,
		XMM19,
		XMM20,
		XMM21,
		XMM22,
		XMM23,
		XMM24,
		XMM25,
		XMM26,
		XMM27,
		XMM28,
		XMM29,
		XMM30,
		XMM31,
		YMM0,
		YMM1,
		YMM2,
		YMM3,
		YMM4,
		YMM5,
		YMM6,
		YMM7,
		YMM8,
		YMM9,
		YMM10,
		YMM11,
		YMM12,
		YMM13,
		YMM14,
		YMM15,
		YMM16,
		YMM17,
		YMM18,
		YMM19,
		YMM20,
		YMM21,
		YMM22,
		YMM23,
		YMM24,
		YMM25,
		YMM26,
		YMM27,
		YMM28,
		YMM29,
		YMM30,
		YMM31,
		ZMM0,
		ZMM1,
		ZMM2,
		ZMM3,
		ZMM4,
		ZMM5,
		ZMM6,
		ZMM7,
		ZMM8,
		ZMM9,
		ZMM10,
		ZMM11,
		ZMM12,
		ZMM13,
		ZMM14,
		ZMM15,
		ZMM16,
		ZMM17,
		ZMM18,
		ZMM19,
		ZMM20,
		ZMM21,
		ZMM22,
		ZMM23,
		ZMM24,
		ZMM25,
		ZMM26,
		ZMM27,
		ZMM28,
		ZMM29,
		ZMM30,
		ZMM31,
		K0,
		K1,
		K2,
		K3,
		K4,
		K5,
		K6,
		K7,
		BND0,
		BND1,
		BND2,
		BND3,
		CR0,
		CR1,
		CR2,
		CR3,
		CR4,
		CR5,
		CR6,
		CR7,
		CR8,
		CR9,
		CR10,
		CR11,
		CR12,
		CR13,
		CR14,
		CR15,
		DR0,
		DR1,
		DR2,
		DR3,
		DR4,
		DR5,
		DR6,
		DR7,
		DR8,
		DR9,
		DR10,
		DR11,
		DR12,
		DR13,
		DR14,
		DR15,
		ST0,
		ST1,
		ST2,
		ST3,
		ST4,
		ST5,
		ST6,
		ST7,
		MM0,
		MM1,
		MM2,
		MM3,
		MM4,
		MM5,
		MM6,
		MM7,
		TR0,
		TR1,
		TR2,
		TR3,
		TR4,
		TR5,
		TR6,
		TR7,
		TMM0,
		TMM1,
		TMM2,
		TMM3,
		TMM4,
		TMM5,
		TMM6,
		TMM7,
		[Obsolete("Not part of the public API", false)]
		[EditorBrowsable(EditorBrowsableState.Never)]
		DontUse0,
		[Obsolete("Not part of the public API", false)]
		[EditorBrowsable(EditorBrowsableState.Never)]
		DontUseFA,
		[Obsolete("Not part of the public API", false)]
		[EditorBrowsable(EditorBrowsableState.Never)]
		DontUseFB,
		[Obsolete("Not part of the public API", false)]
		[EditorBrowsable(EditorBrowsableState.Never)]
		DontUseFC,
		[Obsolete("Not part of the public API", false)]
		[EditorBrowsable(EditorBrowsableState.Never)]
		DontUseFD,
		[Obsolete("Not part of the public API", false)]
		[EditorBrowsable(EditorBrowsableState.Never)]
		DontUseFE,
		[Obsolete("Not part of the public API", false)]
		[EditorBrowsable(EditorBrowsableState.Never)]
		DontUseFF
	}
	public static class RegisterExtensions
	{
		internal static readonly RegisterInfo[] RegisterInfos = GetRegisterInfos();

		private static RegisterInfo[] GetRegisterInfos()
		{
			RegisterInfo[] array = new RegisterInfo[256];
			array[69] = new RegisterInfo(Register.EIP, Register.EIP, Register.RIP, 4);
			array[70] = new RegisterInfo(Register.RIP, Register.EIP, Register.RIP, 8);
			ReadOnlySpan<byte> readOnlySpan = new byte[90]
			{
				1, 20, 53, 1, 0, 21, 36, 53, 2, 0,
				37, 52, 53, 4, 0, 53, 68, 53, 8, 0,
				71, 76, 71, 2, 0, 77, 108, 141, 16, 0,
				109, 140, 141, 32, 0, 141, 172, 141, 64, 0,
				173, 180, 173, 8, 0, 181, 184, 181, 16, 0,
				185, 200, 185, 8, 0, 201, 216, 201, 8, 0,
				217, 224, 217, 10, 0, 225, 232, 225, 8, 0,
				233, 240, 233, 4, 0, 241, 248, 241, 0, 4,
				249, 249, 249, 0, 0, 250, 255, 250, 0, 0
			};
			int i;
			for (i = 0; i < readOnlySpan.Length; i += 5)
			{
				Register register = (Register)readOnlySpan[i];
				Register register2 = register;
				Register register3 = (Register)readOnlySpan[i + 1];
				Register register4 = (Register)readOnlySpan[i + 2];
				int size = readOnlySpan[i + 3] | (readOnlySpan[i + 4] << 8);
				while (register2 <= register3)
				{
					array[(int)register2] = new RegisterInfo(register2, register, register4, size);
					register2++;
					register4++;
					if (register2 == Register.AH)
					{
						register4 -= 4;
					}
				}
			}
			if (i != readOnlySpan.Length)
			{
				throw new InvalidOperationException();
			}
			return array;
		}

		public static RegisterInfo GetInfo(this Register register)
		{
			RegisterInfo[] registerInfos = RegisterInfos;
			if ((uint)register >= (uint)registerInfos.Length)
			{
				ThrowHelper.ThrowArgumentOutOfRangeException_register();
			}
			return registerInfos[(int)register];
		}

		public static Register GetBaseRegister(this Register register)
		{
			return register.GetInfo().Base;
		}

		public static int GetNumber(this Register register)
		{
			return register.GetInfo().Number;
		}

		public static Register GetFullRegister(this Register register)
		{
			return register.GetInfo().FullRegister;
		}

		public static Register GetFullRegister32(this Register register)
		{
			return register.GetInfo().FullRegister32;
		}

		public static int GetSize(this Register register)
		{
			return register.GetInfo().Size;
		}

		public static bool IsSegmentRegister(this Register register)
		{
			if (Register.ES <= register)
			{
				return register <= Register.GS;
			}
			return false;
		}

		public static bool IsGPR(this Register register)
		{
			if (Register.AL <= register)
			{
				return register <= Register.R15;
			}
			return false;
		}

		public static bool IsGPR8(this Register register)
		{
			if (Register.AL <= register)
			{
				return register <= Register.R15L;
			}
			return false;
		}

		public static bool IsGPR16(this Register register)
		{
			if (Register.AX <= register)
			{
				return register <= Register.R15W;
			}
			return false;
		}

		public static bool IsGPR32(this Register register)
		{
			if (Register.EAX <= register)
			{
				return register <= Register.R15D;
			}
			return false;
		}

		public static bool IsGPR64(this Register register)
		{
			if (Register.RAX <= register)
			{
				return register <= Register.R15;
			}
			return false;
		}

		public static bool IsXMM(this Register register)
		{
			if (Register.XMM0 <= register)
			{
				return register <= Register.XMM31;
			}
			return false;
		}

		public static bool IsYMM(this Register register)
		{
			if (Register.YMM0 <= register)
			{
				return register <= Register.YMM31;
			}
			return false;
		}

		public static bool IsZMM(this Register register)
		{
			if (Register.ZMM0 <= register)
			{
				return register <= Register.ZMM31;
			}
			return false;
		}

		public static bool IsIP(this Register register)
		{
			if (register != Register.EIP)
			{
				return register == Register.RIP;
			}
			return true;
		}

		public static bool IsK(this Register register)
		{
			if (Register.K0 <= register)
			{
				return register <= Register.K7;
			}
			return false;
		}

		public static bool IsCR(this Register register)
		{
			if (Register.CR0 <= register)
			{
				return register <= Register.CR15;
			}
			return false;
		}

		public static bool IsDR(this Register register)
		{
			if (Register.DR0 <= register)
			{
				return register <= Register.DR15;
			}
			return false;
		}

		public static bool IsTR(this Register register)
		{
			if (Register.TR0 <= register)
			{
				return register <= Register.TR7;
			}
			return false;
		}

		public static bool IsST(this Register register)
		{
			if (Register.ST0 <= register)
			{
				return register <= Register.ST7;
			}
			return false;
		}

		public static bool IsBND(this Register register)
		{
			if (Register.BND0 <= register)
			{
				return register <= Register.BND3;
			}
			return false;
		}

		public static bool IsMM(this Register register)
		{
			if (Register.MM0 <= register)
			{
				return register <= Register.MM7;
			}
			return false;
		}

		public static bool IsTMM(this Register register)
		{
			if (Register.TMM0 <= register)
			{
				return register <= Register.TMM7;
			}
			return false;
		}

		public static bool IsVectorRegister(this Register register)
		{
			if (Register.XMM0 <= register)
			{
				return register <= Register.ZMM31;
			}
			return false;
		}
	}
	public readonly struct RegisterInfo
	{
		private readonly byte register;

		private readonly byte baseRegister;

		private readonly byte fullRegister;

		private readonly ushort size;

		private readonly byte pad1;

		private readonly byte pad2;

		private readonly byte pad3;

		public Register Register => (Register)register;

		public Register Base => (Register)baseRegister;

		public int Number => register - baseRegister;

		public Register FullRegister => (Register)fullRegister;

		public Register FullRegister32
		{
			get
			{
				Register register = (Register)fullRegister;
				if (register.IsGPR())
				{
					return register - 53 + 37;
				}
				return register;
			}
		}

		public int Size => size;

		public RegisterInfo(Register register, Register baseRegister, Register fullRegister, int size)
		{
			this.register = (byte)register;
			this.baseRegister = (byte)baseRegister;
			this.fullRegister = (byte)fullRegister;
			this.size = (ushort)size;
			pad1 = 0;
			pad2 = 0;
			pad3 = 0;
		}
	}
	[Flags]
	public enum RflagsBits
	{
		None = 0,
		OF = 1,
		SF = 2,
		ZF = 4,
		AF = 8,
		CF = 0x10,
		PF = 0x20,
		DF = 0x40,
		IF = 0x80,
		AC = 0x100,
		UIF = 0x200,
		C0 = 0x400,
		C1 = 0x800,
		C2 = 0x1000,
		C3 = 0x2000
	}
	public enum RoundingControl
	{
		None,
		RoundToNearest,
		RoundDown,
		RoundUp,
		RoundTowardZero
	}
	internal static class Static
	{
		[Conditional("E3967789CA584C48B3D02600CAB3C7B2")]
		public static void Assert(byte ignored)
		{
		}
	}
	public sealed class StreamCodeReader : CodeReader
	{
		public readonly Stream Stream;

		public StreamCodeReader(Stream stream)
		{
			Stream = stream;
		}

		public override int ReadByte()
		{
			return Stream.ReadByte();
		}
	}
	public sealed class StreamCodeWriter : CodeWriter
	{
		public readonly Stream Stream;

		public StreamCodeWriter(Stream stream)
		{
			Stream = stream;
		}

		public override void WriteByte(byte value)
		{
			Stream.WriteByte(value);
		}
	}
	public sealed class StringOutput : FormatterOutput
	{
		private readonly StringBuilder sb;

		public StringOutput()
		{
			sb = new StringBuilder();
		}

		public StringOutput(StringBuilder sb)
		{
			if (sb == null)
			{
				ThrowHelper.ThrowArgumentNullException_sb();
			}
			this.sb = sb;
		}

		public override void Write(string text, FormatterTextKind kind)
		{
			sb.Append(text);
		}

		public void Reset()
		{
			sb.Length = 0;
		}

		public string ToStringAndReset()
		{
			string result = ToString();
			Reset();
			return result;
		}

		public override string ToString()
		{
			return sb.ToString();
		}
	}
	internal static class ThrowHelper
	{
		[DoesNotReturn]
		internal static void ThrowArgumentException()
		{
			throw new ArgumentException();
		}

		[DoesNotReturn]
		internal static void ThrowInvalidOperationException()
		{
			throw new InvalidOperationException();
		}

		[DoesNotReturn]
		internal static void ThrowArgumentNullException_codeWriter()
		{
			throw new ArgumentNullException("codeWriter");
		}

		[DoesNotReturn]
		internal static void ThrowArgumentNullException_data()
		{
			throw new ArgumentNullException("data");
		}

		[DoesNotReturn]
		internal static void ThrowArgumentNullException_writer()
		{
			throw new ArgumentNullException("writer");
		}

		[DoesNotReturn]
		internal static void ThrowArgumentNullException_options()
		{
			throw new ArgumentNullException("options");
		}

		[DoesNotReturn]
		internal static void ThrowArgumentNullException_value()
		{
			throw new ArgumentNullException("value");
		}

		[DoesNotReturn]
		internal static void ThrowArgumentNullException_list()
		{
			throw new ArgumentNullException("list");
		}

		[DoesNotReturn]
		internal static void ThrowArgumentNullException_collection()
		{
			throw new ArgumentNullException("collection");
		}

		[DoesNotReturn]
		internal static void ThrowArgumentNullException_array()
		{
			throw new ArgumentNullException("array");
		}

		[DoesNotReturn]
		internal static void ThrowArgumentNullException_sb()
		{
			throw new ArgumentNullException("sb");
		}

		[DoesNotReturn]
		internal static void ThrowArgumentNullException_output()
		{
			throw new ArgumentNullException("output");
		}

		[DoesNotReturn]
		internal static void ThrowArgumentOutOfRangeException_value()
		{
			throw new ArgumentOutOfRangeException("value");
		}

		[DoesNotReturn]
		internal static void ThrowArgumentOutOfRangeException_index()
		{
			throw new ArgumentOutOfRangeException("index");
		}

		[DoesNotReturn]
		internal static void ThrowArgumentOutOfRangeException_count()
		{
			throw new ArgumentOutOfRangeException("count");
		}

		[DoesNotReturn]
		internal static void ThrowArgumentOutOfRangeException_length()
		{
			throw new ArgumentOutOfRangeException("length");
		}

		[DoesNotReturn]
		internal static void ThrowArgumentOutOfRangeException_operand()
		{
			throw new ArgumentOutOfRangeException("operand");
		}

		[DoesNotReturn]
		internal static void ThrowArgumentOutOfRangeException_instructionOperand()
		{
			throw new ArgumentOutOfRangeException("instructionOperand");
		}

		[DoesNotReturn]
		internal static void ThrowArgumentOutOfRangeException_capacity()
		{
			throw new ArgumentOutOfRangeException("capacity");
		}

		[DoesNotReturn]
		internal static void ThrowArgumentOutOfRangeException_memorySize()
		{
			throw new ArgumentOutOfRangeException("memorySize");
		}

		[DoesNotReturn]
		internal static void ThrowArgumentOutOfRangeException_size()
		{
			throw new ArgumentOutOfRangeException("size");
		}

		[DoesNotReturn]
		internal static void ThrowArgumentOutOfRangeException_elementSize()
		{
			throw new ArgumentOutOfRangeException("elementSize");
		}

		[DoesNotReturn]
		internal static void ThrowArgumentOutOfRangeException_register()
		{
			throw new ArgumentOutOfRangeException("register");
		}

		[DoesNotReturn]
		internal static void ThrowArgumentOutOfRangeException_code()
		{
			throw new ArgumentOutOfRangeException("code");
		}

		[DoesNotReturn]
		internal static void ThrowArgumentOutOfRangeException_data()
		{
			throw new ArgumentOutOfRangeException("data");
		}
	}
	public enum TupleType
	{
		N1,
		N2,
		N4,
		N8,
		N16,
		N32,
		N64,
		N8b4,
		N16b4,
		N32b4,
		N64b4,
		N16b8,
		N32b8,
		N64b8,
		N4b2,
		N8b2,
		N16b2,
		N32b2,
		N64b2
	}
	internal static class TupleTypeTable
	{
		private static ReadOnlySpan<byte> tupleTypeData => new byte[38]
		{
			1, 1, 2, 2, 4, 4, 8, 8, 16, 16,
			32, 32, 64, 64, 8, 4, 16, 4, 32, 4,
			64, 4, 16, 8, 32, 8, 64, 8, 4, 2,
			8, 2, 16, 2, 32, 2, 64, 2
		};

		[MethodImpl(MethodImplOptions.AggressiveInlining)]
		public static uint GetDisp8N(TupleType tupleType, bool bcst)
		{
			int index = ((int)tupleType << 1) | (bcst ? 1 : 0);
			return tupleTypeData[index];
		}
	}
	public readonly struct UsedMemory
	{
		private readonly ulong displ;

		private readonly byte segReg;

		private readonly byte baseReg;

		private readonly byte indexReg;

		private readonly byte memorySize;

		private readonly byte scale;

		private readonly byte access;

		private readonly byte addressSize;

		private readonly byte vsibSize;

		public Register Segment => (Register)segReg;

		public Register Base => (Register)baseReg;

		public Register Index => (Register)indexReg;

		public int Scale => scale;

		public ulong Displacement => displ;

		public MemorySize MemorySize => (MemorySize)memorySize;

		public OpAccess Access => (OpAccess)access;

		public CodeSize AddressSize => (CodeSize)addressSize;

		public int VsibSize => vsibSize;

		public UsedMemory(Register segReg, Register baseReg, Register indexReg, int scale, long displ, MemorySize memorySize, OpAccess access)
		{
			this.displ = (ulong)displ;
			this.segReg = (byte)segReg;
			this.baseReg = (byte)baseReg;
			this.indexReg = (byte)indexReg;
			this.memorySize = (byte)memorySize;
			this.scale = (byte)scale;
			this.access = (byte)access;
			addressSize = 0;
			vsibSize = 0;
		}

		public UsedMemory(Register segReg, Register baseReg, Register indexReg, int scale, ulong displ, MemorySize memorySize, OpAccess access)
		{
			this.displ = displ;
			this.segReg = (byte)segReg;
			this.baseReg = (byte)baseReg;
			this.indexReg = (byte)indexReg;
			this.memorySize = (byte)memorySize;
			this.scale = (byte)scale;
			this.access = (byte)access;
			addressSize = 0;
			vsibSize = 0;
		}

		public UsedMemory(Register segReg, Register baseReg, Register indexReg, int scale, long displ, MemorySize memorySize, OpAccess access, CodeSize addressSize, int vsibSize)
		{
			this.displ = (ulong)displ;
			this.segReg = (byte)segReg;
			this.baseReg = (byte)baseReg;
			this.indexReg = (byte)indexReg;
			this.memorySize = (byte)memorySize;
			this.scale = (byte)scale;
			this.access = (byte)access;
			this.addressSize = (byte)addressSize;
			this.vsibSize = (byte)vsibSize;
		}

		public UsedMemory(Register segReg, Register baseReg, Register indexReg, int scale, ulong displ, MemorySize memorySize, OpAccess access, CodeSize addressSize, int vsibSize)
		{
			this.displ = displ;
			this.segReg = (byte)segReg;
			this.baseReg = (byte)baseReg;
			this.indexReg = (byte)indexReg;
			this.memorySize = (byte)memorySize;
			this.scale = (byte)scale;
			this.access = (byte)access;
			this.addressSize = (byte)addressSize;
			this.vsibSize = (byte)vsibSize;
		}

		public ulong GetVirtualAddress(int elementIndex, VAGetRegisterValue getRegisterValue)
		{
			if (getRegisterValue == null)
			{
				throw new ArgumentNullException("getRegisterValue");
			}
			VARegisterValueProviderDelegateImpl registerValueProvider = new VARegisterValueProviderDelegateImpl(getRegisterValue);
			if (TryGetVirtualAddress(elementIndex, registerValueProvider, out var result))
			{
				return result;
			}
			return 0uL;
		}

		public ulong GetVirtualAddress(int elementIndex, IVARegisterValueProvider registerValueProvider)
		{
			if (registerValueProvider == null)
			{
				throw new ArgumentNullException("registerValueProvider");
			}
			VARegisterValueProviderAdapter registerValueProvider2 = new VARegisterValueProviderAdapter(registerValueProvider);
			if (TryGetVirtualAddress(elementIndex, registerValueProvider2, out var result))
			{
				return result;
			}
			return 0uL;
		}

		public bool TryGetVirtualAddress(int elementIndex, out ulong result, VATryGetRegisterValue getRegisterValue)
		{
			if (getRegisterValue == null)
			{
				throw new ArgumentNullException("getRegisterValue");
			}
			VATryGetRegisterValueDelegateImpl registerValueProvider = new VATryGetRegisterValueDelegateImpl(getRegisterValue);
			return TryGetVirtualAddress(elementIndex, registerValueProvider, out result);
		}

		public bool TryGetVirtualAddress(int elementIndex, IVATryGetRegisterValueProvider registerValueProvider, out ulong result)
		{
			if (registerValueProvider == null)
			{
				throw new ArgumentNullException("registerValueProvider");
			}
			result = 0uL;
			ulong num = Displacement;
			Register @base = Base;
			ulong value;
			if (@base != 0)
			{
				if (!registerValueProvider.TryGetRegisterValue(@base, 0, 0, out value))
				{
					return false;
				}
				num += value;
			}
			@base = Index;
			if (@base != 0)
			{
				if (!registerValueProvider.TryGetRegisterValue(@base, elementIndex, vsibSize, out value))
				{
					return false;
				}
				if (vsibSize == 4)
				{
					value = (ulong)(int)value;
				}
				num += value * (uint)Scale;
			}
			switch (AddressSize)
			{
			case CodeSize.Code16:
				num = (ushort)num;
				break;
			case CodeSize.Code32:
				num = (uint)num;
				break;
			}
			@base = Segment;
			if (@base != 0)
			{
				if (!registerValueProvider.TryGetRegisterValue(@base, 0, 0, out value))
				{
					return false;
				}
				num += value;
			}
			result = num;
			return true;
		}

		public override string ToString()
		{
			StringBuilder stringBuilder = new StringBuilder();
			stringBuilder.Append('[');
			stringBuilder.Append(Segment.ToString());
			stringBuilder.Append(':');
			bool flag = false;
			if (Base != 0)
			{
				stringBuilder.Append(Base.ToString());
				flag = true;
			}
			if (Index != 0)
			{
				if (flag)
				{
					stringBuilder.Append('+');
				}
				flag = true;
				stringBuilder.Append(Index.ToString());
				if (Scale != 1)
				{
					stringBuilder.Append('*');
					stringBuilder.Append((char)(48 + Scale));
				}
			}
			if (Displacement != 0L || !flag)
			{
				if (flag)
				{
					stringBuilder.Append('+');
				}
				if (Displacement <= 9)
				{
					stringBuilder.Append(Displacement);
				}
				else
				{
					stringBuilder.Append("0x");
					stringBuilder.Append(Displacement.ToString("X"));
				}
			}
			stringBuilder.Append(';');
			stringBuilder.Append(MemorySize.ToString());
			stringBuilder.Append(';');
			stringBuilder.Append(Access.ToString());
			stringBuilder.Append(']');
			return stringBuilder.ToString();
		}
	}
	public readonly struct UsedRegister
	{
		private readonly Register register;

		private readonly OpAccess access;

		public Register Register => register;

		public OpAccess Access => access;

		public UsedRegister(Register register, OpAccess access)
		{
			this.register = register;
			this.access = access;
		}

		public override string ToString()
		{
			return Register.ToString() + ":" + Access;
		}
	}
	internal enum VectorLength
	{
		L128,
		L256,
		L512,
		Unknown
	}
}
namespace Iced.Intel.NasmFormatterInternal
{
	internal enum BranchSizeInfo
	{
		None,
		Near,
		NearWord,
		NearDword,
		Word,
		Dword,
		Short
	}
	internal enum CtorKind
	{
		Previous,
		Normal_1,
		Normal_2,
		AamAad,
		asz,
		String,
		STIG2_2b,
		bcst,
		bnd,
		SignExt_4,
		DeclareData,
		XLAT,
		er_2,
		er_3,
		far,
		far_mem,
		invlpga,
		maskmovq,
		SignExt_3,
		STIG1,
		STIG2_2a,
		movabs,
		sae,
		nop,
		OpSize,
		OpSize2_bnd,
		OpSize3,
		os_2,
		os_3,
		os_call,
		push_imm,
		CC_1,
		CC_2,
		CC_3,
		os_jcc_a_1,
		os_jcc_a_2,
		os_jcc_a_3,
		os_jcc_b_1,
		os_jcc_b_2,
		os_jcc_b_3,
		os_loopcc,
		os_loop,
		os_mem,
		os_mem_reg16,
		os_mem2,
		pblendvb,
		push_imm8,
		pclmulqdq,
		pops,
		imul,
		Reg16,
		Reg32,
		reverse
	}
	internal enum InstrOpKind : byte
	{
		Register,
		NearBranch16,
		NearBranch32,
		NearBranch64,
		FarBranch16,
		FarBranch32,
		Immediate8,
		Immediate8_2nd,
		Immediate16,
		Immediate32,
		Immediate64,
		Immediate8to16,
		Immediate8to32,
		Immediate8to64,
		Immediate32to64,
		MemorySegSI,
		MemorySegESI,
		MemorySegRSI,
		MemorySegDI,
		MemorySegEDI,
		MemorySegRDI,
		MemoryESDI,
		MemoryESEDI,
		MemoryESRDI,
		Memory,
		Sae,
		RnSae,
		RdSae,
		RuSae,
		RzSae,
		Rn,
		Rd,
		Ru,
		Rz,
		DeclareByte,
		DeclareWord,
		DeclareDword,
		DeclareQword
	}
	internal enum MemorySizeInfo
	{
		None,
		Word,
		Dword,
		Qword
	}
	internal enum FarMemorySizeInfo
	{
		None,
		Word,
		Dword
	}
	internal struct InstrOpInfo
	{
		internal const int TEST_RegisterBits = 8;

		public FormatterString Mnemonic;

		public InstrOpInfoFlags Flags;

		public byte OpCount;

		public InstrOpKind Op0Kind;

		public InstrOpKind Op1Kind;

		public InstrOpKind Op2Kind;

		public InstrOpKind Op3Kind;

		public InstrOpKind Op4Kind;

		public byte Op0Register;

		public byte Op1Register;

		public byte Op2Register;

		public byte Op3Register;

		public byte Op4Register;

		public sbyte Op0Index;

		public sbyte Op1Index;

		public sbyte Op2Index;

		public sbyte Op3Index;

		public sbyte Op4Index;

		public MemorySize MemorySize
		{
			readonly get
			{
				return (MemorySize)((int)((uint)Flags >> 22) & 0xFF);
			}
			set
			{
				Flags = (InstrOpInfoFlags)((uint)(Flags & (InstrOpInfoFlags)3225419775u) | (uint)((int)(value & (MemorySize)255) << 22));
			}
		}

		public readonly Register GetOpRegister(int operand)
		{
			return operand switch
			{
				0 => (Register)Op0Register, 
				1 => (Register)Op1Register, 
				2 => (Register)Op2Register, 
				3 => (Register)Op3Register, 
				4 => (Register)Op4Register, 
				_ => throw new ArgumentOutOfRangeException("operand"), 
			};
		}

		public readonly InstrOpKind GetOpKind(int operand)
		{
			return operand switch
			{
				0 => Op0Kind, 
				1 => Op1Kind, 
				2 => Op2Kind, 
				3 => Op3Kind, 
				4 => Op4Kind, 
				_ => Op0Kind, 
			};
		}

		public readonly int GetInstructionIndex(int operand)
		{
			int num = operand switch
			{
				0 => Op0Index, 
				1 => Op1Index, 
				2 => Op2Index, 
				3 => Op3Index, 
				4 => Op4Index, 
				_ => -1, 
			};
			if (num >= 0)
			{
				return num;
			}
			return -1;
		}

		public readonly bool TryGetOpAccess(int operand, out OpAccess access)
		{
			int num = operand switch
			{
				0 => Op0Index, 
				1 => Op1Index, 
				2 => Op2Index, 
				3 => Op3Index, 
				4 => Op4Index, 
				_ => Op0Index, 
			};
			if (num < -1)
			{
				access = (OpAccess)(-num - 2);
				return true;
			}
			access = OpAccess.None;
			return false;
		}

		public readonly int GetOperandIndex(int instructionOperand)
		{
			int num = ((instructionOperand != Op0Index) ? ((instructionOperand == Op1Index) ? 1 : ((instructionOperand == Op2Index) ? 2 : ((instructionOperand == Op3Index) ? 3 : ((instructionOperand != Op4Index) ? (-1) : 4)))) : 0);
			if (num >= OpCount)
			{
				return -1;
			}
			return num;
		}

		public InstrOpInfo(FormatterString mnemonic, in Instruction instruction, InstrOpInfoFlags flags)
		{
			Mnemonic = mnemonic;
			Flags = (InstrOpInfoFlags)((uint)flags | (uint)((int)instruction.MemorySize << 22));
			Op0Kind = (InstrOpKind)instruction.Op0Kind;
			Op1Kind = (InstrOpKind)instruction.Op1Kind;
			Op2Kind = (InstrOpKind)instruction.Op2Kind;
			Op3Kind = (InstrOpKind)instruction.Op3Kind;
			Op4Kind = (InstrOpKind)instruction.Op4Kind;
			Op0Register = (byte)instruction.Op0Register;
			Op1Register = (byte)instruction.Op1Register;
			Op2Register = (byte)instruction.Op2Register;
			Op3Register = (byte)instruction.Op3Register;
			Op4Register = (byte)instruction.Op4Register;
			int opCount = instruction.OpCount;
			OpCount = (byte)opCount;
			switch (opCount)
			{
			case 0:
				Op0Index = -1;
				Op1Index = -1;
				Op2Index = -1;
				Op3Index = -1;
				Op4Index = -1;
				break;
			case 1:
				Op0Index = 0;
				Op1Index = -1;
				Op2Index = -1;
				Op3Index = -1;
				Op4Index = -1;
				break;
			case 2:
				Op0Index = 0;
				Op1Index = 1;
				Op2Index = -1;
				Op3Index = -1;
				Op4Index = -1;
				break;
			case 3:
				Op0Index = 0;
				Op1Index = 1;
				Op2Index = 2;
				Op3Index = -1;
				Op4Index = -1;
				break;
			case 4:
				Op0Index = 0;
				Op1Index = 1;
				Op2Index = 2;
				Op3Index = 3;
				Op4Index = -1;
				break;
			case 5:
				Op0Index = 0;
				Op1Index = 1;
				Op2Index = 2;
				Op3Index = 3;
				Op4Index = 4;
				break;
			default:
				throw new InvalidOperationException();
			}
		}
	}
	internal abstract class InstrInfo
	{
		public const int OpAccess_INVALID = -1;

		public const int OpAccess_None = -2;

		public const int OpAccess_Read = -3;

		public const int OpAccess_CondRead = -4;

		public const int OpAccess_Write = -5;

		public const int OpAccess_CondWrite = -6;

		public const int OpAccess_ReadWrite = -7;

		public const int OpAccess_ReadCondWrite = -8;

		public const int OpAccess_NoMemAccess = -9;

		public abstract void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info);

		protected static int GetBitness(CodeSize codeSize)
		{
			return codeSize switch
			{
				CodeSize.Code16 => 16, 
				CodeSize.Code32 => 32, 
				CodeSize.Code64 => 64, 
				_ => 0, 
			};
		}
	}
	internal sealed class SimpleInstrInfo : InstrInfo
	{
		private readonly FormatterString mnemonic;

		private readonly InstrOpInfoFlags flags;

		public SimpleInstrInfo(string mnemonic)
			: this(mnemonic, InstrOpInfoFlags.None)
		{
		}

		public SimpleInstrInfo(string mnemonic, InstrOpInfoFlags flags)
		{
			this.mnemonic = new FormatterString(mnemonic);
			this.flags = flags;
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			info = new InstrOpInfo(mnemonic, in instruction, flags);
		}
	}
	internal sealed class SimpleInstrInfo_cc : InstrInfo
	{
		private readonly int ccIndex;

		private readonly FormatterString[] mnemonics;

		public SimpleInstrInfo_cc(int ccIndex, string[] mnemonics)
		{
			this.ccIndex = ccIndex;
			this.mnemonics = FormatterString.Create(mnemonics);
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			FormatterString mnemonicCC = MnemonicCC.GetMnemonicCC(options, ccIndex, mnemonics);
			info = new InstrOpInfo(mnemonicCC, in instruction, InstrOpInfoFlags.None);
		}
	}
	internal sealed class SimpleInstrInfo_push_imm8 : InstrInfo
	{
		private readonly int bitness;

		private readonly SignExtendInfo sexInfo;

		private readonly FormatterString mnemonic;

		public SimpleInstrInfo_push_imm8(int bitness, SignExtendInfo sexInfo, string mnemonic)
		{
			this.bitness = bitness;
			this.sexInfo = sexInfo;
			this.mnemonic = new FormatterString(mnemonic);
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			InstrOpInfoFlags instrOpInfoFlags = (InstrOpInfoFlags)((int)sexInfo << 10);
			int num = InstrInfo.GetBitness(instruction.CodeSize);
			if (bitness != 0 && num != 0 && num != bitness)
			{
				instrOpInfoFlags = ((bitness == 16) ? (instrOpInfoFlags | InstrOpInfoFlags.OpSize16) : ((bitness != 32) ? (instrOpInfoFlags | InstrOpInfoFlags.OpSize64) : (instrOpInfoFlags | InstrOpInfoFlags.OpSize32)));
			}
			info = new InstrOpInfo(mnemonic, in instruction, instrOpInfoFlags);
		}
	}
	internal sealed class SimpleInstrInfo_push_imm : InstrInfo
	{
		private readonly int bitness;

		private readonly SignExtendInfo sexInfo;

		private readonly FormatterString mnemonic;

		public SimpleInstrInfo_push_imm(int bitness, SignExtendInfo sexInfo, string mnemonic)
		{
			this.bitness = bitness;
			this.sexInfo = sexInfo;
			this.mnemonic = new FormatterString(mnemonic);
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			InstrOpInfoFlags instrOpInfoFlags = InstrOpInfoFlags.None;
			bool flag = true;
			int num = InstrInfo.GetBitness(instruction.CodeSize);
			if (bitness != 0 && num != 0 && num != bitness)
			{
				if (num == 64)
				{
					instrOpInfoFlags |= InstrOpInfoFlags.OpSize16;
				}
			}
			else if (bitness == 16 && num == 16)
			{
				flag = false;
			}
			if (flag)
			{
				instrOpInfoFlags = (InstrOpInfoFlags)((uint)instrOpInfoFlags | (uint)((int)sexInfo << 10));
			}
			info = new InstrOpInfo(mnemonic, in instruction, instrOpInfoFlags);
		}
	}
	internal sealed class SimpleInstrInfo_SignExt : InstrInfo
	{
		private readonly SignExtendInfo sexInfoReg;

		private readonly SignExtendInfo sexInfoMem;

		private readonly FormatterString mnemonic;

		private readonly InstrOpInfoFlags flags;

		public SimpleInstrInfo_SignExt(SignExtendInfo sexInfo, string mnemonic, InstrOpInfoFlags flags)
			: this(sexInfo, sexInfo, mnemonic, flags)
		{
		}

		public SimpleInstrInfo_SignExt(SignExtendInfo sexInfoReg, SignExtendInfo sexInfoMem, string mnemonic, InstrOpInfoFlags flags)
		{
			this.sexInfoReg = sexInfoReg;
			this.sexInfoMem = sexInfoMem;
			this.mnemonic = new FormatterString(mnemonic);
			this.flags = flags;
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			SignExtendInfo signExtendInfo = ((instruction.Op0Kind == OpKind.Memory || instruction.Op1Kind == OpKind.Memory) ? sexInfoMem : sexInfoReg);
			InstrOpInfoFlags instrOpInfoFlags = flags;
			instrOpInfoFlags = (InstrOpInfoFlags)((uint)instrOpInfoFlags | (uint)((int)signExtendInfo << 10));
			info = new InstrOpInfo(mnemonic, in instruction, instrOpInfoFlags);
		}
	}
	internal sealed class SimpleInstrInfo_imul : InstrInfo
	{
		private readonly SignExtendInfo sexInfo;

		private readonly FormatterString mnemonic;

		public SimpleInstrInfo_imul(SignExtendInfo sexInfo, string mnemonic)
		{
			this.sexInfo = sexInfo;
			this.mnemonic = new FormatterString(mnemonic);
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			InstrOpInfoFlags flags = (InstrOpInfoFlags)((int)sexInfo << 10);
			info = new InstrOpInfo(mnemonic, in instruction, flags);
			if (options.UsePseudoOps && info.Op0Kind == InstrOpKind.Register && info.Op1Kind == InstrOpKind.Register && info.Op0Register == info.Op1Register)
			{
				info.OpCount--;
				info.Op0Index = -7;
				info.Op1Kind = info.Op2Kind;
				info.Op1Index = 2;
				info.Op2Index = -1;
			}
		}
	}
	internal sealed class SimpleInstrInfo_AamAad : InstrInfo
	{
		private readonly FormatterString mnemonic;

		public SimpleInstrInfo_AamAad(string mnemonic)
		{
			this.mnemonic = new FormatterString(mnemonic);
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			if (instruction.Immediate8 == 10)
			{
				info = default(InstrOpInfo);
				info.Mnemonic = mnemonic;
			}
			else
			{
				info = new InstrOpInfo(mnemonic, in instruction, InstrOpInfoFlags.None);
			}
		}
	}
	internal sealed class SimpleInstrInfo_String : InstrInfo
	{
		private readonly FormatterString mnemonic;

		public SimpleInstrInfo_String(string mnemonic)
		{
			this.mnemonic = new FormatterString(mnemonic);
		}

		private static InstrOpInfoFlags GetAddressSizeFlags(OpKind opKind)
		{
			switch (opKind)
			{
			case OpKind.MemorySegSI:
			case OpKind.MemorySegDI:
			case OpKind.MemoryESDI:
				return InstrOpInfoFlags.AddrSize16;
			case OpKind.MemorySegESI:
			case OpKind.MemorySegEDI:
			case OpKind.MemoryESEDI:
				return InstrOpInfoFlags.AddrSize32;
			case OpKind.MemorySegRSI:
			case OpKind.MemorySegRDI:
			case OpKind.MemoryESRDI:
				return InstrOpInfoFlags.AddrSize64;
			default:
				return InstrOpInfoFlags.None;
			}
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			InstrOpInfoFlags addressSizeFlags = GetAddressSizeFlags((instruction.Op0Kind != 0) ? instruction.Op0Kind : instruction.Op1Kind);
			InstrOpInfoFlags instrOpInfoFlags = instruction.CodeSize switch
			{
				CodeSize.Unknown => addressSizeFlags, 
				CodeSize.Code16 => InstrOpInfoFlags.AddrSize16, 
				CodeSize.Code32 => InstrOpInfoFlags.AddrSize32, 
				CodeSize.Code64 => InstrOpInfoFlags.AddrSize64, 
				_ => throw new InvalidOperationException(), 
			};
			InstrOpInfoFlags instrOpInfoFlags2 = InstrOpInfoFlags.None;
			if (addressSizeFlags != instrOpInfoFlags)
			{
				instrOpInfoFlags2 |= addressSizeFlags;
			}
			info = default(InstrOpInfo);
			info.Flags = instrOpInfoFlags2;
			info.Mnemonic = mnemonic;
		}
	}
	internal sealed class SimpleInstrInfo_XLAT : InstrInfo
	{
		private readonly FormatterString mnemonic;

		public SimpleInstrInfo_XLAT(string mnemonic)
		{
			this.mnemonic = new FormatterString(mnemonic);
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			Register register = instruction.CodeSize switch
			{
				CodeSize.Unknown => instruction.MemoryBase, 
				CodeSize.Code16 => Register.BX, 
				CodeSize.Code32 => Register.EBX, 
				CodeSize.Code64 => Register.RBX, 
				_ => throw new InvalidOperationException(), 
			};
			InstrOpInfoFlags instrOpInfoFlags = InstrOpInfoFlags.None;
			Register memoryBase = instruction.MemoryBase;
			if (memoryBase != register)
			{
				switch (memoryBase)
				{
				case Register.BX:
					instrOpInfoFlags |= InstrOpInfoFlags.AddrSize16;
					break;
				case Register.EBX:
					instrOpInfoFlags |= InstrOpInfoFlags.AddrSize32;
					break;
				case Register.RBX:
					instrOpInfoFlags |= InstrOpInfoFlags.AddrSize64;
					break;
				}
			}
			info = default(InstrOpInfo);
			info.Flags = instrOpInfoFlags;
			info.Mnemonic = mnemonic;
		}
	}
	internal sealed class SimpleInstrInfo_nop : InstrInfo
	{
		private readonly int bitness;

		private readonly FormatterString mnemonic;

		private readonly Register register;

		private static readonly FormatterString str_xchg = new FormatterString("xchg");

		public SimpleInstrInfo_nop(int bitness, string mnemonic, Register register)
		{
			this.bitness = bitness;
			this.mnemonic = new FormatterString(mnemonic);
			this.register = register;
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			int num = InstrInfo.GetBitness(instruction.CodeSize);
			if (num == 0 || (num & bitness) != 0)
			{
				info = new InstrOpInfo(mnemonic, in instruction, InstrOpInfoFlags.None);
				return;
			}
			info = default(InstrOpInfo);
			info.Mnemonic = str_xchg;
			info.OpCount = 2;
			info.Op0Register = (byte)register;
			info.Op1Register = (byte)register;
			info.Op0Index = -2;
			info.Op1Index = -2;
		}
	}
	internal sealed class SimpleInstrInfo_STIG1 : InstrInfo
	{
		private readonly FormatterString mnemonic;

		private readonly bool pseudoOp;

		public SimpleInstrInfo_STIG1(string mnemonic, bool pseudoOp)
		{
			this.mnemonic = new FormatterString(mnemonic);
			this.pseudoOp = pseudoOp;
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			info = default(InstrOpInfo);
			info.Mnemonic = mnemonic;
			if (!pseudoOp || !options.UsePseudoOps || instruction.Op1Register != Register.ST1)
			{
				info.OpCount = 1;
				info.Op0Register = (byte)instruction.Op1Register;
				info.Op0Index = 1;
			}
		}
	}
	internal sealed class SimpleInstrInfo_STIG2 : InstrInfo
	{
		private readonly InstrOpInfoFlags flags;

		private readonly FormatterString mnemonic;

		private readonly bool pseudoOp;

		public SimpleInstrInfo_STIG2(string mnemonic, bool pseudoOp)
			: this(mnemonic, InstrOpInfoFlags.None, pseudoOp)
		{
		}

		public SimpleInstrInfo_STIG2(string mnemonic, InstrOpInfoFlags flags)
			: this(mnemonic, flags, pseudoOp: false)
		{
		}

		private SimpleInstrInfo_STIG2(string mnemonic, InstrOpInfoFlags flags, bool pseudoOp)
		{
			this.flags = flags;
			this.mnemonic = new FormatterString(mnemonic);
			this.pseudoOp = pseudoOp;
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			info = default(InstrOpInfo);
			info.Flags = flags;
			info.Mnemonic = mnemonic;
			if (!pseudoOp || !options.UsePseudoOps || instruction.Op0Register != Register.ST1)
			{
				info.OpCount = 1;
				info.Op0Register = (byte)instruction.Op0Register;
			}
		}
	}
	internal sealed class SimpleInstrInfo_as : InstrInfo
	{
		private readonly int bitness;

		private readonly FormatterString mnemonic;

		public SimpleInstrInfo_as(int bitness, string mnemonic)
		{
			this.bitness = bitness;
			this.mnemonic = new FormatterString(mnemonic);
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			InstrOpInfoFlags instrOpInfoFlags = InstrOpInfoFlags.None;
			int num = InstrInfo.GetBitness(instruction.CodeSize);
			if (num != 0 && num != bitness)
			{
				instrOpInfoFlags = ((bitness == 16) ? (instrOpInfoFlags | InstrOpInfoFlags.AddrSize16) : ((bitness != 32) ? (instrOpInfoFlags | InstrOpInfoFlags.AddrSize64) : (instrOpInfoFlags | InstrOpInfoFlags.AddrSize32)));
			}
			info = new InstrOpInfo(mnemonic, in instruction, instrOpInfoFlags);
		}
	}
	internal sealed class SimpleInstrInfo_maskmovq : InstrInfo
	{
		private readonly FormatterString mnemonic;

		public SimpleInstrInfo_maskmovq(string mnemonic)
		{
			this.mnemonic = new FormatterString(mnemonic);
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			int bitness = InstrInfo.GetBitness(instruction.CodeSize);
			int num = instruction.Op0Kind switch
			{
				OpKind.MemorySegDI => 16, 
				OpKind.MemorySegEDI => 32, 
				OpKind.MemorySegRDI => 64, 
				_ => bitness, 
			};
			info = default(InstrOpInfo);
			info.Mnemonic = mnemonic;
			info.OpCount = 2;
			info.Op0Kind = (InstrOpKind)instruction.Op1Kind;
			info.Op0Index = 1;
			info.Op0Register = (byte)instruction.Op1Register;
			info.Op1Kind = (InstrOpKind)instruction.Op2Kind;
			info.Op1Index = 2;
			info.Op1Register = (byte)instruction.Op2Register;
			if (bitness != 0 && bitness != num)
			{
				switch (num)
				{
				case 16:
					info.Flags |= InstrOpInfoFlags.AddrSize16;
					break;
				case 32:
					info.Flags |= InstrOpInfoFlags.AddrSize32;
					break;
				default:
					info.Flags |= InstrOpInfoFlags.AddrSize64;
					break;
				}
			}
		}
	}
	internal sealed class SimpleInstrInfo_pblendvb : InstrInfo
	{
		private readonly FormatterString mnemonic;

		private readonly MemorySize memSize;

		public SimpleInstrInfo_pblendvb(string mnemonic, MemorySize memSize)
		{
			this.mnemonic = new FormatterString(mnemonic);
			this.memSize = memSize;
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			info = default(InstrOpInfo);
			info.Mnemonic = mnemonic;
			info.OpCount = 3;
			info.Op0Kind = (InstrOpKind)instruction.Op0Kind;
			info.Op0Register = (byte)instruction.Op0Register;
			info.Op1Kind = (InstrOpKind)instruction.Op1Kind;
			info.Op1Index = 1;
			info.Op1Register = (byte)instruction.Op1Register;
			info.Op2Register = 77;
			info.MemorySize = memSize;
			info.Op2Index = -3;
		}
	}
	internal sealed class SimpleInstrInfo_reverse : InstrInfo
	{
		private readonly FormatterString mnemonic;

		public SimpleInstrInfo_reverse(string mnemonic)
		{
			this.mnemonic = new FormatterString(mnemonic);
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			info = default(InstrOpInfo);
			info.Mnemonic = mnemonic;
			info.OpCount = 2;
			info.Op0Kind = (InstrOpKind)instruction.Op1Kind;
			info.Op0Index = 1;
			info.Op0Register = (byte)instruction.Op1Register;
			info.Op1Kind = (InstrOpKind)instruction.Op0Kind;
			info.Op1Register = (byte)instruction.Op0Register;
			info.MemorySize = instruction.MemorySize;
		}
	}
	internal sealed class SimpleInstrInfo_OpSize : InstrInfo
	{
		private readonly CodeSize codeSize;

		private readonly FormatterString[] mnemonics;

		public SimpleInstrInfo_OpSize(CodeSize codeSize, string mnemonic, string mnemonic16, string mnemonic32, string mnemonic64)
		{
			this.codeSize = codeSize;
			mnemonics = new FormatterString[4];
			mnemonics[0] = new FormatterString(mnemonic);
			mnemonics[1] = new FormatterString(mnemonic16);
			mnemonics[2] = new FormatterString(mnemonic32);
			mnemonics[3] = new FormatterString(mnemonic64);
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			FormatterString mnemonic = ((instruction.CodeSize != codeSize) ? mnemonics[(int)codeSize] : mnemonics[0]);
			info = new InstrOpInfo(mnemonic, in instruction, InstrOpInfoFlags.None);
		}
	}
	internal sealed class SimpleInstrInfo_OpSize2_bnd : InstrInfo
	{
		private readonly FormatterString[] mnemonics;

		public SimpleInstrInfo_OpSize2_bnd(string mnemonic, string mnemonic16, string mnemonic32, string mnemonic64)
		{
			mnemonics = new FormatterString[4];
			mnemonics[0] = new FormatterString(mnemonic);
			mnemonics[1] = new FormatterString(mnemonic16);
			mnemonics[2] = new FormatterString(mnemonic32);
			mnemonics[3] = new FormatterString(mnemonic64);
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			InstrOpInfoFlags instrOpInfoFlags = InstrOpInfoFlags.None;
			if (instruction.HasRepnePrefix)
			{
				instrOpInfoFlags |= InstrOpInfoFlags.BndPrefix;
			}
			FormatterString mnemonic = mnemonics[(int)instruction.CodeSize];
			info = new InstrOpInfo(mnemonic, in instruction, instrOpInfoFlags);
		}
	}
	internal sealed class SimpleInstrInfo_OpSize3 : InstrInfo
	{
		private readonly int bitness;

		private readonly FormatterString mnemonicDefault;

		private readonly FormatterString mnemonicFull;

		public SimpleInstrInfo_OpSize3(int bitness, string mnemonicDefault, string mnemonicFull)
		{
			this.bitness = bitness;
			this.mnemonicDefault = new FormatterString(mnemonicDefault);
			this.mnemonicFull = new FormatterString(mnemonicFull);
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			int num = InstrInfo.GetBitness(instruction.CodeSize);
			FormatterString mnemonic = ((num != 0 && (num & bitness) == 0) ? mnemonicFull : mnemonicDefault);
			info = new InstrOpInfo(mnemonic, in instruction, InstrOpInfoFlags.None);
		}
	}
	internal sealed class SimpleInstrInfo_os : InstrInfo
	{
		private readonly int bitness;

		private readonly FormatterString mnemonic;

		private readonly InstrOpInfoFlags flags;

		public SimpleInstrInfo_os(int bitness, string mnemonic)
			: this(bitness, mnemonic, InstrOpInfoFlags.None)
		{
		}

		public SimpleInstrInfo_os(int bitness, string mnemonic, InstrOpInfoFlags flags)
		{
			this.bitness = bitness;
			this.mnemonic = new FormatterString(mnemonic);
			this.flags = flags;
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			InstrOpInfoFlags instrOpInfoFlags = flags;
			int num = InstrInfo.GetBitness(instruction.CodeSize);
			if (num != 0 && num != bitness)
			{
				instrOpInfoFlags = ((bitness == 16) ? (instrOpInfoFlags | InstrOpInfoFlags.OpSize16) : ((bitness != 32) ? (instrOpInfoFlags | InstrOpInfoFlags.OpSize64) : (instrOpInfoFlags | InstrOpInfoFlags.OpSize32)));
			}
			info = new InstrOpInfo(mnemonic, in instruction, instrOpInfoFlags);
		}
	}
	internal sealed class SimpleInstrInfo_os_mem : InstrInfo
	{
		private readonly int bitness;

		private readonly FormatterString mnemonic;

		public SimpleInstrInfo_os_mem(int bitness, string mnemonic)
		{
			this.bitness = bitness;
			this.mnemonic = new FormatterString(mnemonic);
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			InstrOpInfoFlags instrOpInfoFlags = InstrOpInfoFlags.None;
			int num = InstrInfo.GetBitness(instruction.CodeSize);
			if ((instruction.Op0Kind == OpKind.Memory || instruction.Op1Kind == OpKind.Memory) && num != 0 && (num == 64 || num != bitness) && (num != 64 || bitness != 32))
			{
				instrOpInfoFlags = ((bitness == 16) ? (instrOpInfoFlags | InstrOpInfoFlags.OpSize16) : ((bitness != 32) ? (instrOpInfoFlags | InstrOpInfoFlags.OpSize64) : (instrOpInfoFlags | InstrOpInfoFlags.OpSize32)));
			}
			info = new InstrOpInfo(mnemonic, in instruction, instrOpInfoFlags);
		}
	}
	internal sealed class SimpleInstrInfo_os_mem2 : InstrInfo
	{
		private readonly InstrOpInfoFlags flags;

		private readonly int bitness;

		private readonly FormatterString mnemonic;

		public SimpleInstrInfo_os_mem2(int bitness, string mnemonic, InstrOpInfoFlags flags)
		{
			this.flags = flags;
			this.bitness = bitness;
			this.mnemonic = new FormatterString(mnemonic);
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			InstrOpInfoFlags instrOpInfoFlags = flags;
			int num = InstrInfo.GetBitness(instruction.CodeSize);
			if (num != 0 && (num & bitness) == 0)
			{
				instrOpInfoFlags = ((num == 16) ? (instrOpInfoFlags | InstrOpInfoFlags.OpSize32) : (instrOpInfoFlags | InstrOpInfoFlags.OpSize16));
			}
			info = new InstrOpInfo(mnemonic, in instruction, instrOpInfoFlags);
		}
	}
	internal sealed class SimpleInstrInfo_os_mem_reg16 : InstrInfo
	{
		private readonly int bitness;

		private readonly FormatterString mnemonic;

		public SimpleInstrInfo_os_mem_reg16(int bitness, string mnemonic)
		{
			this.bitness = bitness;
			this.mnemonic = new FormatterString(mnemonic);
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			InstrOpInfoFlags instrOpInfoFlags = InstrOpInfoFlags.None;
			int num = InstrInfo.GetBitness(instruction.CodeSize);
			if (instruction.Op0Kind == OpKind.Memory && num != 0 && (num == 64 || num != bitness) && (num != 64 || bitness != 32))
			{
				instrOpInfoFlags = ((bitness == 16) ? (instrOpInfoFlags | InstrOpInfoFlags.OpSize16) : ((bitness != 32) ? (instrOpInfoFlags | InstrOpInfoFlags.OpSize64) : (instrOpInfoFlags | InstrOpInfoFlags.OpSize32)));
			}
			info = new InstrOpInfo(mnemonic, in instruction, instrOpInfoFlags);
			if (instruction.Op0Kind != 0)
			{
				return;
			}
			Register register = (Register)info.Op0Register;
			int num2 = 0;
			if (Register.AX <= register && register <= Register.R15W)
			{
				num2 = 16;
			}
			else if (Register.EAX <= register && register <= Register.R15D)
			{
				num2 = 32;
				register = register - 37 + 21;
			}
			else if (Register.RAX <= register && register <= Register.R15)
			{
				num2 = 64;
				register = register - 53 + 21;
			}
			if (num2 == 0)
			{
				return;
			}
			info.Op0Register = (byte)register;
			if ((num == 64 || num != num2) && (num != 64 || num2 != 32))
			{
				if (bitness == 16)
				{
					info.Flags |= InstrOpInfoFlags.OpSize16;
				}
				else if (bitness == 32)
				{
					info.Flags |= InstrOpInfoFlags.OpSize32;
				}
				else
				{
					info.Flags |= InstrOpInfoFlags.OpSize64;
				}
			}
		}
	}
	internal sealed class SimpleInstrInfo_os_jcc : InstrInfo
	{
		private readonly int bitness;

		private readonly int ccIndex;

		private readonly FormatterString[] mnemonics;

		private readonly InstrOpInfoFlags flags;

		public SimpleInstrInfo_os_jcc(int bitness, int ccIndex, string[] mnemonics)
			: this(bitness, ccIndex, mnemonics, InstrOpInfoFlags.None)
		{
		}

		public SimpleInstrInfo_os_jcc(int bitness, int ccIndex, string[] mnemonics, InstrOpInfoFlags flags)
		{
			this.bitness = bitness;
			this.ccIndex = ccIndex;
			this.mnemonics = FormatterString.Create(mnemonics);
			this.flags = flags;
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			InstrOpInfoFlags instrOpInfoFlags = flags;
			int num = InstrInfo.GetBitness(instruction.CodeSize);
			if (instrOpInfoFlags != 0)
			{
				if (num != 0 && num != bitness)
				{
					instrOpInfoFlags = ((bitness == 16) ? (instrOpInfoFlags | InstrOpInfoFlags.OpSize16) : ((bitness != 32) ? (instrOpInfoFlags | InstrOpInfoFlags.OpSize64) : (instrOpInfoFlags | InstrOpInfoFlags.OpSize32)));
				}
			}
			else
			{
				BranchSizeInfo branchSizeInfo = BranchSizeInfo.Near;
				if (num != 0 && num != bitness)
				{
					if (bitness == 16)
					{
						branchSizeInfo = BranchSizeInfo.NearWord;
					}
					else if (bitness == 32)
					{
						branchSizeInfo = BranchSizeInfo.NearDword;
					}
				}
				instrOpInfoFlags = (InstrOpInfoFlags)((uint)instrOpInfoFlags | (uint)((int)branchSizeInfo << 7));
			}
			switch (instruction.SegmentPrefix)
			{
			case Register.CS:
				instrOpInfoFlags |= InstrOpInfoFlags.JccNotTaken;
				break;
			case Register.DS:
				instrOpInfoFlags |= InstrOpInfoFlags.JccTaken;
				break;
			}
			if (instruction.HasRepnePrefix)
			{
				instrOpInfoFlags |= InstrOpInfoFlags.BndPrefix;
			}
			FormatterString mnemonicCC = MnemonicCC.GetMnemonicCC(options, ccIndex, mnemonics);
			info = new InstrOpInfo(mnemonicCC, in instruction, instrOpInfoFlags);
		}
	}
	internal sealed class SimpleInstrInfo_os_loop : InstrInfo
	{
		private readonly int bitness;

		private readonly int ccIndex;

		private readonly Register register;

		private readonly FormatterString[] mnemonics;

		public SimpleInstrInfo_os_loop(int bitness, int ccIndex, Register register, string[] mnemonics)
		{
			this.bitness = bitness;
			this.ccIndex = ccIndex;
			this.register = register;
			this.mnemonics = FormatterString.Create(mnemonics);
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			InstrOpInfoFlags instrOpInfoFlags = InstrOpInfoFlags.None;
			int num = InstrInfo.GetBitness(instruction.CodeSize);
			bool num2 = num switch
			{
				0 => (int)register, 
				16 => 22, 
				32 => 38, 
				64 => 54, 
				_ => throw new InvalidOperationException(), 
			} != (int)register;
			if (num != 0 && num != bitness)
			{
				instrOpInfoFlags = ((bitness == 16) ? (instrOpInfoFlags | InstrOpInfoFlags.OpSize16) : ((bitness != 32) ? (instrOpInfoFlags | InstrOpInfoFlags.OpSize64) : (instrOpInfoFlags | InstrOpInfoFlags.OpSize32)));
			}
			FormatterString mnemonic = ((ccIndex == -1) ? mnemonics[0] : MnemonicCC.GetMnemonicCC(options, ccIndex, mnemonics));
			info = new InstrOpInfo(mnemonic, in instruction, instrOpInfoFlags);
			if (num2)
			{
				info.OpCount = 2;
				info.Op1Kind = InstrOpKind.Register;
				info.Op1Index = -7;
				info.Op1Register = (byte)register;
			}
		}
	}
	internal sealed class SimpleInstrInfo_os_call : InstrInfo
	{
		private readonly int bitness;

		private readonly FormatterString mnemonic;

		private readonly bool canHaveBndPrefix;

		public SimpleInstrInfo_os_call(int bitness, string mnemonic, bool canHaveBndPrefix)
		{
			this.bitness = bitness;
			this.mnemonic = new FormatterString(mnemonic);
			this.canHaveBndPrefix = canHaveBndPrefix;
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			InstrOpInfoFlags instrOpInfoFlags = InstrOpInfoFlags.None;
			if (canHaveBndPrefix && instruction.HasRepnePrefix)
			{
				instrOpInfoFlags |= InstrOpInfoFlags.BndPrefix;
			}
			int num = InstrInfo.GetBitness(instruction.CodeSize);
			BranchSizeInfo branchSizeInfo = BranchSizeInfo.None;
			if (num != 0 && num != bitness)
			{
				if (bitness == 16)
				{
					branchSizeInfo = BranchSizeInfo.Word;
				}
				else if (bitness == 32)
				{
					branchSizeInfo = BranchSizeInfo.Dword;
				}
			}
			instrOpInfoFlags = (InstrOpInfoFlags)((uint)instrOpInfoFlags | (uint)((int)branchSizeInfo << 7));
			info = new InstrOpInfo(mnemonic, in instruction, instrOpInfoFlags);
		}
	}
	internal sealed class SimpleInstrInfo_far : InstrInfo
	{
		private readonly int bitness;

		private readonly FormatterString mnemonic;

		public SimpleInstrInfo_far(int bitness, string mnemonic)
		{
			this.bitness = bitness;
			this.mnemonic = new FormatterString(mnemonic);
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			InstrOpInfoFlags instrOpInfoFlags = InstrOpInfoFlags.None;
			int num = InstrInfo.GetBitness(instruction.CodeSize);
			BranchSizeInfo branchSizeInfo = BranchSizeInfo.None;
			if (num != 0 && num != bitness)
			{
				branchSizeInfo = ((bitness != 16) ? BranchSizeInfo.Dword : BranchSizeInfo.Word);
			}
			instrOpInfoFlags = (InstrOpInfoFlags)((uint)instrOpInfoFlags | (uint)((int)branchSizeInfo << 7));
			info = new InstrOpInfo(mnemonic, in instruction, instrOpInfoFlags);
		}
	}
	internal sealed class SimpleInstrInfo_far_mem : InstrInfo
	{
		private readonly int bitness;

		private readonly FormatterString mnemonic;

		public SimpleInstrInfo_far_mem(int bitness, string mnemonic)
		{
			this.bitness = bitness;
			this.mnemonic = new FormatterString(mnemonic);
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			InstrOpInfoFlags instrOpInfoFlags = InstrOpInfoFlags.ShowNoMemSize_ForceSize;
			int num = InstrInfo.GetBitness(instruction.CodeSize);
			FarMemorySizeInfo farMemorySizeInfo = FarMemorySizeInfo.None;
			if (num != 0 && num != bitness)
			{
				farMemorySizeInfo = ((bitness == 16) ? FarMemorySizeInfo.Word : FarMemorySizeInfo.Dword);
			}
			instrOpInfoFlags = (InstrOpInfoFlags)((uint)instrOpInfoFlags | (uint)((int)farMemorySizeInfo << 15));
			info = new InstrOpInfo(mnemonic, in instruction, instrOpInfoFlags);
		}
	}
	internal sealed class SimpleInstrInfo_movabs : InstrInfo
	{
		private readonly FormatterString mnemonic;

		public SimpleInstrInfo_movabs(string mnemonic)
		{
			this.mnemonic = new FormatterString(mnemonic);
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			InstrOpInfoFlags instrOpInfoFlags = InstrOpInfoFlags.None;
			int num = InstrInfo.GetBitness(instruction.CodeSize);
			int num2 = instruction.MemoryDisplSize switch
			{
				2 => 16, 
				4 => 32, 
				_ => 64, 
			};
			if (num == 0)
			{
				num = num2;
			}
			MemorySizeInfo memorySizeInfo = MemorySizeInfo.None;
			if (num == 64)
			{
				if (num2 == 32)
				{
					instrOpInfoFlags |= InstrOpInfoFlags.AddrSize32;
				}
				else
				{
					memorySizeInfo = MemorySizeInfo.Qword;
				}
			}
			else if (num != num2)
			{
				memorySizeInfo = ((num2 == 16) ? MemorySizeInfo.Word : MemorySizeInfo.Dword);
			}
			instrOpInfoFlags = (InstrOpInfoFlags)((uint)instrOpInfoFlags | (uint)((int)memorySizeInfo << 13));
			info = new InstrOpInfo(mnemonic, in instruction, instrOpInfoFlags);
		}
	}
	internal sealed class SimpleInstrInfo_er : InstrInfo
	{
		private readonly int erIndex;

		private readonly FormatterString mnemonic;

		private readonly InstrOpInfoFlags flags;

		public SimpleInstrInfo_er(int erIndex, string mnemonic)
			: this(erIndex, mnemonic, InstrOpInfoFlags.None)
		{
		}

		public SimpleInstrInfo_er(int erIndex, string mnemonic, InstrOpInfoFlags flags)
		{
			this.erIndex = erIndex;
			this.mnemonic = new FormatterString(mnemonic);
			this.flags = flags;
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			info = new InstrOpInfo(mnemonic, in instruction, flags);
			if (IcedConstants.IsMvex(instruction.Code))
			{
				RoundingControl roundingControl = instruction.RoundingControl;
				if (roundingControl != 0)
				{
					InstrOpKind newOpKind;
					if (instruction.SuppressAllExceptions)
					{
						switch (roundingControl)
						{
						default:
							return;
						case RoundingControl.RoundToNearest:
							newOpKind = InstrOpKind.RnSae;
							break;
						case RoundingControl.RoundDown:
							newOpKind = InstrOpKind.RdSae;
							break;
						case RoundingControl.RoundUp:
							newOpKind = InstrOpKind.RuSae;
							break;
						case RoundingControl.RoundTowardZero:
							newOpKind = InstrOpKind.RzSae;
							break;
						}
					}
					else
					{
						switch (roundingControl)
						{
						default:
							return;
						case RoundingControl.RoundToNearest:
							newOpKind = InstrOpKind.Rn;
							break;
						case RoundingControl.RoundDown:
							newOpKind = InstrOpKind.Rd;
							break;
						case RoundingControl.RoundUp:
							newOpKind = InstrOpKind.Ru;
							break;
						case RoundingControl.RoundTowardZero:
							newOpKind = InstrOpKind.Rz;
							break;
						}
					}
					MoveOperands(ref info, erIndex, newOpKind);
				}
				else if (instruction.SuppressAllExceptions)
				{
					MoveOperands(ref info, erIndex, InstrOpKind.Sae);
				}
				return;
			}
			RoundingControl roundingControl2 = instruction.RoundingControl;
			if (roundingControl2 != 0 && FormatterUtils.CanShowRoundingControl(in instruction, options))
			{
				InstrOpKind newOpKind2;
				switch (roundingControl2)
				{
				default:
					return;
				case RoundingControl.RoundToNearest:
					newOpKind2 = InstrOpKind.RnSae;
					break;
				case RoundingControl.RoundDown:
					newOpKind2 = InstrOpKind.RdSae;
					break;
				case RoundingControl.RoundUp:
					newOpKind2 = InstrOpKind.RuSae;
					break;
				case RoundingControl.RoundTowardZero:
					newOpKind2 = InstrOpKind.RzSae;
					break;
				}
				MoveOperands(ref info, erIndex, newOpKind2);
			}
		}

		internal static void MoveOperands(ref InstrOpInfo info, int index, InstrOpKind newOpKind)
		{
			switch (index)
			{
			case 2:
				info.Op4Kind = info.Op3Kind;
				info.Op3Kind = info.Op2Kind;
				info.Op3Register = info.Op2Register;
				info.Op2Kind = newOpKind;
				info.Op4Index = info.Op3Index;
				info.Op3Index = info.Op2Index;
				info.Op2Index = -2;
				info.OpCount++;
				break;
			case 3:
				info.Op4Kind = info.Op3Kind;
				info.Op3Kind = newOpKind;
				info.Op4Index = info.Op3Index;
				info.Op3Index = -2;
				info.OpCount++;
				break;
			default:
				throw new InvalidOperationException();
			}
		}
	}
	internal sealed class SimpleInstrInfo_sae : InstrInfo
	{
		private readonly int saeIndex;

		private readonly FormatterString mnemonic;

		public SimpleInstrInfo_sae(int saeIndex, string mnemonic)
		{
			this.saeIndex = saeIndex;
			this.mnemonic = new FormatterString(mnemonic);
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			info = new InstrOpInfo(mnemonic, in instruction, InstrOpInfoFlags.None);
			if (instruction.SuppressAllExceptions)
			{
				SimpleInstrInfo_er.MoveOperands(ref info, saeIndex, InstrOpKind.Sae);
			}
		}
	}
	internal sealed class SimpleInstrInfo_bcst : InstrInfo
	{
		private readonly FormatterString mnemonic;

		private readonly InstrOpInfoFlags flagsNoBroadcast;

		public SimpleInstrInfo_bcst(string mnemonic, InstrOpInfoFlags flagsNoBroadcast)
		{
			this.mnemonic = new FormatterString(mnemonic);
			this.flagsNoBroadcast = flagsNoBroadcast;
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			MemorySizes.Info info2 = MemorySizes.AllMemorySizes[(int)instruction.MemorySize];
			InstrOpInfoFlags flags = ((info2.bcstTo.Length == 0) ? flagsNoBroadcast : InstrOpInfoFlags.None);
			info = new InstrOpInfo(mnemonic, in instruction, flags);
		}
	}
	internal sealed class SimpleInstrInfo_bnd : InstrInfo
	{
		private readonly FormatterString mnemonic;

		private readonly InstrOpInfoFlags flags;

		public SimpleInstrInfo_bnd(string mnemonic, InstrOpInfoFlags flags)
		{
			this.mnemonic = new FormatterString(mnemonic);
			this.flags = flags;
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			InstrOpInfoFlags instrOpInfoFlags = flags;
			if (instruction.HasRepnePrefix)
			{
				instrOpInfoFlags |= InstrOpInfoFlags.BndPrefix;
			}
			info = new InstrOpInfo(mnemonic, in instruction, instrOpInfoFlags);
		}
	}
	internal sealed class SimpleInstrInfo_pops : InstrInfo
	{
		private readonly FormatterString mnemonic;

		private readonly FormatterString[] pseudo_ops;

		public SimpleInstrInfo_pops(string mnemonic, FormatterString[] pseudo_ops)
		{
			this.mnemonic = new FormatterString(mnemonic);
			this.pseudo_ops = pseudo_ops;
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			info = new InstrOpInfo(mnemonic, in instruction, InstrOpInfoFlags.None);
			if (instruction.SuppressAllExceptions)
			{
				SimpleInstrInfo_er.MoveOperands(ref info, instruction.OpCount - 1, InstrOpKind.Sae);
			}
			int immediate = instruction.Immediate8;
			if (options.UsePseudoOps && (uint)immediate < (uint)pseudo_ops.Length)
			{
				info.Mnemonic = pseudo_ops[immediate];
				RemoveLastOp(ref info);
			}
		}

		internal static void RemoveLastOp(ref InstrOpInfo info)
		{
			switch (info.OpCount)
			{
			case 5:
				info.Op4Index = -1;
				break;
			case 4:
				info.Op3Index = -1;
				break;
			case 3:
				info.Op2Index = -1;
				break;
			default:
				throw new InvalidOperationException();
			}
			info.OpCount--;
		}
	}
	internal sealed class SimpleInstrInfo_pclmulqdq : InstrInfo
	{
		private readonly FormatterString mnemonic;

		private readonly FormatterString[] pseudo_ops;

		public SimpleInstrInfo_pclmulqdq(string mnemonic, FormatterString[] pseudo_ops)
		{
			this.mnemonic = new FormatterString(mnemonic);
			this.pseudo_ops = pseudo_ops;
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			info = new InstrOpInfo(mnemonic, in instruction, InstrOpInfoFlags.None);
			if (options.UsePseudoOps)
			{
				int num = instruction.Immediate8 switch
				{
					0 => 0, 
					1 => 1, 
					16 => 2, 
					17 => 3, 
					_ => -1, 
				};
				if (num >= 0)
				{
					info.Mnemonic = pseudo_ops[num];
					SimpleInstrInfo_pops.RemoveLastOp(ref info);
				}
			}
		}
	}
	internal sealed class SimpleInstrInfo_Reg16 : InstrInfo
	{
		private readonly FormatterString mnemonic;

		public SimpleInstrInfo_Reg16(string mnemonic)
		{
			this.mnemonic = new FormatterString(mnemonic);
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			info = new InstrOpInfo(mnemonic, in instruction, InstrOpInfoFlags.None);
			if (37 <= info.Op0Register && info.Op0Register <= 52)
			{
				info.Op0Register = (byte)(info.Op0Register - 37 + 21);
			}
			if (37 <= info.Op1Register && info.Op1Register <= 52)
			{
				info.Op1Register = (byte)(info.Op1Register - 37 + 21);
			}
			if (37 <= info.Op2Register && info.Op2Register <= 52)
			{
				info.Op2Register = (byte)(info.Op2Register - 37 + 21);
			}
		}
	}
	internal sealed class SimpleInstrInfo_Reg32 : InstrInfo
	{
		private readonly FormatterString mnemonic;

		public SimpleInstrInfo_Reg32(string mnemonic)
		{
			this.mnemonic = new FormatterString(mnemonic);
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			info = new InstrOpInfo(mnemonic, in instruction, InstrOpInfoFlags.None);
			if (53 <= info.Op0Register && info.Op0Register <= 68)
			{
				info.Op0Register = (byte)(info.Op0Register - 53 + 37);
			}
			if (53 <= info.Op1Register && info.Op1Register <= 68)
			{
				info.Op1Register = (byte)(info.Op1Register - 53 + 37);
			}
			if (53 <= info.Op2Register && info.Op2Register <= 68)
			{
				info.Op2Register = (byte)(info.Op2Register - 53 + 37);
			}
		}
	}
	internal sealed class SimpleInstrInfo_invlpga : InstrInfo
	{
		private readonly int bitness;

		private readonly FormatterString mnemonic;

		public SimpleInstrInfo_invlpga(int bitness, string mnemonic)
		{
			this.bitness = bitness;
			this.mnemonic = new FormatterString(mnemonic);
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			info = default(InstrOpInfo);
			info.Mnemonic = mnemonic;
			info.OpCount = 2;
			info.Op0Kind = InstrOpKind.Register;
			info.Op1Kind = InstrOpKind.Register;
			info.Op1Register = 38;
			info.Op0Index = -3;
			info.Op1Index = -3;
			switch (bitness)
			{
			case 16:
				info.Op0Register = 21;
				break;
			case 32:
				info.Op0Register = 37;
				break;
			case 64:
				info.Op0Register = 53;
				break;
			default:
				throw new InvalidOperationException();
			}
		}
	}
	internal sealed class SimpleInstrInfo_DeclareData : InstrInfo
	{
		private readonly FormatterString mnemonic;

		private readonly InstrOpKind opKind;

		public SimpleInstrInfo_DeclareData(Code code, string mnemonic)
		{
			this.mnemonic = new FormatterString(mnemonic);
			opKind = code switch
			{
				Code.DeclareByte => InstrOpKind.DeclareByte, 
				Code.DeclareWord => InstrOpKind.DeclareWord, 
				Code.DeclareDword => InstrOpKind.DeclareDword, 
				Code.DeclareQword => InstrOpKind.DeclareQword, 
				_ => throw new InvalidOperationException(), 
			};
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			info = new InstrOpInfo(mnemonic, in instruction, InstrOpInfoFlags.MnemonicIsDirective);
			info.OpCount = (byte)instruction.DeclareDataCount;
			info.Op0Kind = opKind;
			info.Op1Kind = opKind;
			info.Op2Kind = opKind;
			info.Op3Kind = opKind;
			info.Op4Kind = opKind;
			info.Op0Index = -3;
			info.Op1Index = -3;
			info.Op2Index = -3;
			info.Op3Index = -3;
			info.Op4Index = -3;
		}
	}
	internal static class InstrInfos
	{
		public static readonly InstrInfo[] AllInfos = ReadInfos();

		private static string AddSuffix(string s, char[] ca)
		{
			return string.Intern(s + new string(ca));
		}

		private static string AddPrefix(string s, char[] ca)
		{
			return string.Intern(new string(ca) + s);
		}

		private static InstrInfo[] ReadInfos()
		{
			DataReader dataReader = new DataReader(GetSerializedInstrInfos());
			InstrInfo[] array = new InstrInfo[4911];
			string[] stringsTable = FormatterStringsTable.GetStringsTable();
			char[] array2 = new char[1];
			int index = -1;
			for (int i = 0; i < array.Length; i++)
			{
				byte num = dataReader.ReadByte();
				CtorKind ctorKind = (CtorKind)(num & 0x7F);
				int num2;
				if (ctorKind == CtorKind.Previous)
				{
					num2 = dataReader.Index;
					dataReader.Index = index;
					ctorKind = (CtorKind)(dataReader.ReadByte() & 0x7F);
				}
				else
				{
					num2 = -1;
					index = dataReader.Index - 1;
				}
				string text = stringsTable[dataReader.ReadCompressedUInt32()];
				if ((num & 0x80u) != 0)
				{
					array2[0] = 'v';
					text = AddPrefix(text, array2);
				}
				InstrInfo instrInfo;
				switch (ctorKind)
				{
				case CtorKind.Normal_1:
					instrInfo = new SimpleInstrInfo(text);
					break;
				case CtorKind.Normal_2:
				{
					uint flags = dataReader.ReadCompressedUInt32();
					instrInfo = new SimpleInstrInfo(text, (InstrOpInfoFlags)flags);
					break;
				}
				case CtorKind.AamAad:
					instrInfo = new SimpleInstrInfo_AamAad(text);
					break;
				case CtorKind.asz:
				{
					uint flags = dataReader.ReadCompressedUInt32();
					instrInfo = new SimpleInstrInfo_as((int)flags, text);
					break;
				}
				case CtorKind.String:
					instrInfo = new SimpleInstrInfo_String(text);
					break;
				case CtorKind.bcst:
				{
					uint flags = dataReader.ReadCompressedUInt32();
					instrInfo = new SimpleInstrInfo_bcst(text, (InstrOpInfoFlags)flags);
					break;
				}
				case CtorKind.bnd:
				{
					uint flags = dataReader.ReadCompressedUInt32();
					instrInfo = new SimpleInstrInfo_bnd(text, (InstrOpInfoFlags)flags);
					break;
				}
				case CtorKind.DeclareData:
					instrInfo = new SimpleInstrInfo_DeclareData((Code)i, text);
					break;
				case CtorKind.er_2:
				{
					uint flags = dataReader.ReadCompressedUInt32();
					instrInfo = new SimpleInstrInfo_er((int)flags, text);
					break;
				}
				case CtorKind.er_3:
				{
					uint flags = dataReader.ReadCompressedUInt32();
					uint sexInfoMem = dataReader.ReadCompressedUInt32();
					instrInfo = new SimpleInstrInfo_er((int)flags, text, (InstrOpInfoFlags)sexInfoMem);
					break;
				}
				case CtorKind.far:
				{
					uint flags = dataReader.ReadCompressedUInt32();
					instrInfo = new SimpleInstrInfo_far((int)flags, text);
					break;
				}
				case CtorKind.far_mem:
				{
					uint flags = dataReader.ReadCompressedUInt32();
					instrInfo = new SimpleInstrInfo_far_mem((int)flags, text);
					break;
				}
				case CtorKind.invlpga:
				{
					uint flags = dataReader.ReadCompressedUInt32();
					instrInfo = new SimpleInstrInfo_invlpga((int)flags, text);
					break;
				}
				case CtorKind.maskmovq:
					instrInfo = new SimpleInstrInfo_maskmovq(text);
					break;
				case CtorKind.movabs:
					instrInfo = new SimpleInstrInfo_movabs(text);
					break;
				case CtorKind.nop:
				{
					uint flags = dataReader.ReadCompressedUInt32();
					uint sexInfoMem = dataReader.ReadByte();
					instrInfo = new SimpleInstrInfo_nop((int)flags, text, (Register)sexInfoMem);
					break;
				}
				case CtorKind.OpSize:
				{
					uint flags = dataReader.ReadByte();
					array2[0] = 'w';
					string text2 = AddSuffix(text, array2);
					array2[0] = 'd';
					string text3 = AddSuffix(text, array2);
					array2[0] = 'q';
					string mnemonic = AddSuffix(text, array2);
					instrInfo = new SimpleInstrInfo_OpSize((CodeSize)flags, text, text2, text3, mnemonic);
					break;
				}
				case CtorKind.OpSize2_bnd:
				{
					string text2 = stringsTable[dataReader.ReadCompressedUInt32()];
					string text3 = stringsTable[dataReader.ReadCompressedUInt32()];
					string mnemonic = stringsTable[dataReader.ReadCompressedUInt32()];
					instrInfo = new SimpleInstrInfo_OpSize2_bnd(text, text2, text3, mnemonic);
					break;
				}
				case CtorKind.OpSize3:
				{
					array2[0] = (char)dataReader.ReadByte();
					string text2 = AddSuffix(text, array2);
					uint flags = dataReader.ReadCompressedUInt32();
					instrInfo = new SimpleInstrInfo_OpSize3((int)flags, text, text2);
					break;
				}
				case CtorKind.os_2:
				{
					uint flags = dataReader.ReadCompressedUInt32();
					instrInfo = new SimpleInstrInfo_os((int)flags, text);
					break;
				}
				case CtorKind.os_3:
				{
					uint flags = dataReader.ReadCompressedUInt32();
					uint sexInfoMem = dataReader.ReadCompressedUInt32();
					instrInfo = new SimpleInstrInfo_os((int)flags, text, (InstrOpInfoFlags)sexInfoMem);
					break;
				}
				case CtorKind.os_call:
				{
					uint flags = dataReader.ReadCompressedUInt32();
					uint sexInfoMem = dataReader.ReadByte();
					if (sexInfoMem > 1)
					{
						throw new InvalidOperationException();
					}
					instrInfo = new SimpleInstrInfo_os_call((int)flags, text, sexInfoMem != 0);
					break;
				}
				case CtorKind.CC_1:
				{
					uint flags = dataReader.ReadCompressedUInt32();
					instrInfo = new SimpleInstrInfo_cc((int)flags, new string[1] { text });
					break;
				}
				case CtorKind.CC_2:
				{
					string text2 = stringsTable[dataReader.ReadCompressedUInt32()];
					uint flags = dataReader.ReadCompressedUInt32();
					instrInfo = new SimpleInstrInfo_cc((int)flags, new string[2] { text, text2 });
					break;
				}
				case CtorKind.CC_3:
				{
					string text2 = stringsTable[dataReader.ReadCompressedUInt32()];
					string text3 = stringsTable[dataReader.ReadCompressedUInt32()];
					uint flags = dataReader.ReadCompressedUInt32();
					instrInfo = new SimpleInstrInfo_cc((int)flags, new string[3] { text, text2, text3 });
					break;
				}
				case CtorKind.os_jcc_a_1:
				{
					uint sexInfoMem = dataReader.ReadCompressedUInt32();
					uint flags = dataReader.ReadCompressedUInt32();
					instrInfo = new SimpleInstrInfo_os_jcc((int)flags, (int)sexInfoMem, new string[1] { text });
					break;
				}
				case CtorKind.os_jcc_a_2:
				{
					string text2 = stringsTable[dataReader.ReadCompressedUInt32()];
					uint sexInfoMem = dataReader.ReadCompressedUInt32();
					uint flags = dataReader.ReadCompressedUInt32();
					instrInfo = new SimpleInstrInfo_os_jcc((int)flags, (int)sexInfoMem, new string[2] { text, text2 });
					break;
				}
				case CtorKind.os_jcc_a_3:
				{
					string text2 = stringsTable[dataReader.ReadCompressedUInt32()];
					string text3 = stringsTable[dataReader.ReadCompressedUInt32()];
					uint sexInfoMem = dataReader.ReadCompressedUInt32();
					uint flags = dataReader.ReadCompressedUInt32();
					instrInfo = new SimpleInstrInfo_os_jcc((int)flags, (int)sexInfoMem, new string[3] { text, text2, text3 });
					break;
				}
				case CtorKind.os_jcc_b_1:
				{
					uint flags2 = dataReader.ReadCompressedUInt32();
					uint flags = dataReader.ReadCompressedUInt32();
					uint sexInfoMem = dataReader.ReadCompressedUInt32();
					instrInfo = new SimpleInstrInfo_os_jcc((int)flags, (int)flags2, new string[1] { text }, (InstrOpInfoFlags)sexInfoMem);
					break;
				}
				case CtorKind.os_jcc_b_2:
				{
					string text2 = stringsTable[dataReader.ReadCompressedUInt32()];
					uint flags2 = dataReader.ReadCompressedUInt32();
					uint flags = dataReader.ReadCompressedUInt32();
					uint sexInfoMem = dataReader.ReadCompressedUInt32();
					instrInfo = new SimpleInstrInfo_os_jcc((int)flags, (int)flags2, new string[2] { text, text2 }, (InstrOpInfoFlags)sexInfoMem);
					break;
				}
				case CtorKind.os_jcc_b_3:
				{
					string text2 = stringsTable[dataReader.ReadCompressedUInt32()];
					string text3 = stringsTable[dataReader.ReadCompressedUInt32()];
					uint flags2 = dataReader.ReadCompressedUInt32();
					uint flags = dataReader.ReadCompressedUInt32();
					uint sexInfoMem = dataReader.ReadCompressedUInt32();
					instrInfo = new SimpleInstrInfo_os_jcc((int)flags, (int)flags2, new string[3] { text, text2, text3 }, (InstrOpInfoFlags)sexInfoMem);
					break;
				}
				case CtorKind.os_loopcc:
				{
					string text2 = stringsTable[dataReader.ReadCompressedUInt32()];
					uint flags2 = dataReader.ReadCompressedUInt32();
					uint flags = dataReader.ReadCompressedUInt32();
					uint sexInfoMem = dataReader.ReadByte();
					instrInfo = new SimpleInstrInfo_os_loop((int)flags, (int)flags2, (Register)sexInfoMem, new string[2] { text, text2 });
					break;
				}
				case CtorKind.os_loop:
				{
					uint flags = dataReader.ReadCompressedUInt32();
					uint sexInfoMem = dataReader.ReadByte();
					instrInfo = new SimpleInstrInfo_os_loop((int)flags, -1, (Register)sexInfoMem, new string[1] { text });
					break;
				}
				case CtorKind.os_mem:
				{
					uint flags = dataReader.ReadCompressedUInt32();
					instrInfo = new SimpleInstrInfo_os_mem((int)flags, text);
					break;
				}
				case CtorKind.os_mem_reg16:
				{
					uint flags = dataReader.ReadCompressedUInt32();
					instrInfo = new SimpleInstrInfo_os_mem_reg16((int)flags, text);
					break;
				}
				case CtorKind.os_mem2:
				{
					uint flags = dataReader.ReadCompressedUInt32();
					uint sexInfoMem = dataReader.ReadCompressedUInt32();
					instrInfo = new SimpleInstrInfo_os_mem2((int)flags, text, (InstrOpInfoFlags)sexInfoMem);
					break;
				}
				case CtorKind.pblendvb:
				{
					uint flags = dataReader.ReadByte();
					instrInfo = new SimpleInstrInfo_pblendvb(text, (MemorySize)flags);
					break;
				}
				case CtorKind.pclmulqdq:
				{
					uint flags = dataReader.ReadByte();
					instrInfo = new SimpleInstrInfo_pclmulqdq(text, FormatterConstants.GetPseudoOps((PseudoOpsKind)flags));
					break;
				}
				case CtorKind.pops:
				{
					uint flags = dataReader.ReadByte();
					instrInfo = new SimpleInstrInfo_pops(text, FormatterConstants.GetPseudoOps((PseudoOpsKind)flags));
					break;
				}
				case CtorKind.Reg16:
					instrInfo = new SimpleInstrInfo_Reg16(text);
					break;
				case CtorKind.Reg32:
					instrInfo = new SimpleInstrInfo_Reg32(text);
					break;
				case CtorKind.reverse:
					instrInfo = new SimpleInstrInfo_reverse(text);
					break;
				case CtorKind.sae:
				{
					uint flags = dataReader.ReadCompressedUInt32();
					instrInfo = new SimpleInstrInfo_sae((int)flags, text);
					break;
				}
				case CtorKind.push_imm8:
				{
					uint flags = dataReader.ReadCompressedUInt32();
					uint sexInfoMem = dataReader.ReadByte();
					instrInfo = new SimpleInstrInfo_push_imm8((int)flags, (SignExtendInfo)sexInfoMem, text);
					break;
				}
				case CtorKind.push_imm:
				{
					uint flags = dataReader.ReadCompressedUInt32();
					uint sexInfoMem = dataReader.ReadByte();
					instrInfo = new SimpleInstrInfo_push_imm((int)flags, (SignExtendInfo)sexInfoMem, text);
					break;
				}
				case CtorKind.SignExt_3:
				{
					uint flags = dataReader.ReadByte();
					uint sexInfoMem = dataReader.ReadCompressedUInt32();
					instrInfo = new SimpleInstrInfo_SignExt((SignExtendInfo)flags, text, (InstrOpInfoFlags)sexInfoMem);
					break;
				}
				case CtorKind.SignExt_4:
				{
					uint flags = dataReader.ReadByte();
					uint sexInfoMem = dataReader.ReadByte();
					uint flags2 = dataReader.ReadCompressedUInt32();
					instrInfo = new SimpleInstrInfo_SignExt((SignExtendInfo)flags, (SignExtendInfo)sexInfoMem, text, (InstrOpInfoFlags)flags2);
					break;
				}
				case CtorKind.imul:
				{
					uint flags = dataReader.ReadByte();
					instrInfo = new SimpleInstrInfo_imul((SignExtendInfo)flags, text);
					break;
				}
				case CtorKind.STIG1:
				{
					uint flags = dataReader.ReadByte();
					if (flags > 1)
					{
						throw new InvalidOperationException();
					}
					instrInfo = new SimpleInstrInfo_STIG1(text, flags != 0);
					break;
				}
				case CtorKind.STIG2_2a:
				{
					uint flags = dataReader.ReadByte();
					if (flags > 1)
					{
						throw new InvalidOperationException();
					}
					instrInfo = new SimpleInstrInfo_STIG2(text, flags != 0);
					break;
				}
				case CtorKind.STIG2_2b:
				{
					uint flags = dataReader.ReadCompressedUInt32();
					instrInfo = new SimpleInstrInfo_STIG2(text, (InstrOpInfoFlags)flags);
					break;
				}
				case CtorKind.XLAT:
					instrInfo = new SimpleInstrInfo_XLAT(text);
					break;
				default:
					throw new InvalidOperationException();
				}
				array[i] = instrInfo;
				if (num2 >= 0)
				{
					dataReader.Index = num2;
				}
			}
			if (dataReader.CanRead)
			{
				throw new InvalidOperationException();
			}
			return array;
		}

		private static ReadOnlySpan<byte> GetSerializedInstrInfos()
		{
			return new byte[11737]
			{
				1, 128, 1, 10, 130, 1, 10, 132, 1, 10,
				134, 1, 10, 136, 1, 1, 4, 0, 0, 0,
				0, 0, 0, 0, 0, 0, 0, 18, 4, 4,
				0, 27, 3, 16, 27, 3, 32, 27, 12, 16,
				27, 12, 32, 1, 5, 0, 0, 0, 0, 0,
				0, 0, 0, 0, 0, 18, 5, 4, 0, 27,
				3, 16, 27, 3, 32, 27, 12, 16, 1, 6,
				0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
				18, 6, 4, 0, 27, 3, 16, 27, 3, 32,
				27, 12, 16, 27, 12, 32, 1, 7, 0, 0,
				0, 0, 0, 0, 0, 0, 0, 0, 18, 7,
				4, 0, 27, 3, 16, 27, 3, 32, 27, 12,
				16, 27, 12, 32, 1, 8, 0, 0, 0, 0,
				0, 0, 0, 0, 0, 0, 18, 8, 4, 0,
				1, 137, 1, 1, 9, 0, 0, 0, 0, 0,
				0, 0, 0, 0, 0, 18, 9, 4, 0, 1,
				138, 1, 1, 10, 0, 0, 0, 0, 0, 0,
				0, 0, 0, 0, 18, 10, 4, 0, 1, 139,
				1, 1, 11, 0, 0, 0, 0, 0, 0, 0,
				0, 0, 0, 18, 11, 4, 0, 1, 140, 1,
				1, 141, 1, 0, 1, 142, 1, 0, 1, 3,
				0, 0, 1, 12, 0, 0, 24, 143, 1, 1,
				24, 143, 1, 2, 24, 145, 1, 1, 24, 145,
				1, 2, 1, 147, 1, 0, 50, 148, 1, 0,
				1, 149, 1, 0, 0, 30, 3, 16, 5, 30,
				3, 32, 6, 30, 3, 64, 4, 49, 27, 5,
				49, 27, 6, 49, 27, 4, 46, 3, 16, 1,
				46, 3, 32, 2, 46, 3, 64, 3, 49, 27,
				1, 49, 27, 2, 49, 27, 3, 5, 152, 1,
				5, 153, 1, 5, 154, 1, 5, 156, 1, 5,
				157, 1, 5, 158, 1, 37, 159, 1, 0, 16,
				128, 6, 37, 159, 1, 0, 32, 128, 6, 37,
				159, 1, 0, 64, 128, 6, 37, 160, 1, 1,
				16, 128, 6, 37, 160, 1, 1, 32, 128, 6,
				37, 160, 1, 1, 64, 128, 6, 39, 161, 1,
				162, 1, 163, 1, 2, 16, 128, 6, 39, 161,
				1, 162, 1, 163, 1, 2, 32, 128, 6, 39,
				161, 1, 162, 1, 163, 1, 2, 64, 128, 6,
				39, 164, 1, 165, 1, 166, 1, 3, 16, 128,
				6, 39, 164, 1, 165, 1, 166, 1, 3, 32,
				128, 6, 39, 164, 1, 165, 1, 166, 1, 3,
				64, 128, 6, 38, 167, 1, 168, 1, 4, 16,
				128, 6, 38, 167, 1, 168, 1, 4, 32, 128,
				6, 38, 167, 1, 168, 1, 4, 64, 128, 6,
				38, 169, 1, 170, 1, 5, 16, 128, 6, 38,
				169, 1, 170, 1, 5, 32, 128, 6, 38, 169,
				1, 170, 1, 5, 64, 128, 6, 38, 171, 1,
				172, 1, 6, 16, 128, 6, 38, 171, 1, 172,
				1, 6, 32, 128, 6, 38, 171, 1, 172, 1,
				6, 64, 128, 6, 38, 173, 1, 174, 1, 7,
				16, 128, 6, 38, 173, 1, 174, 1, 7, 32,
				128, 6, 38, 173, 1, 174, 1, 7, 64, 128,
				6, 37, 175, 1, 8, 16, 128, 6, 37, 175,
				1, 8, 32, 128, 6, 37, 175, 1, 8, 64,
				128, 6, 37, 176, 1, 9, 16, 128, 6, 37,
				176, 1, 9, 32, 128, 6, 37, 176, 1, 9,
				64, 128, 6, 38, 177, 1, 178, 1, 10, 16,
				128, 6, 38, 177, 1, 178, 1, 10, 32, 128,
				6, 38, 177, 1, 178, 1, 10, 64, 128, 6,
				38, 179, 1, 180, 1, 11, 16, 128, 6, 38,
				179, 1, 180, 1, 11, 32, 128, 6, 38, 179,
				1, 180, 1, 11, 64, 128, 6, 38, 181, 1,
				182, 1, 12, 16, 128, 6, 38, 181, 1, 182,
				1, 12, 32, 128, 6, 38, 181, 1, 182, 1,
				12, 64, 128, 6, 38, 183, 1, 184, 1, 13,
				16, 128, 6, 38, 183, 1, 184, 1, 13, 32,
				128, 6, 38, 183, 1, 184, 1, 13, 64, 128,
				6, 38, 185, 1, 186, 1, 14, 16, 128, 6,
				38, 185, 1, 186, 1, 14, 32, 128, 6, 38,
				185, 1, 186, 1, 14, 64, 128, 6, 38, 187,
				1, 188, 1, 15, 16, 128, 6, 38, 187, 1,
				188, 1, 15, 32, 128, 6, 38, 187, 1, 188,
				1, 15, 64, 128, 6, 2, 4, 6, 2, 5,
				6, 2, 6, 6, 2, 7, 6, 2, 8, 6,
				2, 9, 6, 2, 10, 6, 2, 11, 6, 2,
				4, 6, 0, 18, 4, 4, 6, 2, 5, 6,
				0, 18, 5, 4, 6, 2, 6, 6, 0, 18,
				6, 4, 6, 2, 7, 6, 0, 18, 7, 4,
				6, 2, 8, 6, 0, 18, 8, 4, 6, 2,
				9, 6, 0, 18, 9, 4, 6, 2, 10, 6,
				0, 18, 10, 4, 6, 2, 11, 6, 0, 18,
				11, 4, 6, 2, 4, 6, 2, 5, 6, 2,
				6, 6, 2, 7, 6, 2, 8, 6, 2, 9,
				6, 2, 10, 6, 2, 11, 6, 18, 4, 1,
				6, 18, 4, 2, 6, 18, 4, 3, 6, 18,
				5, 1, 6, 18, 5, 2, 6, 18, 5, 3,
				6, 18, 6, 1, 6, 18, 6, 2, 6, 18,
				6, 3, 6, 18, 7, 1, 6, 18, 7, 2,
				6, 18, 7, 3, 6, 18, 8, 1, 6, 18,
				8, 2, 6, 18, 8, 3, 6, 18, 9, 1,
				6, 18, 9, 2, 6, 18, 9, 3, 6, 18,
				10, 1, 6, 18, 10, 2, 6, 18, 10, 3,
				6, 18, 11, 1, 6, 18, 11, 2, 6, 18,
				11, 3, 6, 1, 13, 0, 0, 0, 52, 61,
				0, 0, 0, 1, 1, 0, 0, 0, 0, 0,
				0, 0, 42, 1, 16, 42, 1, 32, 42, 1,
				64, 1, 189, 1, 0, 0, 42, 1, 16, 42,
				1, 32, 42, 1, 64, 2, 12, 6, 0, 0,
				23, 2, 16, 21, 23, 2, 96, 37, 23, 2,
				0, 53, 1, 61, 0, 0, 1, 190, 1, 1,
				192, 1, 1, 193, 1, 1, 195, 1, 1, 197,
				1, 1, 199, 1, 1, 201, 1, 14, 43, 16,
				14, 43, 32, 1, 205, 1, 24, 206, 1, 1,
				24, 206, 1, 2, 24, 206, 1, 3, 24, 209,
				1, 1, 24, 209, 1, 2, 24, 209, 1, 3,
				1, 212, 1, 1, 213, 1, 21, 1, 0, 0,
				0, 0, 0, 0, 0, 5, 216, 1, 5, 217,
				1, 5, 37, 5, 218, 1, 5, 220, 1, 5,
				221, 1, 5, 157, 6, 5, 222, 1, 1, 13,
				0, 0, 18, 13, 0, 0, 5, 224, 1, 5,
				225, 1, 5, 226, 1, 5, 227, 1, 5, 229,
				1, 5, 230, 1, 5, 231, 1, 5, 232, 1,
				5, 234, 1, 5, 235, 1, 5, 236, 1, 5,
				237, 1, 1, 1, 0, 0, 0, 2, 29, 6,
				2, 30, 6, 2, 31, 6, 2, 32, 6, 2,
				18, 6, 2, 33, 6, 2, 41, 6, 2, 34,
				6, 2, 29, 6, 0, 0, 2, 30, 6, 0,
				0, 2, 31, 6, 0, 0, 2, 32, 6, 0,
				0, 2, 18, 6, 0, 0, 2, 33, 6, 0,
				0, 2, 41, 6, 0, 0, 2, 34, 6, 0,
				0, 25, 42, 42, 238, 1, 238, 1, 25, 42,
				239, 1, 42, 239, 1, 8, 42, 0, 25, 42,
				42, 238, 1, 238, 1, 25, 42, 239, 1, 42,
				239, 1, 8, 42, 0, 2, 242, 1, 1, 0,
				2, 243, 1, 1, 0, 2, 1, 6, 1, 244,
				1, 2, 1, 6, 0, 9, 1, 6, 4, 6,
				1, 245, 1, 0, 27, 246, 1, 16, 27, 246,
				1, 32, 27, 246, 1, 64, 27, 247, 1, 16,
				27, 247, 1, 32, 27, 247, 1, 64, 26, 249,
				1, 119, 16, 26, 249, 1, 100, 96, 26, 249,
				1, 113, 0, 26, 249, 1, 119, 16, 26, 249,
				1, 100, 96, 26, 249, 1, 113, 0, 1, 253,
				1, 1, 254, 1, 1, 255, 1, 26, 128, 2,
				119, 16, 26, 128, 2, 100, 96, 26, 128, 2,
				113, 0, 2, 29, 6, 2, 30, 6, 2, 31,
				6, 2, 32, 6, 2, 18, 6, 2, 33, 6,
				2, 41, 6, 2, 34, 6, 2, 29, 6, 0,
				0, 2, 30, 6, 0, 0, 2, 31, 6, 0,
				0, 2, 32, 6, 0, 0, 2, 18, 6, 0,
				0, 2, 33, 6, 0, 0, 2, 41, 6, 0,
				0, 2, 34, 6, 0, 0, 2, 29, 6, 2,
				30, 6, 2, 31, 6, 2, 32, 6, 2, 18,
				6, 2, 33, 6, 2, 41, 6, 2, 34, 6,
				2, 29, 6, 0, 0, 2, 30, 6, 0, 0,
				2, 31, 6, 0, 0, 2, 32, 6, 0, 0,
				2, 18, 6, 0, 0, 2, 33, 6, 0, 0,
				2, 41, 6, 0, 0, 2, 34, 6, 0, 0,
				3, 131, 2, 3, 132, 2, 1, 133, 2, 11,
				135, 2, 2, 136, 2, 6, 2, 137, 2, 6,
				2, 138, 2, 6, 2, 139, 2, 6, 2, 140,
				2, 6, 2, 141, 2, 6, 2, 142, 2, 6,
				2, 143, 2, 6, 19, 136, 2, 0, 19, 137,
				2, 0, 19, 138, 2, 1, 19, 139, 2, 1,
				19, 140, 2, 0, 19, 141, 2, 0, 19, 142,
				2, 0, 19, 143, 2, 0, 2, 144, 2, 6,
				2, 145, 2, 6, 2, 125, 6, 44, 146, 2,
				16, 1, 44, 146, 2, 96, 1, 1, 147, 2,
				44, 148, 2, 16, 1, 44, 149, 2, 16, 1,
				44, 148, 2, 96, 1, 44, 149, 2, 96, 1,
				1, 150, 2, 1, 151, 2, 1, 144, 2, 19,
				152, 2, 1, 1, 153, 2, 1, 154, 2, 1,
				155, 2, 1, 156, 2, 1, 157, 2, 1, 158,
				2, 1, 159, 2, 1, 160, 2, 1, 161, 2,
				1, 162, 2, 1, 163, 2, 1, 164, 2, 1,
				165, 2, 1, 166, 2, 1, 167, 2, 1, 168,
				2, 1, 169, 2, 1, 170, 2, 1, 171, 2,
				1, 172, 2, 1, 173, 2, 1, 174, 2, 1,
				175, 2, 1, 176, 2, 1, 177, 2, 1, 178,
				2, 1, 179, 2, 1, 180, 2, 1, 181, 2,
				2, 182, 2, 6, 2, 183, 2, 6, 2, 184,
				2, 6, 2, 185, 2, 6, 2, 186, 2, 6,
				2, 187, 2, 6, 2, 188, 2, 6, 2, 189,
				2, 6, 19, 190, 2, 0, 19, 191, 2, 0,
				19, 192, 2, 0, 19, 193, 2, 0, 1, 194,
				2, 2, 195, 2, 6, 2, 196, 2, 6, 2,
				197, 2, 6, 2, 198, 2, 6, 2, 144, 2,
				6, 2, 125, 6, 19, 199, 2, 0, 19, 200,
				2, 0, 19, 201, 2, 0, 19, 202, 2, 0,
				1, 203, 2, 1, 204, 2, 1, 205, 2, 1,
				206, 2, 1, 207, 2, 1, 208, 2, 1, 209,
				2, 1, 210, 2, 1, 211, 2, 1, 212, 2,
				1, 213, 2, 19, 214, 2, 0, 19, 215, 2,
				0, 2, 136, 2, 6, 2, 137, 2, 6, 2,
				138, 2, 6, 2, 139, 2, 6, 2, 140, 2,
				6, 2, 141, 2, 6, 2, 142, 2, 6, 2,
				143, 2, 6, 6, 136, 2, 128, 128, 8, 6,
				137, 2, 128, 128, 8, 19, 138, 2, 1, 19,
				139, 2, 1, 6, 141, 2, 128, 128, 8, 6,
				140, 2, 128, 128, 8, 6, 143, 2, 128, 128,
				8, 6, 142, 2, 128, 128, 8, 2, 144, 2,
				6, 2, 196, 2, 6, 2, 145, 2, 6, 2,
				125, 6, 44, 217, 2, 16, 1, 44, 217, 2,
				96, 1, 44, 218, 2, 16, 1, 44, 219, 2,
				16, 1, 44, 218, 2, 96, 1, 44, 219, 2,
				96, 1, 1, 220, 2, 1, 221, 2, 1, 222,
				2, 19, 152, 2, 1, 1, 145, 2, 1, 125,
				19, 223, 2, 1, 19, 224, 2, 1, 2, 182,
				2, 6, 2, 183, 2, 6, 2, 184, 2, 6,
				2, 185, 2, 6, 2, 186, 2, 6, 2, 187,
				2, 6, 2, 188, 2, 6, 2, 189, 2, 6,
				20, 225, 2, 1, 20, 226, 2, 1, 19, 139,
				2, 1, 1, 227, 2, 20, 229, 2, 1, 20,
				228, 2, 1, 20, 231, 2, 1, 20, 230, 2,
				1, 2, 195, 2, 6, 2, 196, 2, 6, 2,
				197, 2, 6, 2, 198, 2, 6, 2, 232, 2,
				2, 2, 195, 2, 6, 2, 234, 2, 2, 2,
				198, 2, 6, 1, 236, 2, 19, 152, 2, 1,
				1, 125, 0, 1, 220, 2, 1, 221, 2, 1,
				237, 2, 1, 238, 2, 19, 239, 2, 0, 19,
				240, 2, 0, 40, 126, 241, 2, 5, 16, 22,
				40, 126, 241, 2, 5, 32, 22, 40, 126, 241,
				2, 5, 16, 38, 40, 126, 241, 2, 5, 32,
				38, 40, 126, 241, 2, 5, 64, 38, 40, 126,
				241, 2, 5, 16, 54, 40, 126, 241, 2, 5,
				64, 54, 40, 127, 244, 2, 4, 16, 22, 40,
				127, 244, 2, 4, 32, 22, 40, 127, 244, 2,
				4, 16, 38, 40, 127, 244, 2, 4, 32, 38,
				40, 127, 244, 2, 4, 64, 38, 40, 127, 244,
				2, 4, 16, 54, 40, 127, 244, 2, 4, 64,
				54, 41, 247, 2, 16, 22, 41, 247, 2, 32,
				22, 41, 247, 2, 16, 38, 41, 247, 2, 32,
				38, 41, 247, 2, 64, 38, 41, 247, 2, 16,
				54, 41, 247, 2, 64, 54, 27, 249, 2, 16,
				27, 249, 2, 32, 27, 250, 2, 16, 27, 250,
				2, 32, 27, 250, 2, 64, 27, 251, 2, 16,
				27, 251, 2, 64, 1, 252, 2, 0, 0, 1,
				253, 2, 0, 0, 29, 43, 16, 1, 29, 43,
				32, 1, 29, 43, 64, 1, 29, 28, 16, 1,
				29, 28, 32, 1, 29, 28, 64, 1, 14, 28,
				16, 14, 28, 32, 28, 28, 16, 128, 6, 28,
				28, 32, 128, 6, 28, 28, 64, 128, 6, 1,
				252, 2, 0, 0, 1, 253, 2, 0, 0, 1,
				255, 2, 1, 128, 3, 1, 129, 3, 2, 13,
				6, 0, 2, 130, 3, 6, 2, 131, 3, 6,
				2, 132, 3, 6, 2, 27, 6, 2, 133, 3,
				6, 2, 134, 3, 6, 2, 13, 6, 0, 18,
				13, 0, 6, 2, 13, 6, 0, 18, 13, 0,
				6, 2, 130, 3, 6, 0, 0, 2, 131, 3,
				6, 0, 0, 2, 132, 3, 6, 0, 0, 2,
				27, 6, 0, 0, 2, 133, 3, 6, 0, 0,
				2, 134, 3, 6, 0, 0, 1, 135, 3, 1,
				136, 3, 1, 137, 3, 1, 138, 3, 1, 139,
				3, 1, 140, 3, 2, 141, 1, 6, 2, 142,
				1, 6, 2, 141, 1, 6, 0, 0, 2, 142,
				1, 6, 0, 0, 8, 43, 6, 0, 0, 15,
				43, 16, 15, 43, 32, 15, 43, 64, 8, 28,
				6, 0, 0, 15, 28, 16, 15, 28, 32, 15,
				28, 64, 2, 3, 6, 0, 0, 42, 143, 3,
				16, 42, 143, 3, 32, 42, 143, 3, 64, 42,
				144, 3, 16, 42, 144, 3, 32, 42, 144, 3,
				64, 43, 145, 3, 16, 43, 145, 3, 32, 43,
				145, 3, 64, 43, 146, 3, 16, 43, 146, 3,
				32, 43, 146, 3, 64, 43, 147, 3, 16, 43,
				147, 3, 32, 43, 147, 3, 64, 43, 148, 3,
				16, 43, 148, 3, 32, 43, 148, 3, 64, 2,
				149, 3, 6, 0, 42, 150, 3, 16, 42, 150,
				3, 32, 1, 150, 3, 42, 151, 3, 16, 42,
				151, 3, 32, 1, 151, 3, 42, 152, 3, 16,
				42, 152, 3, 32, 1, 152, 3, 42, 153, 3,
				16, 42, 153, 3, 32, 1, 153, 3, 42, 154,
				3, 16, 42, 154, 3, 32, 42, 154, 3, 64,
				1, 155, 3, 43, 156, 3, 16, 43, 156, 3,
				32, 43, 156, 3, 64, 1, 157, 3, 1, 158,
				3, 1, 159, 3, 1, 160, 3, 1, 161, 3,
				1, 162, 3, 1, 163, 3, 4, 164, 3, 16,
				4, 164, 3, 32, 4, 164, 3, 64, 1, 165,
				3, 1, 166, 3, 1, 167, 3, 1, 168, 3,
				1, 169, 3, 1, 170, 3, 1, 171, 3, 1,
				172, 3, 1, 173, 3, 1, 174, 3, 4, 175,
				3, 16, 4, 175, 3, 32, 4, 175, 3, 64,
				1, 176, 3, 4, 177, 3, 16, 4, 177, 3,
				32, 4, 177, 3, 64, 4, 178, 3, 16, 4,
				178, 3, 32, 4, 178, 3, 64, 1, 179, 3,
				1, 180, 3, 1, 181, 3, 16, 182, 3, 16,
				16, 182, 3, 32, 16, 182, 3, 64, 1, 183,
				3, 1, 184, 3, 1, 185, 3, 1, 186, 3,
				1, 187, 3, 1, 188, 3, 4, 189, 3, 16,
				4, 189, 3, 32, 4, 189, 3, 64, 1, 190,
				3, 1, 191, 3, 4, 192, 3, 16, 4, 192,
				3, 32, 4, 192, 3, 64, 1, 193, 3, 1,
				194, 3, 0, 0, 1, 195, 3, 0, 0, 1,
				196, 3, 1, 197, 3, 1, 198, 3, 1, 199,
				3, 1, 200, 3, 1, 202, 3, 2, 202, 3,
				24, 1, 204, 3, 1, 205, 3, 1, 206, 3,
				1, 207, 3, 1, 208, 3, 1, 2, 0, 0,
				2, 209, 3, 1, 2, 211, 3, 1, 1, 212,
				3, 1, 213, 3, 1, 214, 3, 0, 0, 0,
				0, 0, 1, 35, 129, 35, 128, 128, 128, 128,
				1, 36, 129, 36, 128, 128, 128, 128, 1, 38,
				129, 38, 128, 128, 128, 1, 37, 129, 37, 128,
				128, 128, 1, 35, 129, 35, 128, 128, 128, 128,
				1, 36, 129, 36, 128, 128, 128, 128, 1, 38,
				129, 38, 128, 128, 128, 1, 37, 129, 37, 128,
				128, 128, 1, 215, 3, 1, 216, 3, 129, 215,
				3, 129, 216, 3, 129, 215, 3, 129, 216, 3,
				1, 217, 3, 129, 217, 3, 128, 1, 218, 3,
				129, 218, 3, 128, 128, 128, 128, 1, 219, 3,
				129, 219, 3, 128, 128, 128, 128, 1, 216, 3,
				129, 216, 3, 128, 1, 217, 3, 129, 217, 3,
				128, 1, 220, 3, 129, 220, 3, 128, 128, 128,
				128, 1, 221, 3, 129, 221, 3, 128, 128, 128,
				128, 1, 222, 3, 129, 222, 3, 128, 128, 128,
				128, 1, 223, 3, 129, 223, 3, 128, 128, 128,
				128, 1, 224, 3, 129, 224, 3, 128, 1, 225,
				3, 129, 225, 3, 128, 1, 226, 3, 129, 226,
				3, 128, 1, 227, 3, 129, 227, 3, 128, 128,
				128, 128, 1, 225, 3, 129, 225, 3, 128, 1,
				226, 3, 129, 226, 3, 128, 1, 2, 0, 0,
				0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
				0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
				0, 1, 228, 3, 1, 229, 3, 1, 230, 3,
				1, 231, 3, 2, 232, 3, 1, 2, 233, 3,
				1, 0, 2, 234, 3, 1, 0, 2, 235, 3,
				1, 0, 2, 236, 3, 1, 2, 233, 3, 1,
				0, 2, 237, 3, 1, 0, 2, 238, 3, 1,
				0, 2, 239, 3, 1, 1, 240, 3, 1, 241,
				3, 1, 242, 3, 1, 243, 3, 2, 2, 6,
				0, 0, 1, 1, 0, 0, 0, 0, 0, 0,
				0, 0, 0, 1, 19, 129, 19, 128, 128, 128,
				128, 1, 20, 129, 20, 128, 128, 128, 128, 1,
				19, 129, 19, 128, 128, 128, 128, 1, 20, 129,
				20, 128, 128, 128, 128, 1, 244, 3, 1, 245,
				3, 2, 246, 3, 6, 0, 130, 246, 3, 6,
				128, 141, 246, 3, 2, 6, 128, 2, 247, 3,
				6, 0, 130, 247, 3, 6, 128, 141, 247, 3,
				2, 6, 128, 1, 248, 3, 129, 248, 3, 128,
				128, 128, 128, 1, 249, 3, 129, 249, 3, 128,
				128, 128, 128, 1, 250, 3, 1, 251, 3, 1,
				252, 3, 1, 253, 3, 1, 254, 3, 0, 129,
				254, 3, 128, 150, 254, 3, 2, 128, 1, 255,
				3, 0, 129, 255, 3, 128, 150, 255, 3, 2,
				128, 1, 128, 4, 1, 129, 4, 1, 130, 4,
				0, 129, 130, 4, 128, 140, 130, 4, 2, 128,
				1, 131, 4, 0, 129, 131, 4, 128, 140, 131,
				4, 2, 128, 1, 132, 4, 129, 132, 4, 150,
				132, 4, 2, 1, 133, 4, 129, 133, 4, 150,
				133, 4, 2, 1, 134, 4, 1, 135, 4, 129,
				134, 4, 129, 135, 4, 150, 134, 4, 2, 150,
				135, 4, 2, 1, 136, 4, 1, 137, 4, 1,
				138, 4, 1, 139, 4, 1, 140, 4, 1, 141,
				4, 2, 141, 4, 24, 1, 143, 4, 31, 144,
				4, 0, 0, 0, 31, 145, 4, 1, 0, 0,
				33, 146, 4, 147, 4, 148, 4, 2, 0, 0,
				33, 149, 4, 150, 4, 151, 4, 3, 0, 0,
				32, 152, 4, 153, 4, 4, 0, 0, 32, 154,
				4, 155, 4, 5, 0, 0, 32, 156, 4, 157,
				4, 6, 0, 0, 32, 158, 4, 159, 4, 7,
				0, 0, 31, 160, 4, 8, 0, 0, 31, 161,
				4, 9, 0, 0, 32, 162, 4, 163, 4, 10,
				0, 0, 32, 164, 4, 165, 4, 11, 0, 0,
				32, 166, 4, 167, 4, 12, 0, 0, 32, 168,
				4, 169, 4, 13, 0, 0, 32, 170, 4, 171,
				4, 14, 0, 0, 32, 172, 4, 173, 4, 15,
				0, 0, 1, 174, 4, 1, 175, 4, 1, 176,
				4, 1, 177, 4, 1, 178, 4, 1, 179, 4,
				1, 180, 4, 1, 181, 4, 1, 182, 4, 1,
				183, 4, 1, 184, 4, 1, 185, 4, 1, 186,
				4, 1, 187, 4, 1, 188, 4, 1, 189, 4,
				1, 190, 4, 1, 191, 4, 1, 192, 4, 1,
				193, 4, 1, 194, 4, 1, 195, 4, 1, 196,
				4, 1, 197, 4, 1, 198, 4, 1, 199, 4,
				1, 200, 4, 1, 201, 4, 1, 202, 4, 1,
				203, 4, 1, 204, 4, 1, 205, 4, 0, 129,
				205, 4, 128, 128, 128, 1, 206, 4, 0, 129,
				206, 4, 128, 128, 128, 1, 207, 4, 129, 207,
				4, 128, 128, 128, 140, 207, 4, 2, 1, 208,
				4, 129, 208, 4, 128, 128, 128, 140, 208, 4,
				2, 1, 209, 4, 129, 209, 4, 140, 209, 4,
				3, 1, 210, 4, 129, 210, 4, 140, 210, 4,
				3, 1, 211, 4, 129, 211, 4, 128, 1, 212,
				4, 129, 212, 4, 1, 213, 4, 129, 213, 4,
				128, 1, 214, 4, 129, 214, 4, 1, 215, 4,
				129, 215, 4, 128, 128, 128, 128, 1, 216, 4,
				129, 216, 4, 128, 128, 128, 128, 1, 217, 4,
				129, 217, 4, 128, 128, 128, 128, 1, 218, 4,
				129, 218, 4, 128, 128, 128, 128, 1, 219, 4,
				129, 219, 4, 128, 128, 128, 128, 1, 220, 4,
				129, 220, 4, 128, 128, 128, 128, 1, 221, 4,
				129, 221, 4, 128, 128, 128, 128, 1, 222, 4,
				129, 222, 4, 128, 128, 128, 128, 1, 62, 129,
				62, 128, 128, 128, 140, 62, 3, 1, 63, 129,
				63, 128, 128, 128, 140, 63, 3, 1, 223, 4,
				129, 223, 4, 140, 223, 4, 3, 1, 224, 4,
				129, 224, 4, 140, 224, 4, 3, 1, 64, 129,
				64, 128, 128, 128, 140, 64, 3, 1, 65, 129,
				65, 128, 128, 128, 140, 65, 3, 1, 225, 4,
				129, 225, 4, 140, 225, 4, 3, 1, 226, 4,
				129, 226, 4, 140, 226, 4, 3, 1, 66, 129,
				66, 128, 128, 128, 150, 66, 2, 1, 67, 130,
				67, 6, 128, 135, 67, 6, 128, 140, 67, 2,
				1, 227, 4, 129, 227, 4, 150, 227, 4, 3,
				1, 228, 4, 129, 228, 4, 140, 228, 4, 3,
				1, 229, 4, 129, 229, 4, 128, 128, 128, 140,
				229, 4, 2, 7, 230, 4, 6, 0, 12, 230,
				4, 2, 1, 231, 4, 129, 231, 4, 128, 128,
				128, 140, 231, 4, 2, 1, 232, 4, 129, 232,
				4, 128, 128, 128, 150, 232, 4, 2, 1, 68,
				129, 68, 128, 128, 128, 140, 68, 3, 1, 69,
				129, 69, 128, 128, 128, 140, 69, 3, 1, 233,
				4, 129, 233, 4, 140, 233, 4, 3, 1, 234,
				4, 129, 234, 4, 140, 234, 4, 3, 1, 235,
				4, 129, 235, 4, 128, 128, 128, 150, 235, 4,
				3, 1, 236, 4, 129, 236, 4, 128, 128, 128,
				150, 236, 4, 3, 1, 237, 4, 129, 237, 4,
				150, 237, 4, 3, 1, 238, 4, 129, 238, 4,
				150, 238, 4, 3, 1, 239, 4, 129, 239, 4,
				128, 128, 128, 140, 239, 4, 3, 1, 240, 4,
				129, 240, 4, 128, 128, 128, 140, 240, 4, 3,
				1, 241, 4, 129, 241, 4, 140, 241, 4, 3,
				1, 242, 4, 129, 242, 4, 140, 242, 4, 3,
				1, 243, 4, 129, 243, 4, 128, 128, 128, 150,
				243, 4, 3, 1, 244, 4, 129, 244, 4, 128,
				128, 128, 150, 244, 4, 3, 1, 245, 4, 129,
				245, 4, 150, 245, 4, 3, 1, 246, 4, 129,
				246, 4, 150, 246, 4, 3, 1, 70, 0, 129,
				70, 128, 128, 128, 128, 1, 71, 0, 129, 71,
				128, 128, 128, 128, 1, 72, 0, 129, 72, 128,
				128, 128, 128, 1, 73, 0, 129, 73, 128, 128,
				128, 128, 1, 74, 0, 129, 74, 128, 128, 128,
				128, 1, 75, 0, 129, 75, 128, 128, 128, 128,
				1, 46, 0, 129, 46, 128, 128, 128, 128, 1,
				76, 0, 129, 76, 128, 128, 128, 128, 1, 77,
				0, 129, 77, 128, 128, 128, 128, 1, 78, 0,
				129, 78, 128, 128, 128, 128, 1, 79, 0, 129,
				79, 128, 128, 128, 128, 1, 80, 0, 129, 80,
				128, 128, 128, 128, 1, 247, 4, 129, 247, 4,
				128, 128, 128, 128, 1, 248, 4, 129, 248, 4,
				128, 128, 128, 128, 1, 47, 1, 14, 1, 47,
				1, 14, 129, 47, 129, 14, 129, 47, 129, 14,
				1, 14, 1, 249, 4, 129, 249, 4, 128, 1,
				48, 0, 0, 1, 49, 0, 0, 1, 250, 4,
				129, 250, 4, 128, 1, 251, 4, 0, 0, 1,
				252, 4, 0, 0, 1, 253, 4, 0, 0, 1,
				254, 4, 0, 0, 1, 255, 4, 1, 81, 129,
				81, 128, 128, 128, 128, 1, 128, 5, 129, 128,
				5, 128, 128, 128, 128, 1, 129, 5, 129, 129,
				5, 128, 128, 128, 128, 1, 21, 0, 129, 21,
				128, 128, 128, 128, 1, 22, 0, 129, 22, 128,
				128, 128, 128, 1, 23, 0, 129, 23, 128, 128,
				128, 128, 1, 130, 5, 0, 0, 1, 131, 5,
				0, 0, 1, 132, 5, 0, 0, 1, 133, 5,
				0, 0, 1, 15, 0, 129, 15, 128, 128, 128,
				128, 1, 16, 0, 129, 16, 128, 128, 128, 128,
				1, 134, 5, 0, 0, 1, 17, 0, 129, 17,
				128, 128, 128, 128, 1, 24, 0, 129, 24, 128,
				128, 128, 128, 1, 135, 5, 129, 135, 5, 128,
				128, 128, 128, 1, 25, 0, 129, 25, 128, 128,
				128, 128, 1, 136, 5, 129, 136, 5, 128, 128,
				128, 128, 1, 82, 0, 129, 82, 128, 128, 128,
				128, 1, 83, 0, 129, 83, 128, 128, 128, 128,
				1, 50, 0, 129, 50, 128, 128, 128, 128, 1,
				137, 5, 1, 138, 5, 1, 139, 5, 1, 140,
				5, 0, 1, 141, 5, 0, 22, 141, 5, 2,
				7, 142, 5, 6, 0, 22, 142, 5, 2, 1,
				143, 5, 1, 144, 5, 0, 22, 144, 5, 2,
				1, 145, 5, 0, 22, 145, 5, 2, 22, 146,
				5, 2, 0, 1, 147, 5, 22, 148, 5, 2,
				0, 1, 149, 5, 0, 1, 150, 5, 0, 12,
				150, 5, 2, 7, 151, 5, 6, 0, 12, 151,
				5, 2, 1, 143, 5, 1, 152, 5, 0, 12,
				152, 5, 2, 1, 153, 5, 0, 12, 153, 5,
				2, 12, 154, 5, 2, 0, 1, 147, 5, 12,
				155, 5, 2, 0, 1, 156, 5, 0, 22, 156,
				5, 2, 1, 157, 5, 0, 22, 157, 5, 2,
				1, 158, 5, 0, 12, 158, 5, 2, 1, 159,
				5, 0, 12, 159, 5, 2, 1, 160, 5, 0,
				12, 160, 5, 2, 7, 161, 5, 6, 0, 12,
				161, 5, 2, 1, 162, 5, 0, 12, 162, 5,
				2, 1, 163, 5, 0, 12, 163, 5, 2, 13,
				164, 5, 2, 6, 0, 13, 165, 5, 2, 6,
				0, 1, 166, 5, 129, 166, 5, 128, 1, 167,
				5, 129, 167, 5, 128, 1, 168, 5, 129, 168,
				5, 128, 1, 169, 5, 129, 169, 5, 128, 1,
				47, 1, 14, 1, 47, 1, 14, 129, 47, 129,
				14, 129, 47, 129, 14, 1, 14, 129, 14, 128,
				1, 14, 1, 249, 4, 129, 249, 4, 128, 1,
				48, 0, 0, 1, 49, 0, 0, 1, 250, 4,
				129, 250, 4, 128, 1, 251, 4, 0, 0, 1,
				252, 4, 0, 0, 1, 253, 4, 0, 0, 1,
				254, 4, 0, 0, 34, 159, 1, 0, 16, 34,
				159, 1, 0, 32, 34, 159, 1, 0, 64, 34,
				160, 1, 1, 16, 34, 160, 1, 1, 32, 34,
				160, 1, 1, 64, 36, 161, 1, 162, 1, 163,
				1, 2, 16, 36, 161, 1, 162, 1, 163, 1,
				2, 32, 36, 161, 1, 162, 1, 163, 1, 2,
				64, 36, 164, 1, 165, 1, 166, 1, 3, 16,
				36, 164, 1, 165, 1, 166, 1, 3, 32, 36,
				164, 1, 165, 1, 166, 1, 3, 64, 35, 167,
				1, 168, 1, 4, 16, 35, 167, 1, 168, 1,
				4, 32, 35, 167, 1, 168, 1, 4, 64, 35,
				169, 1, 170, 1, 5, 16, 35, 169, 1, 170,
				1, 5, 32, 35, 169, 1, 170, 1, 5, 64,
				35, 171, 1, 172, 1, 6, 16, 35, 171, 1,
				172, 1, 6, 32, 35, 171, 1, 172, 1, 6,
				64, 35, 173, 1, 174, 1, 7, 16, 35, 173,
				1, 174, 1, 7, 32, 35, 173, 1, 174, 1,
				7, 64, 34, 175, 1, 8, 16, 34, 175, 1,
				8, 32, 34, 175, 1, 8, 64, 34, 176, 1,
				9, 16, 34, 176, 1, 9, 32, 34, 176, 1,
				9, 64, 35, 177, 1, 178, 1, 10, 16, 35,
				177, 1, 178, 1, 10, 32, 35, 177, 1, 178,
				1, 10, 64, 35, 179, 1, 180, 1, 11, 16,
				35, 179, 1, 180, 1, 11, 32, 35, 179, 1,
				180, 1, 11, 64, 35, 181, 1, 182, 1, 12,
				16, 35, 181, 1, 182, 1, 12, 32, 35, 181,
				1, 182, 1, 12, 64, 35, 183, 1, 184, 1,
				13, 16, 35, 183, 1, 184, 1, 13, 32, 35,
				183, 1, 184, 1, 13, 64, 35, 185, 1, 186,
				1, 14, 16, 35, 185, 1, 186, 1, 14, 32,
				35, 185, 1, 186, 1, 14, 64, 35, 187, 1,
				188, 1, 15, 16, 35, 187, 1, 188, 1, 15,
				32, 35, 187, 1, 188, 1, 15, 64, 31, 170,
				5, 0, 31, 171, 5, 1, 33, 172, 5, 173,
				5, 174, 5, 2, 33, 175, 5, 176, 5, 177,
				5, 3, 32, 178, 5, 179, 5, 4, 32, 180,
				5, 181, 5, 5, 32, 182, 5, 183, 5, 6,
				32, 184, 5, 185, 5, 7, 31, 186, 5, 8,
				31, 187, 5, 9, 32, 188, 5, 189, 5, 10,
				32, 190, 5, 191, 5, 11, 32, 192, 5, 193,
				5, 12, 32, 194, 5, 195, 5, 13, 32, 196,
				5, 197, 5, 14, 32, 198, 5, 199, 5, 15,
				1, 200, 5, 1, 201, 5, 1, 202, 5, 1,
				203, 5, 1, 200, 5, 1, 201, 5, 1, 202,
				5, 1, 203, 5, 1, 200, 5, 1, 202, 5,
				1, 203, 5, 1, 201, 5, 1, 200, 5, 1,
				202, 5, 1, 203, 5, 1, 201, 5, 1, 204,
				5, 1, 205, 5, 1, 206, 5, 1, 207, 5,
				1, 208, 5, 1, 209, 5, 1, 210, 5, 1,
				211, 5, 27, 3, 16, 27, 3, 32, 27, 3,
				64, 27, 12, 16, 27, 12, 32, 27, 12, 64,
				1, 212, 5, 1, 213, 5, 0, 0, 1, 214,
				5, 0, 0, 0, 0, 0, 4, 215, 5, 16,
				4, 215, 5, 32, 4, 215, 5, 64, 4, 216,
				5, 16, 4, 216, 5, 32, 4, 216, 5, 64,
				4, 217, 5, 16, 4, 217, 5, 32, 4, 217,
				5, 64, 1, 218, 5, 0, 4, 219, 5, 16,
				4, 219, 5, 32, 4, 219, 5, 64, 4, 220,
				5, 16, 4, 220, 5, 32, 4, 220, 5, 64,
				4, 221, 5, 16, 4, 221, 5, 32, 4, 221,
				5, 64, 4, 222, 5, 16, 4, 222, 5, 32,
				4, 222, 5, 64, 4, 223, 5, 16, 4, 223,
				5, 32, 4, 223, 5, 64, 4, 224, 5, 16,
				4, 224, 5, 32, 4, 224, 5, 64, 1, 225,
				5, 0, 1, 226, 5, 0, 0, 27, 3, 16,
				27, 3, 32, 27, 3, 64, 27, 12, 16, 27,
				12, 32, 27, 12, 64, 1, 227, 5, 1, 228,
				5, 0, 0, 1, 229, 5, 0, 0, 0, 0,
				0, 1, 230, 5, 1, 231, 5, 1, 232, 5,
				0, 1, 233, 5, 1, 234, 5, 1, 235, 5,
				0, 1, 236, 5, 1, 237, 5, 0, 129, 236,
				5, 1, 238, 5, 1, 239, 5, 0, 129, 238,
				5, 1, 240, 5, 1, 241, 5, 2, 242, 5,
				6, 0, 1, 243, 5, 1, 244, 5, 1, 245,
				5, 1, 246, 5, 1, 247, 5, 1, 248, 5,
				2, 249, 5, 1, 1, 250, 5, 51, 250, 5,
				1, 251, 5, 1, 252, 5, 0, 0, 1, 253,
				5, 51, 253, 5, 2, 254, 5, 1, 2, 255,
				5, 1, 1, 51, 0, 0, 0, 0, 0, 0,
				0, 1, 52, 0, 0, 0, 0, 0, 0, 0,
				1, 53, 0, 0, 0, 0, 0, 0, 0, 1,
				128, 6, 1, 27, 0, 0, 1, 129, 6, 0,
				0, 0, 2, 130, 6, 1, 0, 0, 1, 131,
				6, 0, 0, 2, 132, 6, 1, 0, 0, 2,
				133, 6, 1, 0, 0, 2, 135, 6, 6, 0,
				0, 0, 0, 0, 29, 149, 3, 16, 0, 29,
				149, 3, 32, 0, 1, 141, 6, 0, 0, 1,
				142, 6, 0, 0, 2, 213, 5, 6, 0, 0,
				2, 228, 5, 6, 0, 0, 2, 131, 6, 6,
				0, 0, 2, 143, 6, 6, 0, 0, 1, 143,
				6, 0, 0, 1, 144, 6, 0, 0, 1, 145,
				6, 0, 0, 1, 146, 6, 0, 0, 1, 147,
				6, 0, 0, 2, 149, 6, 6, 0, 0, 0,
				0, 0, 1, 155, 6, 0, 0, 0, 48, 84,
				0, 176, 84, 1, 128, 128, 128, 128, 48, 85,
				2, 176, 85, 3, 128, 128, 128, 128, 48, 156,
				6, 4, 176, 156, 6, 5, 128, 48, 157, 6,
				6, 176, 157, 6, 7, 128, 1, 158, 6, 0,
				1, 54, 51, 54, 1, 54, 0, 129, 54, 179,
				54, 129, 54, 179, 54, 1, 26, 51, 26, 1,
				26, 0, 129, 26, 128, 128, 128, 1, 159, 6,
				129, 159, 6, 128, 128, 128, 128, 1, 160, 6,
				129, 160, 6, 128, 128, 128, 128, 2, 161, 6,
				1, 2, 162, 6, 1, 1, 163, 6, 1, 164,
				6, 1, 165, 6, 1, 166, 6, 1, 167, 6,
				1, 168, 6, 2, 169, 6, 1, 2, 170, 6,
				1, 2, 171, 6, 1, 1, 172, 6, 0, 0,
				2, 173, 6, 1, 1, 174, 6, 0, 0, 1,
				175, 6, 0, 1, 176, 6, 0, 0, 1, 177,
				6, 129, 177, 6, 128, 1, 178, 6, 129, 178,
				6, 128, 1, 21, 0, 129, 21, 128, 128, 128,
				128, 1, 15, 0, 129, 15, 128, 128, 128, 128,
				1, 24, 0, 129, 24, 128, 128, 128, 128, 1,
				86, 0, 129, 86, 128, 128, 128, 128, 1, 87,
				0, 129, 87, 128, 128, 128, 128, 1, 14, 129,
				14, 128, 1, 179, 6, 1, 180, 6, 1, 55,
				51, 55, 1, 55, 51, 55, 129, 55, 128, 128,
				128, 1, 88, 0, 129, 88, 128, 128, 128, 128,
				1, 89, 0, 129, 89, 128, 128, 128, 128, 1,
				90, 0, 129, 90, 128, 128, 128, 128, 1, 181,
				6, 0, 129, 181, 6, 128, 1, 182, 6, 0,
				0, 1, 183, 6, 0, 0, 1, 91, 0, 129,
				91, 128, 128, 128, 128, 1, 92, 0, 129, 92,
				128, 128, 128, 128, 1, 93, 0, 129, 93, 128,
				128, 128, 128, 1, 184, 6, 0, 129, 184, 6,
				128, 1, 185, 6, 0, 0, 1, 186, 6, 0,
				0, 1, 94, 0, 129, 94, 128, 128, 128, 128,
				1, 22, 0, 129, 22, 128, 128, 128, 128, 1,
				16, 0, 129, 16, 128, 128, 128, 128, 1, 134,
				5, 0, 0, 1, 95, 0, 129, 95, 128, 128,
				128, 128, 1, 96, 0, 129, 96, 128, 128, 128,
				128, 1, 97, 0, 129, 97, 128, 128, 128, 128,
				1, 187, 6, 130, 187, 6, 6, 128, 135, 187,
				6, 6, 128, 150, 187, 6, 2, 1, 98, 129,
				98, 128, 128, 128, 140, 98, 2, 1, 188, 6,
				0, 12, 188, 6, 2, 1, 189, 6, 130, 189,
				6, 6, 128, 135, 189, 6, 6, 128, 140, 189,
				6, 2, 1, 190, 6, 1, 191, 6, 129, 191,
				6, 128, 128, 128, 128, 1, 99, 0, 129, 99,
				128, 128, 128, 128, 1, 100, 0, 129, 100, 128,
				128, 128, 128, 1, 101, 0, 129, 101, 128, 128,
				128, 128, 1, 192, 6, 0, 129, 192, 6, 128,
				1, 193, 6, 0, 0, 1, 194, 6, 0, 0,
				1, 102, 0, 129, 102, 128, 128, 128, 128, 1,
				103, 0, 129, 103, 128, 128, 128, 128, 1, 104,
				0, 129, 104, 128, 128, 128, 128, 1, 195, 6,
				0, 129, 195, 6, 128, 1, 196, 6, 0, 0,
				1, 197, 6, 0, 0, 1, 198, 6, 129, 198,
				6, 128, 1, 23, 0, 129, 23, 128, 128, 128,
				128, 1, 17, 0, 129, 17, 128, 128, 128, 128,
				1, 25, 0, 129, 25, 128, 128, 128, 128, 1,
				105, 0, 129, 105, 128, 128, 128, 128, 1, 106,
				0, 129, 106, 128, 128, 128, 128, 1, 107, 0,
				129, 107, 128, 128, 128, 128, 17, 199, 6, 17,
				200, 6, 145, 200, 6, 1, 108, 0, 129, 108,
				128, 128, 128, 128, 1, 109, 0, 129, 109, 128,
				128, 128, 128, 1, 56, 0, 129, 56, 128, 128,
				128, 128, 1, 110, 0, 129, 110, 128, 128, 128,
				128, 1, 111, 0, 129, 111, 128, 128, 128, 128,
				1, 112, 0, 129, 112, 128, 128, 128, 128, 1,
				57, 0, 129, 57, 128, 128, 128, 128, 1, 201,
				6, 0, 0, 1, 113, 0, 129, 113, 128, 128,
				128, 128, 1, 202, 6, 0, 129, 202, 6, 128,
				1, 203, 6, 0, 129, 203, 6, 128, 1, 204,
				6, 0, 129, 204, 6, 128, 1, 114, 0, 129,
				114, 128, 128, 128, 128, 1, 205, 6, 0, 129,
				205, 6, 128, 1, 206, 6, 0, 129, 206, 6,
				128, 1, 207, 6, 0, 129, 207, 6, 128, 1,
				208, 6, 0, 129, 208, 6, 128, 1, 209, 6,
				0, 129, 209, 6, 128, 1, 210, 6, 0, 129,
				210, 6, 128, 1, 115, 0, 129, 115, 128, 128,
				128, 128, 1, 39, 0, 0, 0, 0, 1, 40,
				0, 0, 0, 0, 1, 211, 6, 0, 1, 212,
				6, 0, 45, 213, 6, 0, 1, 214, 6, 0,
				0, 1, 215, 6, 0, 0, 1, 216, 6, 0,
				0, 1, 217, 6, 0, 0, 1, 218, 6, 0,
				0, 1, 219, 6, 0, 0, 1, 220, 6, 0,
				0, 0, 22, 220, 6, 2, 1, 221, 6, 0,
				0, 45, 222, 6, 0, 1, 223, 6, 0, 0,
				1, 224, 6, 0, 0, 1, 225, 6, 0, 0,
				45, 226, 6, 0, 1, 227, 6, 0, 0, 1,
				228, 6, 0, 0, 1, 229, 6, 0, 0, 1,
				230, 6, 0, 0, 1, 231, 6, 0, 1, 232,
				6, 129, 232, 6, 128, 1, 58, 0, 0, 0,
				0, 1, 233, 6, 1, 234, 6, 0, 1, 233,
				6, 0, 1, 235, 6, 1, 236, 6, 0, 1,
				237, 6, 0, 1, 238, 6, 1, 239, 6, 1,
				116, 0, 129, 116, 128, 128, 128, 128, 1, 117,
				0, 129, 117, 128, 128, 128, 128, 1, 118, 0,
				129, 118, 128, 128, 128, 128, 1, 240, 6, 0,
				0, 1, 241, 6, 129, 241, 6, 128, 128, 128,
				128, 1, 242, 6, 0, 0, 1, 243, 6, 129,
				243, 6, 128, 128, 128, 128, 1, 244, 6, 0,
				0, 1, 245, 6, 129, 245, 6, 128, 128, 128,
				128, 1, 246, 6, 0, 0, 1, 247, 6, 129,
				247, 6, 128, 128, 128, 128, 1, 248, 6, 0,
				0, 1, 249, 6, 129, 249, 6, 128, 128, 128,
				128, 1, 250, 6, 0, 0, 1, 251, 6, 129,
				251, 6, 128, 128, 128, 128, 1, 252, 6, 0,
				0, 1, 253, 6, 0, 0, 1, 254, 6, 0,
				0, 1, 255, 6, 0, 0, 1, 128, 7, 0,
				0, 1, 129, 7, 0, 0, 1, 130, 7, 0,
				0, 1, 131, 7, 0, 0, 1, 132, 7, 0,
				0, 1, 133, 7, 129, 133, 7, 128, 128, 128,
				128, 1, 134, 7, 0, 0, 1, 135, 7, 0,
				0, 1, 136, 7, 129, 136, 7, 128, 128, 128,
				128, 1, 137, 7, 0, 0, 1, 138, 7, 0,
				0, 1, 139, 7, 129, 139, 7, 128, 128, 128,
				128, 1, 140, 7, 0, 0, 1, 141, 7, 129,
				141, 7, 128, 128, 128, 128, 1, 142, 7, 0,
				1, 143, 7, 0, 12, 143, 7, 3, 1, 144,
				7, 0, 12, 144, 7, 3, 1, 145, 7, 0,
				12, 146, 7, 3, 12, 147, 7, 3, 1, 142,
				7, 0, 1, 145, 7, 0, 1, 148, 7, 129,
				148, 7, 128, 128, 128, 128, 1, 149, 7, 0,
				0, 1, 150, 7, 129, 150, 7, 128, 128, 128,
				128, 1, 151, 7, 0, 0, 1, 152, 7, 129,
				152, 7, 128, 128, 128, 128, 1, 153, 7, 0,
				0, 1, 154, 7, 129, 154, 7, 128, 128, 128,
				128, 1, 155, 7, 0, 0, 1, 156, 7, 129,
				156, 7, 128, 128, 128, 128, 1, 157, 7, 0,
				0, 1, 158, 7, 129, 158, 7, 128, 128, 128,
				128, 1, 159, 7, 0, 0, 1, 160, 7, 0,
				0, 1, 161, 7, 0, 1, 162, 7, 129, 162,
				7, 128, 128, 128, 128, 1, 163, 7, 129, 163,
				7, 128, 128, 128, 128, 1, 164, 7, 0, 0,
				1, 165, 7, 0, 0, 1, 119, 129, 119, 128,
				128, 128, 128, 1, 166, 7, 0, 0, 1, 167,
				7, 0, 0, 1, 168, 7, 0, 0, 1, 169,
				7, 129, 169, 7, 128, 128, 128, 128, 1, 170,
				7, 0, 0, 1, 120, 129, 120, 128, 128, 128,
				128, 1, 171, 7, 0, 0, 1, 172, 7, 129,
				172, 7, 128, 128, 128, 128, 1, 121, 129, 121,
				128, 128, 128, 128, 1, 173, 7, 0, 0, 1,
				174, 7, 129, 174, 7, 128, 128, 128, 128, 1,
				122, 129, 122, 128, 128, 128, 128, 1, 175, 7,
				0, 0, 1, 123, 129, 123, 128, 128, 128, 128,
				1, 176, 7, 0, 0, 1, 177, 7, 129, 177,
				7, 1, 178, 7, 0, 22, 178, 7, 2, 1,
				179, 7, 0, 22, 179, 7, 2, 22, 180, 7,
				3, 22, 181, 7, 3, 1, 182, 7, 0, 0,
				1, 183, 7, 0, 0, 1, 184, 7, 0, 1,
				185, 7, 0, 1, 184, 7, 0, 0, 1, 185,
				7, 0, 0, 1, 186, 7, 0, 0, 0, 0,
				1, 187, 7, 0, 0, 1, 188, 7, 0, 1,
				189, 7, 0, 1, 188, 7, 0, 0, 1, 189,
				7, 0, 0, 1, 190, 7, 0, 0, 1, 191,
				7, 0, 0, 1, 192, 7, 1, 193, 7, 1,
				194, 7, 0, 0, 1, 195, 7, 0, 0, 1,
				196, 7, 1, 197, 7, 1, 198, 7, 0, 0,
				1, 199, 7, 0, 0, 1, 200, 7, 0, 0,
				1, 201, 7, 0, 0, 1, 202, 7, 1, 203,
				7, 0, 0, 1, 204, 7, 1, 205, 7, 0,
				0, 1, 206, 7, 0, 0, 1, 207, 7, 0,
				0, 1, 208, 7, 0, 0, 1, 44, 0, 0,
				0, 0, 1, 45, 0, 1, 209, 7, 0, 0,
				1, 45, 0, 0, 1, 210, 7, 1, 211, 7,
				0, 1, 212, 7, 0, 1, 213, 7, 1, 214,
				7, 1, 215, 7, 0, 0, 1, 216, 7, 0,
				0, 1, 217, 7, 0, 0, 1, 218, 7, 0,
				0, 1, 219, 7, 0, 0, 1, 220, 7, 0,
				0, 1, 221, 7, 0, 0, 1, 222, 7, 0,
				0, 1, 223, 7, 0, 0, 1, 224, 7, 0,
				0, 1, 225, 7, 0, 0, 1, 226, 7, 0,
				0, 1, 227, 7, 0, 0, 1, 228, 7, 0,
				0, 1, 229, 7, 0, 0, 1, 230, 7, 0,
				0, 7, 231, 7, 6, 0, 1, 231, 7, 1,
				232, 7, 0, 0, 1, 233, 7, 0, 0, 1,
				234, 7, 0, 0, 1, 235, 7, 0, 0, 1,
				236, 7, 0, 0, 1, 237, 7, 0, 0, 1,
				238, 7, 0, 0, 1, 239, 7, 0, 0, 1,
				240, 7, 0, 0, 1, 59, 0, 0, 0, 0,
				1, 60, 0, 0, 0, 0, 1, 59, 0, 0,
				1, 60, 0, 0, 1, 44, 0, 0, 1, 45,
				0, 0, 1, 241, 7, 0, 0, 1, 242, 7,
				0, 0, 1, 243, 7, 0, 0, 1, 244, 7,
				0, 0, 1, 245, 7, 0, 0, 1, 246, 7,
				0, 0, 1, 247, 7, 0, 1, 248, 7, 0,
				1, 249, 7, 0, 1, 250, 7, 0, 0, 1,
				251, 7, 0, 0, 1, 252, 7, 0, 0, 1,
				253, 7, 0, 0, 1, 254, 7, 0, 0, 1,
				255, 7, 0, 0, 1, 128, 8, 0, 0, 1,
				129, 8, 0, 0, 1, 130, 8, 0, 0, 1,
				131, 8, 0, 1, 132, 8, 0, 1, 133, 8,
				0, 0, 1, 134, 8, 0, 0, 1, 131, 8,
				0, 1, 132, 8, 0, 1, 135, 8, 0, 0,
				1, 136, 8, 0, 1, 137, 8, 0, 1, 136,
				8, 0, 0, 1, 137, 8, 0, 0, 1, 138,
				8, 0, 1, 139, 8, 0, 1, 138, 8, 0,
				0, 1, 139, 8, 0, 0, 1, 140, 8, 0,
				1, 141, 8, 0, 1, 140, 8, 0, 0, 1,
				141, 8, 0, 0, 1, 142, 8, 0, 1, 143,
				8, 0, 1, 142, 8, 0, 0, 1, 143, 8,
				0, 0, 1, 144, 8, 0, 1, 145, 8, 0,
				1, 144, 8, 0, 12, 144, 8, 3, 1, 145,
				8, 0, 12, 145, 8, 3, 1, 146, 8, 0,
				1, 147, 8, 0, 1, 146, 8, 0, 12, 146,
				8, 3, 1, 147, 8, 0, 12, 147, 8, 3,
				1, 148, 8, 0, 1, 149, 8, 0, 1, 148,
				8, 0, 12, 148, 8, 3, 1, 149, 8, 0,
				12, 149, 8, 3, 1, 150, 8, 1, 151, 8,
				12, 150, 8, 3, 12, 151, 8, 3, 1, 152,
				8, 0, 1, 153, 8, 0, 1, 152, 8, 0,
				12, 152, 8, 3, 1, 153, 8, 0, 12, 153,
				8, 3, 1, 154, 8, 1, 155, 8, 1, 156,
				8, 12, 155, 8, 3, 12, 156, 8, 3, 1,
				157, 8, 1, 158, 8, 0, 1, 159, 8, 0,
				1, 158, 8, 0, 12, 158, 8, 3, 1, 159,
				8, 0, 12, 159, 8, 3, 1, 160, 8, 1,
				161, 8, 12, 160, 8, 3, 12, 161, 8, 3,
				1, 162, 8, 0, 1, 163, 8, 0, 1, 162,
				8, 0, 12, 162, 8, 3, 1, 163, 8, 0,
				12, 163, 8, 3, 1, 164, 8, 1, 165, 8,
				12, 164, 8, 3, 12, 165, 8, 3, 1, 166,
				8, 0, 0, 1, 167, 8, 0, 0, 1, 168,
				8, 0, 0, 1, 169, 8, 0, 0, 1, 170,
				8, 0, 0, 1, 171, 8, 0, 0, 1, 172,
				8, 0, 0, 1, 173, 8, 0, 0, 1, 174,
				8, 0, 1, 175, 8, 0, 1, 174, 8, 0,
				12, 174, 8, 3, 1, 175, 8, 0, 12, 175,
				8, 3, 1, 176, 8, 0, 1, 177, 8, 0,
				1, 176, 8, 0, 12, 176, 8, 3, 1, 177,
				8, 0, 12, 177, 8, 3, 1, 178, 8, 0,
				1, 179, 8, 0, 1, 178, 8, 0, 12, 178,
				8, 3, 1, 179, 8, 0, 12, 179, 8, 3,
				1, 180, 8, 1, 181, 8, 12, 180, 8, 3,
				12, 181, 8, 3, 1, 182, 8, 0, 1, 183,
				8, 0, 1, 182, 8, 0, 12, 182, 8, 3,
				1, 183, 8, 0, 12, 183, 8, 3, 1, 184,
				8, 1, 185, 8, 1, 186, 8, 12, 185, 8,
				3, 12, 186, 8, 3, 1, 187, 8, 1, 188,
				8, 0, 1, 189, 8, 0, 1, 188, 8, 0,
				12, 188, 8, 3, 1, 189, 8, 0, 12, 189,
				8, 3, 1, 190, 8, 1, 191, 8, 12, 190,
				8, 3, 12, 191, 8, 3, 1, 192, 8, 0,
				1, 193, 8, 0, 1, 192, 8, 0, 12, 192,
				8, 3, 1, 193, 8, 0, 12, 193, 8, 3,
				1, 194, 8, 1, 195, 8, 12, 194, 8, 3,
				12, 195, 8, 3, 1, 196, 8, 0, 0, 1,
				197, 8, 0, 0, 1, 198, 8, 0, 1, 199,
				8, 0, 1, 198, 8, 0, 12, 198, 8, 3,
				1, 199, 8, 0, 12, 199, 8, 3, 1, 200,
				8, 0, 1, 201, 8, 0, 1, 200, 8, 0,
				12, 200, 8, 3, 1, 201, 8, 0, 12, 201,
				8, 3, 1, 202, 8, 0, 1, 203, 8, 0,
				1, 202, 8, 0, 12, 202, 8, 3, 1, 203,
				8, 0, 12, 203, 8, 3, 1, 204, 8, 1,
				205, 8, 12, 204, 8, 3, 12, 205, 8, 3,
				1, 206, 8, 0, 1, 207, 8, 0, 1, 206,
				8, 0, 12, 206, 8, 3, 1, 207, 8, 0,
				12, 207, 8, 3, 1, 208, 8, 1, 209, 8,
				12, 208, 8, 3, 12, 209, 8, 3, 1, 210,
				8, 0, 1, 211, 8, 0, 1, 210, 8, 0,
				12, 210, 8, 3, 1, 211, 8, 0, 12, 211,
				8, 3, 1, 212, 8, 1, 213, 8, 12, 212,
				8, 3, 12, 213, 8, 3, 1, 214, 8, 0,
				1, 215, 8, 0, 1, 214, 8, 0, 12, 214,
				8, 3, 1, 215, 8, 0, 12, 215, 8, 3,
				1, 216, 8, 1, 217, 8, 12, 216, 8, 3,
				12, 217, 8, 3, 1, 218, 8, 0, 0, 1,
				219, 8, 0, 0, 1, 220, 8, 1, 221, 8,
				1, 222, 8, 1, 223, 8, 1, 224, 8, 1,
				225, 8, 1, 226, 8, 1, 227, 8, 1, 228,
				8, 1, 229, 8, 1, 230, 8, 1, 231, 8,
				1, 232, 8, 1, 233, 8, 1, 234, 8, 1,
				235, 8, 1, 236, 8, 22, 237, 8, 2, 22,
				238, 8, 2, 1, 239, 8, 1, 240, 8, 22,
				241, 8, 2, 22, 242, 8, 2, 45, 243, 8,
				68, 22, 244, 8, 3, 22, 245, 8, 3, 1,
				246, 8, 22, 247, 8, 2, 22, 248, 8, 2,
				1, 249, 8, 22, 250, 8, 3, 22, 251, 8,
				3, 1, 252, 8, 129, 252, 8, 128, 128, 128,
				128, 1, 253, 8, 129, 253, 8, 1, 254, 8,
				129, 254, 8, 128, 128, 128, 128, 1, 255, 8,
				129, 255, 8, 128, 128, 128, 128, 1, 128, 9,
				129, 128, 9, 128, 128, 128, 128, 1, 129, 9,
				129, 129, 9, 128, 128, 128, 128, 1, 130, 9,
				0, 0, 2, 131, 9, 6, 0, 1, 130, 9,
				0, 0, 2, 131, 9, 6, 0, 0, 1, 132,
				9, 0, 1, 133, 9, 0, 1, 134, 9, 0,
				1, 135, 9, 0, 1, 136, 9, 0, 1, 137,
				9, 1, 138, 9, 1, 139, 9, 0, 1, 140,
				9, 0, 1, 141, 9, 1, 142, 9, 1, 143,
				9, 0, 1, 144, 9, 0, 1, 145, 9, 0,
				1, 146, 9, 0, 1, 147, 9, 0, 1, 148,
				9, 0, 1, 149, 9, 0, 1, 150, 9, 0,
				0, 1, 151, 9, 0, 0, 1, 152, 9, 0,
				0, 1, 153, 9, 0, 1, 161, 7, 0, 0,
				1, 231, 6, 0, 0, 1, 154, 9, 0, 1,
				155, 9, 0, 0, 1, 156, 9, 0, 0, 1,
				39, 0, 0, 0, 0, 1, 40, 0, 0, 0,
				0, 1, 157, 9, 1, 158, 9, 129, 158, 9,
				128, 1, 159, 9, 0, 22, 159, 9, 2, 1,
				160, 9, 129, 160, 9, 128, 1, 161, 9, 0,
				22, 161, 9, 2, 1, 162, 9, 129, 162, 9,
				22, 163, 9, 3, 1, 164, 9, 129, 164, 9,
				22, 165, 9, 3, 1, 166, 9, 129, 166, 9,
				128, 1, 167, 9, 129, 167, 9, 128, 1, 168,
				9, 129, 168, 9, 128, 1, 124, 0, 129, 124,
				128, 128, 128, 128, 1, 169, 9, 0, 129, 169,
				9, 128, 128, 128, 1, 26, 0, 129, 26, 128,
				128, 128, 1, 170, 9, 1, 171, 9, 129, 170,
				9, 129, 171, 9, 129, 170, 9, 129, 171, 9,
				1, 172, 9, 0, 129, 172, 9, 128, 128, 128,
				1, 173, 9, 1, 174, 9, 0, 1, 175, 9,
				0, 1, 176, 9, 1, 177, 9, 0, 1, 178,
				9, 0, 1, 179, 9, 1, 180, 9, 1, 181,
				9, 1, 182, 9, 1, 183, 9, 0, 0, 0,
				22, 183, 9, 2, 48, 184, 9, 24, 0, 0,
				48, 185, 9, 25, 0, 0, 48, 186, 9, 20,
				0, 0, 48, 187, 9, 21, 0, 0, 1, 188,
				9, 51, 188, 9, 129, 188, 9, 179, 188, 9,
				129, 188, 9, 179, 188, 9, 1, 189, 9, 129,
				189, 9, 128, 1, 190, 9, 1, 191, 9, 129,
				190, 9, 129, 191, 9, 129, 190, 9, 129, 191,
				9, 1, 192, 9, 0, 1, 193, 9, 0, 1,
				194, 9, 0, 0, 1, 195, 9, 0, 0, 1,
				196, 9, 0, 22, 196, 9, 2, 1, 197, 9,
				0, 22, 197, 9, 2, 22, 198, 9, 3, 22,
				199, 9, 3, 1, 200, 9, 1, 201, 9, 1,
				202, 9, 1, 203, 9, 1, 204, 9, 1, 205,
				9, 1, 206, 9, 1, 207, 9, 1, 208, 9,
				1, 209, 9, 0, 1, 210, 9, 0, 1, 211,
				9, 1, 212, 9, 0, 1, 213, 9, 0, 1,
				214, 9, 1, 215, 9, 1, 216, 9, 1, 217,
				9, 48, 218, 9, 22, 0, 0, 48, 219, 9,
				23, 0, 0, 48, 220, 9, 18, 0, 0, 48,
				221, 9, 19, 0, 0, 1, 222, 9, 129, 222,
				9, 128, 1, 223, 9, 129, 223, 9, 1, 224,
				9, 129, 224, 9, 128, 1, 225, 9, 0, 0,
				1, 226, 9, 0, 1, 227, 9, 0, 47, 228,
				9, 8, 175, 228, 9, 9, 128, 128, 128, 128,
				1, 229, 9, 1, 230, 9, 0, 0, 0, 1,
				231, 9, 0, 0, 0, 129, 222, 6, 128, 129,
				226, 6, 128, 129, 213, 6, 128, 1, 232, 9,
				0, 22, 232, 9, 3, 1, 233, 9, 0, 22,
				233, 9, 3, 22, 234, 9, 3, 22, 235, 9,
				3, 1, 236, 9, 0, 22, 236, 9, 3, 1,
				237, 9, 0, 22, 237, 9, 3, 22, 238, 9,
				3, 22, 239, 9, 3, 1, 240, 9, 0, 22,
				240, 9, 2, 1, 241, 9, 0, 22, 241, 9,
				2, 22, 242, 9, 3, 22, 243, 9, 3, 1,
				244, 9, 0, 0, 0, 1, 245, 9, 0, 0,
				0, 1, 246, 9, 0, 0, 0, 1, 247, 9,
				0, 0, 0, 1, 248, 9, 1, 249, 9, 129,
				248, 9, 129, 249, 9, 1, 250, 9, 1, 251,
				9, 129, 250, 9, 129, 251, 9, 1, 252, 9,
				129, 252, 9, 1, 253, 9, 129, 253, 9, 7,
				254, 9, 6, 0, 0, 7, 255, 9, 6, 0,
				0, 1, 128, 10, 1, 129, 10, 1, 130, 10,
				0, 0, 0, 1, 131, 10, 0, 0, 0, 1,
				132, 10, 0, 1, 133, 10, 0, 1, 134, 10,
				0, 0, 0, 1, 135, 10, 0, 0, 0, 1,
				136, 10, 0, 1, 137, 10, 0, 1, 138, 10,
				0, 0, 1, 139, 10, 0, 0, 1, 140, 10,
				0, 0, 1, 141, 10, 0, 0, 1, 142, 10,
				0, 0, 1, 143, 10, 0, 0, 1, 144, 10,
				0, 0, 0, 1, 145, 10, 0, 0, 0, 1,
				146, 10, 0, 1, 147, 10, 0, 1, 148, 10,
				0, 0, 0, 1, 149, 10, 0, 0, 0, 1,
				150, 10, 0, 1, 151, 10, 0, 1, 152, 10,
				1, 153, 10, 129, 153, 10, 128, 128, 128, 128,
				1, 154, 10, 129, 154, 10, 128, 128, 128, 128,
				1, 155, 10, 129, 155, 10, 1, 156, 10, 0,
				1, 157, 10, 1, 158, 10, 1, 159, 10, 1,
				160, 10, 1, 161, 10, 1, 162, 10, 1, 163,
				10, 1, 164, 10, 1, 165, 10, 1, 166, 10,
				1, 167, 10, 0, 0, 0, 1, 168, 10, 0,
				1, 169, 10, 1, 170, 10, 1, 171, 10, 1,
				172, 10, 1, 173, 10, 1, 174, 10, 48, 175,
				10, 10, 48, 176, 10, 11, 48, 177, 10, 12,
				48, 178, 10, 13, 48, 179, 10, 14, 48, 180,
				10, 15, 48, 181, 10, 16, 48, 182, 10, 17,
				1, 183, 10, 0, 1, 184, 10, 0, 1, 185,
				10, 0, 1, 186, 10, 0, 1, 187, 10, 0,
				1, 188, 10, 0, 1, 189, 10, 0, 1, 190,
				10, 0, 1, 191, 10, 0, 1, 192, 10, 0,
				1, 193, 10, 0, 1, 194, 10, 0, 1, 195,
				10, 0, 1, 196, 10, 1, 197, 10, 1, 171,
				10, 0, 1, 172, 10, 0, 1, 173, 10, 0,
				1, 174, 10, 0, 1, 198, 10, 0, 1, 199,
				10, 0, 1, 200, 10, 0, 1, 201, 10, 0,
				1, 202, 10, 0, 1, 203, 10, 0, 1, 204,
				10, 0, 1, 205, 10, 0, 1, 206, 10, 1,
				207, 10, 1, 208, 10, 1, 209, 10, 1, 210,
				10, 1, 211, 10, 1, 212, 10, 1, 213, 10,
				1, 214, 10, 1, 215, 10, 1, 216, 10, 1,
				217, 10, 1, 218, 10, 1, 219, 10, 1, 220,
				10, 1, 146, 9, 0, 1, 221, 10, 0, 1,
				222, 10, 0, 1, 223, 10, 1, 224, 10, 1,
				225, 10, 1, 226, 10, 1, 227, 10, 1, 228,
				10, 1, 229, 10, 1, 230, 10, 1, 231, 10,
				1, 232, 10, 1, 233, 10, 1, 234, 10, 1,
				235, 10, 1, 236, 10, 1, 237, 10, 1, 238,
				10, 1, 239, 10, 1, 240, 10, 1, 241, 10,
				1, 242, 10, 1, 243, 10, 1, 244, 10, 1,
				245, 10, 1, 247, 10, 1, 248, 10, 1, 249,
				10, 1, 250, 10, 1, 251, 10, 1, 252, 10,
				4, 253, 10, 16, 4, 253, 10, 32, 4, 253,
				10, 64, 1, 254, 10, 1, 255, 10, 1, 128,
				11, 4, 129, 11, 16, 4, 129, 11, 32, 4,
				129, 11, 64, 1, 130, 11, 2, 211, 3, 1,
				2, 209, 3, 1, 0, 0, 0, 1, 201, 6,
				1, 132, 11, 2, 143, 4, 24, 1, 134, 11,
				1, 135, 11, 1, 136, 11, 1, 137, 11, 1,
				138, 11, 1, 139, 11, 1, 140, 11, 1, 141,
				11, 1, 142, 11, 1, 143, 11, 1, 144, 11,
				1, 145, 11, 1, 146, 11, 1, 147, 11, 1,
				148, 11, 1, 149, 11, 1, 150, 11, 1, 151,
				11, 1, 152, 11, 1, 153, 11, 1, 154, 11,
				1, 155, 11, 1, 156, 11, 1, 157, 11, 1,
				158, 11, 1, 159, 11, 1, 160, 11, 1, 161,
				11, 1, 162, 11, 1, 163, 11, 1, 164, 11,
				1, 165, 11, 1, 166, 11, 1, 167, 11, 1,
				168, 11, 1, 169, 11, 1, 170, 11, 1, 171,
				11, 1, 172, 11, 1, 173, 11, 1, 174, 11,
				1, 175, 11, 1, 176, 11, 1, 0, 0, 1,
				177, 11, 1, 0, 1, 178, 11, 1, 179, 11,
				1, 0, 0, 0, 0, 0, 1, 180, 11, 1,
				181, 11, 1, 182, 11, 1, 183, 11, 1, 184,
				11, 1, 185, 11, 1, 186, 11, 1, 187, 11,
				1, 188, 11, 1, 189, 11, 1, 190, 11, 1,
				191, 11, 1, 192, 11, 1, 193, 11, 1, 194,
				11, 1, 195, 11, 1, 58, 0, 1, 233, 6,
				1, 132, 11, 1, 196, 11, 1, 197, 11, 1,
				198, 11, 1, 199, 11, 1, 200, 11, 1, 201,
				11, 1, 198, 7, 0, 1, 199, 7, 0, 1,
				200, 7, 0, 1, 203, 7, 0, 4, 202, 11,
				16, 4, 202, 11, 32, 4, 202, 11, 64, 4,
				203, 11, 16, 4, 203, 11, 32, 4, 203, 11,
				64, 43, 204, 11, 16, 43, 204, 11, 32, 43,
				204, 11, 64, 1, 205, 11, 1, 206, 11, 1,
				207, 11, 0, 12, 207, 11, 3, 12, 208, 11,
				3, 48, 209, 11, 26, 0, 0, 48, 210, 11,
				27, 22, 211, 11, 2, 7, 212, 11, 6, 0,
				12, 212, 11, 2, 7, 213, 11, 6, 0, 13,
				213, 11, 2, 6, 1, 214, 11, 0, 12, 214,
				11, 2, 1, 215, 11, 0, 22, 215, 11, 2,
				1, 216, 11, 0, 22, 216, 11, 2, 1, 217,
				11, 0, 12, 217, 11, 2, 1, 218, 11, 0,
				12, 218, 11, 2, 1, 219, 11, 0, 12, 219,
				11, 2, 1, 220, 11, 0, 12, 220, 11, 2,
				1, 221, 11, 0, 12, 221, 11, 2, 7, 222,
				11, 6, 0, 12, 222, 11, 2, 7, 223, 11,
				6, 0, 13, 223, 11, 2, 6, 12, 224, 11,
				3, 22, 225, 11, 3, 12, 226, 11, 2, 0,
				22, 227, 11, 3, 12, 228, 11, 2, 0, 13,
				229, 11, 2, 6, 0, 12, 230, 11, 3, 1,
				231, 11, 0, 22, 231, 11, 2, 1, 232, 11,
				0, 22, 232, 11, 2, 1, 233, 11, 0, 22,
				233, 11, 2, 1, 234, 11, 0, 22, 234, 11,
				2, 1, 235, 11, 0, 22, 235, 11, 2, 1,
				236, 11, 0, 22, 236, 11, 2, 22, 237, 11,
				2, 0, 22, 238, 11, 2, 0, 7, 239, 11,
				6, 0, 12, 239, 11, 2, 7, 240, 11, 6,
				0, 13, 240, 11, 2, 6, 13, 241, 11, 2,
				6, 0, 1, 242, 11, 0, 12, 242, 11, 2,
				1, 243, 11, 0, 12, 243, 11, 2, 1, 244,
				11, 0, 12, 244, 11, 3, 12, 245, 11, 3,
				1, 246, 11, 0, 12, 246, 11, 3, 1, 247,
				11, 0, 12, 247, 11, 3, 12, 248, 11, 3,
				12, 249, 11, 3, 1, 250, 11, 0, 12, 250,
				11, 3, 1, 251, 11, 0, 12, 251, 11, 3,
				12, 252, 11, 3, 12, 253, 11, 3, 1, 254,
				11, 0, 12, 254, 11, 3, 1, 255, 11, 0,
				12, 255, 11, 3, 1, 128, 12, 0, 12, 128,
				12, 3, 1, 129, 12, 0, 12, 129, 12, 3,
				1, 130, 12, 0, 12, 130, 12, 3, 1, 131,
				12, 0, 12, 131, 12, 3, 1, 132, 12, 0,
				12, 132, 12, 3, 1, 133, 12, 0, 12, 133,
				12, 3, 1, 134, 12, 0, 12, 134, 12, 3,
				1, 135, 12, 0, 12, 135, 12, 3, 1, 136,
				12, 0, 12, 136, 12, 3, 1, 137, 12, 0,
				12, 137, 12, 3, 12, 138, 12, 3, 12, 139,
				12, 3, 12, 140, 12, 3, 12, 141, 12, 3,
				12, 142, 12, 3, 12, 143, 12, 3, 1, 144,
				12, 0, 12, 144, 12, 3, 1, 145, 12, 0,
				12, 145, 12, 3, 1, 146, 12, 0, 12, 146,
				12, 3, 1, 147, 12, 0, 12, 147, 12, 3,
				1, 148, 12, 0, 12, 148, 12, 3, 1, 149,
				12, 0, 12, 149, 12, 3, 12, 150, 12, 3,
				12, 151, 12, 3, 12, 152, 12, 3, 12, 153,
				12, 3, 12, 154, 12, 3, 12, 155, 12, 3,
				7, 156, 12, 6, 0, 0, 1, 157, 12, 1,
				158, 12, 0, 22, 158, 12, 2, 22, 159, 12,
				3, 1, 160, 12, 0, 22, 160, 12, 2, 22,
				161, 12, 3, 1, 162, 12, 0, 22, 162, 12,
				3, 22, 163, 12, 3, 1, 164, 12, 0, 22,
				164, 12, 3, 22, 165, 12, 3, 1, 166, 12,
				0, 0, 0, 51, 167, 12, 0, 0, 0, 1,
				168, 12, 0, 12, 168, 12, 3, 12, 169, 12,
				3, 1, 170, 12, 0, 0, 1, 171, 12, 1,
				172, 12, 0, 22, 172, 12, 2, 22, 173, 12,
				3, 1, 174, 12, 0, 22, 174, 12, 2, 22,
				175, 12, 3, 1, 176, 12, 0, 0, 1, 177,
				12, 1, 178, 12, 0, 12, 178, 12, 3, 12,
				179, 12, 3, 1, 180, 12, 0, 12, 180, 12,
				2, 12, 181, 12, 3, 1, 182, 12, 0, 12,
				182, 12, 3, 12, 183, 12, 3, 22, 184, 12,
				2, 1, 185, 12, 1, 186, 12, 1, 187, 12,
				1, 188, 12, 129, 228, 3, 1, 189, 12, 1,
				190, 12, 1, 191, 12, 1, 192, 12, 1, 193,
				12, 1, 194, 12, 1, 195, 12, 1, 196, 12,
				1, 197, 12, 1, 198, 12, 1, 199, 12, 1,
				200, 12, 1, 201, 12, 1, 202, 12, 1, 203,
				12, 1, 204, 12, 1, 187, 12, 1, 188, 12,
				1, 205, 12, 0, 0, 1, 206, 12, 1, 207,
				12, 1, 208, 12, 1, 209, 12, 0, 1, 210,
				12, 0, 1, 211, 12, 1, 212, 12, 1, 141,
				6, 0, 1, 145, 6, 0, 1, 213, 12, 0,
				1, 147, 6, 0, 1, 0, 0, 0, 0, 0,
				0, 1, 214, 12, 129, 228, 3, 1, 189, 12,
				1, 190, 12, 1, 191, 12, 1, 192, 12, 1,
				193, 12, 1, 194, 12, 1, 195, 12, 129, 19,
				129, 20, 129, 19, 129, 20, 1, 215, 12, 1,
				216, 12, 1, 217, 12, 1, 218, 12, 140, 62,
				3, 140, 63, 3, 140, 64, 3, 140, 65, 3,
				150, 66, 2, 140, 67, 2, 140, 68, 3, 140,
				69, 3, 129, 46, 1, 48, 1, 49, 129, 81,
				129, 15, 129, 16, 129, 17, 129, 50, 1, 158,
				5, 1, 48, 1, 49, 1, 211, 12, 1, 212,
				12, 176, 84, 28, 176, 85, 29, 1, 182, 6,
				1, 183, 6, 1, 185, 6, 1, 186, 6, 129,
				98, 1, 193, 6, 1, 194, 6, 1, 196, 6,
				1, 197, 6, 129, 56, 129, 57, 1, 58, 1,
				233, 6, 1, 236, 6, 1, 239, 6, 1, 129,
				7, 1, 160, 7, 129, 119, 129, 120, 129, 121,
				129, 122, 129, 123, 22, 178, 7, 2, 22, 179,
				7, 2, 1, 184, 7, 1, 186, 7, 1, 188,
				7, 12, 0, 2, 0, 0, 0, 12, 219, 12,
				3, 12, 220, 12, 3, 22, 221, 12, 3, 22,
				222, 12, 3, 22, 223, 12, 3, 22, 224, 12,
				3, 22, 225, 12, 3, 12, 0, 3, 22, 226,
				12, 3, 22, 227, 12, 3, 12, 0, 3, 0,
				1, 44, 1, 45, 1, 211, 7, 1, 214, 7,
				1, 228, 12, 1, 229, 12, 1, 230, 12, 1,
				231, 12, 1, 219, 7, 1, 220, 7, 1, 221,
				7, 1, 222, 7, 12, 0, 3, 12, 0, 2,
				0, 0, 0, 1, 232, 12, 12, 233, 12, 3,
				12, 234, 12, 3, 1, 235, 12, 1, 236, 12,
				12, 0, 3, 0, 0, 0, 1, 237, 12, 12,
				238, 12, 3, 1, 239, 12, 1, 240, 12, 1,
				136, 8, 1, 137, 8, 1, 140, 8, 1, 141,
				8, 12, 0, 3, 0, 12, 148, 8, 3, 12,
				149, 8, 3, 12, 152, 8, 3, 12, 153, 8,
				3, 12, 158, 8, 3, 12, 159, 8, 3, 12,
				162, 8, 3, 12, 163, 8, 3, 1, 166, 8,
				1, 167, 8, 1, 170, 8, 1, 171, 8, 12,
				241, 12, 3, 12, 178, 8, 3, 12, 179, 8,
				3, 12, 182, 8, 3, 12, 183, 8, 3, 12,
				188, 8, 3, 12, 189, 8, 3, 12, 192, 8,
				3, 12, 193, 8, 3, 12, 0, 2, 0, 1,
				242, 12, 1, 243, 12, 12, 202, 8, 3, 12,
				203, 8, 3, 12, 206, 8, 3, 12, 207, 8,
				3, 12, 210, 8, 3, 12, 211, 8, 3, 12,
				214, 8, 3, 12, 215, 8, 3, 12, 0, 2,
				1, 244, 12, 1, 245, 12, 1, 220, 8, 1,
				222, 8, 1, 246, 12, 1, 247, 12, 1, 224,
				8, 1, 226, 8, 22, 248, 12, 2, 22, 249,
				12, 2, 22, 250, 12, 2, 22, 251, 12, 2,
				12, 252, 12, 3, 1, 253, 12, 12, 0, 3,
				0, 0, 1, 254, 12, 1, 255, 12, 1, 128,
				13, 1, 129, 13, 1, 130, 13, 1, 131, 13,
				1, 132, 13, 1, 133, 13, 12, 0, 2, 0,
				0, 1, 134, 13, 1, 135, 13, 1, 136, 13,
				1, 137, 13, 1, 138, 13, 1, 139, 13, 1,
				140, 13, 1, 141, 13, 12, 0, 2, 0, 0,
				1, 155, 9, 1, 142, 13, 48, 184, 9, 31,
				48, 186, 9, 30, 22, 196, 9, 2, 22, 197,
				9, 2, 12, 143, 13, 3, 12, 144, 13, 3,
				12, 145, 13, 3, 12, 146, 13, 3, 12, 147,
				13, 3, 12, 148, 13, 3, 12, 149, 13, 3,
				12, 0, 3, 0, 12, 150, 13, 3, 4, 0,
				16, 4, 0, 32, 4, 0, 64, 4, 0, 16,
				4, 0, 32, 4, 0, 64, 4, 151, 13, 16,
				4, 151, 13, 32, 4, 151, 13, 64, 4, 152,
				13, 16, 4, 152, 13, 32, 4, 152, 13, 64,
				4, 153, 13, 16, 4, 153, 13, 32, 4, 153,
				13, 64, 1, 154, 13, 1, 155, 13, 1, 156,
				13, 1, 157, 13, 1, 158, 13, 1, 159, 13,
				1, 160, 13, 1, 161, 13, 0, 1, 162, 13,
				0, 1, 163, 13, 0, 1, 164, 13, 0, 1,
				165, 13, 0, 1, 166, 13, 0, 1, 167, 13,
				0, 1, 168, 13, 0, 1, 169, 13, 0, 1,
				170, 13, 0, 1, 171, 13, 2, 231, 7, 6,
				0, 1, 172, 13, 0, 1, 173, 13, 0, 1,
				174, 13, 0, 1, 175, 13, 0, 1, 176, 13,
				0, 1, 177, 13, 0, 1, 196, 8, 0, 1,
				197, 8, 0, 1, 178, 13, 0, 1, 179, 13,
				0, 1, 180, 13, 0, 1, 181, 13, 0, 1,
				182, 13, 0, 1, 183, 13, 0, 1, 184, 13,
				0, 1, 185, 13, 0, 1, 186, 13, 0, 1,
				187, 13, 0, 1, 188, 13, 0, 1, 189, 13,
				0, 1, 190, 13, 0, 1, 191, 13, 0, 1,
				192, 13, 0, 1, 193, 13, 0
			};
		}
	}
	[Flags]
	internal enum InstrOpInfoFlags : uint
	{
		None = 0u,
		MemSize_Nothing = 1u,
		ShowNoMemSize_ForceSize = 2u,
		ShowMinMemSize_ForceSize = 4u,
		SizeOverrideMask = 3u,
		OpSizeShift = 3u,
		OpSize16 = 8u,
		OpSize32 = 0x10u,
		OpSize64 = 0x18u,
		AddrSizeShift = 5u,
		AddrSize16 = 0x20u,
		AddrSize32 = 0x40u,
		AddrSize64 = 0x60u,
		BranchSizeInfoShift = 7u,
		BranchSizeInfoMask = 7u,
		BranchSizeInfo_Short = 0x300u,
		SignExtendInfoShift = 0xAu,
		SignExtendInfoMask = 7u,
		MemorySizeInfoShift = 0xDu,
		MemorySizeInfoMask = 3u,
		FarMemorySizeInfoShift = 0xFu,
		FarMemorySizeInfoMask = 3u,
		RegisterTo = 0x20000u,
		BndPrefix = 0x40000u,
		MnemonicIsDirective = 0x80000u,
		JccNotTaken = 0x100000u,
		JccTaken = 0x200000u,
		MemorySizeBits = 8u,
		MemorySizeShift = 0x16u,
		MemorySizeMask = 0xFFu
	}
	internal static class MemorySizes
	{
		public readonly struct Info
		{
			public readonly FormatterString keyword;

			public readonly FormatterString bcstTo;

			public Info(FormatterString keyword, FormatterString bcstTo)
			{
				this.keyword = keyword;
				this.bcstTo = bcstTo;
			}
		}

		public static readonly Info[] AllMemorySizes = GetMemorySizes();

		private static Info[] GetMemorySizes()
		{
			FormatterString formatterString = new FormatterString("byte");
			FormatterString formatterString2 = new FormatterString("dword");
			FormatterString formatterString3 = new FormatterString("far");
			FormatterString formatterString4 = new FormatterString("fpuenv14");
			FormatterString formatterString5 = new FormatterString("fpuenv28");
			FormatterString formatterString6 = new FormatterString("fpustate108");
			FormatterString formatterString7 = new FormatterString("fpustate94");
			FormatterString formatterString8 = new FormatterString("oword");
			FormatterString formatterString9 = new FormatterString("qword");
			FormatterString formatterString10 = new FormatterString("tword");
			FormatterString formatterString11 = new FormatterString("word");
			FormatterString formatterString12 = new FormatterString("yword");
			FormatterString formatterString13 = new FormatterString("zword");
			FormatterString formatterString14 = new FormatterString("mem384");
			FormatterString formatterString15 = new FormatterString("");
			FormatterString formatterString16 = new FormatterString("1to2");
			FormatterString formatterString17 = new FormatterString("1to4");
			FormatterString formatterString18 = new FormatterString("1to8");
			FormatterString formatterString19 = new FormatterString("1to16");
			FormatterString formatterString20 = new FormatterString("1to32");
			ReadOnlySpan<byte> readOnlySpan = new byte[50]
			{
				1, 1, 1, 2, 1, 3, 3, 2, 2, 1,
				1, 1, 3, 2, 1, 2, 1, 1, 2, 2,
				4, 4, 3, 3, 2, 2, 2, 4, 3, 2,
				3, 2, 2, 3, 3, 5, 5, 4, 4, 3,
				3, 3, 5, 4, 3, 4, 4, 3, 3, 4
			};
			ReadOnlySpan<byte> readOnlySpan2 = new byte[162]
			{
				0, 1, 11, 2, 9, 9, 8, 12, 13, 1,
				11, 2, 9, 8, 12, 13, 3, 3, 3, 11,
				2, 9, 0, 0, 9, 8, 0, 0, 11, 2,
				9, 10, 8, 11, 4, 5, 7, 6, 0, 0,
				0, 0, 10, 13, 0, 10, 14, 13, 11, 11,
				2, 2, 2, 2, 2, 2, 9, 9, 9, 9,
				9, 9, 9, 9, 8, 8, 8, 8, 8, 8,
				8, 8, 8, 8, 8, 8, 8, 8, 8, 12,
				12, 12, 12, 12, 12, 12, 12, 12, 12, 12,
				12, 12, 12, 12, 12, 12, 12, 13, 13, 13,
				13, 13, 13, 13, 13, 13, 13, 13, 13, 13,
				13, 13, 11, 2, 2, 11, 2, 11, 11, 2,
				2, 9, 9, 9, 11, 2, 9, 2, 9, 9,
				2, 2, 11, 11, 2, 2, 9, 9, 9, 11,
				2, 9, 2, 9, 9, 2, 2, 11, 11, 2,
				2, 9, 9, 9, 11, 2, 9, 2, 2, 9,
				9, 2
			};
			Info[] array = new Info[162];
			for (int i = 0; i < array.Length; i++)
			{
				FormatterString keyword = readOnlySpan2[i] switch
				{
					0 => formatterString15, 
					1 => formatterString, 
					2 => formatterString2, 
					3 => formatterString3, 
					4 => formatterString4, 
					5 => formatterString5, 
					6 => formatterString6, 
					7 => formatterString7, 
					8 => formatterString8, 
					9 => formatterString9, 
					10 => formatterString10, 
					11 => formatterString11, 
					12 => formatterString12, 
					13 => formatterString13, 
					14 => formatterString14, 
					_ => throw new InvalidOperationException(), 
				};
				FormatterString bcstTo = ((i >= 112) ? (readOnlySpan[i - 112] switch
				{
					0 => formatterString15, 
					1 => formatterString16, 
					2 => formatterString17, 
					3 => formatterString18, 
					4 => formatterString19, 
					5 => formatterString20, 
					_ => throw new InvalidOperationException(), 
				}) : formatterString15);
				array[i] = new Info(keyword, bcstTo);
			}
			return array;
		}
	}
	internal static class Registers
	{
		public static readonly FormatterString[] AllRegisters = GetRegisters();

		private static FormatterString[] GetRegisters()
		{
			FormatterString[] registers = RegistersTable.GetRegisters();
			for (int i = 0; i < 8; i++)
			{
				registers[217 + i] = new FormatterString("st" + i);
			}
			return registers;
		}
	}
	internal enum SignExtendInfo
	{
		None,
		Sex1to2,
		Sex1to4,
		Sex1to8,
		Sex4to8,
		Sex2,
		Sex4
	}
	internal enum SizeOverride
	{
		None,
		Size16,
		Size32,
		Size64
	}
}
namespace Iced.Intel.MasmFormatterInternal
{
	internal enum CtorKind
	{
		Previous,
		Normal_1,
		Normal_2,
		AamAad,
		AX,
		AY,
		bnd,
		STIG1,
		DeclareData,
		DX,
		fword,
		Int3,
		imul,
		invlpga,
		CCa_1,
		CCa_2,
		CCa_3,
		CCb_1,
		CCb_2,
		CCb_3,
		jcc_1,
		jcc_2,
		jcc_3,
		Loopcc1,
		Loopcc2,
		maskmovq,
		memsize,
		YD,
		YX,
		monitor,
		mwait,
		mwaitx,
		nop,
		OpSize_1,
		OpSize_2,
		OpSize2,
		YA,
		pblendvb,
		pclmulqdq,
		pops_2,
		pops_3,
		XY,
		reg,
		Reg16,
		Reg32,
		reverse,
		ST_STi,
		STi_ST,
		XLAT
	}
	internal enum InstrOpKind : byte
	{
		Register,
		NearBranch16,
		NearBranch32,
		NearBranch64,
		FarBranch16,
		FarBranch32,
		Immediate8,
		Immediate8_2nd,
		Immediate16,
		Immediate32,
		Immediate64,
		Immediate8to16,
		Immediate8to32,
		Immediate8to64,
		Immediate32to64,
		MemorySegSI,
		MemorySegESI,
		MemorySegRSI,
		MemorySegDI,
		MemorySegEDI,
		MemorySegRDI,
		MemoryESDI,
		MemoryESEDI,
		MemoryESRDI,
		Memory,
		ExtraImmediate8_Value3,
		DeclareByte,
		DeclareWord,
		DeclareDword,
		DeclareQword
	}
	internal struct InstrOpInfo
	{
		internal const int TEST_RegisterBits = 8;

		public FormatterString Mnemonic;

		public InstrOpInfoFlags Flags;

		public byte OpCount;

		public InstrOpKind Op0Kind;

		public InstrOpKind Op1Kind;

		public InstrOpKind Op2Kind;

		public InstrOpKind Op3Kind;

		public InstrOpKind Op4Kind;

		public byte Op0Register;

		public byte Op1Register;

		public byte Op2Register;

		public byte Op3Register;

		public byte Op4Register;

		public sbyte Op0Index;

		public sbyte Op1Index;

		public sbyte Op2Index;

		public sbyte Op3Index;

		public sbyte Op4Index;

		public readonly Register GetOpRegister(int operand)
		{
			return operand switch
			{
				0 => (Register)Op0Register, 
				1 => (Register)Op1Register, 
				2 => (Register)Op2Register, 
				3 => (Register)Op3Register, 
				4 => (Register)Op4Register, 
				_ => throw new ArgumentOutOfRangeException("operand"), 
			};
		}

		public readonly InstrOpKind GetOpKind(int operand)
		{
			return operand switch
			{
				0 => Op0Kind, 
				1 => Op1Kind, 
				2 => Op2Kind, 
				3 => Op3Kind, 
				4 => Op4Kind, 
				_ => Op0Kind, 
			};
		}

		public readonly int GetInstructionIndex(int operand)
		{
			int num = operand switch
			{
				0 => Op0Index, 
				1 => Op1Index, 
				2 => Op2Index, 
				3 => Op3Index, 
				4 => Op4Index, 
				_ => -1, 
			};
			if (num >= 0)
			{
				return num;
			}
			return -1;
		}

		public readonly bool TryGetOpAccess(int operand, out OpAccess access)
		{
			int num = operand switch
			{
				0 => Op0Index, 
				1 => Op1Index, 
				2 => Op2Index, 
				3 => Op3Index, 
				4 => Op4Index, 
				_ => Op0Index, 
			};
			if (num < -1)
			{
				access = (OpAccess)(-num - 2);
				return true;
			}
			access = OpAccess.None;
			return false;
		}

		public readonly int GetOperandIndex(int instructionOperand)
		{
			int num = ((instructionOperand != Op0Index) ? ((instructionOperand == Op1Index) ? 1 : ((instructionOperand == Op2Index) ? 2 : ((instructionOperand == Op3Index) ? 3 : ((instructionOperand != Op4Index) ? (-1) : 4)))) : 0);
			if (num >= OpCount)
			{
				return -1;
			}
			return num;
		}

		public InstrOpInfo(FormatterString mnemonic, in Instruction instruction, InstrOpInfoFlags flags)
		{
			Mnemonic = mnemonic;
			Flags = flags;
			Op0Kind = (InstrOpKind)instruction.Op0Kind;
			Op1Kind = (InstrOpKind)instruction.Op1Kind;
			Op2Kind = (InstrOpKind)instruction.Op2Kind;
			Op3Kind = (InstrOpKind)instruction.Op3Kind;
			Op4Kind = (InstrOpKind)instruction.Op4Kind;
			Op0Register = (byte)instruction.Op0Register;
			Op1Register = (byte)instruction.Op1Register;
			Op2Register = (byte)instruction.Op2Register;
			Op3Register = (byte)instruction.Op3Register;
			Op4Register = (byte)instruction.Op4Register;
			int opCount = instruction.OpCount;
			OpCount = (byte)opCount;
			switch (opCount)
			{
			case 0:
				Op0Index = -1;
				Op1Index = -1;
				Op2Index = -1;
				Op3Index = -1;
				Op4Index = -1;
				break;
			case 1:
				Op0Index = 0;
				Op1Index = -1;
				Op2Index = -1;
				Op3Index = -1;
				Op4Index = -1;
				break;
			case 2:
				Op0Index = 0;
				Op1Index = 1;
				Op2Index = -1;
				Op3Index = -1;
				Op4Index = -1;
				break;
			case 3:
				Op0Index = 0;
				Op1Index = 1;
				Op2Index = 2;
				Op3Index = -1;
				Op4Index = -1;
				break;
			case 4:
				Op0Index = 0;
				Op1Index = 1;
				Op2Index = 2;
				Op3Index = 3;
				Op4Index = -1;
				break;
			case 5:
				Op0Index = 0;
				Op1Index = 1;
				Op2Index = 2;
				Op3Index = 3;
				Op4Index = 4;
				break;
			default:
				throw new InvalidOperationException();
			}
		}
	}
	internal abstract class InstrInfo
	{
		public const int OpAccess_INVALID = -1;

		public const int OpAccess_None = -2;

		public const int OpAccess_Read = -3;

		public const int OpAccess_CondRead = -4;

		public const int OpAccess_Write = -5;

		public const int OpAccess_CondWrite = -6;

		public const int OpAccess_ReadWrite = -7;

		public const int OpAccess_ReadCondWrite = -8;

		public const int OpAccess_NoMemAccess = -9;

		public abstract void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info);

		protected static int GetBitness(CodeSize codeSize)
		{
			return codeSize switch
			{
				CodeSize.Code16 => 16, 
				CodeSize.Code32 => 32, 
				CodeSize.Code64 => 64, 
				_ => 0, 
			};
		}
	}
	internal sealed class SimpleInstrInfo : InstrInfo
	{
		private readonly FormatterString mnemonic;

		private readonly InstrOpInfoFlags flags;

		public SimpleInstrInfo(string mnemonic)
			: this(mnemonic, InstrOpInfoFlags.None)
		{
		}

		public SimpleInstrInfo(string mnemonic, InstrOpInfoFlags flags)
		{
			this.mnemonic = new FormatterString(mnemonic);
			this.flags = flags;
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			info = new InstrOpInfo(mnemonic, in instruction, flags);
		}
	}
	internal sealed class SimpleInstrInfo_cc : InstrInfo
	{
		private readonly int ccIndex;

		private readonly FormatterString[] mnemonics;

		private readonly InstrOpInfoFlags flags;

		public SimpleInstrInfo_cc(int ccIndex, string[] mnemonics)
			: this(ccIndex, mnemonics, InstrOpInfoFlags.None)
		{
		}

		public SimpleInstrInfo_cc(int ccIndex, string[] mnemonics, InstrOpInfoFlags flags)
		{
			this.ccIndex = ccIndex;
			this.mnemonics = FormatterString.Create(mnemonics);
			this.flags = flags;
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			FormatterString mnemonicCC = MnemonicCC.GetMnemonicCC(options, ccIndex, mnemonics);
			info = new InstrOpInfo(mnemonicCC, in instruction, flags);
		}
	}
	internal sealed class SimpleInstrInfo_memsize : InstrInfo
	{
		private readonly int bitness;

		private readonly FormatterString mnemonic;

		public SimpleInstrInfo_memsize(int bitness, string mnemonic)
		{
			this.bitness = bitness;
			this.mnemonic = new FormatterString(mnemonic);
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			int num = InstrInfo.GetBitness(instruction.CodeSize);
			InstrOpInfoFlags flags = ((num == 0 || (num & bitness) != 0) ? InstrOpInfoFlags.MemSize_Nothing : (InstrOpInfoFlags.MemSize_Normal | InstrOpInfoFlags.ShowNoMemSize_ForceSize | InstrOpInfoFlags.ShowMinMemSize_ForceSize));
			info = new InstrOpInfo(mnemonic, in instruction, flags);
		}
	}
	internal sealed class SimpleInstrInfo_AamAad : InstrInfo
	{
		private readonly FormatterString mnemonic;

		public SimpleInstrInfo_AamAad(string mnemonic)
		{
			this.mnemonic = new FormatterString(mnemonic);
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			if (instruction.Immediate8 == 10)
			{
				info = default(InstrOpInfo);
				info.Mnemonic = mnemonic;
			}
			else
			{
				info = new InstrOpInfo(mnemonic, in instruction, InstrOpInfoFlags.None);
			}
		}
	}
	internal sealed class SimpleInstrInfo_Int3 : InstrInfo
	{
		private readonly FormatterString mnemonic;

		public SimpleInstrInfo_Int3(string mnemonic)
		{
			this.mnemonic = new FormatterString(mnemonic);
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			info = default(InstrOpInfo);
			info.Mnemonic = mnemonic;
			info.OpCount = 1;
			info.Op0Kind = InstrOpKind.ExtraImmediate8_Value3;
			info.Op0Index = -3;
		}
	}
	internal sealed class SimpleInstrInfo_YD : InstrInfo
	{
		private readonly FormatterString mnemonic_args;

		private readonly FormatterString mnemonic_no_args;

		private const InstrOpInfoFlags flags = InstrOpInfoFlags.ShowNoMemSize_ForceSize | InstrOpInfoFlags.ShowMinMemSize_ForceSize;

		public SimpleInstrInfo_YD(string mnemonic_args, string mnemonic_no_args)
		{
			this.mnemonic_args = new FormatterString(mnemonic_args);
			this.mnemonic_no_args = new FormatterString(mnemonic_no_args);
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			OpKind opKind = instruction.CodeSize switch
			{
				CodeSize.Unknown => instruction.Op0Kind, 
				CodeSize.Code16 => OpKind.MemoryESDI, 
				CodeSize.Code32 => OpKind.MemoryESEDI, 
				CodeSize.Code64 => OpKind.MemoryESRDI, 
				_ => throw new InvalidOperationException(), 
			};
			if (instruction.Op0Kind != opKind)
			{
				info = new InstrOpInfo(mnemonic_args, in instruction, InstrOpInfoFlags.ShowNoMemSize_ForceSize | InstrOpInfoFlags.ShowMinMemSize_ForceSize);
				return;
			}
			info = default(InstrOpInfo);
			info.Flags = InstrOpInfoFlags.ShowNoMemSize_ForceSize | InstrOpInfoFlags.ShowMinMemSize_ForceSize;
			info.Mnemonic = mnemonic_no_args;
		}
	}
	internal sealed class SimpleInstrInfo_DX : InstrInfo
	{
		private readonly FormatterString mnemonic_args;

		private readonly FormatterString mnemonic_no_args;

		private const InstrOpInfoFlags flags = InstrOpInfoFlags.ShowNoMemSize_ForceSize | InstrOpInfoFlags.ShowMinMemSize_ForceSize;

		public SimpleInstrInfo_DX(string mnemonic_args, string mnemonic_no_args)
		{
			this.mnemonic_args = new FormatterString(mnemonic_args);
			this.mnemonic_no_args = new FormatterString(mnemonic_no_args);
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			OpKind opKind = instruction.CodeSize switch
			{
				CodeSize.Unknown => instruction.Op1Kind, 
				CodeSize.Code16 => OpKind.MemorySegSI, 
				CodeSize.Code32 => OpKind.MemorySegESI, 
				CodeSize.Code64 => OpKind.MemorySegRSI, 
				_ => throw new InvalidOperationException(), 
			};
			if (instruction.Op1Kind != opKind || (instruction.SegmentPrefix != 0 && FormatterUtils.ShowSegmentPrefix(Register.DS, in instruction, options)))
			{
				info = new InstrOpInfo(mnemonic_args, in instruction, InstrOpInfoFlags.ShowNoMemSize_ForceSize | InstrOpInfoFlags.ShowMinMemSize_ForceSize);
				return;
			}
			info = default(InstrOpInfo);
			info.Flags = InstrOpInfoFlags.ShowNoMemSize_ForceSize | InstrOpInfoFlags.ShowMinMemSize_ForceSize;
			info.Mnemonic = mnemonic_no_args;
		}
	}
	internal sealed class SimpleInstrInfo_YX : InstrInfo
	{
		private readonly FormatterString mnemonic_args;

		private readonly FormatterString mnemonic_no_args;

		private const InstrOpInfoFlags flags = InstrOpInfoFlags.ShowNoMemSize_ForceSize | InstrOpInfoFlags.ShowMinMemSize_ForceSize;

		public SimpleInstrInfo_YX(string mnemonic_args, string mnemonic_no_args)
		{
			this.mnemonic_args = new FormatterString(mnemonic_args);
			this.mnemonic_no_args = new FormatterString(mnemonic_no_args);
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			OpKind opKind = instruction.CodeSize switch
			{
				CodeSize.Unknown => instruction.Op0Kind, 
				CodeSize.Code16 => OpKind.MemoryESDI, 
				CodeSize.Code32 => OpKind.MemoryESEDI, 
				CodeSize.Code64 => OpKind.MemoryESRDI, 
				_ => throw new InvalidOperationException(), 
			};
			if (instruction.Op0Kind != opKind || (instruction.SegmentPrefix != 0 && FormatterUtils.ShowSegmentPrefix(Register.DS, in instruction, options)))
			{
				info = new InstrOpInfo(mnemonic_args, in instruction, InstrOpInfoFlags.ShowNoMemSize_ForceSize | InstrOpInfoFlags.ShowMinMemSize_ForceSize);
				return;
			}
			info = default(InstrOpInfo);
			info.Flags = InstrOpInfoFlags.ShowNoMemSize_ForceSize | InstrOpInfoFlags.ShowMinMemSize_ForceSize;
			info.Mnemonic = mnemonic_no_args;
		}
	}
	internal sealed class SimpleInstrInfo_XY : InstrInfo
	{
		private readonly FormatterString mnemonic_args;

		private readonly FormatterString mnemonic_no_args;

		private const InstrOpInfoFlags flags = InstrOpInfoFlags.ShowNoMemSize_ForceSize | InstrOpInfoFlags.ShowMinMemSize_ForceSize;

		public SimpleInstrInfo_XY(string mnemonic_args, string mnemonic_no_args)
		{
			this.mnemonic_args = new FormatterString(mnemonic_args);
			this.mnemonic_no_args = new FormatterString(mnemonic_no_args);
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			OpKind opKind = instruction.CodeSize switch
			{
				CodeSize.Unknown => instruction.Op1Kind, 
				CodeSize.Code16 => OpKind.MemoryESDI, 
				CodeSize.Code32 => OpKind.MemoryESEDI, 
				CodeSize.Code64 => OpKind.MemoryESRDI, 
				_ => throw new InvalidOperationException(), 
			};
			if (instruction.Op1Kind != opKind || (instruction.SegmentPrefix != 0 && FormatterUtils.ShowSegmentPrefix(Register.DS, in instruction, options)))
			{
				info = new InstrOpInfo(mnemonic_args, in instruction, InstrOpInfoFlags.ShowNoMemSize_ForceSize | InstrOpInfoFlags.ShowMinMemSize_ForceSize);
				return;
			}
			info = default(InstrOpInfo);
			info.Flags = InstrOpInfoFlags.ShowNoMemSize_ForceSize | InstrOpInfoFlags.ShowMinMemSize_ForceSize;
			info.Mnemonic = mnemonic_no_args;
		}
	}
	internal sealed class SimpleInstrInfo_YA : InstrInfo
	{
		private readonly FormatterString mnemonic_args;

		private readonly FormatterString mnemonic_no_args;

		private const InstrOpInfoFlags flags = InstrOpInfoFlags.ShowNoMemSize_ForceSize | InstrOpInfoFlags.ShowMinMemSize_ForceSize;

		public SimpleInstrInfo_YA(string mnemonic_args, string mnemonic_no_args)
		{
			this.mnemonic_args = new FormatterString(mnemonic_args);
			this.mnemonic_no_args = new FormatterString(mnemonic_no_args);
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			OpKind opKind = instruction.CodeSize switch
			{
				CodeSize.Unknown => instruction.Op0Kind, 
				CodeSize.Code16 => OpKind.MemoryESDI, 
				CodeSize.Code32 => OpKind.MemoryESEDI, 
				CodeSize.Code64 => OpKind.MemoryESRDI, 
				_ => throw new InvalidOperationException(), 
			};
			if (instruction.Op0Kind != opKind)
			{
				info = default(InstrOpInfo);
				info.Flags = InstrOpInfoFlags.ShowNoMemSize_ForceSize | InstrOpInfoFlags.ShowMinMemSize_ForceSize;
				info.Mnemonic = mnemonic_args;
				info.OpCount = 1;
				info.Op0Kind = (InstrOpKind)instruction.Op0Kind;
			}
			else
			{
				info = default(InstrOpInfo);
				info.Flags = InstrOpInfoFlags.ShowNoMemSize_ForceSize | InstrOpInfoFlags.ShowMinMemSize_ForceSize;
				info.Mnemonic = mnemonic_no_args;
			}
		}
	}
	internal sealed class SimpleInstrInfo_AX : InstrInfo
	{
		private readonly FormatterString mnemonic_args;

		private readonly FormatterString mnemonic_no_args;

		private const InstrOpInfoFlags flags = InstrOpInfoFlags.ShowNoMemSize_ForceSize | InstrOpInfoFlags.ShowMinMemSize_ForceSize;

		public SimpleInstrInfo_AX(string mnemonic_args, string mnemonic_no_args)
		{
			this.mnemonic_args = new FormatterString(mnemonic_args);
			this.mnemonic_no_args = new FormatterString(mnemonic_no_args);
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			OpKind opKind = instruction.CodeSize switch
			{
				CodeSize.Unknown => instruction.Op1Kind, 
				CodeSize.Code16 => OpKind.MemorySegSI, 
				CodeSize.Code32 => OpKind.MemorySegESI, 
				CodeSize.Code64 => OpKind.MemorySegRSI, 
				_ => throw new InvalidOperationException(), 
			};
			if (instruction.Op1Kind != opKind || (instruction.SegmentPrefix != 0 && FormatterUtils.ShowSegmentPrefix(Register.DS, in instruction, options)))
			{
				info = default(InstrOpInfo);
				info.Flags = InstrOpInfoFlags.ShowNoMemSize_ForceSize | InstrOpInfoFlags.ShowMinMemSize_ForceSize;
				info.Mnemonic = mnemonic_args;
				info.OpCount = 1;
				info.Op0Kind = (InstrOpKind)instruction.Op1Kind;
				info.Op0Index = 1;
			}
			else
			{
				info = default(InstrOpInfo);
				info.Flags = InstrOpInfoFlags.ShowNoMemSize_ForceSize | InstrOpInfoFlags.ShowMinMemSize_ForceSize;
				info.Mnemonic = mnemonic_no_args;
			}
		}
	}
	internal sealed class SimpleInstrInfo_AY : InstrInfo
	{
		private readonly FormatterString mnemonic_args;

		private readonly FormatterString mnemonic_no_args;

		private const InstrOpInfoFlags flags = InstrOpInfoFlags.ShowNoMemSize_ForceSize | InstrOpInfoFlags.ShowMinMemSize_ForceSize;

		public SimpleInstrInfo_AY(string mnemonic_args, string mnemonic_no_args)
		{
			this.mnemonic_args = new FormatterString(mnemonic_args);
			this.mnemonic_no_args = new FormatterString(mnemonic_no_args);
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			OpKind opKind = instruction.CodeSize switch
			{
				CodeSize.Unknown => instruction.Op1Kind, 
				CodeSize.Code16 => OpKind.MemoryESDI, 
				CodeSize.Code32 => OpKind.MemoryESEDI, 
				CodeSize.Code64 => OpKind.MemoryESRDI, 
				_ => throw new InvalidOperationException(), 
			};
			if (instruction.Op1Kind != opKind || (instruction.SegmentPrefix != 0 && FormatterUtils.ShowSegmentPrefix(Register.DS, in instruction, options)))
			{
				info = default(InstrOpInfo);
				info.Flags = InstrOpInfoFlags.ShowNoMemSize_ForceSize | InstrOpInfoFlags.ShowMinMemSize_ForceSize;
				info.Mnemonic = mnemonic_args;
				info.OpCount = 1;
				info.Op0Kind = (InstrOpKind)instruction.Op1Kind;
				info.Op0Index = 1;
			}
			else
			{
				info = default(InstrOpInfo);
				info.Flags = InstrOpInfoFlags.ShowNoMemSize_ForceSize | InstrOpInfoFlags.ShowMinMemSize_ForceSize;
				info.Mnemonic = mnemonic_no_args;
			}
		}
	}
	internal sealed class SimpleInstrInfo_XLAT : InstrInfo
	{
		private readonly FormatterString mnemonic_args;

		private readonly FormatterString mnemonic_no_args;

		public SimpleInstrInfo_XLAT(string mnemonic_args, string mnemonic_no_args)
		{
			this.mnemonic_args = new FormatterString(mnemonic_args);
			this.mnemonic_no_args = new FormatterString(mnemonic_no_args);
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			Register register = instruction.CodeSize switch
			{
				CodeSize.Unknown => instruction.MemoryBase, 
				CodeSize.Code16 => Register.BX, 
				CodeSize.Code32 => Register.EBX, 
				CodeSize.Code64 => Register.RBX, 
				_ => throw new InvalidOperationException(), 
			};
			if (instruction.MemoryBase != register || (instruction.SegmentPrefix != 0 && FormatterUtils.ShowSegmentPrefix(Register.DS, in instruction, options)))
			{
				info = new InstrOpInfo(mnemonic_args, in instruction, InstrOpInfoFlags.ShowNoMemSize_ForceSize | InstrOpInfoFlags.IgnoreIndexReg);
				return;
			}
			info = default(InstrOpInfo);
			info.Mnemonic = mnemonic_no_args;
		}
	}
	internal sealed class SimpleInstrInfo_nop : InstrInfo
	{
		private readonly int bitness;

		private readonly FormatterString mnemonic;

		private readonly Register register;

		private static readonly FormatterString str_xchg = new FormatterString("xchg");

		public SimpleInstrInfo_nop(int bitness, string mnemonic, Register register)
		{
			this.bitness = bitness;
			this.mnemonic = new FormatterString(mnemonic);
			this.register = register;
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			int num = InstrInfo.GetBitness(instruction.CodeSize);
			if (num == 0 || (num & bitness) != 0)
			{
				info = new InstrOpInfo(mnemonic, in instruction, InstrOpInfoFlags.None);
				return;
			}
			info = default(InstrOpInfo);
			info.Mnemonic = str_xchg;
			info.OpCount = 2;
			info.Op0Register = (byte)register;
			info.Op1Register = (byte)register;
			info.Op0Index = -2;
			info.Op1Index = -2;
		}
	}
	internal sealed class SimpleInstrInfo_STIG1 : InstrInfo
	{
		private readonly FormatterString mnemonic;

		private readonly bool pseudoOp;

		public SimpleInstrInfo_STIG1(string mnemonic, bool pseudoOp)
		{
			this.mnemonic = new FormatterString(mnemonic);
			this.pseudoOp = pseudoOp;
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			info = default(InstrOpInfo);
			info.Mnemonic = mnemonic;
			if (!pseudoOp || !options.UsePseudoOps || instruction.Op1Register != Register.ST1)
			{
				info.OpCount = 1;
				info.Op0Register = (byte)instruction.Op1Register;
				info.Op0Index = 1;
			}
		}
	}
	internal sealed class SimpleInstrInfo_STi_ST : InstrInfo
	{
		private readonly FormatterString mnemonic;

		private readonly bool pseudoOp;

		public SimpleInstrInfo_STi_ST(string mnemonic, bool pseudoOp)
		{
			this.mnemonic = new FormatterString(mnemonic);
			this.pseudoOp = pseudoOp;
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			if (pseudoOp && options.UsePseudoOps && (instruction.Op0Register == Register.ST1 || instruction.Op1Register == Register.ST1))
			{
				info = default(InstrOpInfo);
				info.Mnemonic = mnemonic;
			}
			else
			{
				info = new InstrOpInfo(mnemonic, in instruction, InstrOpInfoFlags.None);
				info.Op1Register = 249;
			}
		}
	}
	internal sealed class SimpleInstrInfo_ST_STi : InstrInfo
	{
		private readonly FormatterString mnemonic;

		public SimpleInstrInfo_ST_STi(string mnemonic)
		{
			this.mnemonic = new FormatterString(mnemonic);
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			info = new InstrOpInfo(mnemonic, in instruction, InstrOpInfoFlags.None);
			info.Op0Register = 249;
		}
	}
	internal sealed class SimpleInstrInfo_monitor : InstrInfo
	{
		private readonly FormatterString mnemonic;

		private readonly Register register1;

		private readonly Register register2;

		private readonly Register register3;

		public SimpleInstrInfo_monitor(string mnemonic, Register register1, Register register2, Register register3)
		{
			this.mnemonic = new FormatterString(mnemonic);
			this.register1 = register1;
			this.register2 = register2;
			this.register3 = register3;
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			info = default(InstrOpInfo);
			info.Mnemonic = mnemonic;
			info.OpCount = 3;
			info.Op0Kind = InstrOpKind.Register;
			info.Op0Register = (byte)register1;
			info.Op1Kind = InstrOpKind.Register;
			info.Op1Register = (byte)register2;
			info.Op2Kind = InstrOpKind.Register;
			info.Op2Register = (byte)register3;
			info.Op0Index = -3;
			info.Op1Index = -3;
			info.Op2Index = -3;
			if ((instruction.CodeSize == CodeSize.Code64 || instruction.CodeSize == CodeSize.Unknown) && Register.EAX <= register2 && register2 <= Register.R15D)
			{
				info.Op1Register += 16;
				info.Op2Register += 16;
			}
		}
	}
	internal sealed class SimpleInstrInfo_mwait : InstrInfo
	{
		private readonly FormatterString mnemonic;

		public SimpleInstrInfo_mwait(string mnemonic)
		{
			this.mnemonic = new FormatterString(mnemonic);
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			info = default(InstrOpInfo);
			info.Mnemonic = mnemonic;
			info.OpCount = 2;
			info.Op0Kind = InstrOpKind.Register;
			info.Op1Kind = InstrOpKind.Register;
			info.Op0Index = -3;
			info.Op1Index = -3;
			switch (instruction.CodeSize)
			{
			case CodeSize.Code16:
				info.Op0Register = 21;
				info.Op1Register = 38;
				break;
			case CodeSize.Code32:
				info.Op0Register = 37;
				info.Op1Register = 38;
				break;
			case CodeSize.Unknown:
			case CodeSize.Code64:
				info.Op0Register = 53;
				info.Op1Register = 54;
				break;
			}
		}
	}
	internal sealed class SimpleInstrInfo_mwaitx : InstrInfo
	{
		private readonly FormatterString mnemonic;

		public SimpleInstrInfo_mwaitx(string mnemonic)
		{
			this.mnemonic = new FormatterString(mnemonic);
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			info = default(InstrOpInfo);
			info.Mnemonic = mnemonic;
			info.OpCount = 3;
			info.Op0Kind = InstrOpKind.Register;
			info.Op1Kind = InstrOpKind.Register;
			info.Op2Kind = InstrOpKind.Register;
			info.Op0Index = -3;
			info.Op1Index = -3;
			info.Op2Index = -4;
			switch (instruction.CodeSize)
			{
			case CodeSize.Code16:
				info.Op0Register = 21;
				info.Op1Register = 38;
				info.Op2Register = 40;
				break;
			case CodeSize.Code32:
				info.Op0Register = 37;
				info.Op1Register = 38;
				info.Op2Register = 40;
				break;
			case CodeSize.Unknown:
			case CodeSize.Code64:
				info.Op0Register = 53;
				info.Op1Register = 54;
				info.Op2Register = 56;
				break;
			}
		}
	}
	internal sealed class SimpleInstrInfo_maskmovq : InstrInfo
	{
		private readonly FormatterString mnemonic;

		private readonly InstrOpInfoFlags flags;

		public SimpleInstrInfo_maskmovq(string mnemonic, InstrOpInfoFlags flags)
		{
			this.mnemonic = new FormatterString(mnemonic);
			this.flags = flags;
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			OpKind opKind = instruction.CodeSize switch
			{
				CodeSize.Unknown => instruction.Op0Kind, 
				CodeSize.Code16 => OpKind.MemorySegDI, 
				CodeSize.Code32 => OpKind.MemorySegEDI, 
				CodeSize.Code64 => OpKind.MemorySegRDI, 
				_ => throw new InvalidOperationException(), 
			};
			if (instruction.Op0Kind != opKind || (instruction.SegmentPrefix != 0 && FormatterUtils.ShowSegmentPrefix(Register.DS, in instruction, options)))
			{
				info = new InstrOpInfo(mnemonic, in instruction, flags);
				return;
			}
			info = default(InstrOpInfo);
			info.Flags = flags;
			info.Mnemonic = mnemonic;
			info.OpCount = 2;
			info.Op0Kind = (InstrOpKind)instruction.Op1Kind;
			info.Op0Index = 1;
			info.Op0Register = (byte)instruction.Op1Register;
			info.Op1Kind = (InstrOpKind)instruction.Op2Kind;
			info.Op1Index = 2;
			info.Op1Register = (byte)instruction.Op2Register;
		}
	}
	internal sealed class SimpleInstrInfo_pblendvb : InstrInfo
	{
		private readonly FormatterString mnemonic;

		public SimpleInstrInfo_pblendvb(string mnemonic)
		{
			this.mnemonic = new FormatterString(mnemonic);
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			info = default(InstrOpInfo);
			info.Mnemonic = mnemonic;
			info.OpCount = 3;
			info.Op0Kind = (InstrOpKind)instruction.Op0Kind;
			info.Op0Register = (byte)instruction.Op0Register;
			info.Op1Kind = (InstrOpKind)instruction.Op1Kind;
			info.Op1Index = 1;
			info.Op1Register = (byte)instruction.Op1Register;
			info.Op2Kind = InstrOpKind.Register;
			info.Op2Register = 77;
			info.Op2Index = -3;
		}
	}
	internal sealed class SimpleInstrInfo_reverse : InstrInfo
	{
		private readonly FormatterString mnemonic;

		public SimpleInstrInfo_reverse(string mnemonic)
		{
			this.mnemonic = new FormatterString(mnemonic);
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			info = default(InstrOpInfo);
			info.Mnemonic = mnemonic;
			info.OpCount = 2;
			info.Op0Kind = (InstrOpKind)instruction.Op1Kind;
			info.Op0Index = 1;
			info.Op0Register = (byte)instruction.Op1Register;
			info.Op1Kind = (InstrOpKind)instruction.Op0Kind;
			info.Op1Register = (byte)instruction.Op0Register;
		}
	}
	internal sealed class SimpleInstrInfo_OpSize : InstrInfo
	{
		private readonly CodeSize codeSize;

		private readonly FormatterString[] mnemonics;

		public SimpleInstrInfo_OpSize(CodeSize codeSize, string mnemonic, string mnemonic16, string mnemonic32, string mnemonic64)
		{
			this.codeSize = codeSize;
			mnemonics = new FormatterString[4];
			mnemonics[0] = new FormatterString(mnemonic);
			mnemonics[1] = new FormatterString(mnemonic16);
			mnemonics[2] = new FormatterString(mnemonic32);
			mnemonics[3] = new FormatterString(mnemonic64);
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			FormatterString mnemonic = ((instruction.CodeSize != codeSize) ? mnemonics[(int)codeSize] : mnemonics[0]);
			info = new InstrOpInfo(mnemonic, in instruction, InstrOpInfoFlags.None);
		}
	}
	internal sealed class SimpleInstrInfo_OpSize_cc : InstrInfo
	{
		private readonly CodeSize codeSize;

		private readonly int ccIndex;

		private readonly FormatterString[] mnemonics;

		private readonly FormatterString[] mnemonics_other;

		public SimpleInstrInfo_OpSize_cc(CodeSize codeSize, int ccIndex, string[] mnemonics, string[] mnemonics_other)
		{
			this.codeSize = codeSize;
			this.ccIndex = ccIndex;
			this.mnemonics = FormatterString.Create(mnemonics);
			this.mnemonics_other = FormatterString.Create(mnemonics_other);
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			FormatterString mnemonic = MnemonicCC.GetMnemonicCC(mnemonics: (instruction.CodeSize != codeSize) ? mnemonics_other : mnemonics, options: options, ccIndex: ccIndex);
			info = new InstrOpInfo(mnemonic, in instruction, InstrOpInfoFlags.None);
		}
	}
	internal sealed class SimpleInstrInfo_OpSize2 : InstrInfo
	{
		private readonly FormatterString[] mnemonics;

		private readonly bool canUseBnd;

		public SimpleInstrInfo_OpSize2(string mnemonic, string mnemonic16, string mnemonic32, string mnemonic64, bool canUseBnd)
		{
			mnemonics = new FormatterString[4];
			mnemonics[0] = new FormatterString(mnemonic);
			mnemonics[1] = new FormatterString(mnemonic16);
			mnemonics[2] = new FormatterString(mnemonic32);
			mnemonics[3] = new FormatterString(mnemonic64);
			this.canUseBnd = canUseBnd;
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			FormatterString mnemonic = mnemonics[(int)instruction.CodeSize];
			InstrOpInfoFlags instrOpInfoFlags = InstrOpInfoFlags.None;
			if (canUseBnd && instruction.HasRepnePrefix)
			{
				instrOpInfoFlags |= InstrOpInfoFlags.BndPrefix;
			}
			info = new InstrOpInfo(mnemonic, in instruction, instrOpInfoFlags);
		}
	}
	internal sealed class SimpleInstrInfo_fword : InstrInfo
	{
		private readonly CodeSize codeSize;

		private readonly InstrOpInfoFlags flags;

		private readonly FormatterString mnemonic;

		private readonly FormatterString mnemonic2;

		public SimpleInstrInfo_fword(CodeSize codeSize, InstrOpInfoFlags flags, string mnemonic, string mnemonic2)
		{
			this.codeSize = codeSize;
			this.flags = flags;
			this.mnemonic = new FormatterString(mnemonic);
			this.mnemonic2 = new FormatterString(mnemonic2);
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			FormatterString formatterString = ((instruction.CodeSize != codeSize && instruction.CodeSize != 0) ? mnemonic2 : mnemonic);
			info = new InstrOpInfo(formatterString, in instruction, flags);
		}
	}
	internal sealed class SimpleInstrInfo_jcc : InstrInfo
	{
		private readonly int ccIndex;

		private readonly FormatterString[] mnemonics;

		public SimpleInstrInfo_jcc(int ccIndex, string[] mnemonics)
		{
			this.ccIndex = ccIndex;
			this.mnemonics = FormatterString.Create(mnemonics);
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			InstrOpInfoFlags instrOpInfoFlags = InstrOpInfoFlags.None;
			switch (instruction.SegmentPrefix)
			{
			case Register.CS:
				instrOpInfoFlags |= InstrOpInfoFlags.JccNotTaken;
				break;
			case Register.DS:
				instrOpInfoFlags |= InstrOpInfoFlags.JccTaken;
				break;
			}
			if (instruction.HasRepnePrefix)
			{
				instrOpInfoFlags |= InstrOpInfoFlags.BndPrefix;
			}
			FormatterString mnemonicCC = MnemonicCC.GetMnemonicCC(options, ccIndex, mnemonics);
			info = new InstrOpInfo(mnemonicCC, in instruction, instrOpInfoFlags);
		}
	}
	internal sealed class SimpleInstrInfo_bnd : InstrInfo
	{
		private readonly FormatterString mnemonic;

		private readonly InstrOpInfoFlags flags;

		public SimpleInstrInfo_bnd(string mnemonic, InstrOpInfoFlags flags)
		{
			this.mnemonic = new FormatterString(mnemonic);
			this.flags = flags;
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			InstrOpInfoFlags instrOpInfoFlags = flags;
			if (instruction.HasRepnePrefix)
			{
				instrOpInfoFlags |= InstrOpInfoFlags.BndPrefix;
			}
			info = new InstrOpInfo(mnemonic, in instruction, instrOpInfoFlags);
		}
	}
	internal sealed class SimpleInstrInfo_pops : InstrInfo
	{
		private readonly FormatterString mnemonic;

		private readonly FormatterString[] pseudo_ops;

		private readonly InstrOpInfoFlags flags;

		public SimpleInstrInfo_pops(string mnemonic, FormatterString[] pseudo_ops)
			: this(mnemonic, pseudo_ops, InstrOpInfoFlags.None)
		{
		}

		public SimpleInstrInfo_pops(string mnemonic, FormatterString[] pseudo_ops, InstrOpInfoFlags flags)
		{
			this.mnemonic = new FormatterString(mnemonic);
			this.pseudo_ops = pseudo_ops;
			this.flags = flags;
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			info = new InstrOpInfo(mnemonic, in instruction, flags);
			int immediate = instruction.Immediate8;
			if (options.UsePseudoOps && (uint)immediate < (uint)pseudo_ops.Length)
			{
				info.Mnemonic = pseudo_ops[immediate];
				RemoveLastOp(ref info);
			}
		}

		internal static void RemoveLastOp(ref InstrOpInfo info)
		{
			switch (info.OpCount)
			{
			case 4:
				info.Op3Index = -1;
				break;
			case 3:
				info.Op2Index = -1;
				break;
			default:
				throw new InvalidOperationException();
			}
			info.OpCount--;
		}
	}
	internal sealed class SimpleInstrInfo_pclmulqdq : InstrInfo
	{
		private readonly FormatterString mnemonic;

		private readonly FormatterString[] pseudo_ops;

		public SimpleInstrInfo_pclmulqdq(string mnemonic, FormatterString[] pseudo_ops)
		{
			this.mnemonic = new FormatterString(mnemonic);
			this.pseudo_ops = pseudo_ops;
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			info = new InstrOpInfo(mnemonic, in instruction, InstrOpInfoFlags.None);
			if (options.UsePseudoOps)
			{
				int num = instruction.Immediate8 switch
				{
					0 => 0, 
					1 => 1, 
					16 => 2, 
					17 => 3, 
					_ => -1, 
				};
				if (num >= 0)
				{
					info.Mnemonic = pseudo_ops[num];
					SimpleInstrInfo_pops.RemoveLastOp(ref info);
				}
			}
		}
	}
	internal sealed class SimpleInstrInfo_imul : InstrInfo
	{
		private readonly FormatterString mnemonic;

		public SimpleInstrInfo_imul(string mnemonic)
		{
			this.mnemonic = new FormatterString(mnemonic);
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			info = new InstrOpInfo(mnemonic, in instruction, InstrOpInfoFlags.None);
			if (options.UsePseudoOps && info.Op0Kind == InstrOpKind.Register && info.Op1Kind == InstrOpKind.Register && info.Op0Register == info.Op1Register)
			{
				info.OpCount--;
				info.Op0Index = -7;
				info.Op1Kind = info.Op2Kind;
				info.Op1Index = 2;
				info.Op2Index = -1;
			}
		}
	}
	internal sealed class SimpleInstrInfo_Reg16 : InstrInfo
	{
		private readonly FormatterString mnemonic;

		private readonly InstrOpInfoFlags flags;

		public SimpleInstrInfo_Reg16(string mnemonic, InstrOpInfoFlags flags)
		{
			this.mnemonic = new FormatterString(mnemonic);
			this.flags = flags;
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			info = new InstrOpInfo(mnemonic, in instruction, flags);
			if (37 <= info.Op0Register && info.Op0Register <= 68)
			{
				info.Op0Register = (byte)(((info.Op0Register - 37) & 0xF) + 21);
			}
			if (37 <= info.Op1Register && info.Op1Register <= 68)
			{
				info.Op1Register = (byte)(((info.Op1Register - 37) & 0xF) + 21);
			}
			if (37 <= info.Op2Register && info.Op2Register <= 68)
			{
				info.Op2Register = (byte)(((info.Op2Register - 37) & 0xF) + 21);
			}
		}
	}
	internal sealed class SimpleInstrInfo_Reg32 : InstrInfo
	{
		private readonly FormatterString mnemonic;

		private readonly InstrOpInfoFlags flags;

		public SimpleInstrInfo_Reg32(string mnemonic, InstrOpInfoFlags flags)
		{
			this.mnemonic = new FormatterString(mnemonic);
			this.flags = flags;
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			info = new InstrOpInfo(mnemonic, in instruction, flags);
			if (53 <= info.Op0Register && info.Op0Register <= 68)
			{
				info.Op0Register = (byte)(info.Op0Register - 53 + 37);
			}
			if (53 <= info.Op1Register && info.Op1Register <= 68)
			{
				info.Op1Register = (byte)(info.Op1Register - 53 + 37);
			}
			if (53 <= info.Op2Register && info.Op2Register <= 68)
			{
				info.Op2Register = (byte)(info.Op2Register - 53 + 37);
			}
		}
	}
	internal sealed class SimpleInstrInfo_reg : InstrInfo
	{
		private readonly FormatterString mnemonic;

		private readonly Register register;

		public SimpleInstrInfo_reg(string mnemonic, Register register)
		{
			this.mnemonic = new FormatterString(mnemonic);
			this.register = register;
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			info = default(InstrOpInfo);
			info.Mnemonic = mnemonic;
			info.OpCount = 1;
			info.Op0Kind = InstrOpKind.Register;
			info.Op0Register = (byte)register;
			info.Op0Index = -3;
		}
	}
	internal sealed class SimpleInstrInfo_invlpga : InstrInfo
	{
		private readonly int bitness;

		private readonly FormatterString mnemonic;

		public SimpleInstrInfo_invlpga(int bitness, string mnemonic)
		{
			this.bitness = bitness;
			this.mnemonic = new FormatterString(mnemonic);
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			info = default(InstrOpInfo);
			info.Mnemonic = mnemonic;
			info.OpCount = 2;
			info.Op0Kind = InstrOpKind.Register;
			info.Op1Kind = InstrOpKind.Register;
			info.Op1Register = 38;
			info.Op0Index = -3;
			info.Op1Index = -3;
			switch (bitness)
			{
			case 16:
				info.Op0Register = 21;
				break;
			case 32:
				info.Op0Register = 37;
				break;
			case 64:
				info.Op0Register = 53;
				break;
			default:
				throw new InvalidOperationException();
			}
		}
	}
	internal sealed class SimpleInstrInfo_DeclareData : InstrInfo
	{
		private readonly FormatterString mnemonic;

		private readonly InstrOpKind opKind;

		public SimpleInstrInfo_DeclareData(Code code, string mnemonic)
		{
			this.mnemonic = new FormatterString(mnemonic);
			opKind = code switch
			{
				Code.DeclareByte => InstrOpKind.DeclareByte, 
				Code.DeclareWord => InstrOpKind.DeclareWord, 
				Code.DeclareDword => InstrOpKind.DeclareDword, 
				Code.DeclareQword => InstrOpKind.DeclareQword, 
				_ => throw new InvalidOperationException(), 
			};
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			info = new InstrOpInfo(mnemonic, in instruction, InstrOpInfoFlags.MnemonicIsDirective);
			info.OpCount = (byte)instruction.DeclareDataCount;
			info.Op0Kind = opKind;
			info.Op1Kind = opKind;
			info.Op2Kind = opKind;
			info.Op3Kind = opKind;
			info.Op4Kind = opKind;
			info.Op0Index = -3;
			info.Op1Index = -3;
			info.Op2Index = -3;
			info.Op3Index = -3;
			info.Op4Index = -3;
		}
	}
	internal static class InstrInfos
	{
		public static readonly InstrInfo[] AllInfos = ReadInfos();

		private static string AddSuffix(string s, char[] ca)
		{
			return string.Intern(s + new string(ca));
		}

		private static string AddPrefix(string s, char[] ca)
		{
			return string.Intern(new string(ca) + s);
		}

		private static InstrInfo[] ReadInfos()
		{
			DataReader dataReader = new DataReader(GetSerializedInstrInfos());
			InstrInfo[] array = new InstrInfo[4911];
			string[] stringsTable = FormatterStringsTable.GetStringsTable();
			char[] array2 = new char[1];
			int index = -1;
			for (int i = 0; i < array.Length; i++)
			{
				byte num = dataReader.ReadByte();
				CtorKind ctorKind = (CtorKind)(num & 0x7F);
				int num2;
				if (ctorKind == CtorKind.Previous)
				{
					num2 = dataReader.Index;
					dataReader.Index = index;
					ctorKind = (CtorKind)(dataReader.ReadByte() & 0x7F);
				}
				else
				{
					num2 = -1;
					index = dataReader.Index - 1;
				}
				string text = stringsTable[dataReader.ReadCompressedUInt32()];
				if ((num & 0x80u) != 0)
				{
					array2[0] = 'v';
					text = AddPrefix(text, array2);
				}
				InstrInfo instrInfo;
				switch (ctorKind)
				{
				case CtorKind.Normal_1:
					instrInfo = new SimpleInstrInfo(text);
					break;
				case CtorKind.Normal_2:
				{
					uint num3 = dataReader.ReadCompressedUInt32();
					instrInfo = new SimpleInstrInfo(text, (InstrOpInfoFlags)num3);
					break;
				}
				case CtorKind.AamAad:
					instrInfo = new SimpleInstrInfo_AamAad(text);
					break;
				case CtorKind.AX:
				{
					array2[0] = (char)dataReader.ReadByte();
					string mnemonic_no_args = AddSuffix(text, array2);
					instrInfo = new SimpleInstrInfo_AX(text, mnemonic_no_args);
					break;
				}
				case CtorKind.AY:
				{
					array2[0] = (char)dataReader.ReadByte();
					string mnemonic_no_args = AddSuffix(text, array2);
					instrInfo = new SimpleInstrInfo_AY(text, mnemonic_no_args);
					break;
				}
				case CtorKind.bnd:
				{
					uint num3 = dataReader.ReadCompressedUInt32();
					instrInfo = new SimpleInstrInfo_bnd(text, (InstrOpInfoFlags)num3);
					break;
				}
				case CtorKind.DeclareData:
					instrInfo = new SimpleInstrInfo_DeclareData((Code)i, text);
					break;
				case CtorKind.DX:
				{
					array2[0] = (char)dataReader.ReadByte();
					string mnemonic_no_args = AddSuffix(text, array2);
					instrInfo = new SimpleInstrInfo_DX(text, mnemonic_no_args);
					break;
				}
				case CtorKind.fword:
				{
					array2[0] = (char)dataReader.ReadByte();
					string mnemonic_no_args = AddSuffix(text, array2);
					uint num3 = dataReader.ReadByte();
					uint num4 = dataReader.ReadCompressedUInt32();
					instrInfo = new SimpleInstrInfo_fword((CodeSize)num3, (InstrOpInfoFlags)num4, text, mnemonic_no_args);
					break;
				}
				case CtorKind.Int3:
					instrInfo = new SimpleInstrInfo_Int3(text);
					break;
				case CtorKind.imul:
					instrInfo = new SimpleInstrInfo_imul(text);
					break;
				case CtorKind.invlpga:
				{
					uint num3 = dataReader.ReadCompressedUInt32();
					instrInfo = new SimpleInstrInfo_invlpga((int)num3, text);
					break;
				}
				case CtorKind.CCa_1:
				{
					uint num3 = dataReader.ReadCompressedUInt32();
					instrInfo = new SimpleInstrInfo_cc((int)num3, new string[1] { text });
					break;
				}
				case CtorKind.CCa_2:
				{
					string mnemonic_no_args = stringsTable[dataReader.ReadCompressedUInt32()];
					uint num3 = dataReader.ReadCompressedUInt32();
					instrInfo = new SimpleInstrInfo_cc((int)num3, new string[2] { text, mnemonic_no_args });
					break;
				}
				case CtorKind.CCa_3:
				{
					string mnemonic_no_args = stringsTable[dataReader.ReadCompressedUInt32()];
					string mnemonic = stringsTable[dataReader.ReadCompressedUInt32()];
					uint num3 = dataReader.ReadCompressedUInt32();
					instrInfo = new SimpleInstrInfo_cc((int)num3, new string[3] { text, mnemonic_no_args, mnemonic });
					break;
				}
				case CtorKind.CCb_1:
				{
					uint num4 = dataReader.ReadCompressedUInt32();
					uint num3 = dataReader.ReadCompressedUInt32();
					instrInfo = new SimpleInstrInfo_cc((int)num4, new string[1] { text }, (InstrOpInfoFlags)num3);
					break;
				}
				case CtorKind.CCb_2:
				{
					string mnemonic_no_args = stringsTable[dataReader.ReadCompressedUInt32()];
					uint num4 = dataReader.ReadCompressedUInt32();
					uint num3 = dataReader.ReadCompressedUInt32();
					instrInfo = new SimpleInstrInfo_cc((int)num4, new string[2] { text, mnemonic_no_args }, (InstrOpInfoFlags)num3);
					break;
				}
				case CtorKind.CCb_3:
				{
					string mnemonic_no_args = stringsTable[dataReader.ReadCompressedUInt32()];
					string mnemonic = stringsTable[dataReader.ReadCompressedUInt32()];
					uint num4 = dataReader.ReadCompressedUInt32();
					uint num3 = dataReader.ReadCompressedUInt32();
					instrInfo = new SimpleInstrInfo_cc((int)num4, new string[3] { text, mnemonic_no_args, mnemonic }, (InstrOpInfoFlags)num3);
					break;
				}
				case CtorKind.jcc_1:
				{
					uint num3 = dataReader.ReadCompressedUInt32();
					instrInfo = new SimpleInstrInfo_jcc((int)num3, new string[1] { text });
					break;
				}
				case CtorKind.jcc_2:
				{
					string mnemonic_no_args = stringsTable[dataReader.ReadCompressedUInt32()];
					uint num3 = dataReader.ReadCompressedUInt32();
					instrInfo = new SimpleInstrInfo_jcc((int)num3, new string[2] { text, mnemonic_no_args });
					break;
				}
				case CtorKind.jcc_3:
				{
					string mnemonic_no_args = stringsTable[dataReader.ReadCompressedUInt32()];
					string mnemonic = stringsTable[dataReader.ReadCompressedUInt32()];
					uint num3 = dataReader.ReadCompressedUInt32();
					instrInfo = new SimpleInstrInfo_jcc((int)num3, new string[3] { text, mnemonic_no_args, mnemonic });
					break;
				}
				case CtorKind.Loopcc1:
				{
					string mnemonic_no_args = stringsTable[dataReader.ReadCompressedUInt32()];
					uint num3 = dataReader.ReadCompressedUInt32();
					instrInfo = new SimpleInstrInfo_cc((int)num3, new string[2] { text, mnemonic_no_args });
					break;
				}
				case CtorKind.Loopcc2:
				{
					string mnemonic_no_args = stringsTable[dataReader.ReadCompressedUInt32()];
					array2[0] = (char)dataReader.ReadByte();
					uint num4 = dataReader.ReadCompressedUInt32();
					string mnemonic = AddSuffix(text, array2);
					string mnemonic2 = AddSuffix(mnemonic_no_args, array2);
					uint num3 = dataReader.ReadByte();
					instrInfo = new SimpleInstrInfo_OpSize_cc((CodeSize)num3, (int)num4, new string[2] { text, mnemonic_no_args }, new string[2] { mnemonic, mnemonic2 });
					break;
				}
				case CtorKind.maskmovq:
				{
					uint num3 = dataReader.ReadCompressedUInt32();
					instrInfo = new SimpleInstrInfo_maskmovq(text, (InstrOpInfoFlags)num3);
					break;
				}
				case CtorKind.memsize:
				{
					uint num3 = dataReader.ReadCompressedUInt32();
					instrInfo = new SimpleInstrInfo_memsize((int)num3, text);
					break;
				}
				case CtorKind.monitor:
				{
					uint num3 = dataReader.ReadByte();
					uint num4 = dataReader.ReadByte();
					uint register = dataReader.ReadByte();
					instrInfo = new SimpleInstrInfo_monitor(text, (Register)num3, (Register)num4, (Register)register);
					break;
				}
				case CtorKind.mwait:
					instrInfo = new SimpleInstrInfo_mwait(text);
					break;
				case CtorKind.mwaitx:
					instrInfo = new SimpleInstrInfo_mwaitx(text);
					break;
				case CtorKind.nop:
				{
					uint num3 = dataReader.ReadCompressedUInt32();
					uint num4 = dataReader.ReadByte();
					instrInfo = new SimpleInstrInfo_nop((int)num3, text, (Register)num4);
					break;
				}
				case CtorKind.OpSize_1:
				{
					uint num3 = dataReader.ReadByte();
					array2[0] = 'w';
					string mnemonic_no_args = AddSuffix(text, array2);
					array2[0] = 'd';
					string mnemonic = AddSuffix(text, array2);
					array2[0] = 'q';
					string mnemonic2 = AddSuffix(text, array2);
					instrInfo = new SimpleInstrInfo_OpSize((CodeSize)num3, text, mnemonic_no_args, mnemonic, mnemonic2);
					break;
				}
				case CtorKind.OpSize_2:
				{
					array2[0] = (char)dataReader.ReadByte();
					string mnemonic_no_args = AddSuffix(text, array2);
					uint num3 = dataReader.ReadByte();
					instrInfo = new SimpleInstrInfo_OpSize((CodeSize)num3, text, mnemonic_no_args, mnemonic_no_args, mnemonic_no_args);
					break;
				}
				case CtorKind.OpSize2:
				{
					string mnemonic_no_args = stringsTable[dataReader.ReadCompressedUInt32()];
					string mnemonic = stringsTable[dataReader.ReadCompressedUInt32()];
					string mnemonic2 = stringsTable[dataReader.ReadCompressedUInt32()];
					uint num3 = dataReader.ReadByte();
					if (num3 > 1)
					{
						throw new InvalidOperationException();
					}
					instrInfo = new SimpleInstrInfo_OpSize2(text, mnemonic_no_args, mnemonic, mnemonic2, num3 != 0);
					break;
				}
				case CtorKind.pblendvb:
					instrInfo = new SimpleInstrInfo_pblendvb(text);
					break;
				case CtorKind.pclmulqdq:
				{
					uint num3 = dataReader.ReadByte();
					instrInfo = new SimpleInstrInfo_pclmulqdq(text, FormatterConstants.GetPseudoOps((PseudoOpsKind)num3));
					break;
				}
				case CtorKind.pops_2:
				{
					uint num3 = dataReader.ReadByte();
					instrInfo = new SimpleInstrInfo_pops(text, FormatterConstants.GetPseudoOps((PseudoOpsKind)num3));
					break;
				}
				case CtorKind.pops_3:
				{
					uint num3 = dataReader.ReadByte();
					uint num4 = dataReader.ReadCompressedUInt32();
					instrInfo = new SimpleInstrInfo_pops(text, FormatterConstants.GetPseudoOps((PseudoOpsKind)num3), (InstrOpInfoFlags)num4);
					break;
				}
				case CtorKind.reg:
				{
					uint num3 = dataReader.ReadByte();
					instrInfo = new SimpleInstrInfo_reg(text, (Register)num3);
					break;
				}
				case CtorKind.Reg16:
				{
					uint num3 = dataReader.ReadCompressedUInt32();
					instrInfo = new SimpleInstrInfo_Reg16(text, (InstrOpInfoFlags)num3);
					break;
				}
				case CtorKind.Reg32:
				{
					uint num3 = dataReader.ReadCompressedUInt32();
					instrInfo = new SimpleInstrInfo_Reg32(text, (InstrOpInfoFlags)num3);
					break;
				}
				case CtorKind.reverse:
					instrInfo = new SimpleInstrInfo_reverse(text);
					break;
				case CtorKind.ST_STi:
					instrInfo = new SimpleInstrInfo_ST_STi(text);
					break;
				case CtorKind.STi_ST:
				{
					uint num3 = dataReader.ReadByte();
					if (num3 > 1)
					{
						throw new InvalidOperationException();
					}
					instrInfo = new SimpleInstrInfo_STi_ST(text, num3 != 0);
					break;
				}
				case CtorKind.STIG1:
				{
					uint num3 = dataReader.ReadByte();
					if (num3 > 1)
					{
						throw new InvalidOperationException();
					}
					instrInfo = new SimpleInstrInfo_STIG1(text, num3 != 0);
					break;
				}
				case CtorKind.XLAT:
				{
					array2[0] = 'b';
					string mnemonic_no_args = AddSuffix(text, array2);
					instrInfo = new SimpleInstrInfo_XLAT(text, mnemonic_no_args);
					break;
				}
				case CtorKind.XY:
				{
					array2[0] = (char)dataReader.ReadByte();
					string mnemonic_no_args = AddSuffix(text, array2);
					instrInfo = new SimpleInstrInfo_XY(text, mnemonic_no_args);
					break;
				}
				case CtorKind.YA:
				{
					array2[0] = (char)dataReader.ReadByte();
					string mnemonic_no_args = AddSuffix(text, array2);
					instrInfo = new SimpleInstrInfo_YA(text, mnemonic_no_args);
					break;
				}
				case CtorKind.YD:
				{
					array2[0] = (char)dataReader.ReadByte();
					string mnemonic_no_args = AddSuffix(text, array2);
					instrInfo = new SimpleInstrInfo_YD(text, mnemonic_no_args);
					break;
				}
				case CtorKind.YX:
				{
					array2[0] = (char)dataReader.ReadByte();
					string mnemonic_no_args = AddSuffix(text, array2);
					instrInfo = new SimpleInstrInfo_YX(text, mnemonic_no_args);
					break;
				}
				default:
					throw new InvalidOperationException();
				}
				array[i] = instrInfo;
				if (num2 >= 0)
				{
					dataReader.Index = num2;
				}
			}
			if (dataReader.CanRead)
			{
				throw new InvalidOperationException();
			}
			return array;
		}

		private static ReadOnlySpan<byte> GetSerializedInstrInfos()
		{
			return new byte[10729]
			{
				1, 128, 1, 8, 130, 1, 8, 132, 1, 8,
				134, 1, 8, 136, 1, 1, 4, 0, 0, 0,
				0, 0, 0, 0, 0, 0, 0, 0, 33, 3,
				1, 33, 3, 2, 33, 12, 1, 33, 12, 2,
				1, 5, 0, 0, 0, 0, 0, 0, 0, 0,
				0, 0, 0, 33, 3, 1, 33, 3, 2, 33,
				12, 1, 1, 6, 0, 0, 0, 0, 0, 0,
				0, 0, 0, 0, 0, 33, 3, 1, 33, 3,
				2, 33, 12, 1, 33, 12, 2, 1, 7, 0,
				0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
				33, 3, 1, 33, 3, 2, 33, 12, 1, 33,
				12, 2, 1, 8, 0, 0, 0, 0, 0, 0,
				0, 0, 0, 0, 0, 1, 137, 1, 1, 9,
				0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
				0, 1, 138, 1, 1, 10, 0, 0, 0, 0,
				0, 0, 0, 0, 0, 0, 0, 1, 139, 1,
				1, 11, 0, 0, 0, 0, 0, 0, 0, 0,
				0, 0, 0, 1, 140, 1, 1, 141, 1, 0,
				1, 142, 1, 0, 1, 3, 0, 0, 1, 12,
				0, 0, 33, 143, 1, 1, 33, 143, 1, 2,
				33, 145, 1, 1, 33, 145, 1, 2, 2, 147,
				1, 8, 0, 43, 148, 1, 0, 0, 2, 149,
				1, 8, 0, 0, 33, 3, 1, 33, 3, 2,
				33, 3, 3, 12, 27, 0, 0, 33, 3, 1,
				33, 3, 2, 33, 3, 3, 12, 27, 0, 0,
				27, 151, 1, 98, 27, 151, 1, 119, 27, 151,
				1, 100, 9, 155, 1, 98, 9, 155, 1, 119,
				9, 155, 1, 100, 20, 159, 1, 0, 0, 0,
				20, 160, 1, 1, 0, 0, 22, 161, 1, 162,
				1, 163, 1, 2, 0, 0, 22, 164, 1, 165,
				1, 166, 1, 3, 0, 0, 21, 167, 1, 168,
				1, 4, 0, 0, 21, 169, 1, 170, 1, 5,
				0, 0, 21, 171, 1, 172, 1, 6, 0, 0,
				21, 173, 1, 174, 1, 7, 0, 0, 20, 175,
				1, 8, 0, 0, 20, 176, 1, 9, 0, 0,
				21, 177, 1, 178, 1, 10, 0, 0, 21, 179,
				1, 180, 1, 11, 0, 0, 21, 181, 1, 182,
				1, 12, 0, 0, 21, 183, 1, 184, 1, 13,
				0, 0, 21, 185, 1, 186, 1, 14, 0, 0,
				21, 187, 1, 188, 1, 15, 0, 0, 2, 4,
				24, 2, 5, 24, 2, 6, 24, 2, 7, 24,
				2, 8, 24, 2, 9, 24, 2, 10, 24, 2,
				11, 24, 2, 4, 24, 0, 0, 2, 5, 24,
				0, 0, 2, 6, 24, 0, 0, 2, 7, 24,
				0, 0, 2, 8, 24, 0, 0, 2, 9, 24,
				0, 0, 2, 10, 24, 0, 0, 2, 11, 24,
				0, 0, 2, 4, 24, 2, 5, 24, 2, 6,
				24, 2, 7, 24, 2, 8, 24, 2, 9, 24,
				2, 10, 24, 2, 11, 24, 2, 4, 24, 0,
				0, 2, 5, 24, 0, 0, 2, 6, 24, 0,
				0, 2, 7, 24, 0, 0, 2, 8, 24, 0,
				0, 2, 9, 24, 0, 0, 2, 10, 24, 0,
				0, 2, 11, 24, 0, 0, 1, 13, 0, 0,
				0, 45, 61, 0, 0, 0, 1, 1, 0, 0,
				0, 0, 0, 0, 0, 0, 0, 0, 1, 189,
				1, 0, 0, 1, 1, 0, 0, 2, 12, 24,
				0, 0, 32, 2, 16, 21, 32, 2, 96, 37,
				32, 2, 0, 53, 1, 61, 0, 0, 1, 190,
				1, 1, 192, 1, 1, 193, 1, 1, 195, 1,
				1, 197, 1, 1, 199, 1, 1, 201, 1, 1,
				43, 0, 1, 205, 1, 1, 206, 1, 1, 207,
				1, 1, 208, 1, 1, 209, 1, 1, 210, 1,
				1, 211, 1, 1, 212, 1, 1, 213, 1, 1,
				1, 0, 0, 0, 0, 0, 0, 0, 28, 215,
				1, 98, 28, 215, 1, 119, 28, 215, 1, 100,
				28, 215, 1, 113, 41, 219, 1, 98, 41, 219,
				1, 119, 41, 219, 1, 100, 41, 219, 1, 113,
				1, 13, 0, 0, 0, 36, 223, 1, 98, 36,
				223, 1, 119, 36, 223, 1, 100, 36, 223, 1,
				113, 4, 228, 1, 98, 4, 228, 1, 119, 4,
				228, 1, 100, 4, 228, 1, 113, 5, 233, 1,
				98, 5, 233, 1, 119, 5, 233, 1, 100, 5,
				233, 1, 113, 1, 1, 0, 0, 0, 2, 29,
				24, 2, 30, 24, 2, 31, 24, 2, 32, 24,
				2, 18, 24, 2, 33, 24, 2, 41, 24, 2,
				34, 24, 2, 29, 24, 0, 0, 2, 30, 24,
				0, 0, 2, 31, 24, 0, 0, 2, 32, 24,
				0, 0, 2, 18, 24, 0, 0, 2, 33, 24,
				0, 0, 2, 41, 24, 0, 0, 2, 34, 24,
				0, 0, 35, 42, 42, 238, 1, 238, 1, 1,
				35, 42, 241, 1, 42, 241, 1, 1, 6, 42,
				0, 35, 42, 42, 238, 1, 238, 1, 1, 35,
				42, 241, 1, 42, 241, 1, 1, 6, 42, 0,
				1, 242, 1, 0, 1, 243, 1, 0, 2, 1,
				24, 1, 244, 1, 2, 1, 24, 0, 0, 1,
				245, 1, 0, 33, 246, 1, 1, 33, 246, 1,
				2, 33, 246, 1, 3, 33, 247, 1, 1, 33,
				247, 1, 2, 33, 247, 1, 3, 35, 249, 1,
				249, 1, 250, 1, 250, 1, 0, 35, 249, 1,
				251, 1, 249, 1, 249, 1, 0, 35, 252, 1,
				249, 1, 249, 1, 252, 1, 0, 35, 249, 1,
				249, 1, 250, 1, 250, 1, 0, 35, 249, 1,
				251, 1, 249, 1, 249, 1, 0, 35, 252, 1,
				249, 1, 249, 1, 252, 1, 0, 11, 254, 1,
				1, 254, 1, 1, 255, 1, 1, 128, 2, 1,
				129, 2, 1, 130, 2, 2, 29, 24, 2, 30,
				24, 2, 31, 24, 2, 32, 24, 2, 18, 24,
				2, 33, 24, 2, 41, 24, 2, 34, 24, 2,
				29, 24, 0, 0, 2, 30, 24, 0, 0, 2,
				31, 24, 0, 0, 2, 32, 24, 0, 0, 2,
				18, 24, 0, 0, 2, 33, 24, 0, 0, 2,
				41, 24, 0, 0, 2, 34, 24, 0, 0, 2,
				29, 24, 2, 30, 24, 2, 31, 24, 2, 32,
				24, 2, 18, 24, 2, 33, 24, 2, 41, 24,
				2, 34, 24, 2, 29, 24, 0, 0, 2, 30,
				24, 0, 0, 2, 31, 24, 0, 0, 2, 32,
				24, 0, 0, 2, 18, 24, 0, 0, 2, 33,
				24, 0, 0, 2, 41, 24, 0, 0, 2, 34,
				24, 0, 0, 3, 131, 2, 3, 132, 2, 1,
				133, 2, 48, 134, 2, 2, 136, 2, 24, 2,
				137, 2, 24, 2, 138, 2, 24, 2, 139, 2,
				24, 2, 140, 2, 24, 2, 141, 2, 24, 2,
				142, 2, 24, 2, 143, 2, 24, 46, 136, 2,
				46, 137, 2, 7, 138, 2, 1, 7, 139, 2,
				1, 46, 140, 2, 46, 141, 2, 46, 142, 2,
				46, 143, 2, 2, 144, 2, 24, 2, 145, 2,
				24, 2, 125, 24, 26, 146, 2, 16, 26, 146,
				2, 96, 1, 147, 2, 26, 148, 2, 16, 26,
				149, 2, 16, 26, 148, 2, 96, 26, 149, 2,
				96, 1, 150, 2, 1, 151, 2, 1, 144, 2,
				7, 152, 2, 1, 1, 153, 2, 1, 125, 1,
				155, 2, 1, 156, 2, 1, 157, 2, 1, 158,
				2, 1, 159, 2, 1, 160, 2, 1, 161, 2,
				1, 162, 2, 1, 163, 2, 1, 164, 2, 1,
				165, 2, 1, 166, 2, 1, 167, 2, 1, 168,
				2, 1, 169, 2, 1, 170, 2, 1, 171, 2,
				1, 172, 2, 1, 173, 2, 1, 174, 2, 1,
				175, 2, 1, 176, 2, 1, 177, 2, 1, 178,
				2, 1, 179, 2, 1, 180, 2, 1, 181, 2,
				2, 182, 2, 24, 2, 183, 2, 24, 2, 184,
				2, 24, 2, 185, 2, 24, 2, 186, 2, 24,
				2, 187, 2, 24, 2, 188, 2, 24, 2, 189,
				2, 24, 46, 190, 2, 46, 191, 2, 46, 192,
				2, 46, 193, 2, 1, 194, 2, 2, 195, 2,
				24, 2, 196, 2, 24, 2, 197, 2, 24, 2,
				198, 2, 24, 2, 144, 2, 24, 2, 125, 24,
				46, 199, 2, 46, 200, 2, 46, 201, 2, 46,
				202, 2, 1, 203, 2, 1, 204, 2, 1, 205,
				2, 1, 206, 2, 1, 207, 2, 1, 208, 2,
				1, 209, 2, 1, 210, 2, 1, 211, 2, 1,
				212, 2, 1, 213, 2, 46, 214, 2, 46, 215,
				2, 2, 136, 2, 24, 2, 137, 2, 24, 2,
				138, 2, 24, 2, 139, 2, 24, 2, 140, 2,
				24, 2, 141, 2, 24, 2, 142, 2, 24, 2,
				143, 2, 24, 47, 136, 2, 0, 47, 137, 2,
				0, 7, 138, 2, 1, 7, 139, 2, 1, 47,
				141, 2, 0, 47, 140, 2, 0, 47, 143, 2,
				0, 47, 142, 2, 0, 2, 144, 2, 24, 2,
				196, 2, 24, 2, 145, 2, 24, 2, 125, 24,
				26, 217, 2, 16, 26, 217, 2, 96, 26, 218,
				2, 16, 26, 219, 2, 16, 26, 218, 2, 96,
				26, 219, 2, 96, 1, 220, 2, 1, 221, 2,
				1, 222, 2, 7, 152, 2, 1, 1, 145, 2,
				1, 125, 7, 223, 2, 1, 7, 224, 2, 1,
				2, 182, 2, 24, 2, 183, 2, 24, 2, 184,
				2, 24, 2, 185, 2, 24, 2, 186, 2, 24,
				2, 187, 2, 24, 2, 188, 2, 24, 2, 189,
				2, 24, 47, 225, 2, 1, 47, 226, 2, 1,
				7, 139, 2, 1, 1, 227, 2, 47, 229, 2,
				1, 47, 228, 2, 1, 47, 231, 2, 1, 47,
				230, 2, 1, 2, 195, 2, 24, 2, 196, 2,
				24, 2, 197, 2, 24, 2, 198, 2, 24, 2,
				232, 2, 8, 2, 195, 2, 24, 2, 234, 2,
				8, 2, 198, 2, 24, 1, 236, 2, 7, 152,
				2, 1, 1, 125, 0, 1, 220, 2, 1, 221,
				2, 1, 237, 2, 1, 238, 2, 46, 239, 2,
				46, 240, 2, 24, 126, 241, 2, 119, 5, 1,
				0, 24, 126, 241, 2, 100, 5, 2, 0, 23,
				242, 2, 243, 2, 5, 23, 126, 241, 2, 5,
				0, 24, 127, 244, 2, 119, 4, 1, 0, 24,
				127, 244, 2, 100, 4, 2, 0, 23, 245, 2,
				246, 2, 4, 23, 127, 244, 2, 4, 0, 34,
				247, 2, 119, 1, 0, 34, 247, 2, 100, 2,
				0, 1, 248, 2, 1, 247, 2, 0, 1, 249,
				2, 0, 1, 250, 2, 0, 0, 1, 251, 2,
				0, 1, 252, 2, 0, 0, 1, 253, 2, 0,
				0, 6, 43, 0, 0, 0, 6, 28, 0, 0,
				0, 1, 28, 0, 0, 0, 0, 1, 252, 2,
				0, 0, 1, 253, 2, 0, 0, 1, 255, 2,
				1, 128, 3, 1, 129, 3, 2, 13, 24, 0,
				2, 130, 3, 24, 2, 131, 3, 24, 2, 132,
				3, 24, 2, 27, 24, 2, 133, 3, 24, 2,
				134, 3, 24, 2, 13, 24, 0, 0, 0, 0,
				0, 2, 130, 3, 24, 0, 0, 2, 131, 3,
				24, 0, 0, 2, 132, 3, 24, 0, 0, 2,
				27, 24, 0, 0, 2, 133, 3, 24, 0, 0,
				2, 134, 3, 24, 0, 0, 1, 135, 3, 1,
				136, 3, 1, 137, 3, 1, 138, 3, 1, 139,
				3, 1, 140, 3, 2, 141, 1, 24, 2, 142,
				1, 24, 2, 141, 1, 24, 0, 0, 2, 142,
				1, 24, 0, 0, 6, 43, 24, 0, 0, 2,
				43, 24, 0, 0, 6, 28, 24, 0, 0, 2,
				28, 24, 0, 0, 2, 3, 24, 0, 0, 2,
				143, 3, 8, 0, 0, 2, 144, 3, 8, 0,
				0, 2, 145, 3, 8, 43, 145, 3, 8, 0,
				2, 146, 3, 8, 43, 146, 3, 8, 0, 2,
				147, 3, 8, 43, 147, 3, 8, 0, 2, 148,
				3, 8, 43, 148, 3, 8, 0, 2, 149, 3,
				24, 0, 10, 150, 3, 119, 1, 0, 10, 150,
				3, 100, 2, 0, 10, 150, 3, 113, 3, 0,
				10, 151, 3, 119, 1, 0, 10, 151, 3, 100,
				2, 0, 10, 151, 3, 113, 3, 0, 10, 152,
				3, 119, 1, 8, 10, 152, 3, 100, 2, 8,
				10, 152, 3, 113, 3, 8, 10, 153, 3, 119,
				1, 8, 10, 153, 3, 100, 2, 8, 10, 153,
				3, 113, 3, 8, 2, 154, 3, 8, 0, 0,
				2, 155, 3, 8, 2, 156, 3, 8, 43, 156,
				3, 8, 0, 1, 157, 3, 1, 158, 3, 1,
				159, 3, 1, 160, 3, 1, 161, 3, 1, 162,
				3, 1, 163, 3, 29, 164, 3, 21, 38, 39,
				29, 164, 3, 37, 38, 39, 29, 164, 3, 53,
				54, 55, 30, 165, 3, 1, 166, 3, 1, 167,
				3, 1, 168, 3, 1, 169, 3, 1, 170, 3,
				1, 171, 3, 1, 172, 3, 1, 173, 3, 1,
				174, 3, 42, 175, 3, 21, 42, 175, 3, 37,
				42, 175, 3, 53, 1, 176, 3, 42, 177, 3,
				21, 42, 177, 3, 37, 42, 177, 3, 53, 42,
				178, 3, 21, 42, 178, 3, 37, 42, 178, 3,
				53, 1, 179, 3, 1, 180, 3, 42, 181, 3,
				37, 13, 182, 3, 16, 13, 182, 3, 32, 13,
				182, 3, 64, 1, 183, 3, 1, 184, 3, 1,
				185, 3, 1, 186, 3, 1, 187, 3, 1, 188,
				3, 29, 189, 3, 21, 38, 39, 29, 189, 3,
				37, 38, 39, 29, 189, 3, 53, 54, 55, 1,
				190, 3, 31, 191, 3, 1, 192, 3, 0, 0,
				1, 193, 3, 2, 194, 3, 8, 0, 0, 2,
				195, 3, 8, 0, 0, 1, 196, 3, 1, 197,
				3, 1, 198, 3, 1, 199, 3, 1, 201, 3,
				1, 202, 3, 1, 203, 3, 1, 204, 3, 1,
				205, 3, 1, 206, 3, 1, 207, 3, 1, 208,
				3, 1, 2, 0, 0, 1, 209, 3, 1, 211,
				3, 1, 212, 3, 1, 213, 3, 1, 214, 3,
				0, 0, 0, 0, 0, 1, 35, 129, 35, 128,
				128, 128, 128, 1, 36, 129, 36, 128, 128, 128,
				128, 2, 38, 8, 129, 38, 130, 38, 8, 129,
				38, 130, 38, 8, 2, 37, 8, 129, 37, 130,
				37, 8, 129, 37, 130, 37, 8, 1, 35, 129,
				35, 128, 128, 128, 128, 1, 36, 129, 36, 128,
				128, 128, 128, 2, 38, 8, 129, 38, 130, 38,
				8, 129, 38, 130, 38, 8, 2, 37, 8, 129,
				37, 130, 37, 8, 129, 37, 130, 37, 8, 1,
				215, 3, 2, 216, 3, 8, 129, 215, 3, 130,
				216, 3, 8, 129, 215, 3, 130, 216, 3, 8,
				2, 217, 3, 8, 130, 217, 3, 8, 128, 1,
				218, 3, 130, 218, 3, 8, 128, 128, 128, 128,
				2, 219, 3, 8, 130, 219, 3, 8, 128, 128,
				128, 128, 2, 216, 3, 8, 130, 216, 3, 8,
				128, 2, 217, 3, 8, 130, 217, 3, 8, 128,
				1, 220, 3, 129, 220, 3, 128, 128, 128, 128,
				1, 221, 3, 129, 221, 3, 128, 128, 128, 128,
				1, 222, 3, 129, 222, 3, 128, 128, 128, 128,
				1, 223, 3, 129, 223, 3, 128, 128, 128, 128,
				1, 224, 3, 129, 224, 3, 128, 2, 225, 3,
				8, 130, 225, 3, 8, 128, 2, 226, 3, 8,
				130, 226, 3, 8, 128, 1, 227, 3, 130, 227,
				3, 8, 128, 128, 128, 128, 2, 225, 3, 8,
				130, 225, 3, 8, 128, 2, 226, 3, 8, 130,
				226, 3, 8, 128, 1, 2, 0, 0, 0, 0,
				0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
				0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
				228, 3, 1, 229, 3, 1, 230, 3, 1, 231,
				3, 2, 232, 3, 13, 2, 233, 3, 8, 0,
				1, 234, 3, 0, 1, 235, 3, 0, 2, 236,
				3, 13, 2, 233, 3, 8, 0, 2, 237, 3,
				8, 0, 1, 238, 3, 0, 2, 239, 3, 8,
				1, 240, 3, 1, 241, 3, 1, 242, 3, 1,
				243, 3, 2, 2, 24, 0, 0, 1, 1, 0,
				0, 0, 0, 0, 0, 0, 0, 0, 1, 19,
				129, 19, 128, 128, 128, 128, 1, 20, 129, 20,
				128, 128, 128, 128, 1, 19, 129, 19, 128, 128,
				128, 128, 1, 20, 129, 20, 128, 128, 128, 128,
				2, 244, 3, 8, 2, 245, 3, 8, 2, 246,
				3, 24, 0, 130, 246, 3, 24, 128, 128, 128,
				2, 247, 3, 24, 0, 130, 247, 3, 24, 128,
				128, 128, 1, 248, 3, 130, 248, 3, 8, 128,
				128, 128, 128, 1, 249, 3, 130, 249, 3, 8,
				128, 128, 128, 128, 2, 250, 3, 8, 2, 251,
				3, 8, 2, 252, 3, 9, 2, 253, 3, 1,
				2, 254, 3, 8, 0, 130, 254, 3, 8, 128,
				128, 128, 2, 255, 3, 8, 0, 130, 255, 3,
				8, 128, 128, 128, 2, 128, 4, 9, 2, 129,
				4, 1, 2, 130, 4, 8, 0, 130, 130, 4,
				8, 128, 128, 128, 2, 131, 4, 8, 0, 130,
				131, 4, 8, 128, 128, 128, 2, 132, 4, 8,
				130, 132, 4, 8, 128, 2, 133, 4, 8, 130,
				133, 4, 8, 128, 2, 134, 4, 8, 2, 135,
				4, 8, 130, 134, 4, 8, 130, 135, 4, 8,
				130, 134, 4, 8, 130, 135, 4, 8, 1, 136,
				4, 1, 137, 4, 1, 138, 4, 1, 139, 4,
				1, 140, 4, 1, 141, 4, 1, 142, 4, 1,
				143, 4, 14, 144, 4, 0, 0, 0, 14, 145,
				4, 1, 0, 0, 16, 146, 4, 147, 4, 148,
				4, 2, 0, 0, 16, 149, 4, 150, 4, 151,
				4, 3, 0, 0, 15, 152, 4, 153, 4, 4,
				0, 0, 15, 154, 4, 155, 4, 5, 0, 0,
				15, 156, 4, 157, 4, 6, 0, 0, 15, 158,
				4, 159, 4, 7, 0, 0, 14, 160, 4, 8,
				0, 0, 14, 161, 4, 9, 0, 0, 15, 162,
				4, 163, 4, 10, 0, 0, 15, 164, 4, 165,
				4, 11, 0, 0, 15, 166, 4, 167, 4, 12,
				0, 0, 15, 168, 4, 169, 4, 13, 0, 0,
				15, 170, 4, 171, 4, 14, 0, 0, 15, 172,
				4, 173, 4, 15, 0, 0, 1, 174, 4, 1,
				175, 4, 1, 176, 4, 1, 177, 4, 1, 178,
				4, 1, 179, 4, 1, 180, 4, 1, 181, 4,
				1, 182, 4, 1, 183, 4, 1, 184, 4, 1,
				185, 4, 1, 186, 4, 1, 187, 4, 1, 188,
				4, 1, 189, 4, 1, 190, 4, 1, 191, 4,
				1, 192, 4, 1, 193, 4, 1, 194, 4, 1,
				195, 4, 1, 196, 4, 1, 197, 4, 1, 198,
				4, 1, 199, 4, 1, 200, 4, 1, 201, 4,
				1, 202, 4, 1, 203, 4, 1, 204, 4, 1,
				205, 4, 0, 129, 205, 4, 128, 128, 128, 1,
				206, 4, 0, 129, 206, 4, 128, 128, 128, 1,
				207, 4, 129, 207, 4, 128, 128, 128, 128, 1,
				208, 4, 129, 208, 4, 128, 128, 128, 128, 2,
				209, 4, 8, 130, 209, 4, 8, 128, 2, 210,
				4, 8, 130, 210, 4, 8, 128, 1, 211, 4,
				129, 211, 4, 128, 2, 212, 4, 8, 130, 212,
				4, 8, 1, 213, 4, 129, 213, 4, 128, 2,
				214, 4, 8, 129, 214, 4, 1, 215, 4, 129,
				215, 4, 128, 128, 128, 128, 1, 216, 4, 129,
				216, 4, 128, 128, 128, 128, 1, 217, 4, 129,
				217, 4, 128, 128, 128, 128, 1, 218, 4, 129,
				218, 4, 128, 128, 128, 128, 1, 219, 4, 129,
				219, 4, 128, 128, 128, 128, 1, 220, 4, 129,
				220, 4, 128, 128, 128, 128, 1, 221, 4, 129,
				221, 4, 128, 128, 128, 128, 1, 222, 4, 129,
				222, 4, 128, 128, 128, 128, 1, 62, 129, 62,
				128, 128, 128, 128, 1, 63, 129, 63, 128, 128,
				128, 128, 2, 223, 4, 8, 130, 223, 4, 8,
				128, 2, 224, 4, 8, 130, 224, 4, 8, 128,
				1, 64, 129, 64, 128, 128, 128, 128, 1, 65,
				129, 65, 128, 128, 128, 128, 2, 225, 4, 8,
				130, 225, 4, 8, 128, 2, 226, 4, 8, 130,
				226, 4, 8, 128, 2, 66, 8, 130, 66, 8,
				128, 128, 128, 128, 1, 67, 130, 67, 24, 128,
				128, 128, 130, 67, 8, 2, 227, 4, 8, 130,
				227, 4, 8, 128, 2, 228, 4, 8, 130, 228,
				4, 8, 128, 1, 229, 4, 130, 229, 4, 8,
				128, 128, 128, 128, 2, 230, 4, 24, 0, 2,
				230, 4, 8, 1, 231, 4, 130, 231, 4, 8,
				128, 128, 128, 128, 1, 232, 4, 130, 232, 4,
				8, 128, 128, 128, 128, 1, 68, 129, 68, 128,
				128, 128, 128, 1, 69, 129, 69, 128, 128, 128,
				128, 2, 233, 4, 8, 130, 233, 4, 8, 128,
				2, 234, 4, 8, 130, 234, 4, 8, 128, 1,
				235, 4, 129, 235, 4, 128, 128, 128, 128, 1,
				236, 4, 129, 236, 4, 128, 128, 128, 128, 2,
				237, 4, 8, 130, 237, 4, 8, 128, 2, 238,
				4, 8, 130, 238, 4, 8, 128, 1, 239, 4,
				129, 239, 4, 128, 128, 128, 128, 1, 240, 4,
				129, 240, 4, 128, 128, 128, 128, 2, 241, 4,
				8, 129, 241, 4, 130, 241, 4, 8, 2, 242,
				4, 8, 129, 242, 4, 130, 242, 4, 8, 1,
				243, 4, 129, 243, 4, 128, 128, 128, 128, 1,
				244, 4, 129, 244, 4, 128, 128, 128, 128, 2,
				245, 4, 8, 130, 245, 4, 8, 128, 2, 246,
				4, 8, 130, 246, 4, 8, 128, 2, 70, 1,
				1, 70, 129, 70, 128, 128, 128, 128, 2, 71,
				1, 1, 71, 129, 71, 128, 128, 128, 128, 2,
				72, 1, 1, 72, 129, 72, 128, 128, 128, 128,
				2, 73, 1, 1, 73, 129, 73, 128, 128, 128,
				128, 2, 74, 1, 1, 74, 129, 74, 128, 128,
				128, 128, 2, 75, 1, 1, 75, 129, 75, 128,
				128, 128, 128, 2, 46, 1, 1, 46, 129, 46,
				128, 128, 128, 128, 2, 76, 1, 1, 76, 129,
				76, 128, 128, 128, 128, 2, 77, 1, 1, 77,
				129, 77, 128, 128, 128, 128, 2, 78, 1, 1,
				78, 129, 78, 128, 128, 128, 128, 2, 79, 1,
				1, 79, 129, 79, 128, 128, 128, 128, 2, 80,
				1, 1, 80, 129, 80, 128, 128, 128, 128, 1,
				247, 4, 129, 247, 4, 128, 128, 128, 128, 1,
				248, 4, 129, 248, 4, 128, 128, 128, 128, 2,
				47, 8, 1, 14, 2, 47, 8, 2, 14, 8,
				130, 47, 8, 130, 14, 8, 130, 47, 8, 130,
				14, 8, 1, 14, 1, 249, 4, 130, 249, 4,
				8, 128, 1, 48, 0, 0, 1, 49, 0, 0,
				1, 250, 4, 130, 250, 4, 8, 128, 1, 251,
				4, 0, 0, 1, 252, 4, 0, 0, 1, 253,
				4, 0, 0, 1, 254, 4, 0, 0, 2, 255,
				4, 1, 1, 81, 129, 81, 128, 128, 128, 128,
				1, 128, 5, 129, 128, 5, 128, 128, 128, 128,
				1, 129, 5, 129, 129, 5, 128, 128, 128, 128,
				1, 21, 0, 129, 21, 128, 128, 128, 128, 1,
				22, 0, 129, 22, 128, 128, 128, 128, 1, 23,
				0, 129, 23, 128, 128, 128, 128, 1, 130, 5,
				0, 0, 1, 131, 5, 0, 0, 1, 132, 5,
				0, 0, 1, 133, 5, 0, 0, 1, 15, 0,
				129, 15, 128, 128, 128, 128, 1, 16, 0, 129,
				16, 128, 128, 128, 128, 1, 134, 5, 0, 0,
				1, 17, 0, 129, 17, 128, 128, 128, 128, 1,
				24, 0, 129, 24, 128, 128, 128, 128, 1, 135,
				5, 129, 135, 5, 128, 128, 128, 128, 1, 25,
				0, 129, 25, 128, 128, 128, 128, 1, 136, 5,
				129, 136, 5, 128, 128, 128, 128, 2, 82, 1,
				1, 82, 129, 82, 128, 128, 128, 128, 2, 83,
				1, 1, 83, 129, 83, 128, 128, 128, 128, 2,
				50, 1, 1, 50, 129, 50, 128, 128, 128, 128,
				1, 137, 5, 1, 138, 5, 1, 139, 5, 2,
				140, 5, 8, 0, 2, 141, 5, 8, 0, 0,
				2, 142, 5, 24, 0, 2, 142, 5, 8, 1,
				143, 5, 2, 144, 5, 8, 0, 0, 1, 145,
				5, 0, 0, 2, 146, 5, 8, 0, 1, 147,
				5, 2, 148, 5, 8, 0, 2, 149, 5, 8,
				0, 2, 150, 5, 8, 0, 0, 2, 151, 5,
				24, 0, 2, 151, 5, 8, 1, 143, 5, 2,
				152, 5, 8, 0, 0, 1, 153, 5, 0, 0,
				2, 154, 5, 8, 0, 1, 147, 5, 2, 155,
				5, 8, 0, 2, 156, 5, 8, 0, 0, 1,
				157, 5, 0, 0, 2, 158, 5, 8, 0, 0,
				1, 159, 5, 0, 0, 2, 160, 5, 8, 0,
				0, 2, 161, 5, 24, 0, 2, 161, 5, 8,
				2, 162, 5, 8, 0, 0, 1, 163, 5, 0,
				0, 2, 164, 5, 24, 0, 2, 165, 5, 24,
				0, 1, 166, 5, 129, 166, 5, 128, 1, 167,
				5, 129, 167, 5, 128, 1, 168, 5, 129, 168,
				5, 128, 1, 169, 5, 129, 169, 5, 128, 2,
				47, 8, 1, 14, 2, 47, 8, 2, 14, 8,
				130, 47, 8, 130, 14, 8, 130, 47, 8, 130,
				14, 8, 2, 14, 8, 130, 14, 8, 128, 1,
				14, 1, 249, 4, 130, 249, 4, 8, 128, 1,
				48, 0, 0, 1, 49, 0, 0, 1, 250, 4,
				130, 250, 4, 8, 128, 1, 251, 4, 0, 0,
				1, 252, 4, 0, 0, 1, 253, 4, 0, 0,
				1, 254, 4, 0, 0, 20, 159, 1, 0, 0,
				0, 20, 160, 1, 1, 0, 0, 22, 161, 1,
				162, 1, 163, 1, 2, 0, 0, 22, 164, 1,
				165, 1, 166, 1, 3, 0, 0, 21, 167, 1,
				168, 1, 4, 0, 0, 21, 169, 1, 170, 1,
				5, 0, 0, 21, 171, 1, 172, 1, 6, 0,
				0, 21, 173, 1, 174, 1, 7, 0, 0, 20,
				175, 1, 8, 0, 0, 20, 176, 1, 9, 0,
				0, 21, 177, 1, 178, 1, 10, 0, 0, 21,
				179, 1, 180, 1, 11, 0, 0, 21, 181, 1,
				182, 1, 12, 0, 0, 21, 183, 1, 184, 1,
				13, 0, 0, 21, 185, 1, 186, 1, 14, 0,
				0, 21, 187, 1, 188, 1, 15, 0, 0, 17,
				170, 5, 0, 8, 17, 171, 5, 1, 8, 19,
				172, 5, 173, 5, 174, 5, 2, 8, 19, 175,
				5, 176, 5, 177, 5, 3, 8, 18, 178, 5,
				179, 5, 4, 8, 18, 180, 5, 181, 5, 5,
				8, 18, 182, 5, 183, 5, 6, 8, 18, 184,
				5, 185, 5, 7, 8, 17, 186, 5, 8, 8,
				17, 187, 5, 9, 8, 18, 188, 5, 189, 5,
				10, 8, 18, 190, 5, 191, 5, 11, 8, 18,
				192, 5, 193, 5, 12, 8, 18, 194, 5, 195,
				5, 13, 8, 18, 196, 5, 197, 5, 14, 8,
				18, 198, 5, 199, 5, 15, 8, 2, 200, 5,
				8, 2, 201, 5, 8, 2, 202, 5, 8, 2,
				203, 5, 8, 2, 200, 5, 8, 2, 201, 5,
				8, 2, 202, 5, 8, 2, 203, 5, 8, 1,
				200, 5, 1, 202, 5, 1, 203, 5, 1, 201,
				5, 1, 200, 5, 1, 202, 5, 1, 203, 5,
				1, 201, 5, 1, 204, 5, 1, 205, 5, 1,
				206, 5, 1, 207, 5, 1, 208, 5, 1, 209,
				5, 1, 210, 5, 1, 211, 5, 33, 3, 1,
				33, 3, 2, 33, 3, 3, 33, 12, 1, 33,
				12, 2, 33, 12, 3, 1, 212, 5, 1, 213,
				5, 0, 0, 1, 214, 5, 0, 0, 0, 0,
				0, 1, 215, 5, 0, 0, 1, 216, 5, 0,
				0, 1, 217, 5, 0, 0, 1, 218, 5, 0,
				1, 219, 5, 0, 0, 1, 220, 5, 0, 0,
				1, 221, 5, 0, 0, 1, 222, 5, 0, 0,
				1, 223, 5, 0, 0, 1, 224, 5, 0, 0,
				1, 225, 5, 0, 1, 226, 5, 0, 0, 33,
				3, 1, 33, 3, 2, 33, 3, 3, 33, 12,
				1, 33, 12, 2, 33, 12, 3, 1, 227, 5,
				1, 228, 5, 0, 0, 1, 229, 5, 0, 0,
				0, 0, 0, 1, 230, 5, 1, 231, 5, 1,
				232, 5, 0, 1, 233, 5, 1, 234, 5, 1,
				235, 5, 0, 1, 236, 5, 1, 237, 5, 0,
				130, 236, 5, 8, 1, 238, 5, 1, 239, 5,
				0, 130, 238, 5, 8, 1, 240, 5, 1, 241,
				5, 2, 242, 5, 24, 0, 1, 243, 5, 1,
				244, 5, 1, 245, 5, 1, 246, 5, 1, 247,
				5, 1, 248, 5, 1, 249, 5, 1, 250, 5,
				44, 250, 5, 0, 2, 251, 5, 8, 1, 252,
				5, 0, 0, 1, 253, 5, 44, 253, 5, 0,
				1, 254, 5, 1, 255, 5, 1, 51, 0, 0,
				0, 0, 0, 0, 0, 1, 52, 0, 0, 0,
				0, 0, 0, 0, 1, 53, 0, 0, 0, 0,
				0, 0, 0, 1, 128, 6, 1, 27, 0, 0,
				1, 129, 6, 0, 0, 0, 1, 130, 6, 0,
				0, 1, 131, 6, 0, 0, 1, 132, 6, 0,
				0, 1, 133, 6, 0, 0, 2, 135, 6, 24,
				0, 0, 0, 0, 0, 1, 149, 3, 0, 1,
				141, 6, 0, 0, 1, 142, 6, 0, 0, 2,
				213, 5, 24, 0, 0, 2, 228, 5, 24, 0,
				0, 2, 131, 6, 24, 0, 0, 2, 143, 6,
				24, 0, 0, 1, 143, 6, 0, 0, 1, 144,
				6, 0, 0, 1, 145, 6, 0, 0, 1, 146,
				6, 0, 0, 1, 147, 6, 0, 0, 2, 149,
				6, 24, 0, 0, 0, 0, 0, 1, 155, 6,
				0, 0, 0, 39, 84, 0, 167, 84, 1, 128,
				128, 128, 128, 39, 85, 2, 167, 85, 3, 128,
				128, 128, 128, 40, 156, 6, 4, 8, 168, 156,
				6, 5, 8, 128, 40, 157, 6, 6, 8, 168,
				157, 6, 7, 8, 128, 1, 158, 6, 0, 2,
				54, 9, 0, 2, 54, 8, 0, 130, 54, 8,
				172, 54, 8, 130, 54, 8, 172, 54, 8, 1,
				26, 0, 0, 0, 129, 26, 128, 128, 128, 1,
				159, 6, 129, 159, 6, 128, 128, 128, 128, 1,
				160, 6, 129, 160, 6, 128, 128, 128, 128, 2,
				161, 6, 8, 2, 162, 6, 2, 1, 163, 6,
				1, 164, 6, 1, 165, 6, 1, 166, 6, 1,
				167, 6, 1, 168, 6, 2, 169, 6, 8, 2,
				170, 6, 8, 2, 171, 6, 8, 1, 172, 6,
				0, 0, 2, 173, 6, 8, 1, 174, 6, 0,
				0, 1, 175, 6, 0, 1, 176, 6, 0, 0,
				1, 177, 6, 129, 177, 6, 128, 1, 178, 6,
				129, 178, 6, 128, 2, 21, 1, 1, 21, 129,
				21, 128, 128, 128, 128, 2, 15, 1, 1, 15,
				129, 15, 128, 128, 128, 128, 2, 24, 1, 1,
				24, 129, 24, 128, 128, 128, 128, 2, 86, 1,
				1, 86, 129, 86, 128, 128, 128, 128, 2, 87,
				1, 1, 87, 129, 87, 128, 128, 128, 128, 2,
				14, 8, 130, 14, 8, 128, 1, 179, 6, 2,
				180, 6, 1, 1, 55, 0, 0, 0, 129, 55,
				128, 128, 128, 2, 88, 1, 1, 88, 129, 88,
				128, 128, 128, 128, 2, 89, 1, 1, 89, 129,
				89, 128, 128, 128, 128, 2, 90, 1, 1, 90,
				129, 90, 128, 128, 128, 128, 2, 181, 6, 1,
				1, 181, 6, 129, 181, 6, 128, 1, 182, 6,
				0, 0, 1, 183, 6, 0, 0, 2, 91, 1,
				1, 91, 129, 91, 128, 128, 128, 128, 2, 92,
				1, 1, 92, 129, 92, 128, 128, 128, 128, 2,
				93, 1, 1, 93, 129, 93, 128, 128, 128, 128,
				2, 184, 6, 1, 1, 184, 6, 129, 184, 6,
				128, 1, 185, 6, 0, 0, 1, 186, 6, 0,
				0, 2, 94, 1, 1, 94, 129, 94, 128, 128,
				128, 128, 2, 22, 1, 1, 22, 129, 22, 128,
				128, 128, 128, 2, 16, 1, 1, 16, 129, 16,
				128, 128, 128, 128, 1, 134, 5, 0, 0, 2,
				95, 1, 1, 95, 129, 95, 128, 128, 128, 128,
				2, 96, 1, 1, 96, 129, 96, 128, 128, 128,
				128, 2, 97, 1, 1, 97, 129, 97, 128, 128,
				128, 128, 1, 187, 6, 130, 187, 6, 24, 128,
				128, 128, 130, 187, 6, 8, 2, 98, 8, 130,
				98, 8, 128, 128, 128, 128, 1, 188, 6, 0,
				0, 1, 189, 6, 130, 189, 6, 24, 128, 128,
				128, 130, 189, 6, 8, 2, 190, 6, 1, 1,
				191, 6, 130, 191, 6, 8, 128, 128, 128, 128,
				2, 99, 1, 1, 99, 129, 99, 128, 128, 128,
				128, 2, 100, 1, 1, 100, 129, 100, 128, 128,
				128, 128, 2, 101, 1, 1, 101, 129, 101, 128,
				128, 128, 128, 2, 192, 6, 1, 1, 192, 6,
				129, 192, 6, 128, 1, 193, 6, 0, 0, 1,
				194, 6, 0, 0, 2, 102, 1, 1, 102, 129,
				102, 128, 128, 128, 128, 2, 103, 1, 1, 103,
				129, 103, 128, 128, 128, 128, 2, 104, 1, 1,
				104, 129, 104, 128, 128, 128, 128, 2, 195, 6,
				1, 1, 195, 6, 129, 195, 6, 128, 1, 196,
				6, 0, 0, 1, 197, 6, 0, 0, 2, 198,
				6, 8, 130, 198, 6, 8, 128, 2, 23, 1,
				1, 23, 129, 23, 128, 128, 128, 128, 2, 17,
				1, 1, 17, 129, 17, 128, 128, 128, 128, 2,
				25, 1, 1, 25, 129, 25, 128, 128, 128, 128,
				2, 105, 1, 1, 105, 129, 105, 128, 128, 128,
				128, 2, 106, 1, 1, 106, 129, 106, 128, 128,
				128, 128, 2, 107, 1, 1, 107, 129, 107, 128,
				128, 128, 128, 25, 199, 6, 1, 25, 200, 6,
				0, 153, 200, 6, 0, 2, 108, 1, 1, 108,
				129, 108, 128, 128, 128, 128, 2, 109, 1, 1,
				109, 129, 109, 128, 128, 128, 128, 2, 56, 1,
				1, 56, 129, 56, 128, 128, 128, 128, 2, 110,
				1, 1, 110, 129, 110, 128, 128, 128, 128, 2,
				111, 1, 1, 111, 129, 111, 128, 128, 128, 128,
				2, 112, 1, 1, 112, 129, 112, 128, 128, 128,
				128, 2, 57, 1, 1, 57, 129, 57, 128, 128,
				128, 128, 1, 201, 6, 0, 0, 2, 113, 1,
				1, 113, 129, 113, 128, 128, 128, 128, 2, 202,
				6, 1, 1, 202, 6, 129, 202, 6, 128, 2,
				203, 6, 1, 1, 203, 6, 129, 203, 6, 128,
				2, 204, 6, 1, 1, 204, 6, 129, 204, 6,
				128, 2, 114, 1, 1, 114, 129, 114, 128, 128,
				128, 128, 2, 205, 6, 1, 1, 205, 6, 129,
				205, 6, 128, 2, 206, 6, 1, 1, 206, 6,
				129, 206, 6, 128, 2, 207, 6, 1, 1, 207,
				6, 129, 207, 6, 128, 2, 208, 6, 1, 1,
				208, 6, 129, 208, 6, 128, 2, 209, 6, 1,
				1, 209, 6, 129, 209, 6, 128, 2, 210, 6,
				1, 1, 210, 6, 129, 210, 6, 128, 2, 115,
				1, 1, 115, 129, 115, 128, 128, 128, 128, 1,
				39, 0, 0, 0, 0, 1, 40, 0, 0, 0,
				0, 1, 211, 6, 0, 1, 212, 6, 0, 37,
				213, 6, 1, 214, 6, 0, 0, 2, 215, 6,
				8, 0, 0, 1, 216, 6, 0, 0, 2, 217,
				6, 8, 0, 0, 1, 218, 6, 0, 0, 2,
				219, 6, 8, 0, 0, 2, 220, 6, 8, 0,
				0, 0, 0, 2, 221, 6, 8, 0, 0, 37,
				222, 6, 1, 223, 6, 0, 0, 1, 224, 6,
				0, 0, 2, 225, 6, 8, 0, 0, 37, 226,
				6, 1, 227, 6, 0, 0, 1, 228, 6, 0,
				0, 2, 229, 6, 8, 0, 0, 1, 230, 6,
				0, 0, 1, 231, 6, 0, 2, 232, 6, 8,
				130, 232, 6, 8, 128, 2, 58, 8, 0, 0,
				0, 0, 2, 233, 6, 8, 2, 234, 6, 8,
				0, 2, 233, 6, 8, 0, 2, 235, 6, 8,
				2, 236, 6, 8, 0, 2, 237, 6, 8, 0,
				2, 238, 6, 8, 2, 239, 6, 8, 2, 116,
				1, 1, 116, 129, 116, 128, 128, 128, 128, 2,
				117, 1, 1, 117, 129, 117, 128, 128, 128, 128,
				2, 118, 1, 1, 118, 129, 118, 128, 128, 128,
				128, 1, 240, 6, 0, 0, 1, 241, 6, 130,
				241, 6, 8, 128, 128, 128, 128, 2, 242, 6,
				8, 0, 0, 1, 243, 6, 130, 243, 6, 8,
				128, 128, 128, 128, 2, 244, 6, 8, 0, 0,
				1, 245, 6, 130, 245, 6, 8, 128, 128, 128,
				128, 2, 246, 6, 8, 0, 0, 1, 247, 6,
				130, 247, 6, 8, 128, 128, 128, 128, 2, 248,
				6, 8, 0, 0, 1, 249, 6, 130, 249, 6,
				8, 128, 128, 128, 128, 2, 250, 6, 8, 0,
				0, 1, 251, 6, 130, 251, 6, 8, 128, 128,
				128, 128, 2, 252, 6, 8, 0, 0, 1, 253,
				6, 0, 0, 1, 254, 6, 0, 0, 1, 255,
				6, 0, 0, 1, 128, 7, 0, 0, 1, 129,
				7, 0, 0, 1, 130, 7, 0, 0, 1, 131,
				7, 0, 0, 1, 132, 7, 0, 0, 1, 133,
				7, 129, 133, 7, 128, 128, 128, 128, 1, 134,
				7, 0, 0, 1, 135, 7, 0, 0, 1, 136,
				7, 129, 136, 7, 128, 128, 128, 128, 1, 137,
				7, 0, 0, 1, 138, 7, 0, 0, 2, 139,
				7, 8, 130, 139, 7, 8, 128, 128, 128, 128,
				1, 140, 7, 0, 0, 1, 141, 7, 129, 141,
				7, 128, 128, 128, 128, 1, 142, 7, 0, 1,
				143, 7, 0, 0, 1, 144, 7, 0, 0, 1,
				145, 7, 0, 2, 146, 7, 8, 2, 147, 7,
				8, 1, 142, 7, 0, 1, 145, 7, 0, 1,
				148, 7, 130, 148, 7, 8, 128, 128, 128, 128,
				2, 149, 7, 8, 0, 0, 1, 150, 7, 130,
				150, 7, 8, 128, 128, 128, 128, 2, 151, 7,
				8, 0, 0, 1, 152, 7, 130, 152, 7, 8,
				128, 128, 128, 128, 2, 153, 7, 8, 0, 0,
				1, 154, 7, 130, 154, 7, 8, 128, 128, 128,
				128, 2, 155, 7, 8, 0, 0, 1, 156, 7,
				130, 156, 7, 8, 128, 128, 128, 128, 2, 157,
				7, 8, 0, 0, 1, 158, 7, 130, 158, 7,
				8, 128, 128, 128, 128, 2, 159, 7, 8, 0,
				0, 1, 160, 7, 0, 0, 1, 161, 7, 0,
				1, 162, 7, 129, 162, 7, 128, 128, 128, 128,
				1, 163, 7, 129, 163, 7, 128, 128, 128, 128,
				1, 164, 7, 0, 0, 1, 165, 7, 0, 0,
				1, 119, 129, 119, 128, 128, 128, 128, 1, 166,
				7, 0, 0, 1, 167, 7, 0, 0, 1, 168,
				7, 0, 0, 1, 169, 7, 129, 169, 7, 128,
				128, 128, 128, 1, 170, 7, 0, 0, 1, 120,
				129, 120, 128, 128, 128, 128, 1, 171, 7, 0,
				0, 1, 172, 7, 129, 172, 7, 128, 128, 128,
				128, 1, 121, 129, 121, 128, 128, 128, 128, 1,
				173, 7, 0, 0, 1, 174, 7, 129, 174, 7,
				128, 128, 128, 128, 1, 122, 129, 122, 128, 128,
				128, 128, 1, 175, 7, 0, 0, 1, 123, 129,
				123, 128, 128, 128, 128, 1, 176, 7, 0, 0,
				1, 177, 7, 129, 177, 7, 1, 178, 7, 0,
				0, 1, 179, 7, 0, 0, 1, 180, 7, 1,
				181, 7, 1, 182, 7, 0, 0, 1, 183, 7,
				0, 0, 1, 184, 7, 0, 1, 185, 7, 0,
				1, 184, 7, 0, 0, 1, 185, 7, 0, 0,
				1, 186, 7, 0, 0, 0, 0, 1, 187, 7,
				0, 0, 1, 188, 7, 0, 1, 189, 7, 0,
				1, 188, 7, 0, 0, 1, 189, 7, 0, 0,
				1, 190, 7, 0, 0, 1, 191, 7, 0, 0,
				2, 192, 7, 8, 2, 193, 7, 8, 1, 194,
				7, 0, 0, 1, 195, 7, 0, 0, 2, 196,
				7, 8, 2, 197, 7, 8, 1, 198, 7, 0,
				0, 1, 199, 7, 0, 0, 1, 200, 7, 0,
				0, 1, 201, 7, 0, 0, 2, 202, 7, 8,
				1, 203, 7, 0, 0, 2, 204, 7, 8, 1,
				205, 7, 0, 0, 1, 206, 7, 0, 0, 1,
				207, 7, 0, 0, 1, 208, 7, 0, 0, 2,
				44, 8, 0, 0, 0, 0, 2, 45, 8, 0,
				2, 209, 7, 8, 0, 0, 2, 45, 8, 0,
				0, 2, 210, 7, 8, 2, 211, 7, 8, 0,
				2, 212, 7, 8, 0, 2, 213, 7, 8, 2,
				214, 7, 8, 1, 215, 7, 0, 0, 1, 216,
				7, 0, 0, 1, 217, 7, 0, 0, 1, 218,
				7, 0, 0, 1, 219, 7, 0, 0, 1, 220,
				7, 0, 0, 1, 221, 7, 0, 0, 1, 222,
				7, 0, 0, 1, 223, 7, 0, 0, 1, 224,
				7, 0, 0, 1, 225, 7, 0, 0, 1, 226,
				7, 0, 0, 1, 227, 7, 0, 0, 1, 228,
				7, 0, 0, 1, 229, 7, 0, 0, 1, 230,
				7, 0, 0, 2, 231, 7, 24, 0, 2, 231,
				7, 8, 1, 232, 7, 0, 0, 1, 233, 7,
				0, 0, 1, 234, 7, 0, 0, 1, 235, 7,
				0, 0, 1, 236, 7, 0, 0, 1, 237, 7,
				0, 0, 1, 238, 7, 0, 0, 1, 239, 7,
				0, 0, 1, 240, 7, 0, 0, 2, 59, 8,
				0, 0, 0, 0, 2, 60, 8, 0, 0, 0,
				0, 1, 59, 0, 0, 1, 60, 0, 0, 1,
				44, 0, 0, 1, 45, 0, 0, 1, 241, 7,
				0, 0, 1, 242, 7, 0, 0, 1, 243, 7,
				0, 0, 1, 244, 7, 0, 0, 1, 245, 7,
				0, 0, 1, 246, 7, 0, 0, 2, 247, 7,
				10, 0, 2, 248, 7, 10, 0, 2, 249, 7,
				10, 0, 1, 250, 7, 0, 0, 1, 251, 7,
				0, 0, 1, 252, 7, 0, 0, 1, 253, 7,
				0, 0, 1, 254, 7, 0, 0, 1, 255, 7,
				0, 0, 1, 128, 8, 0, 0, 1, 129, 8,
				0, 0, 1, 130, 8, 0, 0, 1, 131, 8,
				0, 1, 132, 8, 0, 1, 133, 8, 0, 0,
				1, 134, 8, 0, 0, 1, 131, 8, 0, 1,
				132, 8, 0, 1, 135, 8, 0, 0, 1, 136,
				8, 0, 1, 137, 8, 0, 1, 136, 8, 0,
				0, 1, 137, 8, 0, 0, 1, 138, 8, 0,
				1, 139, 8, 0, 1, 138, 8, 0, 0, 1,
				139, 8, 0, 0, 1, 140, 8, 0, 1, 141,
				8, 0, 1, 140, 8, 0, 0, 1, 141, 8,
				0, 0, 1, 142, 8, 0, 1, 143, 8, 0,
				1, 142, 8, 0, 0, 1, 143, 8, 0, 0,
				1, 144, 8, 0, 1, 145, 8, 0, 1, 144,
				8, 0, 0, 1, 145, 8, 0, 0, 1, 146,
				8, 0, 1, 147, 8, 0, 1, 146, 8, 0,
				0, 1, 147, 8, 0, 0, 1, 148, 8, 0,
				1, 149, 8, 0, 1, 148, 8, 0, 0, 1,
				149, 8, 0, 0, 1, 150, 8, 1, 151, 8,
				1, 150, 8, 1, 151, 8, 1, 152, 8, 0,
				1, 153, 8, 0, 1, 152, 8, 0, 0, 1,
				153, 8, 0, 0, 2, 154, 8, 8, 1, 155,
				8, 1, 156, 8, 1, 155, 8, 1, 156, 8,
				2, 157, 8, 8, 1, 158, 8, 0, 1, 159,
				8, 0, 1, 158, 8, 0, 0, 1, 159, 8,
				0, 0, 1, 160, 8, 1, 161, 8, 1, 160,
				8, 1, 161, 8, 1, 162, 8, 0, 1, 163,
				8, 0, 1, 162, 8, 0, 0, 1, 163, 8,
				0, 0, 1, 164, 8, 1, 165, 8, 1, 164,
				8, 1, 165, 8, 1, 166, 8, 0, 0, 1,
				167, 8, 0, 0, 1, 168, 8, 0, 0, 1,
				169, 8, 0, 0, 1, 170, 8, 0, 0, 1,
				171, 8, 0, 0, 1, 172, 8, 0, 0, 1,
				173, 8, 0, 0, 1, 174, 8, 0, 1, 175,
				8, 0, 1, 174, 8, 0, 0, 1, 175, 8,
				0, 0, 1, 176, 8, 0, 1, 177, 8, 0,
				1, 176, 8, 0, 0, 1, 177, 8, 0, 0,
				1, 178, 8, 0, 1, 179, 8, 0, 1, 178,
				8, 0, 0, 1, 179, 8, 0, 0, 1, 180,
				8, 1, 181, 8, 1, 180, 8, 1, 181, 8,
				1, 182, 8, 0, 1, 183, 8, 0, 1, 182,
				8, 0, 0, 1, 183, 8, 0, 0, 1, 184,
				8, 1, 185, 8, 1, 186, 8, 1, 185, 8,
				1, 186, 8, 2, 187, 8, 8, 1, 188, 8,
				0, 1, 189, 8, 0, 1, 188, 8, 0, 0,
				1, 189, 8, 0, 0, 1, 190, 8, 1, 191,
				8, 1, 190, 8, 1, 191, 8, 1, 192, 8,
				0, 1, 193, 8, 0, 1, 192, 8, 0, 0,
				1, 193, 8, 0, 0, 1, 194, 8, 1, 195,
				8, 1, 194, 8, 1, 195, 8, 1, 196, 8,
				0, 0, 1, 197, 8, 0, 0, 1, 198, 8,
				0, 1, 199, 8, 0, 1, 198, 8, 0, 0,
				1, 199, 8, 0, 0, 1, 200, 8, 0, 1,
				201, 8, 0, 1, 200, 8, 0, 0, 1, 201,
				8, 0, 0, 1, 202, 8, 0, 1, 203, 8,
				0, 1, 202, 8, 0, 0, 1, 203, 8, 0,
				0, 1, 204, 8, 1, 205, 8, 1, 204, 8,
				1, 205, 8, 1, 206, 8, 0, 1, 207, 8,
				0, 1, 206, 8, 0, 0, 1, 207, 8, 0,
				0, 1, 208, 8, 1, 209, 8, 1, 208, 8,
				1, 209, 8, 1, 210, 8, 0, 1, 211, 8,
				0, 1, 210, 8, 0, 0, 1, 211, 8, 0,
				0, 1, 212, 8, 1, 213, 8, 1, 212, 8,
				1, 213, 8, 1, 214, 8, 0, 1, 215, 8,
				0, 1, 214, 8, 0, 0, 1, 215, 8, 0,
				0, 1, 216, 8, 1, 217, 8, 1, 216, 8,
				1, 217, 8, 1, 218, 8, 0, 0, 1, 219,
				8, 0, 0, 1, 220, 8, 1, 221, 8, 1,
				222, 8, 1, 223, 8, 1, 224, 8, 1, 225,
				8, 1, 226, 8, 1, 227, 8, 1, 228, 8,
				1, 229, 8, 1, 230, 8, 1, 231, 8, 1,
				232, 8, 1, 233, 8, 1, 234, 8, 1, 235,
				8, 1, 236, 8, 1, 237, 8, 1, 238, 8,
				1, 239, 8, 1, 240, 8, 1, 241, 8, 1,
				242, 8, 37, 243, 8, 2, 244, 8, 8, 2,
				245, 8, 8, 1, 246, 8, 1, 247, 8, 1,
				248, 8, 1, 249, 8, 2, 250, 8, 8, 2,
				251, 8, 8, 1, 252, 8, 129, 252, 8, 128,
				128, 128, 128, 1, 253, 8, 129, 253, 8, 1,
				254, 8, 129, 254, 8, 128, 128, 128, 128, 1,
				255, 8, 129, 255, 8, 128, 128, 128, 128, 1,
				128, 9, 129, 128, 9, 128, 128, 128, 128, 1,
				129, 9, 129, 129, 9, 128, 128, 128, 128, 1,
				130, 9, 0, 0, 2, 131, 9, 24, 0, 1,
				130, 9, 0, 0, 2, 131, 9, 24, 0, 0,
				1, 132, 9, 0, 1, 133, 9, 0, 1, 134,
				9, 0, 1, 135, 9, 0, 1, 136, 9, 0,
				1, 137, 9, 1, 138, 9, 1, 139, 9, 0,
				1, 140, 9, 0, 1, 141, 9, 1, 142, 9,
				1, 143, 9, 0, 1, 144, 9, 0, 1, 145,
				9, 0, 1, 146, 9, 0, 1, 147, 9, 0,
				1, 148, 9, 0, 1, 149, 9, 0, 1, 150,
				9, 0, 0, 1, 151, 9, 0, 0, 1, 152,
				9, 0, 0, 1, 153, 9, 0, 1, 161, 7,
				0, 0, 1, 231, 6, 0, 0, 1, 154, 9,
				0, 1, 155, 9, 0, 0, 1, 156, 9, 0,
				0, 1, 39, 0, 0, 0, 0, 1, 40, 0,
				0, 0, 0, 1, 157, 9, 1, 158, 9, 129,
				158, 9, 128, 1, 159, 9, 0, 0, 1, 160,
				9, 129, 160, 9, 128, 1, 161, 9, 0, 0,
				1, 162, 9, 130, 162, 9, 8, 1, 163, 9,
				1, 164, 9, 130, 164, 9, 8, 1, 165, 9,
				1, 166, 9, 129, 166, 9, 128, 1, 167, 9,
				129, 167, 9, 128, 1, 168, 9, 129, 168, 9,
				128, 2, 124, 1, 1, 124, 129, 124, 128, 128,
				128, 128, 2, 169, 9, 8, 0, 130, 169, 9,
				8, 128, 128, 128, 2, 26, 8, 0, 130, 26,
				8, 128, 128, 128, 2, 170, 9, 8, 2, 171,
				9, 8, 130, 170, 9, 8, 130, 171, 9, 8,
				130, 170, 9, 8, 130, 171, 9, 8, 2, 172,
				9, 24, 44, 172, 9, 24, 130, 172, 9, 24,
				172, 172, 9, 24, 130, 172, 9, 24, 172, 172,
				9, 24, 2, 173, 9, 8, 2, 174, 9, 8,
				0, 2, 175, 9, 8, 0, 2, 176, 9, 8,
				2, 177, 9, 8, 0, 2, 178, 9, 8, 0,
				1, 179, 9, 1, 180, 9, 2, 181, 9, 8,
				2, 182, 9, 8, 2, 183, 9, 8, 0, 0,
				0, 0, 39, 184, 9, 24, 0, 0, 39, 185,
				9, 25, 0, 0, 39, 186, 9, 20, 0, 0,
				39, 187, 9, 21, 0, 0, 2, 188, 9, 8,
				0, 130, 188, 9, 8, 172, 188, 9, 8, 130,
				188, 9, 8, 172, 188, 9, 8, 2, 189, 9,
				8, 130, 189, 9, 8, 128, 2, 190, 9, 8,
				2, 191, 9, 8, 130, 190, 9, 8, 130, 191,
				9, 8, 130, 190, 9, 8, 130, 191, 9, 8,
				1, 192, 9, 0, 1, 193, 9, 0, 1, 194,
				9, 0, 0, 1, 195, 9, 0, 0, 1, 196,
				9, 0, 0, 1, 197, 9, 0, 0, 1, 198,
				9, 1, 199, 9, 1, 200, 9, 1, 201, 9,
				1, 202, 9, 1, 203, 9, 1, 204, 9, 1,
				205, 9, 1, 206, 9, 1, 207, 9, 2, 208,
				9, 8, 2, 209, 9, 8, 0, 2, 210, 9,
				8, 0, 2, 211, 9, 8, 2, 212, 9, 8,
				0, 2, 213, 9, 8, 0, 2, 214, 9, 8,
				2, 215, 9, 8, 2, 216, 9, 8, 2, 217,
				9, 8, 39, 218, 9, 22, 0, 0, 39, 219,
				9, 23, 0, 0, 39, 220, 9, 18, 0, 0,
				39, 221, 9, 19, 0, 0, 1, 222, 9, 129,
				222, 9, 128, 1, 223, 9, 129, 223, 9, 1,
				224, 9, 129, 224, 9, 128, 1, 225, 9, 0,
				0, 1, 226, 9, 0, 1, 227, 9, 0, 38,
				228, 9, 8, 166, 228, 9, 9, 128, 128, 128,
				128, 1, 229, 9, 1, 230, 9, 0, 0, 0,
				1, 231, 9, 0, 0, 0, 129, 222, 6, 128,
				129, 226, 6, 128, 129, 213, 6, 128, 1, 232,
				9, 0, 0, 1, 233, 9, 0, 0, 1, 234,
				9, 1, 235, 9, 1, 236, 9, 0, 0, 1,
				237, 9, 0, 0, 1, 238, 9, 1, 239, 9,
				1, 240, 9, 0, 0, 1, 241, 9, 0, 0,
				1, 242, 9, 1, 243, 9, 1, 244, 9, 0,
				0, 0, 1, 245, 9, 0, 0, 0, 1, 246,
				9, 0, 0, 0, 1, 247, 9, 0, 0, 0,
				1, 248, 9, 1, 249, 9, 129, 248, 9, 129,
				249, 9, 1, 250, 9, 1, 251, 9, 129, 250,
				9, 129, 251, 9, 1, 252, 9, 129, 252, 9,
				1, 253, 9, 129, 253, 9, 2, 254, 9, 24,
				0, 0, 2, 255, 9, 24, 0, 0, 2, 128,
				10, 8, 2, 129, 10, 8, 1, 130, 10, 0,
				0, 0, 1, 131, 10, 0, 0, 0, 1, 132,
				10, 0, 1, 133, 10, 0, 1, 134, 10, 0,
				0, 0, 1, 135, 10, 0, 0, 0, 1, 136,
				10, 0, 1, 137, 10, 0, 1, 138, 10, 0,
				0, 1, 139, 10, 0, 0, 1, 140, 10, 0,
				0, 1, 141, 10, 0, 0, 1, 142, 10, 0,
				0, 1, 143, 10, 0, 0, 1, 144, 10, 0,
				0, 0, 1, 145, 10, 0, 0, 0, 1, 146,
				10, 0, 1, 147, 10, 0, 1, 148, 10, 0,
				0, 0, 1, 149, 10, 0, 0, 0, 1, 150,
				10, 0, 1, 151, 10, 0, 1, 152, 10, 1,
				153, 10, 129, 153, 10, 128, 128, 128, 128, 1,
				154, 10, 129, 154, 10, 128, 128, 128, 128, 1,
				155, 10, 129, 155, 10, 1, 156, 10, 0, 1,
				157, 10, 1, 158, 10, 1, 159, 10, 1, 160,
				10, 1, 161, 10, 1, 162, 10, 1, 163, 10,
				1, 164, 10, 1, 165, 10, 1, 166, 10, 1,
				167, 10, 0, 0, 0, 1, 168, 10, 0, 1,
				169, 10, 1, 170, 10, 1, 171, 10, 1, 172,
				10, 1, 173, 10, 1, 174, 10, 39, 175, 10,
				10, 39, 176, 10, 11, 39, 177, 10, 12, 39,
				178, 10, 13, 39, 179, 10, 14, 39, 180, 10,
				15, 39, 181, 10, 16, 39, 182, 10, 17, 1,
				183, 10, 0, 1, 184, 10, 0, 1, 185, 10,
				0, 1, 186, 10, 0, 1, 187, 10, 0, 1,
				188, 10, 0, 1, 189, 10, 0, 1, 190, 10,
				0, 1, 191, 10, 0, 1, 192, 10, 0, 1,
				193, 10, 0, 1, 194, 10, 0, 1, 195, 10,
				0, 1, 196, 10, 1, 197, 10, 1, 171, 10,
				0, 1, 172, 10, 0, 1, 173, 10, 0, 1,
				174, 10, 0, 1, 198, 10, 0, 1, 199, 10,
				0, 1, 200, 10, 0, 1, 201, 10, 0, 1,
				202, 10, 0, 1, 203, 10, 0, 1, 204, 10,
				0, 1, 205, 10, 0, 1, 206, 10, 1, 207,
				10, 1, 208, 10, 1, 209, 10, 1, 210, 10,
				1, 211, 10, 1, 212, 10, 1, 213, 10, 1,
				214, 10, 1, 215, 10, 1, 216, 10, 1, 217,
				10, 1, 218, 10, 1, 219, 10, 1, 220, 10,
				1, 146, 9, 0, 2, 221, 10, 8, 0, 2,
				222, 10, 8, 0, 2, 223, 10, 1, 2, 224,
				10, 1, 2, 225, 10, 1, 2, 226, 10, 1,
				2, 227, 10, 1, 2, 228, 10, 1, 2, 229,
				10, 1, 2, 230, 10, 1, 2, 231, 10, 1,
				2, 232, 10, 1, 2, 233, 10, 1, 2, 234,
				10, 1, 2, 235, 10, 1, 2, 236, 10, 1,
				2, 237, 10, 1, 2, 238, 10, 1, 2, 239,
				10, 1, 2, 240, 10, 1, 2, 241, 10, 1,
				2, 242, 10, 1, 2, 243, 10, 1, 2, 244,
				10, 1, 2, 245, 10, 1, 2, 246, 10, 1,
				2, 248, 10, 1, 2, 249, 10, 1, 1, 250,
				10, 1, 251, 10, 1, 252, 10, 1, 253, 10,
				0, 0, 1, 254, 10, 1, 255, 10, 1, 128,
				11, 1, 129, 11, 0, 0, 1, 130, 11, 1,
				211, 3, 1, 209, 3, 0, 0, 0, 1, 201,
				6, 1, 132, 11, 1, 133, 11, 1, 134, 11,
				1, 135, 11, 1, 136, 11, 1, 137, 11, 1,
				138, 11, 1, 139, 11, 1, 140, 11, 1, 141,
				11, 1, 142, 11, 1, 143, 11, 1, 144, 11,
				1, 145, 11, 1, 146, 11, 1, 147, 11, 1,
				148, 11, 1, 149, 11, 1, 150, 11, 1, 151,
				11, 1, 152, 11, 1, 153, 11, 1, 154, 11,
				1, 155, 11, 1, 156, 11, 1, 157, 11, 1,
				158, 11, 1, 150, 11, 1, 160, 11, 1, 161,
				11, 1, 162, 11, 1, 163, 11, 1, 164, 11,
				1, 165, 11, 1, 166, 11, 1, 167, 11, 1,
				168, 11, 1, 169, 11, 1, 170, 11, 1, 246,
				10, 1, 172, 11, 1, 173, 11, 1, 174, 11,
				1, 175, 11, 1, 176, 11, 1, 0, 0, 1,
				177, 11, 1, 0, 1, 178, 11, 1, 179, 11,
				1, 0, 0, 0, 0, 0, 1, 180, 11, 1,
				181, 11, 1, 182, 11, 1, 183, 11, 1, 184,
				11, 1, 185, 11, 1, 186, 11, 1, 187, 11,
				1, 188, 11, 1, 189, 11, 1, 190, 11, 1,
				191, 11, 1, 192, 11, 1, 193, 11, 1, 194,
				11, 1, 195, 11, 1, 58, 0, 1, 233, 6,
				1, 132, 11, 1, 196, 11, 1, 197, 11, 1,
				198, 11, 1, 199, 11, 1, 200, 11, 1, 201,
				11, 1, 198, 7, 0, 1, 199, 7, 0, 1,
				200, 7, 0, 1, 203, 7, 0, 1, 202, 11,
				0, 0, 1, 203, 11, 0, 0, 2, 204, 11,
				8, 0, 0, 1, 205, 11, 1, 206, 11, 1,
				207, 11, 0, 0, 2, 208, 11, 8, 39, 209,
				11, 26, 0, 0, 40, 210, 11, 27, 8, 2,
				211, 11, 8, 2, 212, 11, 24, 0, 2, 212,
				11, 8, 2, 213, 11, 24, 0, 0, 2, 214,
				11, 8, 0, 0, 2, 215, 11, 8, 0, 0,
				2, 216, 11, 8, 0, 0, 2, 217, 11, 8,
				0, 0, 2, 218, 11, 8, 0, 0, 2, 219,
				11, 8, 0, 0, 2, 220, 11, 8, 0, 0,
				2, 221, 11, 8, 0, 0, 2, 222, 11, 24,
				0, 2, 222, 11, 8, 2, 223, 11, 24, 0,
				0, 2, 224, 11, 8, 2, 225, 11, 8, 2,
				226, 11, 8, 0, 2, 227, 11, 8, 2, 228,
				11, 8, 0, 2, 229, 11, 24, 0, 2, 230,
				11, 8, 2, 231, 11, 8, 0, 0, 2, 232,
				11, 8, 0, 0, 2, 233, 11, 8, 0, 0,
				2, 234, 11, 8, 0, 0, 1, 235, 11, 0,
				0, 1, 236, 11, 0, 0, 2, 237, 11, 8,
				0, 2, 238, 11, 8, 0, 2, 239, 11, 24,
				0, 2, 239, 11, 8, 2, 240, 11, 24, 0,
				0, 2, 241, 11, 24, 0, 2, 242, 11, 8,
				0, 0, 2, 243, 11, 8, 0, 0, 1, 244,
				11, 0, 0, 2, 245, 11, 8, 1, 246, 11,
				0, 0, 1, 247, 11, 0, 0, 1, 248, 11,
				1, 249, 11, 1, 250, 11, 0, 0, 1, 251,
				11, 0, 0, 1, 252, 11, 1, 253, 11, 1,
				254, 11, 0, 0, 1, 255, 11, 0, 0, 1,
				128, 12, 0, 0, 1, 129, 12, 0, 0, 1,
				130, 12, 0, 0, 1, 131, 12, 0, 0, 1,
				132, 12, 0, 0, 1, 133, 12, 0, 0, 1,
				134, 12, 0, 0, 1, 135, 12, 0, 0, 1,
				136, 12, 0, 0, 1, 137, 12, 0, 0, 1,
				138, 12, 1, 139, 12, 1, 140, 12, 1, 141,
				12, 1, 142, 12, 1, 143, 12, 1, 144, 12,
				0, 0, 1, 145, 12, 0, 0, 1, 146, 12,
				0, 0, 1, 147, 12, 0, 0, 1, 148, 12,
				0, 0, 1, 149, 12, 0, 0, 1, 150, 12,
				1, 151, 12, 1, 152, 12, 1, 153, 12, 1,
				154, 12, 1, 155, 12, 2, 156, 12, 24, 0,
				0, 2, 157, 12, 8, 1, 158, 12, 0, 0,
				1, 159, 12, 1, 160, 12, 0, 0, 1, 161,
				12, 1, 162, 12, 0, 0, 2, 163, 12, 8,
				1, 164, 12, 0, 0, 2, 165, 12, 8, 2,
				166, 12, 8, 0, 0, 1, 166, 12, 44, 167,
				12, 8, 0, 0, 0, 1, 168, 12, 0, 0,
				2, 169, 12, 8, 2, 170, 12, 8, 0, 0,
				2, 171, 12, 8, 1, 172, 12, 0, 0, 1,
				173, 12, 1, 174, 12, 0, 0, 1, 175, 12,
				2, 176, 12, 8, 0, 0, 2, 177, 12, 8,
				1, 178, 12, 0, 0, 2, 179, 12, 8, 1,
				180, 12, 0, 0, 2, 181, 12, 8, 1, 182,
				12, 0, 0, 2, 183, 12, 8, 2, 184, 12,
				8, 1, 185, 12, 1, 186, 12, 1, 187, 12,
				1, 188, 12, 129, 228, 3, 1, 189, 12, 1,
				190, 12, 1, 191, 12, 1, 192, 12, 1, 193,
				12, 1, 194, 12, 1, 195, 12, 1, 196, 12,
				1, 197, 12, 1, 198, 12, 1, 199, 12, 1,
				200, 12, 1, 201, 12, 1, 202, 12, 1, 203,
				12, 1, 204, 12, 1, 187, 12, 1, 188, 12,
				1, 205, 12, 0, 0, 1, 206, 12, 1, 207,
				12, 1, 208, 12, 1, 209, 12, 0, 1, 210,
				12, 0, 1, 211, 12, 1, 212, 12, 1, 141,
				6, 0, 1, 145, 6, 0, 1, 213, 12, 0,
				1, 147, 6, 0, 1, 0, 0, 0, 0, 0,
				0, 1, 214, 12, 129, 228, 3, 1, 189, 12,
				1, 190, 12, 1, 191, 12, 1, 192, 12, 1,
				193, 12, 1, 194, 12, 1, 195, 12, 129, 19,
				129, 20, 129, 19, 129, 20, 1, 215, 12, 1,
				216, 12, 1, 217, 12, 1, 218, 12, 129, 62,
				129, 63, 129, 64, 129, 65, 129, 66, 129, 67,
				129, 68, 129, 69, 129, 46, 1, 48, 1, 49,
				129, 81, 129, 15, 129, 16, 129, 17, 129, 50,
				1, 158, 5, 1, 48, 1, 49, 1, 211, 12,
				1, 212, 12, 167, 84, 28, 167, 85, 29, 1,
				182, 6, 1, 183, 6, 1, 185, 6, 1, 186,
				6, 129, 98, 1, 193, 6, 1, 194, 6, 1,
				196, 6, 1, 197, 6, 129, 56, 129, 57, 1,
				58, 1, 233, 6, 1, 236, 6, 1, 239, 6,
				1, 129, 7, 1, 160, 7, 129, 119, 129, 120,
				129, 121, 129, 122, 129, 123, 1, 178, 7, 1,
				179, 7, 1, 184, 7, 1, 186, 7, 1, 188,
				7, 1, 0, 0, 0, 0, 1, 219, 12, 1,
				220, 12, 1, 221, 12, 1, 222, 12, 1, 223,
				12, 1, 224, 12, 1, 225, 12, 1, 0, 1,
				226, 12, 1, 227, 12, 1, 0, 0, 1, 44,
				1, 45, 1, 211, 7, 1, 214, 7, 1, 228,
				12, 1, 229, 12, 1, 230, 12, 1, 231, 12,
				1, 219, 7, 1, 220, 7, 1, 221, 7, 1,
				222, 7, 1, 0, 0, 0, 0, 0, 1, 232,
				12, 1, 233, 12, 1, 234, 12, 1, 235, 12,
				1, 236, 12, 1, 0, 0, 0, 0, 1, 237,
				12, 1, 238, 12, 1, 239, 12, 1, 240, 12,
				1, 136, 8, 1, 137, 8, 1, 140, 8, 1,
				141, 8, 1, 0, 0, 1, 148, 8, 1, 149,
				8, 1, 152, 8, 1, 153, 8, 1, 158, 8,
				1, 159, 8, 1, 162, 8, 1, 163, 8, 1,
				166, 8, 1, 167, 8, 1, 170, 8, 1, 171,
				8, 1, 241, 12, 1, 178, 8, 1, 179, 8,
				1, 182, 8, 1, 183, 8, 1, 188, 8, 1,
				189, 8, 1, 192, 8, 1, 193, 8, 1, 0,
				0, 1, 242, 12, 1, 243, 12, 1, 202, 8,
				1, 203, 8, 1, 206, 8, 1, 207, 8, 1,
				210, 8, 1, 211, 8, 1, 214, 8, 1, 215,
				8, 1, 0, 1, 244, 12, 1, 245, 12, 1,
				220, 8, 1, 222, 8, 1, 246, 12, 1, 247,
				12, 1, 224, 8, 1, 226, 8, 1, 248, 12,
				1, 249, 12, 1, 250, 12, 1, 251, 12, 1,
				252, 12, 1, 253, 12, 1, 0, 0, 0, 1,
				254, 12, 1, 255, 12, 1, 128, 13, 1, 129,
				13, 1, 130, 13, 1, 131, 13, 1, 132, 13,
				1, 133, 13, 1, 0, 0, 0, 1, 134, 13,
				1, 135, 13, 1, 136, 13, 1, 137, 13, 1,
				138, 13, 1, 139, 13, 1, 140, 13, 1, 141,
				13, 1, 0, 0, 0, 1, 155, 9, 1, 142,
				13, 39, 184, 9, 31, 39, 186, 9, 30, 1,
				196, 9, 1, 197, 9, 1, 143, 13, 1, 144,
				13, 1, 145, 13, 1, 146, 13, 1, 147, 13,
				1, 148, 13, 1, 149, 13, 1, 0, 0, 1,
				150, 13, 1, 0, 0, 0, 0, 0, 0, 1,
				151, 13, 0, 0, 1, 152, 13, 0, 0, 1,
				153, 13, 0, 0, 1, 154, 13, 1, 155, 13,
				1, 156, 13, 1, 157, 13, 1, 158, 13, 1,
				159, 13, 1, 160, 13, 1, 161, 13, 0, 1,
				162, 13, 0, 1, 163, 13, 0, 1, 164, 13,
				0, 1, 165, 13, 0, 1, 166, 13, 0, 1,
				167, 13, 0, 1, 168, 13, 0, 1, 169, 13,
				0, 1, 170, 13, 0, 1, 171, 13, 2, 231,
				7, 24, 0, 1, 172, 13, 0, 1, 173, 13,
				0, 1, 174, 13, 0, 1, 175, 13, 0, 1,
				176, 13, 0, 1, 177, 13, 0, 1, 196, 8,
				0, 1, 197, 8, 0, 1, 178, 13, 0, 1,
				179, 13, 0, 1, 180, 13, 0, 1, 181, 13,
				0, 1, 182, 13, 0, 1, 183, 13, 0, 1,
				184, 13, 0, 1, 185, 13, 0, 1, 186, 13,
				0, 1, 187, 13, 0, 1, 188, 13, 0, 1,
				189, 13, 0, 1, 190, 13, 0, 1, 191, 13,
				0, 1, 192, 13, 0, 1, 193, 13, 0
			};
		}
	}
	[Flags]
	internal enum InstrOpInfoFlags : ushort
	{
		None = 0,
		MemSize_Mask = 7,
		MemSize_Sse = 0,
		MemSize_Mmx = 1,
		MemSize_Normal = 2,
		MemSize_Nothing = 3,
		MemSize_XmmwordPtr = 4,
		MemSize_DwordOrQword = 5,
		ShowNoMemSize_ForceSize = 8,
		ShowMinMemSize_ForceSize = 0x10,
		JccNotTaken = 0x20,
		JccTaken = 0x40,
		BndPrefix = 0x80,
		IgnoreIndexReg = 0x100,
		MnemonicIsDirective = 0x200
	}
	internal static class MemorySizes
	{
		public readonly struct Info
		{
			public readonly bool isBroadcast;

			public readonly int size;

			public readonly FormatterString[] keywords;

			public Info(bool isBroadcast, int size, FormatterString[] keywords)
			{
				this.isBroadcast = isBroadcast;
				this.size = size;
				this.keywords = keywords;
			}
		}

		internal static FormatterString[] dword_ptr;

		internal static FormatterString[] qword_ptr;

		internal static FormatterString[] mmword_ptr;

		internal static FormatterString[] xmmword_ptr;

		internal static FormatterString[] oword_ptr;

		public static readonly Info[] AllMemorySizes = GetMemorySizes();

		private static Info[] GetMemorySizes()
		{
			FormatterString formatterString = new FormatterString("byte");
			FormatterString formatterString2 = new FormatterString("ptr");
			FormatterString[] array = new FormatterString[2] { formatterString, formatterString2 };
			FormatterString formatterString3 = new FormatterString("dword");
			FormatterString formatterString4 = new FormatterString("bcst");
			FormatterString[] array2 = new FormatterString[2] { formatterString3, formatterString4 };
			FormatterString[] array3 = new FormatterString[2] { formatterString3, formatterString2 };
			FormatterString formatterString5 = new FormatterString("fpuenv14");
			FormatterString[] array4 = new FormatterString[2] { formatterString5, formatterString2 };
			FormatterString formatterString6 = new FormatterString("fpuenv28");
			FormatterString[] array5 = new FormatterString[2] { formatterString6, formatterString2 };
			FormatterString formatterString7 = new FormatterString("fpustate108");
			FormatterString[] array6 = new FormatterString[2] { formatterString7, formatterString2 };
			FormatterString formatterString8 = new FormatterString("fpustate94");
			FormatterString[] array7 = new FormatterString[2] { formatterString8, formatterString2 };
			FormatterString formatterString9 = new FormatterString("fword");
			FormatterString[] array8 = new FormatterString[2] { formatterString9, formatterString2 };
			FormatterString formatterString10 = new FormatterString("oword");
			FormatterString[] array9 = new FormatterString[2] { formatterString10, formatterString2 };
			FormatterString formatterString11 = new FormatterString("qword");
			FormatterString[] array10 = new FormatterString[2] { formatterString11, formatterString4 };
			FormatterString[] array11 = new FormatterString[2] { formatterString11, formatterString2 };
			FormatterString formatterString12 = new FormatterString("tbyte");
			FormatterString[] array12 = new FormatterString[2] { formatterString12, formatterString2 };
			FormatterString formatterString13 = new FormatterString("word");
			FormatterString[] array13 = new FormatterString[2] { formatterString13, formatterString2 };
			FormatterString formatterString14 = new FormatterString("xmmword");
			FormatterString[] array14 = new FormatterString[2] { formatterString14, formatterString2 };
			FormatterString formatterString15 = new FormatterString("ymmword");
			FormatterString[] array15 = new FormatterString[2] { formatterString15, formatterString2 };
			FormatterString formatterString16 = new FormatterString("zmmword");
			FormatterString[] array16 = new FormatterString[2] { formatterString16, formatterString2 };
			FormatterString formatterString17 = new FormatterString("mem384");
			FormatterString[] array17 = new FormatterString[2] { formatterString17, formatterString2 };
			FormatterString[] array18 = new FormatterString[2] { formatterString13, formatterString4 };
			FormatterString formatterString18 = new FormatterString("mmword");
			FormatterString[] array19 = new FormatterString[2] { formatterString18, formatterString2 };
			ushort[] array20 = new ushort[16]
			{
				0, 1, 2, 4, 6, 8, 10, 14, 16, 28,
				32, 48, 64, 94, 108, 512
			};
			mmword_ptr = array19;
			dword_ptr = array3;
			oword_ptr = array9;
			qword_ptr = array11;
			xmmword_ptr = array14;
			Info[] array21 = new Info[162];
			ushort[] array22 = new ushort[162]
			{
				0, 33, 77, 99, 171, 171, 270, 335, 400, 33,
				77, 99, 171, 270, 335, 400, 99, 136, 204, 77,
				99, 171, 99, 171, 171, 265, 136, 200, 77, 99,
				171, 204, 270, 77, 228, 293, 423, 454, 480, 480,
				0, 0, 204, 400, 0, 204, 369, 400, 77, 77,
				99, 99, 99, 99, 99, 99, 171, 171, 171, 171,
				171, 171, 171, 171, 270, 270, 270, 270, 270, 270,
				270, 270, 270, 270, 270, 270, 270, 270, 270, 335,
				335, 335, 335, 335, 335, 335, 335, 335, 335, 335,
				335, 335, 335, 335, 335, 335, 335, 400, 400, 400,
				400, 400, 400, 400, 400, 400, 400, 400, 400, 400,
				400, 400, 82, 98, 98, 82, 98, 82, 82, 98,
				98, 170, 170, 170, 82, 98, 170, 98, 170, 170,
				98, 98, 82, 82, 98, 98, 170, 170, 170, 82,
				98, 170, 98, 170, 170, 98, 98, 82, 82, 98,
				98, 170, 170, 170, 82, 98, 170, 98, 98, 170,
				170, 98
			};
			for (int i = 0; i < array21.Length; i++)
			{
				ushort num = array22[i];
				FormatterString[] keywords = (num & 0x1F) switch
				{
					0 => Array2.Empty<FormatterString>(), 
					1 => array, 
					2 => array2, 
					3 => array3, 
					4 => array4, 
					5 => array5, 
					6 => array6, 
					7 => array7, 
					8 => array8, 
					9 => array9, 
					10 => array10, 
					11 => array11, 
					12 => array12, 
					13 => array13, 
					14 => array14, 
					15 => array15, 
					16 => array16, 
					17 => array17, 
					18 => array18, 
					_ => throw new InvalidOperationException(), 
				};
				array21[i] = new Info(i >= 112, array20[num >> 5], keywords);
			}
			return array21;
		}
	}
	internal static class Registers
	{
		public const Register Register_ST = Register.DontUse0;

		public static readonly FormatterString[] AllRegisters = RegistersTable.GetRegisters();
	}
}
namespace Iced.Intel.Internal
{
	internal ref struct DataReader
	{
		private readonly ReadOnlySpan<byte> data;

		private readonly char[] stringData;

		private int index;

		public int Index
		{
			readonly get
			{
				return index;
			}
			set
			{
				index = value;
			}
		}

		public readonly bool CanRead => (uint)index < (uint)data.Length;

		public DataReader(ReadOnlySpan<byte> data)
			: this(data, 0)
		{
		}

		public DataReader(ReadOnlySpan<byte> data, int maxStringLength)
		{
			this.data = data;
			stringData = ((maxStringLength == 0) ? Array2.Empty<char>() : new char[maxStringLength]);
			index = 0;
		}

		public byte ReadByte()
		{
			return data[index++];
		}

		public uint ReadCompressedUInt32()
		{
			uint num = 0u;
			for (int i = 0; i < 32; i += 7)
			{
				uint num2 = ReadByte();
				if ((num2 & 0x80) == 0)
				{
					return num | (num2 << i);
				}
				num |= (num2 & 0x7F) << i;
			}
			throw new InvalidOperationException();
		}

		public string ReadAsciiString()
		{
			int num = ReadByte();
			char[] array = stringData;
			for (int i = 0; i < num; i++)
			{
				array[i] = (char)ReadByte();
			}
			return new string(array, 0, num);
		}
	}
}
namespace Iced.Intel.IntelFormatterInternal
{
	internal enum BranchSizeInfo
	{
		None,
		Short
	}
	internal enum CtorKind
	{
		Previous,
		Normal_1,
		Normal_2,
		asz,
		StringIg0,
		StringIg1,
		bcst,
		bnd,
		ST2,
		DeclareData,
		ST_STi,
		STi_ST,
		imul,
		opmask_op,
		invlpga,
		maskmovq,
		memsize,
		movabs,
		nop,
		os2,
		os3,
		os_bnd,
		CC_1,
		CC_2,
		CC_3,
		os_jcc_a_1,
		os_jcc_a_2,
		os_jcc_a_3,
		os_jcc_b_1,
		os_jcc_b_2,
		os_jcc_b_3,
		os_loopcc,
		os_loop,
		pclmulqdq,
		pops,
		reg,
		Reg16,
		Reg32,
		ST1_2,
		ST1_3
	}
	internal enum InstrOpKind : byte
	{
		Register,
		NearBranch16,
		NearBranch32,
		NearBranch64,
		FarBranch16,
		FarBranch32,
		Immediate8,
		Immediate8_2nd,
		Immediate16,
		Immediate32,
		Immediate64,
		Immediate8to16,
		Immediate8to32,
		Immediate8to64,
		Immediate32to64,
		MemorySegSI,
		MemorySegESI,
		MemorySegRSI,
		MemorySegDI,
		MemorySegEDI,
		MemorySegRDI,
		MemoryESDI,
		MemoryESEDI,
		MemoryESRDI,
		Memory,
		DeclareByte,
		DeclareWord,
		DeclareDword,
		DeclareQword
	}
	internal struct InstrOpInfo
	{
		internal const int TEST_RegisterBits = 8;

		public FormatterString Mnemonic;

		public InstrOpInfoFlags Flags;

		public byte OpCount;

		public InstrOpKind Op0Kind;

		public InstrOpKind Op1Kind;

		public InstrOpKind Op2Kind;

		public InstrOpKind Op3Kind;

		public InstrOpKind Op4Kind;

		public byte Op0Register;

		public byte Op1Register;

		public byte Op2Register;

		public byte Op3Register;

		public byte Op4Register;

		public sbyte Op0Index;

		public sbyte Op1Index;

		public sbyte Op2Index;

		public sbyte Op3Index;

		public sbyte Op4Index;

		public readonly Register GetOpRegister(int operand)
		{
			return operand switch
			{
				0 => (Register)Op0Register, 
				1 => (Register)Op1Register, 
				2 => (Register)Op2Register, 
				3 => (Register)Op3Register, 
				4 => (Register)Op4Register, 
				_ => throw new ArgumentOutOfRangeException("operand"), 
			};
		}

		public readonly InstrOpKind GetOpKind(int operand)
		{
			return operand switch
			{
				0 => Op0Kind, 
				1 => Op1Kind, 
				2 => Op2Kind, 
				3 => Op3Kind, 
				4 => Op4Kind, 
				_ => Op0Kind, 
			};
		}

		public readonly int GetInstructionIndex(int operand)
		{
			int num = operand switch
			{
				0 => Op0Index, 
				1 => Op1Index, 
				2 => Op2Index, 
				3 => Op3Index, 
				4 => Op4Index, 
				_ => -1, 
			};
			if (num >= 0)
			{
				return num;
			}
			return -1;
		}

		public readonly bool TryGetOpAccess(int operand, out OpAccess access)
		{
			int num = operand switch
			{
				0 => Op0Index, 
				1 => Op1Index, 
				2 => Op2Index, 
				3 => Op3Index, 
				4 => Op4Index, 
				_ => Op0Index, 
			};
			if (num < -1)
			{
				access = (OpAccess)(-num - 2);
				return true;
			}
			access = OpAccess.None;
			return false;
		}

		public readonly int GetOperandIndex(int instructionOperand)
		{
			int num = ((instructionOperand != Op0Index) ? ((instructionOperand == Op1Index) ? 1 : ((instructionOperand == Op2Index) ? 2 : ((instructionOperand == Op3Index) ? 3 : ((instructionOperand != Op4Index) ? (-1) : 4)))) : 0);
			if (num >= OpCount)
			{
				return -1;
			}
			return num;
		}

		public InstrOpInfo(FormatterString mnemonic, in Instruction instruction, InstrOpInfoFlags flags)
		{
			Mnemonic = mnemonic;
			Flags = flags;
			Op0Kind = (InstrOpKind)instruction.Op0Kind;
			Op1Kind = (InstrOpKind)instruction.Op1Kind;
			Op2Kind = (InstrOpKind)instruction.Op2Kind;
			Op3Kind = (InstrOpKind)instruction.Op3Kind;
			Op4Kind = (InstrOpKind)instruction.Op4Kind;
			Op0Register = (byte)instruction.Op0Register;
			Op1Register = (byte)instruction.Op1Register;
			Op2Register = (byte)instruction.Op2Register;
			Op3Register = (byte)instruction.Op3Register;
			Op4Register = (byte)instruction.Op4Register;
			int opCount = instruction.OpCount;
			OpCount = (byte)opCount;
			switch (opCount)
			{
			case 0:
				Op0Index = -1;
				Op1Index = -1;
				Op2Index = -1;
				Op3Index = -1;
				Op4Index = -1;
				break;
			case 1:
				Op0Index = 0;
				Op1Index = -1;
				Op2Index = -1;
				Op3Index = -1;
				Op4Index = -1;
				break;
			case 2:
				Op0Index = 0;
				Op1Index = 1;
				Op2Index = -1;
				Op3Index = -1;
				Op4Index = -1;
				break;
			case 3:
				Op0Index = 0;
				Op1Index = 1;
				Op2Index = 2;
				Op3Index = -1;
				Op4Index = -1;
				break;
			case 4:
				Op0Index = 0;
				Op1Index = 1;
				Op2Index = 2;
				Op3Index = 3;
				Op4Index = -1;
				break;
			case 5:
				Op0Index = 0;
				Op1Index = 1;
				Op2Index = 2;
				Op3Index = 3;
				Op4Index = 4;
				break;
			default:
				throw new InvalidOperationException();
			}
		}
	}
	internal abstract class InstrInfo
	{
		public const int OpAccess_INVALID = -1;

		public const int OpAccess_None = -2;

		public const int OpAccess_Read = -3;

		public const int OpAccess_CondRead = -4;

		public const int OpAccess_Write = -5;

		public const int OpAccess_CondWrite = -6;

		public const int OpAccess_ReadWrite = -7;

		public const int OpAccess_ReadCondWrite = -8;

		public const int OpAccess_NoMemAccess = -9;

		public abstract void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info);

		protected static int GetBitness(CodeSize codeSize)
		{
			return codeSize switch
			{
				CodeSize.Code16 => 16, 
				CodeSize.Code32 => 32, 
				CodeSize.Code64 => 64, 
				_ => 0, 
			};
		}
	}
	internal sealed class SimpleInstrInfo : InstrInfo
	{
		private readonly FormatterString mnemonic;

		private readonly InstrOpInfoFlags flags;

		public SimpleInstrInfo(string mnemonic)
			: this(mnemonic, InstrOpInfoFlags.None)
		{
		}

		public SimpleInstrInfo(string mnemonic, InstrOpInfoFlags flags)
		{
			this.mnemonic = new FormatterString(mnemonic);
			this.flags = flags;
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			info = new InstrOpInfo(mnemonic, in instruction, flags);
		}
	}
	internal sealed class SimpleInstrInfo_cc : InstrInfo
	{
		private readonly int ccIndex;

		private readonly FormatterString[] mnemonics;

		public SimpleInstrInfo_cc(int ccIndex, string[] mnemonics)
		{
			this.ccIndex = ccIndex;
			this.mnemonics = FormatterString.Create(mnemonics);
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			FormatterString mnemonicCC = MnemonicCC.GetMnemonicCC(options, ccIndex, mnemonics);
			info = new InstrOpInfo(mnemonicCC, in instruction, InstrOpInfoFlags.None);
		}
	}
	internal sealed class SimpleInstrInfo_memsize : InstrInfo
	{
		private readonly int bitness;

		private readonly FormatterString mnemonic;

		public SimpleInstrInfo_memsize(int bitness, string mnemonic)
		{
			this.bitness = bitness;
			this.mnemonic = new FormatterString(mnemonic);
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			int num = InstrInfo.GetBitness(instruction.CodeSize);
			InstrOpInfoFlags flags = ((num == 0 || (num & bitness) != 0) ? InstrOpInfoFlags.MemSize_Nothing : InstrOpInfoFlags.AddrSizeShift);
			info = new InstrOpInfo(mnemonic, in instruction, flags);
		}
	}
	internal sealed class SimpleInstrInfo_StringIg1 : InstrInfo
	{
		private readonly FormatterString mnemonic;

		public SimpleInstrInfo_StringIg1(string mnemonic)
		{
			this.mnemonic = new FormatterString(mnemonic);
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			info = default(InstrOpInfo);
			info.Mnemonic = mnemonic;
			info.OpCount = 1;
			info.Op0Kind = (InstrOpKind)instruction.Op0Kind;
		}
	}
	internal sealed class SimpleInstrInfo_StringIg0 : InstrInfo
	{
		private readonly FormatterString mnemonic;

		public SimpleInstrInfo_StringIg0(string mnemonic)
		{
			this.mnemonic = new FormatterString(mnemonic);
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			info = default(InstrOpInfo);
			info.Mnemonic = mnemonic;
			info.OpCount = 1;
			info.Op0Kind = (InstrOpKind)instruction.Op1Kind;
			info.Op0Index = info.Op1Index;
		}
	}
	internal sealed class SimpleInstrInfo_nop : InstrInfo
	{
		private readonly int bitness;

		private readonly FormatterString mnemonic;

		private readonly Register register;

		private static readonly FormatterString str_xchg = new FormatterString("xchg");

		public SimpleInstrInfo_nop(int bitness, string mnemonic, Register register)
		{
			this.bitness = bitness;
			this.mnemonic = new FormatterString(mnemonic);
			this.register = register;
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			int num = InstrInfo.GetBitness(instruction.CodeSize);
			if (num == 0 || (num & bitness) != 0)
			{
				info = new InstrOpInfo(mnemonic, in instruction, InstrOpInfoFlags.None);
				return;
			}
			info = default(InstrOpInfo);
			info.Mnemonic = str_xchg;
			info.OpCount = 2;
			info.Op0Kind = InstrOpKind.Register;
			info.Op1Kind = InstrOpKind.Register;
			info.Op0Register = (byte)register;
			info.Op1Register = (byte)register;
			info.Op0Index = -2;
			info.Op1Index = -2;
		}
	}
	internal sealed class SimpleInstrInfo_ST1 : InstrInfo
	{
		private readonly FormatterString mnemonic;

		private readonly InstrOpInfoFlags flags;

		private readonly int op0Access;

		public SimpleInstrInfo_ST1(string mnemonic, InstrOpInfoFlags flags)
			: this(mnemonic, flags, isLoad: false)
		{
		}

		public SimpleInstrInfo_ST1(string mnemonic, InstrOpInfoFlags flags, bool isLoad)
		{
			this.mnemonic = new FormatterString(mnemonic);
			this.flags = flags;
			op0Access = (isLoad ? (-5) : (-7));
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			info = new InstrOpInfo(mnemonic, in instruction, flags);
			info.OpCount = 2;
			info.Op1Kind = info.Op0Kind;
			info.Op1Register = info.Op0Register;
			info.Op0Kind = InstrOpKind.Register;
			info.Op0Register = 249;
			info.Op1Index = info.Op0Index;
			info.Op0Index = (sbyte)op0Access;
		}
	}
	internal sealed class SimpleInstrInfo_ST2 : InstrInfo
	{
		private readonly FormatterString mnemonic;

		private readonly InstrOpInfoFlags flags;

		public SimpleInstrInfo_ST2(string mnemonic, InstrOpInfoFlags flags)
		{
			this.mnemonic = new FormatterString(mnemonic);
			this.flags = flags;
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			info = new InstrOpInfo(mnemonic, in instruction, flags);
			info.OpCount = 2;
			info.Op1Kind = InstrOpKind.Register;
			info.Op1Register = 249;
			info.Op1Index = -3;
		}
	}
	internal sealed class SimpleInstrInfo_maskmovq : InstrInfo
	{
		private readonly FormatterString mnemonic;

		public SimpleInstrInfo_maskmovq(string mnemonic)
		{
			this.mnemonic = new FormatterString(mnemonic);
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			OpKind op0Kind = instruction.Op0Kind;
			OpKind opKind = instruction.CodeSize switch
			{
				CodeSize.Unknown => op0Kind, 
				CodeSize.Code16 => OpKind.MemorySegDI, 
				CodeSize.Code32 => OpKind.MemorySegEDI, 
				CodeSize.Code64 => OpKind.MemorySegRDI, 
				_ => throw new InvalidOperationException(), 
			};
			InstrOpInfoFlags instrOpInfoFlags = InstrOpInfoFlags.IgnoreSegmentPrefix;
			if (op0Kind != opKind)
			{
				switch (op0Kind)
				{
				case OpKind.MemorySegDI:
					instrOpInfoFlags |= InstrOpInfoFlags.AddrSize16;
					break;
				case OpKind.MemorySegEDI:
					instrOpInfoFlags |= InstrOpInfoFlags.AddrSize32;
					break;
				case OpKind.MemorySegRDI:
					instrOpInfoFlags |= InstrOpInfoFlags.AddrSize64;
					break;
				}
			}
			info = default(InstrOpInfo);
			info.Flags = instrOpInfoFlags;
			info.Mnemonic = mnemonic;
			info.OpCount = 2;
			info.Op0Kind = (InstrOpKind)instruction.Op1Kind;
			info.Op0Index = 1;
			info.Op0Register = (byte)instruction.Op1Register;
			info.Op1Kind = (InstrOpKind)instruction.Op2Kind;
			info.Op1Index = 2;
			info.Op1Register = (byte)instruction.Op2Register;
			Register segmentPrefix = instruction.SegmentPrefix;
			if (segmentPrefix != 0 && FormatterUtils.ShowSegmentPrefix(Register.DS, in instruction, options))
			{
				info.OpCount = 3;
				info.Op2Kind = InstrOpKind.Register;
				info.Op2Register = (byte)segmentPrefix;
				info.Op2Index = -3;
			}
		}
	}
	internal sealed class SimpleInstrInfo_os : InstrInfo
	{
		private readonly int bitness;

		private readonly FormatterString mnemonic;

		private readonly InstrOpInfoFlags flags;

		public SimpleInstrInfo_os(int bitness, string mnemonic)
			: this(bitness, mnemonic, InstrOpInfoFlags.None)
		{
		}

		public SimpleInstrInfo_os(int bitness, string mnemonic, InstrOpInfoFlags flags)
		{
			this.bitness = bitness;
			this.mnemonic = new FormatterString(mnemonic);
			this.flags = flags;
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			InstrOpInfoFlags instrOpInfoFlags = flags;
			int num = InstrInfo.GetBitness(instruction.CodeSize);
			if (num != 0 && num != bitness)
			{
				if (bitness == 16)
				{
					instrOpInfoFlags |= InstrOpInfoFlags.OpSize16;
				}
				else if (bitness == 32)
				{
					if (num != 64)
					{
						instrOpInfoFlags |= InstrOpInfoFlags.OpSize32;
					}
				}
				else
				{
					instrOpInfoFlags |= InstrOpInfoFlags.OpSize64;
				}
			}
			info = new InstrOpInfo(mnemonic, in instruction, instrOpInfoFlags);
		}
	}
	internal sealed class SimpleInstrInfo_os_bnd : InstrInfo
	{
		private readonly int bitness;

		private readonly FormatterString mnemonic;

		public SimpleInstrInfo_os_bnd(int bitness, string mnemonic)
		{
			this.bitness = bitness;
			this.mnemonic = new FormatterString(mnemonic);
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			InstrOpInfoFlags instrOpInfoFlags = InstrOpInfoFlags.None;
			if (instruction.HasRepnePrefix)
			{
				instrOpInfoFlags |= InstrOpInfoFlags.BndPrefix;
			}
			int num = InstrInfo.GetBitness(instruction.CodeSize);
			if (num != 0 && num != bitness)
			{
				instrOpInfoFlags = ((bitness == 16) ? (instrOpInfoFlags | InstrOpInfoFlags.OpSize16) : ((bitness != 32) ? (instrOpInfoFlags | InstrOpInfoFlags.OpSize64) : (instrOpInfoFlags | InstrOpInfoFlags.OpSize32)));
			}
			info = new InstrOpInfo(mnemonic, in instruction, instrOpInfoFlags);
		}
	}
	internal sealed class SimpleInstrInfo_as : InstrInfo
	{
		private readonly int bitness;

		private readonly FormatterString mnemonic;

		public SimpleInstrInfo_as(int bitness, string mnemonic)
		{
			this.bitness = bitness;
			this.mnemonic = new FormatterString(mnemonic);
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			InstrOpInfoFlags instrOpInfoFlags = InstrOpInfoFlags.None;
			int num = InstrInfo.GetBitness(instruction.CodeSize);
			if (num != 0 && num != bitness)
			{
				instrOpInfoFlags = ((bitness == 16) ? (instrOpInfoFlags | InstrOpInfoFlags.AddrSize16) : ((bitness != 32) ? (instrOpInfoFlags | InstrOpInfoFlags.AddrSize64) : (instrOpInfoFlags | InstrOpInfoFlags.AddrSize32)));
			}
			info = new InstrOpInfo(mnemonic, in instruction, instrOpInfoFlags);
		}
	}
	internal sealed class SimpleInstrInfo_os_jcc : InstrInfo
	{
		private readonly int bitness;

		private readonly int ccIndex;

		private readonly FormatterString[] mnemonics;

		private readonly InstrOpInfoFlags flags;

		public SimpleInstrInfo_os_jcc(int bitness, int ccIndex, string[] mnemonics)
			: this(bitness, ccIndex, mnemonics, InstrOpInfoFlags.None)
		{
		}

		public SimpleInstrInfo_os_jcc(int bitness, int ccIndex, string[] mnemonics, InstrOpInfoFlags flags)
		{
			this.bitness = bitness;
			this.ccIndex = ccIndex;
			this.mnemonics = FormatterString.Create(mnemonics);
			this.flags = flags;
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			InstrOpInfoFlags instrOpInfoFlags = flags;
			int num = InstrInfo.GetBitness(instruction.CodeSize);
			if (num != 0 && num != bitness)
			{
				instrOpInfoFlags = ((bitness == 16) ? (instrOpInfoFlags | InstrOpInfoFlags.OpSize16) : ((bitness != 32) ? (instrOpInfoFlags | InstrOpInfoFlags.OpSize64) : (instrOpInfoFlags | InstrOpInfoFlags.OpSize32)));
			}
			switch (instruction.SegmentPrefix)
			{
			case Register.CS:
				instrOpInfoFlags |= InstrOpInfoFlags.JccNotTaken | InstrOpInfoFlags.IgnoreSegmentPrefix;
				break;
			case Register.DS:
				instrOpInfoFlags |= InstrOpInfoFlags.JccTaken | InstrOpInfoFlags.IgnoreSegmentPrefix;
				break;
			}
			if (instruction.HasRepnePrefix)
			{
				instrOpInfoFlags |= InstrOpInfoFlags.BndPrefix;
			}
			FormatterString mnemonicCC = MnemonicCC.GetMnemonicCC(options, ccIndex, mnemonics);
			info = new InstrOpInfo(mnemonicCC, in instruction, instrOpInfoFlags);
		}
	}
	internal sealed class SimpleInstrInfo_os_loop : InstrInfo
	{
		private readonly int bitness;

		private readonly int ccIndex;

		private readonly Register register;

		private readonly FormatterString[] mnemonics;

		public SimpleInstrInfo_os_loop(int bitness, int ccIndex, Register register, string[] mnemonics)
		{
			this.bitness = bitness;
			this.ccIndex = ccIndex;
			this.register = register;
			this.mnemonics = FormatterString.Create(mnemonics);
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			InstrOpInfoFlags instrOpInfoFlags = InstrOpInfoFlags.None;
			int num = InstrInfo.GetBitness(instruction.CodeSize);
			int num2 = num switch
			{
				0 => (int)register, 
				16 => 22, 
				32 => 38, 
				64 => 54, 
				_ => throw new InvalidOperationException(), 
			};
			if (num != 0 && num != bitness)
			{
				instrOpInfoFlags = ((bitness == 16) ? (instrOpInfoFlags | InstrOpInfoFlags.OpSize16) : ((bitness != 32) ? (instrOpInfoFlags | InstrOpInfoFlags.OpSize64) : (instrOpInfoFlags | InstrOpInfoFlags.OpSize32)));
			}
			if (num2 != (int)register)
			{
				instrOpInfoFlags = ((register == Register.CX) ? (instrOpInfoFlags | InstrOpInfoFlags.AddrSize16) : ((register != Register.ECX) ? (instrOpInfoFlags | InstrOpInfoFlags.AddrSize64) : (instrOpInfoFlags | InstrOpInfoFlags.AddrSize32)));
			}
			FormatterString mnemonic = ((ccIndex == -1) ? mnemonics[0] : MnemonicCC.GetMnemonicCC(options, ccIndex, mnemonics));
			info = new InstrOpInfo(mnemonic, in instruction, instrOpInfoFlags);
		}
	}
	internal sealed class SimpleInstrInfo_movabs : InstrInfo
	{
		private readonly FormatterString mnemonic;

		public SimpleInstrInfo_movabs(string mnemonic)
		{
			this.mnemonic = new FormatterString(mnemonic);
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			InstrOpInfoFlags instrOpInfoFlags = InstrOpInfoFlags.None;
			int num = InstrInfo.GetBitness(instruction.CodeSize);
			int num2 = instruction.MemoryDisplSize switch
			{
				2 => 16, 
				4 => 32, 
				_ => 64, 
			};
			if (num == 0)
			{
				num = num2;
			}
			if (num != num2)
			{
				instrOpInfoFlags = num2 switch
				{
					16 => instrOpInfoFlags | InstrOpInfoFlags.AddrSize16, 
					32 => instrOpInfoFlags | InstrOpInfoFlags.AddrSize32, 
					_ => instrOpInfoFlags | InstrOpInfoFlags.AddrSize64, 
				};
			}
			info = new InstrOpInfo(mnemonic, in instruction, instrOpInfoFlags);
		}
	}
	internal sealed class SimpleInstrInfo_opmask_op : InstrInfo
	{
		private readonly FormatterString mnemonic;

		public SimpleInstrInfo_opmask_op(string mnemonic)
		{
			this.mnemonic = new FormatterString(mnemonic);
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			info = new InstrOpInfo(mnemonic, in instruction, InstrOpInfoFlags.None);
			Register opMask = instruction.OpMask;
			if (opMask != 0)
			{
				info.OpCount++;
				info.Op2Kind = info.Op1Kind;
				info.Op2Register = info.Op1Register;
				info.Op2Index = 1;
				info.Op1Kind = InstrOpKind.Register;
				info.Op1Register = (byte)opMask;
				info.Op1Index = -3;
				info.Flags |= InstrOpInfoFlags.IgnoreOpMask;
			}
		}
	}
	internal sealed class SimpleInstrInfo_bnd : InstrInfo
	{
		private readonly FormatterString mnemonic;

		private readonly InstrOpInfoFlags flags;

		public SimpleInstrInfo_bnd(string mnemonic, InstrOpInfoFlags flags)
		{
			this.mnemonic = new FormatterString(mnemonic);
			this.flags = flags;
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			InstrOpInfoFlags instrOpInfoFlags = flags;
			if (instruction.HasRepnePrefix)
			{
				instrOpInfoFlags |= InstrOpInfoFlags.BndPrefix;
			}
			info = new InstrOpInfo(mnemonic, in instruction, instrOpInfoFlags);
		}
	}
	internal sealed class SimpleInstrInfo_ST_STi : InstrInfo
	{
		private readonly FormatterString mnemonic;

		private readonly bool pseudoOp;

		public SimpleInstrInfo_ST_STi(string mnemonic, bool pseudoOp)
		{
			this.mnemonic = new FormatterString(mnemonic);
			this.pseudoOp = pseudoOp;
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			if (pseudoOp && options.UsePseudoOps && (instruction.Op0Register == Register.ST1 || instruction.Op1Register == Register.ST1))
			{
				info = default(InstrOpInfo);
				info.Mnemonic = mnemonic;
			}
			else
			{
				info = new InstrOpInfo(mnemonic, in instruction, InstrOpInfoFlags.None);
				info.Op0Register = 249;
			}
		}
	}
	internal sealed class SimpleInstrInfo_STi_ST : InstrInfo
	{
		private readonly FormatterString mnemonic;

		private readonly bool pseudoOp;

		public SimpleInstrInfo_STi_ST(string mnemonic, bool pseudoOp)
		{
			this.mnemonic = new FormatterString(mnemonic);
			this.pseudoOp = pseudoOp;
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			if (pseudoOp && options.UsePseudoOps && (instruction.Op0Register == Register.ST1 || instruction.Op1Register == Register.ST1))
			{
				info = default(InstrOpInfo);
				info.Mnemonic = mnemonic;
			}
			else
			{
				info = new InstrOpInfo(mnemonic, in instruction, InstrOpInfoFlags.None);
				info.Op1Register = 249;
			}
		}
	}
	internal sealed class SimpleInstrInfo_pops : InstrInfo
	{
		private readonly FormatterString mnemonic;

		private readonly FormatterString[] pseudo_ops;

		public SimpleInstrInfo_pops(string mnemonic, FormatterString[] pseudo_ops)
		{
			this.mnemonic = new FormatterString(mnemonic);
			this.pseudo_ops = pseudo_ops;
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			info = new InstrOpInfo(mnemonic, in instruction, InstrOpInfoFlags.None);
			int immediate = instruction.Immediate8;
			if (options.UsePseudoOps && (uint)immediate < (uint)pseudo_ops.Length)
			{
				info.Mnemonic = pseudo_ops[immediate];
				RemoveLastOp(ref info);
			}
		}

		internal static void RemoveLastOp(ref InstrOpInfo info)
		{
			switch (info.OpCount)
			{
			case 4:
				info.Op3Index = -1;
				break;
			case 3:
				info.Op2Index = -1;
				break;
			default:
				throw new InvalidOperationException();
			}
			info.OpCount--;
		}
	}
	internal sealed class SimpleInstrInfo_pclmulqdq : InstrInfo
	{
		private readonly FormatterString mnemonic;

		private readonly FormatterString[] pseudo_ops;

		public SimpleInstrInfo_pclmulqdq(string mnemonic, FormatterString[] pseudo_ops)
		{
			this.mnemonic = new FormatterString(mnemonic);
			this.pseudo_ops = pseudo_ops;
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			info = new InstrOpInfo(mnemonic, in instruction, InstrOpInfoFlags.None);
			if (options.UsePseudoOps)
			{
				int num = instruction.Immediate8 switch
				{
					0 => 0, 
					1 => 1, 
					16 => 2, 
					17 => 3, 
					_ => -1, 
				};
				if (num >= 0)
				{
					info.Mnemonic = pseudo_ops[num];
					SimpleInstrInfo_pops.RemoveLastOp(ref info);
				}
			}
		}
	}
	internal sealed class SimpleInstrInfo_imul : InstrInfo
	{
		private readonly FormatterString mnemonic;

		public SimpleInstrInfo_imul(string mnemonic)
		{
			this.mnemonic = new FormatterString(mnemonic);
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			info = new InstrOpInfo(mnemonic, in instruction, InstrOpInfoFlags.None);
			if (options.UsePseudoOps && info.Op0Kind == InstrOpKind.Register && info.Op1Kind == InstrOpKind.Register && info.Op0Register == info.Op1Register)
			{
				info.OpCount--;
				info.Op0Index = -7;
				info.Op1Kind = info.Op2Kind;
				info.Op1Index = 2;
				info.Op2Index = -1;
			}
		}
	}
	internal sealed class SimpleInstrInfo_Reg16 : InstrInfo
	{
		private readonly FormatterString mnemonic;

		public SimpleInstrInfo_Reg16(string mnemonic)
		{
			this.mnemonic = new FormatterString(mnemonic);
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			info = new InstrOpInfo(mnemonic, in instruction, InstrOpInfoFlags.None);
			if (37 <= info.Op0Register && info.Op0Register <= 68)
			{
				info.Op0Register = (byte)(((info.Op0Register - 37) & 0xF) + 21);
			}
			if (37 <= info.Op1Register && info.Op1Register <= 68)
			{
				info.Op1Register = (byte)(((info.Op1Register - 37) & 0xF) + 21);
			}
			if (37 <= info.Op2Register && info.Op2Register <= 68)
			{
				info.Op2Register = (byte)(((info.Op2Register - 37) & 0xF) + 21);
			}
		}
	}
	internal sealed class SimpleInstrInfo_Reg32 : InstrInfo
	{
		private readonly FormatterString mnemonic;

		public SimpleInstrInfo_Reg32(string mnemonic)
		{
			this.mnemonic = new FormatterString(mnemonic);
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			info = new InstrOpInfo(mnemonic, in instruction, InstrOpInfoFlags.None);
			if (53 <= info.Op0Register && info.Op0Register <= 68)
			{
				info.Op0Register = (byte)(info.Op0Register - 53 + 37);
			}
			if (53 <= info.Op1Register && info.Op1Register <= 68)
			{
				info.Op1Register = (byte)(info.Op1Register - 53 + 37);
			}
			if (53 <= info.Op2Register && info.Op2Register <= 68)
			{
				info.Op2Register = (byte)(info.Op2Register - 53 + 37);
			}
		}
	}
	internal sealed class SimpleInstrInfo_reg : InstrInfo
	{
		private readonly FormatterString mnemonic;

		private readonly Register register;

		public SimpleInstrInfo_reg(string mnemonic, Register register)
		{
			this.mnemonic = new FormatterString(mnemonic);
			this.register = register;
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			info = new InstrOpInfo(mnemonic, in instruction, InstrOpInfoFlags.None);
			info.OpCount = 1;
			info.Op0Kind = InstrOpKind.Register;
			info.Op0Register = (byte)register;
			if (instruction.Code == Code.Skinit)
			{
				info.Op0Index = -7;
			}
			else
			{
				info.Op0Index = -3;
			}
		}
	}
	internal sealed class SimpleInstrInfo_invlpga : InstrInfo
	{
		private readonly int bitness;

		private readonly FormatterString mnemonic;

		public SimpleInstrInfo_invlpga(int bitness, string mnemonic)
		{
			this.bitness = bitness;
			this.mnemonic = new FormatterString(mnemonic);
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			info = default(InstrOpInfo);
			info.Mnemonic = mnemonic;
			info.OpCount = 2;
			info.Op0Kind = InstrOpKind.Register;
			info.Op1Kind = InstrOpKind.Register;
			info.Op1Register = 38;
			info.Op0Index = -3;
			info.Op1Index = -3;
			switch (bitness)
			{
			case 16:
				info.Op0Register = 21;
				break;
			case 32:
				info.Op0Register = 37;
				break;
			case 64:
				info.Op0Register = 53;
				break;
			default:
				throw new InvalidOperationException();
			}
		}
	}
	internal sealed class SimpleInstrInfo_DeclareData : InstrInfo
	{
		private readonly FormatterString mnemonic;

		private readonly InstrOpKind opKind;

		public SimpleInstrInfo_DeclareData(Code code, string mnemonic)
		{
			this.mnemonic = new FormatterString(mnemonic);
			opKind = code switch
			{
				Code.DeclareByte => InstrOpKind.DeclareByte, 
				Code.DeclareWord => InstrOpKind.DeclareWord, 
				Code.DeclareDword => InstrOpKind.DeclareDword, 
				Code.DeclareQword => InstrOpKind.DeclareQword, 
				_ => throw new InvalidOperationException(), 
			};
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			info = new InstrOpInfo(mnemonic, in instruction, InstrOpInfoFlags.MnemonicIsDirective);
			info.OpCount = (byte)instruction.DeclareDataCount;
			info.Op0Kind = opKind;
			info.Op1Kind = opKind;
			info.Op2Kind = opKind;
			info.Op3Kind = opKind;
			info.Op4Kind = opKind;
			info.Op0Index = -3;
			info.Op1Index = -3;
			info.Op2Index = -3;
			info.Op3Index = -3;
			info.Op4Index = -3;
		}
	}
	internal sealed class SimpleInstrInfo_bcst : InstrInfo
	{
		private readonly FormatterString mnemonic;

		private readonly InstrOpInfoFlags flagsNoBroadcast;

		public SimpleInstrInfo_bcst(string mnemonic, InstrOpInfoFlags flagsNoBroadcast)
		{
			this.mnemonic = new FormatterString(mnemonic);
			this.flagsNoBroadcast = flagsNoBroadcast;
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			MemorySizes.Info info2 = MemorySizes.AllMemorySizes[(int)instruction.MemorySize];
			InstrOpInfoFlags flags = ((info2.bcstTo.Length == 0) ? flagsNoBroadcast : InstrOpInfoFlags.None);
			info = new InstrOpInfo(mnemonic, in instruction, flags);
		}
	}
	internal static class InstrInfos
	{
		public static readonly InstrInfo[] AllInfos = ReadInfos();

		private static string AddPrefix(string s, char[] ca)
		{
			return string.Intern(new string(ca) + s);
		}

		private static InstrInfo[] ReadInfos()
		{
			DataReader dataReader = new DataReader(GetSerializedInstrInfos());
			InstrInfo[] array = new InstrInfo[4911];
			string[] stringsTable = FormatterStringsTable.GetStringsTable();
			char[] array2 = new char[1];
			int index = -1;
			for (int i = 0; i < array.Length; i++)
			{
				byte num = dataReader.ReadByte();
				CtorKind ctorKind = (CtorKind)(num & 0x7F);
				int num2;
				if (ctorKind == CtorKind.Previous)
				{
					num2 = dataReader.Index;
					dataReader.Index = index;
					ctorKind = (CtorKind)(dataReader.ReadByte() & 0x7F);
				}
				else
				{
					num2 = -1;
					index = dataReader.Index - 1;
				}
				string text = stringsTable[dataReader.ReadCompressedUInt32()];
				if ((num & 0x80u) != 0)
				{
					array2[0] = 'v';
					text = AddPrefix(text, array2);
				}
				InstrInfo instrInfo;
				switch (ctorKind)
				{
				case CtorKind.Normal_1:
					instrInfo = new SimpleInstrInfo(text);
					break;
				case CtorKind.Normal_2:
				{
					uint bitness = dataReader.ReadCompressedUInt32();
					instrInfo = new SimpleInstrInfo(text, (InstrOpInfoFlags)bitness);
					break;
				}
				case CtorKind.asz:
				{
					uint bitness = dataReader.ReadCompressedUInt32();
					instrInfo = new SimpleInstrInfo_as((int)bitness, text);
					break;
				}
				case CtorKind.StringIg0:
					instrInfo = new SimpleInstrInfo_StringIg0(text);
					break;
				case CtorKind.StringIg1:
					instrInfo = new SimpleInstrInfo_StringIg1(text);
					break;
				case CtorKind.bcst:
				{
					uint bitness = dataReader.ReadCompressedUInt32();
					instrInfo = new SimpleInstrInfo_bcst(text, (InstrOpInfoFlags)bitness);
					break;
				}
				case CtorKind.bnd:
				{
					uint bitness = dataReader.ReadCompressedUInt32();
					instrInfo = new SimpleInstrInfo_bnd(text, (InstrOpInfoFlags)bitness);
					break;
				}
				case CtorKind.DeclareData:
					instrInfo = new SimpleInstrInfo_DeclareData((Code)i, text);
					break;
				case CtorKind.ST_STi:
				{
					uint bitness = dataReader.ReadByte();
					if (bitness > 1)
					{
						throw new InvalidOperationException();
					}
					instrInfo = new SimpleInstrInfo_ST_STi(text, bitness != 0);
					break;
				}
				case CtorKind.STi_ST:
				{
					uint bitness = dataReader.ReadByte();
					if (bitness > 1)
					{
						throw new InvalidOperationException();
					}
					instrInfo = new SimpleInstrInfo_STi_ST(text, bitness != 0);
					break;
				}
				case CtorKind.imul:
					instrInfo = new SimpleInstrInfo_imul(text);
					break;
				case CtorKind.opmask_op:
					instrInfo = new SimpleInstrInfo_opmask_op(text);
					break;
				case CtorKind.maskmovq:
					instrInfo = new SimpleInstrInfo_maskmovq(text);
					break;
				case CtorKind.memsize:
				{
					uint bitness = dataReader.ReadCompressedUInt32();
					instrInfo = new SimpleInstrInfo_memsize((int)bitness, text);
					break;
				}
				case CtorKind.movabs:
					instrInfo = new SimpleInstrInfo_movabs(text);
					break;
				case CtorKind.nop:
				{
					uint bitness = dataReader.ReadCompressedUInt32();
					uint num3 = dataReader.ReadByte();
					instrInfo = new SimpleInstrInfo_nop((int)bitness, text, (Register)num3);
					break;
				}
				case CtorKind.os2:
				{
					uint bitness = dataReader.ReadCompressedUInt32();
					instrInfo = new SimpleInstrInfo_os((int)bitness, text);
					break;
				}
				case CtorKind.os3:
				{
					uint bitness = dataReader.ReadCompressedUInt32();
					uint num3 = dataReader.ReadCompressedUInt32();
					instrInfo = new SimpleInstrInfo_os((int)bitness, text, (InstrOpInfoFlags)num3);
					break;
				}
				case CtorKind.os_bnd:
				{
					uint bitness = dataReader.ReadCompressedUInt32();
					instrInfo = new SimpleInstrInfo_os_bnd((int)bitness, text);
					break;
				}
				case CtorKind.CC_1:
				{
					uint bitness = dataReader.ReadCompressedUInt32();
					instrInfo = new SimpleInstrInfo_cc((int)bitness, new string[1] { text });
					break;
				}
				case CtorKind.CC_2:
				{
					string text2 = stringsTable[dataReader.ReadCompressedUInt32()];
					uint bitness = dataReader.ReadCompressedUInt32();
					instrInfo = new SimpleInstrInfo_cc((int)bitness, new string[2] { text, text2 });
					break;
				}
				case CtorKind.CC_3:
				{
					string text2 = stringsTable[dataReader.ReadCompressedUInt32()];
					string text3 = stringsTable[dataReader.ReadCompressedUInt32()];
					uint bitness = dataReader.ReadCompressedUInt32();
					instrInfo = new SimpleInstrInfo_cc((int)bitness, new string[3] { text, text2, text3 });
					break;
				}
				case CtorKind.os_jcc_a_1:
				{
					uint num3 = dataReader.ReadCompressedUInt32();
					uint bitness = dataReader.ReadCompressedUInt32();
					instrInfo = new SimpleInstrInfo_os_jcc((int)bitness, (int)num3, new string[1] { text });
					break;
				}
				case CtorKind.os_jcc_a_2:
				{
					string text2 = stringsTable[dataReader.ReadCompressedUInt32()];
					uint num3 = dataReader.ReadCompressedUInt32();
					uint bitness = dataReader.ReadCompressedUInt32();
					instrInfo = new SimpleInstrInfo_os_jcc((int)bitness, (int)num3, new string[2] { text, text2 });
					break;
				}
				case CtorKind.os_jcc_a_3:
				{
					string text2 = stringsTable[dataReader.ReadCompressedUInt32()];
					string text3 = stringsTable[dataReader.ReadCompressedUInt32()];
					uint num3 = dataReader.ReadCompressedUInt32();
					uint bitness = dataReader.ReadCompressedUInt32();
					instrInfo = new SimpleInstrInfo_os_jcc((int)bitness, (int)num3, new string[3] { text, text2, text3 });
					break;
				}
				case CtorKind.os_jcc_b_1:
				{
					uint ccIndex = dataReader.ReadCompressedUInt32();
					uint bitness = dataReader.ReadCompressedUInt32();
					uint num3 = dataReader.ReadCompressedUInt32();
					instrInfo = new SimpleInstrInfo_os_jcc((int)bitness, (int)ccIndex, new string[1] { text }, (InstrOpInfoFlags)num3);
					break;
				}
				case CtorKind.os_jcc_b_2:
				{
					string text2 = stringsTable[dataReader.ReadCompressedUInt32()];
					uint ccIndex = dataReader.ReadCompressedUInt32();
					uint bitness = dataReader.ReadCompressedUInt32();
					uint num3 = dataReader.ReadCompressedUInt32();
					instrInfo = new SimpleInstrInfo_os_jcc((int)bitness, (int)ccIndex, new string[2] { text, text2 }, (InstrOpInfoFlags)num3);
					break;
				}
				case CtorKind.os_jcc_b_3:
				{
					string text2 = stringsTable[dataReader.ReadCompressedUInt32()];
					string text3 = stringsTable[dataReader.ReadCompressedUInt32()];
					uint ccIndex = dataReader.ReadCompressedUInt32();
					uint bitness = dataReader.ReadCompressedUInt32();
					uint num3 = dataReader.ReadCompressedUInt32();
					instrInfo = new SimpleInstrInfo_os_jcc((int)bitness, (int)ccIndex, new string[3] { text, text2, text3 }, (InstrOpInfoFlags)num3);
					break;
				}
				case CtorKind.os_loopcc:
				{
					string text2 = stringsTable[dataReader.ReadCompressedUInt32()];
					uint ccIndex = dataReader.ReadCompressedUInt32();
					uint bitness = dataReader.ReadCompressedUInt32();
					uint num3 = dataReader.ReadByte();
					instrInfo = new SimpleInstrInfo_os_loop((int)bitness, (int)ccIndex, (Register)num3, new string[2] { text, text2 });
					break;
				}
				case CtorKind.os_loop:
				{
					uint bitness = dataReader.ReadCompressedUInt32();
					uint num3 = dataReader.ReadByte();
					instrInfo = new SimpleInstrInfo_os_loop((int)bitness, -1, (Register)num3, new string[1] { text });
					break;
				}
				case CtorKind.pclmulqdq:
				{
					uint bitness = dataReader.ReadByte();
					instrInfo = new SimpleInstrInfo_pclmulqdq(text, FormatterConstants.GetPseudoOps((PseudoOpsKind)bitness));
					break;
				}
				case CtorKind.pops:
				{
					uint bitness = dataReader.ReadByte();
					instrInfo = new SimpleInstrInfo_pops(text, FormatterConstants.GetPseudoOps((PseudoOpsKind)bitness));
					break;
				}
				case CtorKind.reg:
				{
					uint bitness = dataReader.ReadByte();
					instrInfo = new SimpleInstrInfo_reg(text, (Register)bitness);
					break;
				}
				case CtorKind.Reg16:
					instrInfo = new SimpleInstrInfo_Reg16(text);
					break;
				case CtorKind.Reg32:
					instrInfo = new SimpleInstrInfo_Reg32(text);
					break;
				case CtorKind.ST1_2:
				{
					uint bitness = dataReader.ReadCompressedUInt32();
					instrInfo = new SimpleInstrInfo_ST1(text, (InstrOpInfoFlags)bitness);
					break;
				}
				case CtorKind.ST1_3:
				{
					uint bitness = dataReader.ReadCompressedUInt32();
					uint num3 = dataReader.ReadByte();
					if (num3 > 1)
					{
						throw new InvalidOperationException();
					}
					instrInfo = new SimpleInstrInfo_ST1(text, (InstrOpInfoFlags)bitness, num3 != 0);
					break;
				}
				case CtorKind.ST2:
				{
					uint bitness = dataReader.ReadCompressedUInt32();
					instrInfo = new SimpleInstrInfo_ST2(text, (InstrOpInfoFlags)bitness);
					break;
				}
				case CtorKind.invlpga:
				{
					uint bitness = dataReader.ReadCompressedUInt32();
					instrInfo = new SimpleInstrInfo_invlpga((int)bitness, text);
					break;
				}
				default:
					throw new InvalidOperationException();
				}
				array[i] = instrInfo;
				if (num2 >= 0)
				{
					dataReader.Index = num2;
				}
			}
			if (dataReader.CanRead)
			{
				throw new InvalidOperationException();
			}
			return array;
		}

		private static ReadOnlySpan<byte> GetSerializedInstrInfos()
		{
			return new byte[10767]
			{
				1, 128, 1, 9, 130, 1, 9, 132, 1, 9,
				134, 1, 9, 136, 1, 1, 4, 0, 0, 0,
				0, 0, 0, 0, 0, 0, 0, 0, 19, 3,
				16, 19, 3, 32, 19, 12, 16, 19, 12, 32,
				1, 5, 0, 0, 0, 0, 0, 0, 0, 0,
				0, 0, 0, 19, 3, 16, 19, 3, 32, 19,
				12, 16, 1, 6, 0, 0, 0, 0, 0, 0,
				0, 0, 0, 0, 0, 19, 3, 16, 19, 3,
				32, 19, 12, 16, 19, 12, 32, 1, 7, 0,
				0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
				19, 3, 16, 19, 3, 32, 19, 12, 16, 19,
				12, 32, 1, 8, 0, 0, 0, 0, 0, 0,
				0, 0, 0, 0, 0, 1, 137, 1, 1, 9,
				0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
				0, 1, 138, 1, 1, 10, 0, 0, 0, 0,
				0, 0, 0, 0, 0, 0, 0, 1, 139, 1,
				1, 11, 0, 0, 0, 0, 0, 0, 0, 0,
				0, 0, 0, 1, 140, 1, 1, 141, 1, 0,
				1, 142, 1, 0, 1, 3, 0, 0, 1, 12,
				0, 0, 1, 143, 1, 1, 144, 1, 1, 145,
				1, 1, 146, 1, 2, 147, 1, 2, 0, 36,
				148, 1, 0, 1, 149, 1, 0, 0, 19, 3,
				16, 19, 3, 32, 19, 3, 64, 12, 27, 0,
				0, 19, 3, 16, 19, 3, 32, 19, 3, 64,
				12, 27, 0, 0, 1, 152, 1, 1, 153, 1,
				1, 154, 1, 1, 156, 1, 1, 157, 1, 1,
				158, 1, 28, 159, 1, 0, 16, 8, 28, 159,
				1, 0, 32, 8, 28, 159, 1, 0, 64, 8,
				28, 160, 1, 1, 16, 8, 28, 160, 1, 1,
				32, 8, 28, 160, 1, 1, 64, 8, 30, 161,
				1, 162, 1, 163, 1, 2, 16, 8, 30, 161,
				1, 162, 1, 163, 1, 2, 32, 8, 30, 161,
				1, 162, 1, 163, 1, 2, 64, 8, 30, 164,
				1, 165, 1, 166, 1, 3, 16, 8, 30, 164,
				1, 165, 1, 166, 1, 3, 32, 8, 30, 164,
				1, 165, 1, 166, 1, 3, 64, 8, 29, 167,
				1, 168, 1, 4, 16, 8, 29, 167, 1, 168,
				1, 4, 32, 8, 29, 167, 1, 168, 1, 4,
				64, 8, 29, 169, 1, 170, 1, 5, 16, 8,
				29, 169, 1, 170, 1, 5, 32, 8, 29, 169,
				1, 170, 1, 5, 64, 8, 29, 171, 1, 172,
				1, 6, 16, 8, 29, 171, 1, 172, 1, 6,
				32, 8, 29, 171, 1, 172, 1, 6, 64, 8,
				29, 173, 1, 174, 1, 7, 16, 8, 29, 173,
				1, 174, 1, 7, 32, 8, 29, 173, 1, 174,
				1, 7, 64, 8, 28, 175, 1, 8, 16, 8,
				28, 175, 1, 8, 32, 8, 28, 175, 1, 8,
				64, 8, 28, 176, 1, 9, 16, 8, 28, 176,
				1, 9, 32, 8, 28, 176, 1, 9, 64, 8,
				29, 177, 1, 178, 1, 10, 16, 8, 29, 177,
				1, 178, 1, 10, 32, 8, 29, 177, 1, 178,
				1, 10, 64, 8, 29, 179, 1, 180, 1, 11,
				16, 8, 29, 179, 1, 180, 1, 11, 32, 8,
				29, 179, 1, 180, 1, 11, 64, 8, 29, 181,
				1, 182, 1, 12, 16, 8, 29, 181, 1, 182,
				1, 12, 32, 8, 29, 181, 1, 182, 1, 12,
				64, 8, 29, 183, 1, 184, 1, 13, 16, 8,
				29, 183, 1, 184, 1, 13, 32, 8, 29, 183,
				1, 184, 1, 13, 64, 8, 29, 185, 1, 186,
				1, 14, 16, 8, 29, 185, 1, 186, 1, 14,
				32, 8, 29, 185, 1, 186, 1, 14, 64, 8,
				29, 187, 1, 188, 1, 15, 16, 8, 29, 187,
				1, 188, 1, 15, 32, 8, 29, 187, 1, 188,
				1, 15, 64, 8, 2, 4, 6, 2, 5, 6,
				2, 6, 6, 2, 7, 6, 2, 8, 6, 2,
				9, 6, 2, 10, 6, 2, 11, 6, 2, 4,
				6, 0, 0, 2, 5, 6, 0, 0, 2, 6,
				6, 0, 0, 2, 7, 6, 0, 0, 2, 8,
				6, 0, 0, 2, 9, 6, 0, 0, 2, 10,
				6, 0, 0, 2, 11, 6, 0, 0, 2, 4,
				6, 2, 5, 6, 2, 6, 6, 2, 7, 6,
				2, 8, 6, 2, 9, 6, 2, 10, 6, 2,
				11, 6, 2, 4, 6, 0, 0, 2, 5, 6,
				0, 0, 2, 6, 6, 0, 0, 2, 7, 6,
				0, 0, 2, 8, 6, 0, 0, 2, 9, 6,
				0, 0, 2, 10, 6, 0, 0, 2, 11, 6,
				0, 0, 1, 13, 0, 0, 0, 1, 61, 0,
				0, 0, 1, 1, 0, 0, 0, 0, 0, 0,
				0, 0, 0, 0, 1, 189, 1, 0, 0, 1,
				1, 36, 1, 0, 2, 12, 6, 0, 0, 18,
				2, 16, 21, 18, 2, 96, 37, 18, 2, 0,
				53, 1, 61, 0, 0, 1, 190, 1, 1, 192,
				1, 1, 193, 1, 1, 195, 1, 1, 197, 1,
				1, 199, 1, 1, 201, 1, 20, 43, 16, 128,
				4, 20, 43, 32, 128, 4, 1, 204, 1, 1,
				206, 1, 1, 207, 1, 1, 208, 1, 1, 209,
				1, 1, 210, 1, 1, 211, 1, 1, 212, 1,
				1, 213, 1, 17, 1, 0, 0, 0, 0, 0,
				0, 0, 1, 216, 1, 1, 217, 1, 1, 37,
				1, 218, 1, 1, 220, 1, 1, 221, 1, 1,
				157, 6, 1, 222, 1, 1, 13, 0, 0, 0,
				5, 224, 1, 5, 225, 1, 5, 226, 1, 5,
				227, 1, 4, 229, 1, 4, 230, 1, 4, 231,
				1, 4, 232, 1, 4, 234, 1, 4, 235, 1,
				4, 236, 1, 4, 237, 1, 1, 1, 0, 0,
				0, 2, 29, 6, 2, 30, 6, 2, 31, 6,
				2, 32, 6, 2, 18, 6, 2, 33, 6, 2,
				18, 6, 2, 34, 6, 2, 29, 6, 0, 0,
				2, 30, 6, 0, 0, 2, 31, 6, 0, 0,
				2, 32, 6, 0, 0, 2, 18, 6, 0, 0,
				2, 33, 6, 0, 0, 2, 18, 6, 0, 0,
				2, 34, 6, 0, 0, 21, 42, 16, 21, 42,
				32, 7, 42, 0, 21, 42, 16, 21, 42, 32,
				7, 42, 0, 1, 242, 1, 0, 1, 243, 1,
				0, 2, 1, 6, 1, 244, 1, 2, 1, 6,
				0, 0, 1, 245, 1, 0, 19, 246, 1, 16,
				19, 246, 1, 32, 19, 246, 1, 64, 19, 247,
				1, 16, 19, 247, 1, 32, 19, 247, 1, 64,
				20, 42, 16, 128, 4, 20, 42, 32, 128, 4,
				2, 42, 176, 4, 20, 42, 16, 128, 4, 20,
				42, 32, 128, 4, 2, 42, 176, 4, 1, 253,
				1, 1, 254, 1, 1, 255, 1, 1, 128, 2,
				1, 129, 2, 1, 130, 2, 2, 29, 6, 2,
				30, 6, 2, 31, 6, 2, 32, 6, 2, 18,
				6, 2, 33, 6, 2, 18, 6, 2, 34, 6,
				2, 29, 6, 0, 0, 2, 30, 6, 0, 0,
				2, 31, 6, 0, 0, 2, 32, 6, 0, 0,
				2, 18, 6, 0, 0, 2, 33, 6, 0, 0,
				2, 18, 6, 0, 0, 2, 34, 6, 0, 0,
				2, 29, 6, 2, 30, 6, 2, 31, 6, 2,
				32, 6, 2, 18, 6, 2, 33, 6, 2, 18,
				6, 2, 34, 6, 2, 29, 6, 0, 0, 2,
				30, 6, 0, 0, 2, 31, 6, 0, 0, 2,
				32, 6, 0, 0, 2, 18, 6, 0, 0, 2,
				33, 6, 0, 0, 2, 18, 6, 0, 0, 2,
				34, 6, 0, 0, 1, 131, 2, 1, 132, 2,
				1, 133, 2, 2, 134, 2, 128, 64, 38, 136,
				2, 6, 38, 137, 2, 6, 38, 138, 2, 6,
				38, 139, 2, 6, 38, 140, 2, 6, 38, 141,
				2, 6, 38, 142, 2, 6, 38, 143, 2, 6,
				10, 136, 2, 0, 10, 137, 2, 0, 10, 138,
				2, 1, 10, 139, 2, 1, 10, 140, 2, 0,
				10, 141, 2, 0, 10, 142, 2, 0, 10, 143,
				2, 0, 39, 144, 2, 6, 1, 8, 145, 2,
				6, 8, 125, 6, 16, 146, 2, 16, 16, 146,
				2, 96, 1, 147, 2, 16, 148, 2, 16, 16,
				149, 2, 16, 16, 148, 2, 96, 16, 149, 2,
				96, 1, 150, 2, 1, 151, 2, 39, 144, 2,
				0, 1, 10, 152, 2, 1, 1, 153, 2, 8,
				154, 2, 0, 1, 155, 2, 1, 156, 2, 1,
				157, 2, 1, 158, 2, 1, 159, 2, 1, 160,
				2, 1, 161, 2, 1, 162, 2, 1, 163, 2,
				1, 164, 2, 1, 165, 2, 1, 166, 2, 1,
				167, 2, 1, 168, 2, 1, 169, 2, 1, 170,
				2, 1, 171, 2, 1, 172, 2, 1, 173, 2,
				1, 174, 2, 1, 175, 2, 1, 176, 2, 1,
				177, 2, 1, 178, 2, 1, 179, 2, 1, 180,
				2, 1, 181, 2, 38, 182, 2, 6, 38, 183,
				2, 6, 38, 184, 2, 6, 38, 185, 2, 6,
				38, 186, 2, 6, 38, 187, 2, 6, 38, 188,
				2, 6, 38, 189, 2, 6, 10, 190, 2, 0,
				10, 191, 2, 0, 10, 192, 2, 0, 10, 193,
				2, 0, 1, 194, 2, 39, 195, 2, 6, 1,
				8, 196, 2, 6, 8, 197, 2, 6, 8, 198,
				2, 6, 39, 144, 2, 6, 1, 8, 125, 6,
				10, 199, 2, 0, 10, 200, 2, 0, 10, 201,
				2, 0, 10, 202, 2, 0, 1, 203, 2, 1,
				204, 2, 1, 205, 2, 1, 206, 2, 1, 207,
				2, 1, 208, 2, 1, 209, 2, 1, 210, 2,
				1, 211, 2, 1, 212, 2, 1, 213, 2, 10,
				214, 2, 0, 10, 215, 2, 0, 38, 136, 2,
				6, 38, 137, 2, 6, 38, 138, 2, 6, 38,
				139, 2, 6, 38, 140, 2, 6, 38, 141, 2,
				6, 38, 142, 2, 6, 38, 143, 2, 6, 11,
				136, 2, 0, 11, 137, 2, 0, 10, 138, 2,
				1, 10, 139, 2, 1, 11, 141, 2, 0, 11,
				140, 2, 0, 11, 143, 2, 0, 11, 142, 2,
				0, 39, 144, 2, 6, 1, 8, 196, 2, 6,
				8, 145, 2, 6, 8, 125, 6, 16, 217, 2,
				16, 16, 217, 2, 96, 16, 218, 2, 16, 16,
				219, 2, 16, 16, 218, 2, 96, 16, 219, 2,
				96, 1, 220, 2, 1, 221, 2, 1, 222, 2,
				10, 152, 2, 1, 8, 145, 2, 0, 8, 125,
				0, 10, 223, 2, 1, 10, 224, 2, 1, 38,
				182, 2, 6, 38, 183, 2, 6, 38, 184, 2,
				6, 38, 185, 2, 6, 38, 186, 2, 6, 38,
				187, 2, 6, 38, 188, 2, 6, 38, 189, 2,
				6, 11, 225, 2, 1, 11, 226, 2, 1, 10,
				139, 2, 1, 1, 227, 2, 11, 229, 2, 1,
				11, 228, 2, 1, 11, 231, 2, 1, 11, 230,
				2, 1, 39, 195, 2, 6, 1, 8, 196, 2,
				6, 8, 197, 2, 6, 8, 198, 2, 6, 39,
				232, 2, 2, 1, 39, 195, 2, 6, 1, 8,
				234, 2, 2, 8, 198, 2, 6, 1, 236, 2,
				10, 152, 2, 1, 8, 125, 0, 0, 1, 220,
				2, 1, 221, 2, 1, 237, 2, 1, 238, 2,
				10, 239, 2, 0, 10, 240, 2, 0, 31, 126,
				241, 2, 5, 16, 22, 31, 126, 241, 2, 5,
				32, 22, 31, 126, 241, 2, 5, 16, 38, 31,
				126, 241, 2, 5, 32, 38, 31, 126, 241, 2,
				5, 64, 38, 31, 126, 241, 2, 5, 16, 54,
				31, 126, 241, 2, 5, 64, 54, 31, 127, 244,
				2, 4, 16, 22, 31, 127, 244, 2, 4, 32,
				22, 31, 127, 244, 2, 4, 16, 38, 31, 127,
				244, 2, 4, 32, 38, 31, 127, 244, 2, 4,
				64, 38, 31, 127, 244, 2, 4, 16, 54, 31,
				127, 244, 2, 4, 64, 54, 32, 247, 2, 16,
				22, 32, 247, 2, 32, 22, 32, 247, 2, 16,
				38, 32, 247, 2, 32, 38, 32, 247, 2, 64,
				38, 32, 247, 2, 16, 54, 32, 247, 2, 64,
				54, 19, 249, 2, 16, 19, 249, 2, 32, 19,
				250, 2, 16, 19, 250, 2, 32, 19, 250, 2,
				64, 19, 251, 2, 16, 19, 251, 2, 64, 1,
				252, 2, 0, 0, 1, 253, 2, 0, 0, 21,
				43, 16, 21, 43, 32, 21, 43, 64, 21, 28,
				16, 21, 28, 32, 21, 28, 64, 20, 28, 16,
				128, 4, 20, 28, 32, 128, 4, 20, 28, 16,
				8, 20, 28, 32, 8, 20, 28, 64, 8, 1,
				252, 2, 0, 0, 1, 253, 2, 0, 0, 1,
				255, 2, 1, 128, 3, 1, 129, 3, 2, 13,
				6, 0, 2, 130, 3, 6, 2, 131, 3, 6,
				2, 132, 3, 6, 2, 27, 6, 2, 133, 3,
				6, 2, 134, 3, 6, 2, 13, 6, 0, 0,
				0, 0, 0, 2, 130, 3, 6, 0, 0, 2,
				131, 3, 6, 0, 0, 2, 132, 3, 6, 0,
				0, 2, 27, 6, 0, 0, 2, 133, 3, 6,
				0, 0, 2, 134, 3, 6, 0, 0, 1, 135,
				3, 1, 136, 3, 1, 137, 3, 1, 138, 3,
				1, 139, 3, 1, 140, 3, 2, 141, 1, 6,
				2, 142, 1, 6, 2, 141, 1, 6, 0, 0,
				2, 142, 1, 6, 0, 0, 7, 43, 6, 0,
				0, 2, 43, 134, 4, 0, 0, 7, 28, 6,
				0, 0, 2, 28, 134, 4, 0, 0, 2, 3,
				6, 0, 0, 1, 143, 3, 0, 0, 1, 144,
				3, 0, 0, 1, 145, 3, 36, 145, 3, 0,
				1, 146, 3, 36, 146, 3, 0, 1, 147, 3,
				36, 147, 3, 0, 1, 148, 3, 36, 148, 3,
				0, 2, 149, 3, 6, 0, 1, 150, 3, 0,
				0, 1, 151, 3, 0, 0, 1, 152, 3, 0,
				0, 1, 153, 3, 0, 0, 1, 154, 3, 0,
				0, 1, 155, 3, 1, 156, 3, 36, 156, 3,
				0, 2, 157, 3, 1, 1, 158, 3, 1, 159,
				3, 1, 160, 3, 1, 161, 3, 1, 162, 3,
				1, 163, 3, 3, 164, 3, 16, 3, 164, 3,
				32, 3, 164, 3, 64, 1, 165, 3, 1, 166,
				3, 1, 167, 3, 1, 168, 3, 1, 169, 3,
				1, 170, 3, 1, 171, 3, 1, 172, 3, 1,
				173, 3, 1, 174, 3, 35, 175, 3, 21, 35,
				175, 3, 37, 35, 175, 3, 53, 1, 176, 3,
				35, 177, 3, 21, 35, 177, 3, 37, 35, 177,
				3, 53, 35, 178, 3, 21, 35, 178, 3, 37,
				35, 178, 3, 53, 1, 179, 3, 1, 180, 3,
				35, 181, 3, 37, 14, 182, 3, 16, 14, 182,
				3, 32, 14, 182, 3, 64, 1, 183, 3, 1,
				184, 3, 1, 185, 3, 1, 186, 3, 1, 187,
				3, 1, 188, 3, 3, 189, 3, 16, 3, 189,
				3, 32, 3, 189, 3, 64, 1, 190, 3, 1,
				191, 3, 35, 192, 3, 21, 35, 192, 3, 37,
				35, 192, 3, 53, 1, 193, 3, 1, 194, 3,
				0, 0, 1, 195, 3, 0, 0, 1, 196, 3,
				1, 197, 3, 1, 198, 3, 1, 199, 3, 1,
				201, 3, 1, 202, 3, 1, 203, 3, 1, 204,
				3, 1, 205, 3, 1, 206, 3, 1, 207, 3,
				1, 208, 3, 1, 2, 0, 0, 1, 210, 3,
				1, 211, 3, 1, 212, 3, 1, 213, 3, 1,
				214, 3, 0, 0, 0, 0, 0, 1, 35, 129,
				35, 128, 128, 128, 128, 1, 36, 129, 36, 128,
				128, 128, 128, 1, 38, 129, 38, 128, 128, 128,
				1, 37, 129, 37, 128, 128, 128, 1, 35, 129,
				35, 128, 128, 128, 128, 1, 36, 129, 36, 128,
				128, 128, 128, 1, 38, 129, 38, 128, 128, 128,
				1, 37, 129, 37, 128, 128, 128, 1, 215, 3,
				1, 216, 3, 129, 215, 3, 129, 216, 3, 129,
				215, 3, 129, 216, 3, 1, 217, 3, 129, 217,
				3, 128, 1, 218, 3, 129, 218, 3, 128, 128,
				128, 128, 1, 219, 3, 129, 219, 3, 128, 128,
				128, 128, 1, 216, 3, 129, 216, 3, 128, 1,
				217, 3, 129, 217, 3, 128, 1, 220, 3, 129,
				220, 3, 128, 128, 128, 128, 1, 221, 3, 129,
				221, 3, 128, 128, 128, 128, 1, 222, 3, 129,
				222, 3, 128, 128, 128, 128, 1, 223, 3, 129,
				223, 3, 128, 128, 128, 128, 1, 224, 3, 129,
				224, 3, 128, 1, 225, 3, 129, 225, 3, 128,
				1, 226, 3, 129, 226, 3, 128, 1, 227, 3,
				129, 227, 3, 128, 128, 128, 128, 1, 225, 3,
				129, 225, 3, 128, 1, 226, 3, 129, 226, 3,
				128, 1, 2, 0, 0, 0, 0, 0, 0, 0,
				0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
				0, 0, 0, 0, 0, 0, 1, 228, 3, 1,
				229, 3, 1, 230, 3, 1, 231, 3, 2, 232,
				3, 1, 2, 233, 3, 2, 0, 2, 234, 3,
				1, 0, 2, 235, 3, 1, 0, 2, 236, 3,
				1, 2, 233, 3, 2, 0, 2, 237, 3, 1,
				0, 2, 238, 3, 1, 0, 2, 239, 3, 1,
				1, 240, 3, 1, 241, 3, 1, 242, 3, 1,
				243, 3, 1, 2, 0, 0, 1, 1, 0, 0,
				0, 0, 0, 0, 0, 0, 0, 1, 19, 129,
				19, 128, 128, 128, 128, 1, 20, 129, 20, 128,
				128, 128, 128, 1, 19, 129, 19, 128, 128, 128,
				128, 1, 20, 129, 20, 128, 128, 128, 128, 1,
				244, 3, 1, 245, 3, 2, 246, 3, 6, 0,
				130, 246, 3, 6, 128, 128, 128, 2, 247, 3,
				6, 0, 130, 247, 3, 6, 128, 128, 128, 1,
				248, 3, 129, 248, 3, 128, 128, 128, 128, 1,
				249, 3, 129, 249, 3, 128, 128, 128, 128, 1,
				250, 3, 1, 251, 3, 1, 252, 3, 1, 253,
				3, 1, 254, 3, 0, 129, 254, 3, 128, 128,
				128, 1, 255, 3, 0, 129, 255, 3, 128, 128,
				128, 1, 128, 4, 1, 129, 4, 1, 130, 4,
				0, 129, 130, 4, 128, 128, 128, 1, 131, 4,
				0, 129, 131, 4, 128, 128, 128, 1, 132, 4,
				129, 132, 4, 128, 1, 133, 4, 129, 133, 4,
				128, 1, 134, 4, 1, 135, 4, 129, 134, 4,
				129, 135, 4, 129, 134, 4, 129, 135, 4, 1,
				136, 4, 1, 137, 4, 1, 138, 4, 1, 139,
				4, 1, 140, 4, 1, 141, 4, 1, 142, 4,
				1, 143, 4, 22, 144, 4, 0, 0, 0, 22,
				145, 4, 1, 0, 0, 24, 146, 4, 147, 4,
				148, 4, 2, 0, 0, 24, 149, 4, 150, 4,
				151, 4, 3, 0, 0, 23, 152, 4, 153, 4,
				4, 0, 0, 23, 154, 4, 155, 4, 5, 0,
				0, 23, 156, 4, 157, 4, 6, 0, 0, 23,
				158, 4, 159, 4, 7, 0, 0, 22, 160, 4,
				8, 0, 0, 22, 161, 4, 9, 0, 0, 23,
				162, 4, 163, 4, 10, 0, 0, 23, 164, 4,
				165, 4, 11, 0, 0, 23, 166, 4, 167, 4,
				12, 0, 0, 23, 168, 4, 169, 4, 13, 0,
				0, 23, 170, 4, 171, 4, 14, 0, 0, 23,
				172, 4, 173, 4, 15, 0, 0, 1, 174, 4,
				1, 175, 4, 1, 176, 4, 1, 177, 4, 1,
				178, 4, 1, 179, 4, 1, 180, 4, 1, 181,
				4, 1, 182, 4, 1, 183, 4, 1, 184, 4,
				1, 185, 4, 1, 186, 4, 1, 187, 4, 1,
				188, 4, 1, 189, 4, 1, 190, 4, 1, 191,
				4, 1, 192, 4, 1, 193, 4, 1, 194, 4,
				1, 195, 4, 1, 196, 4, 1, 197, 4, 1,
				198, 4, 1, 199, 4, 1, 200, 4, 1, 201,
				4, 1, 202, 4, 1, 203, 4, 1, 204, 4,
				1, 205, 4, 37, 205, 4, 129, 205, 4, 165,
				205, 4, 129, 205, 4, 165, 205, 4, 1, 206,
				4, 37, 206, 4, 129, 206, 4, 165, 206, 4,
				129, 206, 4, 165, 206, 4, 1, 207, 4, 129,
				207, 4, 128, 128, 128, 128, 1, 208, 4, 129,
				208, 4, 128, 128, 128, 128, 1, 209, 4, 129,
				209, 4, 128, 1, 210, 4, 129, 210, 4, 128,
				1, 211, 4, 129, 211, 4, 128, 1, 212, 4,
				129, 212, 4, 1, 213, 4, 129, 213, 4, 128,
				1, 214, 4, 129, 214, 4, 1, 215, 4, 129,
				215, 4, 128, 128, 128, 128, 1, 216, 4, 129,
				216, 4, 128, 128, 128, 128, 1, 217, 4, 129,
				217, 4, 128, 128, 128, 128, 1, 218, 4, 129,
				218, 4, 128, 128, 128, 128, 1, 219, 4, 129,
				219, 4, 128, 128, 128, 128, 1, 220, 4, 129,
				220, 4, 128, 128, 128, 128, 1, 221, 4, 129,
				221, 4, 128, 128, 128, 128, 1, 222, 4, 129,
				222, 4, 128, 128, 128, 128, 1, 62, 129, 62,
				128, 128, 128, 128, 1, 63, 129, 63, 128, 128,
				128, 128, 1, 223, 4, 129, 223, 4, 128, 1,
				224, 4, 129, 224, 4, 128, 1, 64, 129, 64,
				128, 128, 128, 128, 1, 65, 129, 65, 128, 128,
				128, 128, 1, 225, 4, 129, 225, 4, 128, 1,
				226, 4, 129, 226, 4, 128, 1, 66, 129, 66,
				128, 128, 128, 128, 1, 67, 130, 67, 6, 128,
				134, 67, 6, 128, 129, 67, 1, 227, 4, 129,
				227, 4, 128, 1, 228, 4, 129, 228, 4, 128,
				1, 229, 4, 129, 229, 4, 128, 128, 128, 128,
				6, 230, 4, 6, 0, 1, 230, 4, 1, 231,
				4, 129, 231, 4, 128, 128, 128, 128, 1, 232,
				4, 129, 232, 4, 128, 128, 128, 128, 1, 68,
				129, 68, 128, 128, 128, 128, 1, 69, 129, 69,
				128, 128, 128, 128, 1, 233, 4, 129, 233, 4,
				128, 1, 234, 4, 129, 234, 4, 128, 1, 235,
				4, 129, 235, 4, 128, 128, 128, 128, 1, 236,
				4, 129, 236, 4, 128, 128, 128, 128, 1, 237,
				4, 129, 237, 4, 128, 1, 238, 4, 129, 238,
				4, 128, 1, 239, 4, 129, 239, 4, 128, 128,
				128, 128, 1, 240, 4, 129, 240, 4, 128, 128,
				128, 128, 1, 241, 4, 129, 241, 4, 128, 1,
				242, 4, 129, 242, 4, 128, 1, 243, 4, 129,
				243, 4, 128, 128, 128, 128, 1, 244, 4, 129,
				244, 4, 128, 128, 128, 128, 1, 245, 4, 129,
				245, 4, 128, 1, 246, 4, 129, 246, 4, 128,
				1, 70, 0, 129, 70, 128, 128, 128, 128, 1,
				71, 0, 129, 71, 128, 128, 128, 128, 1, 72,
				0, 129, 72, 128, 128, 128, 128, 1, 73, 0,
				129, 73, 128, 128, 128, 128, 1, 74, 0, 129,
				74, 128, 128, 128, 128, 1, 75, 0, 129, 75,
				128, 128, 128, 128, 1, 46, 0, 129, 46, 128,
				128, 128, 128, 1, 76, 0, 129, 76, 128, 128,
				128, 128, 1, 77, 0, 129, 77, 128, 128, 128,
				128, 1, 78, 0, 129, 78, 128, 128, 128, 128,
				1, 79, 0, 129, 79, 128, 128, 128, 128, 1,
				80, 0, 129, 80, 128, 128, 128, 128, 1, 247,
				4, 129, 247, 4, 128, 128, 128, 128, 1, 248,
				4, 129, 248, 4, 128, 128, 128, 128, 1, 47,
				1, 14, 1, 47, 1, 14, 129, 47, 129, 14,
				129, 47, 129, 14, 1, 14, 1, 249, 4, 129,
				249, 4, 128, 1, 48, 0, 0, 1, 49, 0,
				0, 1, 250, 4, 129, 250, 4, 128, 1, 251,
				4, 0, 0, 1, 252, 4, 0, 0, 1, 253,
				4, 0, 0, 1, 254, 4, 0, 0, 1, 255,
				4, 1, 81, 129, 81, 128, 128, 128, 128, 1,
				128, 5, 129, 128, 5, 128, 128, 128, 128, 1,
				129, 5, 129, 129, 5, 128, 128, 128, 128, 1,
				21, 0, 129, 21, 128, 128, 128, 128, 1, 22,
				0, 129, 22, 128, 128, 128, 128, 1, 23, 0,
				129, 23, 128, 128, 128, 128, 1, 130, 5, 0,
				0, 1, 131, 5, 0, 0, 1, 132, 5, 0,
				0, 1, 133, 5, 0, 0, 1, 15, 0, 129,
				15, 128, 128, 128, 128, 1, 16, 0, 129, 16,
				128, 128, 128, 128, 1, 134, 5, 0, 0, 1,
				17, 0, 129, 17, 128, 128, 128, 128, 1, 24,
				0, 129, 24, 128, 128, 128, 128, 1, 135, 5,
				129, 135, 5, 128, 128, 128, 128, 1, 25, 0,
				129, 25, 128, 128, 128, 128, 1, 136, 5, 129,
				136, 5, 128, 128, 128, 128, 1, 82, 0, 129,
				82, 128, 128, 128, 128, 1, 83, 0, 129, 83,
				128, 128, 128, 128, 1, 50, 0, 129, 50, 128,
				128, 128, 128, 1, 137, 5, 1, 138, 5, 1,
				139, 5, 1, 140, 5, 0, 1, 141, 5, 0,
				0, 6, 142, 5, 6, 0, 1, 142, 5, 1,
				143, 5, 1, 144, 5, 0, 0, 1, 145, 5,
				0, 0, 1, 146, 5, 0, 1, 147, 5, 1,
				148, 5, 0, 1, 149, 5, 0, 1, 150, 5,
				0, 0, 6, 151, 5, 6, 0, 1, 151, 5,
				1, 143, 5, 1, 152, 5, 0, 0, 1, 153,
				5, 0, 0, 1, 154, 5, 0, 1, 147, 5,
				1, 155, 5, 0, 1, 156, 5, 0, 0, 1,
				157, 5, 0, 0, 1, 158, 5, 0, 0, 1,
				159, 5, 0, 0, 1, 160, 5, 0, 0, 6,
				161, 5, 6, 0, 1, 161, 5, 1, 162, 5,
				0, 0, 1, 163, 5, 0, 0, 2, 164, 5,
				6, 0, 2, 165, 5, 6, 0, 1, 166, 5,
				129, 166, 5, 128, 1, 167, 5, 129, 167, 5,
				128, 1, 168, 5, 129, 168, 5, 128, 1, 169,
				5, 129, 169, 5, 128, 1, 47, 1, 14, 1,
				47, 1, 14, 129, 47, 129, 14, 129, 47, 129,
				14, 1, 14, 129, 14, 128, 1, 14, 1, 249,
				4, 129, 249, 4, 128, 1, 48, 0, 0, 1,
				49, 0, 0, 1, 250, 4, 129, 250, 4, 128,
				1, 251, 4, 0, 0, 1, 252, 4, 0, 0,
				1, 253, 4, 0, 0, 1, 254, 4, 0, 0,
				25, 159, 1, 0, 16, 25, 159, 1, 0, 32,
				25, 159, 1, 0, 64, 25, 160, 1, 1, 16,
				25, 160, 1, 1, 32, 25, 160, 1, 1, 64,
				27, 161, 1, 162, 1, 163, 1, 2, 16, 27,
				161, 1, 162, 1, 163, 1, 2, 32, 27, 161,
				1, 162, 1, 163, 1, 2, 64, 27, 164, 1,
				165, 1, 166, 1, 3, 16, 27, 164, 1, 165,
				1, 166, 1, 3, 32, 27, 164, 1, 165, 1,
				166, 1, 3, 64, 26, 167, 1, 168, 1, 4,
				16, 26, 167, 1, 168, 1, 4, 32, 26, 167,
				1, 168, 1, 4, 64, 26, 169, 1, 170, 1,
				5, 16, 26, 169, 1, 170, 1, 5, 32, 26,
				169, 1, 170, 1, 5, 64, 26, 171, 1, 172,
				1, 6, 16, 26, 171, 1, 172, 1, 6, 32,
				26, 171, 1, 172, 1, 6, 64, 26, 173, 1,
				174, 1, 7, 16, 26, 173, 1, 174, 1, 7,
				32, 26, 173, 1, 174, 1, 7, 64, 25, 175,
				1, 8, 16, 25, 175, 1, 8, 32, 25, 175,
				1, 8, 64, 25, 176, 1, 9, 16, 25, 176,
				1, 9, 32, 25, 176, 1, 9, 64, 26, 177,
				1, 178, 1, 10, 16, 26, 177, 1, 178, 1,
				10, 32, 26, 177, 1, 178, 1, 10, 64, 26,
				179, 1, 180, 1, 11, 16, 26, 179, 1, 180,
				1, 11, 32, 26, 179, 1, 180, 1, 11, 64,
				26, 181, 1, 182, 1, 12, 16, 26, 181, 1,
				182, 1, 12, 32, 26, 181, 1, 182, 1, 12,
				64, 26, 183, 1, 184, 1, 13, 16, 26, 183,
				1, 184, 1, 13, 32, 26, 183, 1, 184, 1,
				13, 64, 26, 185, 1, 186, 1, 14, 16, 26,
				185, 1, 186, 1, 14, 32, 26, 185, 1, 186,
				1, 14, 64, 26, 187, 1, 188, 1, 15, 16,
				26, 187, 1, 188, 1, 15, 32, 26, 187, 1,
				188, 1, 15, 64, 22, 170, 5, 0, 22, 171,
				5, 1, 24, 172, 5, 173, 5, 174, 5, 2,
				24, 175, 5, 176, 5, 177, 5, 3, 23, 178,
				5, 179, 5, 4, 23, 180, 5, 181, 5, 5,
				23, 182, 5, 183, 5, 6, 23, 184, 5, 185,
				5, 7, 22, 186, 5, 8, 22, 187, 5, 9,
				23, 188, 5, 189, 5, 10, 23, 190, 5, 191,
				5, 11, 23, 192, 5, 193, 5, 12, 23, 194,
				5, 195, 5, 13, 23, 196, 5, 197, 5, 14,
				23, 198, 5, 199, 5, 15, 1, 200, 5, 1,
				201, 5, 1, 202, 5, 1, 203, 5, 1, 200,
				5, 1, 201, 5, 1, 202, 5, 1, 203, 5,
				1, 200, 5, 1, 202, 5, 1, 203, 5, 1,
				201, 5, 1, 200, 5, 1, 202, 5, 1, 203,
				5, 1, 201, 5, 1, 204, 5, 1, 205, 5,
				1, 206, 5, 1, 207, 5, 1, 208, 5, 1,
				209, 5, 1, 210, 5, 1, 211, 5, 19, 3,
				16, 19, 3, 32, 19, 3, 64, 19, 12, 16,
				19, 12, 32, 19, 12, 64, 1, 212, 5, 1,
				213, 5, 0, 0, 1, 214, 5, 0, 0, 0,
				0, 0, 3, 215, 5, 16, 3, 215, 5, 32,
				3, 215, 5, 64, 3, 216, 5, 16, 3, 216,
				5, 32, 3, 216, 5, 64, 3, 217, 5, 16,
				3, 217, 5, 32, 3, 217, 5, 64, 1, 218,
				5, 0, 3, 219, 5, 16, 3, 219, 5, 32,
				3, 219, 5, 64, 3, 220, 5, 16, 3, 220,
				5, 32, 3, 220, 5, 64, 3, 221, 5, 16,
				3, 221, 5, 32, 3, 221, 5, 64, 3, 222,
				5, 16, 3, 222, 5, 32, 3, 222, 5, 64,
				3, 223, 5, 16, 3, 223, 5, 32, 3, 223,
				5, 64, 3, 224, 5, 16, 3, 224, 5, 32,
				3, 224, 5, 64, 1, 225, 5, 0, 1, 226,
				5, 0, 0, 19, 3, 16, 19, 3, 32, 19,
				3, 64, 19, 12, 16, 19, 12, 32, 19, 12,
				64, 1, 227, 5, 1, 228, 5, 0, 0, 1,
				229, 5, 0, 0, 0, 0, 0, 1, 230, 5,
				1, 231, 5, 1, 232, 5, 0, 1, 233, 5,
				1, 234, 5, 1, 235, 5, 0, 1, 236, 5,
				1, 237, 5, 0, 129, 236, 5, 1, 238, 5,
				1, 239, 5, 0, 129, 238, 5, 1, 240, 5,
				1, 241, 5, 2, 242, 5, 6, 0, 1, 243,
				5, 1, 244, 5, 1, 245, 5, 1, 246, 5,
				1, 247, 5, 1, 248, 5, 1, 249, 5, 1,
				250, 5, 37, 250, 5, 1, 251, 5, 1, 252,
				5, 0, 0, 1, 253, 5, 37, 253, 5, 1,
				254, 5, 1, 255, 5, 1, 51, 0, 0, 0,
				0, 0, 0, 0, 1, 52, 0, 0, 0, 0,
				0, 0, 0, 1, 53, 0, 0, 0, 0, 0,
				0, 0, 1, 128, 6, 1, 27, 0, 0, 1,
				129, 6, 0, 0, 0, 1, 130, 6, 0, 0,
				1, 131, 6, 0, 0, 1, 132, 6, 0, 0,
				1, 133, 6, 0, 0, 2, 135, 6, 6, 0,
				0, 0, 0, 0, 1, 149, 3, 0, 1, 141,
				6, 0, 0, 1, 142, 6, 0, 0, 2, 213,
				5, 6, 0, 0, 2, 228, 5, 6, 0, 0,
				2, 131, 6, 6, 0, 0, 2, 143, 6, 6,
				0, 0, 1, 143, 6, 0, 0, 1, 144, 6,
				0, 0, 1, 145, 6, 0, 0, 1, 146, 6,
				0, 0, 1, 147, 6, 0, 0, 2, 149, 6,
				6, 0, 0, 0, 0, 0, 1, 155, 6, 0,
				0, 0, 34, 84, 0, 162, 84, 1, 128, 128,
				128, 128, 34, 85, 2, 162, 85, 3, 128, 128,
				128, 128, 34, 156, 6, 4, 162, 156, 6, 5,
				128, 34, 157, 6, 6, 162, 157, 6, 7, 128,
				1, 158, 6, 0, 1, 54, 37, 54, 1, 54,
				37, 54, 129, 54, 165, 54, 129, 54, 165, 54,
				1, 26, 37, 26, 1, 26, 37, 26, 129, 26,
				165, 26, 129, 26, 165, 26, 1, 159, 6, 129,
				159, 6, 128, 128, 128, 128, 1, 160, 6, 129,
				160, 6, 128, 128, 128, 128, 1, 161, 6, 1,
				162, 6, 1, 163, 6, 1, 164, 6, 1, 165,
				6, 1, 166, 6, 1, 167, 6, 1, 168, 6,
				1, 169, 6, 1, 170, 6, 1, 171, 6, 1,
				172, 6, 0, 0, 1, 173, 6, 1, 174, 6,
				0, 0, 1, 175, 6, 0, 1, 176, 6, 0,
				0, 1, 177, 6, 129, 177, 6, 128, 1, 178,
				6, 129, 178, 6, 128, 1, 21, 0, 129, 21,
				128, 128, 128, 128, 1, 15, 0, 129, 15, 128,
				128, 128, 128, 1, 24, 0, 129, 24, 128, 128,
				128, 128, 1, 86, 0, 129, 86, 128, 128, 128,
				128, 1, 87, 0, 129, 87, 128, 128, 128, 128,
				1, 14, 129, 14, 128, 1, 179, 6, 1, 180,
				6, 1, 55, 37, 55, 1, 55, 37, 55, 129,
				55, 165, 55, 129, 55, 165, 55, 1, 88, 0,
				129, 88, 128, 128, 128, 128, 1, 89, 0, 129,
				89, 128, 128, 128, 128, 1, 90, 0, 129, 90,
				128, 128, 128, 128, 1, 181, 6, 0, 129, 181,
				6, 128, 1, 182, 6, 0, 0, 1, 183, 6,
				0, 0, 1, 91, 0, 129, 91, 128, 128, 128,
				128, 1, 92, 0, 129, 92, 128, 128, 128, 128,
				1, 93, 0, 129, 93, 128, 128, 128, 128, 1,
				184, 6, 0, 129, 184, 6, 128, 1, 185, 6,
				0, 0, 1, 186, 6, 0, 0, 1, 94, 0,
				129, 94, 128, 128, 128, 128, 1, 22, 0, 129,
				22, 128, 128, 128, 128, 1, 16, 0, 129, 16,
				128, 128, 128, 128, 1, 134, 5, 0, 0, 1,
				95, 0, 129, 95, 128, 128, 128, 128, 1, 96,
				0, 129, 96, 128, 128, 128, 128, 1, 97, 0,
				129, 97, 128, 128, 128, 128, 1, 187, 6, 130,
				187, 6, 6, 128, 134, 187, 6, 6, 128, 129,
				187, 6, 1, 98, 129, 98, 128, 128, 128, 128,
				1, 188, 6, 0, 0, 1, 189, 6, 130, 189,
				6, 6, 128, 134, 189, 6, 6, 128, 129, 189,
				6, 1, 190, 6, 1, 191, 6, 129, 191, 6,
				128, 128, 128, 128, 1, 99, 0, 129, 99, 128,
				128, 128, 128, 1, 100, 0, 129, 100, 128, 128,
				128, 128, 1, 101, 0, 129, 101, 128, 128, 128,
				128, 1, 192, 6, 0, 129, 192, 6, 128, 1,
				193, 6, 0, 0, 1, 194, 6, 0, 0, 1,
				102, 0, 129, 102, 128, 128, 128, 128, 1, 103,
				0, 129, 103, 128, 128, 128, 128, 1, 104, 0,
				129, 104, 128, 128, 128, 128, 1, 195, 6, 0,
				129, 195, 6, 128, 1, 196, 6, 0, 0, 1,
				197, 6, 0, 0, 1, 198, 6, 129, 198, 6,
				128, 1, 23, 0, 129, 23, 128, 128, 128, 128,
				1, 17, 0, 129, 17, 128, 128, 128, 128, 1,
				25, 0, 129, 25, 128, 128, 128, 128, 1, 105,
				0, 129, 105, 128, 128, 128, 128, 1, 106, 0,
				129, 106, 128, 128, 128, 128, 1, 107, 0, 129,
				107, 128, 128, 128, 128, 15, 199, 6, 15, 200,
				6, 143, 200, 6, 1, 108, 0, 129, 108, 128,
				128, 128, 128, 1, 109, 0, 129, 109, 128, 128,
				128, 128, 1, 56, 0, 129, 56, 128, 128, 128,
				128, 1, 110, 0, 129, 110, 128, 128, 128, 128,
				1, 111, 0, 129, 111, 128, 128, 128, 128, 1,
				112, 0, 129, 112, 128, 128, 128, 128, 1, 57,
				0, 129, 57, 128, 128, 128, 128, 1, 201, 6,
				0, 0, 1, 113, 0, 129, 113, 128, 128, 128,
				128, 1, 202, 6, 0, 129, 202, 6, 128, 1,
				203, 6, 0, 129, 203, 6, 128, 1, 204, 6,
				0, 129, 204, 6, 128, 1, 114, 0, 129, 114,
				128, 128, 128, 128, 1, 205, 6, 0, 129, 205,
				6, 128, 1, 206, 6, 0, 129, 206, 6, 128,
				1, 207, 6, 0, 129, 207, 6, 128, 1, 208,
				6, 0, 129, 208, 6, 128, 1, 209, 6, 0,
				129, 209, 6, 128, 1, 210, 6, 0, 129, 210,
				6, 128, 1, 115, 0, 129, 115, 128, 128, 128,
				128, 1, 39, 0, 0, 0, 0, 1, 40, 0,
				0, 0, 0, 1, 211, 6, 0, 1, 212, 6,
				0, 1, 213, 6, 1, 214, 6, 0, 0, 1,
				215, 6, 0, 0, 1, 216, 6, 0, 0, 1,
				217, 6, 0, 0, 1, 218, 6, 0, 0, 1,
				219, 6, 0, 0, 1, 220, 6, 0, 0, 0,
				0, 1, 221, 6, 0, 0, 1, 222, 6, 1,
				223, 6, 0, 0, 1, 224, 6, 0, 0, 1,
				225, 6, 0, 0, 1, 226, 6, 1, 227, 6,
				0, 0, 1, 228, 6, 0, 0, 1, 229, 6,
				0, 0, 1, 230, 6, 0, 0, 1, 231, 6,
				0, 1, 232, 6, 129, 232, 6, 128, 1, 58,
				0, 0, 0, 0, 1, 233, 6, 1, 234, 6,
				0, 1, 233, 6, 0, 1, 235, 6, 1, 236,
				6, 0, 1, 237, 6, 0, 1, 238, 6, 1,
				239, 6, 1, 116, 0, 129, 116, 128, 128, 128,
				128, 1, 117, 0, 129, 117, 128, 128, 128, 128,
				1, 118, 0, 129, 118, 128, 128, 128, 128, 1,
				240, 6, 0, 0, 1, 241, 6, 129, 241, 6,
				128, 128, 128, 128, 1, 242, 6, 0, 0, 1,
				243, 6, 129, 243, 6, 128, 128, 128, 128, 1,
				244, 6, 0, 0, 1, 245, 6, 129, 245, 6,
				128, 128, 128, 128, 1, 246, 6, 0, 0, 1,
				247, 6, 129, 247, 6, 128, 128, 128, 128, 1,
				248, 6, 0, 0, 1, 249, 6, 129, 249, 6,
				128, 128, 128, 128, 1, 250, 6, 0, 0, 1,
				251, 6, 129, 251, 6, 128, 128, 128, 128, 1,
				252, 6, 0, 0, 1, 253, 6, 0, 0, 1,
				254, 6, 0, 0, 1, 255, 6, 0, 0, 1,
				128, 7, 0, 0, 1, 129, 7, 0, 0, 1,
				130, 7, 0, 0, 1, 131, 7, 0, 0, 1,
				132, 7, 0, 0, 1, 133, 7, 129, 133, 7,
				128, 128, 128, 128, 1, 134, 7, 0, 0, 1,
				135, 7, 0, 0, 1, 136, 7, 129, 136, 7,
				128, 128, 128, 128, 1, 137, 7, 0, 0, 1,
				138, 7, 0, 0, 1, 139, 7, 129, 139, 7,
				128, 128, 128, 128, 1, 140, 7, 0, 0, 1,
				141, 7, 129, 141, 7, 128, 128, 128, 128, 1,
				142, 7, 0, 1, 143, 7, 0, 0, 1, 144,
				7, 0, 0, 1, 145, 7, 0, 1, 146, 7,
				1, 147, 7, 1, 142, 7, 0, 1, 145, 7,
				0, 1, 148, 7, 129, 148, 7, 128, 128, 128,
				128, 1, 149, 7, 0, 0, 1, 150, 7, 129,
				150, 7, 128, 128, 128, 128, 1, 151, 7, 0,
				0, 1, 152, 7, 129, 152, 7, 128, 128, 128,
				128, 1, 153, 7, 0, 0, 1, 154, 7, 129,
				154, 7, 128, 128, 128, 128, 1, 155, 7, 0,
				0, 1, 156, 7, 129, 156, 7, 128, 128, 128,
				128, 1, 157, 7, 0, 0, 1, 158, 7, 129,
				158, 7, 128, 128, 128, 128, 1, 159, 7, 0,
				0, 1, 160, 7, 0, 0, 1, 161, 7, 0,
				1, 162, 7, 129, 162, 7, 128, 128, 128, 128,
				1, 163, 7, 129, 163, 7, 128, 128, 128, 128,
				1, 164, 7, 0, 0, 1, 165, 7, 0, 0,
				1, 119, 129, 119, 128, 128, 128, 128, 1, 166,
				7, 0, 0, 1, 167, 7, 0, 0, 1, 168,
				7, 0, 0, 1, 169, 7, 129, 169, 7, 128,
				128, 128, 128, 1, 170, 7, 0, 0, 1, 120,
				129, 120, 128, 128, 128, 128, 1, 171, 7, 0,
				0, 1, 172, 7, 129, 172, 7, 128, 128, 128,
				128, 1, 121, 129, 121, 128, 128, 128, 128, 1,
				173, 7, 0, 0, 1, 174, 7, 129, 174, 7,
				128, 128, 128, 128, 1, 122, 129, 122, 128, 128,
				128, 128, 1, 175, 7, 0, 0, 1, 123, 129,
				123, 128, 128, 128, 128, 1, 176, 7, 0, 0,
				1, 177, 7, 129, 177, 7, 1, 178, 7, 0,
				0, 1, 179, 7, 0, 0, 1, 180, 7, 1,
				181, 7, 1, 182, 7, 0, 0, 1, 183, 7,
				0, 0, 1, 184, 7, 0, 1, 185, 7, 0,
				1, 184, 7, 0, 0, 1, 185, 7, 0, 0,
				1, 186, 7, 0, 0, 0, 0, 1, 187, 7,
				0, 0, 1, 188, 7, 0, 1, 189, 7, 0,
				1, 188, 7, 0, 0, 1, 189, 7, 0, 0,
				1, 190, 7, 0, 0, 1, 191, 7, 0, 0,
				1, 192, 7, 1, 193, 7, 1, 194, 7, 0,
				0, 1, 195, 7, 0, 0, 1, 196, 7, 1,
				197, 7, 1, 198, 7, 0, 0, 1, 199, 7,
				0, 0, 1, 200, 7, 0, 0, 1, 201, 7,
				0, 0, 1, 202, 7, 1, 203, 7, 0, 0,
				1, 204, 7, 1, 205, 7, 0, 0, 1, 206,
				7, 0, 0, 1, 207, 7, 0, 0, 1, 208,
				7, 0, 0, 1, 44, 0, 0, 0, 0, 1,
				45, 0, 1, 209, 7, 0, 0, 1, 45, 0,
				0, 1, 210, 7, 1, 211, 7, 0, 1, 212,
				7, 0, 1, 213, 7, 1, 214, 7, 1, 215,
				7, 0, 0, 1, 216, 7, 0, 0, 1, 217,
				7, 0, 0, 1, 218, 7, 0, 0, 1, 219,
				7, 0, 0, 1, 220, 7, 0, 0, 1, 221,
				7, 0, 0, 1, 222, 7, 0, 0, 1, 223,
				7, 0, 0, 1, 224, 7, 0, 0, 1, 225,
				7, 0, 0, 1, 226, 7, 0, 0, 1, 227,
				7, 0, 0, 1, 228, 7, 0, 0, 1, 229,
				7, 0, 0, 1, 230, 7, 0, 0, 6, 231,
				7, 6, 0, 1, 231, 7, 1, 232, 7, 0,
				0, 1, 233, 7, 0, 0, 1, 234, 7, 0,
				0, 1, 235, 7, 0, 0, 1, 236, 7, 0,
				0, 1, 237, 7, 0, 0, 1, 238, 7, 0,
				0, 1, 239, 7, 0, 0, 1, 240, 7, 0,
				0, 1, 59, 0, 0, 0, 0, 1, 60, 0,
				0, 0, 0, 1, 59, 0, 0, 1, 60, 0,
				0, 1, 44, 0, 0, 1, 45, 0, 0, 1,
				241, 7, 0, 0, 1, 242, 7, 0, 0, 1,
				243, 7, 0, 0, 1, 244, 7, 0, 0, 1,
				245, 7, 0, 0, 1, 246, 7, 0, 0, 1,
				247, 7, 0, 1, 248, 7, 0, 1, 249, 7,
				0, 1, 250, 7, 0, 0, 1, 251, 7, 0,
				0, 1, 252, 7, 0, 0, 1, 253, 7, 0,
				0, 1, 254, 7, 0, 0, 1, 255, 7, 0,
				0, 1, 128, 8, 0, 0, 1, 129, 8, 0,
				0, 1, 130, 8, 0, 0, 1, 131, 8, 0,
				1, 132, 8, 0, 1, 133, 8, 0, 0, 1,
				134, 8, 0, 0, 1, 131, 8, 0, 1, 132,
				8, 0, 1, 135, 8, 0, 0, 1, 136, 8,
				0, 1, 137, 8, 0, 13, 136, 8, 0, 0,
				13, 137, 8, 0, 0, 1, 138, 8, 0, 1,
				139, 8, 0, 13, 138, 8, 0, 0, 13, 139,
				8, 0, 0, 1, 140, 8, 0, 1, 141, 8,
				0, 13, 140, 8, 0, 0, 13, 141, 8, 0,
				0, 1, 142, 8, 0, 1, 143, 8, 0, 13,
				142, 8, 0, 0, 13, 143, 8, 0, 0, 1,
				144, 8, 0, 1, 145, 8, 0, 1, 144, 8,
				0, 0, 1, 145, 8, 0, 0, 1, 146, 8,
				0, 1, 147, 8, 0, 1, 146, 8, 0, 0,
				1, 147, 8, 0, 0, 1, 148, 8, 0, 1,
				149, 8, 0, 1, 148, 8, 0, 0, 1, 149,
				8, 0, 0, 1, 150, 8, 1, 151, 8, 1,
				150, 8, 1, 151, 8, 1, 152, 8, 0, 1,
				153, 8, 0, 1, 152, 8, 0, 0, 1, 153,
				8, 0, 0, 1, 154, 8, 1, 155, 8, 1,
				156, 8, 1, 155, 8, 1, 156, 8, 1, 157,
				8, 1, 158, 8, 0, 1, 159, 8, 0, 1,
				158, 8, 0, 0, 1, 159, 8, 0, 0, 1,
				160, 8, 1, 161, 8, 1, 160, 8, 1, 161,
				8, 1, 162, 8, 0, 1, 163, 8, 0, 1,
				162, 8, 0, 0, 1, 163, 8, 0, 0, 1,
				164, 8, 1, 165, 8, 1, 164, 8, 1, 165,
				8, 13, 166, 8, 0, 0, 13, 167, 8, 0,
				0, 13, 168, 8, 0, 0, 13, 169, 8, 0,
				0, 13, 170, 8, 0, 0, 13, 171, 8, 0,
				0, 13, 172, 8, 0, 0, 13, 173, 8, 0,
				0, 1, 174, 8, 0, 1, 175, 8, 0, 1,
				174, 8, 0, 0, 1, 175, 8, 0, 0, 1,
				176, 8, 0, 1, 177, 8, 0, 1, 176, 8,
				0, 0, 1, 177, 8, 0, 0, 1, 178, 8,
				0, 1, 179, 8, 0, 1, 178, 8, 0, 0,
				1, 179, 8, 0, 0, 1, 180, 8, 1, 181,
				8, 1, 180, 8, 1, 181, 8, 1, 182, 8,
				0, 1, 183, 8, 0, 1, 182, 8, 0, 0,
				1, 183, 8, 0, 0, 1, 184, 8, 1, 185,
				8, 1, 186, 8, 1, 185, 8, 1, 186, 8,
				1, 187, 8, 1, 188, 8, 0, 1, 189, 8,
				0, 1, 188, 8, 0, 0, 1, 189, 8, 0,
				0, 1, 190, 8, 1, 191, 8, 1, 190, 8,
				1, 191, 8, 1, 192, 8, 0, 1, 193, 8,
				0, 1, 192, 8, 0, 0, 1, 193, 8, 0,
				0, 1, 194, 8, 1, 195, 8, 1, 194, 8,
				1, 195, 8, 1, 196, 8, 0, 0, 1, 197,
				8, 0, 0, 1, 198, 8, 0, 1, 199, 8,
				0, 1, 198, 8, 0, 0, 1, 199, 8, 0,
				0, 1, 200, 8, 0, 1, 201, 8, 0, 1,
				200, 8, 0, 0, 1, 201, 8, 0, 0, 1,
				202, 8, 0, 1, 203, 8, 0, 1, 202, 8,
				0, 0, 1, 203, 8, 0, 0, 1, 204, 8,
				1, 205, 8, 1, 204, 8, 1, 205, 8, 1,
				206, 8, 0, 1, 207, 8, 0, 1, 206, 8,
				0, 0, 1, 207, 8, 0, 0, 1, 208, 8,
				1, 209, 8, 1, 208, 8, 1, 209, 8, 1,
				210, 8, 0, 1, 211, 8, 0, 1, 210, 8,
				0, 0, 1, 211, 8, 0, 0, 1, 212, 8,
				1, 213, 8, 1, 212, 8, 1, 213, 8, 1,
				214, 8, 0, 1, 215, 8, 0, 1, 214, 8,
				0, 0, 1, 215, 8, 0, 0, 1, 216, 8,
				1, 217, 8, 1, 216, 8, 1, 217, 8, 1,
				218, 8, 0, 0, 1, 219, 8, 0, 0, 13,
				220, 8, 13, 221, 8, 13, 222, 8, 13, 223,
				8, 13, 224, 8, 13, 225, 8, 13, 226, 8,
				13, 227, 8, 13, 228, 8, 13, 229, 8, 13,
				230, 8, 13, 231, 8, 13, 232, 8, 13, 233,
				8, 13, 234, 8, 13, 235, 8, 1, 236, 8,
				1, 237, 8, 1, 238, 8, 1, 239, 8, 1,
				240, 8, 1, 241, 8, 1, 242, 8, 1, 243,
				8, 1, 244, 8, 1, 245, 8, 1, 246, 8,
				1, 247, 8, 1, 248, 8, 1, 249, 8, 1,
				250, 8, 1, 251, 8, 1, 252, 8, 129, 252,
				8, 128, 128, 128, 128, 1, 253, 8, 129, 253,
				8, 1, 254, 8, 129, 254, 8, 128, 128, 128,
				128, 1, 255, 8, 129, 255, 8, 128, 128, 128,
				128, 1, 128, 9, 129, 128, 9, 128, 128, 128,
				128, 1, 129, 9, 129, 129, 9, 128, 128, 128,
				128, 1, 130, 9, 0, 0, 2, 131, 9, 6,
				0, 1, 130, 9, 0, 0, 2, 131, 9, 6,
				0, 0, 1, 132, 9, 0, 1, 133, 9, 0,
				1, 134, 9, 0, 1, 135, 9, 0, 1, 136,
				9, 0, 1, 137, 9, 1, 138, 9, 1, 139,
				9, 0, 1, 140, 9, 0, 1, 141, 9, 1,
				142, 9, 1, 143, 9, 0, 1, 144, 9, 0,
				1, 145, 9, 0, 1, 146, 9, 0, 1, 147,
				9, 0, 1, 148, 9, 0, 1, 149, 9, 0,
				1, 150, 9, 0, 0, 1, 151, 9, 0, 0,
				1, 152, 9, 0, 0, 1, 153, 9, 0, 1,
				161, 7, 0, 0, 1, 231, 6, 0, 0, 1,
				154, 9, 0, 1, 155, 9, 0, 0, 1, 156,
				9, 0, 0, 1, 39, 0, 0, 0, 0, 1,
				40, 0, 0, 0, 0, 1, 157, 9, 1, 158,
				9, 129, 158, 9, 128, 1, 159, 9, 0, 0,
				1, 160, 9, 129, 160, 9, 128, 1, 161, 9,
				0, 0, 1, 162, 9, 129, 162, 9, 1, 163,
				9, 1, 164, 9, 129, 164, 9, 1, 165, 9,
				1, 166, 9, 129, 166, 9, 128, 1, 167, 9,
				129, 167, 9, 128, 1, 168, 9, 129, 168, 9,
				128, 1, 124, 0, 129, 124, 128, 128, 128, 128,
				1, 169, 9, 37, 169, 9, 129, 169, 9, 165,
				169, 9, 129, 169, 9, 165, 169, 9, 1, 26,
				37, 26, 129, 26, 165, 26, 129, 26, 165, 26,
				1, 170, 9, 1, 171, 9, 129, 170, 9, 129,
				171, 9, 129, 170, 9, 129, 171, 9, 1, 172,
				9, 37, 172, 9, 129, 172, 9, 165, 172, 9,
				129, 172, 9, 165, 172, 9, 1, 173, 9, 1,
				174, 9, 0, 1, 175, 9, 0, 1, 176, 9,
				1, 177, 9, 0, 1, 178, 9, 0, 1, 179,
				9, 1, 180, 9, 1, 181, 9, 1, 182, 9,
				1, 183, 9, 0, 0, 0, 0, 34, 184, 9,
				24, 0, 0, 34, 185, 9, 25, 0, 0, 34,
				186, 9, 20, 0, 0, 34, 187, 9, 21, 0,
				0, 1, 188, 9, 37, 188, 9, 129, 188, 9,
				165, 188, 9, 129, 188, 9, 165, 188, 9, 1,
				189, 9, 129, 189, 9, 128, 1, 190, 9, 1,
				191, 9, 129, 190, 9, 129, 191, 9, 129, 190,
				9, 129, 191, 9, 1, 192, 9, 0, 1, 193,
				9, 0, 1, 194, 9, 0, 0, 1, 195, 9,
				0, 0, 1, 196, 9, 0, 0, 1, 197, 9,
				0, 0, 1, 198, 9, 1, 199, 9, 1, 200,
				9, 1, 201, 9, 1, 202, 9, 1, 203, 9,
				1, 204, 9, 1, 205, 9, 1, 206, 9, 1,
				207, 9, 1, 208, 9, 1, 209, 9, 0, 1,
				210, 9, 0, 1, 211, 9, 1, 212, 9, 0,
				1, 213, 9, 0, 1, 214, 9, 1, 215, 9,
				1, 216, 9, 1, 217, 9, 34, 218, 9, 22,
				0, 0, 34, 219, 9, 23, 0, 0, 34, 220,
				9, 18, 0, 0, 34, 221, 9, 19, 0, 0,
				1, 222, 9, 129, 222, 9, 128, 1, 223, 9,
				129, 223, 9, 1, 224, 9, 129, 224, 9, 128,
				1, 225, 9, 0, 0, 1, 226, 9, 0, 1,
				227, 9, 0, 33, 228, 9, 8, 161, 228, 9,
				9, 128, 128, 128, 128, 1, 229, 9, 1, 230,
				9, 0, 0, 0, 1, 231, 9, 0, 0, 0,
				129, 222, 6, 128, 129, 226, 6, 128, 129, 213,
				6, 128, 1, 232, 9, 0, 0, 1, 233, 9,
				0, 0, 1, 234, 9, 1, 235, 9, 1, 236,
				9, 0, 0, 1, 237, 9, 0, 0, 1, 238,
				9, 1, 239, 9, 1, 240, 9, 0, 0, 1,
				241, 9, 0, 0, 1, 242, 9, 1, 243, 9,
				1, 244, 9, 0, 0, 0, 1, 245, 9, 0,
				0, 0, 1, 246, 9, 0, 0, 0, 1, 247,
				9, 0, 0, 0, 1, 248, 9, 1, 249, 9,
				129, 248, 9, 129, 249, 9, 1, 250, 9, 1,
				251, 9, 129, 250, 9, 129, 251, 9, 1, 252,
				9, 129, 252, 9, 1, 253, 9, 129, 253, 9,
				6, 254, 9, 6, 0, 0, 6, 255, 9, 6,
				0, 0, 1, 128, 10, 1, 129, 10, 1, 130,
				10, 0, 0, 0, 1, 131, 10, 0, 0, 0,
				1, 132, 10, 0, 1, 133, 10, 0, 1, 134,
				10, 0, 0, 0, 1, 135, 10, 0, 0, 0,
				1, 136, 10, 0, 1, 137, 10, 0, 1, 138,
				10, 0, 0, 1, 139, 10, 0, 0, 1, 140,
				10, 0, 0, 1, 141, 10, 0, 0, 1, 142,
				10, 0, 0, 1, 143, 10, 0, 0, 1, 144,
				10, 0, 0, 0, 1, 145, 10, 0, 0, 0,
				1, 146, 10, 0, 1, 147, 10, 0, 1, 148,
				10, 0, 0, 0, 1, 149, 10, 0, 0, 0,
				1, 150, 10, 0, 1, 151, 10, 0, 1, 152,
				10, 1, 153, 10, 129, 153, 10, 128, 128, 128,
				128, 1, 154, 10, 129, 154, 10, 128, 128, 128,
				128, 1, 155, 10, 129, 155, 10, 1, 156, 10,
				0, 1, 157, 10, 1, 158, 10, 1, 159, 10,
				1, 160, 10, 1, 161, 10, 1, 162, 10, 1,
				163, 10, 1, 164, 10, 1, 165, 10, 1, 166,
				10, 1, 167, 10, 0, 0, 0, 1, 168, 10,
				0, 1, 169, 10, 1, 170, 10, 1, 171, 10,
				1, 172, 10, 1, 173, 10, 1, 174, 10, 34,
				175, 10, 10, 34, 176, 10, 11, 34, 177, 10,
				12, 34, 178, 10, 13, 34, 179, 10, 14, 34,
				180, 10, 15, 34, 181, 10, 16, 34, 182, 10,
				17, 1, 183, 10, 0, 1, 184, 10, 0, 1,
				185, 10, 0, 1, 186, 10, 0, 1, 187, 10,
				0, 1, 188, 10, 0, 1, 189, 10, 0, 1,
				190, 10, 0, 1, 191, 10, 0, 1, 192, 10,
				0, 1, 193, 10, 0, 1, 194, 10, 0, 1,
				195, 10, 0, 1, 196, 10, 1, 197, 10, 1,
				171, 10, 0, 1, 172, 10, 0, 1, 173, 10,
				0, 1, 174, 10, 0, 1, 198, 10, 0, 1,
				199, 10, 0, 1, 200, 10, 0, 1, 201, 10,
				0, 1, 202, 10, 0, 1, 203, 10, 0, 1,
				204, 10, 0, 1, 205, 10, 0, 1, 206, 10,
				1, 207, 10, 1, 208, 10, 1, 209, 10, 1,
				210, 10, 1, 211, 10, 1, 212, 10, 1, 213,
				10, 1, 214, 10, 1, 215, 10, 1, 216, 10,
				1, 217, 10, 1, 218, 10, 1, 219, 10, 1,
				220, 10, 1, 146, 9, 0, 1, 221, 10, 0,
				1, 222, 10, 0, 1, 223, 10, 1, 224, 10,
				1, 225, 10, 1, 226, 10, 1, 227, 10, 1,
				228, 10, 1, 229, 10, 1, 230, 10, 1, 231,
				10, 1, 232, 10, 1, 233, 10, 1, 234, 10,
				1, 235, 10, 1, 236, 10, 1, 237, 10, 1,
				238, 10, 1, 239, 10, 1, 240, 10, 1, 241,
				10, 1, 242, 10, 1, 243, 10, 1, 244, 10,
				1, 245, 10, 1, 246, 10, 1, 248, 10, 1,
				249, 10, 1, 250, 10, 1, 251, 10, 1, 252,
				10, 35, 253, 10, 21, 35, 253, 10, 37, 35,
				253, 10, 53, 1, 254, 10, 1, 255, 10, 1,
				128, 11, 35, 129, 11, 21, 35, 129, 11, 37,
				35, 129, 11, 53, 1, 130, 11, 1, 211, 3,
				1, 131, 11, 0, 0, 0, 1, 201, 6, 1,
				132, 11, 1, 133, 11, 1, 134, 11, 1, 135,
				11, 1, 136, 11, 1, 137, 11, 1, 138, 11,
				1, 139, 11, 1, 140, 11, 1, 141, 11, 1,
				142, 11, 1, 143, 11, 1, 144, 11, 1, 145,
				11, 1, 146, 11, 1, 147, 11, 1, 148, 11,
				1, 149, 11, 1, 150, 11, 1, 151, 11, 1,
				152, 11, 1, 153, 11, 1, 154, 11, 1, 155,
				11, 1, 156, 11, 1, 157, 11, 1, 158, 11,
				1, 150, 11, 1, 160, 11, 1, 161, 11, 1,
				162, 11, 1, 163, 11, 1, 164, 11, 1, 165,
				11, 1, 166, 11, 1, 167, 11, 1, 168, 11,
				1, 169, 11, 1, 170, 11, 1, 246, 10, 1,
				172, 11, 1, 173, 11, 1, 174, 11, 1, 175,
				11, 1, 176, 11, 1, 0, 0, 1, 177, 11,
				1, 0, 1, 178, 11, 1, 179, 11, 1, 0,
				0, 0, 0, 0, 1, 180, 11, 1, 181, 11,
				1, 182, 11, 1, 183, 11, 1, 184, 11, 1,
				185, 11, 1, 186, 11, 1, 187, 11, 1, 188,
				11, 1, 189, 11, 1, 190, 11, 1, 191, 11,
				1, 192, 11, 1, 193, 11, 1, 194, 11, 1,
				195, 11, 1, 58, 0, 1, 233, 6, 1, 132,
				11, 1, 196, 11, 1, 197, 11, 1, 198, 11,
				1, 199, 11, 1, 200, 11, 1, 201, 11, 1,
				198, 7, 0, 1, 199, 7, 0, 1, 200, 7,
				0, 1, 203, 7, 0, 3, 202, 11, 16, 3,
				202, 11, 32, 3, 202, 11, 64, 3, 203, 11,
				16, 3, 203, 11, 32, 3, 203, 11, 64, 1,
				204, 11, 0, 0, 1, 205, 11, 1, 206, 11,
				1, 207, 11, 0, 0, 1, 208, 11, 34, 209,
				11, 26, 0, 0, 34, 210, 11, 27, 1, 211,
				11, 6, 212, 11, 6, 0, 1, 212, 11, 6,
				213, 11, 6, 0, 0, 1, 214, 11, 0, 0,
				1, 215, 11, 0, 0, 1, 216, 11, 0, 0,
				1, 217, 11, 0, 0, 1, 218, 11, 0, 0,
				1, 219, 11, 0, 0, 1, 220, 11, 0, 0,
				1, 221, 11, 0, 0, 6, 222, 11, 6, 0,
				1, 222, 11, 6, 223, 11, 6, 0, 0, 1,
				224, 11, 1, 225, 11, 1, 226, 11, 0, 1,
				227, 11, 1, 228, 11, 0, 2, 229, 11, 6,
				0, 1, 230, 11, 1, 231, 11, 0, 0, 1,
				232, 11, 0, 0, 1, 233, 11, 0, 0, 1,
				234, 11, 0, 0, 1, 235, 11, 0, 0, 1,
				236, 11, 0, 0, 1, 237, 11, 0, 1, 238,
				11, 0, 6, 239, 11, 6, 0, 1, 239, 11,
				6, 240, 11, 6, 0, 0, 2, 241, 11, 6,
				0, 1, 242, 11, 0, 0, 1, 243, 11, 0,
				0, 1, 244, 11, 0, 0, 1, 245, 11, 1,
				246, 11, 0, 0, 1, 247, 11, 0, 0, 1,
				248, 11, 1, 249, 11, 1, 250, 11, 0, 0,
				1, 251, 11, 0, 0, 1, 252, 11, 1, 253,
				11, 1, 254, 11, 0, 0, 1, 255, 11, 0,
				0, 1, 128, 12, 0, 0, 1, 129, 12, 0,
				0, 1, 130, 12, 0, 0, 1, 131, 12, 0,
				0, 1, 132, 12, 0, 0, 1, 133, 12, 0,
				0, 1, 134, 12, 0, 0, 1, 135, 12, 0,
				0, 1, 136, 12, 0, 0, 1, 137, 12, 0,
				0, 1, 138, 12, 1, 139, 12, 1, 140, 12,
				1, 141, 12, 1, 142, 12, 1, 143, 12, 1,
				144, 12, 0, 0, 1, 145, 12, 0, 0, 1,
				146, 12, 0, 0, 1, 147, 12, 0, 0, 1,
				148, 12, 0, 0, 1, 149, 12, 0, 0, 1,
				150, 12, 1, 151, 12, 1, 152, 12, 1, 153,
				12, 1, 154, 12, 1, 155, 12, 6, 156, 12,
				6, 0, 0, 1, 157, 12, 1, 158, 12, 0,
				0, 1, 159, 12, 1, 160, 12, 0, 0, 1,
				161, 12, 1, 162, 12, 0, 0, 1, 163, 12,
				1, 164, 12, 0, 0, 1, 165, 12, 1, 166,
				12, 0, 0, 0, 37, 167, 12, 0, 0, 0,
				1, 168, 12, 0, 0, 1, 169, 12, 1, 170,
				12, 0, 0, 1, 171, 12, 1, 172, 12, 0,
				0, 1, 173, 12, 1, 174, 12, 0, 0, 1,
				175, 12, 1, 176, 12, 0, 0, 1, 177, 12,
				1, 178, 12, 0, 0, 1, 179, 12, 1, 180,
				12, 0, 0, 1, 181, 12, 1, 182, 12, 0,
				0, 1, 183, 12, 1, 184, 12, 1, 185, 12,
				1, 186, 12, 1, 187, 12, 1, 188, 12, 129,
				228, 3, 1, 189, 12, 1, 190, 12, 1, 191,
				12, 1, 192, 12, 1, 193, 12, 1, 194, 12,
				1, 195, 12, 1, 196, 12, 1, 197, 12, 1,
				198, 12, 1, 199, 12, 1, 200, 12, 1, 201,
				12, 1, 202, 12, 1, 203, 12, 1, 204, 12,
				1, 187, 12, 1, 188, 12, 1, 205, 12, 0,
				0, 1, 206, 12, 1, 207, 12, 1, 208, 12,
				1, 209, 12, 0, 1, 210, 12, 0, 1, 211,
				12, 1, 212, 12, 1, 141, 6, 0, 1, 145,
				6, 0, 1, 213, 12, 0, 1, 147, 6, 0,
				1, 0, 0, 0, 0, 0, 0, 1, 214, 12,
				129, 228, 3, 1, 189, 12, 1, 190, 12, 1,
				191, 12, 1, 192, 12, 1, 193, 12, 1, 194,
				12, 1, 195, 12, 129, 19, 129, 20, 129, 19,
				129, 20, 1, 215, 12, 1, 216, 12, 1, 217,
				12, 1, 218, 12, 129, 62, 129, 63, 129, 64,
				129, 65, 129, 66, 129, 67, 129, 68, 129, 69,
				129, 46, 1, 48, 1, 49, 129, 81, 129, 15,
				129, 16, 129, 17, 129, 50, 1, 158, 5, 1,
				48, 1, 49, 1, 211, 12, 1, 212, 12, 162,
				84, 28, 162, 85, 29, 1, 182, 6, 1, 183,
				6, 1, 185, 6, 1, 186, 6, 129, 98, 1,
				193, 6, 1, 194, 6, 1, 196, 6, 1, 197,
				6, 129, 56, 129, 57, 1, 58, 1, 233, 6,
				1, 236, 6, 1, 239, 6, 1, 129, 7, 1,
				160, 7, 129, 119, 129, 120, 129, 121, 129, 122,
				129, 123, 1, 178, 7, 1, 179, 7, 1, 184,
				7, 1, 186, 7, 1, 188, 7, 1, 0, 0,
				0, 0, 1, 219, 12, 1, 220, 12, 1, 221,
				12, 1, 222, 12, 1, 223, 12, 1, 224, 12,
				1, 225, 12, 1, 0, 1, 226, 12, 1, 227,
				12, 1, 0, 0, 1, 44, 1, 45, 1, 211,
				7, 1, 214, 7, 1, 228, 12, 1, 229, 12,
				1, 230, 12, 1, 231, 12, 1, 219, 7, 1,
				220, 7, 1, 221, 7, 1, 222, 7, 1, 0,
				0, 0, 0, 0, 1, 232, 12, 1, 233, 12,
				1, 234, 12, 1, 235, 12, 1, 236, 12, 1,
				0, 0, 0, 0, 1, 237, 12, 1, 238, 12,
				1, 239, 12, 1, 240, 12, 1, 136, 8, 1,
				137, 8, 1, 140, 8, 1, 141, 8, 1, 0,
				0, 1, 148, 8, 1, 149, 8, 1, 152, 8,
				1, 153, 8, 1, 158, 8, 1, 159, 8, 1,
				162, 8, 1, 163, 8, 1, 166, 8, 1, 167,
				8, 1, 170, 8, 1, 171, 8, 1, 241, 12,
				1, 178, 8, 1, 179, 8, 1, 182, 8, 1,
				183, 8, 1, 188, 8, 1, 189, 8, 1, 192,
				8, 1, 193, 8, 1, 0, 0, 1, 242, 12,
				1, 243, 12, 1, 202, 8, 1, 203, 8, 1,
				206, 8, 1, 207, 8, 1, 210, 8, 1, 211,
				8, 1, 214, 8, 1, 215, 8, 1, 0, 1,
				244, 12, 1, 245, 12, 1, 220, 8, 1, 222,
				8, 1, 246, 12, 1, 247, 12, 1, 224, 8,
				1, 226, 8, 1, 248, 12, 1, 249, 12, 1,
				250, 12, 1, 251, 12, 1, 252, 12, 1, 253,
				12, 1, 0, 0, 0, 1, 254, 12, 1, 255,
				12, 1, 128, 13, 1, 129, 13, 1, 130, 13,
				1, 131, 13, 1, 132, 13, 1, 133, 13, 1,
				0, 0, 0, 1, 134, 13, 1, 135, 13, 1,
				136, 13, 1, 137, 13, 1, 138, 13, 1, 139,
				13, 1, 140, 13, 1, 141, 13, 1, 0, 0,
				0, 1, 155, 9, 1, 142, 13, 34, 184, 9,
				31, 34, 186, 9, 30, 1, 196, 9, 1, 197,
				9, 1, 143, 13, 1, 144, 13, 1, 145, 13,
				1, 146, 13, 1, 147, 13, 1, 148, 13, 1,
				149, 13, 1, 0, 0, 1, 150, 13, 3, 0,
				16, 3, 0, 32, 3, 0, 64, 3, 0, 16,
				3, 0, 32, 3, 0, 64, 3, 151, 13, 16,
				3, 151, 13, 32, 3, 151, 13, 64, 3, 152,
				13, 16, 3, 152, 13, 32, 3, 152, 13, 64,
				3, 153, 13, 16, 3, 153, 13, 32, 3, 153,
				13, 64, 1, 154, 13, 1, 155, 13, 1, 156,
				13, 1, 157, 13, 1, 158, 13, 1, 159, 13,
				1, 160, 13, 1, 161, 13, 0, 1, 162, 13,
				0, 1, 163, 13, 0, 1, 164, 13, 0, 1,
				165, 13, 0, 1, 166, 13, 0, 1, 167, 13,
				0, 1, 168, 13, 0, 1, 169, 13, 0, 1,
				170, 13, 0, 1, 171, 13, 2, 231, 7, 6,
				0, 1, 172, 13, 0, 1, 173, 13, 0, 1,
				174, 13, 0, 1, 175, 13, 0, 1, 176, 13,
				0, 1, 177, 13, 0, 1, 196, 8, 0, 1,
				197, 8, 0, 1, 178, 13, 0, 1, 179, 13,
				0, 1, 180, 13, 0, 1, 181, 13, 0, 1,
				182, 13, 0, 1, 183, 13, 0, 1, 184, 13,
				0, 1, 185, 13, 0, 1, 186, 13, 0, 1,
				187, 13, 0, 1, 188, 13, 0, 1, 189, 13,
				0, 1, 190, 13, 0, 1, 191, 13, 0, 1,
				192, 13, 0, 1, 193, 13, 0
			};
		}
	}
	[Flags]
	internal enum InstrOpInfoFlags : ushort
	{
		None = 0,
		MemSize_Nothing = 1,
		ShowNoMemSize_ForceSize = 2,
		ShowMinMemSize_ForceSize = 4,
		BranchSizeInfoShift = 3,
		BranchSizeInfoMask = 1,
		BranchSizeInfo_Short = 8,
		SizeOverrideMask = 3,
		OpSizeShift = 4,
		OpSize16 = 0x10,
		OpSize32 = 0x20,
		OpSize64 = 0x30,
		AddrSizeShift = 6,
		AddrSize16 = 0x40,
		AddrSize32 = 0x80,
		AddrSize64 = 0xC0,
		IgnoreOpMask = 0x100,
		FarMnemonic = 0x200,
		JccNotTaken = 0x400,
		JccTaken = 0x800,
		BndPrefix = 0x1000,
		IgnoreIndexReg = 0x2000,
		IgnoreSegmentPrefix = 0x4000,
		MnemonicIsDirective = 0x8000
	}
	internal static class MemorySizes
	{
		public readonly struct Info
		{
			public readonly FormatterString[] keywords;

			public readonly FormatterString bcstTo;

			public Info(FormatterString[] keywords, FormatterString bcstTo)
			{
				this.keywords = keywords;
				this.bcstTo = bcstTo;
			}
		}

		public static readonly Info[] AllMemorySizes = GetMemorySizes();

		private static Info[] GetMemorySizes()
		{
			FormatterString formatterString = new FormatterString("byte");
			FormatterString formatterString2 = new FormatterString("ptr");
			FormatterString[] array = new FormatterString[2] { formatterString, formatterString2 };
			FormatterString formatterString3 = new FormatterString("dword");
			FormatterString[] array2 = new FormatterString[2] { formatterString3, formatterString2 };
			FormatterString formatterString4 = new FormatterString("fpuenv14");
			FormatterString[] array3 = new FormatterString[2] { formatterString4, formatterString2 };
			FormatterString formatterString5 = new FormatterString("fpuenv28");
			FormatterString[] array4 = new FormatterString[2] { formatterString5, formatterString2 };
			FormatterString formatterString6 = new FormatterString("fpustate108");
			FormatterString[] array5 = new FormatterString[2] { formatterString6, formatterString2 };
			FormatterString formatterString7 = new FormatterString("fpustate94");
			FormatterString[] array6 = new FormatterString[2] { formatterString7, formatterString2 };
			FormatterString formatterString8 = new FormatterString("fword");
			FormatterString[] array7 = new FormatterString[2] { formatterString8, formatterString2 };
			FormatterString formatterString9 = new FormatterString("qword");
			FormatterString[] array8 = new FormatterString[2] { formatterString9, formatterString2 };
			FormatterString formatterString10 = new FormatterString("tbyte");
			FormatterString[] array9 = new FormatterString[2] { formatterString10, formatterString2 };
			FormatterString formatterString11 = new FormatterString("word");
			FormatterString[] array10 = new FormatterString[2] { formatterString11, formatterString2 };
			FormatterString formatterString12 = new FormatterString("xmmword");
			FormatterString[] array11 = new FormatterString[2] { formatterString12, formatterString2 };
			FormatterString formatterString13 = new FormatterString("ymmword");
			FormatterString[] array12 = new FormatterString[2] { formatterString13, formatterString2 };
			FormatterString formatterString14 = new FormatterString("zmmword");
			FormatterString[] array13 = new FormatterString[2] { formatterString14, formatterString2 };
			FormatterString formatterString15 = new FormatterString("mem384");
			FormatterString[] array14 = new FormatterString[2] { formatterString15, formatterString2 };
			FormatterString formatterString16 = new FormatterString("");
			FormatterString formatterString17 = new FormatterString("1to2");
			FormatterString formatterString18 = new FormatterString("1to4");
			FormatterString formatterString19 = new FormatterString("1to8");
			FormatterString formatterString20 = new FormatterString("1to16");
			FormatterString formatterString21 = new FormatterString("1to32");
			Info[] array15 = new Info[162];
			ReadOnlySpan<byte> readOnlySpan = new byte[162]
			{
				0, 1, 10, 2, 8, 8, 11, 12, 13, 1,
				10, 2, 8, 11, 12, 13, 2, 7, 9, 10,
				2, 8, 2, 8, 8, 11, 7, 7, 10, 2,
				8, 9, 11, 10, 3, 4, 6, 5, 0, 0,
				0, 0, 9, 13, 0, 9, 14, 13, 10, 10,
				2, 2, 2, 2, 2, 2, 8, 8, 8, 8,
				8, 8, 8, 8, 11, 11, 11, 11, 11, 11,
				11, 11, 11, 11, 11, 11, 11, 11, 11, 12,
				12, 12, 12, 12, 12, 12, 12, 12, 12, 12,
				12, 12, 12, 12, 12, 12, 12, 13, 13, 13,
				13, 13, 13, 13, 13, 13, 13, 13, 13, 13,
				13, 13, 42, 34, 34, 74, 34, 106, 106, 66,
				66, 40, 40, 40, 106, 66, 40, 66, 40, 40,
				66, 66, 138, 138, 98, 98, 72, 72, 72, 138,
				98, 72, 98, 72, 72, 98, 98, 170, 170, 130,
				130, 104, 104, 104, 170, 130, 104, 130, 130, 104,
				104, 130
			};
			for (int i = 0; i < array15.Length; i++)
			{
				byte b = readOnlySpan[i];
				array15[i] = new Info((b & 0x1F) switch
				{
					0 => Array2.Empty<FormatterString>(), 
					1 => array, 
					2 => array2, 
					3 => array3, 
					4 => array4, 
					5 => array5, 
					6 => array6, 
					7 => array7, 
					8 => array8, 
					9 => array9, 
					10 => array10, 
					11 => array11, 
					12 => array12, 
					13 => array13, 
					14 => array14, 
					_ => throw new InvalidOperationException(), 
				}, (b >> 5) switch
				{
					0 => formatterString16, 
					1 => formatterString17, 
					2 => formatterString18, 
					3 => formatterString19, 
					4 => formatterString20, 
					5 => formatterString21, 
					_ => throw new InvalidOperationException(), 
				});
			}
			return array15;
		}
	}
	internal static class Registers
	{
		public const Register Register_ST = Register.DontUse0;

		public static readonly FormatterString[] AllRegisters = RegistersTable.GetRegisters();
	}
	internal enum SizeOverride
	{
		None,
		Size16,
		Size32,
		Size64
	}
}
namespace Iced.Intel.InstructionInfoInternal
{
	internal enum CpuidFeatureInternal
	{
		INTEL8086,
		INTEL8086_ONLY,
		INTEL186,
		INTEL286,
		INTEL286_ONLY,
		INTEL386,
		INTEL386_ONLY,
		INTEL386_A0_ONLY,
		INTEL486,
		INTEL486_A_ONLY,
		UMOV,
		IA64,
		X64,
		ADX,
		AES,
		AVX,
		AES_and_AVX,
		AVX2,
		AVX512_4FMAPS,
		AVX512_4VNNIW,
		AVX512_BITALG,
		AVX512_IFMA,
		AVX512_VBMI,
		AVX512_VBMI2,
		AVX512_VNNI,
		AVX512_VPOPCNTDQ,
		AVX512BW,
		AVX512CD,
		AVX512DQ,
		AVX512ER,
		AVX512F,
		AVX512F_and_AVX512_BF16,
		AVX512F_and_AVX512_VP2INTERSECT,
		AVX512PF,
		AVX512VL_and_AVX512_BF16,
		AVX512VL_and_AVX512_BITALG,
		AVX512VL_and_AVX512_IFMA,
		AVX512VL_and_AVX512_VBMI,
		AVX512VL_and_AVX512_VBMI2,
		AVX512VL_and_AVX512_VNNI,
		AVX512VL_and_AVX512_VP2INTERSECT,
		AVX512VL_and_AVX512_VPOPCNTDQ,
		AVX512VL_and_AVX512BW,
		AVX512VL_and_AVX512CD,
		AVX512VL_and_AVX512DQ,
		AVX512VL_and_AVX512F,
		BMI1,
		BMI2,
		CET_IBT,
		CET_SS,
		CL1INVMB,
		CLDEMOTE,
		CLFLUSHOPT,
		CLFSH,
		CLWB,
		CLZERO,
		CMOV,
		CMPXCHG16B,
		CPUID,
		CX8,
		D3NOW,
		D3NOWEXT,
		OSS,
		ENQCMD,
		F16C,
		FMA,
		FMA4,
		FPU,
		FPU_and_CMOV,
		FPU287,
		FPU287XL_ONLY,
		FPU387,
		FPU387SL_ONLY,
		FSGSBASE,
		FXSR,
		CYRIX_D3NOW,
		GFNI,
		AVX_and_GFNI,
		AVX512F_and_GFNI,
		AVX512VL_and_GFNI,
		HLE_or_RTM,
		INVPCID,
		LWP,
		LZCNT,
		MCOMMIT,
		MMX,
		MONITOR,
		MONITORX,
		MOVBE,
		MOVDIR64B,
		MOVDIRI,
		MPX,
		MSR,
		MULTIBYTENOP,
		PADLOCK_ACE,
		PADLOCK_PHE,
		PADLOCK_PMM,
		PADLOCK_RNG,
		PAUSE,
		PCLMULQDQ,
		PCLMULQDQ_and_AVX,
		PCOMMIT,
		PCONFIG,
		PKU,
		POPCNT,
		PREFETCHW,
		PREFETCHWT1,
		PTWRITE,
		RDPID,
		RDPMC,
		RDPRU,
		RDRAND,
		RDSEED,
		RDTSCP,
		RTM,
		SEP,
		SGX1,
		SHA,
		SKINIT_or_SVM,
		SMAP,
		SMX,
		SSE,
		SSE2,
		SSE3,
		FPU_and_SSE3,
		SSE4_1,
		SSE4_2,
		SSE4A,
		SSSE3,
		SVM,
		SEV_ES,
		SYSCALL,
		TBM,
		TSC,
		VAES,
		AVX512F_and_VAES,
		AVX512VL_and_VAES,
		VMX,
		VMX_and_INVEPT,
		VMX_and_INVVPID,
		VPCLMULQDQ,
		AVX512F_and_VPCLMULQDQ,
		AVX512VL_and_VPCLMULQDQ,
		WAITPKG,
		WBNOINVD,
		XOP,
		XSAVE,
		XSAVEC,
		XSAVEOPT,
		XSAVES,
		SEV_SNP,
		SERIALIZE,
		TSXLDTRK,
		INVLPGB,
		AMX_BF16,
		AMX_TILE,
		AMX_INT8,
		CYRIX_FPU,
		CYRIX_SMM,
		CYRIX_SMINT,
		CYRIX_SMINT_0F7E,
		CYRIX_SHR,
		CYRIX_DDI,
		CYRIX_EMMI,
		CYRIX_DMI,
		CENTAUR_AIS,
		MOV_TR,
		SMM,
		TDX,
		KL,
		AESKLE,
		AESKLE_and_WIDE_KL,
		UINTR,
		HRESET,
		AVX_VNNI,
		PADLOCK_GMI,
		FRED,
		LKGS,
		AVX512_FP16,
		AVX512VL_and_AVX512_FP16,
		UDBG,
		KNC,
		PADLOCK_UNDOC,
		RMPQUERY,
		RAO_INT,
		PREFETCHITI,
		AMX_FP16,
		CMPCCXADD,
		AVX_IFMA,
		AVX_NE_CONVERT,
		AVX_VNNI_INT8,
		MSRLIST,
		WRMSRNS
	}
	internal static class CpuidFeatureInternalData
	{
		public static readonly CpuidFeature[][] ToCpuidFeatures = GetCpuidFeatures();

		private static CpuidFeature[][] GetCpuidFeatures()
		{
			ReadOnlySpan<byte> cpuidFeaturesData = GetCpuidFeaturesData();
			DataReader dataReader = new DataReader(cpuidFeaturesData);
			dataReader.Index = 25;
			CpuidFeature[][] array = new CpuidFeature[193][];
			for (int i = 0; i < array.Length; i++)
			{
				CpuidFeature[] array2 = new CpuidFeature[((cpuidFeaturesData[i / 8] >> i % 8) & 1) + 1];
				for (int j = 0; j < array2.Length; j++)
				{
					array2[j] = (CpuidFeature)dataReader.ReadByte();
				}
				array[i] = array2;
			}
			if (dataReader.CanRead)
			{
				throw new InvalidOperationException();
			}
			return array;
		}

		internal static ReadOnlySpan<byte> GetCpuidFeaturesData()
		{
			return new byte[247]
			{
				0, 0, 1, 128, 253, 63, 0, 0, 16, 224,
				0, 0, 16, 0, 0, 16, 128, 109, 0, 0,
				0, 8, 8, 0, 0, 0, 1, 2, 3, 4,
				5, 6, 7, 8, 9, 10, 11, 12, 13, 14,
				15, 14, 15, 16, 17, 18, 20, 21, 22, 23,
				24, 26, 27, 28, 29, 30, 31, 31, 19, 31,
				25, 32, 33, 19, 33, 20, 33, 21, 33, 22,
				33, 23, 33, 24, 33, 25, 33, 26, 33, 27,
				33, 28, 33, 29, 33, 31, 34, 35, 36, 37,
				38, 39, 40, 41, 42, 43, 44, 45, 46, 47,
				48, 49, 50, 51, 52, 53, 54, 55, 55, 44,
				56, 57, 58, 59, 60, 61, 62, 63, 15, 63,
				31, 63, 33, 63, 65, 67, 69, 70, 71, 72,
				73, 74, 75, 76, 77, 78, 79, 80, 81, 82,
				83, 84, 85, 86, 86, 15, 87, 88, 89, 90,
				91, 92, 93, 94, 95, 96, 97, 98, 99, 100,
				101, 102, 103, 105, 106, 107, 108, 109, 110, 55,
				110, 111, 112, 113, 114, 115, 116, 117, 118, 119,
				120, 31, 120, 33, 120, 121, 121, 66, 121, 68,
				122, 31, 122, 33, 122, 123, 124, 125, 126, 127,
				128, 129, 130, 131, 132, 133, 134, 135, 136, 137,
				138, 139, 140, 141, 142, 143, 144, 145, 146, 147,
				148, 149, 150, 150, 151, 152, 153, 154, 155, 156,
				157, 158, 33, 158, 159, 160, 161, 162, 163, 164,
				165, 166, 167, 168, 169, 170, 171
			};
		}
	}
	internal static class OpAccesses
	{
		public static readonly OpAccess[] Op1 = new OpAccess[7]
		{
			OpAccess.None,
			OpAccess.CondRead,
			OpAccess.NoMemAccess,
			OpAccess.Read,
			OpAccess.Read,
			OpAccess.ReadWrite,
			OpAccess.Write
		};

		public static readonly OpAccess[] Op2 = new OpAccess[3]
		{
			OpAccess.None,
			OpAccess.Read,
			OpAccess.ReadWrite
		};
	}
	internal static class InstrInfoConstants
	{
		internal const int OpInfo0_Count = 13;

		internal const int OpInfo1_Count = 7;

		internal const int OpInfo2_Count = 3;

		internal const int OpInfo3_Count = 2;

		internal const int OpInfo4_Count = 2;

		internal const int RflagsInfo_Count = 79;

		internal const int DefaultUsedRegisterCollCapacity = 10;

		internal const int DefaultUsedMemoryCollCapacity = 8;
	}
	[Flags]
	internal enum InfoFlags1 : uint
	{
		OpInfo0Shift = 0u,
		OpInfo0Mask = 0xFu,
		OpInfo1Shift = 4u,
		OpInfo1Mask = 7u,
		OpInfo2Shift = 7u,
		OpInfo2Mask = 3u,
		OpInfo3Shift = 9u,
		OpInfo3Mask = 1u,
		OpInfo4Shift = 0xAu,
		OpInfo4Mask = 1u,
		RflagsInfoShift = 0xDu,
		RflagsInfoMask = 0x7Fu,
		ImpliedAccessShift = 0x14u,
		ImpliedAccessMask = 0xFFu,
		IgnoresIndexVA = 0x20000000u,
		OpMaskReadWrite = 0x40000000u,
		IgnoresSegment = 0x80000000u
	}
	[Flags]
	internal enum InfoFlags2 : uint
	{
		EncodingShift = 0u,
		EncodingMask = 7u,
		SaveRestore = 0x20000u,
		StackInstruction = 0x40000u,
		Privileged = 0x80000u,
		FlowControlShift = 0x14u,
		FlowControlMask = 0xFu,
		CpuidFeatureInternalShift = 0x18u,
		CpuidFeatureInternalMask = 0xFFu
	}
	internal enum OpInfo0
	{
		None,
		CondWrite,
		CondWrite32_ReadWrite64,
		NoMemAccess,
		Read,
		ReadCondWrite,
		ReadWrite,
		Write,
		WriteVmm,
		ReadWriteVmm,
		WriteForce,
		WriteMem_ReadWriteReg,
		WriteForceP1
	}
	internal enum OpInfo1
	{
		None,
		CondRead,
		NoMemAccess,
		Read,
		ReadP3,
		ReadWrite,
		Write
	}
	internal enum OpInfo2
	{
		None,
		Read,
		ReadWrite
	}
	internal enum OpInfo3
	{
		None,
		Read
	}
	internal enum OpInfo4
	{
		None,
		Read
	}
	internal enum ImpliedAccess
	{
		None,
		Shift_Ib_MASK1FMOD9,
		Shift_Ib_MASK1FMOD11,
		Shift_Ib_MASK1F,
		Shift_Ib_MASK3F,
		Clear_rflags,
		t_push1x2,
		t_push1x4,
		t_pop1x2,
		t_pop1x4,
		t_RWal,
		t_RWax,
		t_push1x8,
		t_pop1x8,
		t_pusha2,
		t_pusha4,
		t_popa2,
		t_popa4,
		t_arpl,
		t_ins,
		t_outs,
		t_lea,
		t_gpr16,
		t_poprm2,
		t_poprm4,
		t_poprm8,
		t_Ral_Wah,
		t_Rax_Weax,
		t_RWeax,
		t_Rax_Wdx,
		t_Reax_Wedx,
		t_Rrax_Wrdx,
		t_push2x2,
		t_push2x4,
		t_Rah,
		t_Wah,
		t_movs,
		t_cmps,
		t_stos,
		t_lods,
		t_scas,
		t_Wes,
		t_Wds,
		t_CWeax,
		t_enter2,
		t_enter4,
		t_enter8,
		t_leave2,
		t_leave4,
		t_leave8,
		t_pop2x2,
		t_pop2x4,
		t_pop2x8,
		b64_t_Wss_pop5x2_f_pop3x2,
		b64_t_Wss_pop5x4_f_pop3x4,
		t_Wss_pop5x8,
		t_Ral_Wax,
		t_Wal,
		t_RWst0,
		t_Rst0,
		t_Rst0_RWst1,
		t_RCWst0,
		t_Rst1_RWst0,
		t_Rst0_Rst1,
		t_Wst0TOst7_Wmm0TOmm7,
		t_Rst0TOst7_Rmm0TOmm7,
		t_RWcx,
		t_RWecx,
		t_RWrcx,
		t_Rcx,
		t_Recx,
		t_Rrcx,
		t_Wdx_RWax,
		t_Wedx_RWeax,
		t_Wrdx_RWrax,
		t_RWax_RWdx,
		t_RWeax_RWedx,
		t_RWrax_RWrdx,
		t_push2x8,
		t_Rcr0,
		t_RWcr0,
		t_gpr16_RWcr0,
		t_RCWeax_b64_t_CRrcx_CRrdx_CRrbx_CWrcx_CWrdx_CWrbx_f_CRecx_CRedx_CRebx_CRds_CWecx_CWedx_CWebx,
		t_CWecx_CWedx_CWebx_RWeax_b64_t_CRrcx_CRrdx_CRrbx_f_CRecx_CRedx_CRebx_CRds,
		t_Rax_Recx_Redx_Rseg,
		t_Reax_Recx_Redx_Rseg,
		t_Recx_Redx_Rrax_Rseg,
		t_Reax_Recx,
		t_Recx_Weax_Wedx,
		t_Reax_Recx_Redx,
		t_Rax,
		t_Reax,
		t_Rrax,
		t_Rax_Wfs_Wgs,
		t_Reax_Wfs_Wgs,
		t_Rrax_Wfs_Wgs,
		t_Rax_Rfs_Rgs,
		t_Reax_Rfs_Rgs,
		t_Rrax_Rfs_Rgs,
		t_Reax_Wcr0_Wdr6_Wdr7_WesTOgs_Wcr2TOcr4_Wdr0TOdr3_b64_t_WraxTOr15_f_WeaxTOedi,
		t_Rax_Recx,
		t_Recx_Rrax,
		t_Weax_Wecx_Wedx,
		t_Reax_Recx_CRebx,
		t_Rax_Rseg,
		t_Reax_Rseg,
		t_Rrax_Rseg,
		t_Wecx_b64_t_Wr11,
		t_Redi_Res,
		t_Recx_Wcs_Wss_b64_t_Rr11d,
		t_Rr11d_Rrcx_Wcs_Wss,
		t_Weax_Wedx,
		t_Wesp,
		t_Recx_Redx_Wesp_Wcs_Wss,
		t_Rrcx_Rrdx_Wrsp_Wcs_Wss,
		t_zrrm,
		t_zrrrm,
		b64_t_RWxmm0TOxmm15_f_RWxmm0TOxmm7,
		b64_t_Wzmm0TOzmm15_f_Wzmm0TOzmm7,
		t_CRecx_Wecx_Wedx_Webx_RWeax,
		t_CRmem_CRsi_CReax_CRes_CWeax_CWedx_RCWecx,
		t_CRmem_CReax_CResi_CRes_CWeax_CWedx_RCWecx,
		t_CRmem_CReax_CRrsi_CRes_CWeax_CWedx_RCWrcx,
		t_CRmem_CRmem_CWmem_CRsi_CRdi_CRes_CWsi_RCWax_RCWcx,
		t_CRmem_CRmem_CWmem_CResi_CRedi_CRes_CWesi_RCWeax_RCWecx,
		t_CRmem_CRmem_CWmem_CRrsi_CRrdi_CRes_CWrsi_RCWrax_RCWrcx,
		t_Rcl_Rax,
		t_Rcl_Reax,
		t_xstore2,
		t_xstore4,
		t_xstore8,
		t_CRmem_CRmem_CRmem_CWmem_CRdx_CRbx_CRsi_CRdi_CRes_CWsi_CWdi_RCWcx,
		t_CRmem_CRmem_CRmem_CWmem_CRedx_CRebx_CResi_CRedi_CRes_CWesi_CWedi_RCWecx,
		t_CRmem_CRmem_CRmem_CWmem_CRrdx_CRrbx_CRrsi_CRrdi_CRes_CWrsi_CWrdi_RCWrcx,
		t_CRmem_CRmem_CRmem_CRmem_CWmem_CWmem_CRax_CRdx_CRbx_CRsi_CRdi_CRes_CWsi_CWdi_RCWcx,
		t_CRmem_CRmem_CRmem_CRmem_CWmem_CWmem_CReax_CRedx_CRebx_CResi_CRedi_CRes_CWesi_CWedi_RCWecx,
		t_CRmem_CRmem_CRmem_CRmem_CWmem_CWmem_CRrax_CRrdx_CRrbx_CRrsi_CRrdi_CRes_CWrsi_CWrdi_RCWrcx,
		t_RCWal,
		t_RCWax,
		t_RCWeax,
		t_Reax_Redx,
		t_gpr8,
		t_gpr32_Reax_Redx,
		t_Rmem_Rseg,
		t_RCWrax,
		t_Wss,
		t_Wfs,
		t_Wgs,
		t_CRecx_CRebx_RCWeax_RCWedx,
		t_CRrcx_CRrbx_RCWrax_RCWrdx,
		t_Wmem_RarDI_Rseg,
		t_Rxmm0,
		t_Redx,
		t_Rrdx,
		t_Wmem_Res,
		t_Reax_Redx_Wxmm0,
		t_Rrax_Rrdx_Wxmm0,
		t_Reax_Redx_Wecx,
		t_Rrax_Rrdx_Wecx,
		t_Wxmm0,
		t_Wecx,
		t_Rmem_Rds,
		t_Rrcx_Rrdx_RWrax,
		t_Rmem_Rrcx_Rseg_RWrax,
		t_RWrax,
		t_Rax_Recx_Redx_Weax,
		t_Recx_Redx_RWeax,
		t_Recx_Redx_RWrax,
		t_Rax_Recx_Redx,
		t_Recx_Redx_Rrax,
		t_Wtmm0TOtmm7,
		t_Reax_Rebx,
		t_Rebx_Weax,
		t_emmiW,
		t_emmiRW,
		t_emmiR,
		t_CRrcx_CRrdx_CRr8_CRr9_RWrax,
		t_RWxmm0TOxmm7,
		t_Reax_Rxmm0,
		t_Wxmm1_Wxmm2_RWxmm0_Wxmm4TOxmm6,
		t_RWxmm0_RWxmm1_Wxmm2TOxmm6,
		t_pop3x8,
		t_CRmem_CRmem_CWmem_CRbx_CRsi_CRdi_CRes_CWsi_RCWax_RCWcx,
		t_CRmem_CRmem_CWmem_CRebx_CResi_CRedi_CRes_CWesi_RCWeax_RCWecx,
		t_CRmem_CRmem_CWmem_CRrbx_CRrsi_CRrdi_CRes_CWrsi_RCWrax_RCWrcx,
		t_CRmem_CRmem_CRmem_CWmem_CRax_CRdx_CRbx_CRsi_CRdi_CRes_CWsi_CWdi_RCWcx,
		t_CRmem_CRmem_CRmem_CWmem_CReax_CRedx_CRebx_CResi_CRedi_CRes_CWesi_CWedi_RCWecx,
		t_CRmem_CRmem_CRmem_CWmem_CRrax_CRrdx_CRrbx_CRrsi_CRrdi_CRes_CWrsi_CWrdi_RCWrcx,
		t_gpr16_Wgs,
		t_Wrsp_Wcs_Wss_pop5x8,
		t_Rcs_Rss_Wrsp_pop5x8,
		t_Reax_Recx_Wedx_Webx,
		t_Reax_Recx_Redx_CRebx_CWedx_CWebx,
		t_memdisplm64,
		t_CRmem_CRmem_CWmem_CRsi_CRdi_CRes_CWsi_RCWcx,
		t_CRmem_CRmem_CWmem_CResi_CRedi_CRes_CWesi_RCWecx,
		t_CRmem_CRmem_CWmem_CRrsi_CRrdi_CRes_CWrsi_RCWrcx,
		t_CRmem_CRmem_Rrcx_CRrsi_CRrdi_CRes_CRds_CWrcx,
		t_CRmem_CWmem_Rrcx_CRrsi_CRrdi_CRes_CRds_CWrcx,
		t_Rdl_Rrax_Weax_Wrcx_Wrdx
	}
	internal enum RflagsInfo
	{
		None,
		C_0123,
		C_1_U_023,
		C_A,
		C_acopsz,
		C_acopszidA,
		C_acos_S_pz,
		C_c,
		C_cos_S_pz_U_a,
		C_d,
		C_i,
		C_u,
		R_0123_C_0123,
		R_0123_U_0123,
		R_a_W_ac_U_opsz,
		R_ac_W_acpsz_U_o,
		R_acopszid,
		R_acopszidA,
		R_acopszidA_W_acopszidA,
		R_acpsz,
		R_c,
		R_c_C_1_U_023,
		R_c_W_acopsz,
		R_c_W_c,
		R_c_W_c_U_o,
		R_c_W_co,
		R_cz,
		R_cz_C_1_U_023,
		R_d,
		R_d_W_acopsz,
		R_o,
		R_o_W_o,
		R_os,
		R_osz,
		R_p,
		R_p_C_1_U_023,
		R_s,
		R_u_W_c_C_aopsz,
		R_z,
		R_z_C_1_U_023,
		S_A,
		S_c,
		S_d,
		S_i,
		S_u,
		U_0123,
		U_acopsz,
		W_0123,
		W_023_C_1,
		W_12_U_03,
		W_1_U_023,
		W_acopsz,
		W_acopszdA_S_u,
		W_acopszid,
		W_acopszidA,
		W_acpsz,
		W_aopsz,
		W_c,
		W_c_C_aopsz,
		W_c_U_aops,
		W_c_U_o,
		W_co,
		W_co_U_apsz,
		W_copsz_U_a,
		W_cosz_C_ap,
		W_cpsz_U_ao,
		W_cpz_C_aos,
		W_cpz_C_aos1,
		W_cs_C_oz_U_ap,
		W_csz_C_o_U_ap,
		W_cz_C_aops,
		W_cz_U_aops,
		W_psz_C_co_U_a,
		W_psz_U_aco,
		W_sz_C_co_U_ap,
		W_z,
		W_z_C_acops,
		W_z_C_co_U_aps,
		W_z_U_acops
	}
	internal static class InstrInfoTable
	{
		internal static readonly uint[] Data = new uint[9822]
		{
			0u, 9437184u, 0u, 9437184u, 0u, 9437184u, 0u, 9437184u, 0u, 9437184u,
			417846u, 0u, 417846u, 0u, 417846u, 83886080u, 417846u, 201326592u, 417846u, 0u,
			417846u, 0u, 417846u, 83886080u, 417846u, 201326592u, 417846u, 0u, 417846u, 0u,
			417846u, 83886080u, 417846u, 201326592u, 6291460u, 262144u, 7340036u, 84148224u, 8388615u, 262144u,
			9437191u, 84148224u, 589878u, 0u, 589878u, 0u, 589878u, 83886080u, 589878u, 201326592u,
			589878u, 0u, 589878u, 0u, 589878u, 83886080u, 589878u, 201326592u, 589878u, 0u,
			589878u, 0u, 589878u, 83886080u, 589878u, 201326592u, 6291460u, 262144u, 7340036u, 84148224u,
			8388615u, 17039360u, 180278u, 0u, 180278u, 0u, 180278u, 83886080u, 180278u, 201326592u,
			180278u, 0u, 180278u, 0u, 180278u, 83886080u, 180278u, 201326592u, 180278u, 0u,
			180278u, 0u, 180278u, 83886080u, 180278u, 201326592u, 6291460u, 262144u, 7340036u, 84148224u,
			8388615u, 262144u, 9437191u, 84148224u, 180278u, 0u, 180278u, 0u, 180278u, 83886080u,
			180278u, 201326592u, 180278u, 0u, 180278u, 0u, 180278u, 83886080u, 180278u, 201326592u,
			180278u, 0u, 180278u, 0u, 180278u, 83886080u, 180278u, 201326592u, 6291460u, 262144u,
			7340036u, 84148224u, 8388615u, 262144u, 9437191u, 84148224u, 589878u, 0u, 589878u, 0u,
			589878u, 83886080u, 589878u, 201326592u, 589878u, 0u, 589878u, 0u, 589878u, 83886080u,
			589878u, 201326592u, 589878u, 0u, 589878u, 0u, 589878u, 83886080u, 589878u, 201326592u,
			10608640u, 0u, 5660726u, 0u, 5660726u, 0u, 5660726u, 83886080u, 5660726u, 201326592u,
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			185u, 3036676101u, 185u, 3036676101u, 185u, 3036676101u, 185u, 3036676101u, 185u, 3036676101u,
			185u, 3036676101u, 185u, 3036676101u, 1073741879u, 3036676101u, 1073741879u, 3036676101u, 1073741879u, 3036676101u,
			1073741879u, 3036676101u, 184u, 3036676101u, 185u, 3036676101u, 185u, 3036676101u, 185u, 3036676101u,
			185u, 3036676101u, 185u, 3036676101u, 185u, 3036676101u, 185u, 3036676101u, 185u, 3036676101u,
			0u, 3036807173u, 0u, 3036807173u, 184u, 3036676101u, 185u, 3036676101u, 185u, 3036676101u,
			185u, 3036676101u, 185u, 3036676101u, 185u, 3036676101u, 185u, 3036676101u, 185u, 3036676101u,
			185u, 3036676101u, 185u, 3036676101u, 0u, 3036807173u, 3u, 3036676101u, 3u, 3036676101u,
			1073741827u, 3036676101u, 1073741827u, 3036676101u, 3u, 3036676101u, 3u, 3036676101u, 1073741827u, 3036676101u,
			1073741827u, 3036676101u, 56u, 3036676101u, 56u, 3036676101u, 56u, 3036676101u, 56u, 3036676101u,
			1073742008u, 3036676101u, 1073742008u, 3036676101u, 0u, 3036807173u, 0u, 3036807173u, 0u, 3036807173u,
			57u, 3036676101u, 57u, 3036676101u, 58u, 3036676101u, 58u, 3036676101u, 57u, 3036676101u,
			57u, 3036676101u, 58u, 3036676101u, 58u, 3036676101u, 0u, 3036807173u, 0u, 3036807173u,
			0u, 3036807173u, 202375225u, 3036676101u, 202375225u, 3036676101u, 202375226u, 3036676101u, 202375226u, 3036676101u,
			202375225u, 3036676101u, 202375225u, 3036676101u, 202375226u, 3036676101u, 202375226u, 3036676101u, 0u, 3036807173u,
			0u, 3036807173u, 0u, 3036807173u, 696u, 3036676101u, 184u, 3036676101u, 698u, 3036676101u,
			698u, 3036676101u, 184u, 3036676101u, 184u, 3036676101u, 184u, 3036676101u, 184u, 3036676101u,
			184u, 3036676101u, 184u, 3036676101u, 184u, 3036676101u, 184u, 3036676101u, 184u, 3036676101u,
			0u, 3036807173u, 0u, 3036807173u, 184u, 3036676101u, 0u, 3053584384u, 0u, 3053584384u,
			0u, 3053584384u, 0u, 3053584384u, 0u, 3053584384u, 0u, 3053584384u, 203423744u, 1593835520u,
			204472320u, 1593835520u, 205520896u, 1593835520u, 134217728u, 1627389952u, 135266304u, 1627389952u, 136314880u, 1627389952u,
			203423744u, 1593835520u, 204472320u, 1593835520u, 205520896u, 1593835520u, 0u, 0u, 93323264u, 3221749760u,
			206569472u, 3204972544u, 207618048u, 3204972544u, 209125376u, 3070754816u, 3u, 3103784960u, 3u, 3103784960u,
			54u, 3087007744u, 54u, 3087007744u, 54u, 3087007744u, 54u, 3087007744u, 54u, 3087007744u,
			54u, 3087007744u, 54u, 3087007744u, 54u, 3087007744u, 182u, 3187671041u, 182u, 3187671041u,
			182u, 3187671041u, 182u, 3187671041u, 182u, 3187671041u, 182u, 3187671041u, 182u, 3187671041u,
			182u, 3187671041u, 182u, 3187671041u, 182u, 3187671041u, 182u, 3187671041u, 182u, 3187671041u,
			182u, 3120562177u, 55u, 3170893825u, 55u, 3170893825u, 55u, 3170893825u, 55u, 3170893825u,
			55u, 3170893825u, 55u, 3170893825u, 55u, 3170893825u, 55u, 3170893825u, 55u, 3170893825u,
			55u, 3170893825u, 55u, 3170893825u, 55u, 3170893825u, 55u, 3170893825u, 55u, 3170893825u,
			182u, 3154116609u, 182u, 3154116609u, 182u, 3154116609u, 182u, 3154116609u, 418006u, 3137339393u,
			418006u, 3137339393u, 418006u, 3137339393u, 418006u, 3137339393u, 418006u, 3137339393u, 418006u, 3137339393u,
			418006u, 3137339393u, 418006u, 3137339393u, 418006u, 3137339393u, 418006u, 3137339393u, 418006u, 3137339393u,
			418006u, 3137339393u, 418006u, 3137339393u, 418006u, 3137339393u, 418006u, 3137339393u, 418006u, 3137339393u,
			418006u, 3137339393u, 418006u, 3137339393u, 418006u, 3137339393u, 418006u, 3137339393u, 418006u, 3137339393u,
			418006u, 3137339393u, 418006u, 3137339393u, 418006u, 3137339393u, 418006u, 3137339393u, 418006u, 3137339393u,
			418006u, 3137339393u, 418006u, 3137339393u, 418006u, 3137339393u, 418006u, 3137339393u, 418006u, 3137339393u,
			418006u, 3137339393u
		};
	}
	internal static class RflagsInfoConstants
	{
		public static readonly ushort[] flagsRead = new ushort[79]
		{
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 15360, 15360, 8, 24, 255, 511, 511, 62,
			16, 16, 16, 16, 16, 16, 20, 20, 64, 64,
			1, 1, 3, 7, 32, 32, 2, 512, 4, 4,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0
		};

		public static readonly ushort[] flagsUndefined = new ushort[79]
		{
			0, 0, 13312, 0, 0, 0, 0, 0, 8, 0,
			0, 0, 0, 15360, 39, 1, 0, 0, 0, 0,
			0, 13312, 0, 0, 1, 0, 0, 13312, 0, 0,
			0, 0, 0, 0, 0, 13312, 0, 0, 0, 13312,
			0, 0, 0, 0, 0, 15360, 63, 0, 0, 9216,
			13312, 0, 0, 0, 0, 0, 0, 0, 0, 43,
			1, 0, 46, 8, 0, 9, 0, 0, 40, 40,
			0, 43, 8, 25, 40, 0, 0, 42, 59
		};

		public static readonly ushort[] flagsWritten = new ushort[79]
		{
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 24, 62, 0, 0, 511, 0,
			0, 0, 63, 16, 16, 17, 0, 0, 0, 63,
			0, 1, 0, 0, 0, 0, 0, 16, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 15360, 13312, 6144,
			2048, 63, 383, 255, 511, 62, 47, 16, 16, 16,
			16, 17, 17, 55, 23, 54, 52, 52, 18, 22,
			20, 20, 38, 38, 6, 4, 4, 4, 4
		};

		public static readonly ushort[] flagsCleared = new ushort[79]
		{
			0, 15360, 2048, 256, 63, 511, 27, 16, 19, 64,
			128, 512, 15360, 0, 0, 0, 0, 0, 0, 0,
			0, 2048, 0, 0, 0, 0, 0, 2048, 0, 0,
			0, 0, 0, 0, 0, 2048, 0, 47, 0, 2048,
			0, 0, 0, 0, 0, 0, 0, 0, 2048, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 47, 0,
			0, 0, 0, 0, 40, 0, 11, 2059, 5, 1,
			43, 0, 17, 0, 17, 0, 59, 17, 0
		};

		public static readonly ushort[] flagsSet = new ushort[79]
		{
			0, 0, 0, 0, 0, 0, 36, 0, 36, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			256, 16, 64, 128, 512, 0, 0, 0, 0, 0,
			0, 0, 512, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
			0, 0, 0, 0, 0, 0, 0, 0, 0
		};

		public static readonly ushort[] flagsModified = new ushort[79]
		{
			0, 15360, 15360, 256, 63, 511, 63, 16, 63, 64,
			128, 512, 15360, 15360, 63, 63, 0, 0, 511, 0,
			0, 15360, 63, 16, 17, 17, 0, 15360, 0, 63,
			0, 1, 0, 0, 0, 15360, 0, 63, 0, 15360,
			256, 16, 64, 128, 512, 15360, 63, 15360, 15360, 15360,
			15360, 63, 895, 255, 511, 62, 47, 16, 63, 59,
			17, 17, 63, 63, 63, 63, 63, 2111, 63, 63,
			63, 63, 63, 63, 63, 4, 63, 63, 63
		};
	}
	internal struct SimpleList<T>
	{
		public static readonly SimpleList<T> Empty = new SimpleList<T>(Array2.Empty<T>());

		public T[] Array;

		public int ValidLength;

		public SimpleList(T[] array)
		{
			Array = array;
			ValidLength = 0;
		}
	}
}
namespace Iced.Intel.GasFormatterInternal
{
	internal enum CtorKind
	{
		Previous,
		Normal_1,
		Normal_2a,
		Normal_2b,
		Normal_2c,
		Normal_3,
		AamAad,
		asz,
		bnd,
		ST_STi,
		DeclareData,
		er_2,
		er_4,
		far,
		imul,
		maskmovq,
		movabs,
		nop,
		OpSize,
		OpSize2_bnd,
		OpSize3,
		os,
		STi_ST,
		sae,
		CC_1,
		CC_2,
		CC_3,
		os_jcc_1,
		os_jcc_2,
		os_jcc_3,
		os_loopcc,
		os_loop,
		os_mem,
		Reg16,
		os_mem2,
		os2_3,
		os2_4,
		STIG1,
		pblendvb,
		pclmulqdq,
		pops,
		mem16,
		Reg32
	}
	internal enum InstrOpKind : byte
	{
		Register,
		NearBranch16,
		NearBranch32,
		NearBranch64,
		FarBranch16,
		FarBranch32,
		Immediate8,
		Immediate8_2nd,
		Immediate16,
		Immediate32,
		Immediate64,
		Immediate8to16,
		Immediate8to32,
		Immediate8to64,
		Immediate32to64,
		MemorySegSI,
		MemorySegESI,
		MemorySegRSI,
		MemorySegDI,
		MemorySegEDI,
		MemorySegRDI,
		MemoryESDI,
		MemoryESEDI,
		MemoryESRDI,
		Memory,
		Sae,
		RnSae,
		RdSae,
		RuSae,
		RzSae,
		Rn,
		Rd,
		Ru,
		Rz,
		DeclareByte,
		DeclareWord,
		DeclareDword,
		DeclareQword
	}
	internal struct InstrOpInfo
	{
		internal const int TEST_RegisterBits = 8;

		public FormatterString Mnemonic;

		public InstrOpInfoFlags Flags;

		public byte OpCount;

		public InstrOpKind Op0Kind;

		public InstrOpKind Op1Kind;

		public InstrOpKind Op2Kind;

		public InstrOpKind Op3Kind;

		public InstrOpKind Op4Kind;

		public byte Op0Register;

		public byte Op1Register;

		public byte Op2Register;

		public byte Op3Register;

		public byte Op4Register;

		public sbyte Op0Index;

		public sbyte Op1Index;

		public sbyte Op2Index;

		public sbyte Op3Index;

		public sbyte Op4Index;

		public readonly Register GetOpRegister(int operand)
		{
			return operand switch
			{
				0 => (Register)Op0Register, 
				1 => (Register)Op1Register, 
				2 => (Register)Op2Register, 
				3 => (Register)Op3Register, 
				4 => (Register)Op4Register, 
				_ => throw new ArgumentOutOfRangeException("operand"), 
			};
		}

		public readonly InstrOpKind GetOpKind(int operand)
		{
			return operand switch
			{
				0 => Op0Kind, 
				1 => Op1Kind, 
				2 => Op2Kind, 
				3 => Op3Kind, 
				4 => Op4Kind, 
				_ => Op0Kind, 
			};
		}

		public readonly int GetInstructionIndex(int operand)
		{
			int num = operand switch
			{
				0 => Op0Index, 
				1 => Op1Index, 
				2 => Op2Index, 
				3 => Op3Index, 
				4 => Op4Index, 
				_ => -1, 
			};
			if (num >= 0)
			{
				return num;
			}
			return -1;
		}

		public readonly bool TryGetOpAccess(int operand, out OpAccess access)
		{
			int num = operand switch
			{
				0 => Op0Index, 
				1 => Op1Index, 
				2 => Op2Index, 
				3 => Op3Index, 
				4 => Op4Index, 
				_ => Op0Index, 
			};
			if (num < -1)
			{
				access = (OpAccess)(-num - 2);
				return true;
			}
			access = OpAccess.None;
			return false;
		}

		public readonly int GetOperandIndex(int instructionOperand)
		{
			int num = ((instructionOperand != Op0Index) ? ((instructionOperand == Op1Index) ? 1 : ((instructionOperand == Op2Index) ? 2 : ((instructionOperand == Op3Index) ? 3 : ((instructionOperand != Op4Index) ? (-1) : 4)))) : 0);
			if (num >= OpCount)
			{
				return -1;
			}
			return num;
		}

		public InstrOpInfo(FormatterString mnemonic, in Instruction instruction, InstrOpInfoFlags flags)
		{
			Mnemonic = mnemonic;
			Flags = flags;
			int opCount = instruction.OpCount;
			OpCount = (byte)opCount;
			if ((flags & InstrOpInfoFlags.KeepOperandOrder) != 0)
			{
				Op0Kind = (InstrOpKind)instruction.Op0Kind;
				Op1Kind = (InstrOpKind)instruction.Op1Kind;
				Op2Kind = (InstrOpKind)instruction.Op2Kind;
				Op3Kind = (InstrOpKind)instruction.Op3Kind;
				Op4Kind = (InstrOpKind)instruction.Op4Kind;
				Op0Register = (byte)instruction.Op0Register;
				Op1Register = (byte)instruction.Op1Register;
				Op2Register = (byte)instruction.Op2Register;
				Op3Register = (byte)instruction.Op3Register;
				Op4Register = (byte)instruction.Op4Register;
			}
			else
			{
				switch (opCount)
				{
				case 0:
					Op0Kind = InstrOpKind.Register;
					Op1Kind = InstrOpKind.Register;
					Op2Kind = InstrOpKind.Register;
					Op3Kind = InstrOpKind.Register;
					Op4Kind = InstrOpKind.Register;
					Op0Register = 0;
					Op1Register = 0;
					Op2Register = 0;
					Op3Register = 0;
					Op4Register = 0;
					break;
				case 1:
					Op0Kind = (InstrOpKind)instruction.Op0Kind;
					Op1Kind = InstrOpKind.Register;
					Op2Kind = InstrOpKind.Register;
					Op3Kind = InstrOpKind.Register;
					Op4Kind = InstrOpKind.Register;
					Op0Register = (byte)instruction.Op0Register;
					Op1Register = 0;
					Op2Register = 0;
					Op3Register = 0;
					Op4Register = 0;
					break;
				case 2:
					Op0Kind = (InstrOpKind)instruction.Op1Kind;
					Op1Kind = (InstrOpKind)instruction.Op0Kind;
					Op2Kind = InstrOpKind.Register;
					Op3Kind = InstrOpKind.Register;
					Op4Kind = InstrOpKind.Register;
					Op0Register = (byte)instruction.Op1Register;
					Op1Register = (byte)instruction.Op0Register;
					Op2Register = 0;
					Op3Register = 0;
					Op4Register = 0;
					break;
				case 3:
					Op0Kind = (InstrOpKind)instruction.Op2Kind;
					Op1Kind = (InstrOpKind)instruction.Op1Kind;
					Op2Kind = (InstrOpKind)instruction.Op0Kind;
					Op3Kind = InstrOpKind.Register;
					Op4Kind = InstrOpKind.Register;
					Op0Register = (byte)instruction.Op2Register;
					Op1Register = (byte)instruction.Op1Register;
					Op2Register = (byte)instruction.Op0Register;
					Op3Register = 0;
					Op4Register = 0;
					break;
				case 4:
					Op0Kind = (InstrOpKind)instruction.Op3Kind;
					Op1Kind = (InstrOpKind)instruction.Op2Kind;
					Op2Kind = (InstrOpKind)instruction.Op1Kind;
					Op3Kind = (InstrOpKind)instruction.Op0Kind;
					Op4Kind = InstrOpKind.Register;
					Op0Register = (byte)instruction.Op3Register;
					Op1Register = (byte)instruction.Op2Register;
					Op2Register = (byte)instruction.Op1Register;
					Op3Register = (byte)instruction.Op0Register;
					Op4Register = 0;
					break;
				case 5:
					Op0Kind = (InstrOpKind)instruction.Op4Kind;
					Op1Kind = (InstrOpKind)instruction.Op3Kind;
					Op2Kind = (InstrOpKind)instruction.Op2Kind;
					Op3Kind = (InstrOpKind)instruction.Op1Kind;
					Op4Kind = (InstrOpKind)instruction.Op0Kind;
					Op0Register = (byte)instruction.Op4Register;
					Op1Register = (byte)instruction.Op3Register;
					Op2Register = (byte)instruction.Op2Register;
					Op3Register = (byte)instruction.Op1Register;
					Op4Register = (byte)instruction.Op0Register;
					break;
				default:
					throw new InvalidOperationException();
				}
			}
			switch (OpCount)
			{
			case 0:
				Op0Index = -1;
				Op1Index = -1;
				Op2Index = -1;
				Op3Index = -1;
				Op4Index = -1;
				break;
			case 1:
				Op0Index = 0;
				Op1Index = -1;
				Op2Index = -1;
				Op3Index = -1;
				Op4Index = -1;
				break;
			case 2:
				Op0Index = 1;
				Op1Index = 0;
				Op2Index = -1;
				Op3Index = -1;
				Op4Index = -1;
				break;
			case 3:
				Op0Index = 2;
				Op1Index = 1;
				Op2Index = 0;
				Op3Index = -1;
				Op4Index = -1;
				break;
			case 4:
				Op0Index = 3;
				Op1Index = 2;
				Op2Index = 1;
				Op3Index = 0;
				Op4Index = -1;
				break;
			case 5:
				Op0Index = 4;
				Op1Index = 3;
				Op2Index = 2;
				Op3Index = 1;
				Op4Index = 0;
				break;
			default:
				throw new InvalidOperationException();
			}
		}
	}
	internal abstract class InstrInfo
	{
		public const int OpAccess_INVALID = -1;

		public const int OpAccess_None = -2;

		public const int OpAccess_Read = -3;

		public const int OpAccess_CondRead = -4;

		public const int OpAccess_Write = -5;

		public const int OpAccess_CondWrite = -6;

		public const int OpAccess_ReadWrite = -7;

		public const int OpAccess_ReadCondWrite = -8;

		public const int OpAccess_NoMemAccess = -9;

		public abstract void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info);

		protected static int GetBitness(CodeSize codeSize)
		{
			return codeSize switch
			{
				CodeSize.Code16 => 16, 
				CodeSize.Code32 => 32, 
				CodeSize.Code64 => 64, 
				_ => 0, 
			};
		}

		protected static FormatterString GetMnemonic(FormatterOptions options, in Instruction instruction, FormatterString mnemonic, FormatterString mnemonic_suffix, InstrOpInfoFlags flags)
		{
			if (options.GasShowMnemonicSizeSuffix)
			{
				return mnemonic_suffix;
			}
			if ((flags & InstrOpInfoFlags.MnemonicSuffixIfMem) != 0 && MemorySizes.AllMemorySizes[(int)instruction.MemorySize].Length == 0 && (instruction.Op0Kind == OpKind.Memory || instruction.Op1Kind == OpKind.Memory || instruction.Op2Kind == OpKind.Memory))
			{
				return mnemonic_suffix;
			}
			return mnemonic;
		}
	}
	internal sealed class SimpleInstrInfo : InstrInfo
	{
		private readonly FormatterString mnemonic;

		private readonly FormatterString mnemonic_suffix;

		private readonly InstrOpInfoFlags flags;

		public SimpleInstrInfo(string mnemonic)
			: this(mnemonic, mnemonic, InstrOpInfoFlags.None)
		{
		}

		public SimpleInstrInfo(string mnemonic, InstrOpInfoFlags flags)
			: this(mnemonic, mnemonic, flags)
		{
		}

		public SimpleInstrInfo(string mnemonic, string mnemonic_suffix)
			: this(mnemonic, mnemonic_suffix, InstrOpInfoFlags.None)
		{
		}

		public SimpleInstrInfo(string mnemonic, string mnemonic_suffix, InstrOpInfoFlags flags)
		{
			this.mnemonic = new FormatterString(mnemonic);
			this.mnemonic_suffix = new FormatterString(mnemonic_suffix);
			this.flags = flags;
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			info = new InstrOpInfo(InstrInfo.GetMnemonic(options, in instruction, mnemonic, mnemonic_suffix, flags), in instruction, flags);
		}
	}
	internal sealed class SimpleInstrInfo_cc : InstrInfo
	{
		private readonly int ccIndex;

		private readonly FormatterString[] mnemonics;

		private readonly FormatterString[] mnemonics_suffix;

		public SimpleInstrInfo_cc(int ccIndex, string[] mnemonics, string[] mnemonics_suffix)
		{
			this.ccIndex = ccIndex;
			this.mnemonics = FormatterString.Create(mnemonics);
			this.mnemonics_suffix = FormatterString.Create(mnemonics_suffix);
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			FormatterString mnemonicCC = MnemonicCC.GetMnemonicCC(options, ccIndex, mnemonics);
			FormatterString mnemonicCC2 = MnemonicCC.GetMnemonicCC(options, ccIndex, mnemonics_suffix);
			info = new InstrOpInfo(InstrInfo.GetMnemonic(options, in instruction, mnemonicCC, mnemonicCC2, InstrOpInfoFlags.None), in instruction, InstrOpInfoFlags.None);
		}
	}
	internal sealed class SimpleInstrInfo_AamAad : InstrInfo
	{
		private readonly FormatterString mnemonic;

		public SimpleInstrInfo_AamAad(string mnemonic)
		{
			this.mnemonic = new FormatterString(mnemonic);
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			if (instruction.Immediate8 == 10)
			{
				info = default(InstrOpInfo);
				info.Mnemonic = mnemonic;
			}
			else
			{
				info = new InstrOpInfo(mnemonic, in instruction, InstrOpInfoFlags.None);
			}
		}
	}
	internal sealed class SimpleInstrInfo_nop : InstrInfo
	{
		private readonly int bitness;

		private readonly FormatterString mnemonic;

		private readonly Register register;

		private static readonly FormatterString str_xchg = new FormatterString("xchg");

		private static readonly FormatterString str_xchgw = new FormatterString("xchgw");

		private static readonly FormatterString str_xchgl = new FormatterString("xchgl");

		private static readonly FormatterString str_xchgq = new FormatterString("xchgq");

		public SimpleInstrInfo_nop(int bitness, string mnemonic, Register register)
		{
			this.bitness = bitness;
			this.mnemonic = new FormatterString(mnemonic);
			this.register = register;
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			int num = InstrInfo.GetBitness(instruction.CodeSize);
			if (num == 0 || (num & bitness) != 0)
			{
				info = new InstrOpInfo(mnemonic, in instruction, InstrOpInfoFlags.None);
				return;
			}
			info = default(InstrOpInfo);
			if (!options.GasShowMnemonicSizeSuffix)
			{
				info.Mnemonic = str_xchg;
			}
			else if (register == Register.AX)
			{
				info.Mnemonic = str_xchgw;
			}
			else if (register == Register.EAX)
			{
				info.Mnemonic = str_xchgl;
			}
			else
			{
				if (register != Register.RAX)
				{
					throw new InvalidOperationException();
				}
				info.Mnemonic = str_xchgq;
			}
			info.OpCount = 2;
			info.Op0Register = (byte)register;
			info.Op1Register = (byte)register;
			info.Op0Index = -2;
			info.Op1Index = -2;
		}
	}
	internal sealed class SimpleInstrInfo_STIG1 : InstrInfo
	{
		private readonly FormatterString mnemonic;

		private readonly bool pseudoOp;

		public SimpleInstrInfo_STIG1(string mnemonic, bool pseudoOp)
		{
			this.mnemonic = new FormatterString(mnemonic);
			this.pseudoOp = pseudoOp;
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			info = default(InstrOpInfo);
			info.Mnemonic = mnemonic;
			if (!pseudoOp || !options.UsePseudoOps || instruction.Op1Register != Register.ST1)
			{
				info.OpCount = 1;
				info.Op0Register = (byte)instruction.Op1Register;
				info.Op0Index = 1;
			}
		}
	}
	internal sealed class SimpleInstrInfo_STi_ST : InstrInfo
	{
		private readonly FormatterString mnemonic;

		private readonly bool pseudoOp;

		public SimpleInstrInfo_STi_ST(string mnemonic, bool pseudoOp)
		{
			this.mnemonic = new FormatterString(mnemonic);
			this.pseudoOp = pseudoOp;
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			if (pseudoOp && options.UsePseudoOps && (instruction.Op0Register == Register.ST1 || instruction.Op1Register == Register.ST1))
			{
				info = default(InstrOpInfo);
				info.Mnemonic = mnemonic;
			}
			else
			{
				info = new InstrOpInfo(mnemonic, in instruction, InstrOpInfoFlags.None);
				info.Op0Register = 249;
			}
		}
	}
	internal sealed class SimpleInstrInfo_ST_STi : InstrInfo
	{
		private readonly FormatterString mnemonic;

		public SimpleInstrInfo_ST_STi(string mnemonic)
		{
			this.mnemonic = new FormatterString(mnemonic);
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			info = new InstrOpInfo(mnemonic, in instruction, InstrOpInfoFlags.None);
			info.Op1Register = 249;
		}
	}
	internal sealed class SimpleInstrInfo_as : InstrInfo
	{
		private readonly int bitness;

		private readonly FormatterString mnemonic;

		public SimpleInstrInfo_as(int bitness, string mnemonic)
		{
			this.bitness = bitness;
			this.mnemonic = new FormatterString(mnemonic);
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			InstrOpInfoFlags instrOpInfoFlags = InstrOpInfoFlags.None;
			int num = InstrInfo.GetBitness(instruction.CodeSize);
			if (num != 0 && num != bitness)
			{
				instrOpInfoFlags = ((bitness == 16) ? (instrOpInfoFlags | InstrOpInfoFlags.AddrSize16) : ((bitness != 32) ? (instrOpInfoFlags | InstrOpInfoFlags.AddrSize64) : (instrOpInfoFlags | InstrOpInfoFlags.AddrSize32)));
			}
			info = new InstrOpInfo(mnemonic, in instruction, instrOpInfoFlags);
		}
	}
	internal sealed class SimpleInstrInfo_maskmovq : InstrInfo
	{
		private readonly FormatterString mnemonic;

		public SimpleInstrInfo_maskmovq(string mnemonic)
		{
			this.mnemonic = new FormatterString(mnemonic);
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			int bitness = InstrInfo.GetBitness(instruction.CodeSize);
			int num = instruction.Op0Kind switch
			{
				OpKind.MemorySegDI => 16, 
				OpKind.MemorySegEDI => 32, 
				OpKind.MemorySegRDI => 64, 
				_ => bitness, 
			};
			info = default(InstrOpInfo);
			info.Mnemonic = mnemonic;
			info.OpCount = 2;
			info.Op0Kind = (InstrOpKind)instruction.Op2Kind;
			info.Op0Register = (byte)instruction.Op2Register;
			info.Op0Index = 2;
			info.Op1Kind = (InstrOpKind)instruction.Op1Kind;
			info.Op1Register = (byte)instruction.Op1Register;
			info.Op1Index = 1;
			if (bitness != 0 && bitness != num)
			{
				switch (num)
				{
				case 16:
					info.Flags |= InstrOpInfoFlags.AddrSize16;
					break;
				case 32:
					info.Flags |= InstrOpInfoFlags.AddrSize32;
					break;
				default:
					info.Flags |= InstrOpInfoFlags.AddrSize64;
					break;
				}
			}
		}
	}
	internal sealed class SimpleInstrInfo_pblendvb : InstrInfo
	{
		private readonly FormatterString mnemonic;

		public SimpleInstrInfo_pblendvb(string mnemonic)
		{
			this.mnemonic = new FormatterString(mnemonic);
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			info = default(InstrOpInfo);
			info.Mnemonic = mnemonic;
			info.OpCount = 3;
			info.Op0Register = 77;
			info.Op0Index = -3;
			info.Op1Kind = (InstrOpKind)instruction.Op1Kind;
			info.Op1Index = 1;
			info.Op1Register = (byte)instruction.Op1Register;
			info.Op2Kind = (InstrOpKind)instruction.Op0Kind;
			info.Op2Register = (byte)instruction.Op0Register;
		}
	}
	internal sealed class SimpleInstrInfo_OpSize : InstrInfo
	{
		private readonly CodeSize codeSize;

		private readonly FormatterString[] mnemonics;

		public SimpleInstrInfo_OpSize(CodeSize codeSize, string mnemonic, string mnemonic16, string mnemonic32, string mnemonic64)
		{
			this.codeSize = codeSize;
			mnemonics = new FormatterString[4];
			mnemonics[0] = new FormatterString(mnemonic);
			mnemonics[1] = new FormatterString(mnemonic16);
			mnemonics[2] = new FormatterString(mnemonic32);
			mnemonics[3] = new FormatterString(mnemonic64);
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			FormatterString mnemonic = ((instruction.CodeSize != codeSize || options.GasShowMnemonicSizeSuffix) ? mnemonics[(int)codeSize] : mnemonics[0]);
			info = new InstrOpInfo(mnemonic, in instruction, InstrOpInfoFlags.None);
		}
	}
	internal sealed class SimpleInstrInfo_OpSize2_bnd : InstrInfo
	{
		private readonly FormatterString[] mnemonics;

		public SimpleInstrInfo_OpSize2_bnd(string mnemonic, string mnemonic16, string mnemonic32, string mnemonic64)
		{
			mnemonics = new FormatterString[4];
			mnemonics[0] = new FormatterString(mnemonic);
			mnemonics[1] = new FormatterString(mnemonic16);
			mnemonics[2] = new FormatterString(mnemonic32);
			mnemonics[3] = new FormatterString(mnemonic64);
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			InstrOpInfoFlags instrOpInfoFlags = InstrOpInfoFlags.None;
			if (instruction.HasRepnePrefix)
			{
				instrOpInfoFlags |= InstrOpInfoFlags.BndPrefix;
			}
			int num = (int)instruction.CodeSize;
			if (options.GasShowMnemonicSizeSuffix)
			{
				num = 3;
			}
			FormatterString mnemonic = mnemonics[num];
			info = new InstrOpInfo(mnemonic, in instruction, instrOpInfoFlags);
		}
	}
	internal sealed class SimpleInstrInfo_OpSize3 : InstrInfo
	{
		private readonly int bitness;

		private readonly FormatterString mnemonic;

		private readonly FormatterString mnemonic_suffix;

		public SimpleInstrInfo_OpSize3(int bitness, string mnemonic, string mnemonic_suffix)
		{
			this.bitness = bitness;
			this.mnemonic = new FormatterString(mnemonic);
			this.mnemonic_suffix = new FormatterString(mnemonic_suffix);
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			int num = InstrInfo.GetBitness(instruction.CodeSize);
			FormatterString formatterString = ((options.GasShowMnemonicSizeSuffix || (num != 0 && (num & bitness) == 0)) ? mnemonic_suffix : mnemonic);
			info = new InstrOpInfo(formatterString, in instruction, InstrOpInfoFlags.None);
		}
	}
	internal sealed class SimpleInstrInfo_os2 : InstrInfo
	{
		private readonly int bitness;

		private readonly FormatterString mnemonic;

		private readonly FormatterString mnemonic_suffix;

		private readonly bool canUseBnd;

		private readonly InstrOpInfoFlags flags;

		public SimpleInstrInfo_os2(int bitness, string mnemonic, string mnemonic_suffix, bool canUseBnd, InstrOpInfoFlags flags)
		{
			this.bitness = bitness;
			this.mnemonic = new FormatterString(mnemonic);
			this.mnemonic_suffix = new FormatterString(mnemonic_suffix);
			this.canUseBnd = canUseBnd;
			this.flags = flags;
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			InstrOpInfoFlags instrOpInfoFlags = flags;
			if (canUseBnd && instruction.HasRepnePrefix)
			{
				instrOpInfoFlags |= InstrOpInfoFlags.BndPrefix;
			}
			int num = InstrInfo.GetBitness(instruction.CodeSize);
			FormatterString formatterString = ((num == 0 || num == bitness) ? InstrInfo.GetMnemonic(options, in instruction, mnemonic, mnemonic_suffix, instrOpInfoFlags) : mnemonic_suffix);
			info = new InstrOpInfo(formatterString, in instruction, instrOpInfoFlags);
		}
	}
	internal sealed class SimpleInstrInfo_os : InstrInfo
	{
		private readonly int bitness;

		private readonly FormatterString mnemonic;

		private readonly bool canUseBnd;

		private readonly InstrOpInfoFlags flags;

		public SimpleInstrInfo_os(int bitness, string mnemonic, bool canUseBnd, InstrOpInfoFlags flags)
		{
			this.bitness = bitness;
			this.mnemonic = new FormatterString(mnemonic);
			this.canUseBnd = canUseBnd;
			this.flags = flags;
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			InstrOpInfoFlags instrOpInfoFlags = flags;
			if (canUseBnd && instruction.HasRepnePrefix)
			{
				instrOpInfoFlags |= InstrOpInfoFlags.BndPrefix;
			}
			int num = InstrInfo.GetBitness(instruction.CodeSize);
			if (num != 0 && num != bitness)
			{
				instrOpInfoFlags = ((bitness == 16) ? (instrOpInfoFlags | InstrOpInfoFlags.OpSize16) : ((bitness != 32) ? (instrOpInfoFlags | InstrOpInfoFlags.OpSize64) : (instrOpInfoFlags | InstrOpInfoFlags.OpSize32)));
			}
			info = new InstrOpInfo(InstrInfo.GetMnemonic(options, in instruction, mnemonic, mnemonic, instrOpInfoFlags), in instruction, instrOpInfoFlags);
		}
	}
	internal sealed class SimpleInstrInfo_os_mem : InstrInfo
	{
		private readonly int bitness;

		private readonly FormatterString mnemonic;

		private readonly FormatterString mnemonic_suffix;

		public SimpleInstrInfo_os_mem(int bitness, string mnemonic, string mnemonic_suffix)
		{
			this.bitness = bitness;
			this.mnemonic = new FormatterString(mnemonic);
			this.mnemonic_suffix = new FormatterString(mnemonic_suffix);
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			InstrOpInfoFlags instrOpInfoFlags = InstrOpInfoFlags.None;
			int num = InstrInfo.GetBitness(instruction.CodeSize);
			int num2;
			if (instruction.Op0Kind != OpKind.Memory)
			{
				num2 = ((instruction.Op1Kind == OpKind.Memory) ? 1 : 0);
				if (num2 == 0)
				{
					goto IL_006c;
				}
			}
			else
			{
				num2 = 1;
			}
			if (num != 0 && (num == 64 || num != bitness) && (num != 64 || bitness != 32))
			{
				instrOpInfoFlags = ((bitness == 16) ? (instrOpInfoFlags | InstrOpInfoFlags.OpSize16) : ((bitness != 32) ? (instrOpInfoFlags | InstrOpInfoFlags.OpSize64) : (instrOpInfoFlags | InstrOpInfoFlags.OpSize32)));
			}
			goto IL_006c;
			IL_006c:
			FormatterString formatterString = ((num2 != 0) ? mnemonic : InstrInfo.GetMnemonic(options, in instruction, mnemonic, mnemonic_suffix, instrOpInfoFlags));
			info = new InstrOpInfo(formatterString, in instruction, instrOpInfoFlags);
		}
	}
	internal sealed class SimpleInstrInfo_os_mem2 : InstrInfo
	{
		private readonly int bitness;

		private readonly FormatterString mnemonic;

		private readonly FormatterString mnemonic_suffix;

		public SimpleInstrInfo_os_mem2(int bitness, string mnemonic, string mnemonic_suffix)
		{
			this.bitness = bitness;
			this.mnemonic = new FormatterString(mnemonic);
			this.mnemonic_suffix = new FormatterString(mnemonic_suffix);
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			int num = InstrInfo.GetBitness(instruction.CodeSize);
			FormatterString formatterString = ((num == 0 || (num & bitness) != 0) ? InstrInfo.GetMnemonic(options, in instruction, mnemonic, mnemonic_suffix, InstrOpInfoFlags.None) : mnemonic_suffix);
			info = new InstrOpInfo(formatterString, in instruction, InstrOpInfoFlags.None);
		}
	}
	internal sealed class SimpleInstrInfo_Reg16 : InstrInfo
	{
		private readonly FormatterString mnemonic;

		private readonly FormatterString mnemonic_suffix;

		public SimpleInstrInfo_Reg16(string mnemonic, string mnemonic_suffix)
		{
			this.mnemonic = new FormatterString(mnemonic);
			this.mnemonic_suffix = new FormatterString(mnemonic_suffix);
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			InstrOpInfoFlags flags = InstrOpInfoFlags.None;
			info = new InstrOpInfo(InstrInfo.GetMnemonic(options, in instruction, mnemonic, mnemonic_suffix, flags), in instruction, flags);
			if (37 <= info.Op0Register && info.Op0Register <= 68)
			{
				info.Op0Register = (byte)(((info.Op0Register - 37) & 0xF) + 21);
			}
			if (37 <= info.Op1Register && info.Op1Register <= 68)
			{
				info.Op1Register = (byte)(((info.Op1Register - 37) & 0xF) + 21);
			}
			if (37 <= info.Op2Register && info.Op2Register <= 68)
			{
				info.Op2Register = (byte)(((info.Op2Register - 37) & 0xF) + 21);
			}
		}
	}
	internal sealed class SimpleInstrInfo_mem16 : InstrInfo
	{
		private readonly FormatterString mnemonic;

		private readonly FormatterString mnemonic_reg_suffix;

		private readonly FormatterString mnemonic_mem_suffix;

		public SimpleInstrInfo_mem16(string mnemonic, string mnemonic_reg_suffix, string mnemonic_mem_suffix)
		{
			this.mnemonic = new FormatterString(mnemonic);
			this.mnemonic_reg_suffix = new FormatterString(mnemonic_reg_suffix);
			this.mnemonic_mem_suffix = new FormatterString(mnemonic_mem_suffix);
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			info = new InstrOpInfo(InstrInfo.GetMnemonic(mnemonic_suffix: (instruction.Op0Kind != OpKind.Memory && instruction.Op1Kind != OpKind.Memory) ? mnemonic_reg_suffix : mnemonic_mem_suffix, options: options, instruction: in instruction, mnemonic: mnemonic, flags: InstrOpInfoFlags.None), in instruction, InstrOpInfoFlags.None);
		}
	}
	internal sealed class SimpleInstrInfo_os_loop : InstrInfo
	{
		private readonly int bitness;

		private readonly int regSize;

		private readonly int ccIndex;

		private readonly FormatterString[] mnemonics;

		private readonly FormatterString[] mnemonics_suffix;

		public SimpleInstrInfo_os_loop(int bitness, int regSize, int ccIndex, string[] mnemonics, string[] mnemonics_suffix)
		{
			this.bitness = bitness;
			this.regSize = regSize;
			this.ccIndex = ccIndex;
			this.mnemonics = FormatterString.Create(mnemonics);
			this.mnemonics_suffix = FormatterString.Create(mnemonics_suffix);
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			InstrOpInfoFlags instrOpInfoFlags = InstrOpInfoFlags.None;
			int num = InstrInfo.GetBitness(instruction.CodeSize);
			FormatterString[] array = mnemonics;
			if ((num != 0 && num != regSize) || options.GasShowMnemonicSizeSuffix)
			{
				array = mnemonics_suffix;
			}
			if (num != 0 && num != bitness)
			{
				instrOpInfoFlags = ((bitness == 16) ? (instrOpInfoFlags | (InstrOpInfoFlags.OpSize16 | InstrOpInfoFlags.OpSizeIsByteDirective)) : ((bitness != 32) ? (instrOpInfoFlags | InstrOpInfoFlags.OpSize64) : (instrOpInfoFlags | (InstrOpInfoFlags.OpSize32 | InstrOpInfoFlags.OpSizeIsByteDirective))));
			}
			FormatterString mnemonic = ((ccIndex == -1) ? array[0] : MnemonicCC.GetMnemonicCC(options, ccIndex, array));
			info = new InstrOpInfo(mnemonic, in instruction, instrOpInfoFlags);
		}
	}
	internal sealed class SimpleInstrInfo_os_jcc : InstrInfo
	{
		private readonly int bitness;

		private readonly int ccIndex;

		private readonly FormatterString[] mnemonics;

		public SimpleInstrInfo_os_jcc(int bitness, int ccIndex, string[] mnemonics)
		{
			this.bitness = bitness;
			this.ccIndex = ccIndex;
			this.mnemonics = FormatterString.Create(mnemonics);
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			InstrOpInfoFlags instrOpInfoFlags = InstrOpInfoFlags.None;
			int num = InstrInfo.GetBitness(instruction.CodeSize);
			if (num != 0 && num != bitness)
			{
				instrOpInfoFlags = ((bitness == 16) ? (instrOpInfoFlags | InstrOpInfoFlags.OpSize16) : ((bitness != 32) ? (instrOpInfoFlags | InstrOpInfoFlags.OpSize64) : (instrOpInfoFlags | InstrOpInfoFlags.OpSize32)));
			}
			switch (instruction.SegmentPrefix)
			{
			case Register.CS:
				instrOpInfoFlags |= InstrOpInfoFlags.JccNotTaken;
				break;
			case Register.DS:
				instrOpInfoFlags |= InstrOpInfoFlags.JccTaken;
				break;
			}
			if (instruction.HasRepnePrefix)
			{
				instrOpInfoFlags |= InstrOpInfoFlags.BndPrefix;
			}
			FormatterString mnemonicCC = MnemonicCC.GetMnemonicCC(options, ccIndex, mnemonics);
			info = new InstrOpInfo(InstrInfo.GetMnemonic(options, in instruction, mnemonicCC, mnemonicCC, instrOpInfoFlags), in instruction, instrOpInfoFlags);
		}
	}
	internal sealed class SimpleInstrInfo_movabs : InstrInfo
	{
		private readonly FormatterString mnemonic;

		private readonly FormatterString mnemonic_suffix;

		private readonly FormatterString mnemonic64;

		private readonly FormatterString mnemonic_suffix64;

		public SimpleInstrInfo_movabs(string mnemonic, string mnemonic_suffix, string mnemonic64, string mnemonic_suffix64)
		{
			this.mnemonic = new FormatterString(mnemonic);
			this.mnemonic_suffix = new FormatterString(mnemonic_suffix);
			this.mnemonic64 = new FormatterString(mnemonic64);
			this.mnemonic_suffix64 = new FormatterString(mnemonic_suffix64);
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			InstrOpInfoFlags instrOpInfoFlags = InstrOpInfoFlags.None;
			int num = InstrInfo.GetBitness(instruction.CodeSize);
			FormatterString formatterString;
			FormatterString formatterString2;
			int num2;
			switch (instruction.MemoryDisplSize)
			{
			case 2:
				formatterString = mnemonic;
				formatterString2 = mnemonic_suffix;
				num2 = 16;
				break;
			case 4:
				formatterString = mnemonic;
				formatterString2 = mnemonic_suffix;
				num2 = 32;
				break;
			default:
				formatterString = mnemonic64;
				formatterString2 = mnemonic_suffix64;
				num2 = 64;
				break;
			}
			if (num == 0)
			{
				num = num2;
			}
			if (num == 64)
			{
				if (num2 == 32)
				{
					instrOpInfoFlags |= InstrOpInfoFlags.AddrSize32;
				}
			}
			else if (num != num2)
			{
				instrOpInfoFlags = ((num2 != 16) ? (instrOpInfoFlags | InstrOpInfoFlags.AddrSize32) : (instrOpInfoFlags | InstrOpInfoFlags.AddrSize16));
			}
			info = new InstrOpInfo(InstrInfo.GetMnemonic(options, in instruction, formatterString, formatterString2, instrOpInfoFlags), in instruction, instrOpInfoFlags);
		}
	}
	internal sealed class SimpleInstrInfo_er : InstrInfo
	{
		private readonly int erIndex;

		private readonly FormatterString mnemonic;

		private readonly FormatterString mnemonic_suffix;

		private readonly InstrOpInfoFlags flags;

		public SimpleInstrInfo_er(int erIndex, string mnemonic)
			: this(erIndex, mnemonic, mnemonic, InstrOpInfoFlags.None)
		{
		}

		public SimpleInstrInfo_er(int erIndex, string mnemonic, string mnemonic_suffix, InstrOpInfoFlags flags)
		{
			this.erIndex = erIndex;
			this.mnemonic = new FormatterString(mnemonic);
			this.mnemonic_suffix = new FormatterString(mnemonic_suffix);
			this.flags = flags;
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			info = new InstrOpInfo(InstrInfo.GetMnemonic(options, in instruction, mnemonic, mnemonic_suffix, flags), in instruction, flags);
			if (IcedConstants.IsMvex(instruction.Code))
			{
				RoundingControl roundingControl = instruction.RoundingControl;
				if (roundingControl != 0)
				{
					InstrOpKind newOpKind;
					if (instruction.SuppressAllExceptions)
					{
						switch (roundingControl)
						{
						default:
							return;
						case RoundingControl.RoundToNearest:
							newOpKind = InstrOpKind.RnSae;
							break;
						case RoundingControl.RoundDown:
							newOpKind = InstrOpKind.RdSae;
							break;
						case RoundingControl.RoundUp:
							newOpKind = InstrOpKind.RuSae;
							break;
						case RoundingControl.RoundTowardZero:
							newOpKind = InstrOpKind.RzSae;
							break;
						}
					}
					else
					{
						switch (roundingControl)
						{
						default:
							return;
						case RoundingControl.RoundToNearest:
							newOpKind = InstrOpKind.Rn;
							break;
						case RoundingControl.RoundDown:
							newOpKind = InstrOpKind.Rd;
							break;
						case RoundingControl.RoundUp:
							newOpKind = InstrOpKind.Ru;
							break;
						case RoundingControl.RoundTowardZero:
							newOpKind = InstrOpKind.Rz;
							break;
						}
					}
					MoveOperands(ref info, erIndex, newOpKind);
				}
				else if (instruction.SuppressAllExceptions)
				{
					MoveOperands(ref info, erIndex, InstrOpKind.Sae);
				}
				return;
			}
			RoundingControl roundingControl2 = instruction.RoundingControl;
			if (roundingControl2 != 0 && FormatterUtils.CanShowRoundingControl(in instruction, options))
			{
				InstrOpKind newOpKind2;
				switch (roundingControl2)
				{
				default:
					return;
				case RoundingControl.RoundToNearest:
					newOpKind2 = InstrOpKind.RnSae;
					break;
				case RoundingControl.RoundDown:
					newOpKind2 = InstrOpKind.RdSae;
					break;
				case RoundingControl.RoundUp:
					newOpKind2 = InstrOpKind.RuSae;
					break;
				case RoundingControl.RoundTowardZero:
					newOpKind2 = InstrOpKind.RzSae;
					break;
				}
				MoveOperands(ref info, erIndex, newOpKind2);
			}
		}

		internal static void MoveOperands(ref InstrOpInfo info, int index, InstrOpKind newOpKind)
		{
			switch (index)
			{
			case 0:
				info.Op4Kind = info.Op3Kind;
				info.Op4Register = info.Op3Register;
				info.Op3Kind = info.Op2Kind;
				info.Op3Register = info.Op2Register;
				info.Op2Kind = info.Op1Kind;
				info.Op2Register = info.Op1Register;
				info.Op1Kind = info.Op0Kind;
				info.Op1Register = info.Op0Register;
				info.Op0Kind = newOpKind;
				info.Op4Index = info.Op3Index;
				info.Op3Index = info.Op2Index;
				info.Op2Index = info.Op1Index;
				info.Op1Index = info.Op0Index;
				info.Op0Index = -2;
				info.OpCount++;
				break;
			case 1:
				info.Op4Kind = info.Op3Kind;
				info.Op4Register = info.Op3Register;
				info.Op3Kind = info.Op2Kind;
				info.Op3Register = info.Op2Register;
				info.Op2Kind = info.Op1Kind;
				info.Op2Register = info.Op1Register;
				info.Op1Kind = newOpKind;
				info.Op4Index = info.Op3Index;
				info.Op3Index = info.Op2Index;
				info.Op2Index = info.Op1Index;
				info.Op1Index = -2;
				info.OpCount++;
				break;
			default:
				throw new InvalidOperationException();
			}
		}
	}
	internal sealed class SimpleInstrInfo_sae : InstrInfo
	{
		private readonly int saeIndex;

		private readonly FormatterString mnemonic;

		public SimpleInstrInfo_sae(int saeIndex, string mnemonic)
		{
			this.saeIndex = saeIndex;
			this.mnemonic = new FormatterString(mnemonic);
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			info = new InstrOpInfo(mnemonic, in instruction, InstrOpInfoFlags.None);
			if (instruction.SuppressAllExceptions)
			{
				SimpleInstrInfo_er.MoveOperands(ref info, saeIndex, InstrOpKind.Sae);
			}
		}
	}
	internal sealed class SimpleInstrInfo_far : InstrInfo
	{
		private readonly int bitness;

		private readonly FormatterString mnemonic;

		private readonly FormatterString mnemonic_suffix;

		public SimpleInstrInfo_far(int bitness, string mnemonic, string mnemonic_suffix)
		{
			this.bitness = bitness;
			this.mnemonic = new FormatterString(mnemonic);
			this.mnemonic_suffix = new FormatterString(mnemonic_suffix);
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			InstrOpInfoFlags instrOpInfoFlags = InstrOpInfoFlags.IndirectOperand;
			int num = InstrInfo.GetBitness(instruction.CodeSize);
			if (num == 0)
			{
				num = bitness;
			}
			FormatterString formatterString;
			if (bitness != 64)
			{
				formatterString = ((bitness == num && !options.GasShowMnemonicSizeSuffix) ? mnemonic : mnemonic_suffix);
			}
			else
			{
				instrOpInfoFlags |= InstrOpInfoFlags.OpSize64;
				formatterString = mnemonic;
			}
			info = new InstrOpInfo(formatterString, in instruction, instrOpInfoFlags);
		}
	}
	internal sealed class SimpleInstrInfo_bnd : InstrInfo
	{
		private readonly FormatterString mnemonic;

		private readonly FormatterString mnemonic_suffix;

		private readonly InstrOpInfoFlags flags;

		public SimpleInstrInfo_bnd(string mnemonic, string mnemonic_suffix, InstrOpInfoFlags flags)
		{
			this.mnemonic = new FormatterString(mnemonic);
			this.mnemonic_suffix = new FormatterString(mnemonic_suffix);
			this.flags = flags;
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			InstrOpInfoFlags instrOpInfoFlags = flags;
			if (instruction.HasRepnePrefix)
			{
				instrOpInfoFlags |= InstrOpInfoFlags.BndPrefix;
			}
			info = new InstrOpInfo(InstrInfo.GetMnemonic(options, in instruction, mnemonic, mnemonic_suffix, instrOpInfoFlags), in instruction, instrOpInfoFlags);
		}
	}
	internal sealed class SimpleInstrInfo_pops : InstrInfo
	{
		private readonly FormatterString mnemonic;

		private readonly FormatterString[] pseudo_ops;

		private readonly bool canUseSae;

		public SimpleInstrInfo_pops(string mnemonic, FormatterString[] pseudo_ops, bool canUseSae)
		{
			this.mnemonic = new FormatterString(mnemonic);
			this.pseudo_ops = pseudo_ops;
			this.canUseSae = canUseSae;
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			info = new InstrOpInfo(mnemonic, in instruction, InstrOpInfoFlags.None);
			if (canUseSae && instruction.SuppressAllExceptions)
			{
				SimpleInstrInfo_er.MoveOperands(ref info, 1, InstrOpKind.Sae);
			}
			int immediate = instruction.Immediate8;
			if (options.UsePseudoOps && (uint)immediate < (uint)pseudo_ops.Length)
			{
				RemoveFirstImm8Operand(ref info);
				info.Mnemonic = pseudo_ops[immediate];
			}
		}

		internal static void RemoveFirstImm8Operand(ref InstrOpInfo info)
		{
			info.OpCount--;
			switch (info.OpCount)
			{
			case 0:
				info.Op0Index = -1;
				break;
			case 1:
				info.Op0Kind = info.Op1Kind;
				info.Op0Register = info.Op1Register;
				info.Op0Index = info.Op1Index;
				info.Op1Index = -1;
				break;
			case 2:
				info.Op0Kind = info.Op1Kind;
				info.Op0Register = info.Op1Register;
				info.Op1Kind = info.Op2Kind;
				info.Op1Register = info.Op2Register;
				info.Op0Index = info.Op1Index;
				info.Op1Index = info.Op2Index;
				info.Op2Index = -1;
				break;
			case 3:
				info.Op0Kind = info.Op1Kind;
				info.Op0Register = info.Op1Register;
				info.Op1Kind = info.Op2Kind;
				info.Op1Register = info.Op2Register;
				info.Op2Kind = info.Op3Kind;
				info.Op2Register = info.Op3Register;
				info.Op0Index = info.Op1Index;
				info.Op1Index = info.Op2Index;
				info.Op2Index = info.Op3Index;
				info.Op3Index = -1;
				break;
			case 4:
				info.Op0Kind = info.Op1Kind;
				info.Op0Register = info.Op1Register;
				info.Op1Kind = info.Op2Kind;
				info.Op1Register = info.Op2Register;
				info.Op2Kind = info.Op3Kind;
				info.Op2Register = info.Op3Register;
				info.Op3Kind = info.Op4Kind;
				info.Op3Register = info.Op4Register;
				info.Op0Index = info.Op1Index;
				info.Op1Index = info.Op2Index;
				info.Op2Index = info.Op3Index;
				info.Op3Index = info.Op4Index;
				info.Op4Index = -1;
				break;
			default:
				throw new InvalidOperationException();
			}
		}
	}
	internal sealed class SimpleInstrInfo_pclmulqdq : InstrInfo
	{
		private readonly FormatterString mnemonic;

		private readonly FormatterString[] pseudo_ops;

		public SimpleInstrInfo_pclmulqdq(string mnemonic, FormatterString[] pseudo_ops)
		{
			this.mnemonic = new FormatterString(mnemonic);
			this.pseudo_ops = pseudo_ops;
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			info = new InstrOpInfo(mnemonic, in instruction, InstrOpInfoFlags.None);
			if (options.UsePseudoOps)
			{
				int num = instruction.Immediate8 switch
				{
					0 => 0, 
					1 => 1, 
					16 => 2, 
					17 => 3, 
					_ => -1, 
				};
				if (num >= 0)
				{
					SimpleInstrInfo_pops.RemoveFirstImm8Operand(ref info);
					info.Mnemonic = pseudo_ops[num];
				}
			}
		}
	}
	internal sealed class SimpleInstrInfo_imul : InstrInfo
	{
		private readonly FormatterString mnemonic;

		private readonly FormatterString mnemonic_suffix;

		public SimpleInstrInfo_imul(string mnemonic, string mnemonic_suffix)
		{
			this.mnemonic = new FormatterString(mnemonic);
			this.mnemonic_suffix = new FormatterString(mnemonic_suffix);
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			info = new InstrOpInfo(InstrInfo.GetMnemonic(options, in instruction, mnemonic, mnemonic_suffix, InstrOpInfoFlags.None), in instruction, InstrOpInfoFlags.None);
			if (options.UsePseudoOps && info.Op1Kind == InstrOpKind.Register && info.Op2Kind == InstrOpKind.Register && info.Op1Register == info.Op2Register)
			{
				info.OpCount--;
				info.Op1Index = -7;
				info.Op2Index = -1;
			}
		}
	}
	internal sealed class SimpleInstrInfo_Reg32 : InstrInfo
	{
		private readonly FormatterString mnemonic;

		public SimpleInstrInfo_Reg32(string mnemonic)
		{
			this.mnemonic = new FormatterString(mnemonic);
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			info = new InstrOpInfo(mnemonic, in instruction, InstrOpInfoFlags.None);
			if (53 <= info.Op0Register && info.Op0Register <= 68)
			{
				info.Op0Register = (byte)(info.Op0Register - 53 + 37);
			}
			if (53 <= info.Op1Register && info.Op1Register <= 68)
			{
				info.Op1Register = (byte)(info.Op1Register - 53 + 37);
			}
			if (53 <= info.Op2Register && info.Op2Register <= 68)
			{
				info.Op2Register = (byte)(info.Op2Register - 53 + 37);
			}
		}
	}
	internal sealed class SimpleInstrInfo_DeclareData : InstrInfo
	{
		private readonly FormatterString mnemonic;

		private readonly InstrOpKind opKind;

		public SimpleInstrInfo_DeclareData(Code code, string mnemonic)
		{
			this.mnemonic = new FormatterString(mnemonic);
			opKind = code switch
			{
				Code.DeclareByte => InstrOpKind.DeclareByte, 
				Code.DeclareWord => InstrOpKind.DeclareWord, 
				Code.DeclareDword => InstrOpKind.DeclareDword, 
				Code.DeclareQword => InstrOpKind.DeclareQword, 
				_ => throw new InvalidOperationException(), 
			};
		}

		public override void GetOpInfo(FormatterOptions options, in Instruction instruction, out InstrOpInfo info)
		{
			info = new InstrOpInfo(mnemonic, in instruction, InstrOpInfoFlags.KeepOperandOrder | InstrOpInfoFlags.MnemonicIsDirective);
			info.OpCount = (byte)instruction.DeclareDataCount;
			info.Op0Kind = opKind;
			info.Op1Kind = opKind;
			info.Op2Kind = opKind;
			info.Op3Kind = opKind;
			info.Op4Kind = opKind;
			info.Op0Index = -3;
			info.Op1Index = -3;
			info.Op2Index = -3;
			info.Op3Index = -3;
			info.Op4Index = -3;
		}
	}
	internal static class InstrInfos
	{
		public static readonly InstrInfo[] AllInfos = ReadInfos();

		private static string AddSuffix(string s, char[] ca)
		{
			if (ca[0] != 0)
			{
				return string.Intern(s + new string(ca));
			}
			return s;
		}

		private static string AddPrefix(string s, char[] ca)
		{
			return string.Intern(new string(ca) + s);
		}

		private static InstrInfo[] ReadInfos()
		{
			DataReader dataReader = new DataReader(GetSerializedInstrInfos());
			InstrInfo[] array = new InstrInfo[4911];
			string[] stringsTable = FormatterStringsTable.GetStringsTable();
			char[] array2 = new char[1];
			int index = -1;
			for (int i = 0; i < array.Length; i++)
			{
				byte num = dataReader.ReadByte();
				CtorKind ctorKind = (CtorKind)(num & 0x7F);
				int num2;
				if (ctorKind == CtorKind.Previous)
				{
					num2 = dataReader.Index;
					dataReader.Index = index;
					ctorKind = (CtorKind)(dataReader.ReadByte() & 0x7F);
				}
				else
				{
					num2 = -1;
					index = dataReader.Index - 1;
				}
				string text = stringsTable[dataReader.ReadCompressedUInt32()];
				if ((num & 0x80u) != 0)
				{
					array2[0] = 'v';
					text = AddPrefix(text, array2);
				}
				InstrInfo instrInfo;
				switch (ctorKind)
				{
				case CtorKind.Normal_1:
					instrInfo = new SimpleInstrInfo(text);
					break;
				case CtorKind.Normal_2a:
				{
					array2[0] = (char)dataReader.ReadByte();
					string mnemonic_suffix = AddSuffix(text, array2);
					instrInfo = new SimpleInstrInfo(text, mnemonic_suffix);
					break;
				}
				case CtorKind.Normal_2b:
				{
					uint num3 = dataReader.ReadCompressedUInt32();
					instrInfo = new SimpleInstrInfo(text, (InstrOpInfoFlags)num3);
					break;
				}
				case CtorKind.Normal_2c:
					array2[0] = (char)dataReader.ReadByte();
					text = AddSuffix(text, array2);
					instrInfo = new SimpleInstrInfo(text);
					break;
				case CtorKind.Normal_3:
				{
					array2[0] = (char)dataReader.ReadByte();
					string mnemonic_suffix = AddSuffix(text, array2);
					uint num3 = dataReader.ReadCompressedUInt32();
					instrInfo = new SimpleInstrInfo(text, mnemonic_suffix, (InstrOpInfoFlags)num3);
					break;
				}
				case CtorKind.AamAad:
					instrInfo = new SimpleInstrInfo_AamAad(text);
					break;
				case CtorKind.asz:
				{
					uint num3 = dataReader.ReadCompressedUInt32();
					instrInfo = new SimpleInstrInfo_as((int)num3, text);
					break;
				}
				case CtorKind.bnd:
				{
					array2[0] = (char)dataReader.ReadByte();
					string mnemonic_suffix = AddSuffix(text, array2);
					uint num3 = dataReader.ReadCompressedUInt32();
					instrInfo = new SimpleInstrInfo_bnd(text, mnemonic_suffix, (InstrOpInfoFlags)num3);
					break;
				}
				case CtorKind.DeclareData:
					instrInfo = new SimpleInstrInfo_DeclareData((Code)i, text);
					break;
				case CtorKind.er_2:
				{
					uint num3 = dataReader.ReadCompressedUInt32();
					instrInfo = new SimpleInstrInfo_er((int)num3, text);
					break;
				}
				case CtorKind.er_4:
				{
					array2[0] = (char)dataReader.ReadByte();
					string mnemonic_suffix = AddSuffix(text, array2);
					uint num3 = dataReader.ReadCompressedUInt32();
					uint num4 = dataReader.ReadCompressedUInt32();
					instrInfo = new SimpleInstrInfo_er((int)num3, text, mnemonic_suffix, (InstrOpInfoFlags)num4);
					break;
				}
				case CtorKind.far:
				{
					array2[0] = (char)dataReader.ReadByte();
					string mnemonic_suffix = AddSuffix(text, array2);
					uint num3 = dataReader.ReadCompressedUInt32();
					instrInfo = new SimpleInstrInfo_far((int)num3, text, mnemonic_suffix);
					break;
				}
				case CtorKind.imul:
				{
					array2[0] = (char)dataReader.ReadByte();
					string mnemonic_suffix = AddSuffix(text, array2);
					instrInfo = new SimpleInstrInfo_imul(text, mnemonic_suffix);
					break;
				}
				case CtorKind.maskmovq:
					instrInfo = new SimpleInstrInfo_maskmovq(text);
					break;
				case CtorKind.movabs:
				{
					array2[0] = (char)dataReader.ReadByte();
					string mnemonic_suffix = AddSuffix(text, array2);
					string mnemonic_mem_suffix = stringsTable[dataReader.ReadCompressedUInt32()];
					string text2 = AddSuffix(mnemonic_mem_suffix, array2);
					instrInfo = new SimpleInstrInfo_movabs(text, mnemonic_suffix, mnemonic_mem_suffix, text2);
					break;
				}
				case CtorKind.nop:
				{
					uint num3 = dataReader.ReadCompressedUInt32();
					uint num4 = dataReader.ReadByte();
					instrInfo = new SimpleInstrInfo_nop((int)num3, text, (Register)num4);
					break;
				}
				case CtorKind.OpSize:
				{
					uint num3 = dataReader.ReadByte();
					string mnemonic_suffix = string.Intern(text + "w");
					string mnemonic_mem_suffix = string.Intern(text + "l");
					string text2 = string.Intern(text + "q");
					instrInfo = new SimpleInstrInfo_OpSize((CodeSize)num3, text, mnemonic_suffix, mnemonic_mem_suffix, text2);
					break;
				}
				case CtorKind.OpSize2_bnd:
				{
					string mnemonic_suffix = stringsTable[dataReader.ReadCompressedUInt32()];
					string mnemonic_mem_suffix = stringsTable[dataReader.ReadCompressedUInt32()];
					string text2 = stringsTable[dataReader.ReadCompressedUInt32()];
					instrInfo = new SimpleInstrInfo_OpSize2_bnd(text, mnemonic_suffix, mnemonic_mem_suffix, text2);
					break;
				}
				case CtorKind.OpSize3:
				{
					array2[0] = (char)dataReader.ReadByte();
					string mnemonic_suffix = AddSuffix(text, array2);
					uint num3 = dataReader.ReadCompressedUInt32();
					instrInfo = new SimpleInstrInfo_OpSize3((int)num3, text, mnemonic_suffix);
					break;
				}
				case CtorKind.os:
				{
					uint num3 = dataReader.ReadCompressedUInt32();
					uint num4 = dataReader.ReadByte();
					if (num4 > 1)
					{
						throw new InvalidOperationException();
					}
					uint num5 = dataReader.ReadCompressedUInt32();
					instrInfo = new SimpleInstrInfo_os((int)num3, text, num4 != 0, (InstrOpInfoFlags)num5);
					break;
				}
				case CtorKind.CC_1:
				{
					array2[0] = (char)dataReader.ReadByte();
					string mnemonic_suffix = AddSuffix(text, array2);
					uint num3 = dataReader.ReadCompressedUInt32();
					instrInfo = new SimpleInstrInfo_cc((int)num3, new string[1] { text }, new string[1] { mnemonic_suffix });
					break;
				}
				case CtorKind.CC_2:
				{
					string mnemonic_suffix = stringsTable[dataReader.ReadCompressedUInt32()];
					array2[0] = (char)dataReader.ReadByte();
					uint num3 = dataReader.ReadCompressedUInt32();
					string mnemonic_mem_suffix = AddSuffix(text, array2);
					string text2 = AddSuffix(mnemonic_suffix, array2);
					instrInfo = new SimpleInstrInfo_cc((int)num3, new string[2] { text, mnemonic_suffix }, new string[2] { mnemonic_mem_suffix, text2 });
					break;
				}
				case CtorKind.CC_3:
				{
					string mnemonic_suffix = stringsTable[dataReader.ReadCompressedUInt32()];
					string mnemonic_mem_suffix = stringsTable[dataReader.ReadCompressedUInt32()];
					array2[0] = (char)dataReader.ReadByte();
					uint num3 = dataReader.ReadCompressedUInt32();
					string text2 = AddSuffix(text, array2);
					string text3 = AddSuffix(mnemonic_suffix, array2);
					string text4 = AddSuffix(mnemonic_mem_suffix, array2);
					instrInfo = new SimpleInstrInfo_cc((int)num3, new string[3] { text, mnemonic_suffix, mnemonic_mem_suffix }, new string[3] { text2, text3, text4 });
					break;
				}
				case CtorKind.os_jcc_1:
				{
					uint num4 = dataReader.ReadCompressedUInt32();
					uint num3 = dataReader.ReadCompressedUInt32();
					instrInfo = new SimpleInstrInfo_os_jcc((int)num3, (int)num4, new string[1] { text });
					break;
				}
				case CtorKind.os_jcc_2:
				{
					string mnemonic_suffix = stringsTable[dataReader.ReadCompressedUInt32()];
					uint num4 = dataReader.ReadCompressedUInt32();
					uint num3 = dataReader.ReadCompressedUInt32();
					instrInfo = new SimpleInstrInfo_os_jcc((int)num3, (int)num4, new string[2] { text, mnemonic_suffix });
					break;
				}
				case CtorKind.os_jcc_3:
				{
					string mnemonic_suffix = stringsTable[dataReader.ReadCompressedUInt32()];
					string mnemonic_mem_suffix = stringsTable[dataReader.ReadCompressedUInt32()];
					uint num4 = dataReader.ReadCompressedUInt32();
					uint num3 = dataReader.ReadCompressedUInt32();
					instrInfo = new SimpleInstrInfo_os_jcc((int)num3, (int)num4, new string[3] { text, mnemonic_suffix, mnemonic_mem_suffix });
					break;
				}
				case CtorKind.os_loopcc:
				{
					string mnemonic_suffix = stringsTable[dataReader.ReadCompressedUInt32()];
					array2[0] = (char)dataReader.ReadByte();
					string mnemonic_mem_suffix = AddSuffix(text, array2);
					string text2 = AddSuffix(mnemonic_suffix, array2);
					uint num5 = dataReader.ReadCompressedUInt32();
					uint num3 = dataReader.ReadCompressedUInt32();
					uint num4 = dataReader.ReadCompressedUInt32();
					instrInfo = new SimpleInstrInfo_os_loop((int)num3, (int)num4, (int)num5, new string[2] { text, mnemonic_suffix }, new string[2] { mnemonic_mem_suffix, text2 });
					break;
				}
				case CtorKind.os_loop:
				{
					array2[0] = (char)dataReader.ReadByte();
					string mnemonic_suffix = AddSuffix(text, array2);
					uint num3 = dataReader.ReadCompressedUInt32();
					uint num4 = dataReader.ReadCompressedUInt32();
					instrInfo = new SimpleInstrInfo_os_loop((int)num3, (int)num4, -1, new string[1] { text }, new string[1] { mnemonic_suffix });
					break;
				}
				case CtorKind.os_mem:
				{
					array2[0] = (char)dataReader.ReadByte();
					string mnemonic_suffix = AddSuffix(text, array2);
					uint num3 = dataReader.ReadCompressedUInt32();
					instrInfo = new SimpleInstrInfo_os_mem((int)num3, text, mnemonic_suffix);
					break;
				}
				case CtorKind.Reg16:
				{
					array2[0] = 'w';
					string mnemonic_suffix = AddSuffix(text, array2);
					instrInfo = new SimpleInstrInfo_Reg16(text, mnemonic_suffix);
					break;
				}
				case CtorKind.os_mem2:
				{
					array2[0] = (char)dataReader.ReadByte();
					string mnemonic_suffix = AddSuffix(text, array2);
					uint num3 = dataReader.ReadCompressedUInt32();
					instrInfo = new SimpleInstrInfo_os_mem2((int)num3, text, mnemonic_suffix);
					break;
				}
				case CtorKind.os2_3:
				{
					array2[0] = (char)dataReader.ReadByte();
					string mnemonic_suffix = AddSuffix(text, array2);
					uint num3 = dataReader.ReadCompressedUInt32();
					uint num4 = dataReader.ReadByte();
					if (num4 > 1)
					{
						throw new InvalidOperationException();
					}
					instrInfo = new SimpleInstrInfo_os2((int)num3, text, mnemonic_suffix, num4 != 0, InstrOpInfoFlags.None);
					break;
				}
				case CtorKind.os2_4:
				{
					array2[0] = (char)dataReader.ReadByte();
					string mnemonic_suffix = AddSuffix(text, array2);
					uint num3 = dataReader.ReadCompressedUInt32();
					uint num4 = dataReader.ReadByte();
					if (num4 > 1)
					{
						throw new InvalidOperationException();
					}
					uint num5 = dataReader.ReadCompressedUInt32();
					instrInfo = new SimpleInstrInfo_os2((int)num3, text, mnemonic_suffix, num4 != 0, (InstrOpInfoFlags)num5);
					break;
				}
				case CtorKind.pblendvb:
					instrInfo = new SimpleInstrInfo_pblendvb(text);
					break;
				case CtorKind.pclmulqdq:
				{
					uint num3 = dataReader.ReadByte();
					instrInfo = new SimpleInstrInfo_pclmulqdq(text, FormatterConstants.GetPseudoOps((PseudoOpsKind)num3));
					break;
				}
				case CtorKind.pops:
				{
					uint num3 = dataReader.ReadByte();
					uint num4 = dataReader.ReadByte();
					if (num4 > 1)
					{
						throw new InvalidOperationException();
					}
					instrInfo = new SimpleInstrInfo_pops(text, FormatterConstants.GetPseudoOps((PseudoOpsKind)num3), num4 != 0);
					break;
				}
				case CtorKind.mem16:
				{
					array2[0] = (char)dataReader.ReadByte();
					string mnemonic_suffix = AddSuffix(text, array2);
					array2[0] = 'w';
					string mnemonic_mem_suffix = AddSuffix(text, array2);
					instrInfo = new SimpleInstrInfo_mem16(text, mnemonic_suffix, mnemonic_mem_suffix);
					break;
				}
				case CtorKind.Reg32:
					instrInfo = new SimpleInstrInfo_Reg32(text);
					break;
				case CtorKind.sae:
				{
					uint num3 = dataReader.ReadCompressedUInt32();
					instrInfo = new SimpleInstrInfo_sae((int)num3, text);
					break;
				}
				case CtorKind.ST_STi:
					instrInfo = new SimpleInstrInfo_ST_STi(text);
					break;
				case CtorKind.STi_ST:
				{
					uint num3 = dataReader.ReadByte();
					if (num3 > 1)
					{
						throw new InvalidOperationException();
					}
					instrInfo = new SimpleInstrInfo_STi_ST(text, num3 != 0);
					break;
				}
				case CtorKind.STIG1:
				{
					uint num3 = dataReader.ReadByte();
					if (num3 > 1)
					{
						throw new InvalidOperationException();
					}
					instrInfo = new SimpleInstrInfo_STIG1(text, num3 != 0);
					break;
				}
				default:
					throw new InvalidOperationException();
				}
				array[i] = instrInfo;
				if (num2 >= 0)
				{
					dataReader.Index = num2;
				}
			}
			if (dataReader.CanRead)
			{
				throw new InvalidOperationException();
			}
			return array;
		}

		private static ReadOnlySpan<byte> GetSerializedInstrInfos()
		{
			return new byte[13344]
			{
				1, 128, 1, 10, 129, 1, 10, 131, 1, 10,
				133, 1, 10, 135, 1, 2, 4, 98, 2, 4,
				119, 2, 4, 108, 2, 4, 113, 2, 4, 98,
				2, 4, 119, 2, 4, 108, 2, 4, 113, 2,
				4, 98, 2, 4, 119, 2, 4, 108, 2, 4,
				113, 35, 3, 119, 16, 0, 35, 3, 108, 32,
				0, 35, 12, 119, 16, 0, 35, 12, 108, 32,
				0, 2, 5, 98, 2, 5, 119, 2, 5, 108,
				2, 5, 113, 2, 5, 98, 2, 5, 119, 2,
				5, 108, 2, 5, 113, 2, 5, 98, 2, 5,
				119, 2, 5, 108, 2, 5, 113, 35, 3, 119,
				16, 0, 35, 3, 108, 32, 0, 2, 12, 119,
				2, 6, 98, 2, 6, 119, 2, 6, 108, 2,
				6, 113, 2, 6, 98, 2, 6, 119, 2, 6,
				108, 2, 6, 113, 2, 6, 98, 2, 6, 119,
				2, 6, 108, 2, 6, 113, 35, 3, 119, 16,
				0, 35, 3, 108, 32, 0, 35, 12, 119, 16,
				0, 35, 12, 108, 32, 0, 2, 7, 98, 2,
				7, 119, 2, 7, 108, 2, 7, 113, 2, 7,
				98, 2, 7, 119, 2, 7, 108, 2, 7, 113,
				2, 7, 98, 2, 7, 119, 2, 7, 108, 2,
				7, 113, 35, 3, 119, 16, 0, 35, 3, 108,
				32, 0, 35, 12, 119, 16, 0, 35, 12, 108,
				32, 0, 2, 8, 98, 2, 8, 119, 2, 8,
				108, 2, 8, 113, 2, 8, 98, 2, 8, 119,
				2, 8, 108, 2, 8, 113, 2, 8, 98, 2,
				8, 119, 2, 8, 108, 2, 8, 113, 1, 137,
				1, 2, 9, 98, 2, 9, 119, 2, 9, 108,
				2, 9, 113, 2, 9, 98, 2, 9, 119, 2,
				9, 108, 2, 9, 113, 2, 9, 98, 2, 9,
				119, 2, 9, 108, 2, 9, 113, 1, 138, 1,
				2, 10, 98, 2, 10, 119, 2, 10, 108, 2,
				10, 113, 2, 10, 98, 2, 10, 119, 2, 10,
				108, 2, 10, 113, 2, 10, 98, 2, 10, 119,
				2, 10, 108, 2, 10, 113, 1, 139, 1, 2,
				11, 98, 2, 11, 119, 2, 11, 108, 2, 11,
				113, 2, 11, 98, 2, 11, 119, 2, 11, 108,
				2, 11, 113, 2, 11, 98, 2, 11, 119, 2,
				11, 108, 2, 11, 113, 1, 140, 1, 2, 141,
				1, 119, 2, 141, 1, 108, 2, 142, 1, 119,
				2, 142, 1, 108, 2, 3, 119, 2, 3, 108,
				2, 3, 113, 2, 12, 119, 2, 12, 108, 2,
				12, 113, 18, 143, 1, 1, 18, 143, 1, 2,
				18, 145, 1, 1, 18, 145, 1, 2, 5, 147,
				1, 119, 128, 1, 5, 147, 1, 108, 128, 1,
				33, 148, 1, 0, 1, 149, 1, 0, 1, 150,
				1, 35, 3, 119, 16, 0, 35, 3, 108, 32,
				0, 35, 3, 113, 64, 0, 14, 27, 119, 14,
				27, 108, 14, 27, 113, 35, 3, 119, 16, 0,
				35, 3, 108, 32, 0, 35, 3, 113, 64, 0,
				14, 27, 119, 14, 27, 108, 14, 27, 113, 4,
				151, 1, 98, 4, 151, 1, 119, 4, 151, 1,
				108, 4, 155, 1, 98, 4, 155, 1, 119, 4,
				155, 1, 108, 27, 159, 1, 0, 16, 27, 159,
				1, 0, 32, 27, 159, 1, 0, 64, 27, 160,
				1, 1, 16, 27, 160, 1, 1, 32, 27, 160,
				1, 1, 64, 29, 161, 1, 162, 1, 163, 1,
				2, 16, 29, 161, 1, 162, 1, 163, 1, 2,
				32, 29, 161, 1, 162, 1, 163, 1, 2, 64,
				29, 164, 1, 165, 1, 166, 1, 3, 16, 29,
				164, 1, 165, 1, 166, 1, 3, 32, 29, 164,
				1, 165, 1, 166, 1, 3, 64, 28, 167, 1,
				168, 1, 4, 16, 28, 167, 1, 168, 1, 4,
				32, 28, 167, 1, 168, 1, 4, 64, 28, 169,
				1, 170, 1, 5, 16, 28, 169, 1, 170, 1,
				5, 32, 28, 169, 1, 170, 1, 5, 64, 28,
				171, 1, 172, 1, 6, 16, 28, 171, 1, 172,
				1, 6, 32, 28, 171, 1, 172, 1, 6, 64,
				28, 173, 1, 174, 1, 7, 16, 28, 173, 1,
				174, 1, 7, 32, 28, 173, 1, 174, 1, 7,
				64, 27, 175, 1, 8, 16, 27, 175, 1, 8,
				32, 27, 175, 1, 8, 64, 27, 176, 1, 9,
				16, 27, 176, 1, 9, 32, 27, 176, 1, 9,
				64, 28, 177, 1, 178, 1, 10, 16, 28, 177,
				1, 178, 1, 10, 32, 28, 177, 1, 178, 1,
				10, 64, 28, 179, 1, 180, 1, 11, 16, 28,
				179, 1, 180, 1, 11, 32, 28, 179, 1, 180,
				1, 11, 64, 28, 181, 1, 182, 1, 12, 16,
				28, 181, 1, 182, 1, 12, 32, 28, 181, 1,
				182, 1, 12, 64, 28, 183, 1, 184, 1, 13,
				16, 28, 183, 1, 184, 1, 13, 32, 28, 183,
				1, 184, 1, 13, 64, 28, 185, 1, 186, 1,
				14, 16, 28, 185, 1, 186, 1, 14, 32, 28,
				185, 1, 186, 1, 14, 64, 28, 187, 1, 188,
				1, 15, 16, 28, 187, 1, 188, 1, 15, 32,
				28, 187, 1, 188, 1, 15, 64, 5, 4, 98,
				1, 5, 5, 98, 1, 5, 6, 98, 1, 5,
				7, 98, 1, 5, 8, 98, 1, 5, 9, 98,
				1, 5, 10, 98, 1, 5, 11, 98, 1, 5,
				4, 119, 1, 5, 4, 108, 1, 5, 4, 113,
				1, 5, 5, 119, 1, 5, 5, 108, 1, 5,
				5, 113, 1, 5, 6, 119, 1, 5, 6, 108,
				1, 5, 6, 113, 1, 5, 7, 119, 1, 5,
				7, 108, 1, 5, 7, 113, 1, 5, 8, 119,
				1, 5, 8, 108, 1, 5, 8, 113, 1, 5,
				9, 119, 1, 5, 9, 108, 1, 5, 9, 113,
				1, 5, 10, 119, 1, 5, 10, 108, 1, 5,
				10, 113, 1, 5, 11, 119, 1, 5, 11, 108,
				1, 5, 11, 113, 1, 5, 4, 98, 1, 5,
				5, 98, 1, 5, 6, 98, 1, 5, 7, 98,
				1, 5, 8, 98, 1, 5, 9, 98, 1, 5,
				10, 98, 1, 5, 11, 98, 1, 5, 4, 119,
				1, 5, 4, 108, 1, 5, 4, 113, 1, 5,
				5, 119, 1, 5, 5, 108, 1, 5, 5, 113,
				1, 5, 6, 119, 1, 5, 6, 108, 1, 5,
				6, 113, 1, 5, 7, 119, 1, 5, 7, 108,
				1, 5, 7, 113, 1, 5, 8, 119, 1, 5,
				8, 108, 1, 5, 8, 113, 1, 5, 9, 119,
				1, 5, 9, 108, 1, 5, 9, 113, 1, 5,
				10, 119, 1, 5, 10, 108, 1, 5, 10, 113,
				1, 5, 11, 119, 1, 5, 11, 108, 1, 5,
				11, 113, 1, 2, 13, 98, 2, 13, 119, 2,
				13, 108, 2, 13, 113, 2, 61, 98, 2, 61,
				119, 2, 61, 108, 2, 61, 113, 2, 1, 98,
				2, 1, 119, 2, 1, 108, 2, 1, 113, 2,
				1, 98, 2, 1, 119, 2, 1, 108, 2, 1,
				113, 41, 1, 119, 41, 1, 108, 41, 1, 113,
				2, 189, 1, 119, 2, 189, 1, 108, 2, 189,
				1, 113, 41, 1, 119, 41, 1, 108, 41, 1,
				113, 5, 12, 119, 1, 5, 12, 108, 1, 5,
				12, 113, 1, 17, 2, 16, 21, 17, 2, 96,
				37, 17, 2, 0, 53, 2, 61, 119, 2, 61,
				108, 2, 61, 113, 1, 190, 1, 1, 191, 1,
				1, 194, 1, 1, 196, 1, 1, 198, 1, 1,
				200, 1, 1, 202, 1, 35, 203, 1, 119, 16,
				0, 35, 203, 1, 108, 32, 0, 1, 204, 1,
				18, 206, 1, 1, 18, 206, 1, 2, 18, 206,
				1, 3, 18, 209, 1, 1, 18, 209, 1, 2,
				18, 209, 1, 3, 1, 212, 1, 1, 213, 1,
				16, 1, 98, 214, 1, 16, 1, 119, 214, 1,
				16, 1, 108, 214, 1, 16, 1, 113, 214, 1,
				16, 1, 98, 214, 1, 16, 1, 119, 214, 1,
				16, 1, 108, 214, 1, 16, 1, 113, 214, 1,
				4, 215, 1, 98, 4, 215, 1, 119, 4, 215,
				1, 108, 4, 215, 1, 113, 4, 219, 1, 98,
				4, 219, 1, 119, 4, 219, 1, 108, 4, 219,
				1, 113, 2, 13, 98, 2, 13, 119, 2, 13,
				108, 2, 13, 113, 2, 223, 1, 98, 2, 223,
				1, 119, 2, 223, 1, 108, 2, 223, 1, 113,
				2, 228, 1, 98, 2, 228, 1, 119, 2, 228,
				1, 108, 2, 228, 1, 113, 2, 233, 1, 98,
				2, 233, 1, 119, 2, 233, 1, 108, 2, 233,
				1, 113, 2, 1, 98, 2, 1, 119, 2, 1,
				108, 2, 214, 1, 113, 5, 29, 98, 1, 5,
				30, 98, 1, 5, 31, 98, 1, 5, 32, 98,
				1, 5, 18, 98, 1, 5, 33, 98, 1, 5,
				41, 98, 1, 5, 34, 98, 1, 5, 29, 119,
				1, 5, 29, 108, 1, 5, 29, 113, 1, 5,
				30, 119, 1, 5, 30, 108, 1, 5, 30, 113,
				1, 5, 31, 119, 1, 5, 31, 108, 1, 5,
				31, 113, 1, 5, 32, 119, 1, 5, 32, 108,
				1, 5, 32, 113, 1, 5, 18, 119, 1, 5,
				18, 108, 1, 5, 18, 113, 1, 5, 33, 119,
				1, 5, 33, 108, 1, 5, 33, 113, 1, 5,
				41, 119, 1, 5, 41, 108, 1, 5, 41, 113,
				1, 5, 34, 119, 1, 5, 34, 108, 1, 5,
				34, 113, 1, 19, 42, 42, 238, 1, 238, 1,
				19, 42, 240, 1, 42, 240, 1, 8, 42, 113,
				0, 19, 42, 42, 238, 1, 238, 1, 19, 42,
				240, 1, 42, 240, 1, 8, 42, 113, 0, 2,
				242, 1, 119, 2, 242, 1, 108, 2, 243, 1,
				119, 2, 243, 1, 108, 5, 1, 98, 1, 1,
				244, 1, 5, 1, 119, 1, 5, 1, 108, 1,
				5, 1, 113, 1, 1, 245, 1, 0, 36, 246,
				1, 119, 16, 0, 128, 1, 36, 246, 1, 108,
				32, 0, 128, 1, 36, 246, 1, 113, 64, 0,
				128, 1, 35, 247, 1, 119, 16, 0, 35, 247,
				1, 108, 32, 0, 35, 247, 1, 113, 64, 0,
				20, 248, 1, 119, 16, 20, 248, 1, 108, 32,
				20, 248, 1, 113, 0, 20, 248, 1, 119, 16,
				20, 248, 1, 108, 32, 20, 248, 1, 113, 0,
				1, 253, 1, 1, 254, 1, 1, 255, 1, 20,
				128, 2, 119, 16, 20, 128, 2, 108, 32, 20,
				128, 2, 113, 0, 5, 29, 98, 1, 5, 30,
				98, 1, 5, 31, 98, 1, 5, 32, 98, 1,
				5, 18, 98, 1, 5, 33, 98, 1, 5, 41,
				98, 1, 5, 34, 98, 1, 5, 29, 119, 1,
				5, 29, 108, 1, 5, 29, 113, 1, 5, 30,
				119, 1, 5, 30, 108, 1, 5, 30, 113, 1,
				5, 31, 119, 1, 5, 31, 108, 1, 5, 31,
				113, 1, 5, 32, 119, 1, 5, 32, 108, 1,
				5, 32, 113, 1, 5, 18, 119, 1, 5, 18,
				108, 1, 5, 18, 113, 1, 5, 33, 119, 1,
				5, 33, 108, 1, 5, 33, 113, 1, 5, 41,
				119, 1, 5, 41, 108, 1, 5, 41, 113, 1,
				5, 34, 119, 1, 5, 34, 108, 1, 5, 34,
				113, 1, 5, 29, 98, 1, 5, 30, 98, 1,
				5, 31, 98, 1, 5, 32, 98, 1, 5, 18,
				98, 1, 5, 33, 98, 1, 5, 41, 98, 1,
				5, 34, 98, 1, 5, 29, 119, 1, 5, 29,
				108, 1, 5, 29, 113, 1, 5, 30, 119, 1,
				5, 30, 108, 1, 5, 30, 113, 1, 5, 31,
				119, 1, 5, 31, 108, 1, 5, 31, 113, 1,
				5, 32, 119, 1, 5, 32, 108, 1, 5, 32,
				113, 1, 5, 18, 119, 1, 5, 18, 108, 1,
				5, 18, 113, 1, 5, 33, 119, 1, 5, 33,
				108, 1, 5, 33, 113, 1, 5, 41, 119, 1,
				5, 41, 108, 1, 5, 41, 113, 1, 5, 34,
				119, 1, 5, 34, 108, 1, 5, 34, 113, 1,
				6, 131, 2, 6, 132, 2, 1, 133, 2, 5,
				134, 2, 98, 128, 16, 4, 136, 2, 115, 4,
				137, 2, 115, 4, 138, 2, 115, 4, 139, 2,
				115, 4, 140, 2, 115, 4, 141, 2, 115, 4,
				142, 2, 115, 4, 143, 2, 115, 9, 136, 2,
				9, 137, 2, 37, 138, 2, 1, 37, 139, 2,
				1, 9, 140, 2, 9, 141, 2, 9, 142, 2,
				9, 143, 2, 4, 144, 2, 115, 4, 145, 2,
				115, 4, 125, 115, 34, 146, 2, 115, 16, 34,
				146, 2, 108, 96, 2, 147, 2, 119, 34, 148,
				2, 115, 16, 34, 149, 2, 115, 16, 34, 148,
				2, 108, 96, 34, 149, 2, 108, 96, 2, 150,
				2, 119, 2, 151, 2, 119, 1, 144, 2, 37,
				152, 2, 1, 1, 153, 2, 1, 125, 1, 155,
				2, 1, 156, 2, 1, 157, 2, 1, 158, 2,
				1, 159, 2, 1, 160, 2, 1, 161, 2, 1,
				162, 2, 1, 163, 2, 1, 164, 2, 1, 165,
				2, 1, 166, 2, 1, 167, 2, 1, 168, 2,
				1, 169, 2, 1, 170, 2, 1, 171, 2, 1,
				172, 2, 1, 173, 2, 1, 174, 2, 1, 175,
				2, 1, 176, 2, 1, 177, 2, 1, 178, 2,
				1, 179, 2, 1, 180, 2, 1, 181, 2, 4,
				182, 2, 108, 4, 183, 2, 108, 4, 184, 2,
				108, 4, 185, 2, 108, 4, 186, 2, 108, 4,
				187, 2, 108, 4, 188, 2, 108, 4, 189, 2,
				108, 9, 190, 2, 9, 191, 2, 9, 192, 2,
				9, 193, 2, 1, 194, 2, 4, 195, 2, 108,
				4, 196, 2, 108, 4, 197, 2, 108, 4, 198,
				2, 108, 4, 144, 2, 116, 4, 125, 116, 9,
				199, 2, 9, 200, 2, 9, 201, 2, 9, 202,
				2, 1, 203, 2, 1, 204, 2, 1, 205, 2,
				1, 206, 2, 1, 207, 2, 1, 208, 2, 1,
				209, 2, 1, 210, 2, 1, 211, 2, 1, 212,
				2, 1, 213, 2, 9, 214, 2, 9, 215, 2,
				4, 136, 2, 108, 4, 137, 2, 108, 4, 138,
				2, 108, 4, 139, 2, 108, 4, 140, 2, 108,
				4, 141, 2, 108, 4, 142, 2, 108, 4, 143,
				2, 108, 22, 136, 2, 0, 22, 137, 2, 0,
				37, 138, 2, 1, 37, 139, 2, 1, 22, 140,
				2, 0, 22, 141, 2, 0, 22, 142, 2, 0,
				22, 143, 2, 0, 4, 144, 2, 108, 1, 216,
				2, 4, 145, 2, 108, 4, 125, 108, 34, 217,
				2, 115, 16, 34, 217, 2, 108, 96, 34, 218,
				2, 115, 16, 34, 219, 2, 115, 16, 34, 218,
				2, 108, 96, 34, 219, 2, 108, 96, 2, 220,
				2, 119, 2, 221, 2, 119, 1, 222, 2, 37,
				152, 2, 1, 1, 145, 2, 1, 125, 37, 223,
				2, 1, 37, 224, 2, 1, 4, 182, 2, 115,
				4, 183, 2, 115, 4, 184, 2, 115, 4, 185,
				2, 115, 4, 186, 2, 115, 4, 187, 2, 115,
				4, 188, 2, 115, 4, 189, 2, 115, 22, 225,
				2, 1, 22, 226, 2, 1, 37, 139, 2, 1,
				1, 227, 2, 22, 228, 2, 1, 22, 229, 2,
				1, 22, 230, 2, 1, 22, 231, 2, 1, 4,
				195, 2, 115, 4, 196, 2, 115, 4, 197, 2,
				115, 4, 198, 2, 115, 1, 232, 2, 1, 233,
				2, 1, 234, 2, 1, 235, 2, 1, 236, 2,
				37, 152, 2, 1, 1, 125, 0, 1, 220, 2,
				1, 221, 2, 1, 237, 2, 1, 238, 2, 9,
				239, 2, 9, 240, 2, 30, 126, 241, 2, 119,
				5, 16, 16, 30, 126, 241, 2, 119, 5, 32,
				16, 30, 126, 241, 2, 108, 5, 16, 32, 30,
				126, 241, 2, 108, 5, 32, 32, 30, 126, 241,
				2, 108, 5, 64, 32, 30, 126, 241, 2, 113,
				5, 16, 64, 30, 126, 241, 2, 113, 5, 64,
				64, 30, 127, 244, 2, 119, 4, 16, 16, 30,
				127, 244, 2, 119, 4, 32, 16, 30, 127, 244,
				2, 108, 4, 16, 32, 30, 127, 244, 2, 108,
				4, 32, 32, 30, 127, 244, 2, 108, 4, 64,
				32, 30, 127, 244, 2, 113, 4, 16, 64, 30,
				127, 244, 2, 113, 4, 64, 64, 31, 247, 2,
				119, 16, 16, 31, 247, 2, 119, 32, 16, 31,
				247, 2, 108, 16, 32, 31, 247, 2, 108, 32,
				32, 31, 247, 2, 108, 64, 32, 31, 247, 2,
				113, 16, 64, 31, 247, 2, 113, 64, 64, 21,
				249, 2, 16, 0, 64, 21, 249, 2, 32, 0,
				64, 21, 250, 2, 16, 0, 64, 21, 250, 2,
				32, 0, 64, 21, 250, 2, 64, 0, 0, 21,
				251, 2, 16, 0, 64, 21, 251, 2, 64, 0,
				0, 2, 252, 2, 98, 2, 252, 2, 119, 2,
				252, 2, 108, 2, 253, 2, 98, 2, 253, 2,
				119, 2, 253, 2, 108, 35, 43, 119, 16, 1,
				35, 43, 108, 32, 1, 35, 43, 113, 64, 1,
				21, 28, 16, 1, 0, 21, 28, 32, 1, 0,
				21, 28, 64, 1, 0, 35, 254, 2, 119, 16,
				0, 35, 254, 2, 108, 32, 0, 21, 28, 16,
				0, 0, 21, 28, 32, 0, 0, 21, 28, 64,
				0, 0, 2, 252, 2, 98, 2, 252, 2, 119,
				2, 252, 2, 108, 2, 253, 2, 98, 2, 253,
				2, 119, 2, 253, 2, 108, 1, 255, 2, 1,
				128, 3, 1, 129, 3, 5, 13, 98, 1, 0,
				5, 130, 3, 98, 1, 5, 131, 3, 98, 1,
				5, 132, 3, 98, 1, 5, 27, 98, 1, 5,
				133, 3, 98, 1, 5, 134, 3, 98, 1, 5,
				13, 119, 1, 5, 13, 108, 1, 5, 13, 113,
				1, 5, 13, 119, 1, 5, 13, 108, 1, 5,
				13, 113, 1, 5, 130, 3, 119, 1, 5, 130,
				3, 108, 1, 5, 130, 3, 113, 1, 5, 131,
				3, 119, 1, 5, 131, 3, 108, 1, 5, 131,
				3, 113, 1, 5, 132, 3, 119, 1, 5, 132,
				3, 108, 1, 5, 132, 3, 113, 1, 5, 27,
				119, 1, 5, 27, 108, 1, 5, 27, 113, 1,
				5, 133, 3, 119, 1, 5, 133, 3, 108, 1,
				5, 133, 3, 113, 1, 5, 134, 3, 119, 1,
				5, 134, 3, 108, 1, 5, 134, 3, 113, 1,
				1, 135, 3, 1, 136, 3, 1, 137, 3, 1,
				138, 3, 1, 139, 3, 1, 140, 3, 5, 141,
				1, 98, 1, 5, 142, 1, 98, 1, 5, 141,
				1, 119, 1, 5, 141, 1, 108, 1, 5, 141,
				1, 113, 1, 5, 142, 1, 119, 1, 5, 142,
				1, 108, 1, 5, 142, 1, 113, 1, 8, 43,
				119, 33, 8, 43, 108, 33, 8, 43, 113, 33,
				13, 203, 1, 119, 16, 13, 203, 1, 108, 32,
				13, 203, 1, 0, 64, 8, 28, 119, 33, 8,
				28, 108, 33, 8, 28, 113, 33, 13, 254, 2,
				119, 16, 13, 254, 2, 108, 32, 13, 254, 2,
				0, 64, 5, 3, 119, 1, 5, 3, 108, 1,
				5, 3, 113, 1, 41, 143, 3, 119, 41, 143,
				3, 108, 41, 143, 3, 113, 41, 144, 3, 119,
				41, 144, 3, 108, 41, 144, 3, 113, 33, 145,
				3, 0, 0, 33, 146, 3, 0, 0, 33, 147,
				3, 0, 0, 33, 148, 3, 0, 0, 5, 149,
				3, 119, 32, 5, 149, 3, 108, 32, 35, 150,
				3, 119, 16, 0, 35, 150, 3, 108, 32, 0,
				35, 150, 3, 113, 64, 0, 35, 151, 3, 119,
				16, 0, 35, 151, 3, 108, 32, 0, 35, 151,
				3, 113, 64, 0, 35, 152, 3, 119, 16, 0,
				35, 152, 3, 108, 32, 0, 35, 152, 3, 113,
				64, 0, 35, 153, 3, 119, 16, 0, 35, 153,
				3, 108, 32, 0, 35, 153, 3, 113, 64, 0,
				41, 154, 3, 119, 41, 154, 3, 108, 41, 154,
				3, 113, 1, 155, 3, 33, 156, 3, 0, 0,
				1, 157, 3, 1, 158, 3, 1, 159, 3, 1,
				160, 3, 1, 161, 3, 1, 162, 3, 1, 163,
				3, 7, 164, 3, 16, 7, 164, 3, 32, 7,
				164, 3, 64, 1, 165, 3, 1, 166, 3, 1,
				167, 3, 1, 168, 3, 1, 169, 3, 1, 170,
				3, 1, 171, 3, 1, 172, 3, 1, 173, 3,
				1, 174, 3, 7, 175, 3, 16, 7, 175, 3,
				32, 7, 175, 3, 64, 1, 176, 3, 7, 177,
				3, 16, 7, 177, 3, 32, 7, 177, 3, 64,
				7, 178, 3, 16, 7, 178, 3, 32, 7, 178,
				3, 64, 1, 179, 3, 1, 180, 3, 1, 181,
				3, 7, 182, 3, 16, 7, 182, 3, 32, 7,
				182, 3, 64, 1, 183, 3, 1, 184, 3, 1,
				185, 3, 1, 186, 3, 1, 187, 3, 1, 188,
				3, 7, 189, 3, 16, 7, 189, 3, 32, 7,
				189, 3, 64, 1, 190, 3, 1, 191, 3, 7,
				192, 3, 16, 7, 192, 3, 32, 7, 192, 3,
				64, 1, 193, 3, 2, 194, 3, 119, 2, 194,
				3, 108, 2, 194, 3, 113, 2, 195, 3, 119,
				2, 195, 3, 108, 2, 195, 3, 113, 1, 196,
				3, 1, 197, 3, 1, 198, 3, 1, 199, 3,
				1, 201, 3, 20, 202, 3, 108, 48, 1, 203,
				3, 1, 204, 3, 1, 205, 3, 1, 206, 3,
				1, 207, 3, 1, 208, 3, 2, 2, 119, 2,
				2, 108, 2, 2, 113, 1, 209, 3, 1, 211,
				3, 1, 212, 3, 1, 213, 3, 2, 214, 3,
				98, 2, 214, 3, 119, 2, 214, 3, 108, 2,
				214, 3, 98, 2, 214, 3, 119, 2, 214, 3,
				108, 1, 35, 129, 35, 128, 128, 128, 128, 1,
				36, 129, 36, 128, 128, 128, 128, 1, 38, 129,
				38, 128, 128, 128, 1, 37, 129, 37, 128, 128,
				128, 1, 35, 129, 35, 128, 128, 128, 128, 1,
				36, 129, 36, 128, 128, 128, 128, 1, 38, 129,
				38, 128, 128, 128, 1, 37, 129, 37, 128, 128,
				128, 1, 215, 3, 1, 216, 3, 129, 215, 3,
				129, 216, 3, 129, 215, 3, 129, 216, 3, 1,
				217, 3, 129, 217, 3, 128, 1, 218, 3, 129,
				218, 3, 128, 128, 128, 128, 1, 219, 3, 129,
				219, 3, 128, 128, 128, 128, 1, 216, 3, 129,
				216, 3, 128, 1, 217, 3, 129, 217, 3, 128,
				1, 220, 3, 129, 220, 3, 128, 128, 128, 128,
				1, 221, 3, 129, 221, 3, 128, 128, 128, 128,
				1, 222, 3, 129, 222, 3, 128, 128, 128, 128,
				1, 223, 3, 129, 223, 3, 128, 128, 128, 128,
				1, 224, 3, 129, 224, 3, 128, 1, 225, 3,
				129, 225, 3, 128, 1, 226, 3, 129, 226, 3,
				128, 1, 227, 3, 129, 227, 3, 128, 128, 128,
				128, 1, 225, 3, 129, 225, 3, 128, 1, 226,
				3, 129, 226, 3, 128, 2, 2, 119, 2, 2,
				108, 2, 2, 113, 2, 2, 119, 2, 2, 108,
				2, 2, 113, 2, 2, 119, 2, 2, 108, 2,
				2, 113, 2, 2, 119, 2, 2, 108, 2, 2,
				113, 2, 2, 119, 2, 2, 108, 2, 2, 113,
				2, 2, 119, 2, 2, 108, 2, 2, 113, 2,
				2, 119, 2, 2, 108, 2, 2, 113, 2, 2,
				119, 2, 2, 108, 2, 2, 113, 1, 228, 3,
				1, 229, 3, 1, 230, 3, 1, 231, 3, 1,
				232, 3, 1, 233, 3, 0, 1, 234, 3, 0,
				1, 235, 3, 0, 1, 236, 3, 1, 233, 3,
				0, 1, 237, 3, 0, 1, 238, 3, 0, 1,
				239, 3, 1, 240, 3, 1, 241, 3, 1, 242,
				3, 1, 243, 3, 5, 2, 119, 1, 5, 2,
				108, 1, 5, 2, 113, 1, 2, 1, 108, 2,
				1, 113, 2, 1, 108, 2, 1, 113, 2, 1,
				108, 2, 1, 113, 2, 1, 108, 2, 1, 113,
				2, 1, 108, 0, 1, 19, 129, 19, 128, 128,
				128, 128, 1, 20, 129, 20, 128, 128, 128, 128,
				1, 19, 129, 19, 128, 128, 128, 128, 1, 20,
				129, 20, 128, 128, 128, 128, 1, 244, 3, 1,
				245, 3, 5, 246, 3, 108, 1, 5, 246, 3,
				113, 1, 133, 246, 3, 108, 1, 133, 246, 3,
				113, 1, 140, 246, 3, 108, 1, 1, 140, 246,
				3, 113, 1, 1, 5, 247, 3, 108, 1, 5,
				247, 3, 113, 1, 133, 247, 3, 108, 1, 133,
				247, 3, 113, 1, 140, 247, 3, 108, 1, 1,
				140, 247, 3, 113, 1, 1, 1, 248, 3, 129,
				248, 3, 128, 128, 128, 128, 1, 249, 3, 129,
				249, 3, 128, 128, 128, 128, 1, 250, 3, 1,
				251, 3, 1, 252, 3, 1, 253, 3, 1, 254,
				3, 0, 129, 254, 3, 128, 151, 254, 3, 0,
				128, 1, 255, 3, 0, 129, 255, 3, 128, 151,
				255, 3, 0, 128, 1, 128, 4, 1, 129, 4,
				1, 130, 4, 0, 129, 130, 4, 128, 139, 130,
				4, 0, 128, 1, 131, 4, 0, 129, 131, 4,
				128, 139, 131, 4, 0, 128, 1, 132, 4, 129,
				132, 4, 151, 132, 4, 0, 1, 133, 4, 129,
				133, 4, 151, 133, 4, 0, 1, 134, 4, 1,
				135, 4, 129, 134, 4, 129, 135, 4, 151, 134,
				4, 0, 151, 135, 4, 0, 1, 136, 4, 1,
				137, 4, 1, 138, 4, 1, 139, 4, 1, 140,
				4, 20, 141, 4, 108, 48, 1, 142, 4, 1,
				143, 4, 24, 144, 4, 119, 0, 24, 144, 4,
				108, 0, 24, 144, 4, 113, 0, 24, 145, 4,
				119, 1, 24, 145, 4, 108, 1, 24, 145, 4,
				113, 1, 26, 146, 4, 147, 4, 148, 4, 119,
				2, 26, 146, 4, 147, 4, 148, 4, 108, 2,
				26, 146, 4, 147, 4, 148, 4, 113, 2, 26,
				149, 4, 150, 4, 151, 4, 119, 3, 26, 149,
				4, 150, 4, 151, 4, 108, 3, 26, 149, 4,
				150, 4, 151, 4, 113, 3, 25, 152, 4, 153,
				4, 119, 4, 25, 152, 4, 153, 4, 108, 4,
				25, 152, 4, 153, 4, 113, 4, 25, 154, 4,
				155, 4, 119, 5, 25, 154, 4, 155, 4, 108,
				5, 25, 154, 4, 155, 4, 113, 5, 25, 156,
				4, 157, 4, 119, 6, 25, 156, 4, 157, 4,
				108, 6, 25, 156, 4, 157, 4, 113, 6, 25,
				158, 4, 159, 4, 119, 7, 25, 158, 4, 159,
				4, 108, 7, 25, 158, 4, 159, 4, 113, 7,
				24, 160, 4, 119, 8, 24, 160, 4, 108, 8,
				24, 160, 4, 113, 8, 24, 161, 4, 119, 9,
				24, 161, 4, 108, 9, 24, 161, 4, 113, 9,
				25, 162, 4, 163, 4, 119, 10, 25, 162, 4,
				163, 4, 108, 10, 25, 162, 4, 163, 4, 113,
				10, 25, 164, 4, 165, 4, 119, 11, 25, 164,
				4, 165, 4, 108, 11, 25, 164, 4, 165, 4,
				113, 11, 25, 166, 4, 167, 4, 119, 12, 25,
				166, 4, 167, 4, 108, 12, 25, 166, 4, 167,
				4, 113, 12, 25, 168, 4, 169, 4, 119, 13,
				25, 168, 4, 169, 4, 108, 13, 25, 168, 4,
				169, 4, 113, 13, 25, 170, 4, 171, 4, 119,
				14, 25, 170, 4, 171, 4, 108, 14, 25, 170,
				4, 171, 4, 113, 14, 25, 172, 4, 173, 4,
				119, 15, 25, 172, 4, 173, 4, 108, 15, 25,
				172, 4, 173, 4, 113, 15, 1, 174, 4, 1,
				175, 4, 1, 176, 4, 1, 177, 4, 1, 178,
				4, 1, 179, 4, 1, 180, 4, 1, 181, 4,
				1, 182, 4, 1, 183, 4, 1, 184, 4, 1,
				185, 4, 1, 186, 4, 1, 187, 4, 1, 188,
				4, 1, 189, 4, 1, 190, 4, 1, 191, 4,
				1, 192, 4, 1, 193, 4, 1, 194, 4, 1,
				195, 4, 1, 196, 4, 1, 197, 4, 1, 198,
				4, 1, 199, 4, 1, 200, 4, 1, 201, 4,
				1, 202, 4, 1, 203, 4, 1, 204, 4, 1,
				205, 4, 0, 129, 205, 4, 128, 128, 128, 1,
				206, 4, 0, 129, 206, 4, 128, 128, 128, 1,
				207, 4, 129, 207, 4, 128, 128, 128, 139, 207,
				4, 0, 1, 208, 4, 129, 208, 4, 128, 128,
				128, 139, 208, 4, 0, 1, 209, 4, 129, 209,
				4, 139, 209, 4, 0, 1, 210, 4, 129, 210,
				4, 139, 210, 4, 0, 1, 211, 4, 129, 211,
				4, 128, 1, 212, 4, 129, 212, 4, 1, 213,
				4, 129, 213, 4, 128, 1, 214, 4, 129, 214,
				4, 1, 215, 4, 129, 215, 4, 128, 128, 128,
				128, 1, 216, 4, 129, 216, 4, 128, 128, 128,
				128, 1, 217, 4, 129, 217, 4, 128, 128, 128,
				128, 1, 218, 4, 129, 218, 4, 128, 128, 128,
				128, 1, 219, 4, 129, 219, 4, 128, 128, 128,
				128, 1, 220, 4, 129, 220, 4, 128, 128, 128,
				128, 1, 221, 4, 129, 221, 4, 128, 128, 128,
				128, 1, 222, 4, 129, 222, 4, 128, 128, 128,
				128, 1, 62, 129, 62, 128, 128, 128, 139, 62,
				0, 1, 63, 129, 63, 128, 128, 128, 139, 63,
				0, 1, 223, 4, 129, 223, 4, 139, 223, 4,
				0, 1, 224, 4, 129, 224, 4, 139, 224, 4,
				0, 1, 64, 129, 64, 128, 128, 128, 139, 64,
				0, 1, 65, 129, 65, 128, 128, 128, 139, 65,
				0, 1, 225, 4, 129, 225, 4, 139, 225, 4,
				0, 1, 226, 4, 129, 226, 4, 139, 226, 4,
				0, 1, 66, 129, 66, 128, 128, 128, 151, 66,
				0, 1, 67, 133, 67, 120, 1, 133, 67, 121,
				1, 133, 67, 120, 1, 133, 67, 121, 1, 139,
				67, 0, 1, 227, 4, 129, 227, 4, 151, 227,
				4, 0, 1, 228, 4, 129, 228, 4, 139, 228,
				4, 0, 1, 229, 4, 129, 229, 4, 128, 128,
				128, 139, 229, 4, 0, 5, 230, 4, 120, 1,
				5, 230, 4, 121, 1, 11, 230, 4, 0, 1,
				231, 4, 129, 231, 4, 128, 128, 128, 139, 231,
				4, 0, 1, 232, 4, 129, 232, 4, 128, 128,
				128, 151, 232, 4, 0, 1, 68, 129, 68, 128,
				128, 128, 139, 68, 0, 1, 69, 129, 69, 128,
				128, 128, 139, 69, 0, 1, 233, 4, 129, 233,
				4, 139, 233, 4, 0, 1, 234, 4, 129, 234,
				4, 139, 234, 4, 0, 1, 235, 4, 129, 235,
				4, 128, 128, 128, 151, 235, 4, 0, 1, 236,
				4, 129, 236, 4, 128, 128, 128, 151, 236, 4,
				0, 1, 237, 4, 129, 237, 4, 151, 237, 4,
				0, 1, 238, 4, 129, 238, 4, 151, 238, 4,
				0, 1, 239, 4, 129, 239, 4, 128, 128, 128,
				139, 239, 4, 0, 1, 240, 4, 129, 240, 4,
				128, 128, 128, 139, 240, 4, 0, 1, 241, 4,
				129, 241, 4, 139, 241, 4, 0, 1, 242, 4,
				129, 242, 4, 139, 242, 4, 0, 1, 243, 4,
				129, 243, 4, 128, 128, 128, 151, 243, 4, 0,
				1, 244, 4, 129, 244, 4, 128, 128, 128, 151,
				244, 4, 0, 1, 245, 4, 129, 245, 4, 151,
				245, 4, 0, 1, 246, 4, 129, 246, 4, 151,
				246, 4, 0, 1, 70, 0, 129, 70, 128, 128,
				128, 128, 1, 71, 0, 129, 71, 128, 128, 128,
				128, 1, 72, 0, 129, 72, 128, 128, 128, 128,
				1, 73, 0, 129, 73, 128, 128, 128, 128, 1,
				74, 0, 129, 74, 128, 128, 128, 128, 1, 75,
				0, 129, 75, 128, 128, 128, 128, 1, 46, 0,
				129, 46, 128, 128, 128, 128, 1, 76, 0, 129,
				76, 128, 128, 128, 128, 1, 77, 0, 129, 77,
				128, 128, 128, 128, 1, 78, 0, 129, 78, 128,
				128, 128, 128, 1, 79, 0, 129, 79, 128, 128,
				128, 128, 1, 80, 0, 129, 80, 128, 128, 128,
				128, 1, 247, 4, 129, 247, 4, 128, 128, 128,
				128, 1, 248, 4, 129, 248, 4, 128, 128, 128,
				128, 1, 47, 1, 14, 1, 47, 1, 14, 129,
				47, 129, 14, 129, 47, 129, 14, 1, 14, 1,
				249, 4, 129, 249, 4, 128, 1, 48, 0, 0,
				1, 49, 0, 0, 1, 250, 4, 129, 250, 4,
				128, 1, 251, 4, 0, 0, 1, 252, 4, 0,
				0, 1, 253, 4, 0, 0, 1, 254, 4, 0,
				0, 1, 255, 4, 1, 81, 129, 81, 128, 128,
				128, 128, 1, 128, 5, 129, 128, 5, 128, 128,
				128, 128, 1, 129, 5, 129, 129, 5, 128, 128,
				128, 128, 1, 21, 0, 129, 21, 128, 128, 128,
				128, 1, 22, 0, 129, 22, 128, 128, 128, 128,
				1, 23, 0, 129, 23, 128, 128, 128, 128, 1,
				130, 5, 0, 0, 1, 131, 5, 0, 0, 1,
				132, 5, 0, 0, 1, 133, 5, 0, 0, 1,
				15, 0, 129, 15, 128, 128, 128, 128, 1, 16,
				0, 129, 16, 128, 128, 128, 128, 1, 134, 5,
				0, 0, 1, 17, 0, 129, 17, 128, 128, 128,
				128, 1, 24, 0, 129, 24, 128, 128, 128, 128,
				1, 135, 5, 129, 135, 5, 128, 128, 128, 128,
				1, 25, 0, 129, 25, 128, 128, 128, 128, 1,
				136, 5, 129, 136, 5, 128, 128, 128, 128, 1,
				82, 0, 129, 82, 128, 128, 128, 128, 1, 83,
				0, 129, 83, 128, 128, 128, 128, 1, 50, 0,
				129, 50, 128, 128, 128, 128, 1, 137, 5, 1,
				138, 5, 1, 139, 5, 2, 140, 5, 108, 2,
				140, 5, 113, 1, 141, 5, 0, 23, 141, 5,
				0, 5, 142, 5, 120, 1, 5, 142, 5, 121,
				1, 23, 142, 5, 0, 1, 143, 5, 1, 144,
				5, 0, 23, 144, 5, 0, 1, 145, 5, 0,
				23, 145, 5, 0, 23, 146, 5, 0, 0, 1,
				147, 5, 23, 148, 5, 0, 0, 2, 149, 5,
				108, 2, 149, 5, 113, 1, 150, 5, 0, 11,
				150, 5, 0, 5, 151, 5, 120, 1, 5, 151,
				5, 121, 1, 11, 151, 5, 0, 1, 143, 5,
				1, 152, 5, 0, 11, 152, 5, 0, 1, 153,
				5, 0, 11, 153, 5, 0, 11, 154, 5, 0,
				0, 1, 147, 5, 11, 155, 5, 0, 0, 1,
				156, 5, 0, 23, 156, 5, 0, 1, 157, 5,
				0, 23, 157, 5, 0, 1, 158, 5, 0, 11,
				158, 5, 0, 1, 159, 5, 0, 11, 159, 5,
				0, 1, 160, 5, 0, 11, 160, 5, 0, 5,
				161, 5, 120, 1, 5, 161, 5, 121, 1, 11,
				161, 5, 0, 1, 162, 5, 0, 11, 162, 5,
				0, 1, 163, 5, 0, 11, 163, 5, 0, 12,
				164, 5, 108, 1, 1, 12, 164, 5, 113, 1,
				1, 12, 165, 5, 108, 1, 1, 12, 165, 5,
				113, 1, 1, 1, 166, 5, 129, 166, 5, 128,
				1, 167, 5, 129, 167, 5, 128, 1, 168, 5,
				129, 168, 5, 128, 1, 169, 5, 129, 169, 5,
				128, 1, 47, 1, 14, 1, 47, 1, 14, 129,
				47, 129, 14, 129, 47, 129, 14, 1, 14, 129,
				14, 128, 1, 14, 1, 249, 4, 129, 249, 4,
				128, 1, 48, 0, 0, 1, 49, 0, 0, 1,
				250, 4, 129, 250, 4, 128, 1, 251, 4, 0,
				0, 1, 252, 4, 0, 0, 1, 253, 4, 0,
				0, 1, 254, 4, 0, 0, 27, 159, 1, 0,
				16, 27, 159, 1, 0, 32, 27, 159, 1, 0,
				64, 27, 160, 1, 1, 16, 27, 160, 1, 1,
				32, 27, 160, 1, 1, 64, 29, 161, 1, 162,
				1, 163, 1, 2, 16, 29, 161, 1, 162, 1,
				163, 1, 2, 32, 29, 161, 1, 162, 1, 163,
				1, 2, 64, 29, 164, 1, 165, 1, 166, 1,
				3, 16, 29, 164, 1, 165, 1, 166, 1, 3,
				32, 29, 164, 1, 165, 1, 166, 1, 3, 64,
				28, 167, 1, 168, 1, 4, 16, 28, 167, 1,
				168, 1, 4, 32, 28, 167, 1, 168, 1, 4,
				64, 28, 169, 1, 170, 1, 5, 16, 28, 169,
				1, 170, 1, 5, 32, 28, 169, 1, 170, 1,
				5, 64, 28, 171, 1, 172, 1, 6, 16, 28,
				171, 1, 172, 1, 6, 32, 28, 171, 1, 172,
				1, 6, 64, 28, 173, 1, 174, 1, 7, 16,
				28, 173, 1, 174, 1, 7, 32, 28, 173, 1,
				174, 1, 7, 64, 27, 175, 1, 8, 16, 27,
				175, 1, 8, 32, 27, 175, 1, 8, 64, 27,
				176, 1, 9, 16, 27, 176, 1, 9, 32, 27,
				176, 1, 9, 64, 28, 177, 1, 178, 1, 10,
				16, 28, 177, 1, 178, 1, 10, 32, 28, 177,
				1, 178, 1, 10, 64, 28, 179, 1, 180, 1,
				11, 16, 28, 179, 1, 180, 1, 11, 32, 28,
				179, 1, 180, 1, 11, 64, 28, 181, 1, 182,
				1, 12, 16, 28, 181, 1, 182, 1, 12, 32,
				28, 181, 1, 182, 1, 12, 64, 28, 183, 1,
				184, 1, 13, 16, 28, 183, 1, 184, 1, 13,
				32, 28, 183, 1, 184, 1, 13, 64, 28, 185,
				1, 186, 1, 14, 16, 28, 185, 1, 186, 1,
				14, 32, 28, 185, 1, 186, 1, 14, 64, 28,
				187, 1, 188, 1, 15, 16, 28, 187, 1, 188,
				1, 15, 32, 28, 187, 1, 188, 1, 15, 64,
				24, 170, 5, 98, 0, 24, 171, 5, 98, 1,
				26, 172, 5, 173, 5, 174, 5, 98, 2, 26,
				175, 5, 176, 5, 177, 5, 98, 3, 25, 178,
				5, 179, 5, 98, 4, 25, 180, 5, 181, 5,
				98, 5, 25, 182, 5, 183, 5, 98, 6, 25,
				184, 5, 185, 5, 98, 7, 24, 186, 5, 98,
				8, 24, 187, 5, 98, 9, 25, 188, 5, 189,
				5, 98, 10, 25, 190, 5, 191, 5, 98, 11,
				25, 192, 5, 193, 5, 98, 12, 25, 194, 5,
				195, 5, 98, 13, 25, 196, 5, 197, 5, 98,
				14, 25, 198, 5, 199, 5, 98, 15, 1, 200,
				5, 1, 201, 5, 1, 202, 5, 1, 203, 5,
				1, 200, 5, 1, 201, 5, 1, 202, 5, 1,
				203, 5, 1, 200, 5, 1, 202, 5, 1, 203,
				5, 1, 201, 5, 1, 200, 5, 1, 202, 5,
				1, 203, 5, 1, 201, 5, 1, 204, 5, 1,
				205, 5, 1, 206, 5, 1, 207, 5, 1, 208,
				5, 1, 209, 5, 1, 210, 5, 1, 211, 5,
				35, 3, 119, 16, 0, 35, 3, 108, 32, 0,
				35, 3, 113, 64, 0, 35, 12, 119, 16, 0,
				35, 12, 108, 32, 0, 35, 12, 113, 64, 0,
				1, 212, 5, 2, 213, 5, 119, 2, 213, 5,
				108, 2, 213, 5, 113, 2, 214, 5, 119, 2,
				214, 5, 108, 2, 214, 5, 113, 2, 214, 5,
				119, 2, 214, 5, 108, 2, 214, 5, 113, 7,
				215, 5, 16, 7, 215, 5, 32, 7, 215, 5,
				64, 7, 216, 5, 16, 7, 216, 5, 32, 7,
				216, 5, 64, 7, 217, 5, 16, 7, 217, 5,
				32, 7, 217, 5, 64, 2, 218, 5, 119, 2,
				218, 5, 108, 7, 219, 5, 16, 7, 219, 5,
				32, 7, 219, 5, 64, 7, 220, 5, 16, 7,
				220, 5, 32, 7, 220, 5, 64, 7, 221, 5,
				16, 7, 221, 5, 32, 7, 221, 5, 64, 7,
				222, 5, 16, 7, 222, 5, 32, 7, 222, 5,
				64, 7, 223, 5, 16, 7, 223, 5, 32, 7,
				223, 5, 64, 7, 224, 5, 16, 7, 224, 5,
				32, 7, 224, 5, 64, 2, 225, 5, 119, 2,
				225, 5, 108, 2, 226, 5, 98, 2, 226, 5,
				119, 2, 226, 5, 108, 35, 3, 119, 16, 0,
				35, 3, 108, 32, 0, 35, 3, 113, 64, 0,
				35, 12, 119, 16, 0, 35, 12, 108, 32, 0,
				35, 12, 113, 64, 0, 1, 227, 5, 2, 228,
				5, 119, 2, 228, 5, 108, 2, 228, 5, 113,
				2, 229, 5, 119, 2, 229, 5, 108, 2, 229,
				5, 113, 2, 229, 5, 119, 2, 229, 5, 108,
				2, 229, 5, 113, 1, 230, 5, 1, 231, 5,
				1, 232, 5, 0, 1, 233, 5, 1, 234, 5,
				1, 235, 5, 0, 1, 236, 5, 1, 237, 5,
				0, 129, 236, 5, 1, 238, 5, 1, 239, 5,
				0, 129, 238, 5, 1, 240, 5, 1, 241, 5,
				5, 242, 5, 108, 1, 5, 242, 5, 113, 1,
				1, 243, 5, 1, 244, 5, 1, 245, 5, 1,
				246, 5, 1, 247, 5, 1, 248, 5, 1, 249,
				5, 1, 250, 5, 42, 250, 5, 1, 251, 5,
				1, 252, 5, 0, 0, 1, 253, 5, 42, 253,
				5, 1, 254, 5, 1, 255, 5, 1, 51, 0,
				0, 0, 0, 0, 0, 0, 1, 52, 0, 0,
				0, 0, 0, 0, 0, 1, 53, 0, 0, 0,
				0, 0, 0, 0, 1, 128, 6, 2, 27, 119,
				2, 27, 108, 2, 27, 113, 2, 129, 6, 98,
				2, 129, 6, 119, 2, 129, 6, 108, 2, 129,
				6, 113, 2, 130, 6, 119, 2, 130, 6, 108,
				2, 130, 6, 113, 2, 131, 6, 119, 2, 131,
				6, 108, 2, 131, 6, 113, 2, 132, 6, 119,
				2, 132, 6, 108, 2, 132, 6, 113, 2, 133,
				6, 119, 2, 133, 6, 108, 2, 133, 6, 113,
				1, 134, 6, 1, 136, 6, 1, 137, 6, 1,
				138, 6, 1, 139, 6, 1, 140, 6, 21, 149,
				3, 16, 0, 0, 21, 149, 3, 32, 0, 0,
				2, 141, 6, 119, 2, 141, 6, 108, 2, 141,
				6, 113, 2, 142, 6, 119, 2, 142, 6, 108,
				2, 142, 6, 113, 5, 213, 5, 119, 1, 5,
				213, 5, 108, 1, 5, 213, 5, 113, 1, 5,
				228, 5, 119, 1, 5, 228, 5, 108, 1, 5,
				228, 5, 113, 1, 5, 131, 6, 119, 1, 5,
				131, 6, 108, 1, 5, 131, 6, 113, 1, 5,
				143, 6, 119, 1, 5, 143, 6, 108, 1, 5,
				143, 6, 113, 1, 2, 143, 6, 119, 2, 143,
				6, 108, 2, 143, 6, 113, 2, 144, 6, 119,
				2, 144, 6, 108, 2, 144, 6, 113, 2, 145,
				6, 119, 2, 145, 6, 108, 2, 145, 6, 113,
				2, 146, 6, 119, 2, 146, 6, 108, 2, 146,
				6, 113, 2, 147, 6, 119, 2, 147, 6, 108,
				2, 147, 6, 113, 1, 148, 6, 1, 150, 6,
				1, 151, 6, 1, 152, 6, 1, 153, 6, 1,
				154, 6, 2, 155, 6, 98, 2, 155, 6, 119,
				2, 155, 6, 108, 2, 155, 6, 113, 40, 84,
				0, 0, 168, 84, 1, 0, 128, 128, 128, 168,
				84, 1, 1, 40, 85, 2, 0, 168, 85, 3,
				0, 128, 128, 128, 168, 85, 3, 1, 40, 156,
				6, 4, 0, 168, 156, 6, 5, 0, 168, 156,
				6, 5, 1, 40, 157, 6, 6, 0, 168, 157,
				6, 7, 0, 168, 157, 6, 7, 1, 2, 158,
				6, 108, 2, 158, 6, 113, 1, 54, 0, 0,
				0, 129, 54, 128, 128, 128, 1, 26, 0, 0,
				0, 129, 26, 128, 128, 128, 1, 159, 6, 129,
				159, 6, 128, 128, 128, 128, 1, 160, 6, 129,
				160, 6, 128, 128, 128, 128, 1, 161, 6, 1,
				162, 6, 1, 163, 6, 1, 164, 6, 1, 165,
				6, 1, 166, 6, 1, 167, 6, 1, 168, 6,
				1, 169, 6, 1, 170, 6, 1, 171, 6, 1,
				172, 6, 0, 0, 1, 173, 6, 1, 174, 6,
				0, 0, 1, 175, 6, 0, 2, 176, 6, 119,
				2, 176, 6, 108, 2, 176, 6, 113, 1, 177,
				6, 129, 177, 6, 128, 1, 178, 6, 129, 178,
				6, 128, 1, 21, 0, 129, 21, 128, 128, 128,
				128, 1, 15, 0, 129, 15, 128, 128, 128, 128,
				1, 24, 0, 129, 24, 128, 128, 128, 128, 1,
				86, 0, 129, 86, 128, 128, 128, 128, 1, 87,
				0, 129, 87, 128, 128, 128, 128, 1, 14, 129,
				14, 128, 1, 179, 6, 1, 180, 6, 1, 55,
				0, 0, 0, 129, 55, 128, 128, 128, 1, 88,
				0, 129, 88, 128, 128, 128, 128, 1, 89, 0,
				129, 89, 128, 128, 128, 128, 1, 90, 0, 129,
				90, 128, 128, 128, 128, 1, 181, 6, 0, 129,
				181, 6, 128, 1, 182, 6, 0, 0, 1, 183,
				6, 0, 0, 1, 91, 0, 129, 91, 128, 128,
				128, 128, 1, 92, 0, 129, 92, 128, 128, 128,
				128, 1, 93, 0, 129, 93, 128, 128, 128, 128,
				1, 184, 6, 0, 129, 184, 6, 128, 1, 185,
				6, 0, 0, 1, 186, 6, 0, 0, 1, 94,
				0, 129, 94, 128, 128, 128, 128, 1, 22, 0,
				129, 22, 128, 128, 128, 128, 1, 16, 0, 129,
				16, 128, 128, 128, 128, 1, 134, 5, 0, 0,
				1, 95, 0, 129, 95, 128, 128, 128, 128, 1,
				96, 0, 129, 96, 128, 128, 128, 128, 1, 97,
				0, 129, 97, 128, 128, 128, 128, 1, 187, 6,
				133, 187, 6, 120, 1, 133, 187, 6, 121, 1,
				133, 187, 6, 120, 1, 133, 187, 6, 121, 1,
				151, 187, 6, 0, 1, 98, 129, 98, 128, 128,
				128, 139, 98, 0, 1, 188, 6, 0, 11, 188,
				6, 0, 1, 189, 6, 133, 189, 6, 120, 1,
				133, 189, 6, 121, 1, 133, 189, 6, 120, 1,
				133, 189, 6, 121, 1, 139, 189, 6, 0, 1,
				190, 6, 1, 191, 6, 129, 191, 6, 128, 128,
				128, 128, 1, 99, 0, 129, 99, 128, 128, 128,
				128, 1, 100, 0, 129, 100, 128, 128, 128, 128,
				1, 101, 0, 129, 101, 128, 128, 128, 128, 1,
				192, 6, 0, 129, 192, 6, 128, 1, 193, 6,
				0, 0, 1, 194, 6, 0, 0, 1, 102, 0,
				129, 102, 128, 128, 128, 128, 1, 103, 0, 129,
				103, 128, 128, 128, 128, 1, 104, 0, 129, 104,
				128, 128, 128, 128, 1, 195, 6, 0, 129, 195,
				6, 128, 1, 196, 6, 0, 0, 1, 197, 6,
				0, 0, 1, 198, 6, 129, 198, 6, 128, 1,
				23, 0, 129, 23, 128, 128, 128, 128, 1, 17,
				0, 129, 17, 128, 128, 128, 128, 1, 25, 0,
				129, 25, 128, 128, 128, 128, 1, 105, 0, 129,
				105, 128, 128, 128, 128, 1, 106, 0, 129, 106,
				128, 128, 128, 128, 1, 107, 0, 129, 107, 128,
				128, 128, 128, 15, 199, 6, 15, 200, 6, 143,
				200, 6, 1, 108, 0, 129, 108, 128, 128, 128,
				128, 1, 109, 0, 129, 109, 128, 128, 128, 128,
				1, 56, 0, 129, 56, 128, 128, 128, 128, 1,
				110, 0, 129, 110, 128, 128, 128, 128, 1, 111,
				0, 129, 111, 128, 128, 128, 128, 1, 112, 0,
				129, 112, 128, 128, 128, 128, 1, 57, 0, 129,
				57, 128, 128, 128, 128, 2, 201, 6, 119, 2,
				201, 6, 108, 2, 201, 6, 113, 1, 113, 0,
				129, 113, 128, 128, 128, 128, 1, 202, 6, 0,
				129, 202, 6, 128, 1, 203, 6, 0, 129, 203,
				6, 128, 1, 204, 6, 0, 129, 204, 6, 128,
				1, 114, 0, 129, 114, 128, 128, 128, 128, 1,
				205, 6, 0, 129, 205, 6, 128, 1, 206, 6,
				0, 129, 206, 6, 128, 1, 207, 6, 0, 129,
				207, 6, 128, 1, 208, 6, 0, 129, 208, 6,
				128, 1, 209, 6, 0, 129, 209, 6, 128, 1,
				210, 6, 0, 129, 210, 6, 128, 1, 115, 0,
				129, 115, 128, 128, 128, 128, 1, 39, 0, 0,
				0, 0, 1, 40, 0, 0, 0, 0, 1, 211,
				6, 0, 1, 212, 6, 0, 38, 213, 6, 1,
				214, 6, 0, 0, 1, 215, 6, 0, 0, 1,
				216, 6, 0, 0, 1, 217, 6, 0, 0, 1,
				218, 6, 0, 0, 1, 219, 6, 0, 0, 1,
				220, 6, 0, 0, 0, 23, 220, 6, 0, 1,
				221, 6, 0, 0, 38, 222, 6, 1, 223, 6,
				0, 0, 1, 224, 6, 0, 0, 1, 225, 6,
				0, 0, 38, 226, 6, 1, 227, 6, 0, 0,
				1, 228, 6, 0, 0, 1, 229, 6, 0, 0,
				1, 230, 6, 0, 0, 1, 231, 6, 0, 1,
				232, 6, 129, 232, 6, 128, 1, 58, 0, 0,
				0, 0, 1, 233, 6, 1, 234, 6, 0, 1,
				233, 6, 0, 1, 235, 6, 1, 236, 6, 0,
				1, 237, 6, 0, 1, 238, 6, 1, 239, 6,
				1, 116, 0, 129, 116, 128, 128, 128, 128, 1,
				117, 0, 129, 117, 128, 128, 128, 128, 1, 118,
				0, 129, 118, 128, 128, 128, 128, 1, 240, 6,
				0, 0, 1, 241, 6, 129, 241, 6, 128, 128,
				128, 128, 1, 242, 6, 0, 0, 1, 243, 6,
				129, 243, 6, 128, 128, 128, 128, 1, 244, 6,
				0, 0, 1, 245, 6, 129, 245, 6, 128, 128,
				128, 128, 1, 246, 6, 0, 0, 1, 247, 6,
				129, 247, 6, 128, 128, 128, 128, 1, 248, 6,
				0, 0, 1, 249, 6, 129, 249, 6, 128, 128,
				128, 128, 1, 250, 6, 0, 0, 1, 251, 6,
				129, 251, 6, 128, 128, 128, 128, 1, 252, 6,
				0, 0, 1, 253, 6, 0, 0, 1, 254, 6,
				0, 0, 1, 255, 6, 0, 0, 1, 128, 7,
				0, 0, 1, 129, 7, 0, 0, 1, 130, 7,
				0, 0, 1, 131, 7, 0, 0, 1, 132, 7,
				0, 0, 1, 133, 7, 129, 133, 7, 128, 128,
				128, 128, 1, 134, 7, 0, 0, 1, 135, 7,
				0, 0, 1, 136, 7, 129, 136, 7, 128, 128,
				128, 128, 1, 137, 7, 0, 0, 1, 138, 7,
				0, 0, 1, 139, 7, 129, 139, 7, 128, 128,
				128, 128, 1, 140, 7, 0, 0, 1, 141, 7,
				129, 141, 7, 128, 128, 128, 128, 1, 142, 7,
				0, 1, 143, 7, 0, 11, 143, 7, 0, 1,
				144, 7, 0, 11, 144, 7, 0, 1, 145, 7,
				0, 11, 146, 7, 0, 11, 147, 7, 0, 1,
				142, 7, 0, 1, 145, 7, 0, 1, 148, 7,
				129, 148, 7, 128, 128, 128, 128, 1, 149, 7,
				0, 0, 1, 150, 7, 129, 150, 7, 128, 128,
				128, 128, 1, 151, 7, 0, 0, 1, 152, 7,
				129, 152, 7, 128, 128, 128, 128, 1, 153, 7,
				0, 0, 1, 154, 7, 129, 154, 7, 128, 128,
				128, 128, 1, 155, 7, 0, 0, 1, 156, 7,
				129, 156, 7, 128, 128, 128, 128, 1, 157, 7,
				0, 0, 1, 158, 7, 129, 158, 7, 128, 128,
				128, 128, 1, 159, 7, 0, 0, 1, 160, 7,
				0, 0, 1, 161, 7, 0, 1, 162, 7, 129,
				162, 7, 128, 128, 128, 128, 1, 163, 7, 129,
				163, 7, 128, 128, 128, 128, 1, 164, 7, 0,
				0, 1, 165, 7, 0, 0, 1, 119, 129, 119,
				128, 128, 128, 128, 1, 166, 7, 0, 0, 1,
				167, 7, 0, 0, 1, 168, 7, 0, 0, 1,
				169, 7, 129, 169, 7, 128, 128, 128, 128, 1,
				170, 7, 0, 0, 1, 120, 129, 120, 128, 128,
				128, 128, 1, 171, 7, 0, 0, 1, 172, 7,
				129, 172, 7, 128, 128, 128, 128, 1, 121, 129,
				121, 128, 128, 128, 128, 1, 173, 7, 0, 0,
				1, 174, 7, 129, 174, 7, 128, 128, 128, 128,
				1, 122, 129, 122, 128, 128, 128, 128, 1, 175,
				7, 0, 0, 1, 123, 129, 123, 128, 128, 128,
				128, 1, 176, 7, 0, 0, 1, 177, 7, 129,
				177, 7, 1, 178, 7, 0, 23, 178, 7, 0,
				1, 179, 7, 0, 23, 179, 7, 0, 23, 180,
				7, 0, 23, 181, 7, 0, 1, 182, 7, 0,
				0, 1, 183, 7, 0, 0, 1, 184, 7, 0,
				1, 185, 7, 0, 1, 184, 7, 0, 0, 1,
				185, 7, 0, 0, 1, 186, 7, 0, 0, 0,
				0, 1, 187, 7, 0, 0, 1, 188, 7, 0,
				1, 189, 7, 0, 1, 188, 7, 0, 0, 1,
				189, 7, 0, 0, 1, 190, 7, 0, 0, 1,
				191, 7, 0, 0, 1, 192, 7, 1, 193, 7,
				1, 194, 7, 0, 0, 1, 195, 7, 0, 0,
				1, 196, 7, 1, 197, 7, 1, 198, 7, 0,
				0, 1, 199, 7, 0, 0, 1, 200, 7, 0,
				0, 1, 201, 7, 0, 0, 1, 202, 7, 1,
				203, 7, 0, 0, 1, 204, 7, 1, 205, 7,
				0, 0, 1, 206, 7, 0, 0, 1, 207, 7,
				0, 0, 1, 208, 7, 0, 0, 1, 44, 0,
				0, 0, 0, 1, 45, 0, 1, 209, 7, 0,
				0, 1, 45, 0, 0, 1, 210, 7, 1, 211,
				7, 0, 1, 212, 7, 0, 1, 213, 7, 1,
				214, 7, 1, 215, 7, 0, 0, 1, 216, 7,
				0, 0, 1, 217, 7, 0, 0, 1, 218, 7,
				0, 0, 1, 219, 7, 0, 0, 1, 220, 7,
				0, 0, 1, 221, 7, 0, 0, 1, 222, 7,
				0, 0, 1, 223, 7, 0, 0, 1, 224, 7,
				0, 0, 1, 225, 7, 0, 0, 1, 226, 7,
				0, 0, 1, 227, 7, 0, 0, 1, 228, 7,
				0, 0, 1, 229, 7, 0, 0, 1, 230, 7,
				0, 0, 5, 231, 7, 120, 1, 5, 231, 7,
				121, 1, 1, 231, 7, 1, 232, 7, 0, 0,
				1, 233, 7, 0, 0, 1, 234, 7, 0, 0,
				1, 235, 7, 0, 0, 1, 236, 7, 0, 0,
				1, 237, 7, 0, 0, 1, 238, 7, 0, 0,
				1, 239, 7, 0, 0, 1, 240, 7, 0, 0,
				1, 59, 0, 0, 0, 0, 1, 60, 0, 0,
				0, 0, 1, 59, 0, 0, 1, 60, 0, 0,
				1, 44, 0, 0, 1, 45, 0, 0, 1, 241,
				7, 0, 0, 1, 242, 7, 0, 0, 1, 243,
				7, 0, 0, 1, 244, 7, 0, 0, 1, 245,
				7, 0, 0, 1, 246, 7, 0, 0, 1, 247,
				7, 0, 1, 248, 7, 0, 1, 249, 7, 0,
				1, 250, 7, 0, 0, 1, 251, 7, 0, 0,
				1, 252, 7, 0, 0, 1, 253, 7, 0, 0,
				1, 254, 7, 0, 0, 1, 255, 7, 0, 0,
				1, 128, 8, 0, 0, 1, 129, 8, 0, 0,
				1, 130, 8, 0, 0, 1, 131, 8, 0, 1,
				132, 8, 0, 1, 133, 8, 0, 0, 1, 134,
				8, 0, 0, 1, 131, 8, 0, 1, 132, 8,
				0, 1, 135, 8, 0, 0, 1, 136, 8, 0,
				1, 137, 8, 0, 1, 136, 8, 0, 0, 1,
				137, 8, 0, 0, 1, 138, 8, 0, 1, 139,
				8, 0, 1, 138, 8, 0, 0, 1, 139, 8,
				0, 0, 1, 140, 8, 0, 1, 141, 8, 0,
				1, 140, 8, 0, 0, 1, 141, 8, 0, 0,
				1, 142, 8, 0, 1, 143, 8, 0, 1, 142,
				8, 0, 0, 1, 143, 8, 0, 0, 1, 144,
				8, 0, 1, 145, 8, 0, 1, 144, 8, 0,
				11, 144, 8, 0, 1, 145, 8, 0, 11, 145,
				8, 0, 1, 146, 8, 0, 1, 147, 8, 0,
				1, 146, 8, 0, 11, 146, 8, 0, 1, 147,
				8, 0, 11, 147, 8, 0, 1, 148, 8, 0,
				1, 149, 8, 0, 1, 148, 8, 0, 11, 148,
				8, 0, 1, 149, 8, 0, 11, 149, 8, 0,
				1, 150, 8, 1, 151, 8, 11, 150, 8, 0,
				11, 151, 8, 0, 1, 152, 8, 0, 1, 153,
				8, 0, 1, 152, 8, 0, 11, 152, 8, 0,
				1, 153, 8, 0, 11, 153, 8, 0, 1, 154,
				8, 1, 155, 8, 1, 156, 8, 11, 155, 8,
				0, 11, 156, 8, 0, 1, 157, 8, 1, 158,
				8, 0, 1, 159, 8, 0, 1, 158, 8, 0,
				11, 158, 8, 0, 1, 159, 8, 0, 11, 159,
				8, 0, 1, 160, 8, 1, 161, 8, 11, 160,
				8, 0, 11, 161, 8, 0, 1, 162, 8, 0,
				1, 163, 8, 0, 1, 162, 8, 0, 11, 162,
				8, 0, 1, 163, 8, 0, 11, 163, 8, 0,
				1, 164, 8, 1, 165, 8, 11, 164, 8, 0,
				11, 165, 8, 0, 1, 166, 8, 0, 0, 1,
				167, 8, 0, 0, 1, 168, 8, 0, 0, 1,
				169, 8, 0, 0, 1, 170, 8, 0, 0, 1,
				171, 8, 0, 0, 1, 172, 8, 0, 0, 1,
				173, 8, 0, 0, 1, 174, 8, 0, 1, 175,
				8, 0, 1, 174, 8, 0, 11, 174, 8, 0,
				1, 175, 8, 0, 11, 175, 8, 0, 1, 176,
				8, 0, 1, 177, 8, 0, 1, 176, 8, 0,
				11, 176, 8, 0, 1, 177, 8, 0, 11, 177,
				8, 0, 1, 178, 8, 0, 1, 179, 8, 0,
				1, 178, 8, 0, 11, 178, 8, 0, 1, 179,
				8, 0, 11, 179, 8, 0, 1, 180, 8, 1,
				181, 8, 11, 180, 8, 0, 11, 181, 8, 0,
				1, 182, 8, 0, 1, 183, 8, 0, 1, 182,
				8, 0, 11, 182, 8, 0, 1, 183, 8, 0,
				11, 183, 8, 0, 1, 184, 8, 1, 185, 8,
				1, 186, 8, 11, 185, 8, 0, 11, 186, 8,
				0, 1, 187, 8, 1, 188, 8, 0, 1, 189,
				8, 0, 1, 188, 8, 0, 11, 188, 8, 0,
				1, 189, 8, 0, 11, 189, 8, 0, 1, 190,
				8, 1, 191, 8, 11, 190, 8, 0, 11, 191,
				8, 0, 1, 192, 8, 0, 1, 193, 8, 0,
				1, 192, 8, 0, 11, 192, 8, 0, 1, 193,
				8, 0, 11, 193, 8, 0, 1, 194, 8, 1,
				195, 8, 11, 194, 8, 0, 11, 195, 8, 0,
				1, 196, 8, 0, 0, 1, 197, 8, 0, 0,
				1, 198, 8, 0, 1, 199, 8, 0, 1, 198,
				8, 0, 11, 198, 8, 0, 1, 199, 8, 0,
				11, 199, 8, 0, 1, 200, 8, 0, 1, 201,
				8, 0, 1, 200, 8, 0, 11, 200, 8, 0,
				1, 201, 8, 0, 11, 201, 8, 0, 1, 202,
				8, 0, 1, 203, 8, 0, 1, 202, 8, 0,
				11, 202, 8, 0, 1, 203, 8, 0, 11, 203,
				8, 0, 1, 204, 8, 1, 205, 8, 11, 204,
				8, 0, 11, 205, 8, 0, 1, 206, 8, 0,
				1, 207, 8, 0, 1, 206, 8, 0, 11, 206,
				8, 0, 1, 207, 8, 0, 11, 207, 8, 0,
				1, 208, 8, 1, 209, 8, 11, 208, 8, 0,
				11, 209, 8, 0, 1, 210, 8, 0, 1, 211,
				8, 0, 1, 210, 8, 0, 11, 210, 8, 0,
				1, 211, 8, 0, 11, 211, 8, 0, 1, 212,
				8, 1, 213, 8, 11, 212, 8, 0, 11, 213,
				8, 0, 1, 214, 8, 0, 1, 215, 8, 0,
				1, 214, 8, 0, 11, 214, 8, 0, 1, 215,
				8, 0, 11, 215, 8, 0, 1, 216, 8, 1,
				217, 8, 11, 216, 8, 0, 11, 217, 8, 0,
				1, 218, 8, 0, 0, 1, 219, 8, 0, 0,
				1, 220, 8, 1, 221, 8, 1, 222, 8, 1,
				223, 8, 1, 224, 8, 1, 225, 8, 1, 226,
				8, 1, 227, 8, 1, 228, 8, 1, 229, 8,
				1, 230, 8, 1, 231, 8, 1, 232, 8, 1,
				233, 8, 1, 234, 8, 1, 235, 8, 1, 236,
				8, 23, 237, 8, 0, 23, 238, 8, 0, 1,
				239, 8, 1, 240, 8, 23, 241, 8, 0, 23,
				242, 8, 0, 38, 243, 8, 23, 244, 8, 0,
				23, 245, 8, 0, 1, 246, 8, 23, 247, 8,
				0, 23, 248, 8, 0, 1, 249, 8, 23, 250,
				8, 0, 23, 251, 8, 0, 1, 252, 8, 129,
				252, 8, 128, 128, 128, 128, 1, 253, 8, 129,
				253, 8, 1, 254, 8, 129, 254, 8, 128, 128,
				128, 128, 1, 255, 8, 129, 255, 8, 128, 128,
				128, 128, 1, 128, 9, 129, 128, 9, 128, 128,
				128, 128, 1, 129, 9, 129, 129, 9, 128, 128,
				128, 128, 2, 130, 9, 119, 2, 130, 9, 108,
				2, 130, 9, 113, 5, 131, 9, 98, 1, 0,
				2, 130, 9, 119, 2, 130, 9, 108, 2, 130,
				9, 113, 5, 131, 9, 119, 1, 5, 131, 9,
				108, 1, 5, 131, 9, 113, 1, 2, 132, 9,
				108, 2, 132, 9, 113, 2, 133, 9, 108, 2,
				133, 9, 113, 2, 134, 9, 108, 2, 134, 9,
				113, 2, 135, 9, 108, 2, 135, 9, 113, 2,
				136, 9, 108, 2, 136, 9, 113, 1, 137, 9,
				1, 138, 9, 2, 139, 9, 108, 2, 139, 9,
				113, 2, 140, 9, 108, 2, 140, 9, 113, 1,
				141, 9, 1, 142, 9, 2, 143, 9, 108, 2,
				143, 9, 113, 2, 144, 9, 108, 2, 144, 9,
				113, 2, 145, 9, 108, 2, 145, 9, 113, 2,
				146, 9, 108, 2, 146, 9, 113, 2, 147, 9,
				108, 2, 147, 9, 113, 2, 148, 9, 108, 2,
				148, 9, 113, 2, 149, 9, 108, 2, 149, 9,
				113, 1, 150, 9, 0, 0, 1, 151, 9, 0,
				0, 1, 152, 9, 0, 0, 2, 153, 9, 108,
				2, 153, 9, 113, 1, 161, 7, 0, 0, 1,
				231, 6, 0, 0, 1, 154, 9, 0, 1, 155,
				9, 0, 0, 1, 156, 9, 0, 0, 1, 39,
				0, 0, 0, 0, 1, 40, 0, 0, 0, 0,
				1, 157, 9, 1, 158, 9, 129, 158, 9, 128,
				1, 159, 9, 0, 23, 159, 9, 1, 1, 160,
				9, 129, 160, 9, 128, 1, 161, 9, 0, 23,
				161, 9, 1, 1, 162, 9, 129, 162, 9, 23,
				163, 9, 1, 1, 164, 9, 129, 164, 9, 23,
				165, 9, 1, 1, 166, 9, 129, 166, 9, 128,
				1, 167, 9, 129, 167, 9, 128, 1, 168, 9,
				129, 168, 9, 128, 1, 124, 0, 129, 124, 128,
				128, 128, 128, 1, 169, 9, 0, 129, 169, 9,
				128, 128, 128, 1, 26, 0, 129, 26, 128, 128,
				128, 1, 170, 9, 1, 171, 9, 129, 170, 9,
				129, 171, 9, 129, 170, 9, 129, 171, 9, 1,
				172, 9, 0, 129, 172, 9, 128, 128, 128, 1,
				173, 9, 1, 174, 9, 0, 1, 175, 9, 0,
				1, 176, 9, 1, 177, 9, 0, 1, 178, 9,
				0, 1, 179, 9, 1, 180, 9, 1, 181, 9,
				1, 182, 9, 1, 183, 9, 0, 0, 0, 23,
				183, 9, 1, 40, 184, 9, 24, 0, 0, 0,
				40, 185, 9, 25, 0, 0, 0, 40, 186, 9,
				20, 0, 0, 0, 40, 187, 9, 21, 0, 0,
				0, 1, 188, 9, 0, 129, 188, 9, 128, 128,
				128, 1, 189, 9, 129, 189, 9, 128, 1, 190,
				9, 1, 191, 9, 129, 190, 9, 129, 191, 9,
				129, 190, 9, 129, 191, 9, 1, 192, 9, 0,
				1, 193, 9, 0, 1, 194, 9, 0, 0, 1,
				195, 9, 0, 0, 1, 196, 9, 0, 23, 196,
				9, 1, 1, 197, 9, 0, 23, 197, 9, 1,
				23, 198, 9, 1, 23, 199, 9, 1, 1, 200,
				9, 1, 201, 9, 1, 202, 9, 1, 203, 9,
				1, 204, 9, 1, 205, 9, 1, 206, 9, 1,
				207, 9, 1, 208, 9, 1, 209, 9, 0, 1,
				210, 9, 0, 1, 211, 9, 1, 212, 9, 0,
				1, 213, 9, 0, 1, 214, 9, 1, 215, 9,
				1, 216, 9, 1, 217, 9, 40, 218, 9, 22,
				0, 0, 0, 40, 219, 9, 23, 0, 0, 0,
				40, 220, 9, 18, 0, 0, 0, 40, 221, 9,
				19, 0, 0, 0, 1, 222, 9, 129, 222, 9,
				128, 1, 223, 9, 129, 223, 9, 1, 224, 9,
				129, 224, 9, 128, 1, 225, 9, 0, 0, 1,
				226, 9, 0, 1, 227, 9, 0, 39, 228, 9,
				8, 167, 228, 9, 9, 128, 128, 128, 128, 1,
				229, 9, 1, 230, 9, 0, 0, 0, 1, 231,
				9, 0, 0, 0, 129, 222, 6, 128, 129, 226,
				6, 128, 129, 213, 6, 128, 1, 232, 9, 0,
				23, 232, 9, 1, 1, 233, 9, 0, 23, 233,
				9, 1, 23, 234, 9, 1, 23, 235, 9, 1,
				1, 236, 9, 0, 23, 236, 9, 1, 1, 237,
				9, 0, 23, 237, 9, 1, 23, 238, 9, 1,
				23, 239, 9, 1, 1, 240, 9, 0, 23, 240,
				9, 1, 1, 241, 9, 0, 23, 241, 9, 1,
				23, 242, 9, 1, 23, 243, 9, 1, 1, 244,
				9, 0, 0, 0, 1, 245, 9, 0, 0, 0,
				1, 246, 9, 0, 0, 0, 1, 247, 9, 0,
				0, 0, 1, 248, 9, 4, 248, 9, 113, 129,
				248, 9, 132, 248, 9, 113, 1, 250, 9, 4,
				250, 9, 113, 129, 250, 9, 132, 250, 9, 113,
				1, 252, 9, 129, 252, 9, 1, 253, 9, 129,
				253, 9, 5, 254, 9, 120, 1, 5, 254, 9,
				121, 1, 5, 254, 9, 122, 1, 5, 255, 9,
				120, 1, 5, 255, 9, 121, 1, 5, 255, 9,
				122, 1, 1, 128, 10, 1, 129, 10, 1, 130,
				10, 0, 0, 0, 1, 131, 10, 0, 0, 0,
				1, 132, 10, 0, 1, 133, 10, 0, 1, 134,
				10, 0, 0, 0, 1, 135, 10, 0, 0, 0,
				1, 136, 10, 0, 1, 137, 10, 0, 1, 138,
				10, 0, 0, 1, 139, 10, 0, 0, 1, 140,
				10, 0, 0, 1, 141, 10, 0, 0, 1, 142,
				10, 0, 0, 1, 143, 10, 0, 0, 1, 144,
				10, 0, 0, 0, 1, 145, 10, 0, 0, 0,
				1, 146, 10, 0, 1, 147, 10, 0, 1, 148,
				10, 0, 0, 0, 1, 149, 10, 0, 0, 0,
				1, 150, 10, 0, 1, 151, 10, 0, 1, 152,
				10, 1, 153, 10, 129, 153, 10, 128, 128, 128,
				128, 1, 154, 10, 129, 154, 10, 128, 128, 128,
				128, 1, 155, 10, 129, 155, 10, 2, 156, 10,
				108, 2, 156, 10, 113, 1, 157, 10, 1, 158,
				10, 1, 159, 10, 1, 160, 10, 1, 161, 10,
				1, 162, 10, 1, 163, 10, 1, 164, 10, 1,
				165, 10, 1, 166, 10, 1, 167, 10, 0, 0,
				0, 1, 168, 10, 0, 1, 169, 10, 1, 170,
				10, 1, 171, 10, 1, 172, 10, 1, 173, 10,
				1, 174, 10, 40, 175, 10, 10, 0, 40, 176,
				10, 11, 0, 40, 177, 10, 12, 0, 40, 178,
				10, 13, 0, 40, 179, 10, 14, 0, 40, 180,
				10, 15, 0, 40, 181, 10, 16, 0, 40, 182,
				10, 17, 0, 2, 183, 10, 108, 2, 183, 10,
				113, 2, 184, 10, 108, 2, 184, 10, 113, 2,
				185, 10, 108, 2, 185, 10, 113, 2, 186, 10,
				108, 2, 186, 10, 113, 2, 187, 10, 108, 2,
				187, 10, 113, 2, 188, 10, 108, 2, 188, 10,
				113, 2, 189, 10, 108, 2, 189, 10, 113, 2,
				190, 10, 108, 2, 190, 10, 113, 2, 191, 10,
				108, 2, 191, 10, 113, 1, 192, 10, 0, 1,
				193, 10, 0, 1, 194, 10, 0, 1, 195, 10,
				0, 1, 196, 10, 1, 197, 10, 1, 171, 10,
				0, 1, 172, 10, 0, 1, 173, 10, 0, 1,
				174, 10, 0, 1, 198, 10, 0, 1, 199, 10,
				0, 1, 200, 10, 0, 1, 201, 10, 0, 1,
				202, 10, 0, 1, 203, 10, 0, 1, 204, 10,
				0, 1, 205, 10, 0, 1, 206, 10, 1, 207,
				10, 1, 208, 10, 1, 209, 10, 1, 210, 10,
				1, 211, 10, 1, 212, 10, 1, 213, 10, 1,
				214, 10, 1, 215, 10, 1, 216, 10, 1, 217,
				10, 1, 218, 10, 1, 219, 10, 1, 220, 10,
				2, 146, 9, 108, 2, 146, 9, 113, 1, 221,
				10, 0, 1, 222, 10, 0, 1, 223, 10, 1,
				224, 10, 1, 225, 10, 1, 226, 10, 1, 227,
				10, 1, 228, 10, 1, 229, 10, 1, 230, 10,
				1, 231, 10, 1, 232, 10, 1, 233, 10, 1,
				234, 10, 1, 235, 10, 1, 236, 10, 1, 237,
				10, 1, 238, 10, 1, 239, 10, 1, 240, 10,
				1, 241, 10, 1, 242, 10, 1, 243, 10, 1,
				244, 10, 1, 245, 10, 1, 246, 10, 1, 248,
				10, 1, 249, 10, 1, 250, 10, 1, 251, 10,
				1, 252, 10, 7, 253, 10, 16, 7, 253, 10,
				32, 7, 253, 10, 64, 1, 254, 10, 1, 255,
				10, 1, 128, 11, 7, 129, 11, 16, 7, 129,
				11, 32, 7, 129, 11, 64, 1, 130, 11, 1,
				211, 3, 1, 209, 3, 0, 0, 0, 1, 201,
				6, 1, 132, 11, 3, 143, 4, 6, 1, 134,
				11, 1, 135, 11, 1, 136, 11, 1, 137, 11,
				1, 138, 11, 1, 139, 11, 1, 140, 11, 1,
				141, 11, 1, 142, 11, 1, 143, 11, 1, 144,
				11, 1, 145, 11, 1, 146, 11, 1, 147, 11,
				2, 148, 11, 108, 2, 149, 11, 108, 1, 150,
				11, 1, 151, 11, 1, 152, 11, 1, 153, 11,
				1, 154, 11, 1, 155, 11, 1, 156, 11, 1,
				157, 11, 1, 158, 11, 1, 150, 11, 1, 160,
				11, 1, 161, 11, 1, 162, 11, 1, 163, 11,
				1, 164, 11, 1, 165, 11, 1, 166, 11, 1,
				167, 11, 1, 168, 11, 1, 169, 11, 1, 170,
				11, 1, 246, 10, 1, 172, 11, 1, 173, 11,
				1, 174, 11, 1, 175, 11, 1, 176, 11, 1,
				0, 0, 1, 177, 11, 1, 0, 1, 178, 11,
				1, 179, 11, 1, 0, 0, 0, 0, 0, 1,
				180, 11, 1, 181, 11, 1, 182, 11, 1, 183,
				11, 1, 184, 11, 1, 185, 11, 1, 186, 11,
				1, 187, 11, 1, 188, 11, 1, 189, 11, 1,
				190, 11, 1, 191, 11, 1, 192, 11, 1, 193,
				11, 1, 194, 11, 1, 195, 11, 1, 58, 0,
				1, 233, 6, 1, 132, 11, 1, 196, 11, 1,
				197, 11, 1, 198, 11, 1, 199, 11, 1, 200,
				11, 1, 201, 11, 1, 198, 7, 0, 1, 199,
				7, 0, 1, 200, 7, 0, 1, 203, 7, 0,
				7, 202, 11, 16, 7, 202, 11, 32, 7, 202,
				11, 64, 7, 203, 11, 16, 7, 203, 11, 32,
				7, 203, 11, 64, 33, 204, 11, 0, 0, 1,
				205, 11, 1, 206, 11, 1, 207, 11, 0, 11,
				207, 11, 0, 11, 208, 11, 0, 40, 209, 11,
				26, 0, 0, 40, 209, 11, 26, 1, 40, 210,
				11, 27, 1, 23, 211, 11, 0, 5, 212, 11,
				120, 1, 5, 212, 11, 121, 1, 11, 212, 11,
				0, 5, 213, 11, 120, 1, 5, 213, 11, 121,
				1, 12, 213, 11, 122, 0, 1, 1, 214, 11,
				0, 11, 214, 11, 0, 1, 215, 11, 0, 23,
				215, 11, 0, 1, 216, 11, 0, 23, 216, 11,
				0, 1, 217, 11, 0, 11, 217, 11, 0, 1,
				218, 11, 0, 11, 218, 11, 0, 1, 219, 11,
				0, 11, 219, 11, 0, 1, 220, 11, 0, 11,
				220, 11, 0, 1, 221, 11, 0, 11, 221, 11,
				0, 5, 222, 11, 120, 1, 5, 222, 11, 121,
				1, 11, 222, 11, 0, 5, 223, 11, 120, 1,
				5, 223, 11, 121, 1, 12, 223, 11, 122, 0,
				1, 11, 224, 11, 0, 23, 225, 11, 0, 11,
				226, 11, 0, 0, 23, 227, 11, 0, 11, 228,
				11, 0, 0, 12, 229, 11, 108, 1, 1, 12,
				229, 11, 113, 1, 1, 11, 230, 11, 0, 1,
				231, 11, 0, 23, 231, 11, 0, 1, 232, 11,
				0, 23, 232, 11, 0, 1, 233, 11, 0, 23,
				233, 11, 0, 1, 234, 11, 0, 23, 234, 11,
				0, 1, 235, 11, 0, 23, 235, 11, 0, 1,
				236, 11, 0, 23, 236, 11, 0, 23, 237, 11,
				0, 0, 23, 238, 11, 0, 0, 5, 239, 11,
				120, 1, 5, 239, 11, 121, 1, 11, 239, 11,
				0, 5, 240, 11, 120, 1, 5, 240, 11, 121,
				1, 12, 240, 11, 122, 0, 1, 12, 241, 11,
				108, 1, 1, 12, 241, 11, 113, 1, 1, 1,
				242, 11, 0, 11, 242, 11, 0, 1, 243, 11,
				0, 11, 243, 11, 0, 1, 244, 11, 0, 11,
				244, 11, 0, 11, 245, 11, 0, 1, 246, 11,
				0, 11, 246, 11, 0, 1, 247, 11, 0, 11,
				247, 11, 0, 11, 248, 11, 0, 11, 249, 11,
				0, 1, 250, 11, 0, 11, 250, 11, 0, 1,
				251, 11, 0, 11, 251, 11, 0, 11, 252, 11,
				0, 11, 253, 11, 0, 1, 254, 11, 0, 11,
				254, 11, 0, 1, 255, 11, 0, 11, 255, 11,
				0, 1, 128, 12, 0, 11, 128, 12, 0, 1,
				129, 12, 0, 11, 129, 12, 0, 1, 130, 12,
				0, 11, 130, 12, 0, 1, 131, 12, 0, 11,
				131, 12, 0, 1, 132, 12, 0, 11, 132, 12,
				0, 1, 133, 12, 0, 11, 133, 12, 0, 1,
				134, 12, 0, 11, 134, 12, 0, 1, 135, 12,
				0, 11, 135, 12, 0, 1, 136, 12, 0, 11,
				136, 12, 0, 1, 137, 12, 0, 11, 137, 12,
				0, 11, 138, 12, 0, 11, 139, 12, 0, 11,
				140, 12, 0, 11, 141, 12, 0, 11, 142, 12,
				0, 11, 143, 12, 0, 1, 144, 12, 0, 11,
				144, 12, 0, 1, 145, 12, 0, 11, 145, 12,
				0, 1, 146, 12, 0, 11, 146, 12, 0, 1,
				147, 12, 0, 11, 147, 12, 0, 1, 148, 12,
				0, 11, 148, 12, 0, 1, 149, 12, 0, 11,
				149, 12, 0, 11, 150, 12, 0, 11, 151, 12,
				0, 11, 152, 12, 0, 11, 153, 12, 0, 11,
				154, 12, 0, 11, 155, 12, 0, 5, 156, 12,
				120, 1, 5, 156, 12, 121, 1, 5, 156, 12,
				122, 1, 1, 157, 12, 1, 158, 12, 0, 23,
				158, 12, 0, 23, 159, 12, 0, 1, 160, 12,
				0, 23, 160, 12, 1, 23, 161, 12, 1, 1,
				162, 12, 0, 23, 162, 12, 0, 23, 163, 12,
				0, 1, 164, 12, 0, 23, 164, 12, 0, 23,
				165, 12, 0, 1, 166, 12, 0, 0, 0, 42,
				167, 12, 0, 0, 0, 1, 168, 12, 0, 11,
				168, 12, 0, 11, 169, 12, 0, 1, 170, 12,
				0, 0, 1, 171, 12, 1, 172, 12, 0, 23,
				172, 12, 1, 23, 173, 12, 1, 1, 174, 12,
				0, 23, 174, 12, 1, 23, 175, 12, 1, 1,
				176, 12, 0, 0, 1, 177, 12, 1, 178, 12,
				0, 11, 178, 12, 0, 11, 179, 12, 0, 1,
				180, 12, 0, 11, 180, 12, 0, 11, 181, 12,
				0, 1, 182, 12, 0, 11, 182, 12, 0, 11,
				183, 12, 0, 23, 184, 12, 0, 1, 185, 12,
				1, 186, 12, 1, 187, 12, 1, 188, 12, 129,
				228, 3, 1, 189, 12, 1, 190, 12, 1, 191,
				12, 1, 192, 12, 1, 193, 12, 1, 194, 12,
				1, 195, 12, 1, 196, 12, 1, 197, 12, 1,
				198, 12, 1, 199, 12, 1, 200, 12, 1, 201,
				12, 1, 202, 12, 1, 203, 12, 1, 204, 12,
				1, 187, 12, 1, 188, 12, 1, 205, 12, 0,
				0, 1, 206, 12, 1, 207, 12, 1, 208, 12,
				2, 209, 12, 108, 2, 209, 12, 113, 2, 210,
				12, 108, 2, 210, 12, 113, 1, 211, 12, 1,
				212, 12, 2, 141, 6, 108, 2, 141, 6, 113,
				2, 145, 6, 108, 2, 145, 6, 113, 2, 213,
				12, 108, 2, 213, 12, 113, 2, 147, 6, 108,
				2, 147, 6, 113, 1, 0, 0, 0, 0, 0,
				0, 1, 214, 12, 129, 228, 3, 1, 189, 12,
				1, 190, 12, 1, 191, 12, 1, 192, 12, 1,
				193, 12, 1, 194, 12, 1, 195, 12, 129, 19,
				129, 20, 129, 19, 129, 20, 1, 215, 12, 1,
				216, 12, 1, 217, 12, 1, 218, 12, 139, 62,
				0, 139, 63, 0, 139, 64, 0, 139, 65, 0,
				151, 66, 0, 139, 67, 0, 139, 68, 0, 139,
				69, 0, 129, 46, 1, 48, 1, 49, 129, 81,
				129, 15, 129, 16, 129, 17, 129, 50, 1, 158,
				5, 1, 48, 1, 49, 1, 211, 12, 1, 212,
				12, 168, 84, 28, 1, 168, 85, 29, 1, 1,
				182, 6, 1, 183, 6, 1, 185, 6, 1, 186,
				6, 129, 98, 1, 193, 6, 1, 194, 6, 1,
				196, 6, 1, 197, 6, 129, 56, 129, 57, 1,
				58, 1, 233, 6, 1, 236, 6, 1, 239, 6,
				1, 129, 7, 1, 160, 7, 129, 119, 129, 120,
				129, 121, 129, 122, 129, 123, 23, 178, 7, 0,
				23, 179, 7, 0, 1, 184, 7, 1, 186, 7,
				1, 188, 7, 11, 0, 0, 0, 0, 0, 11,
				219, 12, 0, 11, 220, 12, 0, 23, 221, 12,
				0, 23, 222, 12, 0, 23, 223, 12, 0, 23,
				224, 12, 0, 23, 225, 12, 0, 11, 0, 0,
				23, 226, 12, 0, 23, 227, 12, 0, 11, 0,
				0, 0, 1, 44, 1, 45, 1, 211, 7, 1,
				214, 7, 1, 228, 12, 1, 229, 12, 1, 230,
				12, 1, 231, 12, 1, 219, 7, 1, 220, 7,
				1, 221, 7, 1, 222, 7, 11, 0, 0, 0,
				0, 0, 0, 1, 232, 12, 11, 233, 12, 0,
				11, 234, 12, 0, 1, 235, 12, 1, 236, 12,
				11, 0, 0, 0, 0, 0, 1, 237, 12, 11,
				238, 12, 0, 1, 239, 12, 1, 240, 12, 1,
				136, 8, 1, 137, 8, 1, 140, 8, 1, 141,
				8, 11, 0, 0, 0, 11, 148, 8, 0, 11,
				149, 8, 0, 11, 152, 8, 0, 11, 153, 8,
				0, 11, 158, 8, 0, 11, 159, 8, 0, 11,
				162, 8, 0, 11, 163, 8, 0, 1, 166, 8,
				1, 167, 8, 1, 170, 8, 1, 171, 8, 11,
				241, 12, 0, 11, 178, 8, 0, 11, 179, 8,
				0, 11, 182, 8, 0, 11, 183, 8, 0, 11,
				188, 8, 0, 11, 189, 8, 0, 11, 192, 8,
				0, 11, 193, 8, 0, 11, 0, 0, 0, 1,
				242, 12, 1, 243, 12, 11, 202, 8, 0, 11,
				203, 8, 0, 11, 206, 8, 0, 11, 207, 8,
				0, 11, 210, 8, 0, 11, 211, 8, 0, 11,
				214, 8, 0, 11, 215, 8, 0, 11, 0, 0,
				1, 244, 12, 1, 245, 12, 1, 220, 8, 1,
				222, 8, 1, 246, 12, 1, 247, 12, 1, 224,
				8, 1, 226, 8, 23, 248, 12, 0, 23, 249,
				12, 0, 23, 250, 12, 0, 23, 251, 12, 0,
				11, 252, 12, 0, 1, 253, 12, 11, 0, 0,
				0, 0, 1, 254, 12, 1, 255, 12, 1, 128,
				13, 1, 129, 13, 1, 130, 13, 1, 131, 13,
				1, 132, 13, 1, 133, 13, 11, 0, 0, 0,
				0, 1, 134, 13, 1, 135, 13, 1, 136, 13,
				1, 137, 13, 1, 138, 13, 1, 139, 13, 1,
				140, 13, 1, 141, 13, 11, 0, 0, 0, 0,
				1, 155, 9, 1, 142, 13, 40, 184, 9, 31,
				0, 40, 186, 9, 30, 0, 23, 196, 9, 1,
				23, 197, 9, 1, 11, 143, 13, 0, 11, 144,
				13, 0, 11, 145, 13, 0, 11, 146, 13, 0,
				11, 147, 13, 0, 11, 148, 13, 0, 11, 149,
				13, 0, 11, 0, 0, 0, 11, 150, 13, 0,
				7, 0, 16, 7, 0, 32, 7, 0, 64, 7,
				0, 16, 7, 0, 32, 7, 0, 64, 7, 151,
				13, 16, 7, 151, 13, 32, 7, 151, 13, 64,
				7, 152, 13, 16, 7, 152, 13, 32, 7, 152,
				13, 64, 7, 153, 13, 16, 7, 153, 13, 32,
				7, 153, 13, 64, 1, 154, 13, 1, 155, 13,
				1, 156, 13, 1, 157, 13, 1, 158, 13, 1,
				159, 13, 1, 160, 13, 1, 161, 13, 0, 1,
				162, 13, 0, 1, 163, 13, 0, 1, 164, 13,
				0, 1, 165, 13, 0, 1, 166, 13, 0, 1,
				167, 13, 0, 1, 168, 13, 0, 1, 169, 13,
				0, 1, 170, 13, 0, 1, 171, 13, 5, 231,
				7, 120, 1, 5, 231, 7, 121, 1, 1, 172,
				13, 0, 1, 173, 13, 0, 1, 174, 13, 0,
				1, 175, 13, 0, 1, 176, 13, 0, 1, 177,
				13, 0, 1, 196, 8, 0, 1, 197, 8, 0,
				1, 178, 13, 0, 1, 179, 13, 0, 1, 180,
				13, 0, 1, 181, 13, 0, 1, 182, 13, 0,
				1, 183, 13, 0, 1, 184, 13, 0, 1, 185,
				13, 0, 1, 186, 13, 0, 1, 187, 13, 0,
				1, 188, 13, 0, 1, 189, 13, 0, 1, 190,
				13, 0, 1, 191, 13, 0, 1, 192, 13, 0,
				1, 193, 13, 0
			};
		}
	}
	[Flags]
	internal enum InstrOpInfoFlags : ushort
	{
		None = 0,
		MnemonicSuffixIfMem = 1,
		SizeOverrideMask = 3,
		OpSizeShift = 1,
		OpSize16 = 2,
		OpSize32 = 4,
		OpSize64 = 6,
		AddrSizeShift = 3,
		AddrSize16 = 8,
		AddrSize32 = 0x10,
		AddrSize64 = 0x18,
		IndirectOperand = 0x20,
		OpSizeIsByteDirective = 0x40,
		KeepOperandOrder = 0x80,
		JccNotTaken = 0x100,
		JccTaken = 0x200,
		BndPrefix = 0x400,
		IgnoreIndexReg = 0x800,
		MnemonicIsDirective = 0x1000
	}
	internal static class MemorySizes
	{
		public static readonly FormatterString[] AllMemorySizes = GetMemorySizes();

		private static FormatterString[] GetMemorySizes()
		{
			FormatterString formatterString = new FormatterString("");
			FormatterString formatterString2 = new FormatterString("1to2");
			FormatterString formatterString3 = new FormatterString("1to4");
			FormatterString formatterString4 = new FormatterString("1to8");
			FormatterString formatterString5 = new FormatterString("1to16");
			FormatterString formatterString6 = new FormatterString("1to32");
			ReadOnlySpan<byte> readOnlySpan = new byte[50]
			{
				1, 1, 1, 2, 1, 3, 3, 2, 2, 1,
				1, 1, 3, 2, 1, 2, 1, 1, 2, 2,
				4, 4, 3, 3, 2, 2, 2, 4, 3, 2,
				3, 2, 2, 3, 3, 5, 5, 4, 4, 3,
				3, 3, 5, 4, 3, 4, 4, 3, 3, 4
			};
			FormatterString[] array = new FormatterString[162];
			for (int i = 0; i < array.Length; i++)
			{
				FormatterString formatterString7 = ((i >= 112) ? (readOnlySpan[i - 112] switch
				{
					0 => formatterString, 
					1 => formatterString2, 
					2 => formatterString3, 
					3 => formatterString4, 
					4 => formatterString5, 
					5 => formatterString6, 
					_ => throw new InvalidOperationException(), 
				}) : formatterString);
				array[i] = formatterString7;
			}
			return array;
		}
	}
	internal static class Registers
	{
		public const Register Register_ST = Register.DontUse0;

		public static readonly FormatterString[] AllRegistersNaked = RegistersTable.GetRegisters();

		public static readonly FormatterString[] AllRegisters = GetRegistersWithPrefix();

		private static FormatterString[] GetRegistersWithPrefix()
		{
			FormatterString[] allRegistersNaked = AllRegistersNaked;
			FormatterString[] array = new FormatterString[allRegistersNaked.Length];
			for (int i = 0; i < allRegistersNaked.Length; i++)
			{
				array[i] = new FormatterString("%" + allRegistersNaked[i].Get(upper: false));
			}
			return array;
		}
	}
	internal enum SizeOverride
	{
		None,
		Size16,
		Size32,
		Size64
	}
}
namespace Iced.Intel.FormatterInternal
{
	internal readonly struct FormatterString
	{
		private readonly string lower;

		private readonly string upper;

		public int Length => lower.Length;

		public string Lower => lower;

		public FormatterString(string lower)
		{
			this.lower = lower;
			upper = string.Intern(lower.ToUpperInvariant());
		}

		public static FormatterString[] Create(string[] strings)
		{
			FormatterString[] array = new FormatterString[strings.Length];
			for (int i = 0; i < strings.Length; i++)
			{
				array[i] = new FormatterString(strings[i]);
			}
			return array;
		}

		public string Get(bool upper)
		{
			if (!upper)
			{
				return lower;
			}
			return this.upper;
		}
	}
	internal static class FormatterStringsTable
	{
		private const int MaxStringLength = 18;

		private const int StringsCount = 1730;

		public static string[] GetStringsTable()
		{
			DataReader dataReader = new DataReader(GetSerializedStrings(), 18);
			string[] array = new string[1730];
			for (int i = 0; i < array.Length; i++)
			{
				array[i] = dataReader.ReadAsciiString();
			}
			if (dataReader.CanRead)
			{
				throw new InvalidOperationException();
			}
			return array;
		}

		private static ReadOnlySpan<byte> GetSerializedStrings()
		{
			return new byte[14471]
			{
				5, 117, 110, 100, 111, 99, 3, 109, 111, 118,
				3, 110, 111, 112, 4, 112, 117, 115, 104, 3,
				97, 100, 100, 2, 111, 114, 3, 97, 100, 99,
				3, 115, 98, 98, 3, 97, 110, 100, 3, 115,
				117, 98, 3, 120, 111, 114, 3, 99, 109, 112,
				3, 112, 111, 112, 4, 116, 101, 115, 116, 4,
				109, 111, 118, 113, 5, 112, 115, 114, 108, 100,
				5, 112, 115, 114, 97, 100, 5, 112, 115, 108,
				108, 100, 3, 115, 104, 108, 6, 109, 111, 118,
				97, 112, 115, 6, 109, 111, 118, 97, 112, 100,
				5, 112, 115, 114, 108, 119, 5, 112, 115, 114,
				97, 119, 5, 112, 115, 108, 108, 119, 5, 112,
				115, 114, 108, 113, 5, 112, 115, 108, 108, 113,
				6, 112, 101, 120, 116, 114, 119, 4, 105, 109,
				117, 108, 3, 106, 109, 112, 3, 114, 111, 108,
				3, 114, 111, 114, 3, 114, 99, 108, 3, 114,
				99, 114, 3, 115, 104, 114, 3, 115, 97, 114,
				6, 109, 111, 118, 117, 112, 115, 6, 109, 111,
				118, 117, 112, 100, 5, 109, 111, 118, 115, 100,
				5, 109, 111, 118, 115, 115, 9, 118, 112, 101,
				114, 109, 105, 108, 112, 115, 9, 118, 112, 101,
				114, 109, 105, 108, 112, 100, 3, 115, 97, 108,
				3, 114, 101, 116, 4, 99, 97, 108, 108, 12,
				118, 112, 98, 114, 111, 97, 100, 99, 97, 115,
				116, 100, 12, 118, 112, 98, 114, 111, 97, 100,
				99, 97, 115, 116, 113, 7, 112, 99, 109, 112,
				103, 116, 100, 4, 109, 111, 118, 100, 9, 118,
				109, 111, 118, 100, 113, 97, 51, 50, 9, 118,
				109, 111, 118, 100, 113, 97, 54, 52, 7, 112,
				99, 109, 112, 101, 113, 100, 6, 108, 102, 101,
				110, 99, 101, 6, 109, 102, 101, 110, 99, 101,
				6, 115, 102, 101, 110, 99, 101, 6, 112, 105,
				110, 115, 114, 119, 8, 112, 109, 111, 118, 109,
				115, 107, 98, 5, 112, 115, 117, 98, 100, 5,
				112, 97, 100, 100, 100, 12, 118, 98, 114, 111,
				97, 100, 99, 97, 115, 116, 115, 115, 12, 118,
				112, 98, 114, 111, 97, 100, 99, 97, 115, 116,
				98, 12, 118, 112, 98, 114, 111, 97, 100, 99,
				97, 115, 116, 119, 4, 120, 99, 104, 103, 5,
				97, 100, 100, 112, 115, 5, 97, 100, 100, 112,
				100, 5, 109, 117, 108, 112, 115, 5, 109, 117,
				108, 112, 100, 8, 99, 118, 116, 112, 115, 50,
				112, 100, 8, 99, 118, 116, 112, 100, 50, 112,
				115, 5, 115, 117, 98, 112, 115, 5, 115, 117,
				98, 112, 100, 9, 112, 117, 110, 112, 99, 107,
				108, 98, 119, 9, 112, 117, 110, 112, 99, 107,
				108, 119, 100, 9, 112, 117, 110, 112, 99, 107,
				108, 100, 113, 8, 112, 97, 99, 107, 115, 115,
				119, 98, 7, 112, 99, 109, 112, 103, 116, 98,
				7, 112, 99, 109, 112, 103, 116, 119, 8, 112,
				97, 99, 107, 117, 115, 119, 98, 9, 112, 117,
				110, 112, 99, 107, 104, 98, 119, 9, 112, 117,
				110, 112, 99, 107, 104, 119, 100, 9, 112, 117,
				110, 112, 99, 107, 104, 100, 113, 8, 112, 97,
				99, 107, 115, 115, 100, 119, 6, 112, 115, 104,
				117, 102, 100, 7, 112, 99, 109, 112, 101, 113,
				98, 7, 112, 99, 109, 112, 101, 113, 119, 5,
				99, 109, 112, 112, 115, 5, 99, 109, 112, 112,
				100, 5, 112, 97, 100, 100, 113, 6, 112, 109,
				117, 108, 108, 119, 7, 112, 115, 117, 98, 117,
				115, 98, 7, 112, 115, 117, 98, 117, 115, 119,
				6, 112, 109, 105, 110, 117, 98, 7, 112, 97,
				100, 100, 117, 115, 98, 7, 112, 97, 100, 100,
				117, 115, 119, 6, 112, 109, 97, 120, 117, 98,
				5, 112, 97, 118, 103, 98, 5, 112, 97, 118,
				103, 119, 7, 112, 109, 117, 108, 104, 117, 119,
				6, 112, 109, 117, 108, 104, 119, 8, 99, 118,
				116, 100, 113, 50, 112, 100, 6, 112, 115, 117,
				98, 115, 98, 6, 112, 115, 117, 98, 115, 119,
				6, 112, 109, 105, 110, 115, 119, 6, 112, 97,
				100, 100, 115, 98, 6, 112, 97, 100, 100, 115,
				119, 6, 112, 109, 97, 120, 115, 119, 7, 112,
				109, 117, 108, 117, 100, 113, 7, 112, 109, 97,
				100, 100, 119, 100, 6, 112, 115, 97, 100, 98,
				119, 5, 112, 115, 117, 98, 98, 5, 112, 115,
				117, 98, 119, 5, 112, 115, 117, 98, 113, 5,
				112, 97, 100, 100, 98, 5, 112, 97, 100, 100,
				119, 6, 112, 115, 104, 117, 102, 98, 9, 112,
				109, 97, 100, 100, 117, 98, 115, 119, 8, 112,
				109, 117, 108, 104, 114, 115, 119, 5, 112, 97,
				98, 115, 98, 5, 112, 97, 98, 115, 119, 5,
				112, 97, 98, 115, 100, 6, 112, 109, 105, 110,
				115, 100, 6, 112, 109, 105, 110, 117, 100, 6,
				112, 109, 97, 120, 115, 100, 6, 112, 109, 97,
				120, 117, 100, 6, 112, 109, 117, 108, 108, 100,
				7, 112, 97, 108, 105, 103, 110, 114, 4, 102,
				115, 116, 112, 6, 108, 111, 111, 112, 110, 101,
				5, 108, 111, 111, 112, 101, 5, 40, 98, 97,
				100, 41, 5, 46, 98, 121, 116, 101, 2, 100,
				98, 5, 46, 119, 111, 114, 100, 2, 100, 119,
				4, 46, 105, 110, 116, 2, 100, 100, 5, 46,
				113, 117, 97, 100, 2, 100, 113, 3, 100, 97,
				97, 3, 100, 97, 115, 3, 97, 97, 97, 3,
				97, 97, 115, 3, 105, 110, 99, 3, 100, 101,
				99, 5, 112, 117, 115, 104, 97, 6, 112, 117,
				115, 104, 97, 100, 4, 112, 111, 112, 97, 5,
				112, 111, 112, 97, 100, 5, 98, 111, 117, 110,
				100, 4, 97, 114, 112, 108, 6, 109, 111, 118,
				115, 120, 100, 6, 109, 111, 118, 115, 108, 113,
				3, 105, 110, 115, 4, 105, 110, 115, 98, 4,
				105, 110, 115, 119, 4, 105, 110, 115, 100, 4,
				111, 117, 116, 115, 5, 111, 117, 116, 115, 98,
				5, 111, 117, 116, 115, 119, 5, 111, 117, 116,
				115, 100, 2, 106, 111, 3, 106, 110, 111, 2,
				106, 98, 2, 106, 99, 4, 106, 110, 97, 101,
				3, 106, 97, 101, 3, 106, 110, 98, 3, 106,
				110, 99, 2, 106, 101, 2, 106, 122, 3, 106,
				110, 101, 3, 106, 110, 122, 3, 106, 98, 101,
				3, 106, 110, 97, 2, 106, 97, 4, 106, 110,
				98, 101, 2, 106, 115, 3, 106, 110, 115, 2,
				106, 112, 3, 106, 112, 101, 3, 106, 110, 112,
				3, 106, 112, 111, 2, 106, 108, 4, 106, 110,
				103, 101, 3, 106, 103, 101, 3, 106, 110, 108,
				3, 106, 108, 101, 3, 106, 110, 103, 2, 106,
				103, 4, 106, 110, 108, 101, 3, 108, 101, 97,
				5, 112, 97, 117, 115, 101, 4, 99, 98, 116,
				119, 3, 99, 98, 119, 4, 99, 119, 100, 101,
				4, 99, 119, 116, 108, 4, 99, 100, 113, 101,
				4, 99, 108, 116, 113, 3, 99, 119, 100, 4,
				99, 119, 116, 100, 3, 99, 100, 113, 4, 99,
				108, 116, 100, 3, 99, 113, 111, 4, 99, 113,
				116, 111, 5, 108, 99, 97, 108, 108, 5, 102,
				119, 97, 105, 116, 4, 119, 97, 105, 116, 5,
				112, 117, 115, 104, 102, 6, 112, 117, 115, 104,
				102, 100, 6, 112, 117, 115, 104, 102, 113, 4,
				112, 111, 112, 102, 5, 112, 111, 112, 102, 100,
				5, 112, 111, 112, 102, 113, 4, 115, 97, 104,
				102, 4, 108, 97, 104, 102, 6, 109, 111, 118,
				97, 98, 115, 4, 109, 111, 118, 115, 5, 109,
				111, 118, 115, 98, 5, 109, 111, 118, 115, 119,
				5, 109, 111, 118, 115, 113, 4, 99, 109, 112,
				115, 5, 99, 109, 112, 115, 98, 5, 99, 109,
				112, 115, 119, 5, 99, 109, 112, 115, 113, 4,
				115, 116, 111, 115, 5, 115, 116, 111, 115, 98,
				5, 115, 116, 111, 115, 119, 5, 115, 116, 111,
				115, 100, 5, 115, 116, 111, 115, 113, 4, 108,
				111, 100, 115, 5, 108, 111, 100, 115, 98, 5,
				108, 111, 100, 115, 119, 5, 108, 111, 100, 115,
				100, 5, 108, 111, 100, 115, 113, 4, 115, 99,
				97, 115, 5, 115, 99, 97, 115, 98, 5, 115,
				99, 97, 115, 119, 5, 115, 99, 97, 115, 100,
				5, 115, 99, 97, 115, 113, 4, 114, 101, 116,
				119, 4, 114, 101, 116, 100, 4, 114, 101, 116,
				108, 5, 114, 101, 116, 110, 100, 3, 108, 101,
				115, 3, 108, 100, 115, 6, 120, 97, 98, 111,
				114, 116, 6, 120, 98, 101, 103, 105, 110, 5,
				101, 110, 116, 101, 114, 5, 108, 101, 97, 118,
				101, 4, 108, 114, 101, 116, 4, 114, 101, 116,
				102, 5, 114, 101, 116, 102, 119, 5, 114, 101,
				116, 102, 100, 5, 114, 101, 116, 102, 113, 4,
				105, 110, 116, 51, 3, 105, 110, 116, 4, 105,
				110, 116, 111, 4, 105, 114, 101, 116, 5, 105,
				114, 101, 116, 100, 5, 105, 114, 101, 116, 113,
				3, 97, 97, 109, 3, 97, 97, 100, 4, 115,
				97, 108, 99, 4, 120, 108, 97, 116, 5, 120,
				108, 97, 116, 98, 4, 102, 97, 100, 100, 4,
				102, 109, 117, 108, 4, 102, 99, 111, 109, 5,
				102, 99, 111, 109, 112, 4, 102, 115, 117, 98,
				5, 102, 115, 117, 98, 114, 4, 102, 100, 105,
				118, 5, 102, 100, 105, 118, 114, 3, 102, 108,
				100, 3, 102, 115, 116, 6, 102, 108, 100, 101,
				110, 118, 5, 102, 108, 100, 99, 119, 7, 102,
				110, 115, 116, 101, 110, 118, 6, 102, 115, 116,
				101, 110, 118, 6, 102, 110, 115, 116, 99, 119,
				5, 102, 115, 116, 99, 119, 4, 102, 120, 99,
				104, 4, 102, 110, 111, 112, 7, 102, 115, 116,
				112, 110, 99, 101, 4, 102, 99, 104, 115, 4,
				102, 97, 98, 115, 4, 102, 116, 115, 116, 4,
				102, 120, 97, 109, 4, 102, 108, 100, 49, 6,
				102, 108, 100, 108, 50, 116, 6, 102, 108, 100,
				108, 50, 101, 5, 102, 108, 100, 112, 105, 6,
				102, 108, 100, 108, 103, 50, 6, 102, 108, 100,
				108, 110, 50, 4, 102, 108, 100, 122, 5, 102,
				50, 120, 109, 49, 5, 102, 121, 108, 50, 120,
				5, 102, 112, 116, 97, 110, 6, 102, 112, 97,
				116, 97, 110, 7, 102, 120, 116, 114, 97, 99,
				116, 6, 102, 112, 114, 101, 109, 49, 7, 102,
				100, 101, 99, 115, 116, 112, 7, 102, 105, 110,
				99, 115, 116, 112, 5, 102, 112, 114, 101, 109,
				7, 102, 121, 108, 50, 120, 112, 49, 5, 102,
				115, 113, 114, 116, 7, 102, 115, 105, 110, 99,
				111, 115, 7, 102, 114, 110, 100, 105, 110, 116,
				6, 102, 115, 99, 97, 108, 101, 4, 102, 115,
				105, 110, 4, 102, 99, 111, 115, 5, 102, 105,
				97, 100, 100, 5, 102, 105, 109, 117, 108, 5,
				102, 105, 99, 111, 109, 6, 102, 105, 99, 111,
				109, 112, 5, 102, 105, 115, 117, 98, 6, 102,
				105, 115, 117, 98, 114, 5, 102, 105, 100, 105,
				118, 6, 102, 105, 100, 105, 118, 114, 6, 102,
				99, 109, 111, 118, 98, 6, 102, 99, 109, 111,
				118, 101, 7, 102, 99, 109, 111, 118, 98, 101,
				6, 102, 99, 109, 111, 118, 117, 7, 102, 117,
				99, 111, 109, 112, 112, 4, 102, 105, 108, 100,
				6, 102, 105, 115, 116, 116, 112, 4, 102, 105,
				115, 116, 5, 102, 105, 115, 116, 112, 7, 102,
				99, 109, 111, 118, 110, 98, 7, 102, 99, 109,
				111, 118, 110, 101, 8, 102, 99, 109, 111, 118,
				110, 98, 101, 7, 102, 99, 109, 111, 118, 110,
				117, 5, 102, 110, 101, 110, 105, 4, 102, 101,
				110, 105, 6, 102, 110, 100, 105, 115, 105, 5,
				102, 100, 105, 115, 105, 6, 102, 110, 99, 108,
				101, 120, 5, 102, 99, 108, 101, 120, 6, 102,
				110, 105, 110, 105, 116, 5, 102, 105, 110, 105,
				116, 7, 102, 110, 115, 101, 116, 112, 109, 6,
				102, 115, 101, 116, 112, 109, 6, 102, 114, 115,
				116, 112, 109, 6, 102, 117, 99, 111, 109, 105,
				5, 102, 99, 111, 109, 105, 8, 102, 105, 115,
				116, 116, 112, 108, 108, 6, 102, 114, 115, 116,
				111, 114, 6, 102, 110, 115, 97, 118, 101, 5,
				102, 115, 97, 118, 101, 6, 102, 110, 115, 116,
				115, 119, 5, 102, 115, 116, 115, 119, 5, 102,
				102, 114, 101, 101, 5, 102, 117, 99, 111, 109,
				6, 102, 117, 99, 111, 109, 112, 5, 102, 97,
				100, 100, 112, 5, 102, 109, 117, 108, 112, 6,
				102, 99, 111, 109, 112, 112, 5, 102, 115, 117,
				98, 112, 6, 102, 115, 117, 98, 114, 112, 5,
				102, 100, 105, 118, 112, 6, 102, 100, 105, 118,
				114, 112, 4, 102, 98, 108, 100, 6, 102, 105,
				108, 100, 108, 108, 5, 102, 98, 115, 116, 112,
				7, 102, 105, 115, 116, 112, 108, 108, 6, 102,
				102, 114, 101, 101, 112, 5, 102, 115, 116, 100,
				119, 5, 102, 115, 116, 115, 103, 7, 102, 117,
				99, 111, 109, 105, 112, 6, 102, 99, 111, 109,
				105, 112, 6, 108, 111, 111, 112, 110, 122, 7,
				108, 111, 111, 112, 110, 101, 100, 7, 108, 111,
				111, 112, 110, 122, 100, 5, 108, 111, 111, 112,
				122, 6, 108, 111, 111, 112, 101, 100, 6, 108,
				111, 111, 112, 122, 100, 4, 108, 111, 111, 112,
				5, 108, 111, 111, 112, 100, 4, 106, 99, 120,
				122, 5, 106, 101, 99, 120, 122, 5, 106, 114,
				99, 120, 122, 2, 105, 110, 3, 111, 117, 116,
				4, 108, 106, 109, 112, 4, 105, 110, 116, 49,
				3, 104, 108, 116, 3, 99, 109, 99, 3, 110,
				111, 116, 3, 110, 101, 103, 3, 109, 117, 108,
				3, 100, 105, 118, 4, 105, 100, 105, 118, 3,
				99, 108, 99, 3, 115, 116, 99, 3, 99, 108,
				105, 3, 115, 116, 105, 3, 99, 108, 100, 3,
				115, 116, 100, 5, 99, 97, 108, 108, 102, 4,
				106, 109, 112, 102, 4, 115, 108, 100, 116, 3,
				115, 116, 114, 4, 108, 108, 100, 116, 3, 108,
				116, 114, 4, 118, 101, 114, 114, 4, 118, 101,
				114, 119, 4, 106, 109, 112, 101, 4, 115, 103,
				100, 116, 4, 115, 105, 100, 116, 4, 108, 103,
				100, 116, 4, 108, 105, 100, 116, 4, 115, 109,
				115, 119, 8, 114, 115, 116, 111, 114, 115, 115,
				112, 4, 108, 109, 115, 119, 6, 105, 110, 118,
				108, 112, 103, 5, 101, 110, 99, 108, 118, 6,
				118, 109, 99, 97, 108, 108, 8, 118, 109, 108,
				97, 117, 110, 99, 104, 8, 118, 109, 114, 101,
				115, 117, 109, 101, 6, 118, 109, 120, 111, 102,
				102, 7, 112, 99, 111, 110, 102, 105, 103, 7,
				109, 111, 110, 105, 116, 111, 114, 5, 109, 119,
				97, 105, 116, 4, 99, 108, 97, 99, 4, 115,
				116, 97, 99, 5, 101, 110, 99, 108, 115, 6,
				120, 103, 101, 116, 98, 118, 6, 120, 115, 101,
				116, 98, 118, 6, 118, 109, 102, 117, 110, 99,
				4, 120, 101, 110, 100, 5, 120, 116, 101, 115,
				116, 5, 101, 110, 99, 108, 117, 5, 118, 109,
				114, 117, 110, 7, 118, 109, 109, 99, 97, 108,
				108, 6, 118, 109, 108, 111, 97, 100, 6, 118,
				109, 115, 97, 118, 101, 4, 115, 116, 103, 105,
				4, 99, 108, 103, 105, 6, 115, 107, 105, 110,
				105, 116, 7, 105, 110, 118, 108, 112, 103, 97,
				8, 115, 101, 116, 115, 115, 98, 115, 121, 11,
				115, 97, 118, 101, 112, 114, 101, 118, 115, 115,
				112, 6, 114, 100, 112, 107, 114, 117, 6, 119,
				114, 112, 107, 114, 117, 6, 115, 119, 97, 112,
				103, 115, 6, 114, 100, 116, 115, 99, 112, 8,
				109, 111, 110, 105, 116, 111, 114, 120, 7, 109,
				99, 111, 109, 109, 105, 116, 6, 109, 119, 97,
				105, 116, 120, 6, 99, 108, 122, 101, 114, 111,
				5, 114, 100, 112, 114, 117, 3, 108, 97, 114,
				3, 108, 115, 108, 8, 115, 116, 111, 114, 101,
				97, 108, 108, 10, 108, 111, 97, 100, 97, 108,
				108, 50, 56, 54, 7, 115, 121, 115, 99, 97,
				108, 108, 4, 99, 108, 116, 115, 7, 108, 111,
				97, 100, 97, 108, 108, 10, 108, 111, 97, 100,
				97, 108, 108, 51, 56, 54, 6, 115, 121, 115,
				114, 101, 116, 7, 115, 121, 115, 114, 101, 116,
				113, 4, 105, 110, 118, 100, 6, 119, 98, 105,
				110, 118, 100, 8, 119, 98, 110, 111, 105, 110,
				118, 100, 8, 99, 108, 49, 105, 110, 118, 109,
				98, 3, 117, 100, 50, 8, 112, 114, 101, 102,
				101, 116, 99, 104, 18, 112, 114, 101, 102, 101,
				116, 99, 104, 95, 101, 120, 99, 108, 117, 115,
				105, 118, 101, 9, 112, 114, 101, 102, 101, 116,
				99, 104, 119, 11, 112, 114, 101, 102, 101, 116,
				99, 104, 119, 116, 49, 5, 102, 101, 109, 109,
				115, 4, 117, 109, 111, 118, 7, 109, 111, 118,
				104, 108, 112, 115, 6, 109, 111, 118, 108, 112,
				115, 6, 109, 111, 118, 108, 112, 100, 8, 109,
				111, 118, 115, 108, 100, 117, 112, 7, 109, 111,
				118, 100, 100, 117, 112, 8, 117, 110, 112, 99,
				107, 108, 112, 115, 8, 117, 110, 112, 99, 107,
				108, 112, 100, 8, 117, 110, 112, 99, 107, 104,
				112, 115, 8, 117, 110, 112, 99, 107, 104, 112,
				100, 7, 109, 111, 118, 108, 104, 112, 115, 6,
				109, 111, 118, 104, 112, 115, 6, 109, 111, 118,
				104, 112, 100, 8, 109, 111, 118, 115, 104, 100,
				117, 112, 11, 112, 114, 101, 102, 101, 116, 99,
				104, 110, 116, 97, 10, 112, 114, 101, 102, 101,
				116, 99, 104, 116, 48, 10, 112, 114, 101, 102,
				101, 116, 99, 104, 116, 49, 10, 112, 114, 101,
				102, 101, 116, 99, 104, 116, 50, 6, 98, 110,
				100, 108, 100, 120, 6, 98, 110, 100, 109, 111,
				118, 5, 98, 110, 100, 99, 108, 5, 98, 110,
				100, 99, 117, 6, 98, 110, 100, 115, 116, 120,
				5, 98, 110, 100, 109, 107, 5, 98, 110, 100,
				99, 110, 8, 99, 108, 100, 101, 109, 111, 116,
				101, 6, 114, 100, 115, 115, 112, 100, 6, 114,
				100, 115, 115, 112, 113, 7, 101, 110, 100, 98,
				114, 54, 52, 7, 101, 110, 100, 98, 114, 51,
				50, 8, 99, 118, 116, 112, 105, 50, 112, 115,
				8, 99, 118, 116, 112, 105, 50, 112, 100, 8,
				99, 118, 116, 115, 105, 50, 115, 115, 8, 99,
				118, 116, 115, 105, 50, 115, 100, 7, 109, 111,
				118, 110, 116, 112, 115, 7, 109, 111, 118, 110,
				116, 112, 100, 7, 109, 111, 118, 110, 116, 115,
				115, 7, 109, 111, 118, 110, 116, 115, 100, 9,
				99, 118, 116, 116, 112, 115, 50, 112, 105, 9,
				99, 118, 116, 116, 112, 100, 50, 112, 105, 9,
				99, 118, 116, 116, 115, 115, 50, 115, 105, 9,
				99, 118, 116, 116, 115, 100, 50, 115, 105, 8,
				99, 118, 116, 112, 115, 50, 112, 105, 8, 99,
				118, 116, 112, 100, 50, 112, 105, 8, 99, 118,
				116, 115, 115, 50, 115, 105, 8, 99, 118, 116,
				115, 100, 50, 115, 105, 7, 117, 99, 111, 109,
				105, 115, 115, 7, 117, 99, 111, 109, 105, 115,
				100, 6, 99, 111, 109, 105, 115, 115, 6, 99,
				111, 109, 105, 115, 100, 5, 119, 114, 109, 115,
				114, 5, 114, 100, 116, 115, 99, 5, 114, 100,
				109, 115, 114, 5, 114, 100, 112, 109, 99, 8,
				115, 121, 115, 101, 110, 116, 101, 114, 7, 115,
				121, 115, 101, 120, 105, 116, 8, 115, 121, 115,
				101, 120, 105, 116, 113, 6, 103, 101, 116, 115,
				101, 99, 5, 99, 109, 111, 118, 111, 6, 99,
				109, 111, 118, 110, 111, 5, 99, 109, 111, 118,
				98, 5, 99, 109, 111, 118, 99, 7, 99, 109,
				111, 118, 110, 97, 101, 6, 99, 109, 111, 118,
				97, 101, 6, 99, 109, 111, 118, 110, 98, 6,
				99, 109, 111, 118, 110, 99, 5, 99, 109, 111,
				118, 101, 5, 99, 109, 111, 118, 122, 6, 99,
				109, 111, 118, 110, 101, 6, 99, 109, 111, 118,
				110, 122, 6, 99, 109, 111, 118, 98, 101, 6,
				99, 109, 111, 118, 110, 97, 5, 99, 109, 111,
				118, 97, 7, 99, 109, 111, 118, 110, 98, 101,
				5, 99, 109, 111, 118, 115, 6, 99, 109, 111,
				118, 110, 115, 5, 99, 109, 111, 118, 112, 6,
				99, 109, 111, 118, 112, 101, 6, 99, 109, 111,
				118, 110, 112, 6, 99, 109, 111, 118, 112, 111,
				5, 99, 109, 111, 118, 108, 7, 99, 109, 111,
				118, 110, 103, 101, 6, 99, 109, 111, 118, 103,
				101, 6, 99, 109, 111, 118, 110, 108, 6, 99,
				109, 111, 118, 108, 101, 6, 99, 109, 111, 118,
				110, 103, 5, 99, 109, 111, 118, 103, 7, 99,
				109, 111, 118, 110, 108, 101, 5, 107, 97, 110,
				100, 119, 5, 107, 97, 110, 100, 113, 5, 107,
				97, 110, 100, 98, 5, 107, 97, 110, 100, 100,
				6, 107, 97, 110, 100, 110, 119, 6, 107, 97,
				110, 100, 110, 113, 6, 107, 97, 110, 100, 110,
				98, 6, 107, 97, 110, 100, 110, 100, 5, 107,
				110, 111, 116, 119, 5, 107, 110, 111, 116, 113,
				5, 107, 110, 111, 116, 98, 5, 107, 110, 111,
				116, 100, 4, 107, 111, 114, 119, 4, 107, 111,
				114, 113, 4, 107, 111, 114, 98, 4, 107, 111,
				114, 100, 6, 107, 120, 110, 111, 114, 119, 6,
				107, 120, 110, 111, 114, 113, 6, 107, 120, 110,
				111, 114, 98, 6, 107, 120, 110, 111, 114, 100,
				5, 107, 120, 111, 114, 119, 5, 107, 120, 111,
				114, 113, 5, 107, 120, 111, 114, 98, 5, 107,
				120, 111, 114, 100, 5, 107, 97, 100, 100, 119,
				5, 107, 97, 100, 100, 113, 5, 107, 97, 100,
				100, 98, 5, 107, 97, 100, 100, 100, 8, 107,
				117, 110, 112, 99, 107, 119, 100, 8, 107, 117,
				110, 112, 99, 107, 100, 113, 8, 107, 117, 110,
				112, 99, 107, 98, 119, 8, 109, 111, 118, 109,
				115, 107, 112, 115, 8, 109, 111, 118, 109, 115,
				107, 112, 100, 6, 115, 113, 114, 116, 112, 115,
				6, 115, 113, 114, 116, 112, 100, 6, 115, 113,
				114, 116, 115, 115, 6, 115, 113, 114, 116, 115,
				100, 7, 114, 115, 113, 114, 116, 112, 115, 7,
				114, 115, 113, 114, 116, 115, 115, 5, 114, 99,
				112, 112, 115, 5, 114, 99, 112, 115, 115, 5,
				97, 110, 100, 112, 115, 5, 97, 110, 100, 112,
				100, 6, 97, 110, 100, 110, 112, 115, 6, 97,
				110, 100, 110, 112, 100, 4, 111, 114, 112, 115,
				4, 111, 114, 112, 100, 5, 120, 111, 114, 112,
				115, 5, 120, 111, 114, 112, 100, 5, 97, 100,
				100, 115, 115, 5, 97, 100, 100, 115, 100, 5,
				109, 117, 108, 115, 115, 5, 109, 117, 108, 115,
				100, 8, 99, 118, 116, 115, 115, 50, 115, 100,
				8, 99, 118, 116, 115, 100, 50, 115, 115, 8,
				99, 118, 116, 100, 113, 50, 112, 115, 9, 118,
				99, 118, 116, 113, 113, 50, 112, 115, 8, 99,
				118, 116, 112, 115, 50, 100, 113, 9, 99, 118,
				116, 116, 112, 115, 50, 100, 113, 5, 115, 117,
				98, 115, 115, 5, 115, 117, 98, 115, 100, 5,
				109, 105, 110, 112, 115, 5, 109, 105, 110, 112,
				100, 5, 109, 105, 110, 115, 115, 5, 109, 105,
				110, 115, 100, 5, 100, 105, 118, 112, 115, 5,
				100, 105, 118, 112, 100, 5, 100, 105, 118, 115,
				115, 5, 100, 105, 118, 115, 100, 5, 109, 97,
				120, 112, 115, 5, 109, 97, 120, 112, 100, 5,
				109, 97, 120, 115, 115, 5, 109, 97, 120, 115,
				100, 10, 112, 117, 110, 112, 99, 107, 108, 113,
				100, 113, 10, 112, 117, 110, 112, 99, 107, 104,
				113, 100, 113, 6, 109, 111, 118, 100, 113, 97,
				6, 109, 111, 118, 100, 113, 117, 9, 118, 109,
				111, 118, 100, 113, 117, 51, 50, 9, 118, 109,
				111, 118, 100, 113, 117, 54, 52, 8, 118, 109,
				111, 118, 100, 113, 117, 56, 9, 118, 109, 111,
				118, 100, 113, 117, 49, 54, 6, 112, 115, 104,
				117, 102, 119, 7, 112, 115, 104, 117, 102, 104,
				119, 7, 112, 115, 104, 117, 102, 108, 119, 6,
				118, 112, 114, 111, 114, 100, 6, 118, 112, 114,
				111, 114, 113, 6, 118, 112, 114, 111, 108, 100,
				6, 118, 112, 114, 111, 108, 113, 6, 118, 112,
				115, 114, 97, 113, 6, 112, 115, 114, 108, 100,
				113, 6, 112, 115, 108, 108, 100, 113, 4, 101,
				109, 109, 115, 10, 118, 122, 101, 114, 111, 117,
				112, 112, 101, 114, 8, 118, 122, 101, 114, 111,
				97, 108, 108, 6, 118, 109, 114, 101, 97, 100,
				11, 118, 99, 118, 116, 116, 112, 115, 50, 117,
				100, 113, 11, 118, 99, 118, 116, 116, 112, 100,
				50, 117, 100, 113, 5, 101, 120, 116, 114, 113,
				11, 118, 99, 118, 116, 116, 112, 115, 50, 117,
				113, 113, 11, 118, 99, 118, 116, 116, 112, 100,
				50, 117, 113, 113, 11, 118, 99, 118, 116, 116,
				115, 115, 50, 117, 115, 105, 7, 105, 110, 115,
				101, 114, 116, 113, 11, 118, 99, 118, 116, 116,
				115, 100, 50, 117, 115, 105, 7, 118, 109, 119,
				114, 105, 116, 101, 10, 118, 99, 118, 116, 112,
				115, 50, 117, 100, 113, 10, 118, 99, 118, 116,
				112, 100, 50, 117, 100, 113, 10, 118, 99, 118,
				116, 112, 115, 50, 117, 113, 113, 10, 118, 99,
				118, 116, 112, 100, 50, 117, 113, 113, 10, 118,
				99, 118, 116, 115, 115, 50, 117, 115, 105, 10,
				118, 99, 118, 116, 115, 100, 50, 117, 115, 105,
				10, 118, 99, 118, 116, 116, 112, 115, 50, 113,
				113, 10, 118, 99, 118, 116, 116, 112, 100, 50,
				113, 113, 10, 118, 99, 118, 116, 117, 100, 113,
				50, 112, 100, 10, 118, 99, 118, 116, 117, 113,
				113, 50, 112, 100, 10, 118, 99, 118, 116, 117,
				100, 113, 50, 112, 115, 10, 118, 99, 118, 116,
				117, 113, 113, 50, 112, 115, 9, 118, 99, 118,
				116, 112, 115, 50, 113, 113, 9, 118, 99, 118,
				116, 112, 100, 50, 113, 113, 10, 118, 99, 118,
				116, 117, 115, 105, 50, 115, 115, 10, 118, 99,
				118, 116, 117, 115, 105, 50, 115, 100, 6, 104,
				97, 100, 100, 112, 100, 6, 104, 97, 100, 100,
				112, 115, 6, 104, 115, 117, 98, 112, 100, 6,
				104, 115, 117, 98, 112, 115, 4, 115, 101, 116,
				111, 5, 115, 101, 116, 110, 111, 4, 115, 101,
				116, 98, 4, 115, 101, 116, 99, 6, 115, 101,
				116, 110, 97, 101, 5, 115, 101, 116, 97, 101,
				5, 115, 101, 116, 110, 98, 5, 115, 101, 116,
				110, 99, 4, 115, 101, 116, 101, 4, 115, 101,
				116, 122, 5, 115, 101, 116, 110, 101, 5, 115,
				101, 116, 110, 122, 5, 115, 101, 116, 98, 101,
				5, 115, 101, 116, 110, 97, 4, 115, 101, 116,
				97, 6, 115, 101, 116, 110, 98, 101, 4, 115,
				101, 116, 115, 5, 115, 101, 116, 110, 115, 4,
				115, 101, 116, 112, 5, 115, 101, 116, 112, 101,
				5, 115, 101, 116, 110, 112, 5, 115, 101, 116,
				112, 111, 4, 115, 101, 116, 108, 6, 115, 101,
				116, 110, 103, 101, 5, 115, 101, 116, 103, 101,
				5, 115, 101, 116, 110, 108, 5, 115, 101, 116,
				108, 101, 5, 115, 101, 116, 110, 103, 4, 115,
				101, 116, 103, 6, 115, 101, 116, 110, 108, 101,
				5, 107, 109, 111, 118, 119, 5, 107, 109, 111,
				118, 113, 5, 107, 109, 111, 118, 98, 5, 107,
				109, 111, 118, 100, 8, 107, 111, 114, 116, 101,
				115, 116, 119, 8, 107, 111, 114, 116, 101, 115,
				116, 113, 8, 107, 111, 114, 116, 101, 115, 116,
				98, 8, 107, 111, 114, 116, 101, 115, 116, 100,
				6, 107, 116, 101, 115, 116, 119, 6, 107, 116,
				101, 115, 116, 113, 6, 107, 116, 101, 115, 116,
				98, 6, 107, 116, 101, 115, 116, 100, 5, 99,
				112, 117, 105, 100, 2, 98, 116, 4, 115, 104,
				108, 100, 7, 109, 111, 110, 116, 109, 117, 108,
				5, 120, 115, 104, 97, 49, 7, 120, 115, 104,
				97, 50, 53, 54, 4, 120, 98, 116, 115, 6,
				120, 115, 116, 111, 114, 101, 9, 120, 99, 114,
				121, 112, 116, 101, 99, 98, 9, 120, 99, 114,
				121, 112, 116, 99, 98, 99, 9, 120, 99, 114,
				121, 112, 116, 99, 116, 114, 9, 120, 99, 114,
				121, 112, 116, 99, 102, 98, 9, 120, 99, 114,
				121, 112, 116, 111, 102, 98, 4, 105, 98, 116,
				115, 10, 99, 109, 112, 120, 99, 104, 103, 52,
				56, 54, 3, 114, 115, 109, 3, 98, 116, 115,
				4, 115, 104, 114, 100, 6, 102, 120, 115, 97,
				118, 101, 8, 102, 120, 115, 97, 118, 101, 54,
				52, 8, 114, 100, 102, 115, 98, 97, 115, 101,
				7, 102, 120, 114, 115, 116, 111, 114, 9, 102,
				120, 114, 115, 116, 111, 114, 54, 52, 8, 114,
				100, 103, 115, 98, 97, 115, 101, 7, 108, 100,
				109, 120, 99, 115, 114, 8, 119, 114, 102, 115,
				98, 97, 115, 101, 7, 115, 116, 109, 120, 99,
				115, 114, 8, 119, 114, 103, 115, 98, 97, 115,
				101, 5, 120, 115, 97, 118, 101, 7, 120, 115,
				97, 118, 101, 54, 52, 7, 112, 116, 119, 114,
				105, 116, 101, 6, 120, 114, 115, 116, 111, 114,
				8, 120, 114, 115, 116, 111, 114, 54, 52, 7,
				105, 110, 99, 115, 115, 112, 100, 7, 105, 110,
				99, 115, 115, 112, 113, 8, 120, 115, 97, 118,
				101, 111, 112, 116, 10, 120, 115, 97, 118, 101,
				111, 112, 116, 54, 52, 4, 99, 108, 119, 98,
				6, 116, 112, 97, 117, 115, 101, 8, 99, 108,
				114, 115, 115, 98, 115, 121, 8, 117, 109, 111,
				110, 105, 116, 111, 114, 6, 117, 109, 119, 97,
				105, 116, 7, 99, 108, 102, 108, 117, 115, 104,
				10, 99, 108, 102, 108, 117, 115, 104, 111, 112,
				116, 7, 112, 99, 111, 109, 109, 105, 116, 7,
				99, 109, 112, 120, 99, 104, 103, 3, 108, 115,
				115, 3, 98, 116, 114, 3, 108, 102, 115, 3,
				108, 103, 115, 6, 109, 111, 118, 122, 98, 119,
				5, 109, 111, 118, 122, 120, 6, 109, 111, 118,
				122, 98, 108, 6, 109, 111, 118, 122, 98, 113,
				6, 109, 111, 118, 122, 120, 119, 6, 109, 111,
				118, 122, 119, 108, 6, 109, 111, 118, 122, 119,
				113, 6, 112, 111, 112, 99, 110, 116, 3, 117,
				100, 49, 3, 98, 116, 99, 3, 98, 115, 102,
				5, 116, 122, 99, 110, 116, 3, 98, 115, 114,
				5, 108, 122, 99, 110, 116, 6, 109, 111, 118,
				115, 98, 119, 5, 109, 111, 118, 115, 120, 6,
				109, 111, 118, 115, 98, 108, 6, 109, 111, 118,
				115, 98, 113, 6, 109, 111, 118, 115, 120, 119,
				6, 109, 111, 118, 115, 119, 108, 6, 109, 111,
				118, 115, 119, 113, 4, 120, 97, 100, 100, 5,
				99, 109, 112, 115, 115, 5, 99, 109, 112, 115,
				100, 6, 109, 111, 118, 110, 116, 105, 6, 115,
				104, 117, 102, 112, 115, 6, 115, 104, 117, 102,
				112, 100, 9, 99, 109, 112, 120, 99, 104, 103,
				56, 98, 10, 99, 109, 112, 120, 99, 104, 103,
				49, 54, 98, 7, 120, 114, 115, 116, 111, 114,
				115, 9, 120, 114, 115, 116, 111, 114, 115, 54,
				52, 6, 120, 115, 97, 118, 101, 99, 8, 120,
				115, 97, 118, 101, 99, 54, 52, 6, 120, 115,
				97, 118, 101, 115, 8, 120, 115, 97, 118, 101,
				115, 54, 52, 7, 118, 109, 112, 116, 114, 108,
				100, 7, 118, 109, 99, 108, 101, 97, 114, 5,
				118, 109, 120, 111, 110, 6, 114, 100, 114, 97,
				110, 100, 7, 118, 109, 112, 116, 114, 115, 116,
				6, 114, 100, 115, 101, 101, 100, 5, 114, 100,
				112, 105, 100, 5, 98, 115, 119, 97, 112, 8,
				97, 100, 100, 115, 117, 98, 112, 100, 8, 97,
				100, 100, 115, 117, 98, 112, 115, 7, 109, 111,
				118, 113, 50, 100, 113, 7, 109, 111, 118, 100,
				113, 50, 113, 4, 112, 97, 110, 100, 6, 118,
				112, 97, 110, 100, 100, 6, 118, 112, 97, 110,
				100, 113, 5, 112, 97, 110, 100, 110, 7, 118,
				112, 97, 110, 100, 110, 100, 7, 118, 112, 97,
				110, 100, 110, 113, 9, 99, 118, 116, 116, 112,
				100, 50, 100, 113, 9, 118, 99, 118, 116, 113,
				113, 50, 112, 100, 8, 99, 118, 116, 112, 100,
				50, 100, 113, 6, 109, 111, 118, 110, 116, 113,
				7, 109, 111, 118, 110, 116, 100, 113, 3, 112,
				111, 114, 5, 118, 112, 111, 114, 100, 5, 118,
				112, 111, 114, 113, 4, 112, 120, 111, 114, 6,
				118, 112, 120, 111, 114, 100, 6, 118, 112, 120,
				111, 114, 113, 5, 108, 100, 100, 113, 117, 8,
				109, 97, 115, 107, 109, 111, 118, 113, 10, 109,
				97, 115, 107, 109, 111, 118, 100, 113, 117, 3,
				117, 100, 48, 6, 112, 104, 97, 100, 100, 119,
				6, 112, 104, 97, 100, 100, 100, 7, 112, 104,
				97, 100, 100, 115, 119, 6, 112, 104, 115, 117,
				98, 119, 6, 112, 104, 115, 117, 98, 100, 7,
				112, 104, 115, 117, 98, 115, 119, 6, 112, 115,
				105, 103, 110, 98, 6, 112, 115, 105, 103, 110,
				119, 6, 112, 115, 105, 103, 110, 100, 7, 118,
				116, 101, 115, 116, 112, 115, 7, 118, 116, 101,
				115, 116, 112, 100, 8, 112, 98, 108, 101, 110,
				100, 118, 98, 7, 118, 112, 115, 114, 108, 118,
				119, 9, 118, 112, 109, 111, 118, 117, 115, 119,
				98, 7, 118, 112, 115, 114, 97, 118, 119, 9,
				118, 112, 109, 111, 118, 117, 115, 100, 98, 7,
				118, 112, 115, 108, 108, 118, 119, 9, 118, 112,
				109, 111, 118, 117, 115, 113, 98, 9, 118, 99,
				118, 116, 112, 104, 50, 112, 115, 9, 118, 112,
				109, 111, 118, 117, 115, 100, 119, 8, 98, 108,
				101, 110, 100, 118, 112, 115, 7, 118, 112, 114,
				111, 114, 118, 100, 7, 118, 112, 114, 111, 114,
				118, 113, 9, 118, 112, 109, 111, 118, 117, 115,
				113, 119, 8, 98, 108, 101, 110, 100, 118, 112,
				100, 7, 118, 112, 114, 111, 108, 118, 100, 7,
				118, 112, 114, 111, 108, 118, 113, 9, 118, 112,
				109, 111, 118, 117, 115, 113, 100, 7, 118, 112,
				101, 114, 109, 112, 115, 7, 118, 112, 101, 114,
				109, 112, 100, 5, 112, 116, 101, 115, 116, 12,
				118, 98, 114, 111, 97, 100, 99, 97, 115, 116,
				115, 100, 15, 118, 98, 114, 111, 97, 100, 99,
				97, 115, 116, 102, 51, 50, 120, 50, 14, 118,
				98, 114, 111, 97, 100, 99, 97, 115, 116, 102,
				49, 50, 56, 15, 118, 98, 114, 111, 97, 100,
				99, 97, 115, 116, 102, 51, 50, 120, 52, 15,
				118, 98, 114, 111, 97, 100, 99, 97, 115, 116,
				102, 54, 52, 120, 50, 15, 118, 98, 114, 111,
				97, 100, 99, 97, 115, 116, 102, 51, 50, 120,
				56, 15, 118, 98, 114, 111, 97, 100, 99, 97,
				115, 116, 102, 54, 52, 120, 52, 6, 118, 112,
				97, 98, 115, 113, 8, 112, 109, 111, 118, 115,
				120, 98, 119, 8, 118, 112, 109, 111, 118, 115,
				119, 98, 8, 112, 109, 111, 118, 115, 120, 98,
				100, 8, 118, 112, 109, 111, 118, 115, 100, 98,
				8, 112, 109, 111, 118, 115, 120, 98, 113, 8,
				118, 112, 109, 111, 118, 115, 113, 98, 8, 112,
				109, 111, 118, 115, 120, 119, 100, 8, 118, 112,
				109, 111, 118, 115, 100, 119, 8, 112, 109, 111,
				118, 115, 120, 119, 113, 8, 118, 112, 109, 111,
				118, 115, 113, 119, 8, 112, 109, 111, 118, 115,
				120, 100, 113, 8, 118, 112, 109, 111, 118, 115,
				113, 100, 8, 118, 112, 116, 101, 115, 116, 109,
				98, 8, 118, 112, 116, 101, 115, 116, 109, 119,
				9, 118, 112, 116, 101, 115, 116, 110, 109, 98,
				9, 118, 112, 116, 101, 115, 116, 110, 109, 119,
				8, 118, 112, 116, 101, 115, 116, 109, 100, 8,
				118, 112, 116, 101, 115, 116, 109, 113, 9, 118,
				112, 116, 101, 115, 116, 110, 109, 100, 9, 118,
				112, 116, 101, 115, 116, 110, 109, 113, 6, 112,
				109, 117, 108, 100, 113, 8, 118, 112, 109, 111,
				118, 109, 50, 98, 8, 118, 112, 109, 111, 118,
				109, 50, 119, 7, 112, 99, 109, 112, 101, 113,
				113, 8, 118, 112, 109, 111, 118, 98, 50, 109,
				8, 118, 112, 109, 111, 118, 119, 50, 109, 8,
				109, 111, 118, 110, 116, 100, 113, 97, 15, 118,
				112, 98, 114, 111, 97, 100, 99, 97, 115, 116,
				109, 98, 50, 113, 8, 112, 97, 99, 107, 117,
				115, 100, 119, 10, 118, 109, 97, 115, 107, 109,
				111, 118, 112, 115, 9, 118, 115, 99, 97, 108,
				101, 102, 112, 115, 9, 118, 115, 99, 97, 108,
				101, 102, 112, 100, 10, 118, 109, 97, 115, 107,
				109, 111, 118, 112, 100, 9, 118, 115, 99, 97,
				108, 101, 102, 115, 115, 9, 118, 115, 99, 97,
				108, 101, 102, 115, 100, 8, 112, 109, 111, 118,
				122, 120, 98, 119, 7, 118, 112, 109, 111, 118,
				119, 98, 8, 112, 109, 111, 118, 122, 120, 98,
				100, 7, 118, 112, 109, 111, 118, 100, 98, 8,
				112, 109, 111, 118, 122, 120, 98, 113, 7, 118,
				112, 109, 111, 118, 113, 98, 8, 112, 109, 111,
				118, 122, 120, 119, 100, 7, 118, 112, 109, 111,
				118, 100, 119, 8, 112, 109, 111, 118, 122, 120,
				119, 113, 7, 118, 112, 109, 111, 118, 113, 119,
				8, 112, 109, 111, 118, 122, 120, 100, 113, 7,
				118, 112, 109, 111, 118, 113, 100, 6, 118, 112,
				101, 114, 109, 100, 6, 118, 112, 101, 114, 109,
				113, 7, 112, 99, 109, 112, 103, 116, 113, 6,
				112, 109, 105, 110, 115, 98, 8, 118, 112, 109,
				111, 118, 109, 50, 100, 8, 118, 112, 109, 111,
				118, 109, 50, 113, 7, 118, 112, 109, 105, 110,
				115, 113, 8, 118, 112, 109, 111, 118, 100, 50,
				109, 8, 118, 112, 109, 111, 118, 113, 50, 109,
				6, 112, 109, 105, 110, 117, 119, 15, 118, 112,
				98, 114, 111, 97, 100, 99, 97, 115, 116, 109,
				119, 50, 100, 7, 118, 112, 109, 105, 110, 117,
				113, 6, 112, 109, 97, 120, 115, 98, 7, 118,
				112, 109, 97, 120, 115, 113, 6, 112, 109, 97,
				120, 117, 119, 7, 118, 112, 109, 97, 120, 117,
				113, 7, 118, 112, 109, 117, 108, 108, 113, 10,
				112, 104, 109, 105, 110, 112, 111, 115, 117, 119,
				9, 118, 103, 101, 116, 101, 120, 112, 112, 115,
				9, 118, 103, 101, 116, 101, 120, 112, 112, 100,
				9, 118, 103, 101, 116, 101, 120, 112, 115, 115,
				9, 118, 103, 101, 116, 101, 120, 112, 115, 100,
				8, 118, 112, 108, 122, 99, 110, 116, 100, 8,
				118, 112, 108, 122, 99, 110, 116, 113, 7, 118,
				112, 115, 114, 108, 118, 100, 7, 118, 112, 115,
				114, 108, 118, 113, 7, 118, 112, 115, 114, 97,
				118, 100, 7, 118, 112, 115, 114, 97, 118, 113,
				7, 118, 112, 115, 108, 108, 118, 100, 7, 118,
				112, 115, 108, 108, 118, 113, 8, 118, 114, 99,
				112, 49, 52, 112, 115, 8, 118, 114, 99, 112,
				49, 52, 112, 100, 8, 118, 114, 99, 112, 49,
				52, 115, 115, 8, 118, 114, 99, 112, 49, 52,
				115, 100, 10, 118, 114, 115, 113, 114, 116, 49,
				52, 112, 115, 10, 118, 114, 115, 113, 114, 116,
				49, 52, 112, 100, 10, 118, 114, 115, 113, 114,
				116, 49, 52, 115, 115, 10, 118, 114, 115, 113,
				114, 116, 49, 52, 115, 100, 8, 118, 112, 100,
				112, 98, 117, 115, 100, 9, 118, 112, 100, 112,
				98, 117, 115, 100, 115, 8, 118, 112, 100, 112,
				119, 115, 115, 100, 9, 118, 100, 112, 98, 102,
				49, 54, 112, 115, 9, 118, 112, 52, 100, 112,
				119, 115, 115, 100, 9, 118, 112, 100, 112, 119,
				115, 115, 100, 115, 10, 118, 112, 52, 100, 112,
				119, 115, 115, 100, 115, 8, 118, 112, 111, 112,
				99, 110, 116, 98, 8, 118, 112, 111, 112, 99,
				110, 116, 119, 8, 118, 112, 111, 112, 99, 110,
				116, 100, 8, 118, 112, 111, 112, 99, 110, 116,
				113, 15, 118, 98, 114, 111, 97, 100, 99, 97,
				115, 116, 105, 51, 50, 120, 50, 14, 118, 98,
				114, 111, 97, 100, 99, 97, 115, 116, 105, 49,
				50, 56, 15, 118, 98, 114, 111, 97, 100, 99,
				97, 115, 116, 105, 51, 50, 120, 52, 15, 118,
				98, 114, 111, 97, 100, 99, 97, 115, 116, 105,
				54, 52, 120, 50, 15, 118, 98, 114, 111, 97,
				100, 99, 97, 115, 116, 105, 51, 50, 120, 56,
				15, 118, 98, 114, 111, 97, 100, 99, 97, 115,
				116, 105, 54, 52, 120, 52, 9, 118, 112, 101,
				120, 112, 97, 110, 100, 98, 9, 118, 112, 101,
				120, 112, 97, 110, 100, 119, 11, 118, 112, 99,
				111, 109, 112, 114, 101, 115, 115, 98, 11, 118,
				112, 99, 111, 109, 112, 114, 101, 115, 115, 119,
				9, 118, 112, 98, 108, 101, 110, 100, 109, 100,
				9, 118, 112, 98, 108, 101, 110, 100, 109, 113,
				9, 118, 98, 108, 101, 110, 100, 109, 112, 115,
				9, 118, 98, 108, 101, 110, 100, 109, 112, 100,
				9, 118, 112, 98, 108, 101, 110, 100, 109, 98,
				9, 118, 112, 98, 108, 101, 110, 100, 109, 119,
				13, 118, 112, 50, 105, 110, 116, 101, 114, 115,
				101, 99, 116, 100, 13, 118, 112, 50, 105, 110,
				116, 101, 114, 115, 101, 99, 116, 113, 8, 118,
				112, 115, 104, 108, 100, 118, 119, 8, 118, 112,
				115, 104, 108, 100, 118, 100, 8, 118, 112, 115,
				104, 108, 100, 118, 113, 8, 118, 112, 115, 104,
				114, 100, 118, 119, 13, 118, 99, 118, 116, 110,
				101, 112, 115, 50, 98, 102, 49, 54, 14, 118,
				99, 118, 116, 110, 101, 50, 112, 115, 50, 98,
				102, 49, 54, 8, 118, 112, 115, 104, 114, 100,
				118, 100, 8, 118, 112, 115, 104, 114, 100, 118,
				113, 8, 118, 112, 101, 114, 109, 105, 50, 98,
				8, 118, 112, 101, 114, 109, 105, 50, 119, 8,
				118, 112, 101, 114, 109, 105, 50, 100, 8, 118,
				112, 101, 114, 109, 105, 50, 113, 9, 118, 112,
				101, 114, 109, 105, 50, 112, 115, 9, 118, 112,
				101, 114, 109, 105, 50, 112, 100, 8, 118, 112,
				101, 114, 109, 116, 50, 98, 8, 118, 112, 101,
				114, 109, 116, 50, 119, 8, 118, 112, 101, 114,
				109, 116, 50, 100, 8, 118, 112, 101, 114, 109,
				116, 50, 113, 9, 118, 112, 101, 114, 109, 116,
				50, 112, 115, 9, 118, 112, 101, 114, 109, 116,
				50, 112, 100, 6, 105, 110, 118, 101, 112, 116,
				7, 105, 110, 118, 118, 112, 105, 100, 7, 105,
				110, 118, 112, 99, 105, 100, 14, 118, 112, 109,
				117, 108, 116, 105, 115, 104, 105, 102, 116, 113,
				98, 9, 118, 101, 120, 112, 97, 110, 100, 112,
				115, 9, 118, 101, 120, 112, 97, 110, 100, 112,
				100, 9, 118, 112, 101, 120, 112, 97, 110, 100,
				100, 9, 118, 112, 101, 120, 112, 97, 110, 100,
				113, 11, 118, 99, 111, 109, 112, 114, 101, 115,
				115, 112, 115, 11, 118, 99, 111, 109, 112, 114,
				101, 115, 115, 112, 100, 11, 118, 112, 99, 111,
				109, 112, 114, 101, 115, 115, 100, 11, 118, 112,
				99, 111, 109, 112, 114, 101, 115, 115, 113, 10,
				118, 112, 109, 97, 115, 107, 109, 111, 118, 100,
				10, 118, 112, 109, 97, 115, 107, 109, 111, 118,
				113, 6, 118, 112, 101, 114, 109, 98, 6, 118,
				112, 101, 114, 109, 119, 12, 118, 112, 115, 104,
				117, 102, 98, 105, 116, 113, 109, 98, 10, 118,
				112, 103, 97, 116, 104, 101, 114, 100, 100, 10,
				118, 112, 103, 97, 116, 104, 101, 114, 100, 113,
				10, 118, 112, 103, 97, 116, 104, 101, 114, 113,
				100, 10, 118, 112, 103, 97, 116, 104, 101, 114,
				113, 113, 10, 118, 103, 97, 116, 104, 101, 114,
				100, 112, 115, 10, 118, 103, 97, 116, 104, 101,
				114, 100, 112, 100, 10, 118, 103, 97, 116, 104,
				101, 114, 113, 112, 115, 10, 118, 103, 97, 116,
				104, 101, 114, 113, 112, 100, 14, 118, 102, 109,
				97, 100, 100, 115, 117, 98, 49, 51, 50, 112,
				115, 14, 118, 102, 109, 97, 100, 100, 115, 117,
				98, 49, 51, 50, 112, 100, 14, 118, 102, 109,
				115, 117, 98, 97, 100, 100, 49, 51, 50, 112,
				115, 14, 118, 102, 109, 115, 117, 98, 97, 100,
				100, 49, 51, 50, 112, 100, 11, 118, 102, 109,
				97, 100, 100, 49, 51, 50, 112, 115, 11, 118,
				102, 109, 97, 100, 100, 49, 51, 50, 112, 100,
				11, 118, 102, 109, 97, 100, 100, 49, 51, 50,
				115, 115, 11, 118, 102, 109, 97, 100, 100, 49,
				51, 50, 115, 100, 11, 118, 102, 109, 115, 117,
				98, 49, 51, 50, 112, 115, 11, 118, 102, 109,
				115, 117, 98, 49, 51, 50, 112, 100, 9, 118,
				52, 102, 109, 97, 100, 100, 112, 115, 11, 118,
				102, 109, 115, 117, 98, 49, 51, 50, 115, 115,
				11, 118, 102, 109, 115, 117, 98, 49, 51, 50,
				115, 100, 9, 118, 52, 102, 109, 97, 100, 100,
				115, 115, 12, 118, 102, 110, 109, 97, 100, 100,
				49, 51, 50, 112, 115, 12, 118, 102, 110, 109,
				97, 100, 100, 49, 51, 50, 112, 100, 12, 118,
				102, 110, 109, 97, 100, 100, 49, 51, 50, 115,
				115, 12, 118, 102, 110, 109, 97, 100, 100, 49,
				51, 50, 115, 100, 12, 118, 102, 110, 109, 115,
				117, 98, 49, 51, 50, 112, 115, 12, 118, 102,
				110, 109, 115, 117, 98, 49, 51, 50, 112, 100,
				12, 118, 102, 110, 109, 115, 117, 98, 49, 51,
				50, 115, 115, 12, 118, 102, 110, 109, 115, 117,
				98, 49, 51, 50, 115, 100, 11, 118, 112, 115,
				99, 97, 116, 116, 101, 114, 100, 100, 11, 118,
				112, 115, 99, 97, 116, 116, 101, 114, 100, 113,
				11, 118, 112, 115, 99, 97, 116, 116, 101, 114,
				113, 100, 11, 118, 112, 115, 99, 97, 116, 116,
				101, 114, 113, 113, 11, 118, 115, 99, 97, 116,
				116, 101, 114, 100, 112, 115, 11, 118, 115, 99,
				97, 116, 116, 101, 114, 100, 112, 100, 11, 118,
				115, 99, 97, 116, 116, 101, 114, 113, 112, 115,
				11, 118, 115, 99, 97, 116, 116, 101, 114, 113,
				112, 100, 14, 118, 102, 109, 97, 100, 100, 115,
				117, 98, 50, 49, 51, 112, 115, 14, 118, 102,
				109, 97, 100, 100, 115, 117, 98, 50, 49, 51,
				112, 100, 14, 118, 102, 109, 115, 117, 98, 97,
				100, 100, 50, 49, 51, 112, 115, 14, 118, 102,
				109, 115, 117, 98, 97, 100, 100, 50, 49, 51,
				112, 100, 11, 118, 102, 109, 97, 100, 100, 50,
				49, 51, 112, 115, 11, 118, 102, 109, 97, 100,
				100, 50, 49, 51, 112, 100, 11, 118, 102, 109,
				97, 100, 100, 50, 49, 51, 115, 115, 11, 118,
				102, 109, 97, 100, 100, 50, 49, 51, 115, 100,
				11, 118, 102, 109, 115, 117, 98, 50, 49, 51,
				112, 115, 11, 118, 102, 109, 115, 117, 98, 50,
				49, 51, 112, 100, 10, 118, 52, 102, 110, 109,
				97, 100, 100, 112, 115, 11, 118, 102, 109, 115,
				117, 98, 50, 49, 51, 115, 115, 11, 118, 102,
				109, 115, 117, 98, 50, 49, 51, 115, 100, 10,
				118, 52, 102, 110, 109, 97, 100, 100, 115, 115,
				12, 118, 102, 110, 109, 97, 100, 100, 50, 49,
				51, 112, 115, 12, 118, 102, 110, 109, 97, 100,
				100, 50, 49, 51, 112, 100, 12, 118, 102, 110,
				109, 97, 100, 100, 50, 49, 51, 115, 115, 12,
				118, 102, 110, 109, 97, 100, 100, 50, 49, 51,
				115, 100, 12, 118, 102, 110, 109, 115, 117, 98,
				50, 49, 51, 112, 115, 12, 118, 102, 110, 109,
				115, 117, 98, 50, 49, 51, 112, 100, 12, 118,
				102, 110, 109, 115, 117, 98, 50, 49, 51, 115,
				115, 12, 118, 102, 110, 109, 115, 117, 98, 50,
				49, 51, 115, 100, 11, 118, 112, 109, 97, 100,
				100, 53, 50, 108, 117, 113, 11, 118, 112, 109,
				97, 100, 100, 53, 50, 104, 117, 113, 14, 118,
				102, 109, 97, 100, 100, 115, 117, 98, 50, 51,
				49, 112, 115, 14, 118, 102, 109, 97, 100, 100,
				115, 117, 98, 50, 51, 49, 112, 100, 14, 118,
				102, 109, 115, 117, 98, 97, 100, 100, 50, 51,
				49, 112, 115, 14, 118, 102, 109, 115, 117, 98,
				97, 100, 100, 50, 51, 49, 112, 100, 11, 118,
				102, 109, 97, 100, 100, 50, 51, 49, 112, 115,
				11, 118, 102, 109, 97, 100, 100, 50, 51, 49,
				112, 100, 11, 118, 102, 109, 97, 100, 100, 50,
				51, 49, 115, 115, 11, 118, 102, 109, 97, 100,
				100, 50, 51, 49, 115, 100, 11, 118, 102, 109,
				115, 117, 98, 50, 51, 49, 112, 115, 11, 118,
				102, 109, 115, 117, 98, 50, 51, 49, 112, 100,
				11, 118, 102, 109, 115, 117, 98, 50, 51, 49,
				115, 115, 11, 118, 102, 109, 115, 117, 98, 50,
				51, 49, 115, 100, 12, 118, 102, 110, 109, 97,
				100, 100, 50, 51, 49, 112, 115, 12, 118, 102,
				110, 109, 97, 100, 100, 50, 51, 49, 112, 100,
				12, 118, 102, 110, 109, 97, 100, 100, 50, 51,
				49, 115, 115, 12, 118, 102, 110, 109, 97, 100,
				100, 50, 51, 49, 115, 100, 12, 118, 102, 110,
				109, 115, 117, 98, 50, 51, 49, 112, 115, 12,
				118, 102, 110, 109, 115, 117, 98, 50, 51, 49,
				112, 100, 12, 118, 102, 110, 109, 115, 117, 98,
				50, 51, 49, 115, 115, 12, 118, 102, 110, 109,
				115, 117, 98, 50, 51, 49, 115, 100, 11, 118,
				112, 99, 111, 110, 102, 108, 105, 99, 116, 100,
				11, 118, 112, 99, 111, 110, 102, 108, 105, 99,
				116, 113, 13, 118, 103, 97, 116, 104, 101, 114,
				112, 102, 48, 100, 112, 115, 13, 118, 103, 97,
				116, 104, 101, 114, 112, 102, 48, 100, 112, 100,
				13, 118, 103, 97, 116, 104, 101, 114, 112, 102,
				49, 100, 112, 115, 13, 118, 103, 97, 116, 104,
				101, 114, 112, 102, 49, 100, 112, 100, 14, 118,
				115, 99, 97, 116, 116, 101, 114, 112, 102, 48,
				100, 112, 115, 14, 118, 115, 99, 97, 116, 116,
				101, 114, 112, 102, 48, 100, 112, 100, 14, 118,
				115, 99, 97, 116, 116, 101, 114, 112, 102, 49,
				100, 112, 115, 14, 118, 115, 99, 97, 116, 116,
				101, 114, 112, 102, 49, 100, 112, 100, 13, 118,
				103, 97, 116, 104, 101, 114, 112, 102, 48, 113,
				112, 115, 13, 118, 103, 97, 116, 104, 101, 114,
				112, 102, 48, 113, 112, 100, 13, 118, 103, 97,
				116, 104, 101, 114, 112, 102, 49, 113, 112, 115,
				13, 118, 103, 97, 116, 104, 101, 114, 112, 102,
				49, 113, 112, 100, 14, 118, 115, 99, 97, 116,
				116, 101, 114, 112, 102, 48, 113, 112, 115, 14,
				118, 115, 99, 97, 116, 116, 101, 114, 112, 102,
				48, 113, 112, 100, 14, 118, 115, 99, 97, 116,
				116, 101, 114, 112, 102, 49, 113, 112, 115, 14,
				118, 115, 99, 97, 116, 116, 101, 114, 112, 102,
				49, 113, 112, 100, 9, 115, 104, 97, 49, 110,
				101, 120, 116, 101, 7, 118, 101, 120, 112, 50,
				112, 115, 7, 118, 101, 120, 112, 50, 112, 100,
				8, 115, 104, 97, 49, 109, 115, 103, 49, 8,
				115, 104, 97, 49, 109, 115, 103, 50, 8, 118,
				114, 99, 112, 50, 56, 112, 115, 8, 118, 114,
				99, 112, 50, 56, 112, 100, 11, 115, 104, 97,
				50, 53, 54, 114, 110, 100, 115, 50, 8, 118,
				114, 99, 112, 50, 56, 115, 115, 8, 118, 114,
				99, 112, 50, 56, 115, 100, 10, 115, 104, 97,
				50, 53, 54, 109, 115, 103, 49, 10, 118, 114,
				115, 113, 114, 116, 50, 56, 112, 115, 10, 118,
				114, 115, 113, 114, 116, 50, 56, 112, 100, 10,
				115, 104, 97, 50, 53, 54, 109, 115, 103, 50,
				10, 118, 114, 115, 113, 114, 116, 50, 56, 115,
				115, 10, 118, 114, 115, 113, 114, 116, 50, 56,
				115, 100, 9, 103, 102, 50, 112, 56, 109, 117,
				108, 98, 6, 97, 101, 115, 105, 109, 99, 6,
				97, 101, 115, 101, 110, 99, 10, 97, 101, 115,
				101, 110, 99, 108, 97, 115, 116, 6, 97, 101,
				115, 100, 101, 99, 10, 97, 101, 115, 100, 101,
				99, 108, 97, 115, 116, 5, 109, 111, 118, 98,
				101, 5, 99, 114, 99, 51, 50, 4, 97, 110,
				100, 110, 4, 98, 108, 115, 114, 6, 98, 108,
				115, 109, 115, 107, 4, 98, 108, 115, 105, 4,
				98, 122, 104, 105, 6, 119, 114, 117, 115, 115,
				100, 6, 119, 114, 117, 115, 115, 113, 4, 112,
				101, 120, 116, 4, 112, 100, 101, 112, 5, 119,
				114, 115, 115, 100, 5, 119, 114, 115, 115, 113,
				4, 97, 100, 99, 120, 4, 97, 100, 111, 120,
				4, 109, 117, 108, 120, 5, 98, 101, 120, 116,
				114, 4, 115, 104, 108, 120, 4, 115, 97, 114,
				120, 4, 115, 104, 114, 120, 9, 109, 111, 118,
				100, 105, 114, 54, 52, 98, 7, 101, 110, 113,
				99, 109, 100, 115, 6, 101, 110, 113, 99, 109,
				100, 7, 109, 111, 118, 100, 105, 114, 105, 8,
				118, 112, 98, 108, 101, 110, 100, 100, 7, 118,
				97, 108, 105, 103, 110, 100, 7, 118, 97, 108,
				105, 103, 110, 113, 10, 118, 112, 101, 114, 109,
				50, 102, 49, 50, 56, 7, 114, 111, 117, 110,
				100, 112, 115, 11, 118, 114, 110, 100, 115, 99,
				97, 108, 101, 112, 115, 7, 114, 111, 117, 110,
				100, 112, 100, 11, 118, 114, 110, 100, 115, 99,
				97, 108, 101, 112, 100, 7, 114, 111, 117, 110,
				100, 115, 115, 11, 118, 114, 110, 100, 115, 99,
				97, 108, 101, 115, 115, 7, 114, 111, 117, 110,
				100, 115, 100, 11, 118, 114, 110, 100, 115, 99,
				97, 108, 101, 115, 100, 7, 98, 108, 101, 110,
				100, 112, 115, 7, 98, 108, 101, 110, 100, 112,
				100, 7, 112, 98, 108, 101, 110, 100, 119, 6,
				112, 101, 120, 116, 114, 98, 6, 112, 101, 120,
				116, 114, 100, 6, 112, 101, 120, 116, 114, 113,
				9, 101, 120, 116, 114, 97, 99, 116, 112, 115,
				11, 118, 105, 110, 115, 101, 114, 116, 102, 49,
				50, 56, 12, 118, 105, 110, 115, 101, 114, 116,
				102, 51, 50, 120, 52, 12, 118, 105, 110, 115,
				101, 114, 116, 102, 54, 52, 120, 50, 12, 118,
				101, 120, 116, 114, 97, 99, 116, 102, 49, 50,
				56, 13, 118, 101, 120, 116, 114, 97, 99, 116,
				102, 51, 50, 120, 52, 13, 118, 101, 120, 116,
				114, 97, 99, 116, 102, 54, 52, 120, 50, 12,
				118, 105, 110, 115, 101, 114, 116, 102, 51, 50,
				120, 56, 12, 118, 105, 110, 115, 101, 114, 116,
				102, 54, 52, 120, 52, 13, 118, 101, 120, 116,
				114, 97, 99, 116, 102, 51, 50, 120, 56, 13,
				118, 101, 120, 116, 114, 97, 99, 116, 102, 54,
				52, 120, 52, 9, 118, 99, 118, 116, 112, 115,
				50, 112, 104, 7, 118, 112, 99, 109, 112, 117,
				100, 7, 118, 112, 99, 109, 112, 117, 113, 6,
				118, 112, 99, 109, 112, 100, 6, 118, 112, 99,
				109, 112, 113, 6, 112, 105, 110, 115, 114, 98,
				8, 105, 110, 115, 101, 114, 116, 112, 115, 6,
				112, 105, 110, 115, 114, 100, 6, 112, 105, 110,
				115, 114, 113, 10, 118, 115, 104, 117, 102, 102,
				51, 50, 120, 52, 10, 118, 115, 104, 117, 102,
				102, 54, 52, 120, 50, 10, 118, 112, 116, 101,
				114, 110, 108, 111, 103, 100, 10, 118, 112, 116,
				101, 114, 110, 108, 111, 103, 113, 10, 118, 103,
				101, 116, 109, 97, 110, 116, 112, 115, 10, 118,
				103, 101, 116, 109, 97, 110, 116, 112, 100, 10,
				118, 103, 101, 116, 109, 97, 110, 116, 115, 115,
				10, 118, 103, 101, 116, 109, 97, 110, 116, 115,
				100, 8, 107, 115, 104, 105, 102, 116, 114, 98,
				8, 107, 115, 104, 105, 102, 116, 114, 119, 8,
				107, 115, 104, 105, 102, 116, 114, 100, 8, 107,
				115, 104, 105, 102, 116, 114, 113, 8, 107, 115,
				104, 105, 102, 116, 108, 98, 8, 107, 115, 104,
				105, 102, 116, 108, 119, 8, 107, 115, 104, 105,
				102, 116, 108, 100, 8, 107, 115, 104, 105, 102,
				116, 108, 113, 11, 118, 105, 110, 115, 101, 114,
				116, 105, 49, 50, 56, 12, 118, 105, 110, 115,
				101, 114, 116, 105, 51, 50, 120, 52, 12, 118,
				105, 110, 115, 101, 114, 116, 105, 54, 52, 120,
				50, 12, 118, 101, 120, 116, 114, 97, 99, 116,
				105, 49, 50, 56, 13, 118, 101, 120, 116, 114,
				97, 99, 116, 105, 51, 50, 120, 52, 13, 118,
				101, 120, 116, 114, 97, 99, 116, 105, 54, 52,
				120, 50, 12, 118, 105, 110, 115, 101, 114, 116,
				105, 51, 50, 120, 56, 12, 118, 105, 110, 115,
				101, 114, 116, 105, 54, 52, 120, 52, 13, 118,
				101, 120, 116, 114, 97, 99, 116, 105, 51, 50,
				120, 56, 13, 118, 101, 120, 116, 114, 97, 99,
				116, 105, 54, 52, 120, 52, 7, 118, 112, 99,
				109, 112, 117, 98, 7, 118, 112, 99, 109, 112,
				117, 119, 6, 118, 112, 99, 109, 112, 98, 6,
				118, 112, 99, 109, 112, 119, 4, 100, 112, 112,
				115, 4, 100, 112, 112, 100, 7, 109, 112, 115,
				97, 100, 98, 119, 9, 118, 100, 98, 112, 115,
				97, 100, 98, 119, 10, 118, 115, 104, 117, 102,
				105, 51, 50, 120, 52, 10, 118, 115, 104, 117,
				102, 105, 54, 52, 120, 50, 9, 112, 99, 108,
				109, 117, 108, 113, 100, 113, 10, 118, 112, 101,
				114, 109, 50, 105, 49, 50, 56, 10, 118, 112,
				101, 114, 109, 105, 108, 50, 112, 115, 10, 118,
				112, 101, 114, 109, 105, 108, 50, 112, 100, 8,
				118, 114, 97, 110, 103, 101, 112, 115, 8, 118,
				114, 97, 110, 103, 101, 112, 100, 8, 118, 114,
				97, 110, 103, 101, 115, 115, 8, 118, 114, 97,
				110, 103, 101, 115, 100, 11, 118, 102, 105, 120,
				117, 112, 105, 109, 109, 112, 115, 11, 118, 102,
				105, 120, 117, 112, 105, 109, 109, 112, 100, 11,
				118, 102, 105, 120, 117, 112, 105, 109, 109, 115,
				115, 11, 118, 102, 105, 120, 117, 112, 105, 109,
				109, 115, 100, 9, 118, 114, 101, 100, 117, 99,
				101, 112, 115, 9, 118, 114, 101, 100, 117, 99,
				101, 112, 100, 9, 118, 114, 101, 100, 117, 99,
				101, 115, 115, 9, 118, 114, 101, 100, 117, 99,
				101, 115, 100, 11, 118, 102, 109, 97, 100, 100,
				115, 117, 98, 112, 115, 11, 118, 102, 109, 97,
				100, 100, 115, 117, 98, 112, 100, 11, 118, 102,
				109, 115, 117, 98, 97, 100, 100, 112, 115, 11,
				118, 102, 109, 115, 117, 98, 97, 100, 100, 112,
				100, 9, 112, 99, 109, 112, 101, 115, 116, 114,
				109, 11, 112, 99, 109, 112, 101, 115, 116, 114,
				109, 54, 52, 9, 112, 99, 109, 112, 101, 115,
				116, 114, 105, 11, 112, 99, 109, 112, 101, 115,
				116, 114, 105, 54, 52, 9, 112, 99, 109, 112,
				105, 115, 116, 114, 109, 9, 112, 99, 109, 112,
				105, 115, 116, 114, 105, 10, 118, 102, 112, 99,
				108, 97, 115, 115, 112, 115, 10, 118, 102, 112,
				99, 108, 97, 115, 115, 112, 100, 10, 118, 102,
				112, 99, 108, 97, 115, 115, 115, 115, 10, 118,
				102, 112, 99, 108, 97, 115, 115, 115, 100, 8,
				118, 102, 109, 97, 100, 100, 112, 115, 8, 118,
				102, 109, 97, 100, 100, 112, 100, 8, 118, 102,
				109, 97, 100, 100, 115, 115, 8, 118, 102, 109,
				97, 100, 100, 115, 100, 8, 118, 102, 109, 115,
				117, 98, 112, 115, 8, 118, 102, 109, 115, 117,
				98, 112, 100, 8, 118, 102, 109, 115, 117, 98,
				115, 115, 8, 118, 102, 109, 115, 117, 98, 115,
				100, 7, 118, 112, 115, 104, 108, 100, 119, 7,
				118, 112, 115, 104, 108, 100, 100, 7, 118, 112,
				115, 104, 108, 100, 113, 7, 118, 112, 115, 104,
				114, 100, 119, 7, 118, 112, 115, 104, 114, 100,
				100, 7, 118, 112, 115, 104, 114, 100, 113, 9,
				118, 102, 110, 109, 97, 100, 100, 112, 115, 9,
				118, 102, 110, 109, 97, 100, 100, 112, 100, 9,
				118, 102, 110, 109, 97, 100, 100, 115, 115, 9,
				118, 102, 110, 109, 97, 100, 100, 115, 100, 9,
				118, 102, 110, 109, 115, 117, 98, 112, 115, 9,
				118, 102, 110, 109, 115, 117, 98, 112, 100, 9,
				118, 102, 110, 109, 115, 117, 98, 115, 115, 9,
				118, 102, 110, 109, 115, 117, 98, 115, 100, 9,
				115, 104, 97, 49, 114, 110, 100, 115, 52, 13,
				103, 102, 50, 112, 56, 97, 102, 102, 105, 110,
				101, 113, 98, 16, 103, 102, 50, 112, 56, 97,
				102, 102, 105, 110, 101, 105, 110, 118, 113, 98,
				15, 97, 101, 115, 107, 101, 121, 103, 101, 110,
				97, 115, 115, 105, 115, 116, 4, 114, 111, 114,
				120, 9, 118, 112, 109, 97, 99, 115, 115, 119,
				119, 9, 118, 112, 109, 97, 99, 115, 115, 119,
				100, 10, 118, 112, 109, 97, 99, 115, 115, 100,
				113, 108, 9, 118, 112, 109, 97, 99, 115, 115,
				100, 100, 10, 118, 112, 109, 97, 99, 115, 115,
				100, 113, 104, 8, 118, 112, 109, 97, 99, 115,
				119, 119, 8, 118, 112, 109, 97, 99, 115, 119,
				100, 9, 118, 112, 109, 97, 99, 115, 100, 113,
				108, 8, 118, 112, 109, 97, 99, 115, 100, 100,
				9, 118, 112, 109, 97, 99, 115, 100, 113, 104,
				6, 118, 112, 99, 109, 111, 118, 6, 118, 112,
				112, 101, 114, 109, 10, 118, 112, 109, 97, 100,
				99, 115, 115, 119, 100, 9, 118, 112, 109, 97,
				100, 99, 115, 119, 100, 6, 118, 112, 114, 111,
				116, 98, 6, 118, 112, 114, 111, 116, 119, 6,
				118, 112, 114, 111, 116, 100, 6, 118, 112, 114,
				111, 116, 113, 6, 118, 112, 99, 111, 109, 98,
				6, 118, 112, 99, 111, 109, 119, 6, 118, 112,
				99, 111, 109, 100, 6, 118, 112, 99, 111, 109,
				113, 7, 118, 112, 99, 111, 109, 117, 98, 7,
				118, 112, 99, 111, 109, 117, 119, 7, 118, 112,
				99, 111, 109, 117, 100, 7, 118, 112, 99, 111,
				109, 117, 113, 7, 98, 108, 99, 102, 105, 108,
				108, 7, 98, 108, 115, 102, 105, 108, 108, 4,
				98, 108, 99, 115, 5, 116, 122, 109, 115, 107,
				5, 98, 108, 99, 105, 99, 5, 98, 108, 115,
				105, 99, 6, 116, 49, 109, 115, 107, 99, 6,
				98, 108, 99, 109, 115, 107, 4, 98, 108, 99,
				105, 6, 108, 108, 119, 112, 99, 98, 6, 115,
				108, 119, 112, 99, 98, 7, 118, 102, 114, 99,
				122, 112, 115, 7, 118, 102, 114, 99, 122, 112,
				100, 7, 118, 102, 114, 99, 122, 115, 115, 7,
				118, 102, 114, 99, 122, 115, 100, 6, 118, 112,
				115, 104, 108, 98, 6, 118, 112, 115, 104, 108,
				119, 6, 118, 112, 115, 104, 108, 100, 6, 118,
				112, 115, 104, 108, 113, 6, 118, 112, 115, 104,
				97, 98, 6, 118, 112, 115, 104, 97, 119, 6,
				118, 112, 115, 104, 97, 100, 6, 118, 112, 115,
				104, 97, 113, 8, 118, 112, 104, 97, 100, 100,
				98, 119, 8, 118, 112, 104, 97, 100, 100, 98,
				100, 8, 118, 112, 104, 97, 100, 100, 98, 113,
				8, 118, 112, 104, 97, 100, 100, 119, 100, 8,
				118, 112, 104, 97, 100, 100, 119, 113, 8, 118,
				112, 104, 97, 100, 100, 100, 113, 9, 118, 112,
				104, 97, 100, 100, 117, 98, 119, 9, 118, 112,
				104, 97, 100, 100, 117, 98, 100, 9, 118, 112,
				104, 97, 100, 100, 117, 98, 113, 9, 118, 112,
				104, 97, 100, 100, 117, 119, 100, 9, 118, 112,
				104, 97, 100, 100, 117, 119, 113, 9, 118, 112,
				104, 97, 100, 100, 117, 100, 113, 8, 118, 112,
				104, 115, 117, 98, 98, 119, 8, 118, 112, 104,
				115, 117, 98, 119, 100, 8, 118, 112, 104, 115,
				117, 98, 100, 113, 6, 108, 119, 112, 105, 110,
				115, 6, 108, 119, 112, 118, 97, 108, 5, 112,
				105, 50, 102, 119, 5, 112, 105, 50, 102, 100,
				5, 112, 102, 50, 105, 119, 5, 112, 102, 50,
				105, 100, 6, 112, 102, 114, 99, 112, 118, 8,
				112, 102, 114, 115, 113, 114, 116, 118, 6, 112,
				102, 110, 97, 99, 99, 7, 112, 102, 112, 110,
				97, 99, 99, 7, 112, 102, 99, 109, 112, 103,
				101, 5, 112, 102, 109, 105, 110, 5, 112, 102,
				114, 99, 112, 7, 112, 102, 114, 115, 113, 114,
				116, 5, 112, 102, 115, 117, 98, 5, 112, 102,
				97, 100, 100, 7, 112, 102, 99, 109, 112, 103,
				116, 5, 112, 102, 109, 97, 120, 8, 112, 102,
				114, 99, 112, 105, 116, 49, 8, 112, 102, 114,
				115, 113, 105, 116, 49, 6, 112, 102, 115, 117,
				98, 114, 5, 112, 102, 97, 99, 99, 7, 112,
				102, 99, 109, 112, 101, 113, 5, 112, 102, 109,
				117, 108, 8, 112, 102, 114, 99, 112, 105, 116,
				50, 7, 112, 109, 117, 108, 104, 114, 119, 8,
				112, 109, 117, 108, 104, 114, 119, 97, 6, 112,
				115, 119, 97, 112, 100, 7, 112, 97, 118, 103,
				117, 115, 98, 9, 114, 109, 112, 97, 100, 106,
				117, 115, 116, 9, 114, 109, 112, 117, 112, 100,
				97, 116, 101, 6, 112, 115, 109, 97, 115, 104,
				9, 112, 118, 97, 108, 105, 100, 97, 116, 101,
				9, 115, 101, 114, 105, 97, 108, 105, 122, 101,
				9, 120, 115, 117, 115, 108, 100, 116, 114, 107,
				9, 120, 114, 101, 115, 108, 100, 116, 114, 107,
				7, 105, 110, 118, 108, 112, 103, 98, 7, 116,
				108, 98, 115, 121, 110, 99, 17, 112, 114, 101,
				102, 101, 116, 99, 104, 95, 114, 101, 115, 101,
				114, 118, 101, 100, 7, 118, 109, 103, 101, 120,
				105, 116, 7, 103, 101, 116, 115, 101, 99, 113,
				9, 108, 100, 116, 105, 108, 101, 99, 102, 103,
				11, 116, 105, 108, 101, 114, 101, 108, 101, 97,
				115, 101, 9, 115, 116, 116, 105, 108, 101, 99,
				102, 103, 8, 116, 105, 108, 101, 122, 101, 114,
				111, 11, 116, 105, 108, 101, 108, 111, 97, 100,
				100, 116, 49, 10, 116, 105, 108, 101, 115, 116,
				111, 114, 101, 100, 9, 116, 105, 108, 101, 108,
				111, 97, 100, 100, 9, 116, 100, 112, 98, 102,
				49, 54, 112, 115, 7, 116, 100, 112, 98, 117,
				117, 100, 7, 116, 100, 112, 98, 117, 115, 100,
				7, 116, 100, 112, 98, 115, 117, 100, 7, 116,
				100, 112, 98, 115, 115, 100, 6, 102, 110, 115,
				116, 100, 119, 6, 102, 110, 115, 116, 115, 103,
				5, 114, 100, 115, 104, 114, 5, 119, 114, 115,
				104, 114, 5, 115, 109, 105, 110, 116, 5, 100,
				109, 105, 110, 116, 3, 114, 100, 109, 4, 115,
				118, 100, 99, 4, 114, 115, 100, 99, 5, 115,
				118, 108, 100, 116, 5, 114, 115, 108, 100, 116,
				4, 115, 118, 116, 115, 4, 114, 115, 116, 115,
				8, 115, 109, 105, 110, 116, 111, 108, 100, 9,
				98, 98, 48, 95, 114, 101, 115, 101, 116, 9,
				98, 98, 49, 95, 114, 101, 115, 101, 116, 9,
				99, 112, 117, 95, 119, 114, 105, 116, 101, 8,
				99, 112, 117, 95, 114, 101, 97, 100, 7, 97,
				108, 116, 105, 110, 115, 116, 5, 112, 97, 118,
				101, 98, 7, 112, 97, 100, 100, 115, 105, 119,
				5, 112, 109, 97, 103, 119, 7, 112, 100, 105,
				115, 116, 105, 98, 7, 112, 115, 117, 98, 115,
				105, 119, 5, 112, 109, 118, 122, 98, 8, 112,
				109, 117, 108, 104, 114, 119, 99, 6, 112, 109,
				118, 110, 122, 98, 6, 112, 109, 118, 108, 122,
				98, 7, 112, 109, 118, 103, 101, 122, 98, 8,
				112, 109, 117, 108, 104, 114, 105, 119, 8, 112,
				109, 97, 99, 104, 114, 105, 119, 5, 102, 116,
				115, 116, 112, 6, 102, 114, 105, 110, 116, 50,
				7, 102, 114, 105, 99, 104, 111, 112, 7, 102,
				114, 105, 110, 101, 97, 114, 6, 116, 100, 99,
				97, 108, 108, 7, 115, 101, 97, 109, 114, 101,
				116, 7, 115, 101, 97, 109, 111, 112, 115, 8,
				115, 101, 97, 109, 99, 97, 108, 108, 15, 97,
				101, 115, 101, 110, 99, 119, 105, 100, 101, 49,
				50, 56, 107, 108, 15, 97, 101, 115, 100, 101,
				99, 119, 105, 100, 101, 49, 50, 56, 107, 108,
				15, 97, 101, 115, 101, 110, 99, 119, 105, 100,
				101, 50, 53, 54, 107, 108, 15, 97, 101, 115,
				100, 101, 99, 119, 105, 100, 101, 50, 53, 54,
				107, 108, 9, 108, 111, 97, 100, 105, 119, 107,
				101, 121, 11, 97, 101, 115, 101, 110, 99, 49,
				50, 56, 107, 108, 11, 97, 101, 115, 100, 101,
				99, 49, 50, 56, 107, 108, 11, 97, 101, 115,
				101, 110, 99, 50, 53, 54, 107, 108, 11, 97,
				101, 115, 100, 101, 99, 50, 53, 54, 107, 108,
				12, 101, 110, 99, 111, 100, 101, 107, 101, 121,
				49, 50, 56, 12, 101, 110, 99, 111, 100, 101,
				107, 101, 121, 50, 53, 54, 5, 117, 105, 114,
				101, 116, 6, 116, 101, 115, 116, 117, 105, 4,
				99, 108, 117, 105, 4, 115, 116, 117, 105, 8,
				115, 101, 110, 100, 117, 105, 112, 105, 6, 104,
				114, 101, 115, 101, 116, 8, 99, 99, 115, 95,
				104, 97, 115, 104, 11, 99, 99, 115, 95, 101,
				110, 99, 114, 121, 112, 116, 4, 108, 107, 103,
				115, 5, 101, 114, 101, 116, 117, 5, 101, 114,
				101, 116, 115, 6, 118, 97, 100, 100, 112, 104,
				6, 118, 97, 100, 100, 115, 104, 6, 118, 99,
				109, 112, 112, 104, 6, 118, 99, 109, 112, 115,
				104, 7, 118, 99, 111, 109, 105, 115, 104, 9,
				118, 99, 118, 116, 100, 113, 50, 112, 104, 9,
				118, 99, 118, 116, 112, 100, 50, 112, 104, 9,
				118, 99, 118, 116, 112, 104, 50, 100, 113, 9,
				118, 99, 118, 116, 112, 104, 50, 112, 100, 10,
				118, 99, 118, 116, 112, 104, 50, 112, 115, 120,
				9, 118, 99, 118, 116, 112, 104, 50, 113, 113,
				10, 118, 99, 118, 116, 112, 104, 50, 117, 100,
				113, 10, 118, 99, 118, 116, 112, 104, 50, 117,
				113, 113, 9, 118, 99, 118, 116, 112, 104, 50,
				117, 119, 8, 118, 99, 118, 116, 112, 104, 50,
				119, 10, 118, 99, 118, 116, 112, 115, 50, 112,
				104, 120, 9, 118, 99, 118, 116, 113, 113, 50,
				112, 104, 9, 118, 99, 118, 116, 115, 100, 50,
				115, 104, 9, 118, 99, 118, 116, 115, 104, 50,
				115, 100, 9, 118, 99, 118, 116, 115, 104, 50,
				115, 105, 9, 118, 99, 118, 116, 115, 104, 50,
				115, 115, 10, 118, 99, 118, 116, 115, 104, 50,
				117, 115, 105, 9, 118, 99, 118, 116, 115, 105,
				50, 115, 104, 9, 118, 99, 118, 116, 115, 115,
				50, 115, 104, 10, 118, 99, 118, 116, 116, 112,
				104, 50, 100, 113, 10, 118, 99, 118, 116, 116,
				112, 104, 50, 113, 113, 11, 118, 99, 118, 116,
				116, 112, 104, 50, 117, 100, 113, 11, 118, 99,
				118, 116, 116, 112, 104, 50, 117, 113, 113, 10,
				118, 99, 118, 116, 116, 112, 104, 50, 117, 119,
				9, 118, 99, 118, 116, 116, 112, 104, 50, 119,
				10, 118, 99, 118, 116, 116, 115, 104, 50, 115,
				105, 11, 118, 99, 118, 116, 116, 115, 104, 50,
				117, 115, 105, 10, 118, 99, 118, 116, 117, 100,
				113, 50, 112, 104, 10, 118, 99, 118, 116, 117,
				113, 113, 50, 112, 104, 10, 118, 99, 118, 116,
				117, 115, 105, 50, 115, 104, 9, 118, 99, 118,
				116, 117, 119, 50, 112, 104, 8, 118, 99, 118,
				116, 119, 50, 112, 104, 6, 118, 100, 105, 118,
				112, 104, 6, 118, 100, 105, 118, 115, 104, 10,
				118, 102, 99, 109, 97, 100, 100, 99, 112, 104,
				9, 118, 102, 109, 97, 100, 100, 99, 112, 104,
				10, 118, 102, 99, 109, 97, 100, 100, 99, 115,
				104, 9, 118, 102, 109, 97, 100, 100, 99, 115,
				104, 9, 118, 102, 99, 109, 117, 108, 99, 112,
				104, 8, 118, 102, 109, 117, 108, 99, 112, 104,
				9, 118, 102, 99, 109, 117, 108, 99, 115, 104,
				8, 118, 102, 109, 117, 108, 99, 115, 104, 14,
				118, 102, 109, 97, 100, 100, 115, 117, 98, 49,
				51, 50, 112, 104, 14, 118, 102, 109, 97, 100,
				100, 115, 117, 98, 50, 49, 51, 112, 104, 14,
				118, 102, 109, 97, 100, 100, 115, 117, 98, 50,
				51, 49, 112, 104, 14, 118, 102, 109, 115, 117,
				98, 97, 100, 100, 49, 51, 50, 112, 104, 14,
				118, 102, 109, 115, 117, 98, 97, 100, 100, 50,
				49, 51, 112, 104, 14, 118, 102, 109, 115, 117,
				98, 97, 100, 100, 50, 51, 49, 112, 104, 11,
				118, 102, 109, 97, 100, 100, 49, 51, 50, 112,
				104, 11, 118, 102, 109, 97, 100, 100, 50, 49,
				51, 112, 104, 11, 118, 102, 109, 97, 100, 100,
				50, 51, 49, 112, 104, 12, 118, 102, 110, 109,
				97, 100, 100, 49, 51, 50, 112, 104, 12, 118,
				102, 110, 109, 97, 100, 100, 50, 49, 51, 112,
				104, 12, 118, 102, 110, 109, 97, 100, 100, 50,
				51, 49, 112, 104, 11, 118, 102, 109, 97, 100,
				100, 49, 51, 50, 115, 104, 11, 118, 102, 109,
				97, 100, 100, 50, 49, 51, 115, 104, 11, 118,
				102, 109, 97, 100, 100, 50, 51, 49, 115, 104,
				12, 118, 102, 110, 109, 97, 100, 100, 49, 51,
				50, 115, 104, 12, 118, 102, 110, 109, 97, 100,
				100, 50, 49, 51, 115, 104, 12, 118, 102, 110,
				109, 97, 100, 100, 50, 51, 49, 115, 104, 11,
				118, 102, 109, 115, 117, 98, 49, 51, 50, 112,
				104, 11, 118, 102, 109, 115, 117, 98, 50, 49,
				51, 112, 104, 11, 118, 102, 109, 115, 117, 98,
				50, 51, 49, 112, 104, 12, 118, 102, 110, 109,
				115, 117, 98, 49, 51, 50, 112, 104, 12, 118,
				102, 110, 109, 115, 117, 98, 50, 49, 51, 112,
				104, 12, 118, 102, 110, 109, 115, 117, 98, 50,
				51, 49, 112, 104, 11, 118, 102, 109, 115, 117,
				98, 49, 51, 50, 115, 104, 11, 118, 102, 109,
				115, 117, 98, 50, 49, 51, 115, 104, 11, 118,
				102, 109, 115, 117, 98, 50, 51, 49, 115, 104,
				12, 118, 102, 110, 109, 115, 117, 98, 49, 51,
				50, 115, 104, 12, 118, 102, 110, 109, 115, 117,
				98, 50, 49, 51, 115, 104, 12, 118, 102, 110,
				109, 115, 117, 98, 50, 51, 49, 115, 104, 10,
				118, 102, 112, 99, 108, 97, 115, 115, 112, 104,
				10, 118, 102, 112, 99, 108, 97, 115, 115, 115,
				104, 9, 118, 103, 101, 116, 101, 120, 112, 112,
				104, 9, 118, 103, 101, 116, 101, 120, 112, 115,
				104, 10, 118, 103, 101, 116, 109, 97, 110, 116,
				112, 104, 10, 118, 103, 101, 116, 109, 97, 110,
				116, 115, 104, 6, 118, 109, 97, 120, 112, 104,
				6, 118, 109, 97, 120, 115, 104, 6, 118, 109,
				105, 110, 112, 104, 6, 118, 109, 105, 110, 115,
				104, 6, 118, 109, 111, 118, 115, 104, 5, 118,
				109, 111, 118, 119, 6, 118, 109, 117, 108, 112,
				104, 6, 118, 109, 117, 108, 115, 104, 6, 118,
				114, 99, 112, 112, 104, 6, 118, 114, 99, 112,
				115, 104, 9, 118, 114, 101, 100, 117, 99, 101,
				112, 104, 9, 118, 114, 101, 100, 117, 99, 101,
				115, 104, 11, 118, 114, 110, 100, 115, 99, 97,
				108, 101, 112, 104, 11, 118, 114, 110, 100, 115,
				99, 97, 108, 101, 115, 104, 8, 118, 114, 115,
				113, 114, 116, 112, 104, 8, 118, 114, 115, 113,
				114, 116, 115, 104, 9, 118, 115, 99, 97, 108,
				101, 102, 112, 104, 9, 118, 115, 99, 97, 108,
				101, 102, 115, 104, 7, 118, 115, 113, 114, 116,
				112, 104, 7, 118, 115, 113, 114, 116, 115, 104,
				6, 118, 115, 117, 98, 112, 104, 6, 118, 115,
				117, 98, 115, 104, 8, 118, 117, 99, 111, 109,
				105, 115, 104, 6, 114, 100, 117, 100, 98, 103,
				6, 119, 114, 117, 100, 98, 103, 4, 106, 107,
				122, 100, 5, 106, 107, 110, 122, 100, 10, 118,
				112, 114, 101, 102, 101, 116, 99, 104, 48, 10,
				118, 112, 114, 101, 102, 101, 116, 99, 104, 49,
				10, 118, 112, 114, 101, 102, 101, 116, 99, 104,
				50, 13, 118, 112, 114, 101, 102, 101, 116, 99,
				104, 101, 110, 116, 97, 11, 118, 112, 114, 101,
				102, 101, 116, 99, 104, 101, 48, 11, 118, 112,
				114, 101, 102, 101, 116, 99, 104, 101, 49, 11,
				118, 112, 114, 101, 102, 101, 116, 99, 104, 101,
				50, 4, 107, 97, 110, 100, 5, 107, 97, 110,
				100, 110, 6, 107, 97, 110, 100, 110, 114, 4,
				107, 110, 111, 116, 3, 107, 111, 114, 5, 107,
				120, 110, 111, 114, 4, 107, 120, 111, 114, 10,
				107, 109, 101, 114, 103, 101, 50, 108, 49, 104,
				10, 107, 109, 101, 114, 103, 101, 50, 108, 49,
				108, 4, 107, 109, 111, 118, 8, 107, 99, 111,
				110, 99, 97, 116, 104, 8, 107, 99, 111, 110,
				99, 97, 116, 108, 7, 107, 111, 114, 116, 101,
				115, 116, 5, 100, 101, 108, 97, 121, 5, 115,
				112, 102, 108, 116, 8, 99, 108, 101, 118, 105,
				99, 116, 49, 8, 99, 108, 101, 118, 105, 99,
				116, 48, 6, 116, 122, 99, 110, 116, 105, 8,
				107, 101, 120, 116, 114, 97, 99, 116, 9, 118,
				109, 111, 118, 110, 114, 97, 112, 100, 12, 118,
				109, 111, 118, 110, 114, 110, 103, 111, 97, 112,
				100, 9, 118, 109, 111, 118, 110, 114, 97, 112,
				115, 12, 118, 109, 111, 118, 110, 114, 110, 103,
				111, 97, 112, 115, 7, 118, 97, 100, 100, 110,
				112, 115, 7, 118, 97, 100, 100, 110, 112, 100,
				10, 118, 103, 109, 97, 120, 97, 98, 115, 112,
				115, 7, 118, 103, 109, 105, 110, 112, 115, 7,
				118, 103, 109, 105, 110, 112, 100, 7, 118, 103,
				109, 97, 120, 112, 115, 7, 118, 103, 109, 97,
				120, 112, 100, 11, 118, 102, 105, 120, 117, 112,
				110, 97, 110, 112, 115, 11, 118, 102, 105, 120,
				117, 112, 110, 97, 110, 112, 100, 6, 118, 112,
				97, 100, 99, 100, 10, 118, 112, 97, 100, 100,
				115, 101, 116, 99, 100, 6, 118, 112, 115, 98,
				98, 100, 10, 118, 112, 115, 117, 98, 115, 101,
				116, 98, 100, 7, 118, 112, 115, 117, 98, 114,
				100, 7, 118, 115, 117, 98, 114, 112, 115, 7,
				118, 115, 117, 98, 114, 112, 100, 7, 118, 112,
				115, 98, 98, 114, 100, 11, 118, 112, 115, 117,
				98, 114, 115, 101, 116, 98, 100, 8, 118, 112,
				99, 109, 112, 108, 116, 100, 8, 118, 115, 99,
				97, 108, 101, 112, 115, 8, 118, 112, 109, 117,
				108, 104, 117, 100, 7, 118, 112, 109, 117, 108,
				104, 100, 11, 118, 102, 109, 97, 100, 100, 50,
				51, 51, 112, 115, 10, 118, 112, 109, 97, 100,
				100, 50, 51, 51, 100, 10, 118, 112, 109, 97,
				100, 100, 50, 51, 49, 100, 17, 118, 103, 97,
				116, 104, 101, 114, 112, 102, 48, 104, 105, 110,
				116, 100, 112, 115, 17, 118, 103, 97, 116, 104,
				101, 114, 112, 102, 48, 104, 105, 110, 116, 100,
				112, 100, 18, 118, 115, 99, 97, 116, 116, 101,
				114, 112, 102, 48, 104, 105, 110, 116, 100, 112,
				115, 18, 118, 115, 99, 97, 116, 116, 101, 114,
				112, 102, 48, 104, 105, 110, 116, 100, 112, 100,
				9, 118, 101, 120, 112, 50, 50, 51, 112, 115,
				7, 118, 108, 111, 103, 50, 112, 115, 8, 118,
				114, 99, 112, 50, 51, 112, 115, 10, 118, 114,
				115, 113, 114, 116, 50, 51, 112, 115, 10, 118,
				97, 100, 100, 115, 101, 116, 115, 112, 115, 10,
				118, 112, 97, 100, 100, 115, 101, 116, 115, 100,
				13, 118, 108, 111, 97, 100, 117, 110, 112, 97,
				99, 107, 108, 100, 13, 118, 108, 111, 97, 100,
				117, 110, 112, 97, 99, 107, 108, 113, 12, 118,
				112, 97, 99, 107, 115, 116, 111, 114, 101, 108,
				100, 12, 118, 112, 97, 99, 107, 115, 116, 111,
				114, 101, 108, 113, 14, 118, 108, 111, 97, 100,
				117, 110, 112, 97, 99, 107, 108, 112, 115, 14,
				118, 108, 111, 97, 100, 117, 110, 112, 97, 99,
				107, 108, 112, 100, 13, 118, 112, 97, 99, 107,
				115, 116, 111, 114, 101, 108, 112, 115, 13, 118,
				112, 97, 99, 107, 115, 116, 111, 114, 101, 108,
				112, 100, 13, 118, 108, 111, 97, 100, 117, 110,
				112, 97, 99, 107, 104, 100, 13, 118, 108, 111,
				97, 100, 117, 110, 112, 97, 99, 107, 104, 113,
				12, 118, 112, 97, 99, 107, 115, 116, 111, 114,
				101, 104, 100, 12, 118, 112, 97, 99, 107, 115,
				116, 111, 114, 101, 104, 113, 14, 118, 108, 111,
				97, 100, 117, 110, 112, 97, 99, 107, 104, 112,
				115, 14, 118, 108, 111, 97, 100, 117, 110, 112,
				97, 99, 107, 104, 112, 100, 13, 118, 112, 97,
				99, 107, 115, 116, 111, 114, 101, 104, 112, 115,
				13, 118, 112, 97, 99, 107, 115, 116, 111, 114,
				101, 104, 112, 100, 10, 118, 112, 101, 114, 109,
				102, 51, 50, 120, 52, 11, 118, 114, 110, 100,
				102, 120, 112, 110, 116, 112, 115, 11, 118, 114,
				110, 100, 102, 120, 112, 110, 116, 112, 100, 15,
				118, 99, 118, 116, 102, 120, 112, 110, 116, 117,
				100, 113, 50, 112, 115, 15, 118, 99, 118, 116,
				102, 120, 112, 110, 116, 112, 115, 50, 117, 100,
				113, 15, 118, 99, 118, 116, 102, 120, 112, 110,
				116, 112, 100, 50, 117, 100, 113, 14, 118, 99,
				118, 116, 102, 120, 112, 110, 116, 100, 113, 50,
				112, 115, 14, 118, 99, 118, 116, 102, 120, 112,
				110, 116, 112, 115, 50, 100, 113, 14, 118, 99,
				118, 116, 102, 120, 112, 110, 116, 112, 100, 50,
				100, 113, 7, 120, 115, 104, 97, 53, 49, 50,
				10, 120, 115, 116, 111, 114, 101, 95, 97, 108,
				116, 11, 120, 115, 104, 97, 53, 49, 50, 95,
				97, 108, 116, 10, 122, 101, 114, 111, 95, 98,
				121, 116, 101, 115, 7, 119, 114, 109, 115, 114,
				110, 115, 9, 119, 114, 109, 115, 114, 108, 105,
				115, 116, 9, 114, 100, 109, 115, 114, 108, 105,
				115, 116, 8, 114, 109, 112, 113, 117, 101, 114,
				121, 11, 112, 114, 101, 102, 101, 116, 99, 104,
				105, 116, 49, 11, 112, 114, 101, 102, 101, 116,
				99, 104, 105, 116, 48, 4, 97, 97, 100, 100,
				4, 97, 97, 110, 100, 4, 97, 120, 111, 114,
				3, 97, 111, 114, 8, 118, 112, 100, 112, 98,
				117, 117, 100, 8, 118, 112, 100, 112, 98, 115,
				117, 100, 8, 118, 112, 100, 112, 98, 115, 115,
				100, 9, 118, 112, 100, 112, 98, 117, 117, 100,
				115, 9, 118, 112, 100, 112, 98, 115, 117, 100,
				115, 9, 118, 112, 100, 112, 98, 115, 115, 100,
				115, 9, 116, 100, 112, 102, 112, 49, 54, 112,
				115, 12, 118, 99, 118, 116, 110, 101, 111, 112,
				104, 50, 112, 115, 12, 118, 99, 118, 116, 110,
				101, 101, 112, 104, 50, 112, 115, 14, 118, 99,
				118, 116, 110, 101, 101, 98, 102, 49, 54, 50,
				112, 115, 14, 118, 99, 118, 116, 110, 101, 111,
				98, 102, 49, 54, 50, 112, 115, 12, 118, 98,
				99, 115, 116, 110, 101, 115, 104, 50, 112, 115,
				14, 118, 98, 99, 115, 116, 110, 101, 98, 102,
				49, 54, 50, 112, 115, 8, 99, 109, 112, 111,
				120, 97, 100, 100, 9, 99, 109, 112, 110, 111,
				120, 97, 100, 100, 8, 99, 109, 112, 98, 120,
				97, 100, 100, 9, 99, 109, 112, 110, 98, 120,
				97, 100, 100, 8, 99, 109, 112, 122, 120, 97,
				100, 100, 9, 99, 109, 112, 110, 122, 120, 97,
				100, 100, 9, 99, 109, 112, 98, 101, 120, 97,
				100, 100, 10, 99, 109, 112, 110, 98, 101, 120,
				97, 100, 100, 8, 99, 109, 112, 115, 120, 97,
				100, 100, 9, 99, 109, 112, 110, 115, 120, 97,
				100, 100, 8, 99, 109, 112, 112, 120, 97, 100,
				100, 9, 99, 109, 112, 110, 112, 120, 97, 100,
				100, 8, 99, 109, 112, 108, 120, 97, 100, 100,
				9, 99, 109, 112, 110, 108, 120, 97, 100, 100,
				9, 99, 109, 112, 108, 101, 120, 97, 100, 100,
				10, 99, 109, 112, 110, 108, 101, 120, 97, 100,
				100
			};
		}
	}
	internal static class FormatterUtils
	{
		private static readonly string[] spaceStrings = CreateStrings(' ', 20);

		private static readonly string[] tabStrings = CreateStrings('\t', 6);

		[MethodImpl(MethodImplOptions.AggressiveInlining)]
		public static bool IsNotrackPrefixBranch(Code code)
		{
			if ((uint)(code - 763) > 2u)
			{
				return (uint)(code - 757) <= 2u;
			}
			return true;
		}

		private static bool IsCode64(CodeSize codeSize)
		{
			if (codeSize != CodeSize.Code64)
			{
				return codeSize == CodeSize.Unknown;
			}
			return true;
		}

		private static Register GetDefaultSegmentRegister(in Instruction instruction)
		{
			Register memoryBase = instruction.MemoryBase;
			if (memoryBase == Register.BP || memoryBase == Register.EBP || memoryBase == Register.ESP || memoryBase == Register.RBP || memoryBase == Register.RSP)
			{
				return Register.SS;
			}
			return Register.DS;
		}

		public static bool ShowSegmentPrefix(Register defaultSegReg, in Instruction instruction, bool showUselessPrefixes)
		{
			if (instruction.Code.IgnoresSegment())
			{
				return showUselessPrefixes;
			}
			Register segmentPrefix = instruction.SegmentPrefix;
			if (IsCode64(instruction.CodeSize))
			{
				if (segmentPrefix == Register.FS || segmentPrefix == Register.GS)
				{
					return true;
				}
				return showUselessPrefixes;
			}
			if (defaultSegReg == Register.None)
			{
				defaultSegReg = GetDefaultSegmentRegister(in instruction);
			}
			if (segmentPrefix != defaultSegReg)
			{
				return true;
			}
			return showUselessPrefixes;
		}

		public static bool ShowRepOrRepePrefix(Code code, bool showUselessPrefixes)
		{
			if (showUselessPrefixes || IsRepRepeRepneInstruction(code))
			{
				return true;
			}
			if ((uint)(code - 394) <= 2u)
			{
				return true;
			}
			return showUselessPrefixes;
		}

		public static bool ShowRepnePrefix(Code code, bool showUselessPrefixes)
		{
			if (showUselessPrefixes || IsRepRepeRepneInstruction(code))
			{
				return true;
			}
			return showUselessPrefixes;
		}

		public static bool IsRepeOrRepneInstruction(Code code)
		{
			if ((uint)(code - 335) <= 3u || (uint)(code - 351) <= 3u)
			{
				return true;
			}
			return false;
		}

		private static bool IsRepRepeRepneInstruction(Code code)
		{
			switch (code)
			{
			case Code.Insb_m8_DX:
			case Code.Insw_m16_DX:
			case Code.Insd_m32_DX:
			case Code.Outsb_DX_m8:
			case Code.Outsw_DX_m16:
			case Code.Outsd_DX_m32:
			case Code.Movsb_m8_m8:
			case Code.Movsw_m16_m16:
			case Code.Movsd_m32_m32:
			case Code.Movsq_m64_m64:
			case Code.Cmpsb_m8_m8:
			case Code.Cmpsw_m16_m16:
			case Code.Cmpsd_m32_m32:
			case Code.Cmpsq_m64_m64:
			case Code.Stosb_m8_AL:
			case Code.Stosw_m16_AX:
			case Code.Stosd_m32_EAX:
			case Code.Stosq_m64_RAX:
			case Code.Lodsb_AL_m8:
			case Code.Lodsw_AX_m16:
			case Code.Lodsd_EAX_m32:
			case Code.Lodsq_RAX_m64:
			case Code.Scasb_AL_m8:
			case Code.Scasw_AX_m16:
			case Code.Scasd_EAX_m32:
			case Code.Scasq_RAX_m64:
			case Code.Montmul_16:
			case Code.Montmul_32:
			case Code.Montmul_64:
			case Code.Xsha1_16:
			case Code.Xsha1_32:
			case Code.Xsha1_64:
			case Code.Xsha256_16:
			case Code.Xsha256_32:
			case Code.Xsha256_64:
			case Code.Xstore_16:
			case Code.Xstore_32:
			case Code.Xstore_64:
			case Code.Xcryptecb_16:
			case Code.Xcryptecb_32:
			case Code.Xcryptecb_64:
			case Code.Xcryptcbc_16:
			case Code.Xcryptcbc_32:
			case Code.Xcryptcbc_64:
			case Code.Xcryptctr_16:
			case Code.Xcryptctr_32:
			case Code.Xcryptctr_64:
			case Code.Xcryptcfb_16:
			case Code.Xcryptcfb_32:
			case Code.Xcryptcfb_64:
			case Code.Xcryptofb_16:
			case Code.Xcryptofb_32:
			case Code.Xcryptofb_64:
			case Code.Ccs_hash_16:
			case Code.Ccs_hash_32:
			case Code.Ccs_hash_64:
			case Code.Ccs_encrypt_16:
			case Code.Ccs_encrypt_32:
			case Code.Ccs_encrypt_64:
			case Code.Via_undoc_F30FA6F0_16:
			case Code.Via_undoc_F30FA6F0_32:
			case Code.Via_undoc_F30FA6F0_64:
			case Code.Via_undoc_F30FA6F8_16:
			case Code.Via_undoc_F30FA6F8_32:
			case Code.Via_undoc_F30FA6F8_64:
			case Code.Xsha512_16:
			case Code.Xsha512_32:
			case Code.Xsha512_64:
			case Code.Xstore_alt_16:
			case Code.Xstore_alt_32:
			case Code.Xstore_alt_64:
			case Code.Xsha512_alt_16:
			case Code.Xsha512_alt_32:
			case Code.Xsha512_alt_64:
				return true;
			default:
				return false;
			}
		}

		private static string[] CreateStrings(char c, int max)
		{
			string[] array = new string[max];
			for (int i = 0; i < array.Length; i++)
			{
				array[i] = new string(c, i + 1);
			}
			return array;
		}

		public static void AddTabs(FormatterOutput output, int column, int firstOperandCharIndex, int tabSize)
		{
			if (firstOperandCharIndex < 0)
			{
				firstOperandCharIndex = 0;
			}
			else if (firstOperandCharIndex > 256)
			{
				firstOperandCharIndex = 256;
			}
			if (tabSize <= 0)
			{
				int num = firstOperandCharIndex - column;
				if (num <= 0)
				{
					num = 1;
				}
				AddStrings(output, spaceStrings, num);
				return;
			}
			int num2 = firstOperandCharIndex;
			if (num2 <= column)
			{
				num2 = column + 1;
			}
			int num3 = num2 / tabSize * tabSize;
			bool flag = num3 > column;
			if (flag)
			{
				int count = (num3 - column / tabSize * tabSize) / tabSize;
				AddStrings(output, tabStrings, count);
				column = num3;
			}
			int num4 = firstOperandCharIndex - column;
			if (num4 > 0)
			{
				AddStrings(output, spaceStrings, num4);
			}
			else if (!flag)
			{
				AddStrings(output, spaceStrings, 1);
			}
		}

		private static void AddStrings(FormatterOutput output, string[] strings, int count)
		{
			while (count > 0)
			{
				int num = count;
				if (num >= strings.Length)
				{
					num = strings.Length;
				}
				output.Write(strings[num - 1], FormatterTextKind.Text);
				count -= num;
			}
		}

		public static bool IsCall(FormatterFlowControl kind)
		{
			if (kind != FormatterFlowControl.NearCall)
			{
				return kind == FormatterFlowControl.FarCall;
			}
			return true;
		}

		public static FormatterFlowControl GetFlowControl(in Instruction instruction)
		{
			switch (instruction.Code)
			{
			case Code.Jo_rel8_16:
			case Code.Jo_rel8_32:
			case Code.Jo_rel8_64:
			case Code.Jno_rel8_16:
			case Code.Jno_rel8_32:
			case Code.Jno_rel8_64:
			case Code.Jb_rel8_16:
			case Code.Jb_rel8_32:
			case Code.Jb_rel8_64:
			case Code.Jae_rel8_16:
			case Code.Jae_rel8_32:
			case Code.Jae_rel8_64:
			case Code.Je_rel8_16:
			case Code.Je_rel8_32:
			case Code.Je_rel8_64:
			case Code.Jne_rel8_16:
			case Code.Jne_rel8_32:
			case Code.Jne_rel8_64:
			case Code.Jbe_rel8_16:
			case Code.Jbe_rel8_32:
			case Code.Jbe_rel8_64:
			case Code.Ja_rel8_16:
			case Code.Ja_rel8_32:
			case Code.Ja_rel8_64:
			case Code.Js_rel8_16:
			case Code.Js_rel8_32:
			case Code.Js_rel8_64:
			case Code.Jns_rel8_16:
			case Code.Jns_rel8_32:
			case Code.Jns_rel8_64:
			case Code.Jp_rel8_16:
			case Code.Jp_rel8_32:
			case Code.Jp_rel8_64:
			case Code.Jnp_rel8_16:
			case Code.Jnp_rel8_32:
			case Code.Jnp_rel8_64:
			case Code.Jl_rel8_16:
			case Code.Jl_rel8_32:
			case Code.Jl_rel8_64:
			case Code.Jge_rel8_16:
			case Code.Jge_rel8_32:
			case Code.Jge_rel8_64:
			case Code.Jle_rel8_16:
			case Code.Jle_rel8_32:
			case Code.Jle_rel8_64:
			case Code.Jg_rel8_16:
			case Code.Jg_rel8_32:
			case Code.Jg_rel8_64:
			case Code.Jmp_rel8_16:
			case Code.Jmp_rel8_32:
			case Code.Jmp_rel8_64:
			case Code.VEX_KNC_Jkzd_kr_rel8_64:
			case Code.VEX_KNC_Jknzd_kr_rel8_64:
				return FormatterFlowControl.ShortBranch;
			case Code.Loopne_rel8_16_CX:
			case Code.Loopne_rel8_32_CX:
			case Code.Loopne_rel8_16_ECX:
			case Code.Loopne_rel8_32_ECX:
			case Code.Loopne_rel8_64_ECX:
			case Code.Loopne_rel8_16_RCX:
			case Code.Loopne_rel8_64_RCX:
			case Code.Loope_rel8_16_CX:
			case Code.Loope_rel8_32_CX:
			case Code.Loope_rel8_16_ECX:
			case Code.Loope_rel8_32_ECX:
			case Code.Loope_rel8_64_ECX:
			case Code.Loope_rel8_16_RCX:
			case Code.Loope_rel8_64_RCX:
			case Code.Loop_rel8_16_CX:
			case Code.Loop_rel8_32_CX:
			case Code.Loop_rel8_16_ECX:
			case Code.Loop_rel8_32_ECX:
			case Code.Loop_rel8_64_ECX:
			case Code.Loop_rel8_16_RCX:
			case Code.Loop_rel8_64_RCX:
			case Code.Jcxz_rel8_16:
			case Code.Jcxz_rel8_32:
			case Code.Jecxz_rel8_16:
			case Code.Jecxz_rel8_32:
			case Code.Jecxz_rel8_64:
			case Code.Jrcxz_rel8_16:
			case Code.Jrcxz_rel8_64:
				return FormatterFlowControl.AlwaysShortBranch;
			case Code.Call_rel16:
			case Code.Call_rel32_32:
			case Code.Call_rel32_64:
				return FormatterFlowControl.NearCall;
			case Code.Jmp_rel16:
			case Code.Jmp_rel32_32:
			case Code.Jmp_rel32_64:
			case Code.Jo_rel16:
			case Code.Jo_rel32_32:
			case Code.Jo_rel32_64:
			case Code.Jno_rel16:
			case Code.Jno_rel32_32:
			case Code.Jno_rel32_64:
			case Code.Jb_rel16:
			case Code.Jb_rel32_32:
			case Code.Jb_rel32_64:
			case Code.Jae_rel16:
			case Code.Jae_rel32_32:
			case Code.Jae_rel32_64:
			case Code.Je_rel16:
			case Code.Je_rel32_32:
			case Code.Je_rel32_64:
			case Code.Jne_rel16:
			case Code.Jne_rel32_32:
			case Code.Jne_rel32_64:
			case Code.Jbe_rel16:
			case Code.Jbe_rel32_32:
			case Code.Jbe_rel32_64:
			case Code.Ja_rel16:
			case Code.Ja_rel32_32:
			case Code.Ja_rel32_64:
			case Code.Js_rel16:
			case Code.Js_rel32_32:
			case Code.Js_rel32_64:
			case Code.Jns_rel16:
			case Code.Jns_rel32_32:
			case Code.Jns_rel32_64:
			case Code.Jp_rel16:
			case Code.Jp_rel32_32:
			case Code.Jp_rel32_64:
			case Code.Jnp_rel16:
			case Code.Jnp_rel32_32:
			case Code.Jnp_rel32_64:
			case Code.Jl_rel16:
			case Code.Jl_rel32_32:
			case Code.Jl_rel32_64:
			case Code.Jge_rel16:
			case Code.Jge_rel32_32:
			case Code.Jge_rel32_64:
			case Code.Jle_rel16:
			case Code.Jle_rel32_32:
			case Code.Jle_rel32_64:
			case Code.Jg_rel16:
			case Code.Jg_rel32_32:
			case Code.Jg_rel32_64:
			case Code.Jmpe_disp16:
			case Code.Jmpe_disp32:
			case Code.VEX_KNC_Jkzd_kr_rel32_64:
			case Code.VEX_KNC_Jknzd_kr_rel32_64:
				return FormatterFlowControl.NearBranch;
			case Code.Call_ptr1616:
			case Code.Call_ptr1632:
				return FormatterFlowControl.FarCall;
			case Code.Jmp_ptr1616:
			case Code.Jmp_ptr1632:
				return FormatterFlowControl.FarBranch;
			case Code.Xbegin_rel16:
			case Code.Xbegin_rel32:
				return FormatterFlowControl.Xbegin;
			default:
				throw new InvalidOperationException();
			}
		}

		public static bool ShowRepOrRepePrefix(Code code, FormatterOptions options)
		{
			return ShowRepOrRepePrefix(code, options.ShowUselessPrefixes);
		}

		public static bool ShowRepnePrefix(Code code, FormatterOptions options)
		{
			return ShowRepnePrefix(code, options.ShowUselessPrefixes);
		}

		[MethodImpl(MethodImplOptions.AggressiveInlining)]
		public static PrefixKind GetSegmentRegisterPrefixKind(Register register)
		{
			return (PrefixKind)(register - 71 + 0);
		}

		public static bool ShowIndexScale(in Instruction instruction, FormatterOptions options)
		{
			if (!options.ShowUselessPrefixes)
			{
				return !instruction.Code.IgnoresIndex();
			}
			return true;
		}

		public static bool ShowSegmentPrefix(Register defaultSegReg, in Instruction instruction, FormatterOptions options)
		{
			return ShowSegmentPrefix(defaultSegReg, in instruction, options.ShowUselessPrefixes);
		}

		public static bool CanShowRoundingControl(in Instruction instruction, FormatterOptions options)
		{
			switch (instruction.Code)
			{
			case Code.EVEX_Vcvtsi2sd_xmm_xmm_rm32_er:
			case Code.EVEX_Vcvtudq2pd_zmm_k1z_ymmm256b32_er:
			case Code.EVEX_Vcvtusi2sd_xmm_xmm_rm32_er:
			case Code.EVEX_Vcvtdq2pd_zmm_k1z_ymmm256b32_er:
				return options.ShowUselessPrefixes;
			default:
				return true;
			}
		}
	}
	internal enum FormatterFlowControl
	{
		AlwaysShortBranch,
		ShortBranch,
		NearBranch,
		NearCall,
		FarBranch,
		FarCall,
		Xbegin
	}
	internal static class MnemonicCC
	{
		public static FormatterString GetMnemonicCC(FormatterOptions options, int ccIndex, FormatterString[] mnemonics)
		{
			return mnemonics[ccIndex switch
			{
				0 => 0, 
				1 => 0, 
				2 => (int)options.CC_b, 
				3 => (int)options.CC_ae, 
				4 => (int)options.CC_e, 
				5 => (int)options.CC_ne, 
				6 => (int)options.CC_be, 
				7 => (int)options.CC_a, 
				8 => 0, 
				9 => 0, 
				10 => (int)options.CC_p, 
				11 => (int)options.CC_np, 
				12 => (int)options.CC_l, 
				13 => (int)options.CC_ge, 
				14 => (int)options.CC_le, 
				15 => (int)options.CC_g, 
				_ => throw new InvalidOperationException(), 
			}];
		}
	}
	internal enum PseudoOpsKind
	{
		cmpps,
		vcmpps,
		cmppd,
		vcmppd,
		cmpss,
		vcmpss,
		cmpsd,
		vcmpsd,
		pclmulqdq,
		vpclmulqdq,
		vpcomb,
		vpcomw,
		vpcomd,
		vpcomq,
		vpcomub,
		vpcomuw,
		vpcomud,
		vpcomuq,
		vpcmpb,
		vpcmpw,
		vpcmpd,
		vpcmpq,
		vpcmpub,
		vpcmpuw,
		vpcmpud,
		vpcmpuq,
		vcmpph,
		vcmpsh,
		vcmpps8,
		vcmppd8,
		vpcmpd6,
		vpcmpud6
	}
	internal static class RegistersTable
	{
		private const int MaxStringLength = 5;

		private static ReadOnlySpan<byte> GetRegistersData()
		{
			return new byte[1211]
			{
				3, 63, 63, 63, 2, 97, 108, 2, 99, 108,
				2, 100, 108, 2, 98, 108, 2, 97, 104, 2,
				99, 104, 2, 100, 104, 2, 98, 104, 3, 115,
				112, 108, 3, 98, 112, 108, 3, 115, 105, 108,
				3, 100, 105, 108, 3, 114, 56, 98, 3, 114,
				57, 98, 4, 114, 49, 48, 98, 4, 114, 49,
				49, 98, 4, 114, 49, 50, 98, 4, 114, 49,
				51, 98, 4, 114, 49, 52, 98, 4, 114, 49,
				53, 98, 2, 97, 120, 2, 99, 120, 2, 100,
				120, 2, 98, 120, 2, 115, 112, 2, 98, 112,
				2, 115, 105, 2, 100, 105, 3, 114, 56, 119,
				3, 114, 57, 119, 4, 114, 49, 48, 119, 4,
				114, 49, 49, 119, 4, 114, 49, 50, 119, 4,
				114, 49, 51, 119, 4, 114, 49, 52, 119, 4,
				114, 49, 53, 119, 3, 101, 97, 120, 3, 101,
				99, 120, 3, 101, 100, 120, 3, 101, 98, 120,
				3, 101, 115, 112, 3, 101, 98, 112, 3, 101,
				115, 105, 3, 101, 100, 105, 3, 114, 56, 100,
				3, 114, 57, 100, 4, 114, 49, 48, 100, 4,
				114, 49, 49, 100, 4, 114, 49, 50, 100, 4,
				114, 49, 51, 100, 4, 114, 49, 52, 100, 4,
				114, 49, 53, 100, 3, 114, 97, 120, 3, 114,
				99, 120, 3, 114, 100, 120, 3, 114, 98, 120,
				3, 114, 115, 112, 3, 114, 98, 112, 3, 114,
				115, 105, 3, 114, 100, 105, 2, 114, 56, 2,
				114, 57, 3, 114, 49, 48, 3, 114, 49, 49,
				3, 114, 49, 50, 3, 114, 49, 51, 3, 114,
				49, 52, 3, 114, 49, 53, 3, 101, 105, 112,
				3, 114, 105, 112, 2, 101, 115, 2, 99, 115,
				2, 115, 115, 2, 100, 115, 2, 102, 115, 2,
				103, 115, 4, 120, 109, 109, 48, 4, 120, 109,
				109, 49, 4, 120, 109, 109, 50, 4, 120, 109,
				109, 51, 4, 120, 109, 109, 52, 4, 120, 109,
				109, 53, 4, 120, 109, 109, 54, 4, 120, 109,
				109, 55, 4, 120, 109, 109, 56, 4, 120, 109,
				109, 57, 5, 120, 109, 109, 49, 48, 5, 120,
				109, 109, 49, 49, 5, 120, 109, 109, 49, 50,
				5, 120, 109, 109, 49, 51, 5, 120, 109, 109,
				49, 52, 5, 120, 109, 109, 49, 53, 5, 120,
				109, 109, 49, 54, 5, 120, 109, 109, 49, 55,
				5, 120, 109, 109, 49, 56, 5, 120, 109, 109,
				49, 57, 5, 120, 109, 109, 50, 48, 5, 120,
				109, 109, 50, 49, 5, 120, 109, 109, 50, 50,
				5, 120, 109, 109, 50, 51, 5, 120, 109, 109,
				50, 52, 5, 120, 109, 109, 50, 53, 5, 120,
				109, 109, 50, 54, 5, 120, 109, 109, 50, 55,
				5, 120, 109, 109, 50, 56, 5, 120, 109, 109,
				50, 57, 5, 120, 109, 109, 51, 48, 5, 120,
				109, 109, 51, 49, 4, 121, 109, 109, 48, 4,
				121, 109, 109, 49, 4, 121, 109, 109, 50, 4,
				121, 109, 109, 51, 4, 121, 109, 109, 52, 4,
				121, 109, 109, 53, 4, 121, 109, 109, 54, 4,
				121, 109, 109, 55, 4, 121, 109, 109, 56, 4,
				121, 109, 109, 57, 5, 121, 109, 109, 49, 48,
				5, 121, 109, 109, 49, 49, 5, 121, 109, 109,
				49, 50, 5, 121, 109, 109, 49, 51, 5, 121,
				109, 109, 49, 52, 5, 121, 109, 109, 49, 53,
				5, 121, 109, 109, 49, 54, 5, 121, 109, 109,
				49, 55, 5, 121, 109, 109, 49, 56, 5, 121,
				109, 109, 49, 57, 5, 121, 109, 109, 50, 48,
				5, 121, 109, 109, 50, 49, 5, 121, 109, 109,
				50, 50, 5, 121, 109, 109, 50, 51, 5, 121,
				109, 109, 50, 52, 5, 121, 109, 109, 50, 53,
				5, 121, 109, 109, 50, 54, 5, 121, 109, 109,
				50, 55, 5, 121, 109, 109, 50, 56, 5, 121,
				109, 109, 50, 57, 5, 121, 109, 109, 51, 48,
				5, 121, 109, 109, 51, 49, 4, 122, 109, 109,
				48, 4, 122, 109, 109, 49, 4, 122, 109, 109,
				50, 4, 122, 109, 109, 51, 4, 122, 109, 109,
				52, 4, 122, 109, 109, 53, 4, 122, 109, 109,
				54, 4, 122, 109, 109, 55, 4, 122, 109, 109,
				56, 4, 122, 109, 109, 57, 5, 122, 109, 109,
				49, 48, 5, 122, 109, 109, 49, 49, 5, 122,
				109, 109, 49, 50, 5, 122, 109, 109, 49, 51,
				5, 122, 109, 109, 49, 52, 5, 122, 109, 109,
				49, 53, 5, 122, 109, 109, 49, 54, 5, 122,
				109, 109, 49, 55, 5, 122, 109, 109, 49, 56,
				5, 122, 109, 109, 49, 57, 5, 122, 109, 109,
				50, 48, 5, 122, 109, 109, 50, 49, 5, 122,
				109, 109, 50, 50, 5, 122, 109, 109, 50, 51,
				5, 122, 109, 109, 50, 52, 5, 122, 109, 109,
				50, 53, 5, 122, 109, 109, 50, 54, 5, 122,
				109, 109, 50, 55, 5, 122, 109, 109, 50, 56,
				5, 122, 109, 109, 50, 57, 5, 122, 109, 109,
				51, 48, 5, 122, 109, 109, 51, 49, 2, 107,
				48, 2, 107, 49, 2, 107, 50, 2, 107, 51,
				2, 107, 52, 2, 107, 53, 2, 107, 54, 2,
				107, 55, 4, 98, 110, 100, 48, 4, 98, 110,
				100, 49, 4, 98, 110, 100, 50, 4, 98, 110,
				100, 51, 3, 99, 114, 48, 3, 99, 114, 49,
				3, 99, 114, 50, 3, 99, 114, 51, 3, 99,
				114, 52, 3, 99, 114, 53, 3, 99, 114, 54,
				3, 99, 114, 55, 3, 99, 114, 56, 3, 99,
				114, 57, 4, 99, 114, 49, 48, 4, 99, 114,
				49, 49, 4, 99, 114, 49, 50, 4, 99, 114,
				49, 51, 4, 99, 114, 49, 52, 4, 99, 114,
				49, 53, 3, 100, 114, 48, 3, 100, 114, 49,
				3, 100, 114, 50, 3, 100, 114, 51, 3, 100,
				114, 52, 3, 100, 114, 53, 3, 100, 114, 54,
				3, 100, 114, 55, 3, 100, 114, 56, 3, 100,
				114, 57, 4, 100, 114, 49, 48, 4, 100, 114,
				49, 49, 4, 100, 114, 49, 50, 4, 100, 114,
				49, 51, 4, 100, 114, 49, 52, 4, 100, 114,
				49, 53, 5, 115, 116, 40, 48, 41, 5, 115,
				116, 40, 49, 41, 5, 115, 116, 40, 50, 41,
				5, 115, 116, 40, 51, 41, 5, 115, 116, 40,
				52, 41, 5, 115, 116, 40, 53, 41, 5, 115,
				116, 40, 54, 41, 5, 115, 116, 40, 55, 41,
				3, 109, 109, 48, 3, 109, 109, 49, 3, 109,
				109, 50, 3, 109, 109, 51, 3, 109, 109, 52,
				3, 109, 109, 53, 3, 109, 109, 54, 3, 109,
				109, 55, 3, 116, 114, 48, 3, 116, 114, 49,
				3, 116, 114, 50, 3, 116, 114, 51, 3, 116,
				114, 52, 3, 116, 114, 53, 3, 116, 114, 54,
				3, 116, 114, 55, 4, 116, 109, 109, 48, 4,
				116, 109, 109, 49, 4, 116, 109, 109, 50, 4,
				116, 109, 109, 51, 4, 116, 109, 109, 52, 4,
				116, 109, 109, 53, 4, 116, 109, 109, 54, 4,
				116, 109, 109, 55, 2, 115, 116, 3, 63, 63,
				63, 3, 63, 63, 63, 3, 63, 63, 63, 3,
				63, 63, 63, 3, 63, 63, 63, 3, 63, 63,
				63
			};
		}

		public static FormatterString[] GetRegisters()
		{
			DataReader dataReader = new DataReader(GetRegistersData(), 5);
			FormatterString[] array = new FormatterString[256];
			for (int i = 0; i < array.Length; i++)
			{
				array[i] = new FormatterString(dataReader.ReadAsciiString());
			}
			if (dataReader.CanRead)
			{
				throw new InvalidOperationException();
			}
			return array;
		}
	}
}
namespace Iced.Intel.FastFormatterInternal
{
	[Flags]
	internal enum FastFmtFlags : byte
	{
		None = 0,
		HasVPrefix = 1,
		SameAsPrev = 2,
		ForceMemSize = 4,
		PseudoOpsKindShift = 3,
		cmpps = 8,
		vcmpps = 0x10,
		cmppd = 0x18,
		vcmppd = 0x20,
		cmpss = 0x28,
		vcmpss = 0x30,
		cmpsd = 0x38,
		vcmpsd = 0x40,
		pclmulqdq = 0x48,
		vpclmulqdq = 0x50,
		vpcomb = 0x58,
		vpcomw = 0x60,
		vpcomd = 0x68,
		vpcomq = 0x70,
		vpcomub = 0x78,
		vpcomuw = 0x80,
		vpcomud = 0x88,
		vpcomuq = 0x90,
		vpcmpb = 0x98,
		vpcmpw = 0xA0,
		vpcmpd = 0xA8,
		vpcmpq = 0xB0,
		vpcmpub = 0xB8,
		vpcmpuw = 0xC0,
		vpcmpud = 0xC8,
		vpcmpuq = 0xD0,
		vcmpph = 0xD8,
		vcmpsh = 0xE0,
		vcmpps8 = 0xE8,
		vcmppd8 = 0xF0,
		vpcmpd6 = 0xF8
	}
	internal static class FmtData
	{
		public static readonly string[] Mnemonics = ParseData(out Flags);

		public static readonly FastFmtFlags[] Flags;

		private static string[] ParseData(out FastFmtFlags[] outFlags)
		{
			DataReader dataReader = new DataReader(GetSerializedData());
			string[] stringsTable = FormatterStringsTable.GetStringsTable();
			string[] array = new string[4911];
			FastFmtFlags[] array2 = new FastFmtFlags[4911];
			char[] array3 = new char[1];
			int index = -1;
			FastFmtFlags fastFmtFlags = FastFmtFlags.None;
			for (int i = 0; i < array.Length; i++)
			{
				FastFmtFlags fastFmtFlags2 = (FastFmtFlags)dataReader.ReadByte();
				int num;
				if ((fastFmtFlags2 & FastFmtFlags.SameAsPrev) != 0)
				{
					num = dataReader.Index;
					dataReader.Index = index;
				}
				else
				{
					num = -1;
					index = dataReader.Index;
				}
				string text = stringsTable[dataReader.ReadCompressedUInt32()];
				if ((fastFmtFlags & FastFmtFlags.HasVPrefix) == (fastFmtFlags2 & FastFmtFlags.HasVPrefix) && (fastFmtFlags2 & FastFmtFlags.SameAsPrev) != 0)
				{
					text = array[i - 1];
				}
				else if ((fastFmtFlags2 & FastFmtFlags.HasVPrefix) != 0)
				{
					array3[0] = 'v';
					text = string.Intern(new string(array3) + text);
				}
				array2[i] = fastFmtFlags2;
				array[i] = text;
				fastFmtFlags = fastFmtFlags2;
				if (num >= 0)
				{
					dataReader.Index = num;
				}
			}
			if (dataReader.CanRead)
			{
				throw new InvalidOperationException();
			}
			outFlags = array2;
			return array;
		}

		private static ReadOnlySpan<byte> GetSerializedData()
		{
			return new byte[8896]
			{
				0, 128, 1, 0, 130, 1, 0, 132, 1, 0,
				134, 1, 0, 136, 1, 0, 4, 2, 2, 2,
				2, 2, 2, 2, 2, 2, 2, 2, 0, 3,
				2, 0, 12, 2, 0, 5, 2, 2, 2, 2,
				2, 2, 2, 2, 2, 2, 2, 0, 3, 2,
				0, 12, 0, 6, 2, 2, 2, 2, 2, 2,
				2, 2, 2, 2, 2, 0, 3, 2, 0, 12,
				2, 0, 7, 2, 2, 2, 2, 2, 2, 2,
				2, 2, 2, 2, 0, 3, 2, 0, 12, 2,
				0, 8, 2, 2, 2, 2, 2, 2, 2, 2,
				2, 2, 2, 0, 137, 1, 0, 9, 2, 2,
				2, 2, 2, 2, 2, 2, 2, 2, 2, 0,
				138, 1, 0, 10, 2, 2, 2, 2, 2, 2,
				2, 2, 2, 2, 2, 0, 139, 1, 0, 11,
				2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
				2, 0, 140, 1, 0, 141, 1, 2, 0, 142,
				1, 2, 0, 3, 2, 2, 0, 12, 2, 2,
				0, 143, 1, 0, 144, 1, 0, 145, 1, 0,
				146, 1, 0, 147, 1, 2, 0, 148, 1, 2,
				0, 149, 1, 2, 2, 0, 3, 2, 2, 0,
				27, 2, 2, 0, 3, 2, 2, 0, 27, 2,
				2, 0, 152, 1, 0, 153, 1, 0, 154, 1,
				0, 156, 1, 0, 157, 1, 0, 158, 1, 0,
				159, 1, 2, 2, 0, 160, 1, 2, 2, 0,
				161, 1, 2, 2, 0, 164, 1, 2, 2, 0,
				167, 1, 2, 2, 0, 169, 1, 2, 2, 0,
				171, 1, 2, 2, 0, 173, 1, 2, 2, 0,
				175, 1, 2, 2, 0, 176, 1, 2, 2, 0,
				177, 1, 2, 2, 0, 179, 1, 2, 2, 0,
				181, 1, 2, 2, 0, 183, 1, 2, 2, 0,
				185, 1, 2, 2, 0, 187, 1, 2, 2, 4,
				4, 4, 5, 4, 6, 4, 7, 4, 8, 4,
				9, 4, 10, 4, 11, 4, 4, 6, 6, 4,
				5, 6, 6, 4, 6, 6, 6, 4, 7, 6,
				6, 4, 8, 6, 6, 4, 9, 6, 6, 4,
				10, 6, 6, 4, 11, 6, 6, 4, 4, 4,
				5, 4, 6, 4, 7, 4, 8, 4, 9, 4,
				10, 4, 11, 4, 4, 6, 6, 4, 5, 6,
				6, 4, 6, 6, 6, 4, 7, 6, 6, 4,
				8, 6, 6, 4, 9, 6, 6, 4, 10, 6,
				6, 4, 11, 6, 6, 0, 13, 2, 2, 2,
				0, 61, 2, 2, 2, 0, 1, 2, 2, 2,
				2, 2, 2, 2, 2, 2, 2, 0, 189, 1,
				2, 2, 0, 1, 2, 2, 4, 12, 6, 6,
				0, 2, 2, 2, 0, 61, 2, 2, 0, 190,
				1, 0, 192, 1, 0, 193, 1, 0, 195, 1,
				0, 197, 1, 0, 199, 1, 0, 201, 1, 0,
				43, 2, 0, 205, 1, 0, 206, 1, 0, 207,
				1, 0, 208, 1, 0, 209, 1, 0, 210, 1,
				0, 211, 1, 0, 212, 1, 0, 213, 1, 0,
				1, 2, 2, 2, 2, 2, 2, 2, 0, 216,
				1, 0, 217, 1, 0, 37, 0, 218, 1, 0,
				220, 1, 0, 221, 1, 0, 157, 6, 0, 222,
				1, 0, 13, 2, 2, 2, 0, 224, 1, 0,
				225, 1, 0, 226, 1, 0, 227, 1, 0, 229,
				1, 0, 230, 1, 0, 231, 1, 0, 232, 1,
				0, 234, 1, 0, 235, 1, 0, 236, 1, 0,
				237, 1, 0, 1, 2, 2, 2, 4, 29, 4,
				30, 4, 31, 4, 32, 4, 18, 4, 33, 4,
				41, 4, 34, 4, 29, 6, 6, 4, 30, 6,
				6, 4, 31, 6, 6, 4, 32, 6, 6, 4,
				18, 6, 6, 4, 33, 6, 6, 4, 41, 6,
				6, 4, 34, 6, 6, 0, 42, 2, 2, 2,
				2, 2, 0, 242, 1, 2, 0, 243, 1, 2,
				4, 1, 0, 244, 1, 4, 1, 6, 6, 0,
				245, 1, 2, 0, 246, 1, 2, 2, 0, 247,
				1, 2, 2, 0, 249, 1, 2, 0, 252, 1,
				0, 249, 1, 2, 0, 252, 1, 0, 253, 1,
				0, 254, 1, 0, 255, 1, 0, 128, 2, 0,
				129, 2, 0, 130, 2, 4, 29, 4, 30, 4,
				31, 4, 32, 4, 18, 4, 33, 4, 41, 4,
				34, 4, 29, 6, 6, 4, 30, 6, 6, 4,
				31, 6, 6, 4, 32, 6, 6, 4, 18, 6,
				6, 4, 33, 6, 6, 4, 41, 6, 6, 4,
				34, 6, 6, 4, 29, 4, 30, 4, 31, 4,
				32, 4, 18, 4, 33, 4, 41, 4, 34, 4,
				29, 6, 6, 4, 30, 6, 6, 4, 31, 6,
				6, 4, 32, 6, 6, 4, 18, 6, 6, 4,
				33, 6, 6, 4, 41, 6, 6, 4, 34, 6,
				6, 0, 131, 2, 0, 132, 2, 0, 133, 2,
				0, 134, 2, 4, 136, 2, 4, 137, 2, 4,
				138, 2, 4, 139, 2, 4, 140, 2, 4, 141,
				2, 4, 142, 2, 4, 143, 2, 0, 136, 2,
				0, 137, 2, 0, 138, 2, 0, 139, 2, 0,
				140, 2, 0, 141, 2, 0, 142, 2, 0, 143,
				2, 4, 144, 2, 4, 145, 2, 4, 125, 4,
				146, 2, 6, 0, 147, 2, 4, 148, 2, 4,
				149, 2, 4, 148, 2, 4, 149, 2, 0, 150,
				2, 0, 151, 2, 0, 144, 2, 0, 152, 2,
				0, 153, 2, 0, 125, 0, 155, 2, 0, 156,
				2, 0, 157, 2, 0, 158, 2, 0, 159, 2,
				0, 160, 2, 0, 161, 2, 0, 162, 2, 0,
				163, 2, 0, 164, 2, 0, 165, 2, 0, 166,
				2, 0, 167, 2, 0, 168, 2, 0, 169, 2,
				0, 170, 2, 0, 171, 2, 0, 172, 2, 0,
				173, 2, 0, 174, 2, 0, 175, 2, 0, 176,
				2, 0, 177, 2, 0, 178, 2, 0, 179, 2,
				0, 180, 2, 0, 181, 2, 4, 182, 2, 4,
				183, 2, 4, 184, 2, 4, 185, 2, 4, 186,
				2, 4, 187, 2, 4, 188, 2, 4, 189, 2,
				0, 190, 2, 0, 191, 2, 0, 192, 2, 0,
				193, 2, 0, 194, 2, 4, 195, 2, 4, 196,
				2, 4, 197, 2, 4, 198, 2, 4, 144, 2,
				4, 125, 0, 199, 2, 0, 200, 2, 0, 201,
				2, 0, 202, 2, 0, 203, 2, 0, 204, 2,
				0, 205, 2, 0, 206, 2, 0, 207, 2, 0,
				208, 2, 0, 209, 2, 0, 210, 2, 0, 211,
				2, 0, 212, 2, 0, 213, 2, 0, 214, 2,
				0, 215, 2, 4, 136, 2, 4, 137, 2, 4,
				138, 2, 4, 139, 2, 4, 140, 2, 4, 141,
				2, 4, 142, 2, 4, 143, 2, 0, 136, 2,
				0, 137, 2, 0, 138, 2, 0, 139, 2, 0,
				141, 2, 0, 140, 2, 0, 143, 2, 0, 142,
				2, 4, 144, 2, 4, 196, 2, 4, 145, 2,
				4, 125, 4, 217, 2, 6, 4, 218, 2, 4,
				219, 2, 4, 218, 2, 4, 219, 2, 0, 220,
				2, 0, 221, 2, 0, 222, 2, 0, 152, 2,
				0, 145, 2, 0, 125, 0, 223, 2, 0, 224,
				2, 4, 182, 2, 4, 183, 2, 4, 184, 2,
				4, 185, 2, 4, 186, 2, 4, 187, 2, 4,
				188, 2, 4, 189, 2, 0, 225, 2, 0, 226,
				2, 0, 139, 2, 0, 227, 2, 0, 229, 2,
				0, 228, 2, 0, 231, 2, 0, 230, 2, 4,
				195, 2, 4, 196, 2, 4, 197, 2, 4, 198,
				2, 4, 232, 2, 4, 195, 2, 4, 234, 2,
				4, 198, 2, 0, 236, 2, 0, 152, 2, 0,
				125, 2, 0, 220, 2, 0, 221, 2, 0, 237,
				2, 0, 238, 2, 0, 239, 2, 0, 240, 2,
				0, 126, 2, 2, 2, 0, 242, 2, 0, 126,
				2, 0, 127, 2, 2, 2, 0, 245, 2, 0,
				127, 2, 0, 247, 2, 2, 2, 2, 0, 248,
				2, 0, 247, 2, 2, 0, 249, 2, 2, 0,
				250, 2, 2, 2, 0, 251, 2, 2, 0, 252,
				2, 2, 2, 0, 253, 2, 2, 2, 0, 43,
				2, 2, 0, 28, 2, 2, 2, 2, 2, 2,
				2, 0, 252, 2, 2, 2, 0, 253, 2, 2,
				2, 0, 255, 2, 0, 128, 3, 0, 129, 3,
				4, 13, 6, 4, 130, 3, 4, 131, 3, 4,
				132, 3, 4, 27, 4, 133, 3, 4, 134, 3,
				4, 13, 6, 6, 6, 6, 6, 4, 130, 3,
				6, 6, 4, 131, 3, 6, 6, 4, 132, 3,
				6, 6, 4, 27, 6, 6, 4, 133, 3, 6,
				6, 4, 134, 3, 6, 6, 0, 135, 3, 0,
				136, 3, 0, 137, 3, 0, 138, 3, 0, 139,
				3, 0, 140, 3, 4, 141, 1, 4, 142, 1,
				4, 141, 1, 6, 6, 4, 142, 1, 6, 6,
				4, 43, 6, 6, 4, 141, 3, 6, 6, 4,
				28, 6, 6, 4, 142, 3, 6, 6, 4, 3,
				6, 6, 0, 143, 3, 2, 2, 0, 144, 3,
				2, 2, 0, 145, 3, 2, 2, 0, 146, 3,
				2, 2, 0, 147, 3, 2, 2, 0, 148, 3,
				2, 2, 4, 149, 3, 6, 0, 150, 3, 2,
				2, 0, 151, 3, 2, 2, 0, 152, 3, 2,
				2, 0, 153, 3, 2, 2, 0, 154, 3, 2,
				2, 0, 155, 3, 0, 156, 3, 2, 2, 0,
				157, 3, 0, 158, 3, 0, 159, 3, 0, 160,
				3, 0, 161, 3, 0, 162, 3, 0, 163, 3,
				0, 164, 3, 2, 2, 0, 165, 3, 0, 166,
				3, 0, 167, 3, 0, 168, 3, 0, 169, 3,
				0, 170, 3, 0, 171, 3, 0, 172, 3, 0,
				173, 3, 0, 174, 3, 0, 175, 3, 2, 2,
				0, 176, 3, 0, 177, 3, 2, 2, 0, 178,
				3, 2, 2, 0, 179, 3, 0, 180, 3, 0,
				181, 3, 0, 182, 3, 2, 2, 0, 183, 3,
				0, 184, 3, 0, 185, 3, 0, 186, 3, 0,
				187, 3, 0, 188, 3, 0, 189, 3, 2, 2,
				0, 190, 3, 0, 191, 3, 0, 192, 3, 2,
				2, 0, 193, 3, 0, 194, 3, 2, 2, 0,
				195, 3, 2, 2, 0, 196, 3, 0, 197, 3,
				0, 198, 3, 0, 199, 3, 0, 201, 3, 0,
				202, 3, 0, 203, 3, 0, 204, 3, 0, 205,
				3, 0, 206, 3, 0, 207, 3, 0, 208, 3,
				0, 2, 2, 2, 0, 209, 3, 0, 211, 3,
				0, 212, 3, 0, 213, 3, 0, 214, 3, 2,
				2, 2, 2, 2, 0, 35, 3, 3, 3, 3,
				3, 0, 36, 3, 3, 3, 3, 3, 0, 38,
				3, 3, 3, 3, 0, 37, 3, 3, 3, 3,
				0, 35, 3, 3, 3, 3, 3, 0, 36, 3,
				3, 3, 3, 3, 0, 38, 3, 3, 3, 3,
				0, 37, 3, 3, 3, 3, 0, 215, 3, 0,
				216, 3, 1, 215, 3, 1, 216, 3, 1, 215,
				3, 1, 216, 3, 0, 217, 3, 3, 3, 0,
				218, 3, 3, 3, 3, 3, 3, 0, 219, 3,
				3, 3, 3, 3, 3, 0, 216, 3, 3, 3,
				0, 217, 3, 3, 3, 0, 220, 3, 3, 3,
				3, 3, 3, 0, 221, 3, 3, 3, 3, 3,
				3, 0, 222, 3, 3, 3, 3, 3, 3, 0,
				223, 3, 3, 3, 3, 3, 3, 0, 224, 3,
				3, 3, 0, 225, 3, 3, 3, 0, 226, 3,
				3, 3, 0, 227, 3, 3, 3, 3, 3, 3,
				0, 225, 3, 3, 3, 0, 226, 3, 3, 3,
				0, 2, 2, 2, 2, 2, 2, 2, 2, 2,
				2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
				2, 2, 2, 2, 2, 0, 228, 3, 0, 229,
				3, 0, 230, 3, 0, 231, 3, 0, 232, 3,
				0, 233, 3, 2, 0, 234, 3, 2, 0, 235,
				3, 2, 0, 236, 3, 0, 233, 3, 2, 0,
				237, 3, 2, 0, 238, 3, 2, 0, 239, 3,
				0, 240, 3, 0, 241, 3, 0, 242, 3, 0,
				243, 3, 4, 2, 6, 6, 0, 1, 2, 2,
				2, 2, 2, 2, 2, 2, 2, 0, 19, 3,
				3, 3, 3, 3, 0, 20, 3, 3, 3, 3,
				3, 0, 19, 3, 3, 3, 3, 3, 0, 20,
				3, 3, 3, 3, 3, 0, 244, 3, 0, 245,
				3, 4, 246, 3, 6, 7, 7, 7, 7, 4,
				247, 3, 6, 7, 7, 7, 7, 0, 248, 3,
				3, 3, 3, 3, 3, 0, 249, 3, 3, 3,
				3, 3, 3, 0, 250, 3, 0, 251, 3, 0,
				252, 3, 0, 253, 3, 0, 254, 3, 2, 3,
				3, 3, 3, 0, 255, 3, 2, 3, 3, 3,
				3, 0, 128, 4, 0, 129, 4, 0, 130, 4,
				2, 3, 3, 3, 3, 0, 131, 4, 2, 3,
				3, 3, 3, 0, 132, 4, 3, 3, 0, 133,
				4, 3, 3, 0, 134, 4, 0, 135, 4, 1,
				134, 4, 1, 135, 4, 1, 134, 4, 1, 135,
				4, 0, 136, 4, 0, 137, 4, 0, 138, 4,
				0, 139, 4, 0, 140, 4, 0, 141, 4, 0,
				142, 4, 0, 143, 4, 0, 144, 4, 2, 2,
				0, 145, 4, 2, 2, 0, 146, 4, 2, 2,
				0, 149, 4, 2, 2, 0, 152, 4, 2, 2,
				0, 154, 4, 2, 2, 0, 156, 4, 2, 2,
				0, 158, 4, 2, 2, 0, 160, 4, 2, 2,
				0, 161, 4, 2, 2, 0, 162, 4, 2, 2,
				0, 164, 4, 2, 2, 0, 166, 4, 2, 2,
				0, 168, 4, 2, 2, 0, 170, 4, 2, 2,
				0, 172, 4, 2, 2, 0, 174, 4, 0, 175,
				4, 0, 176, 4, 0, 177, 4, 0, 178, 4,
				0, 179, 4, 0, 180, 4, 0, 181, 4, 0,
				182, 4, 0, 183, 4, 0, 184, 4, 0, 185,
				4, 0, 186, 4, 0, 187, 4, 0, 188, 4,
				0, 189, 4, 0, 190, 4, 0, 191, 4, 0,
				192, 4, 0, 193, 4, 0, 194, 4, 0, 195,
				4, 0, 196, 4, 0, 197, 4, 0, 198, 4,
				0, 199, 4, 0, 200, 4, 0, 201, 4, 0,
				202, 4, 0, 203, 4, 0, 204, 4, 0, 205,
				4, 2, 3, 3, 3, 3, 0, 206, 4, 2,
				3, 3, 3, 3, 0, 207, 4, 3, 3, 3,
				3, 3, 0, 208, 4, 3, 3, 3, 3, 3,
				0, 209, 4, 3, 3, 0, 210, 4, 3, 3,
				0, 211, 4, 3, 3, 0, 212, 4, 3, 0,
				213, 4, 3, 3, 0, 214, 4, 3, 0, 215,
				4, 3, 3, 3, 3, 3, 0, 216, 4, 3,
				3, 3, 3, 3, 0, 217, 4, 3, 3, 3,
				3, 3, 0, 218, 4, 3, 3, 3, 3, 3,
				0, 219, 4, 3, 3, 3, 3, 3, 0, 220,
				4, 3, 3, 3, 3, 3, 0, 221, 4, 3,
				3, 3, 3, 3, 0, 222, 4, 3, 3, 3,
				3, 3, 0, 62, 3, 3, 3, 3, 3, 0,
				63, 3, 3, 3, 3, 3, 0, 223, 4, 3,
				3, 0, 224, 4, 3, 3, 0, 64, 3, 3,
				3, 3, 3, 0, 65, 3, 3, 3, 3, 3,
				0, 225, 4, 3, 3, 0, 226, 4, 3, 3,
				0, 66, 3, 3, 3, 3, 3, 0, 67, 7,
				7, 7, 7, 3, 0, 227, 4, 3, 3, 0,
				228, 4, 3, 3, 0, 229, 4, 3, 3, 3,
				3, 3, 4, 230, 4, 6, 2, 0, 231, 4,
				3, 3, 3, 3, 3, 0, 232, 4, 3, 3,
				3, 3, 3, 0, 68, 3, 3, 3, 3, 3,
				0, 69, 3, 3, 3, 3, 3, 0, 233, 4,
				3, 3, 0, 234, 4, 3, 3, 0, 235, 4,
				3, 3, 3, 3, 3, 0, 236, 4, 3, 3,
				3, 3, 3, 0, 237, 4, 3, 3, 0, 238,
				4, 3, 3, 0, 239, 4, 3, 3, 3, 3,
				3, 0, 240, 4, 3, 3, 3, 3, 3, 0,
				241, 4, 3, 3, 0, 242, 4, 3, 3, 0,
				243, 4, 3, 3, 3, 3, 3, 0, 244, 4,
				3, 3, 3, 3, 3, 0, 245, 4, 3, 3,
				0, 246, 4, 3, 3, 0, 70, 2, 3, 3,
				3, 3, 3, 0, 71, 2, 3, 3, 3, 3,
				3, 0, 72, 2, 3, 3, 3, 3, 3, 0,
				73, 2, 3, 3, 3, 3, 3, 0, 74, 2,
				3, 3, 3, 3, 3, 0, 75, 2, 3, 3,
				3, 3, 3, 0, 46, 2, 3, 3, 3, 3,
				3, 0, 76, 2, 3, 3, 3, 3, 3, 0,
				77, 2, 3, 3, 3, 3, 3, 0, 78, 2,
				3, 3, 3, 3, 3, 0, 79, 2, 3, 3,
				3, 3, 3, 0, 80, 2, 3, 3, 3, 3,
				3, 0, 247, 4, 3, 3, 3, 3, 3, 0,
				248, 4, 3, 3, 3, 3, 3, 0, 47, 0,
				14, 0, 47, 0, 14, 1, 47, 1, 14, 1,
				47, 1, 14, 2, 0, 249, 4, 3, 3, 0,
				48, 2, 2, 0, 49, 2, 2, 0, 250, 4,
				3, 3, 0, 251, 4, 2, 2, 0, 252, 4,
				2, 2, 0, 253, 4, 2, 2, 0, 254, 4,
				2, 2, 0, 255, 4, 0, 81, 3, 3, 3,
				3, 3, 0, 128, 5, 3, 3, 3, 3, 3,
				0, 129, 5, 3, 3, 3, 3, 3, 0, 21,
				2, 3, 3, 3, 3, 3, 0, 22, 2, 3,
				3, 3, 3, 3, 0, 23, 2, 3, 3, 3,
				3, 3, 0, 130, 5, 2, 2, 0, 131, 5,
				2, 2, 0, 132, 5, 2, 2, 0, 133, 5,
				2, 2, 0, 15, 2, 3, 3, 3, 3, 3,
				0, 16, 2, 3, 3, 3, 3, 3, 0, 134,
				5, 2, 2, 0, 17, 2, 3, 3, 3, 3,
				3, 0, 24, 2, 3, 3, 3, 3, 3, 0,
				135, 5, 3, 3, 3, 3, 3, 0, 25, 2,
				3, 3, 3, 3, 3, 0, 136, 5, 3, 3,
				3, 3, 3, 0, 82, 2, 3, 3, 3, 3,
				3, 0, 83, 2, 3, 3, 3, 3, 3, 0,
				50, 2, 3, 3, 3, 3, 3, 0, 137, 5,
				0, 138, 5, 0, 139, 5, 0, 140, 5, 2,
				0, 141, 5, 2, 2, 4, 142, 5, 6, 2,
				0, 143, 5, 0, 144, 5, 2, 2, 0, 145,
				5, 2, 2, 0, 146, 5, 2, 0, 147, 5,
				0, 148, 5, 2, 0, 149, 5, 2, 0, 150,
				5, 2, 2, 4, 151, 5, 6, 2, 0, 143,
				5, 0, 152, 5, 2, 2, 0, 153, 5, 2,
				2, 0, 154, 5, 2, 0, 147, 5, 0, 155,
				5, 2, 0, 156, 5, 2, 2, 0, 157, 5,
				2, 2, 0, 158, 5, 2, 2, 0, 159, 5,
				2, 2, 0, 160, 5, 2, 2, 4, 161, 5,
				6, 2, 0, 162, 5, 2, 2, 0, 163, 5,
				2, 2, 4, 164, 5, 6, 4, 165, 5, 6,
				0, 166, 5, 3, 3, 0, 167, 5, 3, 3,
				0, 168, 5, 3, 3, 0, 169, 5, 3, 3,
				0, 47, 0, 14, 0, 47, 0, 14, 1, 47,
				1, 14, 1, 47, 1, 14, 2, 3, 3, 2,
				0, 249, 4, 3, 3, 0, 48, 2, 2, 0,
				49, 2, 2, 0, 250, 4, 3, 3, 0, 251,
				4, 2, 2, 0, 252, 4, 2, 2, 0, 253,
				4, 2, 2, 0, 254, 4, 2, 2, 0, 159,
				1, 2, 2, 0, 160, 1, 2, 2, 0, 161,
				1, 2, 2, 0, 164, 1, 2, 2, 0, 167,
				1, 2, 2, 0, 169, 1, 2, 2, 0, 171,
				1, 2, 2, 0, 173, 1, 2, 2, 0, 175,
				1, 2, 2, 0, 176, 1, 2, 2, 0, 177,
				1, 2, 2, 0, 179, 1, 2, 2, 0, 181,
				1, 2, 2, 0, 183, 1, 2, 2, 0, 185,
				1, 2, 2, 0, 187, 1, 2, 2, 0, 170,
				5, 0, 171, 5, 0, 172, 5, 0, 175, 5,
				0, 178, 5, 0, 180, 5, 0, 182, 5, 0,
				184, 5, 0, 186, 5, 0, 187, 5, 0, 188,
				5, 0, 190, 5, 0, 192, 5, 0, 194, 5,
				0, 196, 5, 0, 198, 5, 0, 200, 5, 0,
				201, 5, 0, 202, 5, 0, 203, 5, 0, 200,
				5, 0, 201, 5, 0, 202, 5, 0, 203, 5,
				0, 200, 5, 0, 202, 5, 0, 203, 5, 0,
				201, 5, 0, 200, 5, 0, 202, 5, 0, 203,
				5, 0, 201, 5, 0, 204, 5, 0, 205, 5,
				0, 206, 5, 0, 207, 5, 0, 208, 5, 0,
				209, 5, 0, 210, 5, 0, 211, 5, 0, 3,
				2, 2, 0, 12, 2, 2, 0, 212, 5, 0,
				213, 5, 2, 2, 0, 214, 5, 2, 2, 2,
				2, 2, 0, 215, 5, 2, 2, 0, 216, 5,
				2, 2, 0, 217, 5, 2, 2, 0, 218, 5,
				2, 0, 219, 5, 2, 2, 0, 220, 5, 2,
				2, 0, 221, 5, 2, 2, 0, 222, 5, 2,
				2, 0, 223, 5, 2, 2, 0, 224, 5, 2,
				2, 0, 225, 5, 2, 0, 226, 5, 2, 2,
				0, 3, 2, 2, 0, 12, 2, 2, 0, 227,
				5, 0, 228, 5, 2, 2, 0, 229, 5, 2,
				2, 2, 2, 2, 0, 230, 5, 0, 231, 5,
				0, 232, 5, 2, 0, 233, 5, 0, 234, 5,
				0, 235, 5, 2, 0, 236, 5, 0, 237, 5,
				2, 1, 236, 5, 0, 238, 5, 0, 239, 5,
				2, 1, 238, 5, 0, 240, 5, 0, 241, 5,
				4, 242, 5, 6, 0, 243, 5, 0, 244, 5,
				0, 245, 5, 0, 246, 5, 0, 247, 5, 0,
				248, 5, 0, 249, 5, 0, 250, 5, 2, 0,
				251, 5, 0, 252, 5, 2, 2, 0, 253, 5,
				2, 0, 254, 5, 0, 255, 5, 0, 51, 2,
				2, 2, 2, 2, 2, 2, 0, 52, 2, 2,
				2, 2, 2, 2, 2, 0, 53, 2, 2, 2,
				2, 2, 2, 2, 0, 128, 6, 0, 27, 2,
				2, 0, 129, 6, 2, 2, 2, 0, 130, 6,
				2, 2, 0, 131, 6, 2, 2, 0, 132, 6,
				2, 2, 0, 133, 6, 2, 2, 4, 135, 6,
				6, 6, 6, 6, 6, 0, 149, 3, 2, 0,
				141, 6, 2, 2, 0, 142, 6, 2, 2, 4,
				213, 5, 6, 6, 4, 228, 5, 6, 6, 4,
				131, 6, 6, 6, 4, 143, 6, 6, 6, 2,
				2, 2, 0, 144, 6, 2, 2, 0, 145, 6,
				2, 2, 0, 146, 6, 2, 2, 0, 147, 6,
				2, 2, 4, 149, 6, 6, 6, 6, 6, 6,
				0, 155, 6, 2, 2, 2, 8, 84, 19, 19,
				19, 19, 19, 24, 85, 35, 35, 35, 35, 35,
				40, 156, 6, 51, 51, 56, 157, 6, 67, 67,
				0, 158, 6, 2, 0, 54, 2, 2, 2, 3,
				3, 3, 3, 0, 26, 2, 2, 2, 3, 3,
				3, 3, 0, 159, 6, 3, 3, 3, 3, 3,
				0, 160, 6, 3, 3, 3, 3, 3, 0, 161,
				6, 0, 162, 6, 0, 163, 6, 0, 164, 6,
				0, 165, 6, 0, 166, 6, 0, 167, 6, 0,
				168, 6, 0, 169, 6, 0, 170, 6, 0, 171,
				6, 0, 172, 6, 2, 2, 0, 173, 6, 0,
				174, 6, 2, 2, 0, 175, 6, 2, 0, 176,
				6, 2, 2, 0, 177, 6, 3, 3, 0, 178,
				6, 3, 3, 0, 21, 2, 3, 3, 3, 3,
				3, 0, 15, 2, 3, 3, 3, 3, 3, 0,
				24, 2, 3, 3, 3, 3, 3, 0, 86, 2,
				3, 3, 3, 3, 3, 0, 87, 2, 3, 3,
				3, 3, 3, 0, 14, 3, 3, 0, 179, 6,
				0, 180, 6, 0, 55, 2, 2, 2, 3, 3,
				3, 3, 0, 88, 2, 3, 3, 3, 3, 3,
				0, 89, 2, 3, 3, 3, 3, 3, 0, 90,
				2, 3, 3, 3, 3, 3, 0, 181, 6, 2,
				3, 3, 0, 182, 6, 2, 2, 0, 183, 6,
				2, 2, 0, 91, 2, 3, 3, 3, 3, 3,
				0, 92, 2, 3, 3, 3, 3, 3, 0, 93,
				2, 3, 3, 3, 3, 3, 0, 184, 6, 2,
				3, 3, 0, 185, 6, 2, 2, 0, 186, 6,
				2, 2, 0, 94, 2, 3, 3, 3, 3, 3,
				0, 22, 2, 3, 3, 3, 3, 3, 0, 16,
				2, 3, 3, 3, 3, 3, 0, 134, 5, 2,
				2, 0, 95, 2, 3, 3, 3, 3, 3, 0,
				96, 2, 3, 3, 3, 3, 3, 0, 97, 2,
				3, 3, 3, 3, 3, 0, 187, 6, 7, 7,
				7, 7, 3, 0, 98, 3, 3, 3, 3, 3,
				0, 188, 6, 2, 2, 0, 189, 6, 7, 7,
				7, 7, 3, 0, 190, 6, 0, 191, 6, 3,
				3, 3, 3, 3, 0, 99, 2, 3, 3, 3,
				3, 3, 0, 100, 2, 3, 3, 3, 3, 3,
				0, 101, 2, 3, 3, 3, 3, 3, 0, 192,
				6, 2, 3, 3, 0, 193, 6, 2, 2, 0,
				194, 6, 2, 2, 0, 102, 2, 3, 3, 3,
				3, 3, 0, 103, 2, 3, 3, 3, 3, 3,
				0, 104, 2, 3, 3, 3, 3, 3, 0, 195,
				6, 2, 3, 3, 0, 196, 6, 2, 2, 0,
				197, 6, 2, 2, 0, 198, 6, 3, 3, 0,
				23, 2, 3, 3, 3, 3, 3, 0, 17, 2,
				3, 3, 3, 3, 3, 0, 25, 2, 3, 3,
				3, 3, 3, 0, 105, 2, 3, 3, 3, 3,
				3, 0, 106, 2, 3, 3, 3, 3, 3, 0,
				107, 2, 3, 3, 3, 3, 3, 0, 199, 6,
				0, 200, 6, 3, 0, 108, 2, 3, 3, 3,
				3, 3, 0, 109, 2, 3, 3, 3, 3, 3,
				0, 56, 2, 3, 3, 3, 3, 3, 0, 110,
				2, 3, 3, 3, 3, 3, 0, 111, 2, 3,
				3, 3, 3, 3, 0, 112, 2, 3, 3, 3,
				3, 3, 0, 57, 2, 3, 3, 3, 3, 3,
				0, 201, 6, 2, 2, 0, 113, 2, 3, 3,
				3, 3, 3, 0, 202, 6, 2, 3, 3, 0,
				203, 6, 2, 3, 3, 0, 204, 6, 2, 3,
				3, 0, 114, 2, 3, 3, 3, 3, 3, 0,
				205, 6, 2, 3, 3, 0, 206, 6, 2, 3,
				3, 0, 207, 6, 2, 3, 3, 0, 208, 6,
				2, 3, 3, 0, 209, 6, 2, 3, 3, 0,
				210, 6, 2, 3, 3, 0, 115, 2, 3, 3,
				3, 3, 3, 0, 39, 2, 2, 2, 2, 0,
				40, 2, 2, 2, 2, 0, 211, 6, 2, 0,
				212, 6, 2, 0, 213, 6, 0, 214, 6, 2,
				2, 0, 215, 6, 2, 2, 0, 216, 6, 2,
				2, 0, 217, 6, 2, 2, 0, 218, 6, 2,
				2, 0, 219, 6, 2, 2, 0, 220, 6, 2,
				2, 2, 2, 0, 221, 6, 2, 2, 0, 222,
				6, 0, 223, 6, 2, 2, 0, 224, 6, 2,
				2, 0, 225, 6, 2, 2, 0, 226, 6, 0,
				227, 6, 2, 2, 0, 228, 6, 2, 2, 0,
				229, 6, 2, 2, 0, 230, 6, 2, 2, 0,
				231, 6, 2, 0, 232, 6, 3, 3, 0, 58,
				2, 2, 2, 2, 0, 233, 6, 0, 234, 6,
				2, 0, 233, 6, 2, 0, 235, 6, 0, 236,
				6, 2, 0, 237, 6, 2, 0, 238, 6, 0,
				239, 6, 0, 116, 2, 3, 3, 3, 3, 3,
				0, 117, 2, 3, 3, 3, 3, 3, 0, 118,
				2, 3, 3, 3, 3, 3, 0, 240, 6, 2,
				2, 0, 241, 6, 3, 3, 3, 3, 3, 0,
				242, 6, 2, 2, 0, 243, 6, 3, 3, 3,
				3, 3, 0, 244, 6, 2, 2, 0, 245, 6,
				3, 3, 3, 3, 3, 0, 246, 6, 2, 2,
				0, 247, 6, 3, 3, 3, 3, 3, 0, 248,
				6, 2, 2, 0, 249, 6, 3, 3, 3, 3,
				3, 0, 250, 6, 2, 2, 0, 251, 6, 3,
				3, 3, 3, 3, 0, 252, 6, 2, 2, 0,
				253, 6, 2, 2, 0, 254, 6, 2, 2, 0,
				255, 6, 2, 2, 0, 128, 7, 2, 2, 0,
				129, 7, 2, 2, 0, 130, 7, 2, 2, 0,
				131, 7, 2, 2, 0, 132, 7, 2, 2, 0,
				133, 7, 3, 3, 3, 3, 3, 0, 134, 7,
				2, 2, 0, 135, 7, 2, 2, 0, 136, 7,
				3, 3, 3, 3, 3, 0, 137, 7, 2, 2,
				0, 138, 7, 2, 2, 0, 139, 7, 3, 3,
				3, 3, 3, 0, 140, 7, 2, 2, 0, 141,
				7, 3, 3, 3, 3, 3, 0, 142, 7, 2,
				0, 143, 7, 2, 2, 0, 144, 7, 2, 2,
				0, 145, 7, 2, 0, 146, 7, 0, 147, 7,
				0, 142, 7, 2, 0, 145, 7, 2, 0, 148,
				7, 3, 3, 3, 3, 3, 0, 149, 7, 2,
				2, 0, 150, 7, 3, 3, 3, 3, 3, 0,
				151, 7, 2, 2, 0, 152, 7, 3, 3, 3,
				3, 3, 0, 153, 7, 2, 2, 0, 154, 7,
				3, 3, 3, 3, 3, 0, 155, 7, 2, 2,
				0, 156, 7, 3, 3, 3, 3, 3, 0, 157,
				7, 2, 2, 0, 158, 7, 3, 3, 3, 3,
				3, 0, 159, 7, 2, 2, 0, 160, 7, 2,
				2, 0, 161, 7, 2, 0, 162, 7, 3, 3,
				3, 3, 3, 0, 163, 7, 3, 3, 3, 3,
				3, 0, 164, 7, 2, 2, 0, 165, 7, 2,
				2, 0, 119, 3, 3, 3, 3, 3, 0, 166,
				7, 2, 2, 0, 167, 7, 2, 2, 0, 168,
				7, 2, 2, 0, 169, 7, 3, 3, 3, 3,
				3, 0, 170, 7, 2, 2, 0, 120, 3, 3,
				3, 3, 3, 0, 171, 7, 2, 2, 0, 172,
				7, 3, 3, 3, 3, 3, 0, 121, 3, 3,
				3, 3, 3, 0, 173, 7, 2, 2, 0, 174,
				7, 3, 3, 3, 3, 3, 0, 122, 3, 3,
				3, 3, 3, 0, 175, 7, 2, 2, 0, 123,
				3, 3, 3, 3, 3, 0, 176, 7, 2, 2,
				0, 177, 7, 3, 0, 178, 7, 2, 2, 0,
				179, 7, 2, 2, 0, 180, 7, 0, 181, 7,
				0, 182, 7, 2, 2, 0, 183, 7, 2, 2,
				0, 184, 7, 2, 0, 185, 7, 2, 0, 184,
				7, 2, 2, 0, 185, 7, 2, 2, 0, 186,
				7, 2, 2, 2, 2, 0, 187, 7, 2, 2,
				0, 188, 7, 2, 0, 189, 7, 2, 0, 188,
				7, 2, 2, 0, 189, 7, 2, 2, 0, 190,
				7, 2, 2, 0, 191, 7, 2, 2, 0, 192,
				7, 0, 193, 7, 0, 194, 7, 2, 2, 0,
				195, 7, 2, 2, 0, 196, 7, 0, 197, 7,
				0, 198, 7, 2, 2, 0, 199, 7, 2, 2,
				0, 200, 7, 2, 2, 0, 201, 7, 2, 2,
				0, 202, 7, 0, 203, 7, 2, 2, 0, 204,
				7, 0, 205, 7, 2, 2, 0, 206, 7, 2,
				2, 0, 207, 7, 2, 2, 0, 208, 7, 2,
				2, 0, 44, 2, 2, 2, 2, 0, 45, 2,
				0, 209, 7, 2, 2, 0, 45, 2, 2, 0,
				210, 7, 0, 211, 7, 2, 0, 212, 7, 2,
				0, 213, 7, 0, 214, 7, 0, 215, 7, 2,
				2, 0, 216, 7, 2, 2, 0, 217, 7, 2,
				2, 0, 218, 7, 2, 2, 0, 219, 7, 2,
				2, 0, 220, 7, 2, 2, 0, 221, 7, 2,
				2, 0, 222, 7, 2, 2, 0, 223, 7, 2,
				2, 0, 224, 7, 2, 2, 0, 225, 7, 2,
				2, 0, 226, 7, 2, 2, 0, 227, 7, 2,
				2, 0, 228, 7, 2, 2, 0, 229, 7, 2,
				2, 0, 230, 7, 2, 2, 4, 231, 7, 6,
				2, 0, 232, 7, 2, 2, 0, 233, 7, 2,
				2, 0, 234, 7, 2, 2, 0, 235, 7, 2,
				2, 0, 236, 7, 2, 2, 0, 237, 7, 2,
				2, 0, 238, 7, 2, 2, 0, 239, 7, 2,
				2, 0, 240, 7, 2, 2, 0, 59, 2, 2,
				2, 2, 0, 60, 2, 2, 2, 2, 0, 59,
				2, 2, 0, 60, 2, 2, 0, 44, 2, 2,
				0, 45, 2, 2, 0, 241, 7, 2, 2, 0,
				242, 7, 2, 2, 0, 243, 7, 2, 2, 0,
				244, 7, 2, 2, 0, 245, 7, 2, 2, 0,
				246, 7, 2, 2, 0, 247, 7, 2, 0, 248,
				7, 2, 0, 249, 7, 2, 0, 250, 7, 2,
				2, 0, 251, 7, 2, 2, 0, 252, 7, 2,
				2, 0, 253, 7, 2, 2, 0, 254, 7, 2,
				2, 0, 255, 7, 2, 2, 0, 128, 8, 2,
				2, 0, 129, 8, 2, 2, 0, 130, 8, 2,
				2, 0, 131, 8, 2, 0, 132, 8, 2, 0,
				133, 8, 2, 2, 0, 134, 8, 2, 2, 0,
				131, 8, 2, 0, 132, 8, 2, 0, 135, 8,
				2, 2, 0, 136, 8, 2, 0, 137, 8, 2,
				0, 136, 8, 2, 2, 0, 137, 8, 2, 2,
				0, 138, 8, 2, 0, 139, 8, 2, 0, 138,
				8, 2, 2, 0, 139, 8, 2, 2, 0, 140,
				8, 2, 0, 141, 8, 2, 0, 140, 8, 2,
				2, 0, 141, 8, 2, 2, 0, 142, 8, 2,
				0, 143, 8, 2, 0, 142, 8, 2, 2, 0,
				143, 8, 2, 2, 0, 144, 8, 2, 0, 145,
				8, 2, 0, 144, 8, 2, 2, 0, 145, 8,
				2, 2, 0, 146, 8, 2, 0, 147, 8, 2,
				0, 146, 8, 2, 2, 0, 147, 8, 2, 2,
				0, 148, 8, 2, 0, 149, 8, 2, 0, 148,
				8, 2, 2, 0, 149, 8, 2, 2, 0, 150,
				8, 0, 151, 8, 0, 150, 8, 0, 151, 8,
				0, 152, 8, 2, 0, 153, 8, 2, 0, 152,
				8, 2, 2, 0, 153, 8, 2, 2, 0, 154,
				8, 0, 155, 8, 0, 156, 8, 0, 155, 8,
				0, 156, 8, 0, 157, 8, 0, 158, 8, 2,
				0, 159, 8, 2, 0, 158, 8, 2, 2, 0,
				159, 8, 2, 2, 0, 160, 8, 0, 161, 8,
				0, 160, 8, 0, 161, 8, 0, 162, 8, 2,
				0, 163, 8, 2, 0, 162, 8, 2, 2, 0,
				163, 8, 2, 2, 0, 164, 8, 0, 165, 8,
				0, 164, 8, 0, 165, 8, 0, 166, 8, 2,
				2, 0, 167, 8, 2, 2, 0, 168, 8, 2,
				2, 0, 169, 8, 2, 2, 0, 170, 8, 2,
				2, 0, 171, 8, 2, 2, 0, 172, 8, 2,
				2, 0, 173, 8, 2, 2, 0, 174, 8, 2,
				0, 175, 8, 2, 0, 174, 8, 2, 2, 0,
				175, 8, 2, 2, 0, 176, 8, 2, 0, 177,
				8, 2, 0, 176, 8, 2, 2, 0, 177, 8,
				2, 2, 0, 178, 8, 2, 0, 179, 8, 2,
				0, 178, 8, 2, 2, 0, 179, 8, 2, 2,
				0, 180, 8, 0, 181, 8, 0, 180, 8, 0,
				181, 8, 0, 182, 8, 2, 0, 183, 8, 2,
				0, 182, 8, 2, 2, 0, 183, 8, 2, 2,
				0, 184, 8, 0, 185, 8, 0, 186, 8, 0,
				185, 8, 0, 186, 8, 0, 187, 8, 0, 188,
				8, 2, 0, 189, 8, 2, 0, 188, 8, 2,
				2, 0, 189, 8, 2, 2, 0, 190, 8, 0,
				191, 8, 0, 190, 8, 0, 191, 8, 0, 192,
				8, 2, 0, 193, 8, 2, 0, 192, 8, 2,
				2, 0, 193, 8, 2, 2, 0, 194, 8, 0,
				195, 8, 0, 194, 8, 0, 195, 8, 0, 196,
				8, 2, 2, 0, 197, 8, 2, 2, 0, 198,
				8, 2, 0, 199, 8, 2, 0, 198, 8, 2,
				2, 0, 199, 8, 2, 2, 0, 200, 8, 2,
				0, 201, 8, 2, 0, 200, 8, 2, 2, 0,
				201, 8, 2, 2, 0, 202, 8, 2, 0, 203,
				8, 2, 0, 202, 8, 2, 2, 0, 203, 8,
				2, 2, 0, 204, 8, 0, 205, 8, 0, 204,
				8, 0, 205, 8, 0, 206, 8, 2, 0, 207,
				8, 2, 0, 206, 8, 2, 2, 0, 207, 8,
				2, 2, 0, 208, 8, 0, 209, 8, 0, 208,
				8, 0, 209, 8, 0, 210, 8, 2, 0, 211,
				8, 2, 0, 210, 8, 2, 2, 0, 211, 8,
				2, 2, 0, 212, 8, 0, 213, 8, 0, 212,
				8, 0, 213, 8, 0, 214, 8, 2, 0, 215,
				8, 2, 0, 214, 8, 2, 2, 0, 215, 8,
				2, 2, 0, 216, 8, 0, 217, 8, 0, 216,
				8, 0, 217, 8, 0, 218, 8, 2, 2, 0,
				219, 8, 2, 2, 0, 220, 8, 0, 221, 8,
				0, 222, 8, 0, 223, 8, 0, 224, 8, 0,
				225, 8, 0, 226, 8, 0, 227, 8, 0, 228,
				8, 0, 229, 8, 0, 230, 8, 0, 231, 8,
				0, 232, 8, 0, 233, 8, 0, 234, 8, 0,
				235, 8, 0, 236, 8, 0, 237, 8, 0, 238,
				8, 0, 239, 8, 0, 240, 8, 0, 241, 8,
				0, 242, 8, 0, 243, 8, 0, 244, 8, 0,
				245, 8, 0, 246, 8, 0, 247, 8, 0, 248,
				8, 0, 249, 8, 0, 250, 8, 0, 251, 8,
				0, 252, 8, 3, 3, 3, 3, 3, 0, 253,
				8, 3, 0, 254, 8, 3, 3, 3, 3, 3,
				0, 255, 8, 3, 3, 3, 3, 3, 0, 128,
				9, 3, 3, 3, 3, 3, 0, 129, 9, 3,
				3, 3, 3, 3, 0, 130, 9, 2, 2, 4,
				131, 9, 6, 0, 130, 9, 2, 2, 4, 131,
				9, 6, 6, 0, 132, 9, 2, 0, 133, 9,
				2, 0, 134, 9, 2, 0, 135, 9, 2, 0,
				136, 9, 2, 0, 137, 9, 0, 138, 9, 0,
				139, 9, 2, 0, 140, 9, 2, 0, 141, 9,
				0, 142, 9, 0, 143, 9, 2, 0, 144, 9,
				2, 0, 145, 9, 2, 0, 146, 9, 2, 0,
				147, 9, 2, 0, 148, 9, 2, 0, 149, 9,
				2, 0, 150, 9, 2, 2, 0, 151, 9, 2,
				2, 0, 152, 9, 2, 2, 0, 153, 9, 2,
				0, 161, 7, 2, 2, 0, 231, 6, 2, 2,
				0, 154, 9, 2, 0, 155, 9, 2, 2, 0,
				156, 9, 2, 2, 0, 39, 2, 2, 2, 2,
				0, 40, 2, 2, 2, 2, 0, 157, 9, 0,
				158, 9, 3, 3, 0, 159, 9, 2, 2, 0,
				160, 9, 3, 3, 0, 161, 9, 2, 2, 0,
				162, 9, 3, 0, 163, 9, 0, 164, 9, 3,
				0, 165, 9, 0, 166, 9, 3, 3, 0, 167,
				9, 3, 3, 0, 168, 9, 3, 3, 0, 124,
				2, 3, 3, 3, 3, 3, 0, 169, 9, 2,
				3, 3, 3, 3, 0, 26, 2, 3, 3, 3,
				3, 0, 170, 9, 0, 171, 9, 1, 170, 9,
				1, 171, 9, 1, 170, 9, 1, 171, 9, 0,
				172, 9, 2, 3, 3, 3, 3, 0, 173, 9,
				0, 174, 9, 2, 0, 175, 9, 2, 0, 176,
				9, 0, 177, 9, 2, 0, 178, 9, 2, 0,
				179, 9, 0, 180, 9, 0, 181, 9, 0, 182,
				9, 0, 183, 9, 2, 2, 2, 2, 200, 184,
				9, 202, 202, 208, 185, 9, 210, 210, 168, 186,
				9, 170, 170, 176, 187, 9, 178, 178, 0, 188,
				9, 2, 3, 3, 3, 3, 0, 189, 9, 3,
				3, 0, 190, 9, 0, 191, 9, 1, 190, 9,
				1, 191, 9, 1, 190, 9, 1, 191, 9, 0,
				192, 9, 2, 0, 193, 9, 2, 0, 194, 9,
				2, 2, 0, 195, 9, 2, 2, 0, 196, 9,
				2, 2, 0, 197, 9, 2, 2, 0, 198, 9,
				0, 199, 9, 0, 200, 9, 0, 201, 9, 0,
				202, 9, 0, 203, 9, 0, 204, 9, 0, 205,
				9, 0, 206, 9, 0, 207, 9, 0, 208, 9,
				0, 209, 9, 2, 0, 210, 9, 2, 0, 211,
				9, 0, 212, 9, 2, 0, 213, 9, 2, 0,
				214, 9, 0, 215, 9, 0, 216, 9, 0, 217,
				9, 184, 218, 9, 186, 186, 192, 219, 9, 194,
				194, 152, 220, 9, 154, 154, 160, 221, 9, 162,
				162, 0, 222, 9, 3, 3, 0, 223, 9, 3,
				0, 224, 9, 3, 3, 0, 225, 9, 2, 2,
				0, 226, 9, 2, 0, 227, 9, 2, 72, 228,
				9, 83, 83, 83, 83, 83, 0, 229, 9, 0,
				230, 9, 2, 2, 2, 0, 231, 9, 2, 2,
				2, 1, 222, 6, 3, 1, 226, 6, 3, 1,
				213, 6, 3, 0, 232, 9, 2, 2, 0, 233,
				9, 2, 2, 0, 234, 9, 0, 235, 9, 0,
				236, 9, 2, 2, 0, 237, 9, 2, 2, 0,
				238, 9, 0, 239, 9, 0, 240, 9, 2, 2,
				0, 241, 9, 2, 2, 0, 242, 9, 0, 243,
				9, 0, 244, 9, 2, 2, 2, 0, 245, 9,
				2, 2, 2, 0, 246, 9, 2, 2, 2, 0,
				247, 9, 2, 2, 2, 0, 248, 9, 0, 249,
				9, 1, 248, 9, 1, 249, 9, 0, 250, 9,
				0, 251, 9, 1, 250, 9, 1, 251, 9, 0,
				252, 9, 3, 0, 253, 9, 3, 4, 254, 9,
				6, 6, 4, 255, 9, 6, 6, 0, 128, 10,
				0, 129, 10, 0, 130, 10, 2, 2, 2, 0,
				131, 10, 2, 2, 2, 0, 132, 10, 2, 0,
				133, 10, 2, 0, 134, 10, 2, 2, 2, 0,
				135, 10, 2, 2, 2, 0, 136, 10, 2, 0,
				137, 10, 2, 0, 138, 10, 2, 2, 0, 139,
				10, 2, 2, 0, 140, 10, 2, 2, 0, 141,
				10, 2, 2, 0, 142, 10, 2, 2, 0, 143,
				10, 2, 2, 0, 144, 10, 2, 2, 2, 0,
				145, 10, 2, 2, 2, 0, 146, 10, 2, 0,
				147, 10, 2, 0, 148, 10, 2, 2, 2, 0,
				149, 10, 2, 2, 2, 0, 150, 10, 2, 0,
				151, 10, 2, 0, 152, 10, 0, 153, 10, 3,
				3, 3, 3, 3, 0, 154, 10, 3, 3, 3,
				3, 3, 0, 155, 10, 3, 0, 156, 10, 2,
				0, 157, 10, 0, 158, 10, 0, 159, 10, 0,
				160, 10, 0, 161, 10, 0, 162, 10, 0, 163,
				10, 0, 164, 10, 0, 165, 10, 0, 166, 10,
				0, 167, 10, 2, 2, 2, 0, 168, 10, 2,
				0, 169, 10, 0, 170, 10, 0, 171, 10, 0,
				172, 10, 0, 173, 10, 0, 174, 10, 88, 175,
				10, 96, 176, 10, 104, 177, 10, 112, 178, 10,
				120, 179, 10, 128, 180, 10, 136, 181, 10, 144,
				182, 10, 0, 183, 10, 2, 0, 184, 10, 2,
				0, 185, 10, 2, 0, 186, 10, 2, 0, 187,
				10, 2, 0, 188, 10, 2, 0, 189, 10, 2,
				0, 190, 10, 2, 0, 191, 10, 2, 0, 192,
				10, 2, 0, 193, 10, 2, 0, 194, 10, 2,
				0, 195, 10, 2, 0, 196, 10, 0, 197, 10,
				0, 171, 10, 2, 0, 172, 10, 2, 0, 173,
				10, 2, 0, 174, 10, 2, 0, 198, 10, 2,
				0, 199, 10, 2, 0, 200, 10, 2, 0, 201,
				10, 2, 0, 202, 10, 2, 0, 203, 10, 2,
				0, 204, 10, 2, 0, 205, 10, 2, 0, 206,
				10, 0, 207, 10, 0, 208, 10, 0, 209, 10,
				0, 210, 10, 0, 211, 10, 0, 212, 10, 0,
				213, 10, 0, 214, 10, 0, 215, 10, 0, 216,
				10, 0, 217, 10, 0, 218, 10, 0, 219, 10,
				0, 220, 10, 0, 146, 9, 2, 0, 221, 10,
				2, 0, 222, 10, 2, 0, 223, 10, 0, 224,
				10, 0, 225, 10, 0, 226, 10, 0, 227, 10,
				0, 228, 10, 0, 229, 10, 0, 230, 10, 0,
				231, 10, 0, 232, 10, 0, 233, 10, 0, 234,
				10, 0, 235, 10, 0, 236, 10, 0, 237, 10,
				0, 238, 10, 0, 239, 10, 0, 240, 10, 0,
				241, 10, 0, 242, 10, 0, 243, 10, 0, 244,
				10, 0, 245, 10, 0, 246, 10, 0, 248, 10,
				0, 249, 10, 0, 250, 10, 0, 251, 10, 0,
				252, 10, 0, 253, 10, 2, 2, 0, 254, 10,
				0, 255, 10, 0, 128, 11, 0, 129, 11, 2,
				2, 0, 130, 11, 0, 211, 3, 0, 209, 3,
				2, 2, 2, 0, 201, 6, 0, 132, 11, 0,
				133, 11, 0, 134, 11, 0, 135, 11, 0, 136,
				11, 0, 137, 11, 0, 138, 11, 0, 139, 11,
				0, 140, 11, 0, 141, 11, 0, 142, 11, 0,
				143, 11, 0, 144, 11, 0, 145, 11, 0, 146,
				11, 0, 147, 11, 0, 148, 11, 0, 149, 11,
				0, 150, 11, 0, 151, 11, 0, 152, 11, 0,
				153, 11, 0, 154, 11, 0, 155, 11, 0, 156,
				11, 0, 157, 11, 0, 158, 11, 0, 150, 11,
				0, 160, 11, 0, 161, 11, 0, 162, 11, 0,
				163, 11, 0, 164, 11, 0, 165, 11, 0, 166,
				11, 0, 167, 11, 0, 168, 11, 0, 169, 11,
				0, 170, 11, 0, 246, 10, 0, 172, 11, 0,
				173, 11, 0, 174, 11, 0, 175, 11, 0, 176,
				11, 0, 0, 2, 0, 177, 11, 0, 0, 0,
				178, 11, 0, 179, 11, 0, 0, 2, 2, 2,
				2, 0, 180, 11, 0, 181, 11, 0, 182, 11,
				0, 183, 11, 0, 184, 11, 0, 185, 11, 0,
				186, 11, 0, 187, 11, 0, 188, 11, 0, 189,
				11, 0, 190, 11, 0, 191, 11, 0, 192, 11,
				0, 193, 11, 0, 194, 11, 0, 195, 11, 0,
				58, 2, 0, 233, 6, 0, 132, 11, 0, 196,
				11, 0, 197, 11, 0, 198, 11, 0, 199, 11,
				0, 200, 11, 0, 201, 11, 0, 198, 7, 2,
				0, 199, 7, 2, 0, 200, 7, 2, 0, 203,
				7, 2, 0, 202, 11, 2, 2, 0, 203, 11,
				2, 2, 0, 204, 11, 2, 2, 0, 205, 11,
				0, 206, 11, 0, 207, 11, 2, 2, 0, 208,
				11, 216, 209, 11, 218, 218, 224, 210, 11, 0,
				211, 11, 4, 212, 11, 6, 2, 4, 213, 11,
				6, 6, 0, 214, 11, 2, 2, 0, 215, 11,
				2, 2, 0, 216, 11, 2, 2, 0, 217, 11,
				2, 2, 0, 218, 11, 2, 2, 0, 219, 11,
				2, 2, 0, 220, 11, 2, 2, 0, 221, 11,
				2, 2, 4, 222, 11, 6, 2, 4, 223, 11,
				6, 6, 0, 224, 11, 0, 225, 11, 0, 226,
				11, 2, 0, 227, 11, 0, 228, 11, 2, 4,
				229, 11, 6, 0, 230, 11, 0, 231, 11, 2,
				2, 0, 232, 11, 2, 2, 0, 233, 11, 2,
				2, 0, 234, 11, 2, 2, 0, 235, 11, 2,
				2, 0, 236, 11, 2, 2, 0, 237, 11, 2,
				0, 238, 11, 2, 4, 239, 11, 6, 2, 4,
				240, 11, 6, 6, 4, 241, 11, 6, 0, 242,
				11, 2, 2, 0, 243, 11, 2, 2, 0, 244,
				11, 2, 2, 0, 245, 11, 0, 246, 11, 2,
				2, 0, 247, 11, 2, 2, 0, 248, 11, 0,
				249, 11, 0, 250, 11, 2, 2, 0, 251, 11,
				2, 2, 0, 252, 11, 0, 253, 11, 0, 254,
				11, 2, 2, 0, 255, 11, 2, 2, 0, 128,
				12, 2, 2, 0, 129, 12, 2, 2, 0, 130,
				12, 2, 2, 0, 131, 12, 2, 2, 0, 132,
				12, 2, 2, 0, 133, 12, 2, 2, 0, 134,
				12, 2, 2, 0, 135, 12, 2, 2, 0, 136,
				12, 2, 2, 0, 137, 12, 2, 2, 0, 138,
				12, 0, 139, 12, 0, 140, 12, 0, 141, 12,
				0, 142, 12, 0, 143, 12, 0, 144, 12, 2,
				2, 0, 145, 12, 2, 2, 0, 146, 12, 2,
				2, 0, 147, 12, 2, 2, 0, 148, 12, 2,
				2, 0, 149, 12, 2, 2, 0, 150, 12, 0,
				151, 12, 0, 152, 12, 0, 153, 12, 0, 154,
				12, 0, 155, 12, 4, 156, 12, 6, 6, 0,
				157, 12, 0, 158, 12, 2, 2, 0, 159, 12,
				0, 160, 12, 2, 2, 0, 161, 12, 0, 162,
				12, 2, 2, 0, 163, 12, 0, 164, 12, 2,
				2, 0, 165, 12, 0, 166, 12, 2, 2, 2,
				0, 167, 12, 2, 2, 2, 0, 168, 12, 2,
				2, 0, 169, 12, 0, 170, 12, 2, 2, 0,
				171, 12, 0, 172, 12, 2, 2, 0, 173, 12,
				0, 174, 12, 2, 2, 0, 175, 12, 0, 176,
				12, 2, 2, 0, 177, 12, 0, 178, 12, 2,
				2, 0, 179, 12, 0, 180, 12, 2, 2, 0,
				181, 12, 0, 182, 12, 2, 2, 0, 183, 12,
				0, 184, 12, 0, 185, 12, 0, 186, 12, 0,
				187, 12, 0, 188, 12, 1, 228, 3, 0, 189,
				12, 0, 190, 12, 0, 191, 12, 0, 192, 12,
				0, 193, 12, 0, 194, 12, 0, 195, 12, 0,
				196, 12, 0, 197, 12, 0, 198, 12, 0, 199,
				12, 0, 200, 12, 0, 201, 12, 0, 202, 12,
				0, 203, 12, 0, 204, 12, 0, 187, 12, 0,
				188, 12, 0, 205, 12, 2, 2, 0, 206, 12,
				0, 207, 12, 0, 208, 12, 0, 209, 12, 2,
				0, 210, 12, 2, 0, 211, 12, 0, 212, 12,
				0, 141, 6, 2, 0, 145, 6, 2, 0, 213,
				12, 2, 0, 147, 6, 2, 0, 0, 2, 2,
				2, 2, 2, 0, 214, 12, 1, 228, 3, 0,
				189, 12, 0, 190, 12, 0, 191, 12, 0, 192,
				12, 0, 193, 12, 0, 194, 12, 0, 195, 12,
				1, 19, 1, 20, 1, 19, 1, 20, 0, 215,
				12, 0, 216, 12, 0, 217, 12, 0, 218, 12,
				1, 62, 1, 63, 1, 64, 1, 65, 1, 66,
				1, 67, 1, 68, 1, 69, 1, 46, 0, 48,
				0, 49, 1, 81, 1, 15, 1, 16, 1, 17,
				1, 50, 0, 158, 5, 0, 48, 0, 49, 0,
				211, 12, 0, 212, 12, 233, 84, 241, 85, 0,
				182, 6, 0, 183, 6, 0, 185, 6, 0, 186,
				6, 1, 98, 0, 193, 6, 0, 194, 6, 0,
				196, 6, 0, 197, 6, 1, 56, 1, 57, 0,
				58, 0, 233, 6, 0, 236, 6, 0, 239, 6,
				0, 129, 7, 0, 160, 7, 1, 119, 1, 120,
				1, 121, 1, 122, 1, 123, 0, 178, 7, 0,
				179, 7, 0, 184, 7, 0, 186, 7, 0, 188,
				7, 0, 0, 2, 2, 2, 0, 219, 12, 0,
				220, 12, 0, 221, 12, 0, 222, 12, 0, 223,
				12, 0, 224, 12, 0, 225, 12, 0, 0, 0,
				226, 12, 0, 227, 12, 0, 0, 2, 0, 44,
				0, 45, 0, 211, 7, 0, 214, 7, 0, 228,
				12, 0, 229, 12, 0, 230, 12, 0, 231, 12,
				0, 219, 7, 0, 220, 7, 0, 221, 7, 0,
				222, 7, 0, 0, 2, 2, 2, 2, 0, 232,
				12, 0, 233, 12, 0, 234, 12, 0, 235, 12,
				0, 236, 12, 0, 0, 2, 2, 2, 0, 237,
				12, 0, 238, 12, 0, 239, 12, 0, 240, 12,
				0, 136, 8, 0, 137, 8, 0, 140, 8, 0,
				141, 8, 0, 0, 2, 0, 148, 8, 0, 149,
				8, 0, 152, 8, 0, 153, 8, 0, 158, 8,
				0, 159, 8, 0, 162, 8, 0, 163, 8, 0,
				166, 8, 0, 167, 8, 0, 170, 8, 0, 171,
				8, 0, 241, 12, 0, 178, 8, 0, 179, 8,
				0, 182, 8, 0, 183, 8, 0, 188, 8, 0,
				189, 8, 0, 192, 8, 0, 193, 8, 0, 0,
				2, 0, 242, 12, 0, 243, 12, 0, 202, 8,
				0, 203, 8, 0, 206, 8, 0, 207, 8, 0,
				210, 8, 0, 211, 8, 0, 214, 8, 0, 215,
				8, 0, 0, 0, 244, 12, 0, 245, 12, 0,
				220, 8, 0, 222, 8, 0, 246, 12, 0, 247,
				12, 0, 224, 8, 0, 226, 8, 0, 248, 12,
				0, 249, 12, 0, 250, 12, 0, 251, 12, 0,
				252, 12, 0, 253, 12, 0, 0, 2, 2, 0,
				254, 12, 0, 255, 12, 0, 128, 13, 0, 129,
				13, 0, 130, 13, 0, 131, 13, 0, 132, 13,
				0, 133, 13, 0, 0, 2, 2, 0, 134, 13,
				0, 135, 13, 0, 136, 13, 0, 137, 13, 0,
				138, 13, 0, 139, 13, 0, 140, 13, 0, 141,
				13, 0, 0, 2, 2, 0, 155, 9, 0, 142,
				13, 248, 184, 9, 248, 186, 9, 0, 196, 9,
				0, 197, 9, 0, 143, 13, 0, 144, 13, 0,
				145, 13, 0, 146, 13, 0, 147, 13, 0, 148,
				13, 0, 149, 13, 0, 0, 2, 0, 150, 13,
				0, 0, 2, 2, 2, 2, 2, 0, 151, 13,
				2, 2, 0, 152, 13, 2, 2, 0, 153, 13,
				2, 2, 0, 154, 13, 0, 155, 13, 0, 156,
				13, 0, 157, 13, 0, 158, 13, 0, 159, 13,
				0, 160, 13, 0, 161, 13, 2, 0, 162, 13,
				2, 0, 163, 13, 2, 0, 164, 13, 2, 0,
				165, 13, 2, 0, 166, 13, 2, 0, 167, 13,
				2, 0, 168, 13, 2, 0, 169, 13, 2, 0,
				170, 13, 2, 0, 171, 13, 4, 231, 7, 6,
				0, 172, 13, 2, 0, 173, 13, 2, 0, 174,
				13, 2, 0, 175, 13, 2, 0, 176, 13, 2,
				0, 177, 13, 2, 0, 196, 8, 2, 0, 197,
				8, 2, 0, 178, 13, 2, 0, 179, 13, 2,
				0, 180, 13, 2, 0, 181, 13, 2, 0, 182,
				13, 2, 0, 183, 13, 2, 0, 184, 13, 2,
				0, 185, 13, 2, 0, 186, 13, 2, 0, 187,
				13, 2, 0, 188, 13, 2, 0, 189, 13, 2,
				0, 190, 13, 2, 0, 191, 13, 2, 0, 192,
				13, 2, 0, 193, 13, 2
			};
		}
	}
	internal static class MemorySizes
	{
		public static readonly string[] AllMemorySizes = GetMemorySizes();

		private static string[] GetMemorySizes()
		{
			string[] array = new string[162];
			ReadOnlySpan<byte> readOnlySpan = new byte[162]
			{
				0, 1, 13, 3, 11, 11, 14, 15, 16, 1,
				13, 3, 11, 14, 15, 16, 3, 8, 12, 13,
				3, 11, 3, 11, 11, 9, 8, 8, 13, 3,
				11, 12, 14, 13, 4, 5, 7, 6, 0, 0,
				0, 0, 12, 16, 0, 12, 17, 16, 13, 13,
				3, 3, 3, 3, 3, 3, 11, 11, 11, 11,
				11, 11, 11, 11, 14, 14, 14, 14, 14, 14,
				14, 14, 14, 14, 14, 14, 14, 14, 14, 15,
				15, 15, 15, 15, 15, 15, 15, 15, 15, 15,
				15, 15, 15, 15, 15, 15, 15, 16, 16, 16,
				16, 16, 16, 16, 16, 16, 16, 16, 16, 16,
				16, 16, 18, 2, 2, 18, 2, 18, 18, 2,
				2, 10, 10, 10, 18, 2, 10, 2, 10, 10,
				2, 2, 18, 18, 2, 2, 10, 10, 10, 18,
				2, 10, 2, 10, 10, 2, 2, 18, 18, 2,
				2, 10, 10, 10, 18, 2, 10, 2, 2, 10,
				10, 2
			};
			for (int i = 0; i < array.Length; i++)
			{
				array[i] = readOnlySpan[i] switch
				{
					0 => "", 
					1 => "byte ptr ", 
					2 => "dword bcst ", 
					3 => "dword ptr ", 
					4 => "fpuenv14 ptr ", 
					5 => "fpuenv28 ptr ", 
					6 => "fpustate108 ptr ", 
					7 => "fpustate94 ptr ", 
					8 => "fword ptr ", 
					9 => "oword ptr ", 
					10 => "qword bcst ", 
					11 => "qword ptr ", 
					12 => "tbyte ptr ", 
					13 => "word ptr ", 
					14 => "xmmword ptr ", 
					15 => "ymmword ptr ", 
					16 => "zmmword ptr ", 
					17 => "mem384 ptr ", 
					18 => "word bcst ", 
					_ => throw new InvalidOperationException(), 
				};
			}
			return array;
		}
	}
	internal static class Registers
	{
		public static readonly FormatterString[] AllRegisters = RegistersTable.GetRegisters();
	}
}
namespace Iced.Intel.EncoderInternal
{
	internal static class EncoderData
	{
		internal static readonly uint[] EncFlags1 = GetEncFlags1();

		internal static readonly uint[] EncFlags2 = GetEncFlags2();

		internal static readonly uint[] EncFlags3 = GetEncFlags3();

		private static uint[] GetEncFlags1()
		{
			return new uint[4911]
			{
				0u, 0u, 0u, 0u, 0u, 2055u, 2312u, 2825u, 3339u, 912u,
				1042u, 1174u, 1434u, 6829u, 7471u, 7601u, 7730u, 39u, 39u, 39u,
				39u, 2055u, 2312u, 2825u, 3339u, 912u, 1042u, 1174u, 1434u, 6829u,
				7471u, 7601u, 7730u, 40u, 40u, 40u, 2055u, 2312u, 2825u, 3339u,
				912u, 1042u, 1174u, 1434u, 6829u, 7471u, 7601u, 7730u, 41u, 41u,
				41u, 41u, 2055u, 2312u, 2825u, 3339u, 912u, 1042u, 1174u, 1434u,
				6829u, 7471u, 7601u, 7730u, 42u, 42u, 42u, 42u, 2055u, 2312u,
				2825u, 3339u, 912u, 1042u, 1174u, 1434u, 6829u, 7471u, 7601u, 7730u,
				0u, 2055u, 2312u, 2825u, 3339u, 912u, 1042u, 1174u, 1434u, 6829u,
				7471u, 7601u, 7730u, 0u, 2055u, 2312u, 2825u, 3339u, 912u, 1042u,
				1174u, 1434u, 6829u, 7471u, 7601u, 7730u, 0u, 2055u, 2312u, 2825u,
				3339u, 912u, 1042u, 1174u, 1434u, 6829u, 7471u, 7601u, 7730u, 0u,
				21u, 25u, 21u, 25u, 21u, 25u, 29u, 21u, 25u, 29u,
				0u, 0u, 0u, 0u, 530u, 534u, 2312u, 2825u, 1042u, 1174u,
				1178u, 58u, 59u, 60u, 951314u, 967830u, 984474u, 55u, 56u, 57u,
				902162u, 918678u, 935322u, 6207u, 6207u, 6207u, 7984u, 7984u, 7984u, 66u,
				67u, 68u, 66u, 67u, 68u, 66u, 67u, 68u, 66u, 67u,
				68u, 66u, 67u, 68u, 66u, 67u, 68u, 66u, 67u, 68u,
				66u, 67u, 68u, 66u, 67u, 68u, 66u, 67u, 68u, 66u,
				67u, 68u, 66u, 67u, 68u, 66u, 67u, 68u, 66u, 67u,
				68u, 66u, 67u, 68u, 66u, 67u, 68u, 6791u, 6791u, 6791u,
				6791u, 6791u, 6791u, 6791u, 6791u, 7432u, 7561u, 7691u, 7432u, 7561u,
				7691u, 7432u, 7561u, 7691u, 7432u, 7561u, 7691u, 7432u, 7561u, 7691u,
				7432u, 7561u, 7691u, 7432u, 7561u, 7691u, 7432u, 7561u, 7691u, 6791u,
				6791u, 6791u, 6791u, 6791u, 6791u, 6791u, 6791u, 7048u, 7177u, 7307u,
				7048u, 7177u, 7307u, 7048u, 7177u, 7307u, 7048u, 7177u, 7307u, 7048u,
				7177u, 7307u, 7048u, 7177u, 7307u, 7048u, 7177u, 7307u, 7048u, 7177u,
				7307u, 2055u, 2312u, 2825u, 3339u, 2055u, 2312u, 2825u, 3339u, 2055u,
				2312u, 2825u, 3339u, 912u, 1042u, 1174u, 1434u, 3848u, 3849u, 3851u,
				530u, 534u, 538u, 1054u, 1182u, 1438u, 8u, 9u, 11u, 0u,
				0u, 0u, 6037u, 6297u, 6429u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 1u, 2u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 429u, 431u, 433u, 434u, 5763u, 6019u, 6275u,
				6403u, 7999u, 7999u, 7999u, 7999u, 8126u, 8126u, 8126u, 8126u, 6829u,
				7471u, 7601u, 7730u, 5823u, 6079u, 6335u, 6463u, 7981u, 7983u, 7985u,
				7986u, 8109u, 8111u, 8113u, 8114u, 6801u, 7445u, 7577u, 7837u, 6791u,
				6791u, 6791u, 6791u, 6791u, 6791u, 6791u, 6791u, 6792u, 6793u, 6795u,
				6792u, 6793u, 6795u, 6792u, 6793u, 6795u, 6792u, 6793u, 6795u, 6792u,
				6793u, 6795u, 6792u, 6793u, 6795u, 6792u, 6793u, 6795u, 6792u, 6793u,
				6795u, 58u, 58u, 58u, 0u, 0u, 0u, 530u, 534u, 530u,
				534u, 6791u, 53u, 7432u, 7561u, 7691u, 72u, 73u, 6842u, 6842u,
				6842u, 0u, 0u, 0u, 58u, 58u, 58u, 0u, 0u, 0u,
				0u, 53u, 0u, 0u, 0u, 0u, 6919u, 6919u, 6919u, 6919u,
				6919u, 6919u, 6919u, 6919u, 6920u, 6921u, 6923u, 6920u, 6921u, 6923u,
				6920u, 6921u, 6923u, 6920u, 6921u, 6923u, 6920u, 6921u, 6923u, 6920u,
				6921u, 6923u, 6920u, 6921u, 6923u, 6920u, 6921u, 6923u, 5895u, 5895u,
				5895u, 5895u, 5895u, 5895u, 5895u, 5895u, 5896u, 5897u, 5899u, 5896u,
				5897u, 5899u, 5896u, 5897u, 5899u, 5896u, 5897u, 5899u, 5896u, 5897u,
				5899u, 5896u, 5897u, 5899u, 5896u, 5897u, 5899u, 5896u, 5897u, 5899u,
				53u, 53u, 0u, 65u, 4u, 4u, 4u, 4u, 4u, 4u,
				4u, 4u, 6707u, 6707u, 6707u, 6707u, 6707u, 6707u, 6707u, 6707u,
				4u, 4u, 4u, 4u, 4u, 4u, 4u, 4u, 4u, 4u,
				4u, 4u, 52u, 6707u, 0u, 52u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 4u, 4u, 4u, 4u, 4u, 4u, 4u,
				4u, 6707u, 6707u, 6707u, 6707u, 0u, 4u, 4u, 4u, 4u,
				4u, 4u, 6707u, 6707u, 6707u, 6707u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 6707u, 6707u, 4u,
				4u, 4u, 4u, 4u, 4u, 4u, 4u, 6580u, 6580u, 6707u,
				6707u, 6580u, 6580u, 6580u, 6580u, 4u, 4u, 4u, 4u, 4u,
				4u, 4u, 4u, 4u, 4u, 4u, 4u, 52u, 6707u, 52u,
				52u, 6707u, 6707u, 4u, 4u, 4u, 4u, 4u, 4u, 4u,
				4u, 6580u, 6580u, 6707u, 0u, 6580u, 6580u, 6580u, 6580u, 4u,
				4u, 4u, 4u, 4u, 4u, 4u, 4u, 52u, 6707u, 52u,
				52u, 47u, 47u, 47u, 47u, 6707u, 6707u, 66u, 67u, 66u,
				67u, 68u, 66u, 68u, 66u, 67u, 66u, 67u, 68u, 66u,
				68u, 66u, 67u, 66u, 67u, 68u, 66u, 68u, 66u, 67u,
				66u, 67u, 68u, 66u, 68u, 6829u, 6831u, 6833u, 5813u, 6069u,
				6325u, 69u, 70u, 71u, 69u, 70u, 71u, 1u, 2u, 66u,
				67u, 68u, 6189u, 6191u, 6193u, 5808u, 6064u, 6320u, 0u, 0u,
				0u, 6791u, 6791u, 7u, 7u, 7u, 7u, 7u, 7u, 7432u,
				7561u, 7691u, 7432u, 7561u, 7691u, 8u, 9u, 11u, 8u, 9u,
				11u, 8u, 9u, 11u, 8u, 9u, 11u, 8u, 9u, 11u,
				8u, 9u, 11u, 0u, 0u, 0u, 0u, 0u, 0u, 7u,
				7u, 8u, 9u, 11u, 8u, 9u, 11u, 8u, 9u, 11u,
				4u, 4u, 4u, 8u, 9u, 11u, 4u, 4u, 4u, 8u,
				9u, 11u, 8u, 9u, 11u, 8u, 9u, 11u, 8u, 9u,
				11u, 8u, 9u, 11u, 8u, 9u, 11u, 8u, 9u, 11u,
				8u, 9u, 4u, 4u, 4u, 4u, 4u, 4u, 4u, 4u,
				4u, 4u, 4u, 4u, 8u, 9u, 11u, 4u, 8u, 9u,
				11u, 4u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
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				650u, 778u, 875u, 10961u, 12113u, 13233u, 10961u, 12113u, 13233u, 10961u,
				12113u, 13233u, 10961u, 12113u, 13233u, 10961u, 12113u, 13233u, 10961u, 12113u,
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				10964u, 12120u, 13243u, 628u, 632u, 635u, 628u, 632u, 635u, 1825u,
				34196u, 38617u, 10961u, 12113u, 13233u, 689u, 817u, 913u, 689u, 817u,
				913u, 545u, 84u, 89u, 52u, 56u, 59u, 628u, 632u, 635u,
				1825u, 34196u, 38617u, 10964u, 12120u, 13243u, 5524u, 5849u, 10964u, 12120u,
				13243u, 10964u, 12120u, 13243u, 5524u, 5849u, 10964u, 10964u, 83329u, 104129u,
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				875u, 1825u, 532u, 537u, 340u, 344u, 347u, 650u, 778u, 874u,
				1825u, 532u, 537u, 340u, 344u, 347u, 650u, 778u, 874u, 1825u,
				532u, 537u, 340u, 344u, 379u, 650u, 778u, 875u, 1825u, 532u,
				537u, 340u, 344u, 347u, 650u, 778u, 874u, 1825u, 532u, 537u,
				340u, 344u, 379u, 650u, 778u, 875u, 38617u, 12120u, 13243u, 12120u,
				13243u, 1825u, 34196u, 38617u, 10961u, 12113u, 13233u, 1825u, 34196u, 38617u,
				10964u, 12120u, 13243u, 628u, 632u, 635u, 628u, 632u, 635u, 1825u,
				34196u, 38617u, 10964u, 12120u, 13243u, 10964u, 12120u, 13243u, 689u, 817u,
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				12120u, 13243u, 1825u, 34196u, 38617u, 10964u, 12120u, 13243u, 1825u, 34196u,
				38617u, 10964u, 12120u, 13243u, 10964u, 12120u, 13243u, 1825u, 34196u, 38617u,
				10964u, 12120u, 13243u, 1825u, 34196u, 38617u, 10964u, 12120u, 13243u, 10964u,
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				10964u, 10964u, 12120u, 13243u, 10964u, 12120u, 13243u, 10964u, 12120u, 13243u,
				10964u, 12120u, 13243u, 2011u, 10964u, 12120u, 13243u, 2011u, 340u, 376u,
				411u, 340u, 376u, 411u, 340u, 376u, 411u, 340u, 376u, 411u,
				532u, 537u, 340u, 344u, 347u, 532u, 537u, 340u, 344u, 347u,
				340u, 344u, 347u, 89u, 56u, 59u, 56u, 59u, 59u, 59u,
				340u, 376u, 411u, 340u, 376u, 411u, 650u, 779u, 876u, 650u,
				779u, 876u, 10964u, 12120u, 13243u, 10964u, 12120u, 13243u, 10964u, 12120u,
				13243u, 10964u, 12120u, 13243u, 10964u, 12120u, 13243u, 10964u, 12120u, 13243u,
				10962u, 12114u, 13234u, 10962u, 12114u, 13234u, 10964u, 12120u, 13243u, 10964u,
				12120u, 13243u, 10964u, 12120u, 13243u, 10964u, 12120u, 13243u, 340u, 372u,
				408u, 10964u, 12120u, 13243u, 10964u, 12120u, 13243u, 10964u, 12120u, 13243u,
				10964u, 12120u, 13243u, 10964u, 12120u, 13243u, 10964u, 12120u, 13243u, 10964u,
				12120u, 13243u, 10964u, 12120u, 13243u, 10964u, 12120u, 13243u, 532u, 537u,
				340u, 344u, 347u, 532u, 537u, 340u, 344u, 347u, 468u, 472u,
				475u, 468u, 472u, 475u, 468u, 472u, 475u, 532u, 536u, 539u,
				10964u, 12120u, 13243u, 10964u, 12120u, 13243u, 10964u, 12120u, 13243u, 10964u,
				12120u, 13243u, 10964u, 12120u, 13243u, 10964u, 12120u, 13243u, 534u, 538u,
				534u, 538u, 534u, 538u, 10964u, 12120u, 13243u, 340u, 376u, 411u,
				340u, 376u, 411u, 340u, 376u, 411u, 340u, 376u, 411u, 650u,
				779u, 876u, 650u, 779u, 876u, 650u, 779u, 876u, 650u, 779u,
				876u, 5524u, 5849u, 5524u, 5849u, 10964u, 12120u, 13243u, 10964u, 12120u,
				13243u, 83329u, 104129u, 83329u, 104129u, 10961u, 12113u, 13233u, 90260u, 110873u,
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				34196u, 38617u, 10964u, 12120u, 13243u, 10964u, 12120u, 13243u, 34196u, 38617u,
				34196u, 38617u, 10964u, 12120u, 13243u, 10964u, 12120u, 13243u, 34196u, 34196u,
				10964u, 10964u, 34196u, 38617u, 34196u, 38617u, 10964u, 12120u, 13243u, 10964u,
				12120u, 13243u, 2011u, 34196u, 34196u, 10964u, 10964u, 1780u, 34196u, 38617u,
				34196u, 38617u, 10964u, 12120u, 13243u, 10964u, 12120u, 13243u, 34196u, 34196u,
				10964u, 10964u, 34196u, 38617u, 34196u, 38617u, 10964u, 12120u, 13243u, 10964u,
				12120u, 13243u, 34196u, 34196u, 10964u, 10964u, 642u, 772u, 870u, 642u,
				770u, 868u, 643u, 645u, 775u, 643u, 773u, 871u, 642u, 772u,
				870u, 642u, 770u, 868u, 643u, 645u, 775u, 643u, 773u, 871u,
				34196u, 38617u, 34196u, 38617u, 10964u, 12120u, 13243u, 10964u, 12120u, 13243u,
				34196u, 38617u, 34196u, 38617u, 10964u, 12120u, 13243u, 10964u, 12120u, 13243u,
				34196u, 38617u, 34196u, 38617u, 10964u, 12120u, 13243u, 10964u, 12120u, 13243u,
				34196u, 34196u, 10964u, 10964u, 34196u, 38617u, 34196u, 38617u, 10964u, 12120u,
				13243u, 10964u, 12120u, 13243u, 2011u, 34196u, 34196u, 10964u, 10964u, 1780u,
				34196u, 38617u, 34196u, 38617u, 10964u, 12120u, 13243u, 10964u, 12120u, 13243u,
				34196u, 34196u, 10964u, 10964u, 34196u, 38617u, 34196u, 38617u, 10964u, 12120u,
				13243u, 10964u, 12120u, 13243u, 34196u, 34196u, 10964u, 10964u, 10964u, 12120u,
				13243u, 10964u, 12120u, 13243u, 34196u, 38617u, 34196u, 38617u, 10964u, 12120u,
				13243u, 10964u, 12120u, 13243u, 34196u, 38617u, 34196u, 38617u, 10964u, 12120u,
				13243u, 10964u, 12120u, 13243u, 34196u, 38617u, 34196u, 38617u, 10964u, 12120u,
				13243u, 10964u, 12120u, 13243u, 34196u, 34196u, 10964u, 10964u, 34196u, 38617u,
				34196u, 38617u, 10964u, 12120u, 13243u, 10964u, 12120u, 13243u, 34196u, 34196u,
				10964u, 10964u, 34196u, 38617u, 34196u, 38617u, 10964u, 12120u, 13243u, 10964u,
				12120u, 13243u, 34196u, 34196u, 10964u, 10964u, 34196u, 38617u, 34196u, 38617u,
				10964u, 12120u, 13243u, 10964u, 12120u, 13243u, 34196u, 34196u, 10964u, 10964u,
				340u, 376u, 411u, 340u, 376u, 411u, 6u, 4u, 6u, 4u,
				6u, 4u, 6u, 4u, 7u, 7u, 7u, 7u, 7u, 7u,
				7u, 7u, 1825u, 411u, 411u, 1825u, 1825u, 411u, 411u, 1825u,
				10964u, 10964u, 1825u, 411u, 411u, 1825u, 10964u, 10964u, 1825u, 34196u,
				38617u, 10964u, 12120u, 13243u, 1825u, 532u, 1825u, 34196u, 38617u, 10964u,
				12120u, 13243u, 1825u, 34196u, 38617u, 10964u, 12120u, 13243u, 1825u, 34196u,
				38617u, 10964u, 12120u, 13243u, 1825u, 34196u, 38617u, 10964u, 12120u, 13243u,
				530u, 534u, 538u, 918u, 922u, 2308u, 2820u, 3332u, 1046u, 1174u,
				1434u, 25419u, 29710u, 397u, 464u, 397u, 464u, 397u, 464u, 53643u,
				65998u, 2820u, 3332u, 25419u, 29710u, 25419u, 29710u, 2820u, 3332u, 1174u,
				1434u, 1174u, 1434u, 25419u, 29710u, 53643u, 65998u, 53643u, 65998u, 53643u,
				65998u, 53643u, 65998u, 531u, 535u, 539u, 531u, 535u, 539u, 531u,
				535u, 539u, 2820u, 3332u, 127577u, 32120u, 32155u, 127577u, 32120u, 32155u,
				8160660u, 8165081u, 1026772u, 1027928u, 1029051u, 1026772u, 1027928u, 1029051u, 127508u, 127577u,
				32084u, 32120u, 32155u, 127508u, 127577u, 32084u, 32120u, 32155u, 8165081u, 870177u,
				127508u, 127577u, 32084u, 32120u, 32155u, 870177u, 127508u, 127577u, 32084u, 32120u,
				32155u, 870177u, 8160660u, 1026772u, 870177u, 8160660u, 1026772u, 870177u, 8160660u, 8165081u,
				870177u, 8160660u, 8165081u, 870177u, 8160660u, 8165081u, 870047u, 870177u, 8160660u, 8165081u,
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				1027921u, 1029041u, 1026769u, 1027921u, 1029041u, 1026769u, 1027921u, 1029041u, 869537u, 869793u,
				8152468u, 8156564u, 1024724u, 1025748u, 870177u, 8160660u, 1026772u, 869537u, 869793u, 8152468u,
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				1026772u, 1027928u, 1029051u, 32084u, 32120u, 32155u, 32084u, 32120u, 32155u, 1026772u,
				1026772u, 128145u, 128145u, 128145u, 128145u, 128145u, 128145u, 128145u, 128145u, 8160985u,
				1026904u, 1027003u, 1026904u, 1027003u, 128584u, 32522u, 32618u, 32522u, 32618u, 1028027u,
				1028027u, 32619u, 32619u, 1026769u, 1027921u, 1029041u, 1026769u, 1027921u, 1029041u, 1026769u,
				1027921u, 1029041u, 1026769u, 1027921u, 1029041u, 870177u, 8160660u, 8165081u, 870177u, 8160660u,
				870177u, 8160660u, 8165081u, 1026772u, 1027928u, 1029051u, 1027928u, 1029051u, 1027928u, 1029051u,
				870177u, 8160660u, 8165081u, 1026772u, 1027928u, 1029051u, 8165081u, 509642132u, 510957273u, 505513364u,
				505796313u, 509642132u, 510957273u, 505513364u, 505796313u, 6063508u, 7378649u, 6063508u, 7378649u, 6063508u,
				7378649u, 1026772u, 1027928u, 1029051u, 1026772u, 1027928u, 1029051u, 1026772u, 1026772u, 1026772u,
				1027928u, 1029051u, 1026772u, 1027928u, 1029051u, 1026772u, 1026772u, 32084u, 32120u, 32155u,
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				2475737u, 870177u, 870177u, 127508u, 127508u, 870177u, 870177u, 127508u, 127508u, 870177u,
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				39u, 74u, 39u, 74u, 39u, 74u, 39u, 74u, 39u, 74u,
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				12395u, 3467u, 12395u, 3467u, 12395u, 3467u, 12395u, 3467u, 12395u, 3467u,
				12395u, 3467u, 12395u, 3467u, 12395u, 3467u, 107u, 107u, 107u, 107u,
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				2276u, 158052u, 158052u, 158052u, 158052u, 158052u, 47u, 47u, 9u, 9u,
				0u, 0u, 0u, 3844u, 542u, 4u, 4u, 4u, 4u, 0u,
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				543u, 1695u, 543u, 543u, 543u, 1695u, 543u, 0u, 0u, 0u,
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				340u, 376u, 411u, 340u, 376u, 411u, 333u, 335u, 333u, 335u,
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				411u, 340u, 376u, 411u, 10964u, 12120u, 13243u, 10964u, 10964u, 12120u,
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				10964u, 12120u, 13243u, 10964u, 12120u, 13243u, 10964u, 12120u, 13243u, 10964u,
				12120u, 13243u, 10964u, 12120u, 13243u, 10964u, 12120u, 13243u, 10964u, 12120u,
				13243u, 10964u, 12120u, 13243u, 10964u, 12120u, 13243u, 10964u, 12120u, 13243u,
				10964u, 10964u, 10964u, 10964u, 10964u, 10964u, 10964u, 12120u, 13243u, 10964u,
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				13243u, 10964u, 12120u, 13243u, 10964u, 10964u, 10964u, 10964u, 10964u, 10964u,
				32081u, 32113u, 32145u, 32081u, 340u, 376u, 411u, 10964u, 32084u, 32120u,
				32155u, 1026772u, 10964u, 12120u, 13243u, 10964u, 10964u, 12120u, 13243u, 10964u,
				52u, 641u, 22228u, 21205u, 276u, 308u, 648u, 649u, 10964u, 12120u,
				13243u, 10964u, 340u, 376u, 411u, 10964u, 32084u, 32120u, 32155u, 1026772u,
				32084u, 32120u, 32155u, 1026772u, 340u, 376u, 411u, 10964u, 10964u, 12120u,
				13243u, 10964u, 340u, 376u, 411u, 10964u, 10964u, 12120u, 13243u, 10964u,
				340u, 0u, 0u, 2131u, 2131u, 1u, 1u, 1u, 1u, 1u,
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				1169u, 1169u, 2195u, 2195u, 1169u, 785u, 1163u, 74958u, 74958u, 1169u,
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				779u, 974u, 779u, 974u, 395u, 462u, 395u, 462u, 395u, 462u,
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				886u, 54u, 54u, 886u, 886u, 884u, 54u, 54u, 2102u, 2103u,
				2103u, 2103u, 884u, 54u, 97u, 97u, 1u, 1u, 33652u, 33652u,
				886u, 886u, 886u, 886u, 54u, 886u, 886u, 886u, 886u, 886u,
				886u, 22u, 22u, 22u, 22u, 884u, 886u, 886u, 886u, 886u,
				886u, 886u, 54u, 54u, 886u, 886u, 886u, 54u, 54u, 54u,
				54u, 886u, 886u, 886u, 886u, 886u, 886u, 886u, 886u, 886u,
				886u, 886u, 886u, 22u, 22u, 22u, 22u, 854u, 854u, 854u,
				854u, 886u, 886u, 886u, 886u, 886u, 54u, 54u, 54u, 54u,
				886u, 886u, 886u, 854u, 854u, 886u, 886u, 886u, 886u, 884u,
				886u, 886u, 886u, 38u, 38u, 38u, 38u, 886u, 886u, 886u,
				886u, 886u, 886u, 886u, 886u, 886u, 886u, 98u, 98u, 98u,
				98u, 886u, 886u, 886u, 886u, 886u, 886u, 886u, 886u, 886u,
				38u, 38u, 886u, 886u, 886u, 886u, 886u, 886u, 886u, 886u,
				886u, 886u, 38u, 2u, 2u, 2u, 2u, 2u, 2u, 2u,
				2u, 54u, 54u, 54u, 54u, 886u, 886u, 886u, 886u, 886u,
				22u, 22u, 97u, 97u, 22u, 22u, 97u, 97u, 54u, 54u,
				54u, 22u, 22u, 97u, 97u, 22u, 22u, 97u, 97u, 54u,
				54u, 54u, 33654u, 2102u, 33652u, 33652u, 2102u, 2102u, 2102u, 2102u,
				2102u, 2102u, 2102u, 2102u, 2102u, 2102u, 2102u, 2102u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 4u, 4u,
				2820u, 3332u, 2820u, 3332u, 2820u, 3332u, 2820u, 3332u, 34196u, 38617u,
				34196u, 38617u, 34196u, 38617u, 34196u, 38617u, 34196u, 38617u, 34196u, 38617u,
				158052u, 532u, 596u, 84u, 89u, 84u, 89u, 84u, 89u, 84u,
				89u, 84u, 89u, 84u, 89u, 34196u, 38617u, 34196u, 38617u, 53953u,
				66433u, 53953u, 66433u, 53953u, 66433u, 53953u, 66433u, 53953u, 66433u, 53953u,
				66433u, 53953u, 66433u, 53953u, 66433u, 53953u, 66433u, 53953u, 66433u, 53953u,
				66433u, 53953u, 66433u, 53953u, 66433u, 53953u, 66433u, 53953u, 66433u, 53953u,
				66433u
			};
		}

		private static uint[] GetEncFlags2()
		{
			return new uint[4911]
			{
				0u, 0u, 0u, 0u, 0u, 0u, 1u, 1u, 1u, 2u,
				3u, 3u, 3u, 4u, 5u, 5u, 5u, 6u, 6u, 7u,
				7u, 8u, 9u, 9u, 9u, 10u, 11u, 11u, 11u, 12u,
				13u, 13u, 13u, 14u, 14u, 15u, 16u, 17u, 17u, 17u,
				18u, 19u, 19u, 19u, 20u, 21u, 21u, 21u, 22u, 22u,
				23u, 23u, 24u, 25u, 25u, 25u, 26u, 27u, 27u, 27u,
				28u, 29u, 29u, 29u, 30u, 30u, 31u, 31u, 32u, 33u,
				33u, 33u, 34u, 35u, 35u, 35u, 36u, 37u, 37u, 37u,
				39u, 40u, 41u, 41u, 41u, 42u, 43u, 43u, 43u, 44u,
				45u, 45u, 45u, 47u, 48u, 49u, 49u, 49u, 50u, 51u,
				51u, 51u, 52u, 53u, 53u, 53u, 55u, 56u, 57u, 57u,
				57u, 58u, 59u, 59u, 59u, 60u, 61u, 61u, 61u, 63u,
				64u, 64u, 72u, 72u, 80u, 80u, 80u, 88u, 88u, 88u,
				96u, 96u, 97u, 97u, 98u, 98u, 99u, 99u, 99u, 99u,
				99u, 104u, 104u, 104u, 105u, 105u, 105u, 106u, 106u, 106u,
				107u, 107u, 107u, 108u, 109u, 109u, 110u, 111u, 111u, 112u,
				112u, 112u, 113u, 113u, 113u, 114u, 114u, 114u, 115u, 115u,
				115u, 116u, 116u, 116u, 117u, 117u, 117u, 118u, 118u, 118u,
				119u, 119u, 119u, 120u, 120u, 120u, 121u, 121u, 121u, 122u,
				122u, 122u, 123u, 123u, 123u, 124u, 124u, 124u, 125u, 125u,
				125u, 126u, 126u, 126u, 127u, 127u, 127u, 2147483776u, 2281701504u, 2415919232u,
				2550136960u, 2684354688u, 2818572416u, 2952790144u, 3087007872u, 2147483777u, 2147483777u, 2147483777u, 2281701505u, 2281701505u,
				2281701505u, 2415919233u, 2415919233u, 2415919233u, 2550136961u, 2550136961u, 2550136961u, 2684354689u, 2684354689u, 2684354689u,
				2818572417u, 2818572417u, 2818572417u, 2952790145u, 2952790145u, 2952790145u, 3087007873u, 3087007873u, 3087007873u, 2147483778u,
				2281701506u, 2415919234u, 2550136962u, 2684354690u, 2818572418u, 2952790146u, 3087007874u, 2147483779u, 2147483779u, 2147483779u,
				2281701507u, 2281701507u, 2281701507u, 2415919235u, 2415919235u, 2415919235u, 2550136963u, 2550136963u, 2550136963u, 2684354691u,
				2684354691u, 2684354691u, 2818572419u, 2818572419u, 2818572419u, 2952790147u, 2952790147u, 2952790147u, 3087007875u, 3087007875u,
				3087007875u, 132u, 133u, 133u, 133u, 134u, 135u, 135u, 135u, 136u,
				137u, 137u, 137u, 138u, 139u, 139u, 139u, 140u, 140u, 140u,
				141u, 141u, 141u, 142u, 142u, 142u, 2147483791u, 2147483791u, 2147483791u, 144u,
				144u, 144u, 144u, 144u, 144u, 1075839120u, 152u, 152u, 152u, 153u,
				153u, 153u, 154u, 154u, 155u, 156u, 156u, 156u, 157u, 157u,
				157u, 158u, 159u, 160u, 161u, 161u, 161u, 162u, 163u, 163u,
				163u, 164u, 165u, 165u, 165u, 166u, 167u, 167u, 167u, 168u,
				169u, 169u, 169u, 170u, 171u, 171u, 171u, 172u, 173u, 173u,
				173u, 174u, 175u, 175u, 175u, 176u, 184u, 184u, 184u, 2147483840u,
				2281701568u, 2415919296u, 2550137024u, 2684354752u, 2818572480u, 2952790208u, 3087007936u, 2147483841u, 2147483841u, 2147483841u,
				2281701569u, 2281701569u, 2281701569u, 2415919297u, 2415919297u, 2415919297u, 2550137025u, 2550137025u, 2550137025u, 2684354753u,
				2684354753u, 2684354753u, 2818572481u, 2818572481u, 2818572481u, 2952790209u, 2952790209u, 2952790209u, 3087007937u, 3087007937u,
				3087007937u, 194u, 194u, 194u, 195u, 195u, 195u, 196u, 196u, 197u,
				197u, 2147483846u, 116472u, 2147483847u, 2147483847u, 2147483847u, 116728u, 116728u, 200u, 200u,
				200u, 201u, 201u, 201u, 202u, 202u, 202u, 203u, 203u, 203u,
				204u, 205u, 206u, 207u, 207u, 207u, 2147483856u, 2281701584u, 2415919312u, 2550137040u,
				2684354768u, 2818572496u, 2952790224u, 3087007952u, 2147483857u, 2147483857u, 2147483857u, 2281701585u, 2281701585u, 2281701585u,
				2415919313u, 2415919313u, 2415919313u, 2550137041u, 2550137041u, 2550137041u, 2684354769u, 2684354769u, 2684354769u, 2818572497u,
				2818572497u, 2818572497u, 2952790225u, 2952790225u, 2952790225u, 3087007953u, 3087007953u, 3087007953u, 2147483858u, 2281701586u,
				2415919314u, 2550137042u, 2684354770u, 2818572498u, 2952790226u, 3087007954u, 2147483859u, 2147483859u, 2147483859u, 2281701587u,
				2281701587u, 2281701587u, 2415919315u, 2415919315u, 2415919315u, 2550137043u, 2550137043u, 2550137043u, 2684354771u, 2684354771u,
				2684354771u, 2818572499u, 2818572499u, 2818572499u, 2952790227u, 2952790227u, 2952790227u, 3087007955u, 3087007955u, 3087007955u,
				212u, 213u, 214u, 215u, 2147483864u, 2281701592u, 2415919320u, 2550137048u, 2684354776u, 2818572504u,
				2952790232u, 3087007960u, 121024u, 121032u, 121040u, 121048u, 121056u, 121064u, 121072u, 121080u,
				2147483865u, 2415919321u, 2550137049u, 2684354777u, 2684354777u, 2818572505u, 2952790233u, 2952790233u, 2952790233u, 2952790233u,
				3087007961u, 3087007961u, 121280u, 121288u, 121296u, 121304u, 121312u, 121313u, 121316u, 121317u,
				121320u, 121321u, 121322u, 121323u, 121324u, 121325u, 121326u, 121328u, 121329u, 121330u,
				121331u, 121332u, 121333u, 121334u, 121335u, 121336u, 121337u, 121338u, 121339u, 121340u,
				121341u, 121342u, 121343u, 2147483866u, 2281701594u, 2415919322u, 2550137050u, 2684354778u, 2818572506u, 2952790234u,
				3087007962u, 121536u, 121544u, 121552u, 121560u, 121577u, 2147483867u, 2281701595u, 2415919323u, 2550137051u,
				2818572507u, 3087007963u, 121792u, 121800u, 121808u, 121816u, 121824u, 121824u, 121825u, 121825u,
				121826u, 121826u, 121827u, 121827u, 121828u, 121828u, 121829u, 121832u, 121840u, 2147483868u,
				2281701596u, 2415919324u, 2550137052u, 2684354780u, 2818572508u, 2952790236u, 3087007964u, 122048u, 122056u, 122064u,
				122072u, 122080u, 122088u, 122096u, 122104u, 2147483869u, 2281701597u, 2415919325u, 2550137053u, 2684354781u,
				2684354781u, 2952790237u, 2952790237u, 2952790237u, 2952790237u, 3087007965u, 3087007965u, 122304u, 122312u, 122320u,
				122328u, 122336u, 122344u, 2147483870u, 2281701598u, 2415919326u, 2550137054u, 2684354782u, 2818572510u, 2952790238u,
				3087007966u, 122560u, 122568u, 122576u, 122585u, 122592u, 122600u, 122608u, 122616u, 2147483871u,
				2281701599u, 2415919327u, 2550137055u, 2684354783u, 2818572511u, 2952790239u, 3087007967u, 122816u, 122824u, 122832u,
				122840u, 122848u, 122848u, 122849u, 122850u, 122856u, 122864u, 224u, 224u, 224u,
				224u, 224u, 224u, 224u, 225u, 225u, 225u, 225u, 225u, 225u,
				225u, 226u, 226u, 226u, 226u, 226u, 226u, 226u, 227u, 227u,
				227u, 227u, 227u, 227u, 227u, 228u, 229u, 229u, 230u, 231u,
				231u, 232u, 232u, 232u, 233u, 233u, 233u, 234u, 234u, 235u,
				235u, 235u, 236u, 237u, 237u, 238u, 239u, 239u, 241u, 244u,
				245u, 2147483894u, 2281701622u, 2415919350u, 2550137078u, 2684354806u, 2818572534u, 2952790262u, 3087007990u, 2147483895u,
				2147483895u, 2147483895u, 2281701623u, 2281701623u, 2281701623u, 2415919351u, 2415919351u, 2415919351u, 2550137079u, 2550137079u,
				2550137079u, 2684354807u, 2684354807u, 2684354807u, 2818572535u, 2818572535u, 2818572535u, 2952790263u, 2952790263u, 2952790263u,
				3087007991u, 3087007991u, 3087007991u, 248u, 249u, 250u, 251u, 252u, 253u, 2147483902u,
				2281701630u, 2147483903u, 2147483903u, 2147483903u, 2281701631u, 2281701631u, 2281701631u, 2415919359u, 2415919359u, 2415919359u,
				2550137087u, 2550137087u, 2550137087u, 2684354815u, 2684354815u, 2684354815u, 2818572543u, 2818572543u, 2818572543u, 2952790271u,
				2952790271u, 2952790271u, 2147614720u, 2147614720u, 2147614720u, 2281832448u, 2281832448u, 2281832448u, 2416050176u, 2416050176u,
				2416050176u, 2550267904u, 2550267904u, 2550267904u, 2684485632u, 2684485632u, 2684485632u, 2818703360u, 2818703360u, 2818703360u,
				2952921088u, 2952921088u, 2147614721u, 2147614721u, 2147614721u, 2281832449u, 2281832449u, 2281832449u, 2416050177u, 2416050177u,
				2416050177u, 2550267905u, 2550267905u, 2550267905u, 2684485633u, 2684485633u, 2684485633u, 3894542337u, 2952921089u, 2952921089u,
				2952921089u, 3087138817u, 1073938880u, 1073938881u, 1073938882u, 1073938883u, 1073938884u, 1073938885u, 1073938888u, 1073938888u,
				1073938888u, 1073938889u, 1073938890u, 1073938891u, 1073938895u, 1073938896u, 1073938897u, 1073938900u, 1073938901u, 1073938902u,
				1073938903u, 197080u, 197080u, 197080u, 197081u, 197082u, 197082u, 197082u, 197083u, 197083u,
				197083u, 197084u, 197085u, 197086u, 197087u, 197087u, 197087u, 1076036072u, 1076036074u, 1073938926u,
				1073938927u, 197112u, 197113u, 1073938938u, 1073938938u, 1073938938u, 1076036090u, 1073938939u, 197116u, 197116u,
				197116u, 1073938941u, 131074u, 131074u, 131074u, 131075u, 131075u, 131075u, 131076u, 131077u,
				131077u, 131078u, 131079u, 131079u, 131079u, 131080u, 131081u, 1075970057u, 131082u, 131083u,
				131085u, 131085u, 131085u, 2147614733u, 2281832461u, 2416050189u, 131086u, 131088u, 131089u, 131089u,
				131090u, 131091u, 131091u, 1073872912u, 1149370384u, 1166147600u, 1140981776u, 1157758992u, 1174536208u, 1074921488u,
				1150418960u, 1167196176u, 1146224656u, 1163001872u, 1179779088u, 1075970064u, 1117913104u, 1117913104u, 1109524496u, 1109524496u,
				1077018640u, 1118961680u, 1118961680u, 1114767376u, 1114767376u, 1073872913u, 1149370385u, 1166147601u, 1140981777u, 1157758993u,
				1174536209u, 1074921489u, 1150418961u, 1167196177u, 1146224657u, 1163001873u, 1179779089u, 1075970065u, 1117913105u, 1117913105u,
				1109524497u, 1109524497u, 1077018641u, 1118961681u, 1118961681u, 1114767377u, 1114767377u, 1073872914u, 1073872914u, 1149370386u,
				1149370386u, 1140981778u, 1140981778u, 1074921490u, 1150418962u, 1146224658u, 1075970066u, 1151467538u, 1168244754u, 1143078930u,
				1159856146u, 1176633362u, 1077018642u, 1152516114u, 1169293330u, 1148321810u, 1165099026u, 1181876242u, 1073872915u, 1149370387u,
				1140981779u, 1074921491u, 1150418963u, 1146224659u, 1073872916u, 1149370388u, 1166147604u, 1140981780u, 1157758996u, 1174536212u,
				1074921492u, 1150418964u, 1167196180u, 1146224660u, 1163001876u, 1179779092u, 1073872917u, 1149370389u, 1166147605u, 1140981781u,
				1157758997u, 1174536213u, 1074921493u, 1150418965u, 1167196181u, 1146224661u, 1163001877u, 1179779093u, 1073872918u, 1149370390u,
				1140981782u, 1073872918u, 1149370390u, 1140981782u, 1074921494u, 1150418966u, 1146224662u, 1075970070u, 1151467542u, 1168244758u,
				1143078934u, 1159856150u, 1176633366u, 1073872919u, 1149370391u, 1140981783u, 1074921495u, 1150418967u, 1146224663u, 131096u,
				131096u, 131096u, 131097u, 131097u, 131097u, 131098u, 131098u, 131098u, 131099u, 131099u,
				131099u, 131100u, 131100u, 131100u, 131101u, 131101u, 131101u, 131102u, 131102u, 131102u,
				131103u, 131103u, 131103u, 2147614744u, 2281832472u, 2416050200u, 2550267928u, 1073872922u, 1074921498u, 1074921498u,
				1075970074u, 1075970074u, 1077018650u, 1077018650u, 1073872923u, 1074921499u, 1074921499u, 1075970075u, 1075970075u, 1077018651u,
				1077018651u, 3221356572u, 3357671454u, 3357671454u, 1076043514u, 1076043515u, 2147614751u, 2147614751u, 2147614751u, 131104u,
				131104u, 131105u, 131105u, 131106u, 131106u, 131107u, 131107u, 131108u, 131110u, 1073872936u,
				1149370408u, 1166147624u, 1140981800u, 1157759016u, 1174536232u, 1074921512u, 1150418984u, 1167196200u, 1146224680u, 1163001896u,
				1179779112u, 1073872937u, 1149370409u, 1166147625u, 1140981801u, 1157759017u, 1174536233u, 1074921513u, 1150418985u, 1167196201u,
				1146224681u, 1163001897u, 1179779113u, 1073872938u, 1074921514u, 1075970090u, 1075970090u, 1122107434u, 1113718826u, 1122107434u,
				1113718826u, 1077018666u, 1077018666u, 1123156010u, 1114767402u, 1123156010u, 1114767402u, 1073872939u, 1149370411u, 1166147627u,
				1140981803u, 1157759019u, 1174536235u, 1074921515u, 1150418987u, 1167196203u, 1146224683u, 1163001899u, 1179779115u, 1075970091u,
				1077018667u, 1073872940u, 1074921516u, 1075970092u, 1075970092u, 1122107436u, 1113718828u, 1122107436u, 1113718828u, 1077018668u,
				1077018668u, 1123156012u, 1114767404u, 1123156012u, 1114767404u, 1073872941u, 1074921517u, 1075970093u, 1075970093u, 1122107437u,
				1113718829u, 1122107437u, 1113718829u, 1077018669u, 1077018669u, 1123156013u, 1114767405u, 1123156013u, 1114767405u, 1073872942u,
				1115815982u, 1107427374u, 1074921518u, 1116864558u, 1112670254u, 1073872943u, 1074921519u, 1115815983u, 1116864559u, 1107427375u,
				1112670255u, 131120u, 131121u, 131122u, 131123u, 131124u, 131125u, 131125u, 1073872951u, 131136u,
				131136u, 131136u, 131137u, 131137u, 131137u, 131138u, 131138u, 131138u, 131139u, 131139u,
				131139u, 131140u, 131140u, 131140u, 131141u, 131141u, 131141u, 131142u, 131142u, 131142u,
				131143u, 131143u, 131143u, 131144u, 131144u, 131144u, 131145u, 131145u, 131145u, 131146u,
				131146u, 131146u, 131147u, 131147u, 131147u, 131148u, 131148u, 131148u, 131149u, 131149u,
				131149u, 131150u, 131150u, 131150u, 131151u, 131151u, 131151u, 1090650177u, 1094844481u, 1091698753u,
				1095893057u, 1090650178u, 1094844482u, 1091698754u, 1095893058u, 1073872964u, 1078067268u, 1074921540u, 1079115844u, 1090650181u,
				1094844485u, 1091698757u, 1095893061u, 1090650182u, 1094844486u, 1091698758u, 1095893062u, 1090650183u, 1094844487u, 1091698759u,
				1095893063u, 1090650186u, 1094844490u, 1091698762u, 1095893066u, 1090650187u, 1094844491u, 1091698763u, 1073872976u, 1073872976u,
				1153564752u, 1145176144u, 1170341968u, 1161953360u, 1074921552u, 1074921552u, 1154613328u, 1146224720u, 1171390544u, 1163001936u,
				1073872977u, 1149370449u, 1166147665u, 1140981841u, 1157759057u, 1174536273u, 1074921553u, 1150419025u, 1167196241u, 1146224721u,
				1163001937u, 1179779153u, 1075970129u, 1117913169u, 1109524561u, 1077018705u, 1118961745u, 1114767441u, 1073872978u, 1149370450u,
				1166147666u, 1075970130u, 1117913170u, 1073872979u, 1149370451u, 1166147667u, 1075970131u, 1117913171u, 1073872980u, 1149370452u,
				1166147668u, 1140981844u, 1157759060u, 1174536276u, 1074921556u, 1150419028u, 1167196244u, 1146224724u, 1163001940u, 1179779156u,
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				1146486806u, 1075183639u, 1075183639u, 1154875415u, 1146486807u, 1154875415u, 1146486807u, 1159069720u, 1159069720u, 1175846936u,
				1163264024u, 1180041240u, 1159069721u, 1159069721u, 1175846937u, 1163264025u, 1180041241u, 1175846938u, 1180041242u, 1175846939u,
				1180041243u, 1142292509u, 1159069725u, 1142292509u, 1159069725u, 1175846941u, 1142292510u, 1159069726u, 1175846942u, 1146486814u,
				1163264030u, 1180041246u, 1142292511u, 1159069727u, 1175846943u, 1146486815u, 1163264031u, 1180041247u, 1075183648u, 1075183648u,
				1154875424u, 1146486816u, 1154875424u, 1146486816u, 1075183649u, 1150681121u, 1142292513u, 1075183650u, 1075183650u, 1154875426u,
				1146486818u, 1154875426u, 1146486818u, 1159069731u, 1175846947u, 1163264035u, 1180041251u, 1142292517u, 1159069733u, 1175846949u,
				1146486821u, 1163264037u, 1180041253u, 1142292518u, 1159069734u, 1175846950u, 1146486822u, 1163264038u, 1180041254u, 1108738087u,
				1112932391u, 1075183664u, 1079377968u, 1075183665u, 1079377969u, 1075183666u, 1079377970u, 1075183667u, 1079377971u, 1159069752u,
				1159069752u, 1175846968u, 1163264056u, 1180041272u, 1159069753u, 1159069753u, 1175846969u, 1163264057u, 1180041273u, 1175846970u,
				1180041274u, 1175846971u, 1180041275u, 1142292542u, 1159069758u, 1175846974u, 1146486846u, 1163264062u, 1180041278u, 1142292543u,
				1159069759u, 1175846975u, 1146486847u, 1163264063u, 1180041279u, 1075183680u, 1150681152u, 1167458368u, 1075183681u, 1150681153u,
				1075183682u, 1150681154u, 1167458370u, 1142292546u, 1159069762u, 1175846978u, 1159069763u, 1175846979u, 1163264067u, 1180041283u,
				1075183684u, 1150681156u, 1167458372u, 1150681156u, 1167458372u, 1184235588u, 1159069766u, 1142292552u, 1159069768u, 1146486856u,
				1163264072u, 1142292553u, 1159069769u, 1146486857u, 1163264073u, 1142292554u, 1159069770u, 1142292555u, 1159069771u, 1142292556u,
				1159069772u, 1142292560u, 1159069776u, 1175846992u, 1146486864u, 1163264080u, 1180041296u, 1108738129u, 1112932433u, 1142292564u,
				1159069780u, 1175846996u, 1146486868u, 1163264084u, 1180041300u, 1108738133u, 1112932437u, 1142292566u, 1159069782u, 1175846998u,
				1146486870u, 1163264086u, 1180041302u, 1108738135u, 1112932439u, 1142292572u, 1159069788u, 1146486876u, 1163264092u, 1142292573u,
				1159069789u, 1146486877u, 1163264093u, 1142292574u, 1159069790u, 1146486878u, 1163264094u, 1142292575u, 1159069791u, 1146486879u,
				1163264095u, 1075183712u, 1075183712u, 1154875488u, 1146486880u, 1075183713u, 1075183713u, 1154875489u, 1146486881u, 1075183714u,
				1150681186u, 1075183715u, 1150681187u, 1142292582u, 1159069798u, 1175847014u, 1146486886u, 1163264102u, 1180041318u, 1108738151u,
				1112932455u, 1142292584u, 1159069800u, 1146486888u, 1163264104u, 1142292585u, 1159069801u, 1146486889u, 1163264105u, 1108738154u,
				1112932458u, 1108738155u, 1112932459u, 1142292588u, 1159069804u, 1146486892u, 1163264108u, 1142292589u, 1159069805u, 1146486893u,
				1163264109u, 1108738158u, 1112932462u, 1108738159u, 1112932463u, 1146486896u, 1163264112u, 1180041328u, 1142292593u, 1159069809u,
				1175847025u, 1146486897u, 1163264113u, 1180041329u, 1146486898u, 1163264114u, 1180041330u, 1142292595u, 1159069811u, 1175847027u,
				1146486899u, 1163264115u, 1180041331u, 1142292600u, 1159069816u, 1146486904u, 1163264120u, 1142292601u, 1159069817u, 1146486905u,
				1163264121u, 1108738170u, 1112932474u, 1108738171u, 1112932475u, 1142292604u, 1159069820u, 1146486908u, 1163264124u, 1142292605u,
				1159069821u, 1146486909u, 1163264125u, 1108738174u, 1112932478u, 1108738175u, 1112932479u, 1074135244u, 1075183822u, 1146486990u,
				1163264206u, 1146486990u, 1163264206u, 1180041422u, 1075183823u, 1146486991u, 1163264207u, 1146486991u, 1163264207u, 1180041423u,
				1075183839u, 1150681311u, 1140195568u, 1131806960u, 1140850821u, 1140850822u, 1140850823u, 1140850830u, 1140850831u, 1140850837u,
				1140850838u, 1140850839u, 1140850846u, 1140850847u, 1140850850u, 1157628066u, 1145045154u, 1161822370u, 1140850851u, 1145045155u,
				1140850854u, 1140850870u, 1140850880u, 1140850881u, 1140850882u, 1140850883u, 1140850892u, 1140850893u, 1140850894u, 1140850895u,
				1140850924u, 1140850925u, 1140850926u, 1140850927u, 3368157185u, 3359768577u, 3502374913u, 3493986305u, 3636592641u, 3628204033u,
				3770810369u, 3762421761u, 3905028097u, 3896639489u, 4039245825u, 4030857217u, 4173463553u, 4165074945u, 3368157186u, 3359768578u,
				4039245826u, 4030857218u, 3233939474u, 3225550866u, 3368157202u, 3359768594u, 1140981888u, 1157759104u, 1140981889u, 1157759105u,
				1140981890u, 1140981891u, 1140981904u, 1145176208u, 1140981905u, 1145176209u, 1140981906u, 1145176210u, 1140981907u, 1145176211u,
				1140981908u, 1145176212u, 1140981909u, 1145176213u, 1140981910u, 1145176214u, 1140981911u, 1145176215u, 1140981912u, 1145176216u,
				1140981913u, 1145176217u, 1140981914u, 1145176218u, 1140981915u, 1145176219u, 1140981953u, 1140981954u, 1140981955u, 1140981958u,
				1140981959u, 1140981963u, 1140981969u, 1140981970u, 1140981971u, 1140981974u, 1140981975u, 1140981979u, 1140981985u, 1140981986u,
				1140981987u, 1086586896u, 1078198288u, 3234070546u, 3225681938u, 3368288274u, 3359899666u, 12u, 13u, 28u,
				29u, 134u, 135u, 138u, 142u, 144u, 148u, 150u, 151u, 154u,
				158u, 160u, 164u, 166u, 167u, 170u, 174u, 176u, 180u, 182u,
				183u, 187u, 191u, 1076036094u, 1077084670u, 1076036095u, 1077084671u, 1077084671u, 1077084671u, 1073938920u,
				1077084648u, 1077084649u, 1073938942u, 1073938942u, 1073938942u, 1073938943u, 2550267917u, 2684485645u, 2818703373u, 2952921101u,
				3087138829u, 131327u, 1076036057u, 1073872951u, 3288596553u, 1141197248u, 3289645129u, 1144258633u, 1142161483u, 1143210059u,
				1144258635u, 1143210076u, 1141112926u, 1142161502u, 1143210078u, 1144258654u, 122849u, 122850u, 2147614774u, 2147614775u,
				131128u, 131129u, 131130u, 131192u, 131193u, 2147614842u, 2147614843u, 2147614844u, 2147614845u, 131198u,
				131130u, 131131u, 131132u, 131133u, 131135u, 131152u, 131153u, 131154u, 131156u, 131157u,
				131160u, 131161u, 131162u, 131163u, 131164u, 131165u, 131166u, 121303u, 121314u, 121318u,
				121319u, 121852u, 122364u, 122584u, 122586u, 122588u, 122589u, 122590u, 122876u, 1074987468u,
				1074987469u, 1074987470u, 1074987471u, 3223584984u, 3357802712u, 3492020440u, 3626238168u, 1076101340u, 1076101340u, 1076101341u,
				1076101342u, 1076101343u, 1076101370u, 1076101371u, 1142161432u, 1158938648u, 1158938649u, 1077084633u, 1076036076u, 1076036077u,
				1076036078u, 1076036079u, 4028760263u, 1076359360u, 1142161488u, 1158938704u, 1142161489u, 1158938705u, 1142161490u, 1158938706u,
				1142161491u, 1158938707u, 1076078312u, 1076078312u, 1076078312u, 1076078576u, 1076078576u, 1076078576u, 4029808640u, 4029808640u,
				4029808640u, 1076036042u, 1077084618u, 1141506136u, 1158283352u, 1175060568u, 1110048856u, 1141244098u, 1158021314u, 1174798530u,
				1109786818u, 1107951663u, 1141506139u, 1158283355u, 1175060571u, 1146749018u, 1163526234u, 1180303450u, 1142554715u, 1159331931u,
				1176109147u, 1141506138u, 1158283354u, 1175060570u, 1142685715u, 1159462931u, 1176240147u, 1142554747u, 1159331963u, 1176109179u,
				1141506169u, 1158283385u, 1175060601u, 1142554745u, 1159331961u, 1176109177u, 1141506173u, 1158283389u, 1175060605u, 1142554749u,
				1159331965u, 1176109181u, 1142554653u, 1159331869u, 1176109085u, 1145700443u, 1162477659u, 1179254875u, 1115291738u, 1110048858u,
				1122631725u, 1114243117u, 1108082707u, 1122631801u, 1114243193u, 1122631722u, 1114243114u, 1107951645u, 1143603291u, 1160380507u,
				1177157723u, 1142554746u, 1159331962u, 1176109178u, 1141506168u, 1158283384u, 1175060600u, 1142554744u, 1159331960u, 1176109176u,
				1141506172u, 1158283388u, 1175060604u, 1142554748u, 1159331964u, 1176109180u, 1122631724u, 1114243116u, 1122631800u, 1114243192u,
				1144651898u, 1161429114u, 1178206330u, 1148846202u, 1165623418u, 1182400634u, 1122631803u, 1114243195u, 1144651901u, 1161429117u,
				1178206333u, 1143603325u, 1160380541u, 1177157757u, 1141506142u, 1158283358u, 1175060574u, 1110048862u, 1144782934u, 1161560150u,
				1178337366u, 1143734358u, 1160511574u, 1177288790u, 1111228503u, 1110179927u, 1144783062u, 1161560278u, 1178337494u, 1143734486u,
				1160511702u, 1177288918u, 1111228631u, 1110180055u, 1142685846u, 1159463062u, 1176240278u, 1142685862u, 1159463078u, 1176240294u,
				1142685878u, 1159463094u, 1176240310u, 1142685847u, 1159463063u, 1176240279u, 1142685863u, 1159463079u, 1176240295u, 1142685879u,
				1159463095u, 1176240311u, 1142685848u, 1159463064u, 1176240280u, 1142685864u, 1159463080u, 1176240296u, 1142685880u, 1159463096u,
				1176240312u, 1142685852u, 1159463068u, 1176240284u, 1142685868u, 1159463084u, 1176240300u, 1142685884u, 1159463100u, 1176240316u,
				1109131417u, 1109131433u, 1109131449u, 1109131421u, 1109131437u, 1109131453u, 1142685850u, 1159463066u, 1176240282u, 1142685866u,
				1159463082u, 1176240298u, 1142685882u, 1159463098u, 1176240314u, 1142685854u, 1159463070u, 1176240286u, 1142685870u, 1159463086u,
				1176240302u, 1142685886u, 1159463102u, 1176240318u, 1109131419u, 1109131435u, 1109131451u, 1109131423u, 1109131439u, 1109131455u,
				1141244006u, 1158021222u, 1174798438u, 1107689575u, 1142685762u, 1159462978u, 1176240194u, 1109131331u, 1141243942u, 1158021158u,
				1174798374u, 1107689511u, 1141506143u, 1158283359u, 1175060575u, 1110048863u, 1141506141u, 1158283357u, 1175060573u, 1110048861u,
				1110048784u, 1110048785u, 1110048784u, 1110048785u, 1155137646u, 1146749038u, 1155137662u, 1146749054u, 1141506137u, 1158283353u,
				1175060569u, 1110048857u, 1142685772u, 1159462988u, 1176240204u, 1109131341u, 1141243990u, 1158021206u, 1174798422u, 1107689559u,
				1141243912u, 1158021128u, 1174798344u, 1107689482u, 1142685774u, 1159462990u, 1176240206u, 1109131343u, 1142685740u, 1159462956u,
				1176240172u, 1109131309u, 1141506129u, 1158283345u, 1175060561u, 1110048849u, 1141506140u, 1158283356u, 1175060572u, 1110048860u,
				1107951662u, 131086u, 131087u, 1140850804u, 1140850805u, 3296854040u, 3431071768u, 3565289496u, 3699507224u, 3833724952u,
				3967942680u, 4102160408u, 4236378136u, 1140981825u, 1140981826u, 1140981827u, 1140981828u, 1140981829u, 1140981830u, 1140981831u,
				1140981832u, 1140981833u, 1140981892u, 1140981893u, 1140981904u, 1140981906u, 1140981907u, 1140981909u, 1140981911u, 1140981912u,
				4108452014u, 4100063406u, 4109500590u, 4101111982u, 4238475438u, 4239524014u, 1155662008u, 1147273400u, 1155662012u, 1147273404u,
				1156710588u, 1148321980u, 1155662013u, 1147273405u, 1143210224u, 1147404528u, 1144258800u, 1148453104u, 1144258801u, 1148453105u,
				1142292542u, 3330408472u, 3464626200u, 3598843928u, 3733061656u, 3867279384u, 4001497112u, 4135714840u, 4269932568u, 1174536232u,
				1179779112u, 1174536233u, 1179779113u, 1180827689u, 1180827689u, 1177681961u, 1177681961u, 1174536280u, 1179779160u, 1174536281u,
				1179779161u, 1174536282u, 1179779162u, 1174536284u, 1179779164u, 1175584870u, 1175584879u, 1179779183u, 1175584880u, 3591503986u,
				3859939442u, 4128374898u, 1175584886u, 1176633466u, 1175584895u, 1179779199u, 4272029870u, 4273078446u, 1174536386u, 1179779266u,
				1175584987u, 1179779291u, 1175584991u, 1179779295u, 1176633574u, 1175585003u, 1179779307u, 1175585007u, 1179779311u, 1175585018u,
				1175585022u, 1175715864u, 1179910169u, 1175715866u, 1179910171u, 1175715879u, 1175715894u, 1175715897u, 1175715899u, 1175715901u,
				1175715903u, 1175715904u, 1175715906u, 1179910210u, 1175715909u, 1175715910u, 1175715911u, 1175715912u, 1175715913u, 1175715914u,
				1175715915u, 1175715920u, 1179910224u, 1175715921u, 1175715922u, 1179910226u, 1175715923u, 1179910227u, 1175715924u, 1175715925u,
				1179910229u, 1175715926u, 1175715927u, 1175715928u, 1179910233u, 1175715930u, 1179910235u, 1175715932u, 1175715933u, 1175715934u,
				1175715935u, 1175715940u, 1179910244u, 1175715941u, 1179910245u, 1175715943u, 1175715944u, 1175715945u, 1175715946u, 1175715947u,
				1175715948u, 1175715949u, 1179910253u, 1175715950u, 1175715951u, 1175715952u, 1175715953u, 1175715954u, 1175715955u, 1175715956u,
				1175715972u, 1175715974u, 1175715975u, 1175715984u, 1179910288u, 1175715986u, 1179910290u, 1175715988u, 1179910292u, 1175715992u,
				1179910296u, 1175715994u, 1179910298u, 1175715996u, 1179910300u, 1175715998u, 1179910302u, 1175716000u, 1179910304u, 1175716002u,
				1179910306u, 1175716004u, 1175716008u, 1179910312u, 1175716010u, 1179910314u, 1175716012u, 1179910316u, 1175716014u, 1179910318u,
				1175716016u, 1175716018u, 1175716020u, 1175716021u, 1175716024u, 1179910328u, 1175716026u, 1179910330u, 1175716028u, 1179910332u,
				1175716030u, 1179910334u, 1175716032u, 3323199686u, 3327393990u, 3457417414u, 3591635142u, 3860070598u, 3864264902u, 3994288326u,
				4128506054u, 1175716040u, 1175716041u, 1175716042u, 1175716043u, 1175716044u, 1175716045u, 1175716046u, 1179910350u, 1175716047u,
				1174667472u, 1178861776u, 1175716048u, 1179910352u, 1174667473u, 1178861777u, 1175716049u, 1179910353u, 1174667474u, 1175716050u,
				1174667475u, 1174667476u, 1178861780u, 1175716052u, 1179910356u, 1174667477u, 1178861781u, 1175716053u, 1179910357u, 1174667478u,
				1175716054u, 1174667479u, 1175846915u, 1175846919u, 1175846942u, 1175846943u, 1175846950u, 1180041254u, 1175846994u, 1180041298u,
				1174798538u, 1175847114u, 1182138570u, 1174798539u, 1175847115u, 1175847120u, 1175847121u, 1182138598u, 1076078320u, 1076078320u,
				1076078320u, 1076078328u, 1076078328u, 1076078328u, 1076078304u, 1076078304u, 1076078304u, 1076078584u, 1076078584u, 1076078584u,
				1076078296u, 1076078296u, 1076078296u, 0u, 1073938886u, 1076036038u, 1077084614u, 1076036093u, 2952921112u, 3087138840u,
				1074004220u, 1074004220u, 1075052796u, 1075052796u, 1076101372u, 1076101372u, 1077149948u, 1077149948u, 1141112912u, 1157890128u,
				1143210064u, 1159987280u, 1144258640u, 1161035856u, 1141112913u, 1157890129u, 1143210065u, 1159987281u, 1144258641u, 1161035857u,
				1144258652u, 1143210098u, 1159987314u, 1141113008u, 1157890224u, 1142161584u, 1158938800u, 1143210160u, 1159987376u, 1144258736u,
				1161035952u, 1142161585u, 1158938801u, 1143210161u, 1159987377u, 1146355892u, 1163133108u, 1146355893u, 1163133109u, 1154744544u,
				1146355936u, 1154744545u, 1146355937u, 1154744546u, 1146355938u, 1154744547u, 1146355939u, 1154744548u, 1146355940u, 1154744549u,
				1146355941u, 1154744550u, 1146355942u, 1154744551u, 1146355943u, 1154744552u, 1146355944u, 1154744553u, 1146355945u, 1154744554u,
				1146355946u, 1154744555u, 1146355947u, 1154744556u, 1146355948u, 1154744557u, 1146355949u, 1154744558u, 1146355950u, 1154744559u,
				1146355951u
			};
		}

		private static uint[] GetEncFlags3()
		{
			return new uint[4911]
			{
				196608u, 196608u, 196608u, 196608u, 196608u, 2031616u, 2031624u, 2031632u, 1966104u, 196608u,
				196616u, 196624u, 131096u, 196608u, 196616u, 196624u, 131096u, 65544u, 65552u, 65544u,
				65552u, 2031616u, 2031624u, 2031632u, 1966104u, 196608u, 196616u, 196624u, 131096u, 196608u,
				196616u, 196624u, 131096u, 65544u, 65552u, 65544u, 2031616u, 2031624u, 2031632u, 1966104u,
				196608u, 196616u, 196624u, 131096u, 196608u, 196616u, 196624u, 131096u, 65544u, 65552u,
				65544u, 65552u, 2031616u, 2031624u, 2031632u, 1966104u, 196608u, 196616u, 196624u, 131096u,
				196608u, 196616u, 196624u, 131096u, 65544u, 65552u, 65544u, 65552u, 2031616u, 2031624u,
				2031632u, 1966104u, 196608u, 196616u, 196624u, 131096u, 196608u, 196616u, 196624u, 131096u,
				65536u, 2031616u, 2031624u, 2031632u, 1966104u, 196608u, 196616u, 196624u, 131096u, 196608u,
				196616u, 196624u, 131096u, 65536u, 2031616u, 2031624u, 2031632u, 1966104u, 196608u, 196616u,
				196624u, 131096u, 196608u, 196616u, 196624u, 131096u, 65536u, 196608u, 196616u, 196624u,
				131096u, 196608u, 196616u, 196624u, 131096u, 196608u, 196616u, 196624u, 131096u, 65536u,
				65544u, 65552u, 65544u, 65552u, 196616u, 65552u, 135192u, 196616u, 65552u, 135192u,
				65544u, 65552u, 65544u, 65552u, 65544u, 65552u, 65544u, 65552u, 131080u, 131088u,
				131096u, 196616u, 65552u, 135192u, 196616u, 196624u, 131096u, 196616u, 65552u, 135192u,
				196616u, 196624u, 131096u, 2293760u, 2293768u, 2293776u, 2293760u, 2293768u, 2293776u, 25362440u,
				25231376u, 25317400u, 25362440u, 25231376u, 25317400u, 25362440u, 25231376u, 25317400u, 25362440u, 25231376u,
				25317400u, 25362440u, 25231376u, 25317400u, 25362440u, 25231376u, 25317400u, 25362440u, 25231376u, 25317400u,
				25362440u, 25231376u, 25317400u, 25362440u, 25231376u, 25317400u, 25362440u, 25231376u, 25317400u, 25362440u,
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				1610809602u, 1610809602u, 1610809730u, 1610809730u, 1610809730u, 1610809602u, 1610809602u, 1610809602u, 1610809730u, 1610809730u,
				1610809730u, 196609u, 196609u, 196609u, 196609u, 1610809858u, 1610809986u, 1610810114u, 1610809858u, 1610809986u,
				1610810114u, 196609u, 196609u, 196609u, 196609u, 537068034u, 537068162u, 537068290u, 196609u, 196609u,
				196609u, 196609u, 2684551426u, 2684551426u, 2684551426u, 2684551554u, 2684551554u, 2684551554u, 196609u, 196609u,
				196609u, 196609u, 2684551426u, 2684551426u, 2684551426u, 2684551554u, 2684551554u, 2684551554u, 196609u, 196609u,
				196609u, 196609u, 2684551426u, 2684551426u, 2684551426u, 2684551554u, 2684551554u, 2684551554u, 196609u, 196609u,
				196609u, 196609u, 2684551426u, 2684551426u, 2684551426u, 2684551554u, 2684551554u, 2684551554u, 196609u, 196609u,
				196609u, 196609u, 1677919234u, 1677919362u, 1812137218u, 1677919618u, 1677919746u, 1812137602u, 196609u, 196609u,
				196609u, 196609u, 1677919234u, 1677919362u, 1812137218u, 1677919618u, 1677919746u, 1812137602u, 196609u, 196609u,
				196609u, 196609u, 1677919234u, 1677919362u, 1812137218u, 1677919618u, 1677919746u, 1812137602u, 196609u, 196609u,
				1745027330u, 1745027458u, 196609u, 196609u, 196609u, 196609u, 1677919234u, 1677919362u, 1812137218u, 1677919618u,
				1677919746u, 1812137602u, 1610809858u, 196609u, 196609u, 1745027330u, 1745027458u, 1610809858u, 196609u, 196609u,
				196609u, 196609u, 1677919234u, 1677919362u, 1812137218u, 1677919618u, 1677919746u, 1812137602u, 196609u, 196609u,
				1745027330u, 1745027458u, 196609u, 196609u, 196609u, 196609u, 1677919234u, 1677919362u, 1812137218u, 1677919618u,
				1677919746u, 1812137602u, 196609u, 196609u, 1745027330u, 1745027458u, 2684551426u, 2684551426u, 2684551426u, 2684551554u,
				2684551554u, 2684551554u, 2684551426u, 2684551426u, 2684551426u, 2684551554u, 2684551554u, 2684551554u, 2684551426u, 2684551426u,
				2684551426u, 2684551554u, 2684551554u, 2684551554u, 2684551426u, 2684551426u, 2684551426u, 2684551554u, 2684551554u, 2684551554u,
				196609u, 196609u, 196609u, 196609u, 1677919234u, 1677919362u, 1812137218u, 1677919618u, 1677919746u, 1812137602u,
				196609u, 196609u, 196609u, 196609u, 1677919234u, 1677919362u, 1812137218u, 1677919618u, 1677919746u, 1812137602u,
				196609u, 196609u, 196609u, 196609u, 1677919234u, 1677919362u, 1812137218u, 1677919618u, 1677919746u, 1812137602u,
				196609u, 196609u, 1745027330u, 1745027458u, 196609u, 196609u, 196609u, 196609u, 1677919234u, 1677919362u,
				1812137218u, 1677919618u, 1677919746u, 1812137602u, 1610809858u, 196609u, 196609u, 1745027330u, 1745027458u, 1610809858u,
				196609u, 196609u, 196609u, 196609u, 1677919234u, 1677919362u, 1812137218u, 1677919618u, 1677919746u, 1812137602u,
				196609u, 196609u, 1745027330u, 1745027458u, 196609u, 196609u, 196609u, 196609u, 1677919234u, 1677919362u,
				1812137218u, 1677919618u, 1677919746u, 1812137602u, 196609u, 196609u, 1745027330u, 1745027458u, 1677919618u, 1677919746u,
				1677919874u, 1677919618u, 1677919746u, 1677919874u, 196609u, 196609u, 196609u, 196609u, 1677919234u, 1677919362u,
				1812137218u, 1677919618u, 1677919746u, 1812137602u, 196609u, 196609u, 196609u, 196609u, 1677919234u, 1677919362u,
				1812137218u, 1677919618u, 1677919746u, 1812137602u, 196609u, 196609u, 196609u, 196609u, 1677919234u, 1677919362u,
				1812137218u, 1677919618u, 1677919746u, 1812137602u, 196609u, 196609u, 1745027330u, 1745027458u, 196609u, 196609u,
				196609u, 196609u, 1677919234u, 1677919362u, 1812137218u, 1677919618u, 1677919746u, 1812137602u, 196609u, 196609u,
				1745027330u, 1745027458u, 196609u, 196609u, 196609u, 196609u, 1677919234u, 1677919362u, 1812137218u, 1677919618u,
				1677919746u, 1812137602u, 196609u, 196609u, 1745027330u, 1745027458u, 196609u, 196609u, 196609u, 196609u,
				1677919234u, 1677919362u, 1812137218u, 1677919618u, 1677919746u, 1812137602u, 196609u, 196609u, 1745027330u, 1745027458u,
				1677919234u, 1677919362u, 1677919490u, 1677919618u, 1677919746u, 1677919874u, 2684551426u, 2684551554u, 2684551426u, 2684551554u,
				2684551426u, 2684551554u, 2684551426u, 2684551554u, 2684551426u, 2684551554u, 2684551426u, 2684551554u, 2684551426u, 2684551554u,
				2684551426u, 2684551554u, 196608u, 1946354946u, 1946355330u, 196608u, 196608u, 1946354946u, 1946355330u, 196608u,
				1879245058u, 1879245186u, 196608u, 1946354946u, 1946355330u, 196608u, 1879245058u, 1879245186u, 196608u, 196609u,
				196609u, 1610809858u, 1610809986u, 1610810114u, 196608u, 196609u, 196608u, 196609u, 196609u, 197122u,
				197250u, 197378u, 196608u, 196609u, 196609u, 197122u, 197250u, 197378u, 196608u, 196609u,
				196609u, 197122u, 197250u, 197378u, 196608u, 196609u, 196609u, 197122u, 197250u, 197378u,
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				131073u, 196608u, 131096u, 196609u, 131073u, 196609u, 131073u, 196608u, 131096u, 196608u,
				131096u, 196608u, 131096u, 196609u, 131073u, 196609u, 131073u, 196609u, 131073u, 196609u,
				131073u, 196609u, 131073u, 65568u, 196672u, 131168u, 65568u, 196672u, 131168u, 65568u,
				196672u, 131168u, 196608u, 131096u, 196609u, 1677919746u, 1677919874u, 196609u, 1677919746u, 1677919874u,
				196609u, 196609u, 1677919234u, 1677919362u, 1677919490u, 1677919618u, 1677919746u, 1677919874u, 196609u, 196609u,
				1677919234u, 1677919362u, 1677919490u, 196609u, 196609u, 1677919618u, 1677919746u, 1677919874u, 196609u, 196608u,
				196609u, 196609u, 1677919234u, 1677919362u, 1946354946u, 196608u, 196609u, 196609u, 1677919618u, 1677919746u,
				1946355330u, 196608u, 196609u, 1879245058u, 196608u, 196609u, 1879245186u, 196608u, 196609u, 196609u,
				196608u, 196609u, 196609u, 196608u, 196609u, 196609u, 196608u, 196608u, 196609u, 196609u,
				1610809858u, 1610809986u, 1610810114u, 196608u, 131096u, 196609u, 131073u, 196610u, 131074u, 196608u,
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				131458u, 196608u, 131096u, 196609u, 131073u, 196866u, 131330u, 196609u, 1610809858u, 1610809858u,
				1610809858u, 1610809858u, 196609u, 1610809858u, 1610809858u, 1610809858u, 1610809858u, 1610809986u, 1610809986u, 1610809986u,
				1610809986u, 196609u, 196609u, 1610809730u, 1610809858u, 1879245442u, 604177410u, 604177538u, 604177666u, 604177794u,
				604177922u, 604178050u, 604177410u, 604177538u, 604177666u, 604177794u, 604177922u, 604178050u, 196608u, 131096u,
				196609u, 131073u, 196610u, 131074u, 196608u, 196609u, 196866u, 196608u, 131096u, 196609u,
				131073u, 196866u, 131458u, 1677919362u, 1677919490u, 1677919746u, 1677919874u, 1677919234u, 1677919362u, 1677919490u,
				1677919618u, 1677919746u, 1677919874u, 1677919234u, 1677919362u, 1946354946u, 1677919618u, 1677919746u, 1946355330u, 1879245058u,
				1879245186u, 196609u, 196609u, 196609u, 196609u, 196609u, 196609u, 196609u, 196609u, 196609u,
				1610809858u, 1610809858u, 1610809858u, 1610809858u, 196609u, 1610809858u, 1610809858u, 1610809858u, 1610809858u, 1610809986u,
				1610809986u, 1610809986u, 1610809986u, 537068034u, 537068162u, 537068290u, 537068034u, 537068162u, 537068290u, 537068034u,
				537068162u, 537068290u, 537068034u, 537068162u, 537068290u, 196608u, 196609u, 196609u, 196608u, 196609u,
				196608u, 196609u, 196609u, 1610809858u, 1610809986u, 1610810114u, 1677919362u, 1677919490u, 1677919746u, 1677919874u,
				196608u, 196609u, 196609u, 197122u, 197250u, 197378u, 196609u, 196609u, 196609u, 196609u,
				196609u, 196609u, 196609u, 196609u, 196609u, 196609u, 196609u, 196609u, 196609u, 196609u,
				196609u, 1677919234u, 1677919362u, 1946354946u, 1677919618u, 1677919746u, 1946355330u, 1879245058u, 1879245186u, 1677919234u,
				1677919362u, 1946354946u, 1677919618u, 1677919746u, 1946355330u, 1879245058u, 1879245186u, 1677919234u, 1677919362u, 1946354946u,
				1677919618u, 1677919746u, 1946355330u, 1879245058u, 1879245186u, 196609u, 196609u, 196609u, 196609u, 196609u,
				196609u, 196609u, 196609u, 196609u, 196609u, 196609u, 196609u, 196609u, 196609u, 196609u,
				196609u, 196608u, 131096u, 196609u, 131073u, 196608u, 131096u, 196609u, 131073u, 196608u,
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				537067906u, 196609u, 196609u, 196609u, 196609u, 196609u, 196609u, 196609u, 196609u, 196609u,
				196609u, 196609u, 196609u, 196609u, 196609u, 196609u, 196609u, 196609u, 196609u, 196609u,
				196609u, 196609u, 196609u, 196609u, 196609u, 1610809858u, 1610809986u, 1610810114u, 1677919234u, 1677919362u,
				1677919490u, 1677919618u, 1677919746u, 1677919874u, 1610809858u, 1610809986u, 1610810114u, 1677919234u, 1677919362u, 1677919490u,
				1677919618u, 1677919746u, 1677919874u, 196609u, 196609u, 196609u, 196609u, 196609u, 196609u, 196609u,
				196609u, 196609u, 196609u, 196609u, 196609u, 196609u, 196609u, 196609u, 196609u, 196609u,
				196609u, 196609u, 196609u, 196609u, 196609u, 196609u, 196609u, 196608u, 196608u, 196609u,
				196609u, 1677919618u, 1677919746u, 1677919874u, 196608u, 196609u, 196609u, 1677919618u, 1677919746u, 1677919874u,
				196608u, 196609u, 196609u, 131073u, 196611u, 196611u, 196611u, 196611u, 196611u, 196611u,
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				196611u, 196611u, 196611u, 196611u, 196611u, 131075u, 196611u, 131075u, 196611u, 131075u,
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				65536u, 65536u, 65536u, 65536u, 65536u, 65536u, 65536u, 65536u, 65536u, 65536u,
				65536u, 65536u, 65536u, 65536u, 65536u, 65536u, 65536u, 65536u, 65536u, 65536u,
				65536u, 65536u, 65536u, 65536u, 65536u, 65536u, 65536u, 65536u, 65536u, 196608u,
				131072u, 131072u, 131072u, 196608u, 196608u, 196608u, 196608u, 196608u, 196608u, 196608u,
				196608u, 196608u, 196608u, 196608u, 196609u, 196609u, 196609u, 196608u, 131072u, 131072u,
				131072u, 131072u, 131072u, 196608u, 196609u, 196609u, 196609u, 196609u, 196609u, 196609u,
				196609u, 196609u, 65568u, 196672u, 131168u, 65568u, 196672u, 131168u, 131080u, 131088u,
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				1677920386u, 1812138242u, 1677919234u, 1677919362u, 1812137218u, 1677919618u, 1677919746u, 1812137602u, 1745027458u, 1879244930u,
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				1677919362u, 1812137218u, 1745027330u, 1745027330u, 1677920258u, 1677920386u, 1812138242u, 1677920258u, 1677920386u, 1812138242u,
				1677920258u, 1677920386u, 1812138242u, 1677920258u, 1677920386u, 1812138242u, 1677920258u, 1677920386u, 1812138242u, 1677920258u,
				1677920386u, 1812138242u, 1677920258u, 1677920386u, 1812138242u, 1677920258u, 1677920386u, 1812138242u, 1677920258u, 1677920386u,
				1812138242u, 1677920258u, 1677920386u, 1812138242u, 1677920258u, 1677920386u, 1812138242u, 1677920258u, 1677920386u, 1812138242u,
				1745027202u, 1745027202u, 1745027202u, 1745027202u, 1745027202u, 1745027202u, 1677920258u, 1677920386u, 1812138242u, 1677920258u,
				1677920386u, 1812138242u, 1677920258u, 1677920386u, 1812138242u, 1677920258u, 1677920386u, 1812138242u, 1677920258u, 1677920386u,
				1812138242u, 1677920258u, 1677920386u, 1812138242u, 1745027202u, 1745027202u, 1745027202u, 1745027202u, 1745027202u, 1745027202u,
				604178434u, 604178562u, 604178690u, 537067650u, 1677920258u, 1677920386u, 1946355970u, 1879244930u, 1677920258u, 1677920386u,
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				1610809474u, 537067650u, 1610809346u, 1610809346u, 196738u, 131202u, 196738u, 131202u, 1677920258u, 1677920386u,
				1812138242u, 1745027202u, 1677920258u, 1677920386u, 1677920514u, 1610809474u, 1677920258u, 1677920386u, 1946355970u, 1879244930u,
				1677920258u, 1677920386u, 1946355970u, 1879244930u, 1677920258u, 1677920386u, 1677920514u, 1610809474u, 1677920258u, 1677920386u,
				1812138242u, 1745027202u, 1677920258u, 1677920386u, 1812138242u, 1745027202u, 1677920258u, 1677920386u, 1812138242u, 1745027202u,
				268632194u, 196608u, 196608u, 151553u, 151553u, 131073u, 131073u, 131073u, 131073u, 131073u,
				131073u, 131073u, 131073u, 131073u, 131073u, 131073u, 131073u, 131073u, 131073u, 131073u,
				131073u, 131073u, 151553u, 151553u, 131073u, 131073u, 131073u, 131073u, 131073u, 131073u,
				131073u, 131073u, 131073u, 131073u, 131073u, 131073u, 131073u, 131073u, 131073u, 131073u,
				131073u, 131073u, 131073u, 131073u, 131073u, 131073u, 131073u, 131073u, 131073u, 131073u,
				131073u, 131077u, 131077u, 131077u, 131077u, 131077u, 131077u, 131077u, 131077u, 537001989u,
				537001989u, 537001989u, 537001989u, 537001989u, 537001989u, 537001989u, 537001989u, 939655173u, 939655173u, 939655173u,
				939655173u, 805437445u, 939655173u, 939655173u, 939655173u, 537001989u, 537001989u, 537001989u, 537001989u, 537001989u,
				537001989u, 537001989u, 537001989u, 537001989u, 537001989u, 537001989u, 131077u, 131077u, 805437445u, 805437445u,
				537001989u, 537001989u, 537001989u, 537001989u, 537001989u, 537001989u, 537001989u, 537001989u, 537001989u, 537001989u,
				537001989u, 537001989u, 537001989u, 537001989u, 537001989u, 537001989u, 537001989u, 537001989u, 537001989u, 537001989u,
				537001989u, 537001989u, 805437445u, 805437445u, 537001989u, 537001989u, 537001989u, 939655173u, 939655173u, 939655173u,
				939655173u, 939655173u, 939655173u, 805437445u, 805437445u, 805437445u, 805437445u, 805437445u, 939655173u, 805437445u,
				805437445u, 939655173u, 939655173u, 537001989u, 537001989u, 537001989u, 537001989u, 537001989u, 537001989u, 537001989u,
				537001989u, 537001989u, 537001989u, 537001989u, 537001989u, 939655173u, 939655173u, 939655173u, 939655173u, 939655173u,
				537001989u, 939655173u, 939655173u, 537001989u, 537001989u, 939655173u, 939655173u, 939655173u, 939655173u, 537001989u,
				939655173u, 537001989u, 537001989u, 2684485637u, 2684485637u, 2684485637u, 2684485637u, 939655173u, 939655173u, 939655173u,
				939655173u, 939655173u, 939655173u, 939655173u, 939655173u, 939655173u, 939655173u, 2684485637u, 2684485637u, 2684485637u,
				2684485637u, 939655173u, 939655173u, 939655173u, 939655173u, 939655173u, 939655173u, 939655173u, 939655173u, 939655173u,
				3087138821u, 3087138821u, 537001989u, 537001989u, 939655173u, 939655173u, 939655173u, 939655173u, 939655173u, 939655173u,
				939655173u, 939655173u, 3087138821u, 2684485637u, 2684485637u, 2684485637u, 2684485637u, 2684485637u, 2684485637u, 2684485637u,
				2684485637u, 805437445u, 805437445u, 805437445u, 805437445u, 3087138821u, 2684485637u, 939655173u, 939655173u, 939655173u,
				537001989u, 537001989u, 537001989u, 537001989u, 537001989u, 537001989u, 537001989u, 537001989u, 939655173u, 939655173u,
				939655173u, 537001989u, 537001989u, 537001989u, 537001989u, 537001989u, 537001989u, 537001989u, 537001989u, 939655173u,
				939655173u, 939655173u, 537001989u, 537001989u, 537001989u, 537001989u, 805437445u, 805437445u, 939655173u, 939655173u,
				939655173u, 939655173u, 939655173u, 939655173u, 939655173u, 939655173u, 939655173u, 939655173u, 65568u, 196672u,
				131168u, 65568u, 196672u, 131168u, 65568u, 196672u, 131168u, 65568u, 196672u, 131168u,
				65568u, 196672u, 131168u, 196608u, 196608u, 131072u, 131072u, 131072u, 196608u, 196608u,
				196608u, 131096u, 196608u, 131096u, 196608u, 131096u, 196608u, 131096u, 196609u, 196609u,
				196609u, 196609u, 196609u, 196609u, 196609u, 196609u, 196609u, 196609u, 196609u, 196609u,
				131073u, 196609u, 196609u, 196609u, 196609u, 196609u, 196609u, 196609u, 196609u, 196609u,
				196609u, 196609u, 196609u, 196609u, 196609u, 196609u, 196609u, 196609u, 196609u, 131073u,
				131073u, 131073u, 131073u, 131073u, 131073u, 131073u, 131073u, 131073u, 131073u, 131073u,
				131073u, 131073u, 131073u, 131073u, 131073u, 131073u, 131073u, 131073u, 131073u, 131073u,
				131073u, 131073u, 131073u, 131073u, 131073u, 131073u, 131073u, 131073u, 131073u, 131073u,
				131073u
			};
		}
	}
	internal delegate bool TryConvertToDisp8N(Encoder encoder, OpCodeHandler handler, in Instruction instruction, int displ, out sbyte compressedValue);
	internal abstract class OpCodeHandler
	{
		internal readonly uint OpCode;

		internal readonly bool Is2ByteOpCode;

		internal readonly int GroupIndex;

		internal readonly int RmGroupIndex;

		internal readonly bool IsSpecialInstr;

		internal readonly EncFlags3 EncFlags3;

		internal readonly CodeSize OpSize;

		internal readonly CodeSize AddrSize;

		internal readonly TryConvertToDisp8N TryConvertToDisp8N;

		internal readonly Op[] Operands;

		protected OpCodeHandler(EncFlags2 encFlags2, EncFlags3 encFlags3, bool isSpecialInstr, TryConvertToDisp8N tryConvertToDisp8N, Op[] operands)
		{
			EncFlags3 = encFlags3;
			OpCode = GetOpCode(encFlags2);
			Is2ByteOpCode = (encFlags2 & EncFlags2.OpCodeIs2Bytes) != 0;
			GroupIndex = ((((uint)encFlags2 & 0x80000000u) == 0) ? (-1) : ((int)(((uint)encFlags2 >> 27) & 7)));
			RmGroupIndex = (((encFlags3 & EncFlags3.HasRmGroupIndex) == 0) ? (-1) : ((int)(((uint)encFlags2 >> 27) & 7)));
			IsSpecialInstr = isSpecialInstr;
			OpSize = (CodeSize)((int)((uint)encFlags3 >> 3) & 3);
			AddrSize = (CodeSize)((int)((uint)encFlags3 >> 5) & 3);
			TryConvertToDisp8N = tryConvertToDisp8N;
			Operands = operands;
		}

		protected static uint GetOpCode(EncFlags2 encFlags2)
		{
			return (ushort)encFlags2;
		}

		public abstract void Encode(Encoder encoder, in Instruction instruction);
	}
	internal sealed class InvalidHandler : OpCodeHandler
	{
		internal const string ERROR_MESSAGE = "Can't encode an invalid instruction";

		public InvalidHandler()
			: base(EncFlags2.None, EncFlags3.Bit16or32 | EncFlags3.Bit64, isSpecialInstr: false, null, Array2.Empty<Op>())
		{
		}

		public override void Encode(Encoder encoder, in Instruction instruction)
		{
			encoder.ErrorMessage = "Can't encode an invalid instruction";
		}
	}
	internal sealed class DeclareDataHandler : OpCodeHandler
	{
		private readonly int elemLength;

		private readonly int maxLength;

		public DeclareDataHandler(Code code)
			: base(EncFlags2.None, EncFlags3.Bit16or32 | EncFlags3.Bit64, isSpecialInstr: true, null, Array2.Empty<Op>())
		{
			elemLength = code switch
			{
				Code.DeclareByte => 1, 
				Code.DeclareWord => 2, 
				Code.DeclareDword => 4, 
				Code.DeclareQword => 8, 
				_ => throw new InvalidOperationException(), 
			};
			maxLength = 16 / elemLength;
		}

		public override void Encode(Encoder encoder, in Instruction instruction)
		{
			int declareDataCount = instruction.DeclareDataCount;
			if (declareDataCount < 1 || declareDataCount > maxLength)
			{
				encoder.ErrorMessage = $"Invalid db/dw/dd/dq data count. Count = {declareDataCount}, max count = {maxLength}";
				return;
			}
			int num = declareDataCount * elemLength;
			for (int i = 0; i < num; i++)
			{
				encoder.WriteByteInternal(instruction.GetDeclareByteValue(i));
			}
		}
	}
	internal sealed class ZeroBytesHandler : OpCodeHandler
	{
		public ZeroBytesHandler(Code code)
			: base(EncFlags2.None, EncFlags3.Bit16or32 | EncFlags3.Bit64, isSpecialInstr: true, null, Array2.Empty<Op>())
		{
		}

		public override void Encode(Encoder encoder, in Instruction instruction)
		{
		}
	}
	internal sealed class LegacyHandler : OpCodeHandler
	{
		private readonly uint tableByte1;

		private readonly uint tableByte2;

		private readonly uint mandatoryPrefix;

		private static Op[] CreateOps(EncFlags1 encFlags1)
		{
			int num = (int)(encFlags1 & EncFlags1.Legacy_OpMask);
			int num2 = (int)(((uint)encFlags1 >> 7) & 0x7F);
			int num3 = (int)(((uint)encFlags1 >> 14) & 0x7F);
			int num4 = (int)(((uint)encFlags1 >> 21) & 0x7F);
			if (num4 != 0)
			{
				return new Op[4]
				{
					OpHandlerData.LegacyOps[num - 1],
					OpHandlerData.LegacyOps[num2 - 1],
					OpHandlerData.LegacyOps[num3 - 1],
					OpHandlerData.LegacyOps[num4 - 1]
				};
			}
			if (num3 != 0)
			{
				return new Op[3]
				{
					OpHandlerData.LegacyOps[num - 1],
					OpHandlerData.LegacyOps[num2 - 1],
					OpHandlerData.LegacyOps[num3 - 1]
				};
			}
			if (num2 != 0)
			{
				return new Op[2]
				{
					OpHandlerData.LegacyOps[num - 1],
					OpHandlerData.LegacyOps[num2 - 1]
				};
			}
			if (num != 0)
			{
				return new Op[1] { OpHandlerData.LegacyOps[num - 1] };
			}
			return Array2.Empty<Op>();
		}

		public LegacyHandler(EncFlags1 encFlags1, EncFlags2 encFlags2, EncFlags3 encFlags3)
			: base(encFlags2, encFlags3, isSpecialInstr: false, null, CreateOps(encFlags1))
		{
			switch ((LegacyOpCodeTable)(((uint)encFlags2 >> 17) & 7))
			{
			case LegacyOpCodeTable.MAP0:
				tableByte1 = 0u;
				tableByte2 = 0u;
				break;
			case LegacyOpCodeTable.MAP0F:
				tableByte1 = 15u;
				tableByte2 = 0u;
				break;
			case LegacyOpCodeTable.MAP0F38:
				tableByte1 = 15u;
				tableByte2 = 56u;
				break;
			case LegacyOpCodeTable.MAP0F3A:
				tableByte1 = 15u;
				tableByte2 = 58u;
				break;
			default:
				throw new InvalidOperationException();
			}
			mandatoryPrefix = (MandatoryPrefixByte)(((uint)encFlags2 >> 20) & 3) switch
			{
				MandatoryPrefixByte.None => 0u, 
				MandatoryPrefixByte.P66 => 102u, 
				MandatoryPrefixByte.PF3 => 243u, 
				MandatoryPrefixByte.PF2 => 242u, 
				_ => throw new InvalidOperationException(), 
			};
		}

		public override void Encode(Encoder encoder, in Instruction instruction)
		{
			uint num = mandatoryPrefix;
			encoder.WritePrefixes(in instruction, num != 243);
			if (num != 0)
			{
				encoder.WriteByteInternal(num);
			}
			num = (uint)encoder.EncoderFlags;
			num &= 0x4Fu;
			if (num != 0)
			{
				if ((encoder.EncoderFlags & EncoderFlags.HighLegacy8BitRegs) != 0)
				{
					encoder.ErrorMessage = "Registers AH, CH, DH, BH can't be used if there's a REX prefix. Use AL, CL, DL, BL, SPL, BPL, SIL, DIL, R8L-R15L instead.";
				}
				num |= 0x40u;
				encoder.WriteByteInternal(num);
			}
			if ((num = tableByte1) != 0)
			{
				encoder.WriteByteInternal(num);
				if ((num = tableByte2) != 0)
				{
					encoder.WriteByteInternal(num);
				}
			}
		}
	}
	internal sealed class VexHandler : OpCodeHandler
	{
		private readonly uint table;

		private readonly uint lastByte;

		private readonly uint mask_W_L;

		private readonly uint mask_L;

		private readonly uint W1;

		private static Op[] CreateOps(EncFlags1 encFlags1)
		{
			int num = (int)(encFlags1 & EncFlags1.VEX_OpMask);
			int num2 = (int)(((uint)encFlags1 >> 6) & 0x3F);
			int num3 = (int)(((uint)encFlags1 >> 12) & 0x3F);
			int num4 = (int)(((uint)encFlags1 >> 18) & 0x3F);
			int num5 = (int)(((uint)encFlags1 >> 24) & 0x3F);
			if (num5 != 0)
			{
				return new Op[5]
				{
					OpHandlerData.VexOps[num - 1],
					OpHandlerData.VexOps[num2 - 1],
					OpHandlerData.VexOps[num3 - 1],
					OpHandlerData.VexOps[num4 - 1],
					OpHandlerData.VexOps[num5 - 1]
				};
			}
			if (num4 != 0)
			{
				return new Op[4]
				{
					OpHandlerData.VexOps[num - 1],
					OpHandlerData.VexOps[num2 - 1],
					OpHandlerData.VexOps[num3 - 1],
					OpHandlerData.VexOps[num4 - 1]
				};
			}
			if (num3 != 0)
			{
				return new Op[3]
				{
					OpHandlerData.VexOps[num - 1],
					OpHandlerData.VexOps[num2 - 1],
					OpHandlerData.VexOps[num3 - 1]
				};
			}
			if (num2 != 0)
			{
				return new Op[2]
				{
					OpHandlerData.VexOps[num - 1],
					OpHandlerData.VexOps[num2 - 1]
				};
			}
			if (num != 0)
			{
				return new Op[1] { OpHandlerData.VexOps[num - 1] };
			}
			return Array2.Empty<Op>();
		}

		public VexHandler(EncFlags1 encFlags1, EncFlags2 encFlags2, EncFlags3 encFlags3)
			: base(encFlags2, encFlags3, isSpecialInstr: false, null, CreateOps(encFlags1))
		{
			table = ((uint)encFlags2 >> 17) & 7u;
			WBit wBit = (WBit)(((uint)encFlags2 >> 22) & 3u);
			W1 = ((wBit == WBit.W1) ? uint.MaxValue : 0u);
			LBit lBit = (LBit)(((uint)encFlags2 >> 24) & 7u);
			if (lBit == LBit.L1 || lBit == LBit.L256)
			{
				lastByte = 4u;
			}
			if (W1 != 0)
			{
				lastByte |= 128u;
			}
			lastByte |= ((uint)encFlags2 >> 20) & 3;
			if (wBit == WBit.WIG)
			{
				mask_W_L |= 128u;
			}
			if (lBit == LBit.LIG)
			{
				mask_W_L |= 4u;
				mask_L |= 4u;
			}
		}

		public override void Encode(Encoder encoder, in Instruction instruction)
		{
			encoder.WritePrefixes(in instruction);
			uint encoderFlags = (uint)encoder.EncoderFlags;
			uint num = lastByte;
			num |= (~encoderFlags >> 24) & 0x78u;
			if ((encoder.Internal_PreventVEX2 | W1 | (table - 1) | (encoderFlags & 0xBu)) != 0)
			{
				encoder.WriteByteInternal(196u);
				uint num2 = table;
				num2 |= (~encoderFlags & 7) << 5;
				encoder.WriteByteInternal(num2);
				num |= mask_W_L & encoder.Internal_VEX_WIG_LIG;
				encoder.WriteByteInternal(num);
			}
			else
			{
				encoder.WriteByteInternal(197u);
				num |= (~encoderFlags & 4) << 5;
				num |= mask_L & encoder.Internal_VEX_LIG;
				encoder.WriteByteInternal(num);
			}
		}
	}
	internal sealed class XopHandler : OpCodeHandler
	{
		private readonly uint table;

		private readonly uint lastByte;

		private static Op[] CreateOps(EncFlags1 encFlags1)
		{
			int num = (int)(encFlags1 & EncFlags1.XOP_OpMask);
			int num2 = (int)(((uint)encFlags1 >> 5) & 0x1F);
			int num3 = (int)(((uint)encFlags1 >> 10) & 0x1F);
			int num4 = (int)(((uint)encFlags1 >> 15) & 0x1F);
			if (num4 != 0)
			{
				return new Op[4]
				{
					OpHandlerData.XopOps[num - 1],
					OpHandlerData.XopOps[num2 - 1],
					OpHandlerData.XopOps[num3 - 1],
					OpHandlerData.XopOps[num4 - 1]
				};
			}
			if (num3 != 0)
			{
				return new Op[3]
				{
					OpHandlerData.XopOps[num - 1],
					OpHandlerData.XopOps[num2 - 1],
					OpHandlerData.XopOps[num3 - 1]
				};
			}
			if (num2 != 0)
			{
				return new Op[2]
				{
					OpHandlerData.XopOps[num - 1],
					OpHandlerData.XopOps[num2 - 1]
				};
			}
			if (num != 0)
			{
				return new Op[1] { OpHandlerData.XopOps[num - 1] };
			}
			return Array2.Empty<Op>();
		}

		public XopHandler(EncFlags1 encFlags1, EncFlags2 encFlags2, EncFlags3 encFlags3)
			: base(encFlags2, encFlags3, isSpecialInstr: false, null, CreateOps(encFlags1))
		{
			table = 8 + (((uint)encFlags2 >> 17) & 7);
			LBit lBit = (LBit)(((uint)encFlags2 >> 24) & 7u);
			if (lBit == LBit.L1 || lBit == LBit.L256)
			{
				lastByte = 4u;
			}
			if ((((uint)encFlags2 >> 22) & 3) == 1)
			{
				lastByte |= 128u;
			}
			lastByte |= ((uint)encFlags2 >> 20) & 3;
		}

		public override void Encode(Encoder encoder, in Instruction instruction)
		{
			encoder.WritePrefixes(in instruction);
			encoder.WriteByteInternal(143u);
			uint encoderFlags = (uint)encoder.EncoderFlags;
			uint num = table;
			num |= (~encoderFlags & 7) << 5;
			encoder.WriteByteInternal(num);
			num = lastByte;
			num |= (~encoderFlags >> 24) & 0x78u;
			encoder.WriteByteInternal(num);
		}
	}
	internal sealed class EvexHandler : OpCodeHandler
	{
		private sealed class TryConvertToDisp8NImpl
		{
			public static bool TryConvertToDisp8N(Encoder encoder, OpCodeHandler handler, in Instruction instruction, int displ, out sbyte compressedValue)
			{
				int disp8N = (int)TupleTypeTable.GetDisp8N(((EvexHandler)handler).tupleType, (encoder.EncoderFlags & EncoderFlags.Broadcast) != 0);
				int num = displ / disp8N;
				if (num * disp8N == displ && -128 <= num && num <= 127)
				{
					compressedValue = (sbyte)num;
					return true;
				}
				compressedValue = 0;
				return false;
			}
		}

		private readonly WBit wbit;

		private readonly TupleType tupleType;

		private readonly uint table;

		private readonly uint p1Bits;

		private readonly uint llBits;

		private readonly uint mask_W;

		private readonly uint mask_LL;

		private static readonly TryConvertToDisp8N tryConvertToDisp8N = TryConvertToDisp8NImpl.TryConvertToDisp8N;

		private static Op[] CreateOps(EncFlags1 encFlags1)
		{
			int num = (int)(encFlags1 & EncFlags1.XOP_OpMask);
			int num2 = (int)(((uint)encFlags1 >> 5) & 0x1F);
			int num3 = (int)(((uint)encFlags1 >> 10) & 0x1F);
			int num4 = (int)(((uint)encFlags1 >> 15) & 0x1F);
			if (num4 != 0)
			{
				return new Op[4]
				{
					OpHandlerData.EvexOps[num - 1],
					OpHandlerData.EvexOps[num2 - 1],
					OpHandlerData.EvexOps[num3 - 1],
					OpHandlerData.EvexOps[num4 - 1]
				};
			}
			if (num3 != 0)
			{
				return new Op[3]
				{
					OpHandlerData.EvexOps[num - 1],
					OpHandlerData.EvexOps[num2 - 1],
					OpHandlerData.EvexOps[num3 - 1]
				};
			}
			if (num2 != 0)
			{
				return new Op[2]
				{
					OpHandlerData.EvexOps[num - 1],
					OpHandlerData.EvexOps[num2 - 1]
				};
			}
			if (num != 0)
			{
				return new Op[1] { OpHandlerData.EvexOps[num - 1] };
			}
			return Array2.Empty<Op>();
		}

		public EvexHandler(EncFlags1 encFlags1, EncFlags2 encFlags2, EncFlags3 encFlags3)
			: base(encFlags2, encFlags3, isSpecialInstr: false, tryConvertToDisp8N, CreateOps(encFlags1))
		{
			tupleType = (TupleType)((int)((uint)encFlags3 >> 7) & 0x1F);
			table = ((uint)encFlags2 >> 17) & 7u;
			p1Bits = 4u | (((uint)encFlags2 >> 20) & 3u);
			wbit = (WBit)(((uint)encFlags2 >> 22) & 3u);
			if (wbit == WBit.W1)
			{
				p1Bits |= 128u;
			}
			switch ((LBit)(((uint)encFlags2 >> 24) & 7))
			{
			case LBit.LIG:
				llBits = 0u;
				mask_LL = 96u;
				break;
			case LBit.L0:
			case LBit.LZ:
			case LBit.L128:
				llBits = 0u;
				break;
			case LBit.L1:
			case LBit.L256:
				llBits = 32u;
				break;
			case LBit.L512:
				llBits = 64u;
				break;
			default:
				throw new InvalidOperationException();
			}
			if (wbit == WBit.WIG)
			{
				mask_W |= 128u;
			}
		}

		public override void Encode(Encoder encoder, in Instruction instruction)
		{
			encoder.WritePrefixes(in instruction);
			uint encoderFlags = (uint)encoder.EncoderFlags;
			encoder.WriteByteInternal(98u);
			uint num = table;
			num |= (encoderFlags & 7) << 5;
			num |= (encoderFlags >> 5) & 0x10u;
			num ^= 0xFFFFFFF0u;
			encoder.WriteByteInternal(num);
			num = p1Bits;
			num |= (~encoderFlags >> 24) & 0x78u;
			num |= mask_W & encoder.Internal_EVEX_WIG;
			encoder.WriteByteInternal(num);
			num = instruction.InternalOpMask;
			if (num != 0)
			{
				if ((EncFlags3 & EncFlags3.OpMaskRegister) == 0)
				{
					encoder.ErrorMessage = "The instruction doesn't support opmask registers";
				}
			}
			else if ((EncFlags3 & EncFlags3.RequireOpMaskRegister) != 0)
			{
				encoder.ErrorMessage = "The instruction must use an opmask register";
			}
			num |= (encoderFlags >> 28) & 8u;
			if (instruction.SuppressAllExceptions)
			{
				if ((EncFlags3 & EncFlags3.SuppressAllExceptions) == 0)
				{
					encoder.ErrorMessage = "The instruction doesn't support suppress-all-exceptions";
				}
				num |= 0x10u;
			}
			RoundingControl roundingControl = instruction.RoundingControl;
			if (roundingControl != 0)
			{
				if ((EncFlags3 & EncFlags3.RoundingControl) == 0)
				{
					encoder.ErrorMessage = "The instruction doesn't support rounding control";
				}
				num |= 0x10u;
				num |= (uint)((int)(roundingControl - 1) << 5);
			}
			else if ((EncFlags3 & EncFlags3.SuppressAllExceptions) == 0 || !instruction.SuppressAllExceptions)
			{
				num |= llBits;
			}
			if ((encoderFlags & 0x400u) != 0)
			{
				num |= 0x10u;
			}
			else if (instruction.IsBroadcast)
			{
				encoder.ErrorMessage = "The instruction doesn't support broadcasting";
			}
			if (instruction.ZeroingMasking)
			{
				if ((EncFlags3 & EncFlags3.ZeroingMasking) == 0)
				{
					encoder.ErrorMessage = "The instruction doesn't support zeroing masking";
				}
				num |= 0x80u;
			}
			num ^= 8u;
			num |= mask_LL & encoder.Internal_EVEX_LIG;
			encoder.WriteByteInternal(num);
		}
	}
	internal sealed class MvexHandler : OpCodeHandler
	{
		private sealed class TryConvertToDisp8NImpl
		{
			public static bool TryConvertToDisp8N(Encoder encoder, OpCodeHandler handler, in Instruction instruction, int displ, out sbyte compressedValue)
			{
				MvexInfo mvexInfo = new MvexInfo(instruction.Code);
				int num = (int)((instruction.MvexRegMemConv - 9) & MvexRegMemConv.RegSwizzleCccc);
				int disp8N = (int)TupleTypeTable.GetDisp8N((TupleType)MvexTupleTypeLut.Data[(int)mvexInfo.TupleTypeLutKind * 8 + num], bcst: false);
				int num2 = displ / disp8N;
				if (num2 * disp8N == displ && -128 <= num2 && num2 <= 127)
				{
					compressedValue = (sbyte)num2;
					return true;
				}
				compressedValue = 0;
				return false;
			}
		}

		private readonly WBit wbit;

		private readonly uint table;

		private readonly uint p1Bits;

		private readonly uint mask_W;

		private static readonly TryConvertToDisp8N tryConvertToDisp8N = TryConvertToDisp8NImpl.TryConvertToDisp8N;

		private static Op[] CreateOps(EncFlags1 encFlags1)
		{
			int num = (int)(encFlags1 & EncFlags1.XOP_Op3Shift);
			int num2 = (int)(((uint)encFlags1 >> 4) & 0xF);
			int num3 = (int)(((uint)encFlags1 >> 8) & 0xF);
			int num4 = (int)(((uint)encFlags1 >> 12) & 0xF);
			if (num4 != 0)
			{
				return new Op[4]
				{
					OpHandlerData.MvexOps[num - 1],
					OpHandlerData.MvexOps[num2 - 1],
					OpHandlerData.MvexOps[num3 - 1],
					OpHandlerData.MvexOps[num4 - 1]
				};
			}
			if (num3 != 0)
			{
				return new Op[3]
				{
					OpHandlerData.MvexOps[num - 1],
					OpHandlerData.MvexOps[num2 - 1],
					OpHandlerData.MvexOps[num3 - 1]
				};
			}
			if (num2 != 0)
			{
				return new Op[2]
				{
					OpHandlerData.MvexOps[num - 1],
					OpHandlerData.MvexOps[num2 - 1]
				};
			}
			if (num != 0)
			{
				return new Op[1] { OpHandlerData.MvexOps[num - 1] };
			}
			return Array2.Empty<Op>();
		}

		public MvexHandler(EncFlags1 encFlags1, EncFlags2 encFlags2, EncFlags3 encFlags3)
			: base(encFlags2, encFlags3, isSpecialInstr: false, tryConvertToDisp8N, CreateOps(encFlags1))
		{
			table = ((uint)encFlags2 >> 17) & 7u;
			p1Bits = ((uint)encFlags2 >> 20) & 3u;
			wbit = (WBit)(((uint)encFlags2 >> 22) & 3u);
			if (wbit == WBit.W1)
			{
				p1Bits |= 128u;
			}
			if (wbit == WBit.WIG)
			{
				mask_W |= 128u;
			}
		}

		public override void Encode(Encoder encoder, in Instruction instruction)
		{
			encoder.WritePrefixes(in instruction);
			uint encoderFlags = (uint)encoder.EncoderFlags;
			encoder.WriteByteInternal(98u);
			uint num = table;
			num |= (encoderFlags & 7) << 5;
			num |= (encoderFlags >> 5) & 0x10u;
			num ^= 0xFFFFFFF0u;
			encoder.WriteByteInternal(num);
			num = p1Bits;
			num |= (~encoderFlags >> 24) & 0x78u;
			num |= mask_W & encoder.Internal_MVEX_WIG;
			encoder.WriteByteInternal(num);
			num = instruction.InternalOpMask;
			if (num != 0)
			{
				if ((EncFlags3 & EncFlags3.OpMaskRegister) == 0)
				{
					encoder.ErrorMessage = "The instruction doesn't support opmask registers";
				}
			}
			else if ((EncFlags3 & EncFlags3.RequireOpMaskRegister) != 0)
			{
				encoder.ErrorMessage = "The instruction must use an opmask register";
			}
			num |= (encoderFlags >> 28) & 8u;
			MvexInfo mvexInfo = new MvexInfo(instruction.Code);
			MvexRegMemConv mvexRegMemConv = instruction.MvexRegMemConv;
			if (instruction.Op0Kind == OpKind.Memory || instruction.Op1Kind == OpKind.Memory || instruction.Op2Kind == OpKind.Memory)
			{
				if (mvexRegMemConv >= MvexRegMemConv.MemConvNone && mvexRegMemConv <= MvexRegMemConv.MemConvSint16)
				{
					num |= (uint)((int)(mvexRegMemConv - 9) << 4);
				}
				else if (mvexRegMemConv != 0)
				{
					encoder.ErrorMessage = "Memory operands must use a valid MvexRegMemConv variant, eg. MvexRegMemConv.MemConvNone";
				}
				if (instruction.IsMvexEvictionHint)
				{
					if (mvexInfo.CanUseEvictionHint)
					{
						num |= 0x80u;
					}
					else
					{
						encoder.ErrorMessage = "This instruction doesn't support eviction hint (`{eh}`)";
					}
				}
			}
			else
			{
				if (instruction.IsMvexEvictionHint)
				{
					encoder.ErrorMessage = "Only memory operands can enable eviction hint (`{eh}`)";
				}
				switch (mvexRegMemConv)
				{
				case MvexRegMemConv.None:
				{
					num |= 0x80u;
					if (instruction.SuppressAllExceptions)
					{
						num |= 0x40u;
						if ((EncFlags3 & EncFlags3.SuppressAllExceptions) == 0)
						{
							encoder.ErrorMessage = "The instruction doesn't support suppress-all-exceptions";
						}
					}
					RoundingControl roundingControl = instruction.RoundingControl;
					if (roundingControl != 0)
					{
						if ((EncFlags3 & EncFlags3.RoundingControl) == 0)
						{
							encoder.ErrorMessage = "The instruction doesn't support rounding control";
						}
						else
						{
							num |= (uint)((int)(roundingControl - 1) << 4);
						}
					}
					break;
				}
				case MvexRegMemConv.RegSwizzleNone:
				case MvexRegMemConv.RegSwizzleCdab:
				case MvexRegMemConv.RegSwizzleBadc:
				case MvexRegMemConv.RegSwizzleDacb:
				case MvexRegMemConv.RegSwizzleAaaa:
				case MvexRegMemConv.RegSwizzleBbbb:
				case MvexRegMemConv.RegSwizzleCccc:
				case MvexRegMemConv.RegSwizzleDddd:
					if (instruction.SuppressAllExceptions)
					{
						encoder.ErrorMessage = "Can't use {sae} with register swizzles";
					}
					else if (instruction.RoundingControl != 0)
					{
						encoder.ErrorMessage = "Can't use rounding control with register swizzles";
					}
					num |= (uint)((int)((mvexRegMemConv - 1) & MvexRegMemConv.RegSwizzleCccc) << 4);
					break;
				default:
					encoder.ErrorMessage = "Register operands can't use memory up/down conversions";
					break;
				}
			}
			if (mvexInfo.EHBit == MvexEHBit.EH1)
			{
				num |= 0x80u;
			}
			num ^= 8u;
			encoder.WriteByteInternal(num);
		}
	}
	internal sealed class D3nowHandler : OpCodeHandler
	{
		private static readonly Op[] operands = new Op[2]
		{
			new OpModRM_reg(Register.MM0, Register.MM7),
			new OpModRM_rm(Register.MM0, Register.MM7)
		};

		private readonly uint immediate;

		public D3nowHandler(EncFlags2 encFlags2, EncFlags3 encFlags3)
			: base((EncFlags2)(((ulong)encFlags2 & 0xFFFFFFFFFFFF0000uL) | 0xF), encFlags3, isSpecialInstr: false, null, operands)
		{
			immediate = OpCodeHandler.GetOpCode(encFlags2);
		}

		public override void Encode(Encoder encoder, in Instruction instruction)
		{
			encoder.WritePrefixes(in instruction);
			encoder.WriteByteInternal(15u);
			encoder.ImmSize = ImmSize.Size1OpCode;
			encoder.Immediate = immediate;
		}
	}
	internal enum DisplSize
	{
		None,
		Size1,
		Size2,
		Size4,
		Size8,
		RipRelSize4_Target32,
		RipRelSize4_Target64
	}
	internal enum ImmSize
	{
		None,
		Size1,
		Size2,
		Size4,
		Size8,
		Size2_1,
		Size1_1,
		Size2_2,
		Size4_2,
		RipRelSize1_Target16,
		RipRelSize1_Target32,
		RipRelSize1_Target64,
		RipRelSize2_Target16,
		RipRelSize2_Target32,
		RipRelSize2_Target64,
		RipRelSize4_Target32,
		RipRelSize4_Target64,
		SizeIbReg,
		Size1OpCode
	}
	[Flags]
	internal enum EncoderFlags : uint
	{
		None = 0u,
		B = 1u,
		X = 2u,
		R = 4u,
		W = 8u,
		ModRM = 0x10u,
		Sib = 0x20u,
		REX = 0x40u,
		P66 = 0x80u,
		P67 = 0x100u,
		R2 = 0x200u,
		Broadcast = 0x400u,
		HighLegacy8BitRegs = 0x800u,
		Displ = 0x1000u,
		PF0 = 0x2000u,
		RegIsMemory = 0x4000u,
		MustUseSib = 0x8000u,
		VvvvvShift = 0x1Bu,
		VvvvvMask = 0x1Fu
	}
	internal enum LegacyOpCodeTable
	{
		MAP0,
		MAP0F,
		MAP0F38,
		MAP0F3A
	}
	internal enum VexOpCodeTable
	{
		MAP0,
		MAP0F,
		MAP0F38,
		MAP0F3A
	}
	internal enum XopOpCodeTable
	{
		MAP8,
		MAP9,
		MAP10
	}
	internal enum EvexOpCodeTable
	{
		MAP0F = 1,
		MAP0F38 = 2,
		MAP0F3A = 3,
		MAP5 = 5,
		MAP6 = 6
	}
	internal enum MvexOpCodeTable
	{
		MAP0F = 1,
		MAP0F38,
		MAP0F3A
	}
	[Flags]
	internal enum EncFlags1 : uint
	{
		None = 0u,
		Legacy_OpMask = 0x7Fu,
		Legacy_Op0Shift = 0u,
		Legacy_Op1Shift = 7u,
		Legacy_Op2Shift = 0xEu,
		Legacy_Op3Shift = 0x15u,
		VEX_OpMask = 0x3Fu,
		VEX_Op0Shift = 0u,
		VEX_Op1Shift = 6u,
		VEX_Op2Shift = 0xCu,
		VEX_Op3Shift = 0x12u,
		VEX_Op4Shift = 0x18u,
		XOP_OpMask = 0x1Fu,
		XOP_Op0Shift = 0u,
		XOP_Op1Shift = 5u,
		XOP_Op2Shift = 0xAu,
		XOP_Op3Shift = 0xFu,
		EVEX_OpMask = 0x1Fu,
		EVEX_Op0Shift = 0u,
		EVEX_Op1Shift = 5u,
		EVEX_Op2Shift = 0xAu,
		EVEX_Op3Shift = 0xFu,
		MVEX_OpMask = 0xFu,
		MVEX_Op0Shift = 0u,
		MVEX_Op1Shift = 4u,
		MVEX_Op2Shift = 8u,
		MVEX_Op3Shift = 0xCu,
		IgnoresRoundingControl = 0x40000000u,
		AmdLockRegBit = 0x80000000u
	}
	[Flags]
	internal enum EncFlags2 : uint
	{
		None = 0u,
		OpCodeShift = 0u,
		OpCodeIs2Bytes = 0x10000u,
		TableShift = 0x11u,
		TableMask = 7u,
		MandatoryPrefixShift = 0x14u,
		MandatoryPrefixMask = 3u,
		WBitShift = 0x16u,
		WBitMask = 3u,
		LBitShift = 0x18u,
		LBitMask = 7u,
		GroupIndexShift = 0x1Bu,
		GroupIndexMask = 7u,
		HasMandatoryPrefix = 0x40000000u,
		HasGroupIndex = 0x80000000u
	}
	[Flags]
	internal enum EncFlags3 : uint
	{
		None = 0u,
		EncodingShift = 0u,
		EncodingMask = 7u,
		OperandSizeShift = 3u,
		OperandSizeMask = 3u,
		AddressSizeShift = 5u,
		AddressSizeMask = 3u,
		TupleTypeShift = 7u,
		TupleTypeMask = 0x1Fu,
		DefaultOpSize64 = 0x1000u,
		HasRmGroupIndex = 0x2000u,
		IntelForceOpSize64 = 0x4000u,
		Fwait = 0x8000u,
		Bit16or32 = 0x10000u,
		Bit64 = 0x20000u,
		Lock = 0x40000u,
		Xacquire = 0x80000u,
		Xrelease = 0x100000u,
		Rep = 0x200000u,
		Repne = 0x400000u,
		Bnd = 0x800000u,
		HintTaken = 0x1000000u,
		Notrack = 0x2000000u,
		Broadcast = 0x4000000u,
		RoundingControl = 0x8000000u,
		SuppressAllExceptions = 0x10000000u,
		OpMaskRegister = 0x20000000u,
		ZeroingMasking = 0x40000000u,
		RequireOpMaskRegister = 0x80000000u
	}
	internal enum WBit : uint
	{
		W0,
		W1,
		WIG,
		WIG32
	}
	internal enum LBit : uint
	{
		L0,
		L1,
		LIG,
		LZ,
		L128,
		L256,
		L512
	}
	internal struct InstructionFormatter
	{
		private readonly OpCodeInfo opCode;

		private readonly StringBuilder sb;

		private readonly int r32_count;

		private readonly int r64_count;

		private readonly int bnd_count;

		private readonly int startOpIndex;

		private int r32_index;

		private int r64_index;

		private int bnd_index;

		private int k_index;

		private int vec_index;

		private int tmm_index;

		private readonly int opCount;

		private readonly bool opMaskIsK1;

		private readonly bool noVecIndex;

		private readonly bool swapVecIndex12;

		private readonly bool noGprSuffix;

		private readonly bool vecIndexSameAsOpIndex;

		private static readonly string[] ConvFnNames = new string[12]
		{
			"Sf32", "Sf64", "Si32", "Si64", "Uf32", "Uf64", "Ui32", "Ui64", "Df32", "Df64",
			"Di32", "Di64"
		};

		private int GetKIndex()
		{
			k_index++;
			if (opMaskIsK1)
			{
				if (k_index == 1)
				{
					return 2;
				}
				if (k_index == 2)
				{
					return 1;
				}
			}
			return k_index;
		}

		private int GetBndIndex()
		{
			if (bnd_count <= 1)
			{
				return 0;
			}
			bnd_index++;
			return bnd_index;
		}

		private int GetVecIndex(int opIndex)
		{
			if (noVecIndex)
			{
				return 0;
			}
			if (vecIndexSameAsOpIndex)
			{
				return opIndex + 1;
			}
			vec_index++;
			if (swapVecIndex12)
			{
				if (vec_index == 1)
				{
					return 2;
				}
				if (vec_index == 2)
				{
					return 1;
				}
			}
			return vec_index;
		}

		private int GetTmmIndex()
		{
			tmm_index++;
			return tmm_index;
		}

		public InstructionFormatter(OpCodeInfo opCode, InstrStrFmtOption fmtOption, StringBuilder sb)
		{
			this.opCode = opCode;
			this.sb = sb;
			noVecIndex = false;
			swapVecIndex12 = false;
			noGprSuffix = false;
			vecIndexSameAsOpIndex = false;
			startOpIndex = 0;
			bnd_count = 0;
			r32_count = 0;
			r64_count = 0;
			r32_index = 0;
			r64_index = 0;
			k_index = 0;
			vec_index = 0;
			tmm_index = 0;
			bnd_index = 0;
			opCount = opCode.OpCount;
			opMaskIsK1 = false;
			switch (fmtOption)
			{
			case InstrStrFmtOption.OpMaskIsK1_or_NoGprSuffix:
				opMaskIsK1 = true;
				noGprSuffix = true;
				break;
			case InstrStrFmtOption.IncVecIndex:
				vec_index++;
				break;
			case InstrStrFmtOption.NoVecIndex:
				noVecIndex = true;
				break;
			case InstrStrFmtOption.SwapVecIndex12:
				swapVecIndex12 = true;
				break;
			case InstrStrFmtOption.SkipOp0:
				startOpIndex = 1;
				break;
			case InstrStrFmtOption.VecIndexSameAsOpIndex:
				vecIndexSameAsOpIndex = true;
				break;
			default:
				throw new InvalidOperationException();
			case InstrStrFmtOption.None:
				break;
			}
			if ((opCode.Op0Kind == OpCodeOperandKind.k_reg || opCode.Op0Kind == OpCodeOperandKind.kp1_reg) && opCode.OpCount > 2 && opCode.Encoding != EncodingKind.MVEX)
			{
				vecIndexSameAsOpIndex = true;
			}
			for (int i = 0; i < opCode.OpCount; i++)
			{
				switch (opCode.GetOpKind(i))
				{
				case OpCodeOperandKind.r32_reg:
				case OpCodeOperandKind.r32_reg_mem:
				case OpCodeOperandKind.r32_rm:
				case OpCodeOperandKind.r32_opcode:
				case OpCodeOperandKind.r32_vvvv:
					r32_count++;
					break;
				case OpCodeOperandKind.r64_reg:
				case OpCodeOperandKind.r64_reg_mem:
				case OpCodeOperandKind.r64_rm:
				case OpCodeOperandKind.r64_opcode:
				case OpCodeOperandKind.r64_vvvv:
					r64_count++;
					break;
				case OpCodeOperandKind.bnd_or_mem_mpx:
				case OpCodeOperandKind.bnd_reg:
					bnd_count++;
					break;
				case OpCodeOperandKind.seg_rSI:
				case OpCodeOperandKind.es_rDI:
				case OpCodeOperandKind.seg_rBX_al:
					opCount = 0;
					break;
				default:
					throw new InvalidOperationException();
				case OpCodeOperandKind.None:
				case OpCodeOperandKind.farbr2_2:
				case OpCodeOperandKind.farbr4_2:
				case OpCodeOperandKind.mem_offs:
				case OpCodeOperandKind.mem:
				case OpCodeOperandKind.mem_mpx:
				case OpCodeOperandKind.mem_mib:
				case OpCodeOperandKind.mem_vsib32x:
				case OpCodeOperandKind.mem_vsib64x:
				case OpCodeOperandKind.mem_vsib32y:
				case OpCodeOperandKind.mem_vsib64y:
				case OpCodeOperandKind.mem_vsib32z:
				case OpCodeOperandKind.mem_vsib64z:
				case OpCodeOperandKind.r8_or_mem:
				case OpCodeOperandKind.r16_or_mem:
				case OpCodeOperandKind.r32_or_mem:
				case OpCodeOperandKind.r32_or_mem_mpx:
				case OpCodeOperandKind.r64_or_mem:
				case OpCodeOperandKind.r64_or_mem_mpx:
				case OpCodeOperandKind.mm_or_mem:
				case OpCodeOperandKind.xmm_or_mem:
				case OpCodeOperandKind.ymm_or_mem:
				case OpCodeOperandKind.zmm_or_mem:
				case OpCodeOperandKind.k_or_mem:
				case OpCodeOperandKind.r8_reg:
				case OpCodeOperandKind.r8_opcode:
				case OpCodeOperandKind.r16_reg:
				case OpCodeOperandKind.r16_reg_mem:
				case OpCodeOperandKind.r16_rm:
				case OpCodeOperandKind.r16_opcode:
				case OpCodeOperandKind.seg_reg:
				case OpCodeOperandKind.k_reg:
				case OpCodeOperandKind.kp1_reg:
				case OpCodeOperandKind.k_rm:
				case OpCodeOperandKind.k_vvvv:
				case OpCodeOperandKind.mm_reg:
				case OpCodeOperandKind.mm_rm:
				case OpCodeOperandKind.xmm_reg:
				case OpCodeOperandKind.xmm_rm:
				case OpCodeOperandKind.xmm_vvvv:
				case OpCodeOperandKind.xmmp3_vvvv:
				case OpCodeOperandKind.xmm_is4:
				case OpCodeOperandKind.xmm_is5:
				case OpCodeOperandKind.ymm_reg:
				case OpCodeOperandKind.ymm_rm:
				case OpCodeOperandKind.ymm_vvvv:
				case OpCodeOperandKind.ymm_is4:
				case OpCodeOperandKind.ymm_is5:
				case OpCodeOperandKind.zmm_reg:
				case OpCodeOperandKind.zmm_rm:
				case OpCodeOperandKind.zmm_vvvv:
				case OpCodeOperandKind.zmmp3_vvvv:
				case OpCodeOperandKind.cr_reg:
				case OpCodeOperandKind.dr_reg:
				case OpCodeOperandKind.tr_reg:
				case OpCodeOperandKind.es:
				case OpCodeOperandKind.cs:
				case OpCodeOperandKind.ss:
				case OpCodeOperandKind.ds:
				case OpCodeOperandKind.fs:
				case OpCodeOperandKind.gs:
				case OpCodeOperandKind.al:
				case OpCodeOperandKind.cl:
				case OpCodeOperandKind.ax:
				case OpCodeOperandKind.dx:
				case OpCodeOperandKind.eax:
				case OpCodeOperandKind.rax:
				case OpCodeOperandKind.st0:
				case OpCodeOperandKind.sti_opcode:
				case OpCodeOperandKind.imm4_m2z:
				case OpCodeOperandKind.imm8:
				case OpCodeOperandKind.imm8_const_1:
				case OpCodeOperandKind.imm8sex16:
				case OpCodeOperandKind.imm8sex32:
				case OpCodeOperandKind.imm8sex64:
				case OpCodeOperandKind.imm16:
				case OpCodeOperandKind.imm32:
				case OpCodeOperandKind.imm32sex64:
				case OpCodeOperandKind.imm64:
				case OpCodeOperandKind.seg_rDI:
				case OpCodeOperandKind.br16_1:
				case OpCodeOperandKind.br32_1:
				case OpCodeOperandKind.br64_1:
				case OpCodeOperandKind.br16_2:
				case OpCodeOperandKind.br32_4:
				case OpCodeOperandKind.br64_4:
				case OpCodeOperandKind.xbegin_2:
				case OpCodeOperandKind.xbegin_4:
				case OpCodeOperandKind.brdisp_2:
				case OpCodeOperandKind.brdisp_4:
				case OpCodeOperandKind.sibmem:
				case OpCodeOperandKind.tmm_reg:
				case OpCodeOperandKind.tmm_rm:
				case OpCodeOperandKind.tmm_vvvv:
					break;
				}
			}
		}

		private MemorySize GetMemorySize(bool isBroadcast)
		{
			int code = (int)opCode.Code;
			if (isBroadcast)
			{
				return (MemorySize)InstructionMemorySizes.SizesBcst[code];
			}
			return (MemorySize)InstructionMemorySizes.SizesNormal[code];
		}

		public string Format()
		{
			if (!opCode.IsInstruction)
			{
				return opCode.Code switch
				{
					Code.INVALID => "<invalid>", 
					Code.DeclareByte => "<db>", 
					Code.DeclareWord => "<dw>", 
					Code.DeclareDword => "<dd>", 
					Code.DeclareQword => "<dq>", 
					Code.Zero_bytes => "ZERO_BYTES", 
					_ => throw new InvalidOperationException(), 
				};
			}
			sb.Length = 0;
			Write(opCode.Mnemonic.ToString(), upper: true);
			if (startOpIndex < opCount)
			{
				sb.Append(' ');
				int num = opCount - 1;
				if (opCode.Encoding != 0 && opCode.GetOpKind(num) == OpCodeOperandKind.imm8)
				{
					num--;
				}
				bool flag = false;
				for (int i = startOpIndex; i < opCount; i++)
				{
					if (flag)
					{
						WriteOpSeparator();
					}
					flag = true;
					if (i == num && opCode.Encoding == EncodingKind.MVEX)
					{
						MvexConvFn convFn = new MvexInfo(opCode.Code).ConvFn;
						if (convFn != 0)
						{
							sb.Append(ConvFnNames[(int)(convFn - 1)]);
							sb.Append('(');
						}
					}
					OpCodeOperandKind opKind = opCode.GetOpKind(i);
					switch (opKind)
					{
					case OpCodeOperandKind.farbr2_2:
						sb.Append("ptr16:16");
						break;
					case OpCodeOperandKind.farbr4_2:
						sb.Append("ptr16:32");
						break;
					case OpCodeOperandKind.mem_offs:
						sb.Append("moffs");
						WriteMemorySize(GetMemorySize(isBroadcast: false));
						break;
					case OpCodeOperandKind.mem:
					case OpCodeOperandKind.mem_mpx:
						WriteMemory();
						break;
					case OpCodeOperandKind.sibmem:
						sb.Append("sibmem");
						break;
					case OpCodeOperandKind.mem_mib:
						sb.Append("mib");
						break;
					case OpCodeOperandKind.mem_vsib32x:
						sb.Append("vm32x");
						break;
					case OpCodeOperandKind.mem_vsib64x:
						sb.Append("vm64x");
						break;
					case OpCodeOperandKind.mem_vsib32y:
						sb.Append("vm32y");
						break;
					case OpCodeOperandKind.mem_vsib64y:
						sb.Append("vm64y");
						break;
					case OpCodeOperandKind.mem_vsib32z:
						if (opCode.Encoding == EncodingKind.MVEX)
						{
							sb.Append("mvt");
						}
						else
						{
							sb.Append("vm32z");
						}
						break;
					case OpCodeOperandKind.mem_vsib64z:
						sb.Append("vm64z");
						break;
					case OpCodeOperandKind.r8_or_mem:
						WriteGprMem(8);
						break;
					case OpCodeOperandKind.r16_or_mem:
						WriteGprMem(16);
						break;
					case OpCodeOperandKind.r32_or_mem:
					case OpCodeOperandKind.r32_or_mem_mpx:
						WriteGprMem(32);
						break;
					case OpCodeOperandKind.r64_or_mem:
					case OpCodeOperandKind.r64_or_mem_mpx:
						WriteGprMem(64);
						break;
					case OpCodeOperandKind.mm_or_mem:
						WriteRegMem("mm", GetVecIndex(i));
						break;
					case OpCodeOperandKind.xmm_or_mem:
						WriteRegMem("xmm", GetVecIndex(i));
						break;
					case OpCodeOperandKind.ymm_or_mem:
						WriteRegMem("ymm", GetVecIndex(i));
						break;
					case OpCodeOperandKind.zmm_or_mem:
						WriteRegMem("zmm", GetVecIndex(i));
						break;
					case OpCodeOperandKind.tmm_reg:
					case OpCodeOperandKind.tmm_rm:
					case OpCodeOperandKind.tmm_vvvv:
						WriteRegOp("tmm", GetTmmIndex());
						break;
					case OpCodeOperandKind.bnd_or_mem_mpx:
						WriteRegOp("bnd", GetBndIndex());
						sb.Append('/');
						WriteMemory();
						break;
					case OpCodeOperandKind.k_or_mem:
						WriteRegMem("k", GetKIndex());
						break;
					case OpCodeOperandKind.r8_reg:
					case OpCodeOperandKind.r8_opcode:
						WriteRegOp("r8");
						break;
					case OpCodeOperandKind.r16_reg:
					case OpCodeOperandKind.r16_reg_mem:
					case OpCodeOperandKind.r16_rm:
					case OpCodeOperandKind.r16_opcode:
						WriteRegOp("r16");
						break;
					case OpCodeOperandKind.r32_reg:
					case OpCodeOperandKind.r32_reg_mem:
					case OpCodeOperandKind.r32_rm:
					case OpCodeOperandKind.r32_opcode:
					case OpCodeOperandKind.r32_vvvv:
						WriteRegOp("r32");
						AppendGprSuffix(r32_count, ref r32_index);
						break;
					case OpCodeOperandKind.r64_reg:
					case OpCodeOperandKind.r64_reg_mem:
					case OpCodeOperandKind.r64_rm:
					case OpCodeOperandKind.r64_opcode:
					case OpCodeOperandKind.r64_vvvv:
						WriteRegOp("r64");
						AppendGprSuffix(r64_count, ref r64_index);
						break;
					case OpCodeOperandKind.seg_reg:
						sb.Append("Sreg");
						break;
					case OpCodeOperandKind.k_reg:
					case OpCodeOperandKind.k_rm:
					case OpCodeOperandKind.k_vvvv:
						WriteRegOp("k", GetKIndex());
						break;
					case OpCodeOperandKind.kp1_reg:
						WriteRegOp("k", GetKIndex());
						sb.Append("+1");
						break;
					case OpCodeOperandKind.mm_reg:
					case OpCodeOperandKind.mm_rm:
						WriteRegOp("mm", GetVecIndex(i));
						break;
					case OpCodeOperandKind.xmm_reg:
					case OpCodeOperandKind.xmm_rm:
					case OpCodeOperandKind.xmm_vvvv:
					case OpCodeOperandKind.xmm_is4:
					case OpCodeOperandKind.xmm_is5:
						WriteRegOp("xmm", GetVecIndex(i));
						break;
					case OpCodeOperandKind.xmmp3_vvvv:
						WriteRegOp("xmm", GetVecIndex(i));
						sb.Append("+3");
						break;
					case OpCodeOperandKind.ymm_reg:
					case OpCodeOperandKind.ymm_rm:
					case OpCodeOperandKind.ymm_vvvv:
					case OpCodeOperandKind.ymm_is4:
					case OpCodeOperandKind.ymm_is5:
						WriteRegOp("ymm", GetVecIndex(i));
						break;
					case OpCodeOperandKind.zmm_reg:
					case OpCodeOperandKind.zmm_rm:
					case OpCodeOperandKind.zmm_vvvv:
						WriteRegOp("zmm", GetVecIndex(i));
						break;
					case OpCodeOperandKind.zmmp3_vvvv:
						WriteRegOp("zmm", GetVecIndex(i));
						sb.Append("+3");
						break;
					case OpCodeOperandKind.bnd_reg:
						WriteRegOp("bnd", GetBndIndex());
						break;
					case OpCodeOperandKind.cr_reg:
						WriteRegOp("cr");
						break;
					case OpCodeOperandKind.dr_reg:
						WriteRegOp("dr");
						break;
					case OpCodeOperandKind.tr_reg:
						WriteRegOp("tr");
						break;
					case OpCodeOperandKind.es:
						WriteRegister("es");
						break;
					case OpCodeOperandKind.cs:
						WriteRegister("cs");
						break;
					case OpCodeOperandKind.ss:
						WriteRegister("ss");
						break;
					case OpCodeOperandKind.ds:
						WriteRegister("ds");
						break;
					case OpCodeOperandKind.fs:
						WriteRegister("fs");
						break;
					case OpCodeOperandKind.gs:
						WriteRegister("gs");
						break;
					case OpCodeOperandKind.al:
						WriteRegister("al");
						break;
					case OpCodeOperandKind.cl:
						WriteRegister("cl");
						break;
					case OpCodeOperandKind.ax:
						WriteRegister("ax");
						break;
					case OpCodeOperandKind.dx:
						WriteRegister("dx");
						break;
					case OpCodeOperandKind.eax:
						WriteRegister("eax");
						break;
					case OpCodeOperandKind.rax:
						WriteRegister("rax");
						break;
					case OpCodeOperandKind.st0:
					case OpCodeOperandKind.sti_opcode:
						WriteRegister("ST");
						if (opKind == OpCodeOperandKind.st0)
						{
							Code code = opCode.Code;
							if ((uint)(code - 587) > 1u && (uint)(code - 655) > 1u)
							{
								sb.Append("(0)");
							}
						}
						else
						{
							sb.Append("(i)");
						}
						break;
					case OpCodeOperandKind.imm4_m2z:
						sb.Append("imm4");
						break;
					case OpCodeOperandKind.imm8:
					case OpCodeOperandKind.imm8sex16:
					case OpCodeOperandKind.imm8sex32:
					case OpCodeOperandKind.imm8sex64:
						sb.Append("imm8");
						break;
					case OpCodeOperandKind.imm8_const_1:
						sb.Append('1');
						break;
					case OpCodeOperandKind.imm16:
						sb.Append("imm16");
						break;
					case OpCodeOperandKind.imm32:
					case OpCodeOperandKind.imm32sex64:
						sb.Append("imm32");
						break;
					case OpCodeOperandKind.imm64:
						sb.Append("imm64");
						break;
					case OpCodeOperandKind.seg_rSI:
					case OpCodeOperandKind.es_rDI:
					case OpCodeOperandKind.seg_rDI:
					case OpCodeOperandKind.seg_rBX_al:
						flag = false;
						break;
					case OpCodeOperandKind.br16_1:
					case OpCodeOperandKind.br32_1:
					case OpCodeOperandKind.br64_1:
						sb.Append("rel8");
						break;
					case OpCodeOperandKind.br16_2:
					case OpCodeOperandKind.xbegin_2:
						sb.Append("rel16");
						break;
					case OpCodeOperandKind.br32_4:
					case OpCodeOperandKind.br64_4:
					case OpCodeOperandKind.xbegin_4:
						sb.Append("rel32");
						break;
					case OpCodeOperandKind.brdisp_2:
						sb.Append("disp16");
						break;
					case OpCodeOperandKind.brdisp_4:
						sb.Append("disp32");
						break;
					default:
						throw new InvalidOperationException();
					}
					if (i == num && opCode.Encoding == EncodingKind.MVEX && new MvexInfo(opCode.Code).ConvFn != 0)
					{
						sb.Append(')');
					}
					if (i == 0 && opCode.CanUseOpMaskRegister)
					{
						sb.Append(' ');
						WriteRegDecorator("k", GetKIndex());
						if (opCode.CanUseZeroingMasking)
						{
							WriteDecorator("z");
						}
					}
					if (i == num && opCode.Encoding != EncodingKind.MVEX)
					{
						if (opCode.CanSuppressAllExceptions)
						{
							WriteDecorator("sae");
						}
						if (opCode.CanUseRoundingControl)
						{
							WriteDecorator("er");
						}
					}
				}
			}
			switch (opCode.Code)
			{
			case Code.Tpause_r32:
			case Code.Tpause_r64:
			case Code.Umwait_r32:
			case Code.Umwait_r64:
				WriteOpSeparator();
				Write("<EDX>", upper: false);
				WriteOpSeparator();
				Write("<EAX>", upper: false);
				break;
			case Code.Pblendvb_xmm_xmmm128:
			case Code.Blendvps_xmm_xmmm128:
			case Code.Blendvpd_xmm_xmmm128:
			case Code.Sha256rnds2_xmm_xmmm128:
				WriteOpSeparator();
				Write("<XMM0>", upper: true);
				break;
			case Code.Aesencwide128kl_m384:
			case Code.Aesdecwide128kl_m384:
			case Code.Aesencwide256kl_m512:
			case Code.Aesdecwide256kl_m512:
				WriteOpSeparator();
				Write("<XMM0-7>", upper: true);
				break;
			case Code.Loadiwkey_xmm_xmm:
				WriteOpSeparator();
				Write("<EAX>", upper: true);
				WriteOpSeparator();
				Write("<XMM0>", upper: true);
				break;
			case Code.Encodekey128_r32_r32:
				WriteOpSeparator();
				Write("<XMM0-2>", upper: true);
				WriteOpSeparator();
				Write("<XMM4-6>", upper: true);
				break;
			case Code.Encodekey256_r32_r32:
				WriteOpSeparator();
				Write("<XMM0-6>", upper: true);
				break;
			case Code.Hreset_imm8:
				WriteOpSeparator();
				Write("<EAX>", upper: true);
				break;
			}
			return sb.ToString();
		}

		private void WriteMemorySize(MemorySize memorySize)
		{
			Code code = opCode.Code;
			if (code == Code.Fldcw_m2byte || (uint)(code - 520) <= 1u || (uint)(code - 615) <= 1u)
			{
				sb.Append("2byte");
				return;
			}
			switch (memorySize)
			{
			case MemorySize.Bound16_WordWord:
				sb.Append("16&16");
				break;
			case MemorySize.Bound32_DwordDword:
				sb.Append("32&32");
				break;
			case MemorySize.FpuEnv14:
				sb.Append("14byte");
				break;
			case MemorySize.FpuEnv28:
				sb.Append("28byte");
				break;
			case MemorySize.FpuState94:
				sb.Append("94byte");
				break;
			case MemorySize.FpuState108:
				sb.Append("108byte");
				break;
			case MemorySize.Fxsave_512Byte:
			case MemorySize.Fxsave64_512Byte:
				sb.Append("512byte");
				break;
			case MemorySize.Xsave:
			case MemorySize.Xsave64:
				sb.Append("em");
				break;
			case MemorySize.SegPtr16:
				sb.Append("16:16");
				break;
			case MemorySize.SegPtr32:
				sb.Append("16:32");
				break;
			case MemorySize.SegPtr64:
				sb.Append("16:64");
				break;
			case MemorySize.Fword6:
				if (!IsSgdtOrSidt())
				{
					sb.Append("16&32");
				}
				break;
			case MemorySize.Fword10:
				if (!IsSgdtOrSidt())
				{
					sb.Append("16&64");
				}
				break;
			default:
			{
				int size = memorySize.GetSize();
				if (size != 0)
				{
					sb.Append(size * 8);
				}
				break;
			}
			}
			if (IsFpuInstruction(opCode.Code))
			{
				switch (memorySize)
				{
				case MemorySize.Int16:
				case MemorySize.Int32:
				case MemorySize.Int64:
					sb.Append("int");
					break;
				case MemorySize.Float32:
				case MemorySize.Float64:
				case MemorySize.Float80:
					sb.Append("fp");
					break;
				case MemorySize.Bcd:
					sb.Append("bcd");
					break;
				}
			}
		}

		private bool IsSgdtOrSidt()
		{
			Code code = opCode.Code;
			if ((uint)(code - 792) <= 5u)
			{
				return true;
			}
			return false;
		}

		private void WriteRegister(string register)
		{
			Write(register, upper: true);
		}

		private void WriteRegOp(string register)
		{
			Write(register, upper: false);
		}

		private void WriteRegOp(string register, int index)
		{
			WriteRegOp(register);
			if (index > 0)
			{
				sb.Append(index);
			}
		}

		private void WriteDecorator(string decorator)
		{
			sb.Append('{');
			Write(decorator, upper: false);
			sb.Append('}');
		}

		private void WriteRegDecorator(string register, int index)
		{
			sb.Append('{');
			Write(register, upper: false);
			sb.Append(index);
			sb.Append('}');
		}

		private void AppendGprSuffix(int count, ref int index)
		{
			if (count > 1 && !noGprSuffix)
			{
				sb.Append((char)(97 + index));
				index++;
			}
		}

		private void WriteOpSeparator()
		{
			sb.Append(", ");
		}

		private void Write(string s, bool upper)
		{
			for (int i = 0; i < s.Length; i++)
			{
				char c = s[i];
				c = (upper ? char.ToUpperInvariant(c) : char.ToLowerInvariant(c));
				sb.Append(c);
			}
		}

		private void WriteGprMem(int regSize)
		{
			sb.Append('r');
			if (GetMemorySize(isBroadcast: false).GetSize() * 8 != regSize)
			{
				sb.Append(regSize);
			}
			sb.Append('/');
			WriteMemory();
		}

		private void WriteRegMem(string register, int index)
		{
			WriteRegOp(register, index);
			sb.Append('/');
			WriteMemory();
		}

		private void WriteMemory()
		{
			WriteMemory(isBroadcast: false);
			if (opCode.CanBroadcast)
			{
				sb.Append('/');
				WriteMemory(isBroadcast: true);
			}
		}

		private void WriteMemory(bool isBroadcast)
		{
			MemorySize memorySize = GetMemorySize(isBroadcast);
			sb.Append('m');
			if (opCode.Encoding == EncodingKind.MVEX)
			{
				MvexInfo mvexInfo = new MvexInfo(opCode.Code);
				if (mvexInfo.EHBit == MvexEHBit.None && !mvexInfo.IgnoresEvictionHint)
				{
					sb.Append('t');
				}
			}
			WriteMemorySize(memorySize);
			if (isBroadcast)
			{
				sb.Append("bcst");
			}
		}

		private static bool IsFpuInstruction(Code code)
		{
			return (uint)(code - 494) <= 162u;
		}
	}
	internal enum LKind : byte
	{
		None,
		L128,
		L0,
		LZ
	}
	internal readonly struct OpCodeFormatter
	{
		private readonly OpCodeInfo opCode;

		private readonly StringBuilder sb;

		private readonly LKind lkind;

		private readonly bool hasModrmInfo;

		public OpCodeFormatter(OpCodeInfo opCode, StringBuilder sb, LKind lkind, bool hasModrmInfo)
		{
			this.opCode = opCode;
			this.sb = sb;
			this.lkind = lkind;
			this.hasModrmInfo = hasModrmInfo;
		}

		public string Format()
		{
			if (!opCode.IsInstruction)
			{
				return opCode.Code switch
				{
					Code.INVALID => "<invalid>", 
					Code.DeclareByte => "<db>", 
					Code.DeclareWord => "<dw>", 
					Code.DeclareDword => "<dd>", 
					Code.DeclareQword => "<dq>", 
					Code.Zero_bytes => "<zero_bytes>", 
					_ => throw new InvalidOperationException(), 
				};
			}
			return opCode.Encoding switch
			{
				EncodingKind.Legacy => Format_Legacy(), 
				EncodingKind.VEX => FormatVecEncoding("VEX"), 
				EncodingKind.EVEX => FormatVecEncoding("EVEX"), 
				EncodingKind.XOP => FormatVecEncoding("XOP"), 
				EncodingKind.D3NOW => Format_3DNow(), 
				EncodingKind.MVEX => FormatVecEncoding("MVEX"), 
				_ => throw new InvalidOperationException(), 
			};
		}

		private void AppendHexByte(byte value)
		{
			sb.Append(value.ToString("X2"));
		}

		private void AppendOpCode(uint value, int valueLen, bool sep)
		{
			if (valueLen == 1)
			{
				AppendHexByte((byte)value);
				return;
			}
			AppendHexByte((byte)(value >> 8));
			if (sep)
			{
				sb.Append(' ');
			}
			AppendHexByte((byte)value);
		}

		private void AppendTable(bool sep)
		{
			switch (opCode.Table)
			{
			case OpCodeTableKind.T0F:
				AppendOpCode(15u, 1, sep);
				break;
			case OpCodeTableKind.T0F38:
				AppendOpCode(3896u, 2, sep);
				break;
			case OpCodeTableKind.T0F3A:
				AppendOpCode(3898u, 2, sep);
				break;
			case OpCodeTableKind.MAP5:
				sb.Append("MAP5");
				break;
			case OpCodeTableKind.MAP6:
				sb.Append("MAP6");
				break;
			case OpCodeTableKind.MAP8:
				sb.Append("X8");
				break;
			case OpCodeTableKind.MAP9:
				sb.Append("X9");
				break;
			case OpCodeTableKind.MAP10:
				sb.Append("XA");
				break;
			default:
				throw new InvalidOperationException();
			case OpCodeTableKind.Normal:
				break;
			}
		}

		private bool HasModRM()
		{
			int opCount = opCode.OpCount;
			if (opCount == 0)
			{
				return false;
			}
			switch (opCode.Encoding)
			{
			case EncodingKind.EVEX:
			case EncodingKind.XOP:
			case EncodingKind.D3NOW:
			case EncodingKind.MVEX:
				return true;
			default:
				throw new InvalidOperationException();
			case EncodingKind.Legacy:
			case EncodingKind.VEX:
			{
				for (int i = 0; i < opCount; i++)
				{
					switch (opCode.GetOpKind(i))
					{
					case OpCodeOperandKind.mem:
					case OpCodeOperandKind.mem_mpx:
					case OpCodeOperandKind.mem_mib:
					case OpCodeOperandKind.mem_vsib32x:
					case OpCodeOperandKind.mem_vsib64x:
					case OpCodeOperandKind.mem_vsib32y:
					case OpCodeOperandKind.mem_vsib64y:
					case OpCodeOperandKind.mem_vsib32z:
					case OpCodeOperandKind.mem_vsib64z:
					case OpCodeOperandKind.r8_or_mem:
					case OpCodeOperandKind.r16_or_mem:
					case OpCodeOperandKind.r32_or_mem:
					case OpCodeOperandKind.r32_or_mem_mpx:
					case OpCodeOperandKind.r64_or_mem:
					case OpCodeOperandKind.r64_or_mem_mpx:
					case OpCodeOperandKind.mm_or_mem:
					case OpCodeOperandKind.xmm_or_mem:
					case OpCodeOperandKind.ymm_or_mem:
					case OpCodeOperandKind.zmm_or_mem:
					case OpCodeOperandKind.bnd_or_mem_mpx:
					case OpCodeOperandKind.k_or_mem:
					case OpCodeOperandKind.r8_reg:
					case OpCodeOperandKind.r16_reg:
					case OpCodeOperandKind.r16_reg_mem:
					case OpCodeOperandKind.r16_rm:
					case OpCodeOperandKind.r32_reg:
					case OpCodeOperandKind.r32_reg_mem:
					case OpCodeOperandKind.r32_rm:
					case OpCodeOperandKind.r64_reg:
					case OpCodeOperandKind.r64_reg_mem:
					case OpCodeOperandKind.r64_rm:
					case OpCodeOperandKind.seg_reg:
					case OpCodeOperandKind.k_reg:
					case OpCodeOperandKind.kp1_reg:
					case OpCodeOperandKind.k_rm:
					case OpCodeOperandKind.mm_reg:
					case OpCodeOperandKind.mm_rm:
					case OpCodeOperandKind.xmm_reg:
					case OpCodeOperandKind.xmm_rm:
					case OpCodeOperandKind.ymm_reg:
					case OpCodeOperandKind.ymm_rm:
					case OpCodeOperandKind.zmm_reg:
					case OpCodeOperandKind.zmm_rm:
					case OpCodeOperandKind.cr_reg:
					case OpCodeOperandKind.dr_reg:
					case OpCodeOperandKind.tr_reg:
					case OpCodeOperandKind.bnd_reg:
					case OpCodeOperandKind.sibmem:
					case OpCodeOperandKind.tmm_reg:
					case OpCodeOperandKind.tmm_rm:
						return true;
					}
				}
				return false;
			}
			}
		}

		private bool HasVsib()
		{
			int opCount = opCode.OpCount;
			for (int i = 0; i < opCount; i++)
			{
				OpCodeOperandKind opKind = opCode.GetOpKind(i);
				if ((uint)(opKind - 7) <= 5u)
				{
					return true;
				}
			}
			return false;
		}

		private OpCodeOperandKind GetOpCodeBitsOperand()
		{
			int opCount = opCode.OpCount;
			for (int i = 0; i < opCount; i++)
			{
				OpCodeOperandKind opKind = opCode.GetOpKind(i);
				switch (opKind)
				{
				case OpCodeOperandKind.r8_opcode:
				case OpCodeOperandKind.r16_opcode:
				case OpCodeOperandKind.r32_opcode:
				case OpCodeOperandKind.r64_opcode:
					return opKind;
				}
			}
			return OpCodeOperandKind.None;
		}

		private bool TryGetModrmInfo(out bool isRegOnly, out int rrr, out int bbb)
		{
			isRegOnly = true;
			rrr = opCode.GroupIndex;
			bbb = opCode.RmGroupIndex;
			if (!hasModrmInfo)
			{
				return false;
			}
			int opCount = opCode.OpCount;
			for (int i = 0; i < opCount; i++)
			{
				switch (opCode.GetOpKind(i))
				{
				case OpCodeOperandKind.mem_offs:
				case OpCodeOperandKind.mem:
				case OpCodeOperandKind.mem_mpx:
				case OpCodeOperandKind.mem_mib:
					isRegOnly = false;
					break;
				case OpCodeOperandKind.mem_vsib32x:
				case OpCodeOperandKind.mem_vsib64x:
				case OpCodeOperandKind.mem_vsib32y:
				case OpCodeOperandKind.mem_vsib64y:
				case OpCodeOperandKind.mem_vsib32z:
				case OpCodeOperandKind.mem_vsib64z:
				case OpCodeOperandKind.sibmem:
					isRegOnly = false;
					bbb = 4;
					break;
				}
			}
			return true;
		}

		private void AppendBits(string name, int bits, int numBits)
		{
			if (bits < 0)
			{
				sb.Append(name);
				return;
			}
			for (int num = numBits - 1; num >= 0; num--)
			{
				if (((uint)(bits >> num) & (true ? 1u : 0u)) != 0)
				{
					sb.Append('1');
				}
				else
				{
					sb.Append('0');
				}
			}
		}

		private void AppendRest()
		{
			if (TryGetModrmInfo(out var isRegOnly, out var rrr, out var bbb))
			{
				if (isRegOnly)
				{
					sb.Append(" 11:");
				}
				else
				{
					sb.Append(" !(11):");
				}
				AppendBits("rrr", rrr, 3);
				sb.Append(':');
				AppendBits("bbb", bbb, 3);
			}
			else
			{
				bool flag = (opCode.Encoding == EncodingKind.EVEX || opCode.Encoding == EncodingKind.MVEX) && HasVsib();
				if (opCode.IsGroup)
				{
					sb.Append(" /");
					sb.Append(opCode.GroupIndex);
				}
				else if (!flag && HasModRM())
				{
					sb.Append(" /r");
				}
				if (flag)
				{
					sb.Append(" /vsib");
				}
			}
			int opCount = opCode.OpCount;
			for (int i = 0; i < opCount; i++)
			{
				switch (opCode.GetOpKind(i))
				{
				case OpCodeOperandKind.br16_1:
				case OpCodeOperandKind.br32_1:
				case OpCodeOperandKind.br64_1:
					sb.Append(" cb");
					break;
				case OpCodeOperandKind.br16_2:
				case OpCodeOperandKind.xbegin_2:
				case OpCodeOperandKind.brdisp_2:
					sb.Append(" cw");
					break;
				case OpCodeOperandKind.farbr2_2:
				case OpCodeOperandKind.br32_4:
				case OpCodeOperandKind.br64_4:
				case OpCodeOperandKind.xbegin_4:
				case OpCodeOperandKind.brdisp_4:
					sb.Append(" cd");
					break;
				case OpCodeOperandKind.farbr4_2:
					sb.Append(" cp");
					break;
				case OpCodeOperandKind.imm8:
				case OpCodeOperandKind.imm8sex16:
				case OpCodeOperandKind.imm8sex32:
				case OpCodeOperandKind.imm8sex64:
					sb.Append(" ib");
					break;
				case OpCodeOperandKind.imm16:
					sb.Append(" iw");
					break;
				case OpCodeOperandKind.imm32:
				case OpCodeOperandKind.imm32sex64:
					sb.Append(" id");
					break;
				case OpCodeOperandKind.imm64:
					sb.Append(" io");
					break;
				case OpCodeOperandKind.xmm_is4:
				case OpCodeOperandKind.ymm_is4:
					sb.Append(" /is4");
					break;
				case OpCodeOperandKind.xmm_is5:
				case OpCodeOperandKind.ymm_is5:
					sb.Append(" /is5");
					i = opCount;
					break;
				case OpCodeOperandKind.mem_offs:
					sb.Append(" mo");
					break;
				}
			}
		}

		private string Format_Legacy()
		{
			sb.Length = 0;
			if (opCode.Fwait)
			{
				AppendHexByte(155);
				sb.Append(' ');
			}
			switch (opCode.AddressSize)
			{
			case 16:
				sb.Append("a16 ");
				break;
			case 32:
				sb.Append("a32 ");
				break;
			case 64:
				sb.Append("a64 ");
				break;
			default:
				throw new InvalidOperationException();
			case 0:
				break;
			}
			switch (opCode.OperandSize)
			{
			case 16:
				sb.Append("o16 ");
				break;
			case 32:
				sb.Append("o32 ");
				break;
			default:
				throw new InvalidOperationException();
			case 0:
			case 64:
				break;
			}
			switch (opCode.MandatoryPrefix)
			{
			case MandatoryPrefix.PNP:
				sb.Append("NP ");
				break;
			case MandatoryPrefix.P66:
				AppendHexByte(102);
				sb.Append(' ');
				break;
			case MandatoryPrefix.PF3:
				AppendHexByte(243);
				sb.Append(' ');
				break;
			case MandatoryPrefix.PF2:
				AppendHexByte(242);
				sb.Append(' ');
				break;
			default:
				throw new InvalidOperationException();
			case MandatoryPrefix.None:
				break;
			}
			if (opCode.OperandSize == 64)
			{
				sb.Append("o64 ");
			}
			AppendTable(sep: true);
			if (opCode.Table != 0)
			{
				sb.Append(' ');
			}
			AppendOpCode(opCode.OpCode, opCode.OpCodeLength, sep: true);
			switch (GetOpCodeBitsOperand())
			{
			case OpCodeOperandKind.r8_opcode:
				sb.Append("+rb");
				break;
			case OpCodeOperandKind.r16_opcode:
				sb.Append("+rw");
				break;
			case OpCodeOperandKind.r32_opcode:
				sb.Append("+rd");
				break;
			case OpCodeOperandKind.r64_opcode:
				sb.Append("+ro");
				break;
			default:
				throw new InvalidOperationException();
			case OpCodeOperandKind.None:
				break;
			}
			int opCount = opCode.OpCount;
			for (int i = 0; i < opCount; i++)
			{
				if (opCode.GetOpKind(i) == OpCodeOperandKind.sti_opcode)
				{
					sb.Append("+i");
					break;
				}
			}
			AppendRest();
			return sb.ToString();
		}

		private string Format_3DNow()
		{
			sb.Length = 0;
			AppendOpCode(3855u, 2, sep: true);
			sb.Append(" /r");
			sb.Append(' ');
			AppendOpCode(opCode.OpCode, opCode.OpCodeLength, sep: true);
			return sb.ToString();
		}

		private string FormatVecEncoding(string encodingName)
		{
			sb.Length = 0;
			sb.Append(encodingName);
			if (opCode.Encoding == EncodingKind.MVEX)
			{
				MvexInfo mvexInfo = new MvexInfo(opCode.Code);
				if (mvexInfo.IsNDD)
				{
					sb.Append(".NDD");
				}
				else if (mvexInfo.IsNDS)
				{
					sb.Append(".NDS");
				}
			}
			sb.Append('.');
			if (opCode.IsLIG)
			{
				sb.Append("LIG");
			}
			else
			{
				switch (lkind)
				{
				case LKind.L128:
					sb.Append((uint)(128 << (int)opCode.L));
					break;
				case LKind.L0:
					sb.Append('L');
					sb.Append(opCode.L);
					break;
				case LKind.LZ:
					if (opCode.L != 0)
					{
						throw new InvalidOperationException();
					}
					sb.Append("LZ");
					break;
				default:
					throw new InvalidOperationException();
				}
			}
			switch (opCode.MandatoryPrefix)
			{
			case MandatoryPrefix.P66:
				sb.Append('.');
				AppendHexByte(102);
				break;
			case MandatoryPrefix.PF3:
				sb.Append('.');
				AppendHexByte(243);
				break;
			case MandatoryPrefix.PF2:
				sb.Append('.');
				AppendHexByte(242);
				break;
			default:
				throw new InvalidOperationException();
			case MandatoryPrefix.None:
			case MandatoryPrefix.PNP:
				break;
			}
			if (opCode.Table != 0)
			{
				sb.Append('.');
			}
			AppendTable(sep: false);
			if (opCode.IsWIG)
			{
				sb.Append(".WIG");
			}
			else
			{
				sb.Append(".W");
				sb.Append(opCode.W);
			}
			if (opCode.Encoding == EncodingKind.MVEX)
			{
				switch (new MvexInfo(opCode.Code).EHBit)
				{
				case MvexEHBit.EH0:
					sb.Append(".EH0");
					break;
				case MvexEHBit.EH1:
					sb.Append(".EH1");
					break;
				default:
					throw new InvalidOperationException();
				case MvexEHBit.None:
					break;
				}
			}
			sb.Append(' ');
			AppendOpCode(opCode.OpCode, opCode.OpCodeLength, sep: true);
			AppendRest();
			return sb.ToString();
		}
	}
	internal static class OpCodeHandlers
	{
		public static readonly OpCodeHandler[] Handlers;

		static OpCodeHandlers()
		{
			uint[] encFlags = EncoderData.EncFlags1;
			uint[] encFlags2 = EncoderData.EncFlags2;
			uint[] encFlags3 = EncoderData.EncFlags3;
			OpCodeHandler[] array = new OpCodeHandler[4911];
			int i = 0;
			InvalidHandler invalidHandler = new InvalidHandler();
			for (; i < encFlags.Length; i++)
			{
				EncFlags3 encFlags4 = (EncFlags3)encFlags3[i];
				OpCodeHandler opCodeHandler;
				switch ((EncodingKind)(encFlags4 & EncFlags3.EncodingMask))
				{
				case EncodingKind.Legacy:
				{
					Code code = (Code)i;
					opCodeHandler = ((code != 0) ? ((code > Code.DeclareQword) ? ((code != Code.Zero_bytes) ? ((OpCodeHandler)new LegacyHandler((EncFlags1)encFlags[i], (EncFlags2)encFlags2[i], encFlags4)) : ((OpCodeHandler)new ZeroBytesHandler(code))) : new DeclareDataHandler(code)) : invalidHandler);
					break;
				}
				case EncodingKind.VEX:
					opCodeHandler = new VexHandler((EncFlags1)encFlags[i], (EncFlags2)encFlags2[i], encFlags4);
					break;
				case EncodingKind.EVEX:
					opCodeHandler = new EvexHandler((EncFlags1)encFlags[i], (EncFlags2)encFlags2[i], encFlags4);
					break;
				case EncodingKind.XOP:
					opCodeHandler = new XopHandler((EncFlags1)encFlags[i], (EncFlags2)encFlags2[i], encFlags4);
					break;
				case EncodingKind.D3NOW:
					opCodeHandler = new D3nowHandler((EncFlags2)encFlags2[i], encFlags4);
					break;
				case EncodingKind.MVEX:
					opCodeHandler = new MvexHandler((EncFlags1)encFlags[i], (EncFlags2)encFlags2[i], encFlags4);
					break;
				default:
					throw new InvalidOperationException();
				}
				array[i] = opCodeHandler;
			}
			if (i != array.Length)
			{
				throw new InvalidOperationException();
			}
			Handlers = array;
		}
	}
	internal static class OpCodeInfoData
	{
		internal static readonly uint[] OpcFlags1 = GetOpcFlags1();

		internal static readonly uint[] OpcFlags2 = GetOpcFlags2();

		private static uint[] GetOpcFlags1()
		{
			return new uint[4911]
			{
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 131072u, 131072u, 131072u,
				131072u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 131072u, 131072u, 131072u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 131072u, 131072u,
				131072u, 131072u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 131072u, 131072u, 131072u, 131072u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 131072u, 131072u, 131072u, 131072u, 131072u, 131072u,
				131072u, 131072u, 131072u, 131072u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 131072u, 131072u, 131072u, 0u, 0u, 0u, 131072u, 131072u, 131072u,
				0u, 0u, 0u, 32772u, 32772u, 32772u, 32772u, 32772u, 32772u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				262144u, 262144u, 262144u, 0u, 0u, 0u, 131072u, 131072u, 131072u, 8u,
				8u, 8u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 131072u, 131072u, 0u, 131072u, 131072u, 131072u, 131072u, 131072u,
				131072u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 131072u, 131072u, 131072u, 131072u, 131072u, 131072u, 0u, 0u, 0u,
				0u, 0u, 65536u, 0u, 0u, 0u, 0u, 0u, 131072u, 131072u,
				131072u, 131072u, 131072u, 131072u, 131072u, 131072u, 131072u, 131072u, 131072u, 131072u,
				0u, 0u, 0u, 131168u, 131168u, 131168u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 1024u, 0u, 1024u, 0u,
				1024u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 1024u, 0u, 1024u, 0u,
				1024u, 0u, 1024u, 0u, 1024u, 0u, 25165824u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 1024u, 0u, 1024u, 0u, 1024u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 1024u, 0u, 25165824u, 25165824u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 32772u, 32772u, 32772u, 32772u, 32772u,
				32772u, 131072u, 131072u, 131072u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 32772u, 32772u, 32772u, 32772u, 32772u, 32772u, 0u, 32769u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 32768u, 32768u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 131328u, 131328u, 131328u,
				131328u, 131328u, 131328u, 256u, 256u, 256u, 256u, 256u, 256u, 131072u,
				131072u, 131072u, 128u, 128u, 128u, 128u, 128u, 128u, 32865u, 32865u,
				32865u, 32865u, 32865u, 32865u, 0u, 0u, 0u, 0u, 0u, 0u,
				14680064u, 14680064u, 128u, 128u, 1073741952u, 128u, 128u, 1073741952u, 32865u, 32865u,
				1073774689u, 32865u, 32865u, 1073774689u, 128u, 128u, 128u, 0u, 32801u, 32801u,
				32801u, 32865u, 32769u, 1u, 32769u, 32769u, 32769u, 32769u, 128u, 128u,
				128u, 128u, 32769u, 32769u, 32769u, 0u, 32769u, 0u, 0u, 0u,
				2u, 98305u, 98305u, 98305u, 0u, 32769u, 32769u, 32769u, 32769u, 32769u,
				32769u, 32769u, 32769u, 32769u, 32833u, 32833u, 32833u, 32769u, 0u, 0u,
				0u, 32833u, 128u, 0u, 0u, 0u, 0u, 0u, 512u, 512u,
				512u, 128u, 0u, 0u, 0u, 0u, 0u, 0u, 16875521u, 16875521u,
				0u, 32769u, 18972673u, 32769u, 32769u, 32865u, 32865u, 32865u, 4227073u, 0u,
				24u, 24u, 24u, 0u, 0u, 0u, 0u, 29360128u, 29360128u, 29360128u,
				29360128u, 29360128u, 29360128u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 24u,
				24u, 24u, 24u, 24u, 24u, 24u, 24u, 24u, 24u, 24u,
				24u, 24u, 24u, 24u, 24u, 24u, 24u, 24u, 24u, 24u,
				24u, 24u, 24u, 512u, 0u, 0u, 0u, 23068672u, 23068672u, 23068672u,
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				16384u, 16384u, 540672u, 540672u, 540672u, 540672u, 540672u, 540672u, 16384u, 16384u,
				16384u, 16384u, 540672u, 540672u, 540672u, 540672u, 540672u, 540672u, 16384u, 16384u,
				16384u, 16384u, 540672u, 540672u, 540672u, 540672u, 540672u, 540672u, 0u, 0u,
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				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 524288u, 524288u, 524288u, 524288u,
				524288u, 524288u, 524288u, 524288u, 524288u, 524288u, 524288u, 524288u, 524288u, 524288u,
				524288u, 524288u, 524288u, 524288u, 524288u, 524288u, 524288u, 524288u, 524288u, 524288u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				8192u, 8192u, 8192u, 0u, 0u, 8192u, 8192u, 8192u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 32769u, 32769u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 1081345u, 1081345u, 1081345u, 1048576u,
				1048576u, 1048576u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 8388608u, 8388608u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 32769u, 32769u, 32769u, 32769u, 32769u, 32769u, 96u,
				0u, 0u, 32769u, 32769u, 32769u, 32833u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 65664u, 1048576u, 0u, 1048576u, 1048576u, 1048576u, 1048576u,
				1048576u, 1064960u, 1064960u, 1064960u, 1064960u, 1064960u, 25166848u, 25166848u, 8421377u, 8421377u,
				8421377u, 10518529u, 10584065u, 8421377u, 8421377u, 8421377u, 8421377u, 8421377u, 8421377u, 12615681u,
				8421377u, 8421377u, 8421377u, 8421377u, 2097152u, 8388608u, 8388608u, 8388608u, 8388608u, 8388608u,
				8388608u, 8388608u, 8388608u, 8388608u, 8388608u, 8388608u, 8388608u, 8388608u, 8388608u, 8388608u,
				8388608u, 8388608u, 8388608u, 8388608u, 8388608u, 8388608u, 8388608u, 8388608u, 8388608u, 32769u,
				32769u, 32769u, 32769u, 1048576u, 1048576u, 1048576u, 1048576u, 1081345u, 1048576u, 1048576u,
				1048576u, 1048576u, 1048576u, 1048576u, 0u, 0u, 0u, 0u, 131072u, 0u,
				0u, 0u, 1073741824u, 32769u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 32769u, 32769u,
				32769u, 163841u, 163841u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 2147483648u, 2147483648u,
				2147483648u, 2147483648u, 2147483648u, 2147483648u, 2147483648u, 2147483648u, 2147483648u, 2147483648u, 2147483648u, 2147483648u,
				2147483648u, 2147483648u, 2147483648u, 2147483648u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 33587200u, 33587200u, 35651584u, 35651584u, 35652096u, 35651584u, 35651584u, 35652096u, 35652096u,
				35651584u, 35651584u, 35652096u, 35651584u, 35651584u, 35651584u, 35651584u, 35651584u, 35651584u, 35651584u,
				35651584u, 35651584u, 35651584u, 35651584u, 35651584u, 35651584u, 35651584u, 35651584u, 35651584u, 35651584u,
				35651584u, 35651584u, 35651584u, 35651584u, 35651584u, 35651584u, 35651584u, 35651584u, 35651584u, 35651584u,
				35651584u, 35651584u, 35651584u, 35651584u, 35717120u, 35717120u, 35717120u, 35717120u, 35717120u, 35717120u,
				35651584u, 35652096u, 35651584u, 35651584u, 35652096u, 35652096u, 35651584u, 35651584u, 35652096u, 35651584u,
				35651584u, 35651584u, 35651584u, 35651584u, 35651584u, 35651584u, 35651584u, 35651584u, 35651584u, 35651584u,
				35651584u, 35651584u, 35651584u, 35651584u, 35651584u, 35651584u, 35651584u, 35651584u, 35651584u, 35651584u,
				35651584u, 35651584u, 35651584u, 35651584u, 35651584u, 35651584u, 35651584u, 35651584u, 35651584u, 35651584u,
				35651584u, 35651584u, 35651584u, 35651584u, 35651584u, 35651584u, 35651584u, 35651584u, 35651584u, 35651584u,
				35651584u, 35651584u, 35651584u, 35651584u, 35651584u, 35651584u, 35651584u, 35651584u, 35651584u, 35651584u,
				35651584u, 35651584u, 35651584u, 35651584u, 35651584u, 35651584u, 35651584u, 35717120u, 35717120u, 35717120u,
				35717120u, 35651584u, 35651584u, 35651584u, 35651584u, 35651584u, 35651584u, 35651584u, 35717120u, 35651584u,
				35651584u, 35717120u, 35717120u, 35651584u, 35651584u, 35651584u, 35651584u, 35651584u, 35651584u, 35651584u,
				35651584u, 35651584u, 35651584u, 35651584u, 35651584u, 35717120u, 35717120u, 35717120u, 35717120u, 35717120u,
				35651584u, 35651584u, 35651584u, 35651584u, 35651584u, 35717120u, 35717120u, 35717120u, 35717120u, 35651584u,
				35651584u, 35651584u, 35651584u, 36192256u, 36192256u, 36192256u, 36192256u, 35717120u, 35717120u, 35651584u,
				35651584u, 35651584u, 35651584u, 35651584u, 35651584u, 35651584u, 35651584u, 36175872u, 36175872u, 36175872u,
				36175872u, 35651584u, 35651584u, 35651584u, 35651584u, 35651584u, 35651584u, 35651584u, 35651584u, 35651584u,
				35717120u, 35717120u, 35651584u, 35651584u, 35651584u, 35651584u, 35651584u, 35651584u, 35651584u, 35651584u,
				35651584u, 35651584u, 35717120u, 35651584u, 35651584u, 36175872u, 36175872u, 35651584u, 35651584u, 36175872u,
				36175872u, 35651584u, 35651584u, 35651584u, 35651584u, 36175872u, 36175872u, 35717120u, 35717120u, 35717120u,
				35651584u, 35651584u, 35651584u, 35651584u, 35651584u, 35651584u, 35651584u, 35651584u, 35717120u, 35717120u,
				35717120u, 35651584u, 35651584u, 35651584u, 35651584u, 35651584u, 35651584u, 35651584u, 35651584u, 35717120u,
				35717120u, 35717120u, 35651584u, 35651584u, 35651584u, 35651584u, 35651584u, 35651584u, 35651584u, 35651584u,
				35651584u, 35651584u, 35651584u, 35651584u, 35651584u, 35717120u, 35717120u, 35651584u, 65536u, 65536u,
				65536u, 65536u, 65536u, 65536u, 0u, 0u, 0u, 0u, 0u, 0u,
				0u, 0u, 0u, 0u, 32769u, 32769u, 32769u, 32769u, 0u, 0u,
				1048576u, 1048576u, 1048576u, 1048576u, 1048576u, 1048576u, 1048576u, 1048576u, 0u, 0u,
				0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u, 0u,
				1064960u, 0u, 0u, 1048576u, 1048576u, 1048576u, 1048576u, 1048576u, 1048576u, 1048576u,
				1048576u, 1048576u, 1048576u, 1048576u, 1048576u, 0u, 0u, 0u, 0u, 1048576u,
				1048576u, 1048576u, 1048576u, 1048576u, 1048576u, 1048576u, 1048576u, 1048576u, 1048576u, 1048576u,
				1048576u, 1048576u, 1048576u, 1048576u, 1048576u, 1048576u, 1048576u, 1048576u, 1048576u, 1048576u,
				1048576u, 1048576u, 1048576u, 1048576u, 1048576u, 1048576u, 1048576u, 1048576u, 1048576u, 1048576u,
				1048576u
			};
		}

		private static uint[] GetOpcFlags2()
		{
			return new uint[4911]
			{
				503332863u, 503332863u, 503332863u, 503332863u, 503332863u, 503332863u, 503332863u, 503332863u, 335560688u, 503332863u,
				503332863u, 503332863u, 335560688u, 503332863u, 503332863u, 503332863u, 335560688u, 167788543u, 167788543u, 176176767u,
				176176767u, 503332863u, 503332863u, 503332863u, 335560688u, 503332863u, 503332863u, 503332863u, 335560688u, 503332863u,
				503332863u, 503332863u, 335560688u, 167788543u, 167788543u, 167788543u, 503332863u, 503332863u, 503332863u, 335560688u,
				503332863u, 503332863u, 503332863u, 335560688u, 503332863u, 503332863u, 503332863u, 335560688u, 167788543u, 167788543u,
				176176767u, 176176767u, 503332863u, 503332863u, 503332863u, 335560688u, 503332863u, 503332863u, 503332863u, 335560688u,
				503332863u, 503332863u, 503332863u, 335560688u, 167788543u, 167788543u, 176176767u, 176176767u, 503332863u, 503332863u,
				503332863u, 335560688u, 503332863u, 503332863u, 503332863u, 335560688u, 503332863u, 503332863u, 503332863u, 335560688u,
				167788543u, 503332863u, 503332863u, 503332863u, 335560688u, 503332863u, 503332863u, 503332863u, 335560688u, 503332863u,
				503332863u, 503332863u, 335560688u, 167788543u, 503332863u, 503332863u, 503332863u, 335560688u, 503332863u, 503332863u,
				503332863u, 335560688u, 503332863u, 503332863u, 503332863u, 335560688u, 167788543u, 503332863u, 503332863u, 503332863u,
				335560688u, 503332863u, 503332863u, 503332863u, 335560688u, 503332863u, 503332863u, 503332863u, 335560688u, 167788543u,
				167788543u, 167788543u, 167788543u, 167788543u, 503332863u, 167788543u, 335560688u, 503332863u, 167788543u, 335560688u,
				167788543u, 167788543u, 167788543u, 167788543u, 178536447u, 178536447u, 167788538u, 167788538u, 335560688u, 335560688u,
				335560688u, 503332863u, 167788543u, 335560688u, 503332863u, 503332863u, 335560688u, 503332863u, 167788543u, 335560688u,
				503332863u, 503332863u, 335560688u, 514080383u, 514080383u, 514080383u, 514080383u, 514080383u, 514080383u, 436223999u,
				167788543u, 335560688u, 436223999u, 167788543u, 335560688u, 436223999u, 167788543u, 335560688u, 436223999u, 167788543u,
				335560688u, 436223999u, 167788543u, 335560688u, 436223999u, 167788543u, 335560688u, 436223999u, 167788543u, 335560688u,
				436223999u, 167788543u, 335560688u, 436223999u, 167788543u, 335560688u, 436223999u, 167788543u, 335560688u, 436223999u,
				167788543u, 335560688u, 436223999u, 167788543u, 335560688u, 436223999u, 167788543u, 335560688u, 436223999u, 167788543u,
				335560688u, 436223999u, 167788543u, 335560688u, 436223999u, 167788543u, 335560688u, 503332863u, 503332863u, 503332863u,
				503332863u, 503332863u, 503332863u, 503332863u, 503332863u, 503332863u, 503332863u, 335560688u, 503332863u, 503332863u,
				335560688u, 503332863u, 503332863u, 335560688u, 503332863u, 503332863u, 335560688u, 503332863u, 503332863u, 335560688u,
				503332863u, 503332863u, 335560688u, 503332863u, 503332863u, 335560688u, 503332863u, 503332863u, 335560688u, 167788543u,
				167788543u, 167788543u, 167788543u, 167788543u, 167788543u, 167788543u, 167788543u, 503332863u, 503332863u, 335560688u,
				503332863u, 503332863u, 335560688u, 503332863u, 503332863u, 335560688u, 503332863u, 503332863u, 335560688u, 503332863u,
				503332863u, 335560688u, 503332863u, 503332863u, 335560688u, 503332863u, 503332863u, 335560688u, 503332863u, 503332863u,
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				503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332863u, 503332863u, 503332858u,
				503332858u, 503332858u, 503332858u, 503332858u, 503332863u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u,
				503332863u, 503332858u, 503332858u, 335560688u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u,
				503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u,
				503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u,
				503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 335560688u, 503332858u, 335560688u, 503332858u, 335560688u,
				503332858u, 335560688u, 503332858u, 335560688u, 503332858u, 335560688u, 503332858u, 335560688u, 503332858u, 335560688u,
				503332858u, 335560688u, 503332858u, 335560688u, 503332858u, 335560688u, 503332858u, 503332858u, 503332858u, 503332858u,
				503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u,
				503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u,
				503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u,
				503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u,
				503332858u, 503332858u, 335560688u, 503332858u, 335560688u, 503332858u, 335560688u, 2113945599u, 2113945599u, 2113945599u,
				2113945599u, 1778401279u, 1778401279u, 2113945599u, 2113945599u, 2113945599u, 2113945599u, 2113945599u, 2113945599u, 2113945599u,
				2113945599u, 2113945599u, 2113945599u, 2113945599u, 2113945599u, 2113945599u, 2113945599u, 2113945599u, 2113945599u, 2113945599u,
				2113945599u, 2113945599u, 2113945599u, 337657456u, 335560304u, 335560304u, 169885307u, 505429627u, 337657456u, 503332863u,
				520110079u, 520110079u, 169885306u, 505429626u, 337657456u, 505429626u, 503332863u, 503332863u, 503332863u, 503332863u,
				503332863u, 402669567u, 504381439u, 344079984u, 339754992u, 339754992u, 339754992u, 339754992u, 339754992u, 339754992u,
				339754992u, 339754992u, 339754992u, 339754992u, 339754992u, 339754992u, 176177151u, 176177151u, 167788139u, 167788139u,
				167788155u, 167788155u, 167788155u, 167788155u, 167788155u, 167788155u, 167788155u, 167788155u, 167788155u, 167788155u,
				167788155u, 167788155u, 167788155u, 167788155u, 167788543u, 1778401279u, 1778401279u, 1778401279u, 1778401279u, 1778401279u,
				1778401279u, 1778401279u, 1778401279u, 1778401279u, 1778401279u, 1778401279u, 1778401279u, 167788543u, 167788543u, 167788543u,
				167788543u, 167788543u, 167788543u, 167788543u, 167788543u, 167788543u, 167788543u, 167788543u, 167788543u, 511850619u,
				343942256u, 343942256u, 344071248u, 511721471u, 511721471u, 511721471u, 511721471u, 511983227u, 2122334207u, 2122334207u,
				2122334207u, 2122334207u, 1048592383u, 1048592383u, 503332858u, 503332858u, 503332858u, 504381439u, 339754608u, 335560304u,
				339754608u, 339754608u, 335822448u, 507526779u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u,
				503332858u, 503332858u, 167788543u, 503332863u, 335560688u, 167788543u, 503332863u, 335560688u, 335560304u, 335560304u,
				335560304u, 335560304u, 335560304u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u,
				503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u,
				503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u,
				503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u,
				503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u,
				503332858u, 335560688u, 503332858u, 503332858u, 335560688u, 503332858u, 335560688u, 503332858u, 503332858u, 503332858u,
				503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u,
				503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 335560688u, 503332858u, 335560688u,
				503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 335560688u, 503332858u, 503332858u,
				503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u,
				503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u,
				503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u,
				503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u,
				503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u,
				503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u,
				503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u,
				503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u,
				503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u,
				503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u,
				503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u,
				503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 335560688u, 503332858u, 335560688u, 503332858u, 503332858u,
				503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u,
				503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u,
				503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u,
				503332858u, 503332863u, 503332863u, 335560688u, 335560688u, 335560688u, 335560688u, 335560688u, 335560688u, 335560688u,
				335560688u, 335560688u, 335560688u, 335560688u, 335560688u, 335560688u, 335560688u, 335560688u, 335560688u, 335560688u,
				335560688u, 335560688u, 335560688u, 335560688u, 335560688u, 335560688u, 335560688u, 335560688u, 335560688u, 335560688u,
				335560688u, 335560688u, 335560688u, 335560688u, 335560688u, 335560688u, 872431600u, 872431600u, 872431600u, 872431600u,
				872431600u, 872431600u, 872431600u, 872431600u, 335560688u, 335560688u, 335560688u, 335560688u, 335560688u, 335560688u,
				335560688u, 335560688u, 335560688u, 335560688u, 335560688u, 335560688u, 335560688u, 335560688u, 335560688u, 335560688u,
				335560688u, 335560688u, 335560688u, 335560688u, 335560688u, 335560688u, 335560688u, 335560688u, 335560688u, 335560688u,
				335560688u, 335560688u, 335560688u, 335560688u, 335560688u, 872431600u, 335560688u, 335560688u, 335560688u, 335560688u,
				335560688u, 335560688u, 872431600u, 335560688u, 335560688u, 335560688u, 335560688u, 335560688u, 872431600u, 872431600u,
				335560688u, 335560688u, 335560688u, 335560688u, 335560688u, 335560688u, 335560688u, 335560688u, 335560688u, 335560688u,
				335560688u, 335560688u, 335560688u, 335560688u, 335560688u, 872431600u, 335560688u, 335560688u, 335560688u, 335560688u,
				335560688u, 335560688u, 335560688u, 335560688u, 335560688u, 335560688u, 335560688u, 335560688u, 335560688u, 335560688u,
				335560688u, 335560688u, 335560688u, 335560688u, 335560688u, 335560688u, 335560688u, 335560688u, 335560688u, 335560688u,
				335560688u, 335560688u, 335560688u, 335560688u, 335560688u, 335560688u, 335560688u, 3556786160u, 3556786160u, 3556786160u,
				3556786160u, 335560688u, 335560688u, 335560688u, 335560688u, 335560688u, 335560688u, 335560688u, 335560688u, 335560688u,
				335560688u, 335560688u, 335560688u, 3556786160u, 3556786160u, 335560688u, 335560688u, 335560688u, 335560688u, 872431600u,
				335560688u, 335560688u, 335560688u, 335560688u, 335560688u, 335560688u, 335560688u, 335560688u, 335560688u, 335560688u,
				335560688u, 335560688u, 335560688u, 335560688u, 335560688u, 335560688u, 335560688u, 335560688u, 335560688u, 335560688u,
				335560688u, 335560688u, 335560688u, 335560688u, 335560688u, 335560688u, 335560688u, 335560688u, 335560688u, 335560688u,
				335560688u, 335560688u, 335560688u, 335560688u, 335560688u, 335560688u, 335560688u, 335560688u, 335560688u, 335560688u,
				335560688u, 335560688u, 335560688u, 335560688u, 335560688u, 335560688u, 335560688u, 335560688u, 335560688u, 335560688u,
				335560688u, 335560688u, 335560688u, 335560688u, 335560688u, 335560688u, 335560688u, 335560688u, 335560688u, 335560688u,
				335560688u, 335560688u, 335560688u, 335560688u, 335560688u, 335560688u, 335560688u, 335560688u, 335560688u, 335560688u,
				335560688u, 335560688u, 335560688u, 335560688u, 335560688u, 335560688u, 335560688u, 335560688u, 335560688u, 335560688u,
				335560688u, 335560688u, 335560688u, 335560688u, 872431600u, 872431600u, 335560688u, 335560688u, 335560688u, 335560688u,
				335560688u, 335560688u, 335560688u, 335560688u, 335560688u, 335560688u, 335560688u, 335560688u, 167788543u, 503332863u,
				335560688u, 167788543u, 503332863u, 335560688u, 167788543u, 503332863u, 335560688u, 167788543u, 503332863u, 335560688u,
				167788543u, 503332863u, 335560688u, 503332863u, 514080379u, 346308208u, 346308208u, 337657456u, 503332863u, 503332863u,
				507527167u, 339754992u, 507527167u, 339754992u, 507527167u, 339754992u, 507527167u, 339754992u, 503332858u, 503332858u,
				503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u,
				339754992u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u,
				503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 503332858u, 872431600u,
				872431600u, 872431600u, 872431600u, 872431600u, 872431600u, 872431600u, 872431600u, 872431600u, 872431600u, 872431600u,
				872431600u, 872431600u, 872431600u, 872431600u, 872431600u, 872431600u, 872431600u, 872431600u, 872431600u, 872431600u,
				872431600u, 872431600u, 872431600u, 872431600u, 872431600u, 872431600u, 872431600u, 872431600u, 872431600u, 872431600u,
				872431600u
			};
		}
	}
	internal static class OpCodeInfos
	{
		public static readonly OpCodeInfo[] Infos = CreateInfos();

		private static OpCodeInfo[] CreateInfos()
		{
			OpCodeInfo[] array = new OpCodeInfo[4911];
			uint[] encFlags = EncoderData.EncFlags1;
			uint[] encFlags2 = EncoderData.EncFlags2;
			uint[] encFlags3 = EncoderData.EncFlags3;
			uint[] opcFlags = OpCodeInfoData.OpcFlags1;
			uint[] opcFlags2 = OpCodeInfoData.OpcFlags2;
			StringBuilder sb = new StringBuilder();
			for (int i = 0; i < array.Length; i++)
			{
				array[i] = new OpCodeInfo((Code)i, (EncFlags1)encFlags[i], (EncFlags2)encFlags2[i], (EncFlags3)encFlags3[i], (OpCodeInfoFlags1)opcFlags[i], (OpCodeInfoFlags2)opcFlags2[i], sb);
			}
			return array;
		}
	}
	[Flags]
	internal enum OpCodeInfoFlags1 : uint
	{
		None = 0u,
		Cpl0Only = 1u,
		Cpl3Only = 2u,
		InputOutput = 4u,
		Nop = 8u,
		ReservedNop = 0x10u,
		SerializingIntel = 0x20u,
		SerializingAmd = 0x40u,
		MayRequireCpl0 = 0x80u,
		CetTracked = 0x100u,
		NonTemporal = 0x200u,
		FpuNoWait = 0x400u,
		IgnoresModBits = 0x800u,
		No66 = 0x1000u,
		NFx = 0x2000u,
		RequiresUniqueRegNums = 0x4000u,
		Privileged = 0x8000u,
		SaveRestore = 0x10000u,
		StackInstruction = 0x20000u,
		IgnoresSegment = 0x40000u,
		OpMaskReadWrite = 0x80000u,
		ModRegRmString = 0x100000u,
		DecOptionValueMask = 0x1Fu,
		DecOptionValueShift = 0x15u,
		ForceOpSize64 = 0x40000000u,
		RequiresUniqueDestRegNum = 0x80000000u
	}
	[Flags]
	internal enum OpCodeInfoFlags2 : uint
	{
		None = 0u,
		RealMode = 1u,
		ProtectedMode = 2u,
		Virtual8086Mode = 4u,
		CompatibilityMode = 8u,
		UseOutsideSmm = 0x10u,
		UseInSmm = 0x20u,
		UseOutsideEnclaveSgx = 0x40u,
		UseInEnclaveSgx1 = 0x80u,
		UseInEnclaveSgx2 = 0x100u,
		UseOutsideVmxOp = 0x200u,
		UseInVmxRootOp = 0x400u,
		UseInVmxNonRootOp = 0x800u,
		UseOutsideSeam = 0x1000u,
		UseInSeam = 0x2000u,
		TdxNonRootGenUd = 0x4000u,
		TdxNonRootGenVe = 0x8000u,
		TdxNonRootMayGenEx = 0x10000u,
		IntelVmExit = 0x20000u,
		IntelMayVmExit = 0x40000u,
		IntelSmmVmExit = 0x80000u,
		AmdVmExit = 0x100000u,
		AmdMayVmExit = 0x200000u,
		TsxAbort = 0x400000u,
		TsxImplAbort = 0x800000u,
		TsxMayAbort = 0x1000000u,
		IntelDecoder16or32 = 0x2000000u,
		IntelDecoder64 = 0x4000000u,
		AmdDecoder16or32 = 0x8000000u,
		AmdDecoder64 = 0x10000000u,
		InstrStrFmtOptionMask = 7u,
		InstrStrFmtOptionShift = 0x1Du
	}
	internal enum InstrStrFmtOption
	{
		None,
		OpMaskIsK1_or_NoGprSuffix,
		IncVecIndex,
		NoVecIndex,
		SwapVecIndex12,
		SkipOp0,
		VecIndexSameAsOpIndex
	}
	internal static class OpCodeOperandKinds
	{
		public static ReadOnlySpan<byte> LegacyOpKinds => new byte[76]
		{
			0, 1, 2, 3, 4, 5, 6, 13, 14, 15,
			16, 17, 18, 19, 20, 23, 25, 26, 27, 28,
			29, 30, 31, 32, 33, 34, 36, 37, 38, 39,
			41, 46, 47, 48, 49, 63, 64, 65, 66, 67,
			68, 69, 70, 71, 72, 73, 74, 75, 76, 77,
			78, 79, 80, 82, 83, 84, 85, 86, 87, 88,
			89, 90, 91, 92, 93, 94, 95, 96, 97, 98,
			99, 100, 101, 102, 103, 104
		};

		public static ReadOnlySpan<byte> VexOpKinds => new byte[39]
		{
			0, 4, 7, 8, 9, 10, 15, 17, 20, 21,
			24, 31, 33, 35, 36, 38, 40, 42, 44, 45,
			48, 49, 50, 52, 53, 54, 55, 56, 57, 58,
			81, 82, 93, 97, 100, 105, 106, 107, 108
		};

		public static ReadOnlySpan<byte> XopOpKinds => new byte[19]
		{
			0, 15, 17, 20, 21, 31, 33, 35, 36, 38,
			40, 48, 50, 52, 54, 56, 57, 82, 88
		};

		public static ReadOnlySpan<byte> EvexOpKinds => new byte[32]
		{
			0, 4, 7, 8, 9, 10, 11, 12, 15, 17,
			20, 21, 22, 31, 33, 36, 38, 42, 43, 44,
			48, 49, 50, 51, 54, 55, 56, 59, 60, 61,
			62, 82
		};

		public static ReadOnlySpan<byte> MvexOpKinds => new byte[9] { 0, 4, 11, 22, 42, 45, 59, 61, 82 };
	}
	internal abstract class Op
	{
		public abstract void Encode(Encoder encoder, in Instruction instruction, int operand);

		public virtual OpKind GetImmediateOpKind()
		{
			return (OpKind)(-1);
		}

		public virtual OpKind GetNearBranchOpKind()
		{
			return (OpKind)(-1);
		}

		public virtual OpKind GetFarBranchOpKind()
		{
			return (OpKind)(-1);
		}
	}
	internal sealed class OpModRM_rm_mem_only : Op
	{
		private readonly bool mustUseSib;

		public OpModRM_rm_mem_only(bool mustUseSib)
		{
			this.mustUseSib = mustUseSib;
		}

		public override void Encode(Encoder encoder, in Instruction instruction, int operand)
		{
			if (mustUseSib)
			{
				encoder.EncoderFlags |= EncoderFlags.MustUseSib;
			}
			encoder.AddRegOrMem(in instruction, operand, Register.None, Register.None, allowMemOp: true, allowRegOp: false);
		}
	}
	internal sealed class OpModRM_rm : Op
	{
		private readonly Register regLo;

		private readonly Register regHi;

		public OpModRM_rm(Register regLo, Register regHi)
		{
			this.regLo = regLo;
			this.regHi = regHi;
		}

		public override void Encode(Encoder encoder, in Instruction instruction, int operand)
		{
			encoder.AddRegOrMem(in instruction, operand, regLo, regHi, allowMemOp: true, allowRegOp: true);
		}
	}
	internal sealed class OpRegEmbed8 : Op
	{
		private readonly Register regLo;

		private readonly Register regHi;

		public OpRegEmbed8(Register regLo, Register regHi)
		{
			this.regLo = regLo;
			this.regHi = regHi;
		}

		public override void Encode(Encoder encoder, in Instruction instruction, int operand)
		{
			encoder.AddReg(in instruction, operand, regLo, regHi);
		}
	}
	internal sealed class OpModRM_rm_reg_only : Op
	{
		private readonly Register regLo;

		private readonly Register regHi;

		public OpModRM_rm_reg_only(Register regLo, Register regHi)
		{
			this.regLo = regLo;
			this.regHi = regHi;
		}

		public override void Encode(Encoder encoder, in Instruction instruction, int operand)
		{
			encoder.AddRegOrMem(in instruction, operand, regLo, regHi, allowMemOp: false, allowRegOp: true);
		}
	}
	internal sealed class OpModRM_reg : Op
	{
		private readonly Register regLo;

		private readonly Register regHi;

		public OpModRM_reg(Register regLo, Register regHi)
		{
			this.regLo = regLo;
			this.regHi = regHi;
		}

		public override void Encode(Encoder encoder, in Instruction instruction, int operand)
		{
			encoder.AddModRMRegister(in instruction, operand, regLo, regHi);
		}
	}
	internal sealed class OpModRM_reg_mem : Op
	{
		private readonly Register regLo;

		private readonly Register regHi;

		public OpModRM_reg_mem(Register regLo, Register regHi)
		{
			this.regLo = regLo;
			this.regHi = regHi;
		}

		public override void Encode(Encoder encoder, in Instruction instruction, int operand)
		{
			encoder.AddModRMRegister(in instruction, operand, regLo, regHi);
			encoder.EncoderFlags |= EncoderFlags.RegIsMemory;
		}
	}
	internal sealed class OpModRM_regF0 : Op
	{
		private readonly Register regLo;

		private readonly Register regHi;

		public OpModRM_regF0(Register regLo, Register regHi)
		{
			this.regLo = regLo;
			this.regHi = regHi;
		}

		public override void Encode(Encoder encoder, in Instruction instruction, int operand)
		{
			if (encoder.Bitness != 64 && instruction.GetOpKind(operand) == OpKind.Register && instruction.GetOpRegister(operand) >= regLo + 8 && instruction.GetOpRegister(operand) <= regLo + 15)
			{
				encoder.EncoderFlags |= EncoderFlags.PF0;
				encoder.AddModRMRegister(in instruction, operand, regLo + 8, regLo + 15);
			}
			else
			{
				encoder.AddModRMRegister(in instruction, operand, regLo, regHi);
			}
		}
	}
	internal sealed class OpReg : Op
	{
		private readonly Register register;

		public OpReg(Register register)
		{
			this.register = register;
		}

		public override void Encode(Encoder encoder, in Instruction instruction, int operand)
		{
			encoder.Verify(operand, OpKind.Register, instruction.GetOpKind(operand));
			encoder.Verify(operand, register, instruction.GetOpRegister(operand));
		}
	}
	internal sealed class OpRegSTi : Op
	{
		public override void Encode(Encoder encoder, in Instruction instruction, int operand)
		{
			if (encoder.Verify(operand, OpKind.Register, instruction.GetOpKind(operand)))
			{
				Register opRegister = instruction.GetOpRegister(operand);
				if (encoder.Verify(operand, opRegister, Register.ST0, Register.ST7))
				{
					encoder.OpCode |= (uint)(opRegister - 217);
				}
			}
		}
	}
	internal sealed class OprDI : Op
	{
		private static int GetRegSize(OpKind opKind)
		{
			return opKind switch
			{
				OpKind.MemorySegRDI => 8, 
				OpKind.MemorySegEDI => 4, 
				OpKind.MemorySegDI => 2, 
				_ => 0, 
			};
		}

		public override void Encode(Encoder encoder, in Instruction instruction, int operand)
		{
			int regSize = GetRegSize(instruction.GetOpKind(operand));
			if (regSize == 0)
			{
				encoder.ErrorMessage = string.Format("Operand {0}: expected OpKind = {1}, {2} or {3}", operand, "MemorySegDI", "MemorySegEDI", "MemorySegRDI");
			}
			else
			{
				encoder.SetAddrSize(regSize);
			}
		}
	}
	internal sealed class OpIb : Op
	{
		private readonly OpKind opKind;

		public OpIb(OpKind opKind)
		{
			this.opKind = opKind;
		}

		public override void Encode(Encoder encoder, in Instruction instruction, int operand)
		{
			switch (encoder.ImmSize)
			{
			case ImmSize.Size1:
				if (encoder.Verify(operand, OpKind.Immediate8_2nd, instruction.GetOpKind(operand)))
				{
					encoder.ImmSize = ImmSize.Size1_1;
					encoder.ImmediateHi = instruction.Immediate8_2nd;
				}
				return;
			case ImmSize.Size2:
				if (encoder.Verify(operand, OpKind.Immediate8_2nd, instruction.GetOpKind(operand)))
				{
					encoder.ImmSize = ImmSize.Size2_1;
					encoder.ImmediateHi = instruction.Immediate8_2nd;
				}
				return;
			}
			OpKind actual = instruction.GetOpKind(operand);
			if (encoder.Verify(operand, opKind, actual))
			{
				encoder.ImmSize = ImmSize.Size1;
				encoder.Immediate = instruction.Immediate8;
			}
		}

		public override OpKind GetImmediateOpKind()
		{
			return opKind;
		}
	}
	internal sealed class OpIw : Op
	{
		public override void Encode(Encoder encoder, in Instruction instruction, int operand)
		{
			if (encoder.Verify(operand, OpKind.Immediate16, instruction.GetOpKind(operand)))
			{
				encoder.ImmSize = ImmSize.Size2;
				encoder.Immediate = instruction.Immediate16;
			}
		}

		public override OpKind GetImmediateOpKind()
		{
			return OpKind.Immediate16;
		}
	}
	internal sealed class OpId : Op
	{
		private readonly OpKind opKind;

		public OpId(OpKind opKind)
		{
			this.opKind = opKind;
		}

		public override void Encode(Encoder encoder, in Instruction instruction, int operand)
		{
			OpKind actual = instruction.GetOpKind(operand);
			if (encoder.Verify(operand, opKind, actual))
			{
				encoder.ImmSize = ImmSize.Size4;
				encoder.Immediate = instruction.Immediate32;
			}
		}

		public override OpKind GetImmediateOpKind()
		{
			return opKind;
		}
	}
	internal sealed class OpIq : Op
	{
		public override void Encode(Encoder encoder, in Instruction instruction, int operand)
		{
			if (encoder.Verify(operand, OpKind.Immediate64, instruction.GetOpKind(operand)))
			{
				encoder.ImmSize = ImmSize.Size8;
				ulong immediate = instruction.Immediate64;
				encoder.Immediate = (uint)immediate;
				encoder.ImmediateHi = (uint)(immediate >> 32);
			}
		}

		public override OpKind GetImmediateOpKind()
		{
			return OpKind.Immediate64;
		}
	}
	internal sealed class OpI4 : Op
	{
		public override void Encode(Encoder encoder, in Instruction instruction, int operand)
		{
			OpKind opKind = instruction.GetOpKind(operand);
			if (encoder.Verify(operand, OpKind.Immediate8, opKind))
			{
				if (instruction.Immediate8 > 15)
				{
					encoder.ErrorMessage = $"Operand {operand}: Immediate value must be 0-15, but value is 0x{instruction.Immediate8:X2}";
					return;
				}
				encoder.ImmSize = ImmSize.Size1;
				encoder.Immediate |= instruction.Immediate8;
			}
		}

		public override OpKind GetImmediateOpKind()
		{
			return OpKind.Immediate8;
		}
	}
	internal sealed class OpX : Op
	{
		internal static int GetXRegSize(OpKind opKind)
		{
			return opKind switch
			{
				OpKind.MemorySegRSI => 8, 
				OpKind.MemorySegESI => 4, 
				OpKind.MemorySegSI => 2, 
				_ => 0, 
			};
		}

		internal static int GetYRegSize(OpKind opKind)
		{
			return opKind switch
			{
				OpKind.MemoryESRDI => 8, 
				OpKind.MemoryESEDI => 4, 
				OpKind.MemoryESDI => 2, 
				_ => 0, 
			};
		}

		public override void Encode(Encoder encoder, in Instruction instruction, int operand)
		{
			int xRegSize = GetXRegSize(instruction.GetOpKind(operand));
			if (xRegSize == 0)
			{
				encoder.ErrorMessage = string.Format("Operand {0}: expected OpKind = {1}, {2} or {3}", operand, "MemorySegSI", "MemorySegESI", "MemorySegRSI");
				return;
			}
			Code code = instruction.Code;
			if ((uint)(code - 331) <= 3u)
			{
				int yRegSize = GetYRegSize(instruction.Op0Kind);
				if (xRegSize != yRegSize)
				{
					encoder.ErrorMessage = $"Same sized register must be used: reg #1 size = {yRegSize * 8}, reg #2 size = {xRegSize * 8}";
					return;
				}
			}
			encoder.SetAddrSize(xRegSize);
		}
	}
	internal sealed class OpY : Op
	{
		public override void Encode(Encoder encoder, in Instruction instruction, int operand)
		{
			int yRegSize = OpX.GetYRegSize(instruction.GetOpKind(operand));
			if (yRegSize == 0)
			{
				encoder.ErrorMessage = string.Format("Operand {0}: expected OpKind = {1}, {2} or {3}", operand, "MemoryESDI", "MemoryESEDI", "MemoryESRDI");
				return;
			}
			Code code = instruction.Code;
			if ((uint)(code - 335) <= 3u)
			{
				int xRegSize = OpX.GetXRegSize(instruction.Op0Kind);
				if (xRegSize != yRegSize)
				{
					encoder.ErrorMessage = $"Same sized register must be used: reg #1 size = {xRegSize * 8}, reg #2 size = {yRegSize * 8}";
					return;
				}
			}
			encoder.SetAddrSize(yRegSize);
		}
	}
	internal sealed class OpMRBX : Op
	{
		public override void Encode(Encoder encoder, in Instruction instruction, int operand)
		{
			if (encoder.Verify(operand, OpKind.Memory, instruction.GetOpKind(operand)))
			{
				Register memoryBase = instruction.MemoryBase;
				if (instruction.MemoryDisplSize != 0 || instruction.MemoryDisplacement64 != 0L || instruction.MemoryIndexScale != 1 || instruction.MemoryIndex != Register.AL || (memoryBase != Register.BX && memoryBase != Register.EBX && memoryBase != Register.RBX))
				{
					encoder.ErrorMessage = $"Operand {operand}: Operand must be [bx+al], [ebx+al], or [rbx+al]";
					return;
				}
				encoder.SetAddrSize(memoryBase switch
				{
					Register.RBX => 8, 
					Register.EBX => 4, 
					_ => 2, 
				});
			}
		}
	}
	internal sealed class OpJ : Op
	{
		private readonly OpKind opKind;

		private readonly int immSize;

		public OpJ(OpKind opKind, int immSize)
		{
			this.opKind = opKind;
			this.immSize = immSize;
		}

		public override void Encode(Encoder encoder, in Instruction instruction, int operand)
		{
			encoder.AddBranch(opKind, immSize, in instruction, operand);
		}

		public override OpKind GetNearBranchOpKind()
		{
			return opKind;
		}
	}
	internal sealed class OpJx : Op
	{
		private readonly int immSize;

		public OpJx(int immSize)
		{
			this.immSize = immSize;
		}

		public override void Encode(Encoder encoder, in Instruction instruction, int operand)
		{
			encoder.AddBranchX(immSize, in instruction, operand);
		}

		public override OpKind GetNearBranchOpKind()
		{
			return base.GetNearBranchOpKind();
		}
	}
	internal sealed class OpJdisp : Op
	{
		private readonly int displSize;

		public OpJdisp(int displSize)
		{
			this.displSize = displSize;
		}

		public override void Encode(Encoder encoder, in Instruction instruction, int operand)
		{
			encoder.AddBranchDisp(displSize, in instruction, operand);
		}

		public override OpKind GetNearBranchOpKind()
		{
			if (displSize != 2)
			{
				return OpKind.NearBranch32;
			}
			return OpKind.NearBranch16;
		}
	}
	internal sealed class OpA : Op
	{
		private readonly int size;

		public OpA(int size)
		{
			this.size = size;
		}

		public override void Encode(Encoder encoder, in Instruction instruction, int operand)
		{
			encoder.AddFarBranch(in instruction, operand, size);
		}

		public override OpKind GetFarBranchOpKind()
		{
			if (size != 2)
			{
				return OpKind.FarBranch32;
			}
			return OpKind.FarBranch16;
		}
	}
	internal sealed class OpO : Op
	{
		public override void Encode(Encoder encoder, in Instruction instruction, int operand)
		{
			encoder.AddAbsMem(in instruction, operand);
		}
	}
	internal sealed class OpImm : Op
	{
		private readonly byte value;

		public OpImm(byte value)
		{
			this.value = value;
		}

		public override void Encode(Encoder encoder, in Instruction instruction, int operand)
		{
			if (encoder.Verify(operand, OpKind.Immediate8, instruction.GetOpKind(operand)) && instruction.Immediate8 != value)
			{
				encoder.ErrorMessage = $"Operand {operand}: Expected 0x{value:X2}, actual: 0x{instruction.Immediate8:X2}";
			}
		}

		public override OpKind GetImmediateOpKind()
		{
			return OpKind.Immediate8;
		}
	}
	internal sealed class OpHx : Op
	{
		private readonly Register regLo;

		private readonly Register regHi;

		public OpHx(Register regLo, Register regHi)
		{
			this.regLo = regLo;
			this.regHi = regHi;
		}

		public override void Encode(Encoder encoder, in Instruction instruction, int operand)
		{
			if (encoder.Verify(operand, OpKind.Register, instruction.GetOpKind(operand)))
			{
				Register opRegister = instruction.GetOpRegister(operand);
				if (encoder.Verify(operand, opRegister, regLo, regHi))
				{
					encoder.EncoderFlags |= (EncoderFlags)(opRegister - regLo << 27);
				}
			}
		}
	}
	internal sealed class OpVsib : Op
	{
		private readonly Register vsibIndexRegLo;

		private readonly Register vsibIndexRegHi;

		public OpVsib(Register regLo, Register regHi)
		{
			vsibIndexRegLo = regLo;
			vsibIndexRegHi = regHi;
		}

		public override void Encode(Encoder encoder, in Instruction instruction, int operand)
		{
			encoder.EncoderFlags |= EncoderFlags.MustUseSib;
			encoder.AddRegOrMem(in instruction, operand, Register.None, Register.None, vsibIndexRegLo, vsibIndexRegHi, allowMemOp: true, allowRegOp: false);
		}
	}
	internal sealed class OpIsX : Op
	{
		private readonly Register regLo;

		private readonly Register regHi;

		public OpIsX(Register regLo, Register regHi)
		{
			this.regLo = regLo;
			this.regHi = regHi;
		}

		public override void Encode(Encoder encoder, in Instruction instruction, int operand)
		{
			if (encoder.Verify(operand, OpKind.Register, instruction.GetOpKind(operand)))
			{
				Register opRegister = instruction.GetOpRegister(operand);
				if (encoder.Verify(operand, opRegister, regLo, regHi))
				{
					encoder.ImmSize = ImmSize.SizeIbReg;
					encoder.Immediate = (uint)(opRegister - regLo << 4);
				}
			}
		}
	}
	internal static class OpHandlerData
	{
		public static readonly Op[] LegacyOps = new Op[75]
		{
			new OpA(2),
			new OpA(4),
			new OpO(),
			new OpModRM_rm_mem_only(mustUseSib: false),
			new OpModRM_rm_mem_only(mustUseSib: false),
			new OpModRM_rm_mem_only(mustUseSib: false),
			new OpModRM_rm(Register.AL, Register.R15L),
			new OpModRM_rm(Register.AX, Register.R15W),
			new OpModRM_rm(Register.EAX, Register.R15D),
			new OpModRM_rm(Register.EAX, Register.R15D),
			new OpModRM_rm(Register.RAX, Register.R15),
			new OpModRM_rm(Register.RAX, Register.R15),
			new OpModRM_rm(Register.MM0, Register.MM7),
			new OpModRM_rm(Register.XMM0, Register.XMM15),
			new OpModRM_rm(Register.BND0, Register.BND3),
			new OpModRM_reg(Register.AL, Register.R15L),
			new OpRegEmbed8(Register.AL, Register.R15L),
			new OpModRM_reg(Register.AX, Register.R15W),
			new OpModRM_reg_mem(Register.AX, Register.R15W),
			new OpModRM_rm_reg_only(Register.AX, Register.R15W),
			new OpRegEmbed8(Register.AX, Register.R15W),
			new OpModRM_reg(Register.EAX, Register.R15D),
			new OpModRM_reg_mem(Register.EAX, Register.R15D),
			new OpModRM_rm_reg_only(Register.EAX, Register.R15D),
			new OpRegEmbed8(Register.EAX, Register.R15D),
			new OpModRM_reg(Register.RAX, Register.R15),
			new OpModRM_reg_mem(Register.RAX, Register.R15),
			new OpModRM_rm_reg_only(Register.RAX, Register.R15),
			new OpRegEmbed8(Register.RAX, Register.R15),
			new OpModRM_reg(Register.ES, Register.GS),
			new OpModRM_reg(Register.MM0, Register.MM7),
			new OpModRM_rm_reg_only(Register.MM0, Register.MM7),
			new OpModRM_reg(Register.XMM0, Register.XMM15),
			new OpModRM_rm_reg_only(Register.XMM0, Register.XMM15),
			new OpModRM_regF0(Register.CR0, Register.CR15),
			new OpModRM_reg(Register.DR0, Register.DR15),
			new OpModRM_reg(Register.TR0, Register.TR7),
			new OpModRM_reg(Register.BND0, Register.BND3),
			new OpReg(Register.ES),
			new OpReg(Register.CS),
			new OpReg(Register.SS),
			new OpReg(Register.DS),
			new OpReg(Register.FS),
			new OpReg(Register.GS),
			new OpReg(Register.AL),
			new OpReg(Register.CL),
			new OpReg(Register.AX),
			new OpReg(Register.DX),
			new OpReg(Register.EAX),
			new OpReg(Register.RAX),
			new OpReg(Register.ST0),
			new OpRegSTi(),
			new OpIb(OpKind.Immediate8),
			new OpImm(1),
			new OpIb(OpKind.Immediate8to16),
			new OpIb(OpKind.Immediate8to32),
			new OpIb(OpKind.Immediate8to64),
			new OpIw(),
			new OpId(OpKind.Immediate32),
			new OpId(OpKind.Immediate32to64),
			new OpIq(),
			new OpX(),
			new OpY(),
			new OprDI(),
			new OpMRBX(),
			new OpJ(OpKind.NearBranch16, 1),
			new OpJ(OpKind.NearBranch32, 1),
			new OpJ(OpKind.NearBranch64, 1),
			new OpJ(OpKind.NearBranch16, 2),
			new OpJ(OpKind.NearBranch32, 4),
			new OpJ(OpKind.NearBranch64, 4),
			new OpJx(2),
			new OpJx(4),
			new OpJdisp(2),
			new OpJdisp(4)
		};

		public static readonly Op[] VexOps = new Op[38]
		{
			new OpModRM_rm_mem_only(mustUseSib: false),
			new OpVsib(Register.XMM0, Register.XMM15),
			new OpVsib(Register.XMM0, Register.XMM15),
			new OpVsib(Register.YMM0, Register.YMM15),
			new OpVsib(Register.YMM0, Register.YMM15),
			new OpModRM_rm(Register.EAX, Register.R15D),
			new OpModRM_rm(Register.RAX, Register.R15),
			new OpModRM_rm(Register.XMM0, Register.XMM15),
			new OpModRM_rm(Register.YMM0, Register.YMM15),
			new OpModRM_rm(Register.K0, Register.K7),
			new OpModRM_reg(Register.EAX, Register.R15D),
			new OpModRM_rm_reg_only(Register.EAX, Register.R15D),
			new OpHx(Register.EAX, Register.R15D),
			new OpModRM_reg(Register.RAX, Register.R15),
			new OpModRM_rm_reg_only(Register.RAX, Register.R15),
			new OpHx(Register.RAX, Register.R15),
			new OpModRM_reg(Register.K0, Register.K7),
			new OpModRM_rm_reg_only(Register.K0, Register.K7),
			new OpHx(Register.K0, Register.K7),
			new OpModRM_reg(Register.XMM0, Register.XMM15),
			new OpModRM_rm_reg_only(Register.XMM0, Register.XMM15),
			new OpHx(Register.XMM0, Register.XMM15),
			new OpIsX(Register.XMM0, Register.XMM15),
			new OpIsX(Register.XMM0, Register.XMM15),
			new OpModRM_reg(Register.YMM0, Register.YMM15),
			new OpModRM_rm_reg_only(Register.YMM0, Register.YMM15),
			new OpHx(Register.YMM0, Register.YMM15),
			new OpIsX(Register.YMM0, Register.YMM15),
			new OpIsX(Register.YMM0, Register.YMM15),
			new OpI4(),
			new OpIb(OpKind.Immediate8),
			new OprDI(),
			new OpJ(OpKind.NearBranch64, 1),
			new OpJ(OpKind.NearBranch64, 4),
			new OpModRM_rm_mem_only(mustUseSib: true),
			new OpModRM_reg(Register.TMM0, Register.TMM7),
			new OpModRM_rm_reg_only(Register.TMM0, Register.TMM7),
			new OpHx(Register.TMM0, Register.TMM7)
		};

		public static readonly Op[] XopOps = new Op[18]
		{
			new OpModRM_rm(Register.EAX, Register.R15D),
			new OpModRM_rm(Register.RAX, Register.R15),
			new OpModRM_rm(Register.XMM0, Register.XMM15),
			new OpModRM_rm(Register.YMM0, Register.YMM15),
			new OpModRM_reg(Register.EAX, Register.R15D),
			new OpModRM_rm_reg_only(Register.EAX, Register.R15D),
			new OpHx(Register.EAX, Register.R15D),
			new OpModRM_reg(Register.RAX, Register.R15),
			new OpModRM_rm_reg_only(Register.RAX, Register.R15),
			new OpHx(Register.RAX, Register.R15),
			new OpModRM_reg(Register.XMM0, Register.XMM15),
			new OpHx(Register.XMM0, Register.XMM15),
			new OpIsX(Register.XMM0, Register.XMM15),
			new OpModRM_reg(Register.YMM0, Register.YMM15),
			new OpHx(Register.YMM0, Register.YMM15),
			new OpIsX(Register.YMM0, Register.YMM15),
			new OpIb(OpKind.Immediate8),
			new OpId(OpKind.Immediate32)
		};

		public static readonly Op[] EvexOps = new Op[31]
		{
			new OpModRM_rm_mem_only(mustUseSib: false),
			new OpVsib(Register.XMM0, Register.XMM31),
			new OpVsib(Register.XMM0, Register.XMM31),
			new OpVsib(Register.YMM0, Register.YMM31),
			new OpVsib(Register.YMM0, Register.YMM31),
			new OpVsib(Register.ZMM0, Register.ZMM31),
			new OpVsib(Register.ZMM0, Register.ZMM31),
			new OpModRM_rm(Register.EAX, Register.R15D),
			new OpModRM_rm(Register.RAX, Register.R15),
			new OpModRM_rm(Register.XMM0, Register.XMM31),
			new OpModRM_rm(Register.YMM0, Register.YMM31),
			new OpModRM_rm(Register.ZMM0, Register.ZMM31),
			new OpModRM_reg(Register.EAX, Register.R15D),
			new OpModRM_rm_reg_only(Register.EAX, Register.R15D),
			new OpModRM_reg(Register.RAX, Register.R15),
			new OpModRM_rm_reg_only(Register.RAX, Register.R15),
			new OpModRM_reg(Register.K0, Register.K7),
			new OpModRM_reg(Register.K0, Register.K7),
			new OpModRM_rm_reg_only(Register.K0, Register.K7),
			new OpModRM_reg(Register.XMM0, Register.XMM31),
			new OpModRM_rm_reg_only(Register.XMM0, Register.XMM31),
			new OpHx(Register.XMM0, Register.XMM31),
			new OpHx(Register.XMM0, Register.XMM31),
			new OpModRM_reg(Register.YMM0, Register.YMM31),
			new OpModRM_rm_reg_only(Register.YMM0, Register.YMM31),
			new OpHx(Register.YMM0, Register.YMM31),
			new OpModRM_reg(Register.ZMM0, Register.ZMM31),
			new OpModRM_rm_reg_only(Register.ZMM0, Register.ZMM31),
			new OpHx(Register.ZMM0, Register.ZMM31),
			new OpHx(Register.ZMM0, Register.ZMM31),
			new OpIb(OpKind.Immediate8)
		};

		public static readonly Op[] MvexOps = new Op[8]
		{
			new OpModRM_rm_mem_only(mustUseSib: false),
			new OpVsib(Register.ZMM0, Register.ZMM31),
			new OpModRM_rm(Register.ZMM0, Register.ZMM31),
			new OpModRM_reg(Register.K0, Register.K7),
			new OpHx(Register.K0, Register.K7),
			new OpModRM_reg(Register.ZMM0, Register.ZMM31),
			new OpHx(Register.ZMM0, Register.ZMM31),
			new OpIb(OpKind.Immediate8)
		};
	}
}
namespace Iced.Intel.DecoderInternal
{
	internal enum EvexOpCodeHandlerKind : byte
	{
		Invalid,
		Invalid2,
		Dup,
		HandlerReference,
		ArrayReference,
		RM,
		Group,
		W,
		MandatoryPrefix2,
		VectorLength,
		VectorLength_er,
		Ed_V_Ib,
		Ev_VX,
		Ev_VX_Ib,
		Gv_W_er,
		GvM_VX_Ib,
		HkWIb_3,
		HkWIb_3b,
		HWIb,
		KkHW_3,
		KkHW_3b,
		KkHWIb_sae_3,
		KkHWIb_sae_3b,
		KkHWIb_3,
		KkHWIb_3b,
		KkWIb_3,
		KkWIb_3b,
		KP1HW,
		KR,
		MV,
		V_H_Ev_er,
		V_H_Ev_Ib,
		VHM,
		VHW_3,
		VHW_4,
		VHWIb,
		VK,
		Vk_VSIB,
		VkEv_REXW_2,
		VkEv_REXW_3,
		VkHM,
		VkHW_3,
		VkHW_3b,
		VkHW_5,
		VkHW_er_4,
		VkHW_er_4b,
		VkHWIb_3,
		VkHWIb_3b,
		VkHWIb_5,
		VkHWIb_er_4,
		VkHWIb_er_4b,
		VkM,
		VkW_3,
		VkW_3b,
		VkW_4,
		VkW_4b,
		VkW_er_4,
		VkW_er_5,
		VkW_er_6,
		VkWIb_3,
		VkWIb_3b,
		VkWIb_er,
		VM,
		VSIB_k1,
		VSIB_k1_VX,
		VW,
		VW_er,
		VX_Ev,
		WkHV,
		WkV_3,
		WkV_4a,
		WkV_4b,
		WkVIb,
		WkVIb_er,
		WV,
		VkHW_er_ur_3,
		VkHW_er_ur_3b
	}
	internal sealed class EvexOpCodeHandlerReader : OpCodeHandlerReader
	{
		public override int ReadHandlers(ref TableDeserializer deserializer, OpCodeHandler[] result, int resultIndex)
		{
			ref OpCodeHandler reference = ref result[resultIndex];
			switch (deserializer.ReadEvexOpCodeHandlerKind())
			{
			case EvexOpCodeHandlerKind.Invalid:
				reference = OpCodeHandler_Invalid.Instance;
				return 1;
			case EvexOpCodeHandlerKind.Invalid2:
				result[resultIndex] = OpCodeHandler_Invalid.Instance;
				result[resultIndex + 1] = OpCodeHandler_Invalid.Instance;
				return 2;
			case EvexOpCodeHandlerKind.Dup:
			{
				int num = deserializer.ReadInt32();
				OpCodeHandler opCodeHandler = deserializer.ReadHandler();
				for (int i = 0; i < num; i++)
				{
					result[resultIndex + i] = opCodeHandler;
				}
				return num;
			}
			case EvexOpCodeHandlerKind.HandlerReference:
				reference = deserializer.ReadHandlerReference();
				return 1;
			case EvexOpCodeHandlerKind.ArrayReference:
				throw new InvalidOperationException();
			case EvexOpCodeHandlerKind.RM:
				reference = new OpCodeHandler_RM(deserializer.ReadHandler(), deserializer.ReadHandler());
				return 1;
			case EvexOpCodeHandlerKind.Group:
				reference = new OpCodeHandler_Group(deserializer.ReadArrayReference(4u));
				return 1;
			case EvexOpCodeHandlerKind.W:
				reference = new OpCodeHandler_W(deserializer.ReadHandler(), deserializer.ReadHandler());
				return 1;
			case EvexOpCodeHandlerKind.MandatoryPrefix2:
				reference = new OpCodeHandler_MandatoryPrefix2(deserializer.ReadHandler(), deserializer.ReadHandler(), deserializer.ReadHandler(), deserializer.ReadHandler());
				return 1;
			case EvexOpCodeHandlerKind.VectorLength:
				reference = new OpCodeHandler_VectorLength_EVEX(deserializer.ReadHandler(), deserializer.ReadHandler(), deserializer.ReadHandler());
				return 1;
			case EvexOpCodeHandlerKind.VectorLength_er:
				reference = new OpCodeHandler_VectorLength_EVEX_er(deserializer.ReadHandler(), deserializer.ReadHandler(), deserializer.ReadHandler());
				return 1;
			case EvexOpCodeHandlerKind.Ed_V_Ib:
			{
				Code code;
				reference = new OpCodeHandler_EVEX_Ed_V_Ib(deserializer.ReadRegister(), code = deserializer.ReadCode(), code + 1, deserializer.ReadTupleType(), deserializer.ReadTupleType());
				return 1;
			}
			case EvexOpCodeHandlerKind.Ev_VX:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_EVEX_Ev_VX(code, code + 1, deserializer.ReadTupleType(), deserializer.ReadTupleType());
				return 1;
			}
			case EvexOpCodeHandlerKind.Ev_VX_Ib:
			{
				Code code;
				reference = new OpCodeHandler_EVEX_Ev_VX_Ib(deserializer.ReadRegister(), code = deserializer.ReadCode(), code + 1);
				return 1;
			}
			case EvexOpCodeHandlerKind.Gv_W_er:
			{
				Code code;
				reference = new OpCodeHandler_EVEX_Gv_W_er(deserializer.ReadRegister(), code = deserializer.ReadCode(), code + 1, deserializer.ReadTupleType(), deserializer.ReadBoolean());
				return 1;
			}
			case EvexOpCodeHandlerKind.GvM_VX_Ib:
			{
				Code code;
				reference = new OpCodeHandler_EVEX_GvM_VX_Ib(deserializer.ReadRegister(), code = deserializer.ReadCode(), code + 1, deserializer.ReadTupleType(), deserializer.ReadTupleType());
				return 1;
			}
			case EvexOpCodeHandlerKind.HkWIb_3:
				reference = new OpCodeHandler_EVEX_HkWIb(deserializer.ReadRegister(), deserializer.ReadCode(), deserializer.ReadTupleType(), canBroadcast: false);
				return 1;
			case EvexOpCodeHandlerKind.HkWIb_3b:
				reference = new OpCodeHandler_EVEX_HkWIb(deserializer.ReadRegister(), deserializer.ReadCode(), deserializer.ReadTupleType(), canBroadcast: true);
				return 1;
			case EvexOpCodeHandlerKind.HWIb:
				reference = new OpCodeHandler_EVEX_HWIb(deserializer.ReadRegister(), deserializer.ReadCode(), deserializer.ReadTupleType());
				return 1;
			case EvexOpCodeHandlerKind.KkHW_3:
				reference = new OpCodeHandler_EVEX_KkHW(deserializer.ReadRegister(), deserializer.ReadCode(), deserializer.ReadTupleType(), canBroadcast: false);
				return 1;
			case EvexOpCodeHandlerKind.KkHW_3b:
				reference = new OpCodeHandler_EVEX_KkHW(deserializer.ReadRegister(), deserializer.ReadCode(), deserializer.ReadTupleType(), canBroadcast: true);
				return 1;
			case EvexOpCodeHandlerKind.KkHWIb_sae_3:
				reference = new OpCodeHandler_EVEX_KkHWIb_sae(deserializer.ReadRegister(), deserializer.ReadCode(), deserializer.ReadTupleType(), canBroadcast: false);
				return 1;
			case EvexOpCodeHandlerKind.KkHWIb_sae_3b:
				reference = new OpCodeHandler_EVEX_KkHWIb_sae(deserializer.ReadRegister(), deserializer.ReadCode(), deserializer.ReadTupleType(), canBroadcast: true);
				return 1;
			case EvexOpCodeHandlerKind.KkHWIb_3:
				reference = new OpCodeHandler_EVEX_KkHWIb(deserializer.ReadRegister(), deserializer.ReadCode(), deserializer.ReadTupleType(), canBroadcast: false);
				return 1;
			case EvexOpCodeHandlerKind.KkHWIb_3b:
				reference = new OpCodeHandler_EVEX_KkHWIb(deserializer.ReadRegister(), deserializer.ReadCode(), deserializer.ReadTupleType(), canBroadcast: true);
				return 1;
			case EvexOpCodeHandlerKind.KkWIb_3:
				reference = new OpCodeHandler_EVEX_KkWIb(deserializer.ReadRegister(), deserializer.ReadCode(), deserializer.ReadTupleType(), canBroadcast: false);
				return 1;
			case EvexOpCodeHandlerKind.KkWIb_3b:
				reference = new OpCodeHandler_EVEX_KkWIb(deserializer.ReadRegister(), deserializer.ReadCode(), deserializer.ReadTupleType(), canBroadcast: true);
				return 1;
			case EvexOpCodeHandlerKind.KP1HW:
				reference = new OpCodeHandler_EVEX_KP1HW(deserializer.ReadRegister(), deserializer.ReadCode(), deserializer.ReadTupleType());
				return 1;
			case EvexOpCodeHandlerKind.KR:
				reference = new OpCodeHandler_EVEX_KR(deserializer.ReadRegister(), deserializer.ReadCode());
				return 1;
			case EvexOpCodeHandlerKind.MV:
				reference = new OpCodeHandler_EVEX_MV(deserializer.ReadRegister(), deserializer.ReadCode(), deserializer.ReadTupleType());
				return 1;
			case EvexOpCodeHandlerKind.V_H_Ev_er:
			{
				Code code;
				reference = new OpCodeHandler_EVEX_V_H_Ev_er(deserializer.ReadRegister(), code = deserializer.ReadCode(), code + 1, deserializer.ReadTupleType(), deserializer.ReadTupleType());
				return 1;
			}
			case EvexOpCodeHandlerKind.V_H_Ev_Ib:
			{
				Code code;
				reference = new OpCodeHandler_EVEX_V_H_Ev_Ib(deserializer.ReadRegister(), code = deserializer.ReadCode(), code + 1, deserializer.ReadTupleType(), deserializer.ReadTupleType());
				return 1;
			}
			case EvexOpCodeHandlerKind.VHM:
				reference = new OpCodeHandler_EVEX_VHM(deserializer.ReadRegister(), deserializer.ReadCode(), deserializer.ReadTupleType());
				return 1;
			case EvexOpCodeHandlerKind.VHW_3:
				reference = new OpCodeHandler_EVEX_VHW(deserializer.ReadRegister(), deserializer.ReadCode(), deserializer.ReadTupleType());
				return 1;
			case EvexOpCodeHandlerKind.VHW_4:
				reference = new OpCodeHandler_EVEX_VHW(deserializer.ReadRegister(), deserializer.ReadCode(), deserializer.ReadCode(), deserializer.ReadTupleType());
				return 1;
			case EvexOpCodeHandlerKind.VHWIb:
				reference = new OpCodeHandler_EVEX_VHWIb(deserializer.ReadRegister(), deserializer.ReadCode(), deserializer.ReadTupleType());
				return 1;
			case EvexOpCodeHandlerKind.VK:
				reference = new OpCodeHandler_EVEX_VK(deserializer.ReadRegister(), deserializer.ReadCode());
				return 1;
			case EvexOpCodeHandlerKind.Vk_VSIB:
				reference = new OpCodeHandler_EVEX_Vk_VSIB(deserializer.ReadRegister(), deserializer.ReadRegister(), deserializer.ReadCode(), deserializer.ReadTupleType());
				return 1;
			case EvexOpCodeHandlerKind.VkEv_REXW_2:
				reference = new OpCodeHandler_EVEX_VkEv_REXW(deserializer.ReadRegister(), deserializer.ReadCode());
				return 1;
			case EvexOpCodeHandlerKind.VkEv_REXW_3:
				reference = new OpCodeHandler_EVEX_VkEv_REXW(deserializer.ReadRegister(), deserializer.ReadCode(), deserializer.ReadCode());
				return 1;
			case EvexOpCodeHandlerKind.VkHM:
				reference = new OpCodeHandler_EVEX_VkHM(deserializer.ReadRegister(), deserializer.ReadCode(), deserializer.ReadTupleType());
				return 1;
			case EvexOpCodeHandlerKind.VkHW_3:
				reference = new OpCodeHandler_EVEX_VkHW(deserializer.ReadRegister(), deserializer.ReadCode(), deserializer.ReadTupleType(), canBroadcast: false);
				return 1;
			case EvexOpCodeHandlerKind.VkHW_3b:
				reference = new OpCodeHandler_EVEX_VkHW(deserializer.ReadRegister(), deserializer.ReadCode(), deserializer.ReadTupleType(), canBroadcast: true);
				return 1;
			case EvexOpCodeHandlerKind.VkHW_5:
				reference = new OpCodeHandler_EVEX_VkHW(deserializer.ReadRegister(), deserializer.ReadRegister(), deserializer.ReadRegister(), deserializer.ReadCode(), deserializer.ReadTupleType(), canBroadcast: false);
				return 1;
			case EvexOpCodeHandlerKind.VkHW_er_4:
				reference = new OpCodeHandler_EVEX_VkHW_er(deserializer.ReadRegister(), deserializer.ReadCode(), deserializer.ReadTupleType(), deserializer.ReadBoolean(), canBroadcast: false);
				return 1;
			case EvexOpCodeHandlerKind.VkHW_er_4b:
				reference = new OpCodeHandler_EVEX_VkHW_er(deserializer.ReadRegister(), deserializer.ReadCode(), deserializer.ReadTupleType(), deserializer.ReadBoolean(), canBroadcast: true);
				return 1;
			case EvexOpCodeHandlerKind.VkHW_er_ur_3:
				reference = new OpCodeHandler_EVEX_VkHW_er_ur(deserializer.ReadRegister(), deserializer.ReadCode(), deserializer.ReadTupleType(), canBroadcast: false);
				return 1;
			case EvexOpCodeHandlerKind.VkHW_er_ur_3b:
				reference = new OpCodeHandler_EVEX_VkHW_er_ur(deserializer.ReadRegister(), deserializer.ReadCode(), deserializer.ReadTupleType(), canBroadcast: true);
				return 1;
			case EvexOpCodeHandlerKind.VkHWIb_3:
				reference = new OpCodeHandler_EVEX_VkHWIb(deserializer.ReadRegister(), deserializer.ReadCode(), deserializer.ReadTupleType(), canBroadcast: false);
				return 1;
			case EvexOpCodeHandlerKind.VkHWIb_3b:
				reference = new OpCodeHandler_EVEX_VkHWIb(deserializer.ReadRegister(), deserializer.ReadCode(), deserializer.ReadTupleType(), canBroadcast: true);
				return 1;
			case EvexOpCodeHandlerKind.VkHWIb_5:
				reference = new OpCodeHandler_EVEX_VkHWIb(deserializer.ReadRegister(), deserializer.ReadRegister(), deserializer.ReadRegister(), deserializer.ReadCode(), deserializer.ReadTupleType(), canBroadcast: false);
				return 1;
			case EvexOpCodeHandlerKind.VkHWIb_er_4:
				reference = new OpCodeHandler_EVEX_VkHWIb_er(deserializer.ReadRegister(), deserializer.ReadCode(), deserializer.ReadTupleType(), canBroadcast: false);
				return 1;
			case EvexOpCodeHandlerKind.VkHWIb_er_4b:
				reference = new OpCodeHandler_EVEX_VkHWIb_er(deserializer.ReadRegister(), deserializer.ReadCode(), deserializer.ReadTupleType(), canBroadcast: true);
				return 1;
			case EvexOpCodeHandlerKind.VkM:
				reference = new OpCodeHandler_EVEX_VkM(deserializer.ReadRegister(), deserializer.ReadCode(), deserializer.ReadTupleType());
				return 1;
			case EvexOpCodeHandlerKind.VkW_3:
				reference = new OpCodeHandler_EVEX_VkW(deserializer.ReadRegister(), deserializer.ReadCode(), deserializer.ReadTupleType(), canBroadcast: false);
				return 1;
			case EvexOpCodeHandlerKind.VkW_3b:
				reference = new OpCodeHandler_EVEX_VkW(deserializer.ReadRegister(), deserializer.ReadCode(), deserializer.ReadTupleType(), canBroadcast: true);
				return 1;
			case EvexOpCodeHandlerKind.VkW_4:
				reference = new OpCodeHandler_EVEX_VkW(deserializer.ReadRegister(), deserializer.ReadRegister(), deserializer.ReadCode(), deserializer.ReadTupleType(), canBroadcast: false);
				return 1;
			case EvexOpCodeHandlerKind.VkW_4b:
				reference = new OpCodeHandler_EVEX_VkW(deserializer.ReadRegister(), deserializer.ReadRegister(), deserializer.ReadCode(), deserializer.ReadTupleType(), canBroadcast: true);
				return 1;
			case EvexOpCodeHandlerKind.VkW_er_4:
				reference = new OpCodeHandler_EVEX_VkW_er(deserializer.ReadRegister(), deserializer.ReadCode(), deserializer.ReadTupleType(), deserializer.ReadBoolean());
				return 1;
			case EvexOpCodeHandlerKind.VkW_er_5:
				reference = new OpCodeHandler_EVEX_VkW_er(deserializer.ReadRegister(), deserializer.ReadRegister(), deserializer.ReadCode(), deserializer.ReadTupleType(), deserializer.ReadBoolean());
				return 1;
			case EvexOpCodeHandlerKind.VkW_er_6:
				reference = new OpCodeHandler_EVEX_VkW_er(deserializer.ReadRegister(), deserializer.ReadRegister(), deserializer.ReadCode(), deserializer.ReadTupleType(), deserializer.ReadBoolean(), deserializer.ReadBoolean());
				return 1;
			case EvexOpCodeHandlerKind.VkWIb_3:
				reference = new OpCodeHandler_EVEX_VkWIb(deserializer.ReadRegister(), deserializer.ReadCode(), deserializer.ReadTupleType(), canBroadcast: false);
				return 1;
			case EvexOpCodeHandlerKind.VkWIb_3b:
				reference = new OpCodeHandler_EVEX_VkWIb(deserializer.ReadRegister(), deserializer.ReadCode(), deserializer.ReadTupleType(), canBroadcast: true);
				return 1;
			case EvexOpCodeHandlerKind.VkWIb_er:
				reference = new OpCodeHandler_EVEX_VkWIb_er(deserializer.ReadRegister(), deserializer.ReadCode(), deserializer.ReadTupleType());
				return 1;
			case EvexOpCodeHandlerKind.VM:
				reference = new OpCodeHandler_EVEX_VM(deserializer.ReadRegister(), deserializer.ReadCode(), deserializer.ReadTupleType());
				return 1;
			case EvexOpCodeHandlerKind.VSIB_k1:
				reference = new OpCodeHandler_EVEX_VSIB_k1(deserializer.ReadRegister(), deserializer.ReadCode(), deserializer.ReadTupleType());
				return 1;
			case EvexOpCodeHandlerKind.VSIB_k1_VX:
				reference = new OpCodeHandler_EVEX_VSIB_k1_VX(deserializer.ReadRegister(), deserializer.ReadRegister(), deserializer.ReadCode(), deserializer.ReadTupleType());
				return 1;
			case EvexOpCodeHandlerKind.VW:
				reference = new OpCodeHandler_EVEX_VW(deserializer.ReadRegister(), deserializer.ReadCode(), deserializer.ReadTupleType());
				return 1;
			case EvexOpCodeHandlerKind.VW_er:
				reference = new OpCodeHandler_EVEX_VW_er(deserializer.ReadRegister(), deserializer.ReadCode(), deserializer.ReadTupleType());
				return 1;
			case EvexOpCodeHandlerKind.VX_Ev:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_EVEX_VX_Ev(code, code + 1, deserializer.ReadTupleType(), deserializer.ReadTupleType());
				return 1;
			}
			case EvexOpCodeHandlerKind.WkHV:
				reference = new OpCodeHandler_EVEX_WkHV(deserializer.ReadRegister(), deserializer.ReadCode());
				return 1;
			case EvexOpCodeHandlerKind.WkV_3:
				reference = new OpCodeHandler_EVEX_WkV(deserializer.ReadRegister(), deserializer.ReadCode(), deserializer.ReadTupleType());
				return 1;
			case EvexOpCodeHandlerKind.WkV_4a:
				reference = new OpCodeHandler_EVEX_WkV(deserializer.ReadRegister(), deserializer.ReadRegister(), deserializer.ReadCode(), deserializer.ReadTupleType());
				return 1;
			case EvexOpCodeHandlerKind.WkV_4b:
				reference = new OpCodeHandler_EVEX_WkV(deserializer.ReadRegister(), deserializer.ReadCode(), deserializer.ReadTupleType(), deserializer.ReadBoolean());
				return 1;
			case EvexOpCodeHandlerKind.WkVIb:
				reference = new OpCodeHandler_EVEX_WkVIb(deserializer.ReadRegister(), deserializer.ReadRegister(), deserializer.ReadCode(), deserializer.ReadTupleType());
				return 1;
			case EvexOpCodeHandlerKind.WkVIb_er:
				reference = new OpCodeHandler_EVEX_WkVIb_er(deserializer.ReadRegister(), deserializer.ReadRegister(), deserializer.ReadCode(), deserializer.ReadTupleType());
				return 1;
			case EvexOpCodeHandlerKind.WV:
				reference = new OpCodeHandler_EVEX_WV(deserializer.ReadRegister(), deserializer.ReadCode(), deserializer.ReadTupleType());
				return 1;
			default:
				throw new InvalidOperationException();
			}
		}
	}
	[Flags]
	internal enum HandlerFlags : uint
	{
		None = 0u,
		Xacquire = 1u,
		Xrelease = 2u,
		XacquireXreleaseNoLock = 4u,
		Lock = 8u
	}
	[Flags]
	internal enum LegacyHandlerFlags : uint
	{
		HandlerReg = 1u,
		HandlerMem = 2u,
		Handler66Reg = 4u,
		Handler66Mem = 8u,
		HandlerF3Reg = 0x10u,
		HandlerF3Mem = 0x20u,
		HandlerF2Reg = 0x40u,
		HandlerF2Mem = 0x80u
	}
	internal enum LegacyOpCodeHandlerKind : byte
	{
		Bitness,
		Bitness_DontReadModRM,
		Invalid,
		Invalid_NoModRM,
		Invalid2,
		Dup,
		Null,
		HandlerReference,
		ArrayReference,
		RM,
		Options3,
		Options5,
		Options_DontReadModRM,
		AnotherTable,
		Group,
		Group8x64,
		Group8x8,
		MandatoryPrefix,
		MandatoryPrefix4,
		Ev_REXW_1a,
		MandatoryPrefix_NoModRM,
		MandatoryPrefix3,
		D3NOW,
		EVEX,
		VEX2,
		VEX3,
		XOP,
		AL_DX,
		Ap,
		B_BM,
		B_Ev,
		B_MIB,
		BM_B,
		BranchIw,
		BranchSimple,
		C_R_3a,
		C_R_3b,
		DX_AL,
		DX_eAX,
		eAX_DX,
		Eb_1,
		Eb_2,
		Eb_CL,
		Eb_Gb_1,
		Eb_Gb_2,
		Eb_Ib_1,
		Eb_Ib_2,
		Eb1,
		Ed_V_Ib,
		Ep,
		Ev_3a,
		Ev_3b,
		Ev_4,
		Ev_CL,
		Ev_Gv_32_64,
		Ev_Gv_3a,
		Ev_Gv_3b,
		Ev_Gv_4,
		Ev_Gv_CL,
		Ev_Gv_Ib,
		Ev_Gv_REX,
		Ev_Ib_3,
		Ev_Ib_4,
		Ev_Ib2_3,
		Ev_Ib2_4,
		Ev_Iz_3,
		Ev_Iz_4,
		Ev_P,
		Ev_REXW,
		Ev_Sw,
		Ev_VX,
		Ev1,
		Evj,
		Evw,
		Ew,
		Gb_Eb,
		Gdq_Ev,
		Gv_Eb,
		Gv_Eb_REX,
		Gv_Ev_32_64,
		Gv_Ev_3a,
		Gv_Ev_3b,
		Gv_Ev_Ib,
		Gv_Ev_Ib_REX,
		Gv_Ev_Iz,
		Gv_Ev_REX,
		Gv_Ev2,
		Gv_Ev3,
		Gv_Ew,
		Gv_M,
		Gv_M_as,
		Gv_Ma,
		Gv_Mp_2,
		Gv_Mp_3,
		Gv_Mv,
		Gv_N,
		Gv_N_Ib_REX,
		Gv_RX,
		Gv_W,
		GvM_VX_Ib,
		Ib,
		Ib3,
		IbReg,
		IbReg2,
		Iw_Ib,
		Jb,
		Jb2,
		Jdisp,
		Jx,
		Jz,
		M_1,
		M_2,
		M_REXW_2,
		M_REXW_4,
		MemBx,
		Mf_1,
		Mf_2a,
		Mf_2b,
		MIB_B,
		MP,
		Ms,
		MV,
		Mv_Gv,
		Mv_Gv_REXW,
		NIb,
		Ob_Reg,
		Ov_Reg,
		P_Ev,
		P_Ev_Ib,
		P_Q,
		P_Q_Ib,
		P_R,
		P_W,
		PushEv,
		PushIb2,
		PushIz,
		PushOpSizeReg_4a,
		PushOpSizeReg_4b,
		PushSimple2,
		PushSimpleReg,
		Q_P,
		R_C_3a,
		R_C_3b,
		rDI_P_N,
		rDI_VX_RX,
		Reg,
		Reg_Ib2,
		Reg_Iz,
		Reg_Ob,
		Reg_Ov,
		Reg_Xb,
		Reg_Xv,
		Reg_Xv2,
		Reg_Yb,
		Reg_Yv,
		RegIb,
		RegIb3,
		RegIz2,
		Reservednop,
		RIb,
		RIbIb,
		Rv,
		Rv_32_64,
		RvMw_Gw,
		Simple,
		Simple_ModRM,
		Simple2_3a,
		Simple2_3b,
		Simple2Iw,
		Simple3,
		Simple4,
		Simple5,
		Simple5_ModRM_as,
		SimpleReg,
		ST_STi,
		STi,
		STi_ST,
		Sw_Ev,
		V_Ev,
		VM,
		VN,
		VQ,
		VRIbIb,
		VW_2,
		VW_3,
		VWIb_2,
		VWIb_3,
		VX_E_Ib,
		VX_Ev,
		Wbinvd,
		WV,
		Xb_Yb,
		Xchg_Reg_rAX,
		Xv_Yv,
		Yb_Reg,
		Yb_Xb,
		Yv_Reg,
		Yv_Reg2,
		Yv_Xv,
		Simple4b,
		Options1632_1,
		Options1632_2,
		M_Sw,
		Sw_M,
		Rq,
		Gd_Rd,
		PrefixEsCsSsDs,
		PrefixFsGs,
		Prefix66,
		Prefix67,
		PrefixF0,
		PrefixF2,
		PrefixF3,
		PrefixREX,
		Simple5_a32
	}
	internal sealed class LegacyOpCodeHandlerReader : OpCodeHandlerReader
	{
		public override int ReadHandlers(ref TableDeserializer deserializer, OpCodeHandler[] result, int resultIndex)
		{
			ref OpCodeHandler reference = ref result[resultIndex];
			switch (deserializer.ReadLegacyOpCodeHandlerKind())
			{
			case LegacyOpCodeHandlerKind.Bitness:
				reference = new OpCodeHandler_Bitness(deserializer.ReadHandler(), deserializer.ReadHandler());
				return 1;
			case LegacyOpCodeHandlerKind.Bitness_DontReadModRM:
				reference = new OpCodeHandler_Bitness_DontReadModRM(deserializer.ReadHandler(), deserializer.ReadHandler());
				return 1;
			case LegacyOpCodeHandlerKind.Invalid:
				reference = OpCodeHandler_Invalid.Instance;
				return 1;
			case LegacyOpCodeHandlerKind.Invalid_NoModRM:
				reference = OpCodeHandler_Invalid_NoModRM.Instance;
				return 1;
			case LegacyOpCodeHandlerKind.Invalid2:
				result[resultIndex] = OpCodeHandler_Invalid.Instance;
				result[resultIndex + 1] = OpCodeHandler_Invalid.Instance;
				return 2;
			case LegacyOpCodeHandlerKind.Dup:
			{
				int num = deserializer.ReadInt32();
				OpCodeHandler opCodeHandler = deserializer.ReadHandlerOrNull();
				for (int i = 0; i < num; i++)
				{
					result[resultIndex + i] = opCodeHandler;
				}
				return num;
			}
			case LegacyOpCodeHandlerKind.Null:
				reference = null;
				return 1;
			case LegacyOpCodeHandlerKind.HandlerReference:
				reference = deserializer.ReadHandlerReference();
				return 1;
			case LegacyOpCodeHandlerKind.ArrayReference:
				throw new InvalidOperationException();
			case LegacyOpCodeHandlerKind.RM:
				reference = new OpCodeHandler_RM(deserializer.ReadHandler(), deserializer.ReadHandler());
				return 1;
			case LegacyOpCodeHandlerKind.Options1632_1:
				reference = new OpCodeHandler_Options1632(deserializer.ReadHandler(), deserializer.ReadHandler(), deserializer.ReadDecoderOptions());
				return 1;
			case LegacyOpCodeHandlerKind.Options1632_2:
				reference = new OpCodeHandler_Options1632(deserializer.ReadHandler(), deserializer.ReadHandler(), deserializer.ReadDecoderOptions(), deserializer.ReadHandler(), deserializer.ReadDecoderOptions());
				return 1;
			case LegacyOpCodeHandlerKind.Options3:
				reference = new OpCodeHandler_Options(deserializer.ReadHandler(), deserializer.ReadHandler(), deserializer.ReadDecoderOptions());
				return 1;
			case LegacyOpCodeHandlerKind.Options5:
				reference = new OpCodeHandler_Options(deserializer.ReadHandler(), deserializer.ReadHandler(), deserializer.ReadDecoderOptions(), deserializer.ReadHandler(), deserializer.ReadDecoderOptions());
				return 1;
			case LegacyOpCodeHandlerKind.Options_DontReadModRM:
				reference = new OpCodeHandler_Options_DontReadModRM(deserializer.ReadHandler(), deserializer.ReadHandler(), deserializer.ReadDecoderOptions());
				return 1;
			case LegacyOpCodeHandlerKind.AnotherTable:
				reference = new OpCodeHandler_AnotherTable(deserializer.ReadArrayReference(8u));
				return 1;
			case LegacyOpCodeHandlerKind.Group:
				reference = new OpCodeHandler_Group(deserializer.ReadArrayReference(8u));
				return 1;
			case LegacyOpCodeHandlerKind.Group8x64:
				reference = new OpCodeHandler_Group8x64(deserializer.ReadArrayReference(8u), deserializer.ReadArrayReference(8u));
				return 1;
			case LegacyOpCodeHandlerKind.Group8x8:
				reference = new OpCodeHandler_Group8x8(deserializer.ReadArrayReference(8u), deserializer.ReadArrayReference(8u));
				return 1;
			case LegacyOpCodeHandlerKind.MandatoryPrefix:
				reference = new OpCodeHandler_MandatoryPrefix(deserializer.ReadHandler(), deserializer.ReadHandler(), deserializer.ReadHandler(), deserializer.ReadHandler());
				return 1;
			case LegacyOpCodeHandlerKind.MandatoryPrefix4:
				reference = new OpCodeHandler_MandatoryPrefix4(deserializer.ReadHandler(), deserializer.ReadHandler(), deserializer.ReadHandler(), deserializer.ReadHandler(), (uint)deserializer.ReadInt32());
				return 1;
			case LegacyOpCodeHandlerKind.MandatoryPrefix_NoModRM:
				reference = new OpCodeHandler_MandatoryPrefix_NoModRM(deserializer.ReadHandler(), deserializer.ReadHandler(), deserializer.ReadHandler(), deserializer.ReadHandler());
				return 1;
			case LegacyOpCodeHandlerKind.MandatoryPrefix3:
				reference = new OpCodeHandler_MandatoryPrefix3(deserializer.ReadHandler(), deserializer.ReadHandler(), deserializer.ReadHandler(), deserializer.ReadHandler(), deserializer.ReadHandler(), deserializer.ReadHandler(), deserializer.ReadHandler(), deserializer.ReadHandler(), deserializer.ReadLegacyHandlerFlags());
				return 1;
			case LegacyOpCodeHandlerKind.D3NOW:
				reference = new OpCodeHandler_D3NOW();
				return 1;
			case LegacyOpCodeHandlerKind.EVEX:
				reference = new OpCodeHandler_EVEX(deserializer.ReadHandler());
				return 1;
			case LegacyOpCodeHandlerKind.VEX2:
				reference = new OpCodeHandler_VEX2(deserializer.ReadHandler());
				return 1;
			case LegacyOpCodeHandlerKind.VEX3:
				reference = new OpCodeHandler_VEX3(deserializer.ReadHandler());
				return 1;
			case LegacyOpCodeHandlerKind.XOP:
				reference = new OpCodeHandler_XOP(deserializer.ReadHandler());
				return 1;
			case LegacyOpCodeHandlerKind.AL_DX:
				reference = new OpCodeHandler_AL_DX(deserializer.ReadCode());
				return 1;
			case LegacyOpCodeHandlerKind.Ap:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_Ap(code, code + 1);
				return 1;
			}
			case LegacyOpCodeHandlerKind.B_BM:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_B_BM(code, code + 1);
				return 1;
			}
			case LegacyOpCodeHandlerKind.B_Ev:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_B_Ev(code, code + 1, deserializer.ReadBoolean());
				return 1;
			}
			case LegacyOpCodeHandlerKind.B_MIB:
				reference = new OpCodeHandler_B_MIB(deserializer.ReadCode());
				return 1;
			case LegacyOpCodeHandlerKind.BM_B:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_BM_B(code, code + 1);
				return 1;
			}
			case LegacyOpCodeHandlerKind.BranchIw:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_BranchIw(code, code + 1, code + 2);
				return 1;
			}
			case LegacyOpCodeHandlerKind.BranchSimple:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_BranchSimple(code, code + 1, code + 2);
				return 1;
			}
			case LegacyOpCodeHandlerKind.C_R_3a:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_C_R(code, code + 1, deserializer.ReadRegister());
				return 1;
			}
			case LegacyOpCodeHandlerKind.C_R_3b:
				reference = new OpCodeHandler_C_R(deserializer.ReadCode(), Code.INVALID, deserializer.ReadRegister());
				return 1;
			case LegacyOpCodeHandlerKind.DX_AL:
				reference = new OpCodeHandler_DX_AL(deserializer.ReadCode());
				return 1;
			case LegacyOpCodeHandlerKind.DX_eAX:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_DX_eAX(code, code + 1);
				return 1;
			}
			case LegacyOpCodeHandlerKind.eAX_DX:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_eAX_DX(code, code + 1);
				return 1;
			}
			case LegacyOpCodeHandlerKind.Eb_1:
				reference = new OpCodeHandler_Eb(deserializer.ReadCode());
				return 1;
			case LegacyOpCodeHandlerKind.Eb_2:
				reference = new OpCodeHandler_Eb(deserializer.ReadCode(), deserializer.ReadHandlerFlags());
				return 1;
			case LegacyOpCodeHandlerKind.Eb_CL:
				reference = new OpCodeHandler_Eb_CL(deserializer.ReadCode());
				return 1;
			case LegacyOpCodeHandlerKind.Eb_Gb_1:
				reference = new OpCodeHandler_Eb_Gb(deserializer.ReadCode());
				return 1;
			case LegacyOpCodeHandlerKind.Eb_Gb_2:
				reference = new OpCodeHandler_Eb_Gb(deserializer.ReadCode(), deserializer.ReadHandlerFlags());
				return 1;
			case LegacyOpCodeHandlerKind.Eb_Ib_1:
				reference = new OpCodeHandler_Eb_Ib(deserializer.ReadCode());
				return 1;
			case LegacyOpCodeHandlerKind.Eb_Ib_2:
				reference = new OpCodeHandler_Eb_Ib(deserializer.ReadCode(), deserializer.ReadHandlerFlags());
				return 1;
			case LegacyOpCodeHandlerKind.Eb1:
				reference = new OpCodeHandler_Eb_1(deserializer.ReadCode());
				return 1;
			case LegacyOpCodeHandlerKind.Ed_V_Ib:
			{
				Code code;
				reference = new OpCodeHandler_Ed_V_Ib(code = deserializer.ReadCode(), code + 1);
				return 1;
			}
			case LegacyOpCodeHandlerKind.Ep:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_Ep(code, code + 1, code + 2);
				return 1;
			}
			case LegacyOpCodeHandlerKind.Ev_3a:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_Ev(code, code + 1, code + 2);
				return 1;
			}
			case LegacyOpCodeHandlerKind.Ev_3b:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_Ev(code, code + 1, Code.INVALID);
				return 1;
			}
			case LegacyOpCodeHandlerKind.Ev_4:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_Ev(code, code + 1, code + 2, deserializer.ReadHandlerFlags());
				return 1;
			}
			case LegacyOpCodeHandlerKind.Ev_CL:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_Ev_CL(code, code + 1, code + 2);
				return 1;
			}
			case LegacyOpCodeHandlerKind.Ev_Gv_32_64:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_Ev_Gv_32_64(code, code + 1);
				return 1;
			}
			case LegacyOpCodeHandlerKind.Ev_Gv_3a:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_Ev_Gv(code, code + 1, code + 2);
				return 1;
			}
			case LegacyOpCodeHandlerKind.Ev_Gv_3b:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_Ev_Gv(code, code + 1, Code.INVALID);
				return 1;
			}
			case LegacyOpCodeHandlerKind.Ev_Gv_4:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_Ev_Gv(code, code + 1, code + 2, deserializer.ReadHandlerFlags());
				return 1;
			}
			case LegacyOpCodeHandlerKind.Ev_Gv_CL:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_Ev_Gv_CL(code, code + 1, code + 2);
				return 1;
			}
			case LegacyOpCodeHandlerKind.Ev_Gv_Ib:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_Ev_Gv_Ib(code, code + 1, code + 2);
				return 1;
			}
			case LegacyOpCodeHandlerKind.Ev_Gv_REX:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_Ev_Gv_REX(code, code + 1);
				return 1;
			}
			case LegacyOpCodeHandlerKind.Ev_Ib_3:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_Ev_Ib(code, code + 1, code + 2);
				return 1;
			}
			case LegacyOpCodeHandlerKind.Ev_Ib_4:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_Ev_Ib(code, code + 1, code + 2, deserializer.ReadHandlerFlags());
				return 1;
			}
			case LegacyOpCodeHandlerKind.Ev_Ib2_3:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_Ev_Ib2(code, code + 1, code + 2);
				return 1;
			}
			case LegacyOpCodeHandlerKind.Ev_Ib2_4:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_Ev_Ib2(code, code + 1, code + 2, deserializer.ReadHandlerFlags());
				return 1;
			}
			case LegacyOpCodeHandlerKind.Ev_Iz_3:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_Ev_Iz(code, code + 1, code + 2);
				return 1;
			}
			case LegacyOpCodeHandlerKind.Ev_Iz_4:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_Ev_Iz(code, code + 1, code + 2, deserializer.ReadHandlerFlags());
				return 1;
			}
			case LegacyOpCodeHandlerKind.Ev_P:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_Ev_P(code, code + 1);
				return 1;
			}
			case LegacyOpCodeHandlerKind.Ev_REXW_1a:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_Ev_REXW(code, Code.INVALID, (uint)deserializer.ReadInt32());
				return 1;
			}
			case LegacyOpCodeHandlerKind.Ev_REXW:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_Ev_REXW(code, code + 1, (uint)deserializer.ReadInt32());
				return 1;
			}
			case LegacyOpCodeHandlerKind.Ev_Sw:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_Ev_Sw(code, code + 1, code + 2);
				return 1;
			}
			case LegacyOpCodeHandlerKind.Ev_VX:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_Ev_VX(code, code + 1);
				return 1;
			}
			case LegacyOpCodeHandlerKind.Ev1:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_Ev_1(code, code + 1, code + 2);
				return 1;
			}
			case LegacyOpCodeHandlerKind.Evj:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_Evj(code, code + 1, code + 2);
				return 1;
			}
			case LegacyOpCodeHandlerKind.Evw:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_Evw(code, code + 1, code + 2);
				return 1;
			}
			case LegacyOpCodeHandlerKind.Ew:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_Ew(code, code + 1, code + 2);
				return 1;
			}
			case LegacyOpCodeHandlerKind.Gb_Eb:
				reference = new OpCodeHandler_Gb_Eb(deserializer.ReadCode());
				return 1;
			case LegacyOpCodeHandlerKind.Gdq_Ev:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_Gdq_Ev(code, code + 1, code + 2);
				return 1;
			}
			case LegacyOpCodeHandlerKind.Gv_Eb:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_Gv_Eb(code, code + 1, code + 2);
				return 1;
			}
			case LegacyOpCodeHandlerKind.Gv_Eb_REX:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_Gv_Eb_REX(code, code + 1);
				return 1;
			}
			case LegacyOpCodeHandlerKind.Gv_Ev_32_64:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_Gv_Ev_32_64(code, code + 1, deserializer.ReadBoolean(), deserializer.ReadBoolean());
				return 1;
			}
			case LegacyOpCodeHandlerKind.Gv_Ev_3a:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_Gv_Ev(code, code + 1, code + 2);
				return 1;
			}
			case LegacyOpCodeHandlerKind.Gv_Ev_3b:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_Gv_Ev(code, code + 1, Code.INVALID);
				return 1;
			}
			case LegacyOpCodeHandlerKind.Gv_Ev_Ib:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_Gv_Ev_Ib(code, code + 1, code + 2);
				return 1;
			}
			case LegacyOpCodeHandlerKind.Gv_Ev_Ib_REX:
			{
				Code code;
				reference = new OpCodeHandler_Gv_Ev_Ib_REX(code = deserializer.ReadCode(), code + 1);
				return 1;
			}
			case LegacyOpCodeHandlerKind.Gv_Ev_Iz:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_Gv_Ev_Iz(code, code + 1, code + 2);
				return 1;
			}
			case LegacyOpCodeHandlerKind.Gv_Ev_REX:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_Gv_Ev_REX(code, code + 1);
				return 1;
			}
			case LegacyOpCodeHandlerKind.Gv_Ev2:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_Gv_Ev2(code, code + 1, code + 2);
				return 1;
			}
			case LegacyOpCodeHandlerKind.Gv_Ev3:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_Gv_Ev3(code, code + 1, code + 2);
				return 1;
			}
			case LegacyOpCodeHandlerKind.Gv_Ew:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_Gv_Ew(code, code + 1, code + 2);
				return 1;
			}
			case LegacyOpCodeHandlerKind.Gv_M:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_Gv_M(code, code + 1, code + 2);
				return 1;
			}
			case LegacyOpCodeHandlerKind.Gv_M_as:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_Gv_M_as(code, code + 1, code + 2);
				return 1;
			}
			case LegacyOpCodeHandlerKind.Gv_Ma:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_Gv_Ma(code, code + 1);
				return 1;
			}
			case LegacyOpCodeHandlerKind.Gv_Mp_2:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_Gv_Mp(code, code + 1, Code.INVALID);
				return 1;
			}
			case LegacyOpCodeHandlerKind.Gv_Mp_3:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_Gv_Mp(code, code + 1, code + 2);
				return 1;
			}
			case LegacyOpCodeHandlerKind.Gv_Mv:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_Gv_Mv(code, code + 1, code + 2);
				return 1;
			}
			case LegacyOpCodeHandlerKind.Gv_N:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_Gv_N(code, code + 1);
				return 1;
			}
			case LegacyOpCodeHandlerKind.Gv_N_Ib_REX:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_Gv_N_Ib_REX(code, code + 1);
				return 1;
			}
			case LegacyOpCodeHandlerKind.Gv_RX:
			{
				Code code;
				reference = new OpCodeHandler_Gv_RX(code = deserializer.ReadCode(), code + 1);
				return 1;
			}
			case LegacyOpCodeHandlerKind.Gv_W:
			{
				Code code;
				reference = new OpCodeHandler_Gv_W(code = deserializer.ReadCode(), code + 1);
				return 1;
			}
			case LegacyOpCodeHandlerKind.GvM_VX_Ib:
			{
				Code code;
				reference = new OpCodeHandler_GvM_VX_Ib(code = deserializer.ReadCode(), code + 1);
				return 1;
			}
			case LegacyOpCodeHandlerKind.Ib:
				reference = new OpCodeHandler_Ib(deserializer.ReadCode());
				return 1;
			case LegacyOpCodeHandlerKind.Ib3:
				reference = new OpCodeHandler_Ib3(deserializer.ReadCode());
				return 1;
			case LegacyOpCodeHandlerKind.IbReg:
				reference = new OpCodeHandler_IbReg(deserializer.ReadCode(), deserializer.ReadRegister());
				return 1;
			case LegacyOpCodeHandlerKind.IbReg2:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_IbReg2(code, code + 1);
				return 1;
			}
			case LegacyOpCodeHandlerKind.Iw_Ib:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_Iw_Ib(code, code + 1, code + 2);
				return 1;
			}
			case LegacyOpCodeHandlerKind.Jb:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_Jb(code, code + 1, code + 2);
				return 1;
			}
			case LegacyOpCodeHandlerKind.Jb2:
				reference = new OpCodeHandler_Jb2(deserializer.ReadCode(), deserializer.ReadCode(), deserializer.ReadCode(), deserializer.ReadCode(), deserializer.ReadCode(), deserializer.ReadCode(), deserializer.ReadCode());
				return 1;
			case LegacyOpCodeHandlerKind.Jdisp:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_Jdisp(code, code + 1);
				return 1;
			}
			case LegacyOpCodeHandlerKind.Jx:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_Jx(code, code + 1, deserializer.ReadCode());
				return 1;
			}
			case LegacyOpCodeHandlerKind.Jz:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_Jz(code, code + 1, code + 2);
				return 1;
			}
			case LegacyOpCodeHandlerKind.M_1:
				reference = new OpCodeHandler_M(deserializer.ReadCode());
				return 1;
			case LegacyOpCodeHandlerKind.M_2:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_M(code, code + 1);
				return 1;
			}
			case LegacyOpCodeHandlerKind.M_REXW_2:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_M_REXW(code, code + 1);
				return 1;
			}
			case LegacyOpCodeHandlerKind.M_REXW_4:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_M_REXW(code, code + 1, deserializer.ReadHandlerFlags(), deserializer.ReadHandlerFlags());
				return 1;
			}
			case LegacyOpCodeHandlerKind.MemBx:
				reference = new OpCodeHandler_MemBx(deserializer.ReadCode());
				return 1;
			case LegacyOpCodeHandlerKind.Mf_1:
				reference = new OpCodeHandler_Mf(deserializer.ReadCode());
				return 1;
			case LegacyOpCodeHandlerKind.Mf_2a:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_Mf(code, code + 1);
				return 1;
			}
			case LegacyOpCodeHandlerKind.Mf_2b:
				reference = new OpCodeHandler_Mf(deserializer.ReadCode(), deserializer.ReadCode());
				return 1;
			case LegacyOpCodeHandlerKind.MIB_B:
				reference = new OpCodeHandler_MIB_B(deserializer.ReadCode());
				return 1;
			case LegacyOpCodeHandlerKind.MP:
				reference = new OpCodeHandler_MP(deserializer.ReadCode());
				return 1;
			case LegacyOpCodeHandlerKind.Ms:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_Ms(code, code + 1, code + 2);
				return 1;
			}
			case LegacyOpCodeHandlerKind.MV:
				reference = new OpCodeHandler_MV(deserializer.ReadCode());
				return 1;
			case LegacyOpCodeHandlerKind.Mv_Gv:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_Mv_Gv(code, code + 1, code + 2);
				return 1;
			}
			case LegacyOpCodeHandlerKind.Mv_Gv_REXW:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_Mv_Gv_REXW(code, code + 1);
				return 1;
			}
			case LegacyOpCodeHandlerKind.NIb:
				reference = new OpCodeHandler_NIb(deserializer.ReadCode());
				return 1;
			case LegacyOpCodeHandlerKind.Ob_Reg:
				reference = new OpCodeHandler_Ob_Reg(deserializer.ReadCode(), deserializer.ReadRegister());
				return 1;
			case LegacyOpCodeHandlerKind.Ov_Reg:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_Ov_Reg(code, code + 1, code + 2);
				return 1;
			}
			case LegacyOpCodeHandlerKind.P_Ev:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_P_Ev(code, code + 1);
				return 1;
			}
			case LegacyOpCodeHandlerKind.P_Ev_Ib:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_P_Ev_Ib(code, code + 1);
				return 1;
			}
			case LegacyOpCodeHandlerKind.P_Q:
				reference = new OpCodeHandler_P_Q(deserializer.ReadCode());
				return 1;
			case LegacyOpCodeHandlerKind.P_Q_Ib:
				reference = new OpCodeHandler_P_Q_Ib(deserializer.ReadCode());
				return 1;
			case LegacyOpCodeHandlerKind.P_R:
				reference = new OpCodeHandler_P_R(deserializer.ReadCode());
				return 1;
			case LegacyOpCodeHandlerKind.P_W:
				reference = new OpCodeHandler_P_W(deserializer.ReadCode());
				return 1;
			case LegacyOpCodeHandlerKind.PushEv:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_PushEv(code, code + 1, code + 2);
				return 1;
			}
			case LegacyOpCodeHandlerKind.PushIb2:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_PushIb2(code, code + 1, code + 2);
				return 1;
			}
			case LegacyOpCodeHandlerKind.PushIz:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_PushIz(code, code + 1, code + 2);
				return 1;
			}
			case LegacyOpCodeHandlerKind.PushOpSizeReg_4a:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_PushOpSizeReg(code, code + 1, code + 2, deserializer.ReadRegister());
				return 1;
			}
			case LegacyOpCodeHandlerKind.PushOpSizeReg_4b:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_PushOpSizeReg(code, code + 1, Code.INVALID, deserializer.ReadRegister());
				return 1;
			}
			case LegacyOpCodeHandlerKind.PushSimple2:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_PushSimple2(code, code + 1, code + 2);
				return 1;
			}
			case LegacyOpCodeHandlerKind.PushSimpleReg:
			{
				Code code;
				reference = new OpCodeHandler_PushSimpleReg(deserializer.ReadInt32(), code = deserializer.ReadCode(), code + 1, code + 2);
				return 1;
			}
			case LegacyOpCodeHandlerKind.Q_P:
				reference = new OpCodeHandler_Q_P(deserializer.ReadCode());
				return 1;
			case LegacyOpCodeHandlerKind.R_C_3a:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_R_C(code, code + 1, deserializer.ReadRegister());
				return 1;
			}
			case LegacyOpCodeHandlerKind.R_C_3b:
				reference = new OpCodeHandler_R_C(deserializer.ReadCode(), Code.INVALID, deserializer.ReadRegister());
				return 1;
			case LegacyOpCodeHandlerKind.rDI_P_N:
				reference = new OpCodeHandler_rDI_P_N(deserializer.ReadCode());
				return 1;
			case LegacyOpCodeHandlerKind.rDI_VX_RX:
				reference = new OpCodeHandler_rDI_VX_RX(deserializer.ReadCode());
				return 1;
			case LegacyOpCodeHandlerKind.Reg:
				reference = new OpCodeHandler_Reg(deserializer.ReadCode(), deserializer.ReadRegister());
				return 1;
			case LegacyOpCodeHandlerKind.Reg_Ib2:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_Reg_Ib2(code, code + 1);
				return 1;
			}
			case LegacyOpCodeHandlerKind.Reg_Iz:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_Reg_Iz(code, code + 1, code + 2);
				return 1;
			}
			case LegacyOpCodeHandlerKind.Reg_Ob:
				reference = new OpCodeHandler_Reg_Ob(deserializer.ReadCode(), deserializer.ReadRegister());
				return 1;
			case LegacyOpCodeHandlerKind.Reg_Ov:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_Reg_Ov(code, code + 1, code + 2);
				return 1;
			}
			case LegacyOpCodeHandlerKind.Reg_Xb:
				reference = new OpCodeHandler_Reg_Xb(deserializer.ReadCode(), deserializer.ReadRegister());
				return 1;
			case LegacyOpCodeHandlerKind.Reg_Xv:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_Reg_Xv(code, code + 1, code + 2);
				return 1;
			}
			case LegacyOpCodeHandlerKind.Reg_Xv2:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_Reg_Xv2(code, code + 1);
				return 1;
			}
			case LegacyOpCodeHandlerKind.Reg_Yb:
				reference = new OpCodeHandler_Reg_Yb(deserializer.ReadCode(), deserializer.ReadRegister());
				return 1;
			case LegacyOpCodeHandlerKind.Reg_Yv:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_Reg_Yv(code, code + 1, code + 2);
				return 1;
			}
			case LegacyOpCodeHandlerKind.RegIb:
				reference = new OpCodeHandler_RegIb(deserializer.ReadCode(), deserializer.ReadRegister());
				return 1;
			case LegacyOpCodeHandlerKind.RegIb3:
				reference = new OpCodeHandler_RegIb3(deserializer.ReadInt32());
				return 1;
			case LegacyOpCodeHandlerKind.RegIz2:
				reference = new OpCodeHandler_RegIz2(deserializer.ReadInt32());
				return 1;
			case LegacyOpCodeHandlerKind.Reservednop:
				reference = new OpCodeHandler_Reservednop(deserializer.ReadHandler(), deserializer.ReadHandler());
				return 1;
			case LegacyOpCodeHandlerKind.RIb:
				reference = new OpCodeHandler_RIb(deserializer.ReadCode());
				return 1;
			case LegacyOpCodeHandlerKind.RIbIb:
				reference = new OpCodeHandler_RIbIb(deserializer.ReadCode());
				return 1;
			case LegacyOpCodeHandlerKind.Rv:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_Rv(code, code + 1, code + 2);
				return 1;
			}
			case LegacyOpCodeHandlerKind.Rv_32_64:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_Rv_32_64(code, code + 1);
				return 1;
			}
			case LegacyOpCodeHandlerKind.RvMw_Gw:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_RvMw_Gw(code, code + 1);
				return 1;
			}
			case LegacyOpCodeHandlerKind.Simple:
				reference = new OpCodeHandler_Simple(deserializer.ReadCode());
				return 1;
			case LegacyOpCodeHandlerKind.Simple_ModRM:
				reference = new OpCodeHandler_Simple_ModRM(deserializer.ReadCode());
				return 1;
			case LegacyOpCodeHandlerKind.Simple2_3a:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_Simple2(code, code + 1, code + 2);
				return 1;
			}
			case LegacyOpCodeHandlerKind.Simple2_3b:
				reference = new OpCodeHandler_Simple2(deserializer.ReadCode(), deserializer.ReadCode(), deserializer.ReadCode());
				return 1;
			case LegacyOpCodeHandlerKind.Simple2Iw:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_Simple2Iw(code, code + 1, code + 2);
				return 1;
			}
			case LegacyOpCodeHandlerKind.Simple3:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_Simple3(code, code + 1, code + 2);
				return 1;
			}
			case LegacyOpCodeHandlerKind.Simple4:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_Simple4(code, code + 1);
				return 1;
			}
			case LegacyOpCodeHandlerKind.Simple4b:
			{
				Code code = deserializer.ReadCode();
				Code code2 = deserializer.ReadCode();
				reference = new OpCodeHandler_Simple4(code, code2);
				return 1;
			}
			case LegacyOpCodeHandlerKind.Simple5:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_Simple5(code, code + 1, code + 2);
				return 1;
			}
			case LegacyOpCodeHandlerKind.Simple5_a32:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_Simple5_a32(code, code + 1, code + 2);
				return 1;
			}
			case LegacyOpCodeHandlerKind.Simple5_ModRM_as:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_Simple5_ModRM_as(code, code + 1, code + 2);
				return 1;
			}
			case LegacyOpCodeHandlerKind.SimpleReg:
				reference = new OpCodeHandler_SimpleReg(deserializer.ReadCode(), deserializer.ReadInt32());
				return 1;
			case LegacyOpCodeHandlerKind.ST_STi:
				reference = new OpCodeHandler_ST_STi(deserializer.ReadCode());
				return 1;
			case LegacyOpCodeHandlerKind.STi:
				reference = new OpCodeHandler_STi(deserializer.ReadCode());
				return 1;
			case LegacyOpCodeHandlerKind.STi_ST:
				reference = new OpCodeHandler_STi_ST(deserializer.ReadCode());
				return 1;
			case LegacyOpCodeHandlerKind.Sw_Ev:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_Sw_Ev(code, code + 1, code + 2);
				return 1;
			}
			case LegacyOpCodeHandlerKind.V_Ev:
			{
				Code code;
				reference = new OpCodeHandler_V_Ev(code = deserializer.ReadCode(), code + 1);
				return 1;
			}
			case LegacyOpCodeHandlerKind.VM:
				reference = new OpCodeHandler_VM(deserializer.ReadCode());
				return 1;
			case LegacyOpCodeHandlerKind.VN:
				reference = new OpCodeHandler_VN(deserializer.ReadCode());
				return 1;
			case LegacyOpCodeHandlerKind.VQ:
				reference = new OpCodeHandler_VQ(deserializer.ReadCode());
				return 1;
			case LegacyOpCodeHandlerKind.VRIbIb:
				reference = new OpCodeHandler_VRIbIb(deserializer.ReadCode());
				return 1;
			case LegacyOpCodeHandlerKind.VW_2:
				reference = new OpCodeHandler_VW(deserializer.ReadCode());
				return 1;
			case LegacyOpCodeHandlerKind.VW_3:
				reference = new OpCodeHandler_VW(deserializer.ReadCode(), deserializer.ReadCode());
				return 1;
			case LegacyOpCodeHandlerKind.VWIb_2:
				reference = new OpCodeHandler_VWIb(deserializer.ReadCode());
				return 1;
			case LegacyOpCodeHandlerKind.VWIb_3:
			{
				Code code;
				reference = new OpCodeHandler_VWIb(code = deserializer.ReadCode(), code + 1);
				return 1;
			}
			case LegacyOpCodeHandlerKind.VX_E_Ib:
			{
				Code code;
				reference = new OpCodeHandler_VX_E_Ib(code = deserializer.ReadCode(), code + 1);
				return 1;
			}
			case LegacyOpCodeHandlerKind.VX_Ev:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_VX_Ev(code, code + 1);
				return 1;
			}
			case LegacyOpCodeHandlerKind.Wbinvd:
				reference = new OpCodeHandler_Wbinvd();
				return 1;
			case LegacyOpCodeHandlerKind.WV:
				reference = new OpCodeHandler_WV(deserializer.ReadCode());
				return 1;
			case LegacyOpCodeHandlerKind.Xb_Yb:
				reference = new OpCodeHandler_Xb_Yb(deserializer.ReadCode());
				return 1;
			case LegacyOpCodeHandlerKind.Xchg_Reg_rAX:
				reference = new OpCodeHandler_Xchg_Reg_rAX(deserializer.ReadInt32());
				return 1;
			case LegacyOpCodeHandlerKind.Xv_Yv:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_Xv_Yv(code, code + 1, code + 2);
				return 1;
			}
			case LegacyOpCodeHandlerKind.Yb_Reg:
				reference = new OpCodeHandler_Yb_Reg(deserializer.ReadCode(), deserializer.ReadRegister());
				return 1;
			case LegacyOpCodeHandlerKind.Yb_Xb:
				reference = new OpCodeHandler_Yb_Xb(deserializer.ReadCode());
				return 1;
			case LegacyOpCodeHandlerKind.Yv_Reg:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_Yv_Reg(code, code + 1, code + 2);
				return 1;
			}
			case LegacyOpCodeHandlerKind.Yv_Reg2:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_Yv_Reg2(code, code + 1);
				return 1;
			}
			case LegacyOpCodeHandlerKind.Yv_Xv:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_Yv_Xv(code, code + 1, code + 2);
				return 1;
			}
			case LegacyOpCodeHandlerKind.M_Sw:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_M_Sw(code);
				return 1;
			}
			case LegacyOpCodeHandlerKind.Sw_M:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_Sw_M(code);
				return 1;
			}
			case LegacyOpCodeHandlerKind.Rq:
				reference = new OpCodeHandler_Rq(deserializer.ReadCode());
				return 1;
			case LegacyOpCodeHandlerKind.Gd_Rd:
				reference = new OpCodeHandler_Gd_Rd(deserializer.ReadCode());
				return 1;
			case LegacyOpCodeHandlerKind.PrefixEsCsSsDs:
				reference = new OpCodeHandler_PrefixEsCsSsDs(deserializer.ReadRegister());
				return 1;
			case LegacyOpCodeHandlerKind.PrefixFsGs:
				reference = new OpCodeHandler_PrefixFsGs(deserializer.ReadRegister());
				return 1;
			case LegacyOpCodeHandlerKind.Prefix66:
				reference = new OpCodeHandler_Prefix66();
				return 1;
			case LegacyOpCodeHandlerKind.Prefix67:
				reference = new OpCodeHandler_Prefix67();
				return 1;
			case LegacyOpCodeHandlerKind.PrefixF0:
				reference = new OpCodeHandler_PrefixF0();
				return 1;
			case LegacyOpCodeHandlerKind.PrefixF2:
				reference = new OpCodeHandler_PrefixF2();
				return 1;
			case LegacyOpCodeHandlerKind.PrefixF3:
				reference = new OpCodeHandler_PrefixF3();
				return 1;
			case LegacyOpCodeHandlerKind.PrefixREX:
				reference = new OpCodeHandler_PrefixREX(deserializer.ReadHandler(), (uint)deserializer.ReadInt32());
				return 1;
			default:
				throw new InvalidOperationException();
			}
		}
	}
	internal enum MvexOpCodeHandlerKind : byte
	{
		Invalid,
		Invalid2,
		Dup,
		HandlerReference,
		ArrayReference,
		RM,
		Group,
		W,
		MandatoryPrefix2,
		EH,
		M,
		MV,
		VW,
		HWIb,
		VWIb,
		VHW,
		VHWIb,
		VKW,
		KHW,
		KHWIb,
		VSIB,
		VSIB_V,
		V_VSIB
	}
	internal sealed class MvexOpCodeHandlerReader : OpCodeHandlerReader
	{
		public override int ReadHandlers(ref TableDeserializer deserializer, OpCodeHandler[] result, int resultIndex)
		{
			ref OpCodeHandler reference = ref result[resultIndex];
			switch (deserializer.ReadMvexOpCodeHandlerKind())
			{
			case MvexOpCodeHandlerKind.Invalid:
				reference = OpCodeHandler_Invalid.Instance;
				return 1;
			case MvexOpCodeHandlerKind.Invalid2:
				result[resultIndex] = OpCodeHandler_Invalid.Instance;
				result[resultIndex + 1] = OpCodeHandler_Invalid.Instance;
				return 2;
			case MvexOpCodeHandlerKind.Dup:
			{
				int num = deserializer.ReadInt32();
				OpCodeHandler opCodeHandler = deserializer.ReadHandler();
				for (int i = 0; i < num; i++)
				{
					result[resultIndex + i] = opCodeHandler;
				}
				return num;
			}
			case MvexOpCodeHandlerKind.HandlerReference:
				reference = deserializer.ReadHandlerReference();
				return 1;
			case MvexOpCodeHandlerKind.ArrayReference:
				throw new InvalidOperationException();
			case MvexOpCodeHandlerKind.RM:
				reference = new OpCodeHandler_RM(deserializer.ReadHandler(), deserializer.ReadHandler());
				return 1;
			case MvexOpCodeHandlerKind.Group:
				reference = new OpCodeHandler_Group(deserializer.ReadArrayReference(4u));
				return 1;
			case MvexOpCodeHandlerKind.W:
				reference = new OpCodeHandler_W(deserializer.ReadHandler(), deserializer.ReadHandler());
				return 1;
			case MvexOpCodeHandlerKind.MandatoryPrefix2:
				reference = new OpCodeHandler_MandatoryPrefix2(deserializer.ReadHandler(), deserializer.ReadHandler(), deserializer.ReadHandler(), deserializer.ReadHandler());
				return 1;
			case MvexOpCodeHandlerKind.EH:
				reference = new OpCodeHandler_EH(deserializer.ReadHandler(), deserializer.ReadHandler());
				return 1;
			case MvexOpCodeHandlerKind.M:
				reference = new OpCodeHandler_MVEX_M(deserializer.ReadCode());
				return 1;
			case MvexOpCodeHandlerKind.MV:
				reference = new OpCodeHandler_MVEX_MV(deserializer.ReadCode());
				return 1;
			case MvexOpCodeHandlerKind.VW:
				reference = new OpCodeHandler_MVEX_VW(deserializer.ReadCode());
				return 1;
			case MvexOpCodeHandlerKind.HWIb:
				reference = new OpCodeHandler_MVEX_HWIb(deserializer.ReadCode());
				return 1;
			case MvexOpCodeHandlerKind.VWIb:
				reference = new OpCodeHandler_MVEX_VWIb(deserializer.ReadCode());
				return 1;
			case MvexOpCodeHandlerKind.VHW:
				reference = new OpCodeHandler_MVEX_VHW(deserializer.ReadCode());
				return 1;
			case MvexOpCodeHandlerKind.VHWIb:
				reference = new OpCodeHandler_MVEX_VHWIb(deserializer.ReadCode());
				return 1;
			case MvexOpCodeHandlerKind.VKW:
				reference = new OpCodeHandler_MVEX_VKW(deserializer.ReadCode());
				return 1;
			case MvexOpCodeHandlerKind.KHW:
				reference = new OpCodeHandler_MVEX_KHW(deserializer.ReadCode());
				return 1;
			case MvexOpCodeHandlerKind.KHWIb:
				reference = new OpCodeHandler_MVEX_KHWIb(deserializer.ReadCode());
				return 1;
			case MvexOpCodeHandlerKind.VSIB:
				reference = new OpCodeHandler_MVEX_VSIB(deserializer.ReadCode());
				return 1;
			case MvexOpCodeHandlerKind.VSIB_V:
				reference = new OpCodeHandler_MVEX_VSIB_V(deserializer.ReadCode());
				return 1;
			case MvexOpCodeHandlerKind.V_VSIB:
				reference = new OpCodeHandler_MVEX_V_VSIB(deserializer.ReadCode());
				return 1;
			default:
				throw new InvalidOperationException();
			}
		}
	}
	internal abstract class OpCodeHandler
	{
		public readonly bool HasModRM;

		protected OpCodeHandler()
		{
		}

		protected OpCodeHandler(bool hasModRM)
		{
			HasModRM = hasModRM;
		}

		public abstract void Decode(Decoder decoder, ref Instruction instruction);
	}
	internal abstract class OpCodeHandlerModRM : OpCodeHandler
	{
		protected OpCodeHandlerModRM()
			: base(hasModRM: true)
		{
		}
	}
	internal sealed class OpCodeHandler_Invalid : OpCodeHandlerModRM
	{
		public static readonly OpCodeHandler_Invalid Instance = new OpCodeHandler_Invalid();

		private OpCodeHandler_Invalid()
		{
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			decoder.SetInvalidInstruction();
		}
	}
	internal sealed class OpCodeHandler_Invalid_NoModRM : OpCodeHandler
	{
		public static readonly OpCodeHandler_Invalid_NoModRM Instance = new OpCodeHandler_Invalid_NoModRM();

		private OpCodeHandler_Invalid_NoModRM()
		{
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			decoder.SetInvalidInstruction();
		}
	}
	internal sealed class OpCodeHandler_Simple : OpCodeHandler
	{
		private readonly Code code;

		public OpCodeHandler_Simple(Code code)
		{
			this.code = code;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			instruction.InternalSetCodeNoCheck(code);
		}
	}
	internal sealed class OpCodeHandler_Simple_ModRM : OpCodeHandlerModRM
	{
		private readonly Code code;

		public OpCodeHandler_Simple_ModRM(Code code)
		{
			this.code = code;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			instruction.InternalSetCodeNoCheck(code);
		}
	}
	internal sealed class OpCodeHandler_Group8x8 : OpCodeHandlerModRM
	{
		private readonly OpCodeHandler[] tableLow;

		private readonly OpCodeHandler[] tableHigh;

		public OpCodeHandler_Group8x8(OpCodeHandler[] tableLow, OpCodeHandler[] tableHigh)
		{
			if (tableLow.Length != 8)
			{
				throw new ArgumentOutOfRangeException("tableLow");
			}
			if (tableHigh.Length != 8)
			{
				throw new ArgumentOutOfRangeException("tableHigh");
			}
			this.tableLow = tableLow;
			this.tableHigh = tableHigh;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			OpCodeHandler opCodeHandler = ((decoder.state.mod != 3) ? tableLow[decoder.state.reg] : tableHigh[decoder.state.reg]);
			opCodeHandler.Decode(decoder, ref instruction);
		}
	}
	internal sealed class OpCodeHandler_Group8x64 : OpCodeHandlerModRM
	{
		private readonly OpCodeHandler[] tableLow;

		private readonly OpCodeHandler[] tableHigh;

		public OpCodeHandler_Group8x64(OpCodeHandler[] tableLow, OpCodeHandler[] tableHigh)
		{
			if (tableLow.Length != 8)
			{
				throw new ArgumentOutOfRangeException("tableLow");
			}
			if (tableHigh.Length != 64)
			{
				throw new ArgumentOutOfRangeException("tableHigh");
			}
			this.tableLow = tableLow;
			this.tableHigh = tableHigh;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			OpCodeHandler opCodeHandler = ((decoder.state.mod != 3) ? tableLow[decoder.state.reg] : (tableHigh[decoder.state.modrm & 0x3F] ?? tableLow[decoder.state.reg]));
			opCodeHandler.Decode(decoder, ref instruction);
		}
	}
	internal sealed class OpCodeHandler_Group : OpCodeHandlerModRM
	{
		private readonly OpCodeHandler[] groupHandlers;

		public OpCodeHandler_Group(OpCodeHandler[] groupHandlers)
		{
			this.groupHandlers = groupHandlers ?? throw new ArgumentNullException("groupHandlers");
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			groupHandlers[decoder.state.reg].Decode(decoder, ref instruction);
		}
	}
	internal sealed class OpCodeHandler_AnotherTable : OpCodeHandler
	{
		private readonly OpCodeHandler[] otherTable;

		public OpCodeHandler_AnotherTable(OpCodeHandler[] otherTable)
		{
			this.otherTable = otherTable ?? throw new ArgumentNullException("otherTable");
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			decoder.DecodeTable(otherTable, ref instruction);
		}
	}
	internal sealed class OpCodeHandler_MandatoryPrefix2 : OpCodeHandlerModRM
	{
		private readonly OpCodeHandler[] handlers;

		public OpCodeHandler_MandatoryPrefix2(OpCodeHandler handler)
			: this(handler, OpCodeHandler_Invalid.Instance, OpCodeHandler_Invalid.Instance, OpCodeHandler_Invalid.Instance)
		{
		}

		public OpCodeHandler_MandatoryPrefix2(OpCodeHandler handler, OpCodeHandler handler66, OpCodeHandler handlerF3, OpCodeHandler handlerF2)
		{
			handlers = new OpCodeHandler[4]
			{
				handler ?? throw new ArgumentNullException("handler"),
				handler66 ?? throw new ArgumentNullException("handler66"),
				handlerF3 ?? throw new ArgumentNullException("handlerF3"),
				handlerF2 ?? throw new ArgumentNullException("handlerF2")
			};
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			handlers[(uint)decoder.state.zs.mandatoryPrefix].Decode(decoder, ref instruction);
		}
	}
	internal sealed class OpCodeHandler_MandatoryPrefix2_NoModRM : OpCodeHandler
	{
		private readonly OpCodeHandler[] handlers;

		public OpCodeHandler_MandatoryPrefix2_NoModRM(OpCodeHandler handler, OpCodeHandler handler66, OpCodeHandler handlerF3, OpCodeHandler handlerF2)
		{
			handlers = new OpCodeHandler[4]
			{
				handler ?? throw new ArgumentNullException("handler"),
				handler66 ?? throw new ArgumentNullException("handler66"),
				handlerF3 ?? throw new ArgumentNullException("handlerF3"),
				handlerF2 ?? throw new ArgumentNullException("handlerF2")
			};
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			handlers[(uint)decoder.state.zs.mandatoryPrefix].Decode(decoder, ref instruction);
		}
	}
	internal sealed class OpCodeHandler_W : OpCodeHandlerModRM
	{
		private readonly OpCodeHandler handlerW0;

		private readonly OpCodeHandler handlerW1;

		public OpCodeHandler_W(OpCodeHandler handlerW0, OpCodeHandler handlerW1)
		{
			this.handlerW0 = handlerW0 ?? throw new ArgumentNullException("handlerW0");
			this.handlerW1 = handlerW1 ?? throw new ArgumentNullException("handlerW1");
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			(((decoder.state.zs.flags & StateFlags.W) != 0) ? handlerW1 : handlerW0).Decode(decoder, ref instruction);
		}
	}
	internal sealed class OpCodeHandler_Bitness : OpCodeHandler
	{
		private readonly OpCodeHandler handler1632;

		private readonly OpCodeHandler handler64;

		public OpCodeHandler_Bitness(OpCodeHandler handler1632, OpCodeHandler handler64)
		{
			this.handler1632 = handler1632;
			this.handler64 = handler64;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			OpCodeHandler opCodeHandler = ((!decoder.is64bMode) ? handler1632 : handler64);
			if (opCodeHandler.HasModRM)
			{
				decoder.ReadModRM();
			}
			opCodeHandler.Decode(decoder, ref instruction);
		}
	}
	internal sealed class OpCodeHandler_Bitness_DontReadModRM : OpCodeHandlerModRM
	{
		private readonly OpCodeHandler handler1632;

		private readonly OpCodeHandler handler64;

		public OpCodeHandler_Bitness_DontReadModRM(OpCodeHandler handler1632, OpCodeHandler handler64)
		{
			this.handler1632 = handler1632;
			this.handler64 = handler64;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			OpCodeHandler opCodeHandler = ((!decoder.is64bMode) ? handler1632 : handler64);
			opCodeHandler.Decode(decoder, ref instruction);
		}
	}
	internal sealed class OpCodeHandler_RM : OpCodeHandlerModRM
	{
		private readonly OpCodeHandler reg;

		private readonly OpCodeHandler mem;

		public OpCodeHandler_RM(OpCodeHandler reg, OpCodeHandler mem)
		{
			this.reg = reg ?? throw new ArgumentNullException("reg");
			this.mem = mem ?? throw new ArgumentNullException("mem");
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			((decoder.state.mod == 3) ? reg : mem).Decode(decoder, ref instruction);
		}
	}
	internal readonly struct HandlerOptions
	{
		public readonly OpCodeHandler handler;

		public readonly DecoderOptions options;

		public HandlerOptions(OpCodeHandler handler, DecoderOptions options)
		{
			this.handler = handler;
			this.options = options;
		}
	}
	internal sealed class OpCodeHandler_Options1632 : OpCodeHandler
	{
		private readonly OpCodeHandler defaultHandler;

		private readonly HandlerOptions[] infos;

		private readonly DecoderOptions infoOptions;

		public OpCodeHandler_Options1632(OpCodeHandler defaultHandler, OpCodeHandler handler1, DecoderOptions options1)
		{
			this.defaultHandler = defaultHandler ?? throw new ArgumentNullException("defaultHandler");
			infos = new HandlerOptions[1]
			{
				new HandlerOptions(handler1, options1)
			};
			infoOptions = options1;
		}

		public OpCodeHandler_Options1632(OpCodeHandler defaultHandler, OpCodeHandler handler1, DecoderOptions options1, OpCodeHandler handler2, DecoderOptions options2)
		{
			this.defaultHandler = defaultHandler ?? throw new ArgumentNullException("defaultHandler");
			infos = new HandlerOptions[2]
			{
				new HandlerOptions(handler1 ?? throw new ArgumentNullException("handler1"), options1),
				new HandlerOptions(handler2 ?? throw new ArgumentNullException("handler2"), options2)
			};
			infoOptions = options1 | options2;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			OpCodeHandler handler = defaultHandler;
			DecoderOptions options = decoder.options;
			if (!decoder.is64bMode && (decoder.options & infoOptions) != 0)
			{
				HandlerOptions[] array = infos;
				for (int i = 0; i < array.Length; i++)
				{
					HandlerOptions handlerOptions = array[i];
					if ((options & handlerOptions.options) != 0)
					{
						handler = handlerOptions.handler;
						break;
					}
				}
			}
			if (handler.HasModRM)
			{
				decoder.ReadModRM();
			}
			handler.Decode(decoder, ref instruction);
		}
	}
	internal sealed class OpCodeHandler_Options : OpCodeHandler
	{
		private readonly OpCodeHandler defaultHandler;

		private readonly HandlerOptions[] infos;

		private readonly DecoderOptions infoOptions;

		public OpCodeHandler_Options(OpCodeHandler defaultHandler, OpCodeHandler handler1, DecoderOptions options1)
		{
			this.defaultHandler = defaultHandler ?? throw new ArgumentNullException("defaultHandler");
			infos = new HandlerOptions[1]
			{
				new HandlerOptions(handler1, options1)
			};
			infoOptions = options1;
		}

		public OpCodeHandler_Options(OpCodeHandler defaultHandler, OpCodeHandler handler1, DecoderOptions options1, OpCodeHandler handler2, DecoderOptions options2)
		{
			this.defaultHandler = defaultHandler ?? throw new ArgumentNullException("defaultHandler");
			infos = new HandlerOptions[2]
			{
				new HandlerOptions(handler1 ?? throw new ArgumentNullException("handler1"), options1),
				new HandlerOptions(handler2 ?? throw new ArgumentNullException("handler2"), options2)
			};
			infoOptions = options1 | options2;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			OpCodeHandler handler = defaultHandler;
			DecoderOptions options = decoder.options;
			if ((decoder.options & infoOptions) != 0)
			{
				HandlerOptions[] array = infos;
				for (int i = 0; i < array.Length; i++)
				{
					HandlerOptions handlerOptions = array[i];
					if ((options & handlerOptions.options) != 0)
					{
						handler = handlerOptions.handler;
						break;
					}
				}
			}
			if (handler.HasModRM)
			{
				decoder.ReadModRM();
			}
			handler.Decode(decoder, ref instruction);
		}
	}
	internal sealed class OpCodeHandler_Options_DontReadModRM : OpCodeHandlerModRM
	{
		private readonly OpCodeHandler defaultHandler;

		private readonly HandlerOptions[] infos;

		public OpCodeHandler_Options_DontReadModRM(OpCodeHandler defaultHandler, OpCodeHandler handler1, DecoderOptions options1)
		{
			this.defaultHandler = defaultHandler ?? throw new ArgumentNullException("defaultHandler");
			infos = new HandlerOptions[1]
			{
				new HandlerOptions(handler1, options1)
			};
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			OpCodeHandler handler = defaultHandler;
			DecoderOptions options = decoder.options;
			HandlerOptions[] array = infos;
			for (int i = 0; i < array.Length; i++)
			{
				HandlerOptions handlerOptions = array[i];
				if ((options & handlerOptions.options) != 0)
				{
					handler = handlerOptions.handler;
					break;
				}
			}
			handler.Decode(decoder, ref instruction);
		}
	}
	internal static class OpCodeHandlersTables_EVEX
	{
		internal static readonly OpCodeHandler[] Handlers_0F;

		internal static readonly OpCodeHandler[] Handlers_0F38;

		internal static readonly OpCodeHandler[] Handlers_0F3A;

		internal static readonly OpCodeHandler[] Handlers_MAP5;

		internal static readonly OpCodeHandler[] Handlers_MAP6;

		private const int MaxIdNames = 10;

		private const uint Handlers_0FIndex = 9u;

		private const uint Handlers_0F38Index = 5u;

		private const uint Handlers_0F3AIndex = 6u;

		private const uint Handlers_MAP5Index = 7u;

		private const uint Handlers_MAP6Index = 8u;

		static OpCodeHandlersTables_EVEX()
		{
			EvexOpCodeHandlerReader handlerReader = new EvexOpCodeHandlerReader();
			TableDeserializer tableDeserializer = new TableDeserializer(handlerReader, 10, GetSerializedTables());
			tableDeserializer.Deserialize();
			Handlers_0F = tableDeserializer.GetTable(9u);
			Handlers_0F38 = tableDeserializer.GetTable(5u);
			Handlers_0F3A = tableDeserializer.GetTable(6u);
			Handlers_MAP5 = tableDeserializer.GetTable(7u);
			Handlers_MAP6 = tableDeserializer.GetTable(8u);
		}

		private static ReadOnlySpan<byte> GetSerializedTables()
		{
			return new byte[12430]
			{
				1, 8, 1, 8, 0, 9, 16, 77, 227, 12,
				4, 16, 109, 228, 12, 5, 16, 141, 229, 12,
				6, 0, 0, 0, 8, 0, 9, 16, 77, 234,
				12, 4, 16, 109, 235, 12, 5, 16, 141, 236,
				12, 6, 0, 0, 0, 8, 0, 9, 16, 77,
				241, 12, 4, 16, 109, 242, 12, 5, 16, 141,
				243, 12, 6, 0, 0, 0, 1, 8, 8, 0,
				7, 9, 17, 77, 244, 12, 8, 17, 109, 245,
				12, 9, 17, 141, 246, 12, 10, 9, 17, 77,
				247, 12, 11, 17, 109, 248, 12, 12, 17, 141,
				249, 12, 13, 0, 0, 8, 0, 7, 9, 17,
				77, 250, 12, 8, 17, 109, 251, 12, 9, 17,
				141, 252, 12, 10, 9, 17, 77, 253, 12, 11,
				17, 109, 254, 12, 12, 17, 141, 255, 12, 13,
				0, 0, 8, 0, 7, 9, 17, 77, 132, 13,
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				10, 0, 0, 0, 0, 8, 0, 7, 9, 17,
				77, 139, 13, 8, 17, 109, 140, 13, 9, 17,
				141, 141, 13, 10, 9, 17, 77, 142, 13, 11,
				17, 109, 143, 13, 12, 17, 141, 144, 13, 13,
				0, 0, 0, 8, 0, 7, 9, 17, 77, 149,
				13, 8, 17, 109, 150, 13, 9, 17, 141, 151,
				13, 10, 0, 0, 0, 0, 1, 8, 1, 8,
				0, 7, 0, 9, 17, 77, 156, 13, 11, 17,
				109, 157, 13, 12, 17, 141, 158, 13, 13, 0,
				0, 8, 0, 9, 18, 77, 162, 13, 4, 18,
				109, 163, 13, 5, 18, 141, 164, 13, 6, 0,
				0, 1, 8, 0, 7, 0, 9, 17, 77, 169,
				13, 11, 17, 109, 170, 13, 12, 17, 141, 171,
				13, 13, 0, 0, 8, 0, 9, 18, 77, 175,
				13, 4, 18, 109, 176, 13, 5, 18, 141, 177,
				13, 6, 0, 0, 1, 8, 0, 8, 0, 7,
				9, 0, 0, 63, 141, 140, 28, 2, 9, 0,
				0, 63, 109, 141, 28, 3, 0, 0, 8, 0,
				7, 9, 0, 0, 63, 141, 142, 28, 2, 9,
				0, 0, 63, 109, 143, 28, 3, 0, 0, 1,
				8, 0, 7, 9, 0, 0, 63, 141, 144, 28,
				2, 9, 0, 0, 63, 109, 145, 28, 3, 0,
				0, 8, 0, 7, 9, 0, 0, 63, 141, 146,
				28, 2, 9, 0, 0, 63, 109, 147, 28, 3,
				0, 0, 0, 1, 8, 0, 8, 0, 7, 9,
				0, 0, 63, 141, 148, 28, 2, 9, 0, 0,
				63, 141, 149, 28, 3, 0, 0, 8, 0, 7,
				9, 0, 0, 63, 141, 150, 28, 2, 9, 0,
				0, 63, 141, 151, 28, 3, 0, 0, 1, 8,
				0, 7, 9, 0, 0, 63, 141, 152, 28, 2,
				9, 0, 0, 63, 141, 153, 28, 3, 0, 0,
				8, 0, 7, 9, 0, 0, 63, 141, 154, 28,
				2, 9, 0, 0, 63, 141, 155, 28, 3, 0,
				0, 0, 1, 128, 2, 8, 0, 9, 41, 77,
				134, 20, 4, 41, 109, 135, 20, 5, 41, 141,
				136, 20, 6, 0, 0, 2, 3, 0, 8, 0,
				9, 41, 77, 153, 20, 4, 41, 109, 154, 20,
				5, 41, 141, 155, 20, 6, 0, 0, 2, 6,
				0, 8, 0, 9, 41, 77, 184, 20, 4, 41,
				109, 185, 20, 5, 41, 141, 186, 20, 6, 0,
				0, 8, 0, 7, 9, 42, 77, 189, 20, 8,
				42, 109, 190, 20, 9, 42, 141, 191, 20, 10,
				0, 0, 0, 8, 0, 7, 0, 9, 42, 77,
				194, 20, 11, 42, 109, 195, 20, 12, 42, 141,
				196, 20, 13, 0, 0, 1, 8, 0, 7, 0,
				9, 41, 77, 202, 20, 4, 41, 109, 203, 20,
				5, 41, 141, 204, 20, 6, 7, 9, 70, 77,
				77, 205, 20, 3, 70, 77, 109, 206, 20, 4,
				70, 109, 141, 207, 20, 5, 0, 0, 8, 0,
				7, 0, 9, 41, 77, 208, 20, 4, 41, 109,
				209, 20, 5, 41, 141, 210, 20, 6, 7, 9,
				70, 77, 77, 211, 20, 2, 70, 77, 109, 212,
				20, 3, 70, 77, 141, 213, 20, 4, 0, 0,
				8, 0, 7, 0, 9, 41, 77, 214, 20, 4,
				41, 109, 215, 20, 5, 41, 141, 216, 20, 6,
				7, 9, 70, 77, 77, 217, 20, 1, 70, 77,
				109, 218, 20, 2, 70, 77, 141, 219, 20, 3,
				0, 0, 8, 0, 7, 10, 58, 77, 77, 222,
				20, 3, 1, 0, 58, 109, 77, 223, 20, 4,
				1, 0, 58, 141, 109, 224, 20, 5, 1, 0,
				0, 7, 9, 70, 77, 77, 225, 20, 3, 70,
				77, 109, 226, 20, 4, 70, 109, 141, 227, 20,
				5, 0, 0, 8, 0, 7, 9, 42, 77, 229,
				20, 8, 42, 109, 230, 20, 9, 42, 141, 231,
				20, 10, 9, 42, 77, 232, 20, 11, 42, 109,
				233, 20, 12, 42, 141, 234, 20, 13, 7, 9,
				70, 77, 77, 235, 20, 2, 70, 77, 109, 236,
				20, 3, 70, 77, 141, 237, 20, 4, 0, 0,
				8, 0, 7, 9, 42, 77, 239, 20, 8, 42,
				109, 240, 20, 9, 42, 141, 241, 20, 10, 9,
				42, 77, 242, 20, 11, 42, 109, 243, 20, 12,
				42, 141, 244, 20, 13, 7, 9, 70, 77, 77,
				245, 20, 3, 70, 77, 109, 246, 20, 4, 70,
				109, 141, 247, 20, 5, 0, 0, 8, 0, 7,
				9, 0, 42, 109, 249, 20, 9, 42, 141, 250,
				20, 10, 9, 0, 42, 109, 251, 20, 12, 42,
				141, 252, 20, 13, 0, 0, 0, 8, 0, 7,
				9, 54, 77, 77, 130, 21, 2, 54, 109, 77,
				131, 21, 2, 54, 141, 77, 132, 21, 2, 0,
				0, 0, 8, 0, 7, 9, 0, 54, 109, 77,
				134, 21, 3, 54, 141, 77, 135, 21, 3, 9,
				0, 54, 109, 77, 136, 21, 3, 54, 141, 77,
				137, 21, 3, 0, 0, 8, 0, 7, 9, 0,
				51, 109, 139, 21, 4, 51, 141, 140, 21, 4,
				9, 0, 51, 109, 141, 21, 4, 51, 141, 142,
				21, 4, 0, 0, 8, 0, 7, 9, 0, 0,
				51, 141, 143, 21, 5, 9, 0, 0, 51, 141,
				144, 21, 5, 0, 0, 8, 0, 9, 52, 77,
				149, 21, 4, 52, 109, 150, 21, 5, 52, 141,
				151, 21, 6, 0, 0, 8, 0, 9, 52, 77,
				156, 21, 4, 52, 109, 157, 21, 5, 52, 141,
				158, 21, 6, 0, 0, 8, 0, 7, 9, 53,
				77, 163, 21, 8, 53, 109, 164, 21, 9, 53,
				141, 165, 21, 10, 0, 0, 0, 8, 0, 7,
				0, 9, 53, 77, 166, 21, 11, 53, 109, 167,
				21, 12, 53, 141, 168, 21, 13, 0, 0, 8,
				0, 9, 54, 77, 77, 172, 21, 3, 54, 109,
				77, 173, 21, 4, 54, 141, 109, 174, 21, 5,
				7, 9, 70, 77, 77, 175, 21, 3, 70, 77,
				109, 176, 21, 4, 70, 109, 141, 177, 21, 5,
				0, 0, 8, 0, 9, 54, 77, 77, 181, 21,
				2, 54, 109, 77, 182, 21, 3, 54, 141, 77,
				183, 21, 4, 7, 9, 70, 77, 77, 184, 21,
				2, 70, 77, 109, 185, 21, 3, 70, 77, 141,
				186, 21, 4, 0, 0, 8, 0, 9, 54, 77,
				77, 190, 21, 1, 54, 109, 77, 191, 21, 2,
				54, 141, 77, 192, 21, 3, 7, 9, 70, 77,
				77, 193, 21, 1, 70, 77, 109, 194, 21, 2,
				70, 77, 141, 195, 21, 3, 0, 0, 8, 0,
				9, 54, 77, 77, 199, 21, 3, 54, 109, 77,
				200, 21, 4, 54, 141, 109, 201, 21, 5, 7,
				9, 70, 77, 77, 202, 21, 3, 70, 77, 109,
				203, 21, 4, 70, 109, 141, 204, 21, 5, 0,
				0, 8, 0, 9, 54, 77, 77, 208, 21, 2,
				54, 109, 77, 209, 21, 3, 54, 141, 77, 210,
				21, 4, 7, 9, 70, 77, 77, 211, 21, 2,
				70, 77, 109, 212, 21, 3, 70, 77, 141, 213,
				21, 4, 0, 0, 8, 0, 7, 9, 54, 77,
				77, 217, 21, 3, 54, 109, 77, 218, 21, 4,
				54, 141, 109, 219, 21, 5, 0, 7, 9, 70,
				77, 77, 220, 21, 3, 70, 77, 109, 221, 21,
				4, 70, 109, 141, 222, 21, 5, 0, 0, 8,
				0, 7, 9, 19, 77, 223, 21, 4, 19, 109,
				224, 21, 5, 19, 141, 225, 21, 6, 9, 19,
				77, 226, 21, 4, 19, 109, 227, 21, 5, 19,
				141, 228, 21, 6, 7, 9, 19, 77, 229, 21,
				4, 19, 109, 230, 21, 5, 19, 141, 231, 21,
				6, 9, 19, 77, 232, 21, 4, 19, 109, 233,
				21, 5, 19, 141, 234, 21, 6, 0, 8, 0,
				7, 9, 20, 77, 235, 21, 8, 20, 109, 236,
				21, 9, 20, 141, 237, 21, 10, 9, 20, 77,
				238, 21, 11, 20, 109, 239, 21, 12, 20, 141,
				240, 21, 13, 7, 9, 20, 77, 241, 21, 8,
				20, 109, 242, 21, 9, 20, 141, 243, 21, 10,
				9, 20, 77, 244, 21, 11, 20, 109, 245, 21,
				12, 20, 141, 246, 21, 13, 0, 8, 0, 7,
				0, 9, 42, 77, 250, 21, 11, 42, 109, 251,
				21, 12, 42, 141, 252, 21, 13, 7, 9, 36,
				77, 253, 21, 36, 109, 254, 21, 36, 141, 255,
				21, 9, 36, 77, 128, 22, 36, 109, 129, 22,
				36, 141, 130, 22, 0, 8, 0, 7, 0, 9,
				20, 77, 134, 22, 11, 20, 109, 135, 22, 12,
				20, 141, 136, 22, 13, 7, 9, 28, 77, 137,
				22, 28, 109, 138, 22, 28, 141, 139, 22, 9,
				28, 77, 140, 22, 28, 109, 141, 22, 28, 141,
				142, 22, 0, 8, 0, 7, 9, 62, 77, 146,
				22, 4, 62, 109, 147, 22, 5, 62, 141, 148,
				22, 6, 0, 7, 0, 9, 36, 77, 149, 22,
				36, 109, 150, 22, 36, 141, 151, 22, 0, 8,
				0, 7, 9, 42, 77, 155, 22, 8, 42, 109,
				156, 22, 9, 42, 141, 157, 22, 10, 0, 0,
				0, 8, 0, 7, 10, 45, 77, 160, 22, 8,
				0, 45, 109, 161, 22, 9, 0, 45, 141, 162,
				22, 10, 0, 10, 45, 77, 163, 22, 11, 0,
				45, 109, 164, 22, 12, 0, 45, 141, 165, 22,
				13, 0, 0, 0, 8, 0, 7, 44, 77, 168,
				22, 2, 0, 44, 77, 169, 22, 3, 0, 0,
				0, 1, 8, 0, 9, 54, 77, 77, 177, 22,
				3, 54, 109, 77, 178, 22, 4, 54, 141, 109,
				179, 22, 5, 7, 9, 70, 77, 77, 180, 22,
				3, 70, 77, 109, 181, 22, 4, 70, 109, 141,
				182, 22, 5, 0, 0, 8, 0, 9, 54, 77,
				77, 186, 22, 2, 54, 109, 77, 187, 22, 3,
				54, 141, 77, 188, 22, 4, 7, 9, 70, 77,
				77, 189, 22, 2, 70, 77, 109, 190, 22, 3,
				70, 77, 141, 191, 22, 4, 0, 0, 8, 0,
				9, 54, 77, 77, 195, 22, 1, 54, 109, 77,
				196, 22, 2, 54, 141, 77, 197, 22, 3, 7,
				9, 70, 77, 77, 198, 22, 1, 70, 77, 109,
				199, 22, 2, 70, 77, 141, 200, 22, 3, 0,
				0, 8, 0, 9, 54, 77, 77, 204, 22, 3,
				54, 109, 77, 205, 22, 4, 54, 141, 109, 206,
				22, 5, 7, 9, 70, 77, 77, 207, 22, 3,
				70, 77, 109, 208, 22, 4, 70, 109, 141, 209,
				22, 5, 0, 0, 8, 0, 9, 54, 77, 77,
				213, 22, 2, 54, 109, 77, 214, 22, 3, 54,
				141, 77, 215, 22, 4, 7, 9, 70, 77, 77,
				216, 22, 2, 70, 77, 109, 217, 22, 3, 70,
				77, 141, 218, 22, 4, 0, 0, 8, 0, 7,
				9, 54, 77, 77, 222, 22, 3, 54, 109, 77,
				223, 22, 4, 54, 141, 109, 224, 22, 5, 0,
				7, 9, 70, 77, 77, 225, 22, 3, 70, 77,
				109, 226, 22, 4, 70, 109, 141, 227, 22, 5,
				0, 0, 8, 0, 7, 9, 0, 42, 109, 229,
				22, 9, 42, 141, 230, 22, 10, 9, 0, 42,
				109, 231, 22, 12, 42, 141, 232, 22, 13, 0,
				0, 8, 0, 7, 0, 9, 20, 77, 236, 22,
				11, 20, 109, 237, 22, 12, 20, 141, 238, 22,
				13, 0, 0, 8, 0, 9, 41, 77, 242, 22,
				4, 41, 109, 243, 22, 5, 41, 141, 244, 22,
				6, 7, 9, 36, 77, 245, 22, 36, 109, 246,
				22, 36, 141, 247, 22, 9, 36, 77, 248, 22,
				36, 109, 249, 22, 36, 141, 250, 22, 0, 8,
				0, 7, 9, 42, 77, 254, 22, 8, 42, 109,
				255, 22, 9, 42, 141, 128, 23, 10, 9, 42,
				77, 129, 23, 11, 42, 109, 130, 23, 12, 42,
				141, 131, 23, 13, 7, 9, 28, 77, 132, 23,
				28, 109, 133, 23, 28, 141, 134, 23, 9, 28,
				77, 135, 23, 28, 109, 136, 23, 28, 141, 137,
				23, 0, 8, 0, 9, 41, 77, 141, 23, 4,
				41, 109, 142, 23, 5, 41, 141, 143, 23, 6,
				7, 9, 36, 77, 144, 23, 36, 109, 145, 23,
				36, 141, 146, 23, 0, 0, 8, 0, 7, 9,
				42, 77, 150, 23, 8, 42, 109, 151, 23, 9,
				42, 141, 152, 23, 10, 9, 42, 77, 153, 23,
				11, 42, 109, 154, 23, 12, 42, 141, 155, 23,
				13, 0, 0, 8, 0, 9, 41, 77, 159, 23,
				4, 41, 109, 160, 23, 5, 41, 141, 161, 23,
				6, 0, 0, 8, 0, 7, 9, 42, 77, 165,
				23, 8, 42, 109, 166, 23, 9, 42, 141, 167,
				23, 10, 9, 42, 77, 168, 23, 11, 42, 109,
				169, 23, 12, 42, 141, 170, 23, 13, 0, 0,
				8, 0, 9, 41, 77, 174, 23, 4, 41, 109,
				175, 23, 5, 41, 141, 176, 23, 6, 0, 0,
				8, 0, 7, 9, 42, 77, 180, 23, 8, 42,
				109, 181, 23, 9, 42, 141, 182, 23, 10, 9,
				42, 77, 183, 23, 11, 42, 109, 184, 23, 12,
				42, 141, 185, 23, 13, 0, 0, 8, 0, 7,
				9, 42, 77, 189, 23, 8, 42, 109, 190, 23,
				9, 42, 141, 191, 23, 10, 9, 42, 77, 192,
				23, 11, 42, 109, 193, 23, 12, 42, 141, 194,
				23, 13, 0, 0, 0, 8, 0, 7, 10, 56,
				77, 197, 23, 8, 1, 56, 109, 198, 23, 9,
				1, 56, 141, 199, 23, 10, 1, 10, 56, 77,
				200, 23, 11, 1, 56, 109, 201, 23, 12, 1,
				56, 141, 202, 23, 13, 1, 0, 0, 8, 0,
				7, 44, 77, 203, 23, 2, 1, 44, 77, 204,
				23, 3, 1, 0, 0, 8, 0, 7, 9, 53,
				77, 205, 23, 8, 53, 109, 206, 23, 9, 53,
				141, 207, 23, 10, 9, 53, 77, 208, 23, 11,
				53, 109, 209, 23, 12, 53, 141, 210, 23, 13,
				0, 0, 8, 0, 7, 9, 42, 77, 215, 23,
				8, 42, 109, 216, 23, 9, 42, 141, 217, 23,
				10, 9, 42, 77, 218, 23, 11, 42, 109, 219,
				23, 12, 42, 141, 220, 23, 13, 0, 0, 8,
				0, 7, 9, 42, 77, 223, 23, 8, 42, 109,
				224, 23, 9, 42, 141, 225, 23, 10, 9, 42,
				77, 226, 23, 11, 42, 109, 227, 23, 12, 42,
				141, 228, 23, 13, 0, 0, 8, 0, 7, 9,
				42, 77, 233, 23, 8, 42, 109, 234, 23, 9,
				42, 141, 235, 23, 10, 9, 42, 77, 236, 23,
				11, 42, 109, 237, 23, 12, 42, 141, 238, 23,
				13, 0, 0, 2, 4, 0, 8, 0, 7, 9,
				53, 77, 239, 23, 8, 53, 109, 240, 23, 9,
				53, 141, 241, 23, 10, 9, 53, 77, 242, 23,
				11, 53, 109, 243, 23, 12, 53, 141, 244, 23,
				13, 0, 0, 8, 0, 7, 41, 77, 245, 23,
				2, 41, 77, 246, 23, 3, 0, 0, 8, 0,
				7, 9, 53, 77, 247, 23, 8, 53, 109, 248,
				23, 9, 53, 141, 249, 23, 10, 9, 53, 77,
				250, 23, 11, 53, 109, 251, 23, 12, 53, 141,
				252, 23, 13, 0, 0, 8, 0, 7, 41, 77,
				253, 23, 2, 41, 77, 254, 23, 3, 0, 0,
				8, 0, 7, 9, 42, 77, 255, 23, 8, 42,
				109, 128, 24, 9, 42, 141, 129, 24, 10, 0,
				0, 0, 8, 0, 7, 9, 42, 77, 130, 24,
				8, 42, 109, 131, 24, 9, 42, 141, 132, 24,
				10, 0, 0, 0, 8, 0, 7, 9, 42, 77,
				133, 24, 8, 42, 109, 134, 24, 9, 42, 141,
				135, 24, 10, 0, 7, 9, 42, 77, 136, 24,
				8, 42, 109, 137, 24, 9, 42, 141, 138, 24,
				10, 0, 7, 9, 0, 0, 40, 141, 139, 24,
				4, 0, 8, 0, 7, 9, 42, 77, 140, 24,
				8, 42, 109, 141, 24, 9, 42, 141, 142, 24,
				10, 0, 0, 7, 9, 0, 0, 40, 141, 143,
				24, 4, 0, 8, 0, 7, 9, 52, 77, 144,
				24, 4, 52, 109, 145, 24, 5, 52, 141, 146,
				24, 6, 9, 52, 77, 147, 24, 4, 52, 109,
				148, 24, 5, 52, 141, 149, 24, 6, 0, 0,
				8, 0, 7, 9, 53, 77, 150, 24, 8, 53,
				109, 151, 24, 9, 53, 141, 152, 24, 10, 9,
				53, 77, 153, 24, 11, 53, 109, 154, 24, 12,
				53, 141, 155, 24, 13, 0, 0, 1, 8, 0,
				7, 9, 54, 77, 77, 158, 24, 2, 54, 109,
				77, 159, 24, 2, 54, 141, 77, 160, 24, 2,
				0, 0, 0, 8, 0, 7, 9, 54, 77, 77,
				163, 24, 3, 54, 109, 77, 164, 24, 3, 54,
				141, 77, 165, 24, 3, 9, 54, 77, 77, 166,
				24, 3, 54, 109, 77, 167, 24, 3, 54, 141,
				77, 168, 24, 3, 0, 0, 8, 0, 7, 9,
				0, 51, 109, 170, 24, 4, 51, 141, 171, 24,
				4, 9, 0, 51, 109, 172, 24, 4, 51, 141,
				173, 24, 4, 0, 0, 8, 0, 7, 9, 0,
				0, 51, 141, 174, 24, 5, 9, 0, 0, 51,
				141, 175, 24, 5, 0, 0, 2, 6, 0, 8,
				0, 7, 9, 52, 77, 176, 24, 0, 52, 109,
				177, 24, 0, 52, 141, 178, 24, 0, 9, 52,
				77, 179, 24, 1, 52, 109, 180, 24, 1, 52,
				141, 181, 24, 1, 0, 0, 8, 0, 7, 9,
				69, 77, 182, 24, 0, 69, 109, 183, 24, 0,
				69, 141, 184, 24, 0, 9, 69, 77, 185, 24,
				1, 69, 109, 186, 24, 1, 69, 141, 187, 24,
				1, 0, 0, 8, 0, 7, 9, 42, 77, 188,
				24, 8, 42, 109, 189, 24, 9, 42, 141, 190,
				24, 10, 9, 42, 77, 191, 24, 11, 42, 109,
				192, 24, 12, 42, 141, 193, 24, 13, 0, 0,
				8, 0, 7, 9, 42, 77, 194, 24, 8, 42,
				109, 195, 24, 9, 42, 141, 196, 24, 10, 9,
				42, 77, 197, 24, 11, 42, 109, 198, 24, 12,
				42, 141, 199, 24, 13, 0, 0, 8, 0, 7,
				9, 41, 77, 200, 24, 4, 41, 109, 201, 24,
				5, 41, 141, 202, 24, 6, 9, 41, 77, 203,
				24, 4, 41, 109, 204, 24, 5, 41, 141, 205,
				24, 6, 0, 0, 0, 8, 0, 0, 0, 7,
				9, 27, 77, 206, 24, 8, 27, 109, 207, 24,
				9, 27, 141, 208, 24, 10, 9, 27, 77, 209,
				24, 11, 27, 109, 210, 24, 12, 27, 141, 211,
				24, 13, 2, 7, 0, 8, 0, 7, 0, 9,
				41, 77, 212, 24, 4, 41, 109, 213, 24, 5,
				41, 141, 214, 24, 6, 0, 0, 8, 0, 7,
				9, 42, 77, 215, 24, 8, 42, 109, 216, 24,
				9, 42, 141, 217, 24, 10, 9, 42, 77, 218,
				24, 11, 42, 109, 219, 24, 12, 42, 141, 220,
				24, 13, 0, 0, 8, 0, 7, 0, 9, 41,
				77, 221, 24, 4, 41, 109, 222, 24, 5, 41,
				141, 223, 24, 6, 7, 9, 55, 77, 77, 224,
				24, 8, 55, 77, 109, 225, 24, 9, 55, 109,
				141, 226, 24, 10, 0, 7, 9, 42, 77, 227,
				24, 8, 42, 109, 228, 24, 9, 42, 141, 229,
				24, 10, 0, 8, 0, 7, 9, 42, 77, 230,
				24, 8, 42, 109, 231, 24, 9, 42, 141, 232,
				24, 10, 9, 42, 77, 233, 24, 11, 42, 109,
				234, 24, 12, 42, 141, 235, 24, 13, 0, 0,
				0, 8, 0, 7, 9, 41, 77, 236, 24, 4,
				41, 109, 237, 24, 5, 41, 141, 238, 24, 6,
				9, 41, 77, 239, 24, 4, 41, 109, 240, 24,
				5, 41, 141, 241, 24, 6, 0, 0, 8, 0,
				7, 9, 42, 77, 242, 24, 8, 42, 109, 243,
				24, 9, 42, 141, 244, 24, 10, 9, 42, 77,
				245, 24, 11, 42, 109, 246, 24, 12, 42, 141,
				247, 24, 13, 0, 0, 8, 0, 7, 9, 42,
				77, 248, 24, 8, 42, 109, 249, 24, 9, 42,
				141, 250, 24, 10, 9, 42, 77, 251, 24, 11,
				42, 109, 252, 24, 12, 42, 141, 253, 24, 13,
				0, 0, 8, 0, 7, 9, 54, 77, 77, 128,
				25, 0, 54, 109, 77, 129, 25, 0, 54, 141,
				77, 130, 25, 0, 0, 0, 0, 8, 0, 7,
				9, 54, 77, 77, 133, 25, 1, 54, 109, 77,
				134, 25, 1, 54, 141, 77, 135, 25, 1, 0,
				0, 0, 8, 0, 7, 9, 38, 77, 136, 25,
				38, 109, 137, 25, 38, 141, 138, 25, 0, 0,
				0, 8, 0, 7, 9, 38, 77, 139, 25, 38,
				109, 140, 25, 38, 141, 141, 25, 0, 0, 0,
				8, 0, 9, 39, 77, 142, 25, 145, 25, 39,
				109, 143, 25, 146, 25, 39, 141, 144, 25, 147,
				25, 0, 0, 8, 0, 7, 9, 41, 77, 148,
				25, 4, 41, 109, 149, 25, 5, 41, 141, 150,
				25, 6, 9, 41, 77, 151, 25, 4, 41, 109,
				152, 25, 5, 41, 141, 153, 25, 6, 0, 0,
				8, 0, 7, 9, 42, 77, 154, 25, 8, 42,
				109, 155, 25, 9, 42, 141, 156, 25, 10, 9,
				42, 77, 157, 25, 11, 42, 109, 158, 25, 12,
				42, 141, 159, 25, 13, 0, 0, 8, 0, 7,
				9, 42, 77, 160, 25, 8, 42, 109, 161, 25,
				9, 42, 141, 162, 25, 10, 9, 42, 77, 163,
				25, 11, 42, 109, 164, 25, 12, 42, 141, 165,
				25, 13, 0, 0, 2, 3, 0, 8, 0, 7,
				0, 9, 42, 77, 172, 25, 11, 42, 109, 173,
				25, 12, 42, 141, 174, 25, 13, 0, 0, 2,
				4, 0, 8, 0, 7, 9, 52, 77, 175, 25,
				2, 52, 109, 176, 25, 2, 52, 141, 177, 25,
				2, 9, 52, 77, 178, 25, 3, 52, 109, 179,
				25, 3, 52, 141, 180, 25, 3, 0, 0, 8,
				0, 7, 9, 52, 77, 181, 25, 2, 52, 109,
				182, 25, 2, 52, 141, 183, 25, 2, 9, 52,
				77, 184, 25, 3, 52, 109, 185, 25, 3, 52,
				141, 186, 25, 3, 0, 0, 8, 0, 7, 9,
				69, 77, 187, 25, 2, 69, 109, 188, 25, 2,
				69, 141, 189, 25, 2, 9, 69, 77, 190, 25,
				3, 69, 109, 191, 25, 3, 69, 141, 192, 25,
				3, 0, 0, 8, 0, 7, 9, 69, 77, 193,
				25, 2, 69, 109, 194, 25, 2, 69, 141, 195,
				25, 2, 9, 69, 77, 196, 25, 3, 69, 109,
				197, 25, 3, 69, 141, 198, 25, 3, 0, 0,
				0, 8, 0, 7, 9, 41, 77, 203, 25, 4,
				41, 109, 204, 25, 5, 41, 141, 205, 25, 6,
				9, 41, 77, 206, 25, 4, 41, 109, 207, 25,
				5, 41, 141, 208, 25, 6, 0, 0, 0, 8,
				0, 7, 9, 19, 77, 213, 25, 4, 19, 109,
				214, 25, 5, 19, 141, 215, 25, 6, 0, 0,
				0, 8, 0, 7, 9, 37, 77, 77, 220, 25,
				2, 37, 109, 109, 221, 25, 2, 37, 141, 141,
				222, 25, 2, 9, 37, 77, 77, 223, 25, 3,
				37, 109, 77, 224, 25, 3, 37, 141, 109, 225,
				25, 3, 0, 0, 8, 0, 7, 9, 37, 77,
				77, 230, 25, 2, 37, 77, 109, 231, 25, 2,
				37, 109, 141, 232, 25, 2, 9, 37, 77, 77,
				233, 25, 3, 37, 109, 109, 234, 25, 3, 37,
				141, 141, 235, 25, 3, 0, 0, 8, 0, 7,
				9, 37, 77, 77, 240, 25, 2, 37, 109, 109,
				241, 25, 2, 37, 141, 141, 242, 25, 2, 9,
				37, 77, 77, 243, 25, 3, 37, 109, 77, 244,
				25, 3, 37, 141, 109, 245, 25, 3, 0, 0,
				8, 0, 7, 9, 37, 77, 77, 250, 25, 2,
				37, 77, 109, 251, 25, 2, 37, 109, 141, 252,
				25, 2, 9, 37, 77, 77, 253, 25, 3, 37,
				109, 109, 254, 25, 3, 37, 141, 141, 255, 25,
				3, 0, 0, 1, 8, 0, 7, 10, 45, 77,
				132, 26, 8, 0, 45, 109, 133, 26, 9, 0,
				45, 141, 134, 26, 10, 0, 10, 45, 77, 135,
				26, 11, 0, 45, 109, 136, 26, 12, 0, 45,
				141, 137, 26, 13, 0, 0, 0, 8, 0, 7,
				10, 45, 77, 142, 26, 8, 0, 45, 109, 143,
				26, 9, 0, 45, 141, 144, 26, 10, 0, 10,
				45, 77, 145, 26, 11, 0, 45, 109, 146, 26,
				12, 0, 45, 141, 147, 26, 13, 0, 0, 0,
				8, 0, 7, 10, 45, 77, 152, 26, 8, 0,
				45, 109, 153, 26, 9, 0, 45, 141, 154, 26,
				10, 0, 10, 45, 77, 155, 26, 11, 0, 45,
				109, 156, 26, 12, 0, 45, 141, 157, 26, 13,
				0, 0, 0, 8, 0, 7, 44, 77, 160, 26,
				2, 0, 44, 77, 161, 26, 3, 0, 0, 0,
				8, 0, 7, 10, 45, 77, 166, 26, 8, 0,
				45, 109, 167, 26, 9, 0, 45, 141, 168, 26,
				10, 0, 10, 45, 77, 169, 26, 11, 0, 45,
				109, 170, 26, 12, 0, 45, 141, 171, 26, 13,
				0, 0, 7, 9, 0, 0, 40, 141, 172, 26,
				4, 0, 8, 0, 7, 44, 77, 175, 26, 2,
				0, 44, 77, 176, 26, 3, 0, 0, 7, 40,
				77, 177, 26, 4, 0, 8, 0, 7, 10, 45,
				77, 182, 26, 8, 0, 45, 109, 183, 26, 9,
				0, 45, 141, 184, 26, 10, 0, 10, 45, 77,
				185, 26, 11, 0, 45, 109, 186, 26, 12, 0,
				45, 141, 187, 26, 13, 0, 0, 0, 8, 0,
				7, 44, 77, 190, 26, 2, 0, 44, 77, 191,
				26, 3, 0, 0, 0, 8, 0, 7, 10, 45,
				77, 196, 26, 8, 0, 45, 109, 197, 26, 9,
				0, 45, 141, 198, 26, 10, 0, 10, 45, 77,
				199, 26, 11, 0, 45, 109, 200, 26, 12, 0,
				45, 141, 201, 26, 13, 0, 0, 0, 8, 0,
				7, 44, 77, 204, 26, 2, 0, 44, 77, 205,
				26, 3, 0, 0, 0, 8, 0, 7, 9, 64,
				77, 77, 206, 26, 2, 64, 109, 109, 207, 26,
				2, 64, 141, 141, 208, 26, 2, 9, 64, 77,
				77, 209, 26, 3, 64, 77, 109, 210, 26, 3,
				64, 109, 141, 211, 26, 3, 0, 0, 8, 0,
				7, 9, 64, 77, 77, 212, 26, 2, 64, 109,
				77, 213, 26, 2, 64, 141, 109, 214, 26, 2,
				9, 64, 77, 77, 215, 26, 3, 64, 109, 109,
				216, 26, 3, 64, 141, 141, 217, 26, 3, 0,
				0, 8, 0, 7, 9, 64, 77, 77, 218, 26,
				2, 64, 109, 109, 219, 26, 2, 64, 141, 141,
				220, 26, 2, 9, 64, 77, 77, 221, 26, 3,
				64, 77, 109, 222, 26, 3, 64, 109, 141, 223,
				26, 3, 0, 0, 8, 0, 7, 9, 64, 77,
				77, 224, 26, 2, 64, 109, 77, 225, 26, 2,
				64, 141, 109, 226, 26, 2, 9, 64, 77, 77,
				227, 26, 3, 64, 109, 109, 228, 26, 3, 64,
				141, 141, 229, 26, 3, 0, 0, 1, 8, 0,
				7, 10, 45, 77, 234, 26, 8, 0, 45, 109,
				235, 26, 9, 0, 45, 141, 236, 26, 10, 0,
				10, 45, 77, 237, 26, 11, 0, 45, 109, 238,
				26, 12, 0, 45, 141, 239, 26, 13, 0, 0,
				0, 8, 0, 7, 10, 45, 77, 244, 26, 8,
				0, 45, 109, 245, 26, 9, 0, 45, 141, 246,
				26, 10, 0, 10, 45, 77, 247, 26, 11, 0,
				45, 109, 248, 26, 12, 0, 45, 141, 249, 26,
				13, 0, 0, 0, 8, 0, 7, 10, 45, 77,
				254, 26, 8, 0, 45, 109, 255, 26, 9, 0,
				45, 141, 128, 27, 10, 0, 10, 45, 77, 129,
				27, 11, 0, 45, 109, 130, 27, 12, 0, 45,
				141, 131, 27, 13, 0, 0, 0, 8, 0, 7,
				44, 77, 134, 27, 2, 0, 44, 77, 135, 27,
				3, 0, 0, 0, 8, 0, 7, 10, 45, 77,
				140, 27, 8, 0, 45, 109, 141, 27, 9, 0,
				45, 141, 142, 27, 10, 0, 10, 45, 77, 143,
				27, 11, 0, 45, 109, 144, 27, 12, 0, 45,
				141, 145, 27, 13, 0, 0, 7, 9, 0, 0,
				40, 141, 146, 27, 4, 0, 8, 0, 7, 44,
				77, 149, 27, 2, 0, 44, 77, 150, 27, 3,
				0, 0, 7, 40, 77, 151, 27, 4, 0, 8,
				0, 7, 10, 45, 77, 156, 27, 8, 0, 45,
				109, 157, 27, 9, 0, 45, 141, 158, 27, 10,
				0, 10, 45, 77, 159, 27, 11, 0, 45, 109,
				160, 27, 12, 0, 45, 141, 161, 27, 13, 0,
				0, 0, 8, 0, 7, 44, 77, 164, 27, 2,
				0, 44, 77, 165, 27, 3, 0, 0, 0, 8,
				0, 7, 10, 45, 77, 170, 27, 8, 0, 45,
				109, 171, 27, 9, 0, 45, 141, 172, 27, 10,
				0, 10, 45, 77, 173, 27, 11, 0, 45, 109,
				174, 27, 12, 0, 45, 141, 175, 27, 13, 0,
				0, 0, 8, 0, 7, 44, 77, 178, 27, 2,
				0, 44, 77, 179, 27, 3, 0, 0, 0, 2,
				4, 0, 8, 0, 7, 0, 9, 42, 77, 180,
				27, 11, 42, 109, 181, 27, 12, 42, 141, 182,
				27, 13, 0, 0, 8, 0, 7, 0, 9, 42,
				77, 183, 27, 11, 42, 109, 184, 27, 12, 42,
				141, 185, 27, 13, 0, 0, 8, 0, 7, 10,
				45, 77, 190, 27, 8, 0, 45, 109, 191, 27,
				9, 0, 45, 141, 192, 27, 10, 0, 10, 45,
				77, 193, 27, 11, 0, 45, 109, 194, 27, 12,
				0, 45, 141, 195, 27, 13, 0, 0, 0, 8,
				0, 7, 10, 45, 77, 200, 27, 8, 0, 45,
				109, 201, 27, 9, 0, 45, 141, 202, 27, 10,
				0, 10, 45, 77, 203, 27, 11, 0, 45, 109,
				204, 27, 12, 0, 45, 141, 205, 27, 13, 0,
				0, 0, 8, 0, 7, 10, 45, 77, 210, 27,
				8, 0, 45, 109, 211, 27, 9, 0, 45, 141,
				212, 27, 10, 0, 10, 45, 77, 213, 27, 11,
				0, 45, 109, 214, 27, 12, 0, 45, 141, 215,
				27, 13, 0, 0, 0, 8, 0, 7, 44, 77,
				218, 27, 2, 0, 44, 77, 219, 27, 3, 0,
				0, 0, 8, 0, 7, 10, 45, 77, 224, 27,
				8, 0, 45, 109, 225, 27, 9, 0, 45, 141,
				226, 27, 10, 0, 10, 45, 77, 227, 27, 11,
				0, 45, 109, 228, 27, 12, 0, 45, 141, 229,
				27, 13, 0, 0, 0, 8, 0, 7, 44, 77,
				232, 27, 2, 0, 44, 77, 233, 27, 3, 0,
				0, 0, 8, 0, 7, 10, 45, 77, 238, 27,
				8, 0, 45, 109, 239, 27, 9, 0, 45, 141,
				240, 27, 10, 0, 10, 45, 77, 241, 27, 11,
				0, 45, 109, 242, 27, 12, 0, 45, 141, 243,
				27, 13, 0, 0, 0, 8, 0, 7, 44, 77,
				246, 27, 2, 0, 44, 77, 247, 27, 3, 0,
				0, 0, 8, 0, 7, 10, 45, 77, 252, 27,
				8, 0, 45, 109, 253, 27, 9, 0, 45, 141,
				254, 27, 10, 0, 10, 45, 77, 255, 27, 11,
				0, 45, 109, 128, 28, 12, 0, 45, 141, 129,
				28, 13, 0, 0, 0, 8, 0, 7, 44, 77,
				132, 28, 2, 0, 44, 77, 133, 28, 3, 0,
				0, 0, 2, 4, 0, 8, 0, 7, 9, 53,
				77, 134, 28, 8, 53, 109, 135, 28, 9, 53,
				141, 136, 28, 10, 9, 53, 77, 137, 28, 11,
				53, 109, 138, 28, 12, 53, 141, 139, 28, 13,
				0, 0, 0, 6, 4, 3, 6, 4, 4, 8,
				0, 7, 10, 0, 0, 56, 141, 157, 28, 10,
				1, 10, 0, 0, 56, 141, 158, 28, 13, 1,
				0, 0, 0, 8, 0, 7, 10, 0, 0, 56,
				141, 161, 28, 10, 1, 10, 0, 0, 56, 141,
				162, 28, 13, 1, 0, 0, 8, 0, 7, 44,
				77, 164, 28, 2, 1, 44, 77, 165, 28, 3,
				1, 0, 0, 8, 0, 7, 10, 0, 0, 56,
				141, 167, 28, 10, 1, 10, 0, 0, 56, 141,
				168, 28, 13, 1, 0, 0, 8, 0, 7, 44,
				77, 170, 28, 2, 1, 44, 77, 171, 28, 3,
				1, 0, 0, 0, 8, 0, 7, 9, 41, 77,
				175, 28, 4, 41, 109, 176, 28, 5, 41, 141,
				177, 28, 6, 0, 0, 0, 2, 12, 0, 8,
				0, 9, 33, 77, 183, 28, 4, 33, 109, 184,
				28, 5, 33, 141, 185, 28, 6, 0, 0, 8,
				0, 9, 33, 77, 189, 28, 4, 33, 109, 190,
				28, 5, 33, 141, 191, 28, 6, 0, 0, 8,
				0, 9, 33, 77, 195, 28, 4, 33, 109, 196,
				28, 5, 33, 141, 197, 28, 6, 0, 0, 8,
				0, 9, 33, 77, 201, 28, 4, 33, 109, 202,
				28, 5, 33, 141, 203, 28, 6, 0, 0, 2,
				32, 0, 1, 128, 2, 8, 0, 7, 0, 9,
				0, 60, 109, 131, 29, 12, 60, 141, 132, 29,
				13, 0, 0, 8, 0, 7, 0, 9, 0, 60,
				109, 134, 29, 12, 60, 141, 135, 29, 13, 0,
				0, 0, 8, 0, 7, 9, 47, 77, 138, 29,
				8, 47, 109, 139, 29, 9, 47, 141, 140, 29,
				10, 9, 47, 77, 141, 29, 11, 47, 109, 142,
				29, 12, 47, 141, 143, 29, 13, 0, 0, 8,
				0, 7, 9, 60, 77, 146, 29, 8, 60, 109,
				147, 29, 9, 60, 141, 148, 29, 10, 0, 0,
				0, 8, 0, 7, 0, 9, 60, 77, 151, 29,
				11, 60, 109, 152, 29, 12, 60, 141, 153, 29,
				13, 0, 0, 1, 8, 7, 10, 61, 77, 188,
				35, 16, 61, 109, 189, 35, 17, 61, 141, 190,
				35, 18, 0, 7, 10, 61, 77, 158, 29, 8,
				61, 109, 159, 29, 9, 61, 141, 160, 29, 10,
				0, 0, 0, 8, 0, 7, 0, 10, 61, 77,
				164, 29, 11, 61, 109, 165, 29, 12, 61, 141,
				166, 29, 13, 0, 0, 8, 7, 49, 77, 191,
				35, 1, 0, 7, 49, 77, 169, 29, 2, 0,
				0, 0, 8, 0, 7, 0, 49, 77, 172, 29,
				3, 0, 0, 2, 3, 0, 8, 0, 9, 46,
				77, 186, 29, 4, 46, 109, 187, 29, 5, 46,
				141, 188, 29, 6, 0, 0, 2, 4, 0, 8,
				0, 9, 15, 77, 193, 29, 0, 0, 0, 0,
				0, 0, 8, 0, 9, 15, 77, 199, 29, 1,
				1, 0, 0, 0, 0, 8, 0, 9, 15, 77,
				205, 29, 2, 3, 0, 0, 0, 0, 8, 0,
				9, 11, 77, 211, 29, 2, 2, 0, 0, 0,
				0, 8, 0, 7, 9, 0, 48, 109, 109, 77,
				214, 29, 4, 48, 141, 141, 77, 215, 29, 4,
				9, 0, 48, 109, 109, 77, 216, 29, 4, 48,
				141, 141, 77, 217, 29, 4, 0, 0, 8, 0,
				7, 9, 0, 72, 77, 109, 219, 29, 4, 72,
				77, 141, 220, 29, 4, 9, 0, 72, 77, 109,
				221, 29, 4, 72, 77, 141, 222, 29, 4, 0,
				0, 8, 0, 7, 9, 0, 0, 48, 141, 141,
				109, 223, 29, 5, 9, 0, 0, 48, 141, 141,
				109, 224, 29, 5, 0, 0, 8, 0, 7, 9,
				0, 0, 72, 109, 141, 225, 29, 5, 9, 0,
				0, 72, 109, 141, 226, 29, 5, 0, 0, 0,
				8, 0, 7, 10, 73, 77, 77, 229, 29, 3,
				73, 77, 109, 230, 29, 4, 73, 109, 141, 231,
				29, 5, 0, 0, 0, 8, 0, 7, 9, 24,
				77, 232, 29, 8, 24, 109, 233, 29, 9, 24,
				141, 234, 29, 10, 9, 24, 77, 235, 29, 11,
				24, 109, 236, 29, 12, 24, 141, 237, 29, 13,
				0, 0, 8, 0, 7, 9, 24, 77, 238, 29,
				8, 24, 109, 239, 29, 9, 24, 141, 240, 29,
				10, 9, 24, 77, 241, 29, 11, 24, 109, 242,
				29, 12, 24, 141, 243, 29, 13, 0, 0, 8,
				0, 9, 31, 77, 248, 29, 0, 0, 0, 0,
				0, 0, 8, 0, 7, 9, 35, 77, 252, 29,
				2, 0, 0, 0, 0, 0, 8, 0, 9, 31,
				77, 129, 30, 2, 3, 0, 0, 0, 0, 8,
				0, 7, 9, 0, 47, 109, 131, 30, 9, 47,
				141, 132, 30, 10, 9, 0, 47, 109, 133, 30,
				12, 47, 141, 134, 30, 13, 0, 0, 0, 8,
				0, 7, 9, 47, 77, 135, 30, 8, 47, 109,
				136, 30, 9, 47, 141, 137, 30, 10, 9, 47,
				77, 138, 30, 11, 47, 109, 139, 30, 12, 47,
				141, 140, 30, 13, 0, 0, 8, 7, 10, 61,
				77, 156, 35, 16, 61, 109, 157, 35, 17, 61,
				141, 158, 35, 18, 0, 7, 10, 61, 77, 141,
				30, 8, 61, 109, 142, 30, 9, 61, 141, 143,
				30, 10, 10, 61, 77, 144, 30, 11, 61, 109,
				145, 30, 12, 61, 141, 146, 30, 13, 0, 0,
				8, 7, 49, 77, 159, 35, 1, 0, 7, 49,
				77, 147, 30, 2, 49, 77, 148, 30, 3, 0,
				0, 2, 16, 0, 8, 0, 7, 9, 0, 48,
				109, 109, 77, 158, 30, 4, 48, 141, 141, 77,
				159, 30, 4, 9, 0, 48, 109, 109, 77, 160,
				30, 4, 48, 141, 141, 77, 161, 30, 4, 0,
				0, 8, 0, 7, 9, 0, 72, 77, 109, 163,
				30, 4, 72, 77, 141, 164, 30, 4, 9, 0,
				72, 77, 109, 165, 30, 4, 72, 77, 141, 166,
				30, 4, 0, 0, 8, 0, 7, 9, 0, 0,
				48, 141, 141, 109, 167, 30, 5, 9, 0, 0,
				48, 141, 141, 109, 168, 30, 5, 0, 0, 8,
				0, 7, 9, 0, 0, 72, 109, 141, 169, 30,
				5, 9, 0, 0, 72, 109, 141, 170, 30, 5,
				0, 0, 1, 8, 0, 7, 9, 23, 77, 171,
				30, 4, 23, 109, 172, 30, 5, 23, 141, 173,
				30, 6, 9, 23, 77, 174, 30, 4, 23, 109,
				175, 30, 5, 23, 141, 176, 30, 6, 0, 0,
				8, 0, 7, 9, 23, 77, 177, 30, 4, 23,
				109, 178, 30, 5, 23, 141, 179, 30, 6, 9,
				23, 77, 180, 30, 4, 23, 109, 181, 30, 5,
				23, 141, 182, 30, 6, 0, 0, 1, 8, 0,
				7, 9, 46, 77, 191, 30, 4, 46, 109, 192,
				30, 5, 46, 141, 193, 30, 6, 0, 0, 0,
				8, 0, 7, 9, 0, 47, 109, 194, 30, 9,
				47, 141, 195, 30, 10, 9, 0, 47, 109, 196,
				30, 12, 47, 141, 197, 30, 13, 0, 0, 8,
				0, 9, 35, 77, 201, 30, 4, 35, 109, 202,
				30, 5, 35, 141, 203, 30, 6, 0, 0, 2,
				11, 0, 8, 0, 7, 10, 50, 77, 219, 30,
				8, 50, 109, 220, 30, 9, 50, 141, 221, 30,
				10, 10, 50, 77, 222, 30, 11, 50, 109, 223,
				30, 12, 50, 141, 224, 30, 13, 0, 0, 8,
				0, 7, 49, 77, 225, 30, 2, 49, 77, 226,
				30, 3, 0, 0, 1, 8, 0, 7, 10, 50,
				77, 227, 30, 8, 50, 109, 228, 30, 9, 50,
				141, 229, 30, 10, 10, 50, 77, 230, 30, 11,
				50, 109, 231, 30, 12, 50, 141, 232, 30, 13,
				0, 0, 8, 0, 7, 49, 77, 233, 30, 2,
				49, 77, 234, 30, 3, 0, 0, 8, 7, 10,
				61, 77, 184, 35, 16, 61, 109, 185, 35, 17,
				61, 141, 186, 35, 18, 0, 7, 10, 61, 77,
				235, 30, 8, 61, 109, 236, 30, 9, 61, 141,
				237, 30, 10, 10, 61, 77, 238, 30, 11, 61,
				109, 239, 30, 12, 61, 141, 240, 30, 13, 0,
				0, 8, 7, 49, 77, 187, 35, 1, 0, 7,
				49, 77, 241, 30, 2, 49, 77, 242, 30, 3,
				0, 0, 2, 14, 0, 8, 7, 9, 26, 77,
				148, 35, 16, 26, 109, 149, 35, 17, 26, 141,
				150, 35, 18, 0, 7, 9, 26, 77, 143, 31,
				8, 26, 109, 144, 31, 9, 26, 141, 145, 31,
				10, 9, 26, 77, 146, 31, 11, 26, 109, 147,
				31, 12, 26, 141, 148, 31, 13, 0, 0, 8,
				7, 25, 77, 151, 35, 1, 0, 7, 25, 77,
				149, 31, 2, 25, 77, 150, 31, 3, 0, 0,
				2, 8, 0, 8, 0, 7, 0, 9, 46, 77,
				175, 31, 4, 46, 109, 176, 31, 5, 46, 141,
				177, 31, 6, 0, 0, 8, 0, 7, 9, 47,
				77, 178, 31, 8, 47, 109, 179, 31, 9, 47,
				141, 180, 31, 10, 9, 47, 77, 181, 31, 11,
				47, 109, 182, 31, 12, 47, 141, 183, 31, 13,
				0, 0, 8, 0, 7, 0, 9, 46, 77, 184,
				31, 4, 46, 109, 185, 31, 5, 46, 141, 186,
				31, 6, 0, 0, 8, 0, 7, 9, 47, 77,
				187, 31, 8, 47, 109, 188, 31, 9, 47, 141,
				189, 31, 10, 9, 47, 77, 190, 31, 11, 47,
				109, 191, 31, 12, 47, 141, 192, 31, 13, 0,
				0, 2, 78, 0, 8, 7, 10, 22, 77, 231,
				33, 16, 22, 109, 232, 33, 17, 22, 141, 233,
				33, 18, 0, 0, 7, 21, 77, 234, 33, 1,
				0, 0, 2, 11, 0, 8, 0, 7, 0, 9,
				47, 77, 221, 31, 11, 47, 109, 222, 31, 12,
				47, 141, 223, 31, 13, 0, 0, 8, 0, 7,
				0, 9, 47, 77, 227, 31, 11, 47, 109, 228,
				31, 12, 47, 141, 229, 31, 13, 0, 0, 2,
				48, 0, 1, 128, 2, 2, 16, 0, 8, 0,
				0, 7, 5, 41, 77, 170, 35, 0, 52, 77,
				168, 35, 1, 0, 0, 8, 0, 0, 7, 5,
				68, 77, 171, 35, 71, 77, 169, 35, 1, 0,
				0, 0, 2, 11, 0, 8, 7, 44, 77, 153,
				34, 2, 0, 0, 7, 10, 57, 77, 77, 138,
				34, 8, 0, 57, 77, 109, 139, 34, 9, 0,
				57, 109, 141, 140, 34, 10, 0, 0, 0, 0,
				2, 12, 0, 8, 0, 0, 30, 77, 151, 34,
				2, 3, 0, 0, 8, 0, 0, 14, 77, 172,
				34, 1, 1, 0, 8, 0, 0, 14, 77, 146,
				34, 1, 0, 0, 8, 7, 66, 77, 208, 35,
				1, 0, 0, 0, 0, 8, 7, 66, 77, 235,
				33, 1, 0, 0, 0, 0, 2, 33, 0, 8,
				7, 10, 56, 77, 200, 35, 16, 0, 56, 109,
				201, 35, 17, 0, 56, 141, 202, 35, 18, 0,
				0, 0, 7, 44, 77, 203, 35, 1, 0, 0,
				0, 2, 6, 0, 8, 7, 10, 45, 77, 227,
				33, 16, 0, 45, 109, 228, 33, 17, 0, 45,
				141, 229, 33, 18, 0, 0, 0, 7, 44, 77,
				230, 33, 1, 0, 0, 0, 8, 7, 10, 45,
				77, 176, 35, 16, 0, 45, 109, 177, 35, 17,
				0, 45, 141, 178, 35, 18, 0, 0, 0, 7,
				44, 77, 179, 35, 1, 0, 0, 0, 8, 7,
				10, 57, 77, 77, 245, 33, 14, 1, 57, 109,
				77, 246, 33, 15, 1, 57, 141, 77, 247, 33,
				16, 1, 0, 7, 0, 10, 57, 77, 77, 239,
				33, 11, 0, 57, 77, 109, 240, 33, 12, 0,
				57, 77, 141, 241, 33, 13, 0, 7, 44, 77,
				145, 34, 1, 1, 0, 7, 0, 44, 77, 144,
				34, 3, 0, 8, 7, 10, 57, 77, 77, 236,
				33, 8, 0, 57, 77, 109, 237, 33, 9, 0,
				57, 109, 141, 238, 33, 10, 0, 10, 57, 77,
				77, 141, 34, 11, 0, 57, 77, 109, 142, 34,
				12, 0, 57, 77, 141, 143, 34, 13, 0, 7,
				10, 57, 77, 77, 242, 33, 15, 0, 57, 109,
				77, 243, 33, 16, 0, 57, 141, 109, 244, 33,
				17, 0, 0, 7, 10, 57, 77, 77, 154, 34,
				15, 1, 57, 109, 77, 155, 34, 16, 1, 57,
				141, 109, 156, 34, 17, 1, 0, 0, 8, 7,
				10, 45, 77, 204, 35, 16, 0, 45, 109, 205,
				35, 17, 0, 45, 141, 206, 35, 18, 0, 0,
				0, 7, 44, 77, 207, 35, 1, 0, 0, 0,
				8, 7, 10, 45, 77, 164, 35, 16, 1, 45,
				109, 165, 35, 17, 1, 45, 141, 166, 35, 18,
				1, 0, 0, 7, 44, 77, 167, 35, 1, 1,
				0, 0, 8, 7, 10, 45, 77, 190, 34, 16,
				0, 45, 109, 191, 34, 17, 0, 45, 141, 192,
				34, 18, 0, 0, 0, 7, 44, 77, 193, 34,
				1, 0, 0, 0, 8, 7, 10, 45, 77, 160,
				35, 16, 1, 45, 109, 161, 35, 17, 1, 45,
				141, 162, 35, 18, 1, 0, 0, 7, 44, 77,
				163, 35, 1, 1, 0, 0, 2, 14, 0, 8,
				0, 9, 67, 172, 35, 1, 1, 0, 0, 0,
				0, 2, 9, 0, 8, 7, 10, 57, 77, 77,
				160, 34, 15, 1, 57, 109, 77, 161, 34, 16,
				1, 57, 141, 109, 162, 34, 17, 1, 0, 7,
				10, 57, 77, 77, 163, 34, 14, 1, 57, 109,
				77, 164, 34, 15, 1, 57, 141, 77, 165, 34,
				16, 1, 0, 14, 77, 174, 34, 1, 1, 0,
				8, 7, 10, 57, 77, 77, 254, 33, 15, 0,
				57, 109, 77, 255, 33, 16, 0, 57, 141, 109,
				128, 34, 17, 0, 0, 7, 10, 57, 77, 77,
				129, 34, 14, 0, 57, 109, 77, 130, 34, 15,
				0, 57, 141, 77, 131, 34, 16, 0, 0, 14,
				77, 149, 34, 1, 0, 0, 8, 0, 7, 10,
				57, 77, 77, 157, 34, 14, 1, 57, 109, 77,
				158, 34, 15, 1, 57, 141, 77, 159, 34, 16,
				1, 0, 0, 7, 10, 57, 77, 77, 176, 34,
				8, 0, 57, 77, 109, 177, 34, 9, 0, 57,
				109, 141, 178, 34, 10, 0, 10, 57, 77, 77,
				179, 34, 11, 0, 57, 77, 109, 180, 34, 12,
				0, 57, 77, 141, 181, 34, 13, 0, 8, 0,
				7, 10, 57, 77, 77, 251, 33, 14, 0, 57,
				109, 77, 252, 33, 15, 0, 57, 141, 77, 253,
				33, 16, 0, 0, 30, 77, 182, 34, 2, 3,
				0, 8, 7, 10, 56, 77, 166, 34, 16, 1,
				56, 109, 167, 34, 17, 1, 56, 141, 168, 34,
				18, 1, 0, 7, 10, 56, 77, 169, 34, 16,
				1, 56, 109, 170, 34, 17, 1, 56, 141, 171,
				34, 18, 1, 0, 0, 0, 8, 7, 10, 56,
				77, 132, 34, 16, 0, 56, 109, 133, 34, 17,
				0, 56, 141, 134, 34, 18, 0, 0, 7, 10,
				56, 77, 135, 34, 16, 0, 56, 109, 136, 34,
				17, 0, 56, 141, 137, 34, 18, 0, 0, 7,
				10, 56, 77, 187, 34, 16, 0, 56, 109, 188,
				34, 17, 0, 56, 141, 189, 34, 18, 0, 0,
				7, 10, 56, 77, 184, 34, 16, 0, 56, 109,
				185, 34, 17, 0, 56, 141, 186, 34, 18, 0,
				0, 8, 0, 9, 12, 174, 35, 1, 1, 0,
				0, 0, 0, 2, 129, 1, 0, 1, 128, 2,
				2, 19, 0, 8, 7, 44, 77, 148, 34, 1,
				1, 0, 7, 10, 57, 77, 77, 248, 33, 15,
				1, 57, 109, 77, 249, 33, 16, 1, 57, 141,
				109, 250, 33, 17, 1, 0, 0, 0, 2, 24,
				0, 8, 0, 7, 10, 45, 77, 196, 35, 16,
				0, 45, 109, 197, 35, 17, 0, 45, 141, 198,
				35, 18, 0, 0, 0, 0, 8, 0, 7, 44,
				77, 199, 35, 1, 0, 0, 0, 0, 2, 20,
				0, 8, 0, 7, 10, 56, 77, 152, 35, 16,
				1, 56, 109, 153, 35, 17, 1, 56, 141, 154,
				35, 18, 1, 0, 0, 0, 8, 0, 7, 44,
				77, 155, 35, 1, 1, 0, 0, 0, 2, 8,
				0, 8, 0, 7, 9, 53, 77, 180, 35, 16,
				53, 109, 181, 35, 17, 53, 141, 182, 35, 18,
				0, 0, 0, 8, 0, 7, 41, 77, 183, 35,
				1, 0, 0, 0, 8, 0, 7, 9, 53, 77,
				192, 35, 16, 53, 109, 193, 35, 17, 53, 141,
				194, 35, 18, 0, 0, 0, 8, 0, 7, 41,
				77, 195, 35, 1, 0, 0, 0, 2, 6, 0,
				8, 0, 0, 7, 10, 76, 77, 197, 34, 8,
				76, 109, 198, 34, 9, 76, 141, 199, 34, 10,
				0, 7, 10, 76, 77, 194, 34, 8, 76, 109,
				195, 34, 9, 76, 141, 196, 34, 10, 0, 8,
				0, 0, 7, 75, 77, 201, 34, 2, 0, 7,
				75, 77, 200, 34, 2, 0, 2, 62, 0, 8,
				0, 7, 10, 45, 77, 210, 34, 16, 0, 45,
				109, 211, 34, 17, 0, 45, 141, 212, 34, 18,
				0, 0, 0, 0, 8, 0, 7, 10, 45, 77,
				219, 34, 16, 0, 45, 109, 220, 34, 17, 0,
				45, 141, 221, 34, 18, 0, 0, 0, 0, 8,
				0, 7, 10, 45, 77, 228, 34, 16, 0, 45,
				109, 229, 34, 17, 0, 45, 141, 230, 34, 18,
				0, 0, 0, 0, 8, 0, 7, 44, 77, 246,
				34, 1, 0, 0, 0, 0, 8, 0, 7, 10,
				45, 77, 252, 34, 16, 0, 45, 109, 253, 34,
				17, 0, 45, 141, 254, 34, 18, 0, 0, 0,
				0, 8, 0, 7, 44, 77, 142, 35, 1, 0,
				0, 0, 0, 8, 0, 7, 10, 45, 77, 237,
				34, 16, 0, 45, 109, 238, 34, 17, 0, 45,
				141, 239, 34, 18, 0, 0, 0, 0, 8, 0,
				7, 44, 77, 249, 34, 1, 0, 0, 0, 0,
				8, 0, 7, 10, 45, 77, 133, 35, 16, 0,
				45, 109, 134, 35, 17, 0, 45, 141, 135, 35,
				18, 0, 0, 0, 0, 8, 0, 7, 44, 77,
				145, 35, 1, 0, 0, 0, 0, 2, 6, 0,
				8, 0, 7, 10, 45, 77, 213, 34, 16, 0,
				45, 109, 214, 34, 17, 0, 45, 141, 215, 34,
				18, 0, 0, 0, 0, 8, 0, 7, 10, 45,
				77, 222, 34, 16, 0, 45, 109, 223, 34, 17,
				0, 45, 141, 224, 34, 18, 0, 0, 0, 0,
				8, 0, 7, 10, 45, 77, 231, 34, 16, 0,
				45, 109, 232, 34, 17, 0, 45, 141, 233, 34,
				18, 0, 0, 0, 0, 8, 0, 7, 44, 77,
				247, 34, 1, 0, 0, 0, 0, 8, 0, 7,
				10, 45, 77, 255, 34, 16, 0, 45, 109, 128,
				35, 17, 0, 45, 141, 129, 35, 18, 0, 0,
				0, 0, 8, 0, 7, 44, 77, 143, 35, 1,
				0, 0, 0, 0, 8, 0, 7, 10, 45, 77,
				240, 34, 16, 0, 45, 109, 241, 34, 17, 0,
				45, 141, 242, 34, 18, 0, 0, 0, 0, 8,
				0, 7, 44, 77, 250, 34, 1, 0, 0, 0,
				0, 8, 0, 7, 10, 45, 77, 136, 35, 16,
				0, 45, 109, 137, 35, 17, 0, 45, 141, 138,
				35, 18, 0, 0, 0, 0, 8, 0, 7, 44,
				77, 146, 35, 1, 0, 0, 0, 0, 2, 6,
				0, 8, 0, 7, 10, 45, 77, 216, 34, 16,
				0, 45, 109, 217, 34, 17, 0, 45, 141, 218,
				34, 18, 0, 0, 0, 0, 8, 0, 7, 10,
				45, 77, 225, 34, 16, 0, 45, 109, 226, 34,
				17, 0, 45, 141, 227, 34, 18, 0, 0, 0,
				0, 8, 0, 7, 10, 45, 77, 234, 34, 16,
				0, 45, 109, 235, 34, 17, 0, 45, 141, 236,
				34, 18, 0, 0, 0, 0, 8, 0, 7, 44,
				77, 248, 34, 1, 0, 0, 0, 0, 8, 0,
				7, 10, 45, 77, 130, 35, 16, 0, 45, 109,
				131, 35, 17, 0, 45, 141, 132, 35, 18, 0,
				0, 0, 0, 8, 0, 7, 44, 77, 144, 35,
				1, 0, 0, 0, 0, 8, 0, 7, 10, 45,
				77, 243, 34, 16, 0, 45, 109, 244, 34, 17,
				0, 45, 141, 245, 34, 18, 0, 0, 0, 0,
				8, 0, 7, 44, 77, 251, 34, 1, 0, 0,
				0, 0, 8, 0, 7, 10, 45, 77, 139, 35,
				16, 0, 45, 109, 140, 35, 17, 0, 45, 141,
				141, 35, 18, 0, 0, 0, 0, 8, 0, 7,
				44, 77, 147, 35, 1, 0, 0, 0, 0, 2,
				22, 0, 8, 0, 0, 7, 10, 76, 77, 205,
				34, 8, 76, 109, 206, 34, 9, 76, 141, 207,
				34, 10, 0, 7, 10, 76, 77, 202, 34, 8,
				76, 109, 203, 34, 9, 76, 141, 204, 34, 10,
				0, 8, 0, 0, 7, 75, 77, 209, 34, 2,
				0, 7, 75, 77, 208, 34, 2, 0, 2, 40,
				0, 1, 128, 2, 2, 16, 0, 8, 7, 9,
				52, 77, 128, 7, 4, 52, 109, 129, 7, 5,
				52, 141, 130, 7, 6, 0, 7, 0, 9, 52,
				77, 134, 7, 4, 52, 109, 135, 7, 5, 52,
				141, 136, 7, 6, 7, 5, 41, 77, 140, 7,
				0, 52, 77, 141, 7, 2, 0, 7, 0, 5,
				41, 77, 145, 7, 0, 52, 77, 146, 7, 3,
				8, 7, 9, 69, 77, 150, 7, 4, 69, 109,
				151, 7, 5, 69, 141, 152, 7, 6, 0, 7,
				0, 9, 69, 77, 156, 7, 4, 69, 109, 157,
				7, 5, 69, 141, 158, 7, 6, 7, 5, 68,
				77, 162, 7, 71, 77, 163, 7, 2, 0, 0,
				7, 0, 5, 68, 77, 167, 7, 71, 77, 168,
				7, 3, 0, 8, 7, 9, 34, 77, 173, 7,
				174, 7, 3, 0, 0, 0, 7, 0, 9, 32,
				77, 177, 7, 3, 0, 0, 7, 9, 52, 77,
				181, 7, 4, 52, 109, 182, 7, 5, 52, 141,
				183, 7, 6, 0, 7, 0, 9, 52, 77, 187,
				7, 3, 52, 109, 188, 7, 5, 52, 141, 189,
				7, 6, 8, 7, 9, 29, 77, 192, 7, 3,
				0, 0, 0, 7, 0, 9, 29, 77, 195, 7,
				3, 0, 0, 0, 0, 8, 7, 9, 42, 77,
				199, 7, 8, 42, 109, 200, 7, 9, 42, 141,
				201, 7, 10, 0, 7, 0, 9, 42, 77, 205,
				7, 11, 42, 109, 206, 7, 12, 42, 141, 207,
				7, 13, 0, 0, 8, 7, 9, 42, 77, 211,
				7, 8, 42, 109, 212, 7, 9, 42, 141, 213,
				7, 10, 0, 7, 0, 9, 42, 77, 217, 7,
				11, 42, 109, 218, 7, 12, 42, 141, 219, 7,
				13, 0, 0, 8, 7, 9, 34, 77, 222, 7,
				225, 7, 3, 0, 0, 0, 7, 0, 9, 32,
				77, 228, 7, 3, 0, 0, 7, 9, 52, 77,
				232, 7, 4, 52, 109, 233, 7, 5, 52, 141,
				234, 7, 6, 0, 0, 8, 7, 9, 29, 77,
				237, 7, 3, 0, 0, 0, 7, 0, 9, 29,
				77, 240, 7, 3, 0, 0, 0, 0, 2, 16,
				0, 8, 7, 9, 52, 77, 176, 8, 4, 52,
				109, 177, 8, 5, 52, 141, 178, 8, 6, 0,
				7, 0, 9, 52, 77, 182, 8, 4, 52, 109,
				183, 8, 5, 52, 141, 184, 8, 6, 0, 0,
				8, 7, 9, 69, 77, 188, 8, 4, 69, 109,
				189, 8, 5, 69, 141, 190, 8, 6, 0, 7,
				0, 9, 69, 77, 194, 8, 4, 69, 109, 195,
				8, 5, 69, 141, 196, 8, 6, 0, 0, 8,
				0, 0, 30, 77, 203, 8, 2, 3, 30, 77,
				209, 8, 2, 3, 8, 7, 9, 29, 77, 214,
				8, 4, 29, 109, 215, 8, 5, 29, 141, 216,
				8, 6, 0, 7, 0, 9, 29, 77, 220, 8,
				4, 29, 109, 221, 8, 5, 29, 141, 222, 8,
				6, 0, 0, 8, 0, 0, 14, 77, 231, 8,
				2, 1, 14, 77, 237, 8, 3, 1, 8, 0,
				0, 14, 77, 245, 8, 2, 0, 14, 77, 251,
				8, 3, 0, 8, 7, 66, 77, 255, 8, 2,
				0, 7, 0, 66, 77, 130, 9, 3, 0, 0,
				8, 7, 66, 77, 135, 9, 2, 0, 7, 0,
				66, 77, 136, 9, 3, 0, 0, 2, 33, 0,
				8, 7, 10, 56, 77, 239, 9, 8, 0, 56,
				109, 240, 9, 9, 0, 56, 141, 241, 9, 10,
				0, 0, 7, 0, 10, 56, 77, 245, 9, 11,
				0, 56, 109, 246, 9, 12, 0, 56, 141, 247,
				9, 13, 0, 7, 44, 77, 250, 9, 2, 0,
				0, 7, 0, 44, 77, 253, 9, 3, 0, 1,
				8, 7, 9, 42, 77, 139, 10, 8, 42, 109,
				140, 10, 9, 42, 141, 141, 10, 10, 0, 7,
				0, 9, 42, 77, 145, 10, 11, 42, 109, 146,
				10, 12, 42, 141, 147, 10, 13, 0, 0, 8,
				7, 9, 42, 77, 151, 10, 8, 42, 109, 152,
				10, 9, 42, 141, 153, 10, 10, 0, 7, 0,
				9, 42, 77, 157, 10, 11, 42, 109, 158, 10,
				12, 42, 141, 159, 10, 13, 0, 0, 8, 7,
				9, 42, 77, 163, 10, 8, 42, 109, 164, 10,
				9, 42, 141, 165, 10, 10, 0, 7, 0, 9,
				42, 77, 169, 10, 11, 42, 109, 170, 10, 12,
				42, 141, 171, 10, 13, 0, 0, 8, 7, 9,
				42, 77, 175, 10, 8, 42, 109, 176, 10, 9,
				42, 141, 177, 10, 10, 0, 7, 0, 9, 42,
				77, 181, 10, 11, 42, 109, 182, 10, 12, 42,
				141, 183, 10, 13, 0, 0, 8, 7, 10, 45,
				77, 187, 10, 8, 0, 45, 109, 188, 10, 9,
				0, 45, 141, 189, 10, 10, 0, 0, 7, 0,
				10, 45, 77, 193, 10, 11, 0, 45, 109, 194,
				10, 12, 0, 45, 141, 195, 10, 13, 0, 7,
				44, 77, 198, 10, 2, 0, 0, 7, 0, 44,
				77, 201, 10, 3, 0, 8, 7, 10, 45, 77,
				205, 10, 8, 0, 45, 109, 206, 10, 9, 0,
				45, 141, 207, 10, 10, 0, 0, 7, 0, 10,
				45, 77, 211, 10, 11, 0, 45, 109, 212, 10,
				12, 0, 45, 141, 213, 10, 13, 0, 7, 44,
				77, 216, 10, 2, 0, 0, 7, 0, 44, 77,
				219, 10, 3, 0, 8, 7, 10, 57, 77, 77,
				223, 10, 7, 1, 57, 109, 77, 224, 10, 8,
				1, 57, 141, 109, 225, 10, 9, 1, 0, 7,
				0, 10, 57, 77, 77, 229, 10, 11, 0, 57,
				77, 109, 230, 10, 12, 0, 57, 109, 141, 231,
				10, 13, 0, 7, 44, 77, 234, 10, 2, 1,
				0, 7, 0, 44, 77, 237, 10, 3, 0, 8,
				7, 10, 56, 77, 241, 10, 8, 0, 56, 109,
				242, 10, 9, 0, 56, 141, 243, 10, 10, 0,
				10, 57, 77, 77, 244, 10, 11, 0, 57, 77,
				109, 245, 10, 12, 0, 57, 109, 141, 246, 10,
				13, 0, 7, 10, 56, 77, 250, 10, 8, 0,
				56, 109, 251, 10, 9, 0, 56, 141, 252, 10,
				10, 0, 0, 7, 10, 56, 77, 128, 11, 8,
				1, 56, 109, 129, 11, 9, 1, 56, 141, 130,
				11, 10, 1, 0, 0, 8, 7, 10, 45, 77,
				134, 11, 8, 0, 45, 109, 135, 11, 9, 0,
				45, 141, 136, 11, 10, 0, 0, 7, 0, 10,
				45, 77, 140, 11, 11, 0, 45, 109, 141, 11,
				12, 0, 45, 141, 142, 11, 13, 0, 7, 44,
				77, 145, 11, 2, 0, 0, 7, 0, 44, 77,
				148, 11, 3, 0, 8, 7, 10, 45, 77, 152,
				11, 8, 1, 45, 109, 153, 11, 9, 1, 45,
				141, 154, 11, 10, 1, 0, 7, 0, 10, 45,
				77, 158, 11, 11, 1, 45, 109, 159, 11, 12,
				1, 45, 141, 160, 11, 13, 1, 7, 44, 77,
				163, 11, 2, 1, 0, 7, 0, 44, 77, 166,
				11, 3, 1, 8, 7, 10, 45, 77, 170, 11,
				8, 0, 45, 109, 171, 11, 9, 0, 45, 141,
				172, 11, 10, 0, 0, 7, 0, 10, 45, 77,
				176, 11, 11, 0, 45, 109, 177, 11, 12, 0,
				45, 141, 178, 11, 13, 0, 7, 44, 77, 181,
				11, 2, 0, 0, 7, 0, 44, 77, 184, 11,
				3, 0, 8, 7, 10, 45, 77, 188, 11, 8,
				1, 45, 109, 189, 11, 9, 1, 45, 141, 190,
				11, 10, 1, 0, 7, 0, 10, 45, 77, 194,
				11, 11, 1, 45, 109, 195, 11, 12, 1, 45,
				141, 196, 11, 13, 1, 7, 44, 77, 199, 11,
				2, 1, 0, 7, 0, 44, 77, 202, 11, 3,
				1, 8, 0, 9, 41, 77, 207, 11, 4, 41,
				109, 208, 11, 5, 41, 141, 209, 11, 6, 0,
				0, 8, 0, 9, 41, 77, 214, 11, 4, 41,
				109, 215, 11, 5, 41, 141, 216, 11, 6, 0,
				0, 8, 0, 7, 9, 42, 77, 221, 11, 8,
				42, 109, 222, 11, 9, 42, 141, 223, 11, 10,
				0, 0, 0, 8, 0, 9, 41, 77, 228, 11,
				4, 41, 109, 229, 11, 5, 41, 141, 230, 11,
				6, 0, 0, 8, 0, 9, 19, 77, 235, 11,
				4, 19, 109, 236, 11, 5, 19, 141, 237, 11,
				6, 0, 0, 8, 0, 9, 19, 77, 242, 11,
				4, 19, 109, 243, 11, 5, 19, 141, 244, 11,
				6, 0, 0, 8, 0, 7, 9, 20, 77, 249,
				11, 8, 20, 109, 250, 11, 9, 20, 141, 251,
				11, 10, 0, 0, 0, 8, 0, 9, 41, 77,
				128, 12, 4, 41, 109, 129, 12, 5, 41, 141,
				130, 12, 6, 0, 0, 8, 0, 9, 41, 77,
				135, 12, 4, 41, 109, 136, 12, 5, 41, 141,
				137, 12, 6, 0, 0, 8, 0, 9, 41, 77,
				142, 12, 4, 41, 109, 143, 12, 5, 41, 141,
				144, 12, 6, 0, 0, 8, 0, 7, 9, 42,
				77, 149, 12, 8, 42, 109, 150, 12, 9, 42,
				141, 151, 12, 10, 0, 0, 0, 8, 0, 7,
				9, 42, 77, 156, 12, 8, 42, 109, 157, 12,
				9, 42, 141, 158, 12, 10, 0, 0, 0, 8,
				0, 7, 0, 9, 42, 77, 162, 12, 11, 42,
				109, 163, 12, 12, 42, 141, 164, 12, 13, 0,
				0, 8, 0, 7, 0, 9, 42, 77, 168, 12,
				11, 42, 109, 169, 12, 12, 42, 141, 170, 12,
				13, 0, 0, 8, 0, 9, 67, 177, 12, 2,
				3, 0, 0, 0, 0, 8, 0, 7, 9, 52,
				77, 183, 12, 4, 52, 109, 184, 12, 5, 52,
				141, 185, 12, 6, 9, 52, 77, 186, 12, 4,
				52, 109, 187, 12, 5, 52, 141, 188, 12, 6,
				7, 9, 52, 77, 192, 12, 4, 52, 109, 193,
				12, 5, 52, 141, 194, 12, 6, 9, 52, 77,
				195, 12, 4, 52, 109, 196, 12, 5, 52, 141,
				197, 12, 6, 7, 9, 52, 77, 198, 12, 4,
				52, 109, 199, 12, 5, 52, 141, 200, 12, 6,
				9, 52, 77, 201, 12, 4, 52, 109, 202, 12,
				5, 52, 141, 203, 12, 6, 8, 0, 7, 9,
				60, 77, 208, 12, 8, 60, 109, 209, 12, 9,
				60, 141, 210, 12, 10, 0, 9, 59, 77, 214,
				12, 4, 59, 109, 215, 12, 5, 59, 141, 216,
				12, 6, 9, 59, 77, 220, 12, 4, 59, 109,
				221, 12, 5, 59, 141, 222, 12, 6, 6, 4,
				0, 6, 4, 1, 6, 4, 2, 8, 0, 9,
				19, 77, 182, 13, 4, 19, 109, 183, 13, 5,
				19, 141, 184, 13, 6, 0, 0, 8, 0, 9,
				19, 77, 189, 13, 4, 19, 109, 190, 13, 5,
				19, 141, 191, 13, 6, 0, 0, 8, 0, 7,
				9, 20, 77, 196, 13, 8, 20, 109, 197, 13,
				9, 20, 141, 198, 13, 10, 0, 0, 0, 0,
				8, 7, 10, 57, 77, 77, 204, 13, 8, 1,
				57, 109, 109, 205, 13, 9, 1, 57, 141, 141,
				206, 13, 10, 1, 10, 57, 77, 77, 207, 13,
				11, 1, 57, 77, 109, 208, 13, 12, 1, 57,
				109, 141, 209, 13, 13, 1, 7, 10, 57, 77,
				77, 211, 13, 7, 1, 57, 109, 77, 212, 13,
				8, 1, 57, 141, 109, 213, 13, 9, 1, 10,
				57, 77, 77, 214, 13, 11, 1, 57, 109, 109,
				215, 13, 12, 1, 57, 141, 141, 216, 13, 13,
				1, 14, 77, 217, 13, 2, 1, 14, 77, 220,
				13, 3, 1, 8, 7, 10, 57, 77, 77, 224,
				13, 8, 0, 57, 109, 109, 225, 13, 9, 0,
				57, 141, 141, 226, 13, 10, 0, 10, 57, 77,
				77, 227, 13, 11, 0, 57, 77, 109, 228, 13,
				12, 0, 57, 109, 141, 229, 13, 13, 0, 7,
				10, 57, 77, 77, 231, 13, 7, 0, 57, 109,
				77, 232, 13, 8, 0, 57, 141, 109, 233, 13,
				9, 0, 10, 57, 77, 77, 234, 13, 11, 0,
				57, 109, 109, 235, 13, 12, 0, 57, 141, 141,
				236, 13, 13, 0, 14, 77, 237, 13, 2, 0,
				14, 77, 240, 13, 3, 0, 8, 0, 7, 10,
				57, 77, 77, 242, 13, 7, 1, 57, 109, 77,
				243, 13, 8, 1, 57, 141, 109, 244, 13, 9,
				1, 10, 57, 77, 77, 245, 13, 11, 1, 57,
				109, 109, 246, 13, 12, 1, 57, 141, 141, 247,
				13, 13, 1, 7, 10, 57, 77, 77, 248, 13,
				7, 0, 57, 109, 77, 249, 13, 8, 0, 57,
				141, 109, 250, 13, 9, 0, 10, 57, 77, 77,
				251, 13, 11, 0, 57, 109, 109, 252, 13, 12,
				0, 57, 141, 141, 253, 13, 13, 0, 7, 10,
				57, 77, 77, 254, 13, 8, 0, 57, 109, 109,
				255, 13, 9, 0, 57, 141, 141, 128, 14, 10,
				0, 10, 57, 77, 77, 129, 14, 11, 0, 57,
				77, 109, 130, 14, 12, 0, 57, 109, 141, 131,
				14, 13, 0, 8, 0, 7, 10, 57, 77, 77,
				132, 14, 7, 0, 57, 109, 77, 133, 14, 8,
				0, 57, 141, 109, 134, 14, 9, 0, 10, 57,
				77, 77, 135, 14, 11, 0, 57, 109, 109, 136,
				14, 12, 0, 57, 141, 141, 137, 14, 13, 0,
				30, 77, 138, 14, 2, 3, 30, 77, 140, 14,
				2, 3, 1, 8, 0, 9, 12, 160, 14, 2,
				3, 0, 0, 7, 0, 9, 65, 77, 164, 14,
				3, 0, 0, 0, 8, 0, 7, 9, 69, 77,
				169, 14, 4, 69, 109, 170, 14, 5, 69, 141,
				171, 14, 6, 9, 69, 77, 172, 14, 4, 69,
				109, 173, 14, 5, 69, 141, 174, 14, 6, 7,
				9, 69, 77, 178, 14, 4, 69, 109, 179, 14,
				5, 69, 141, 180, 14, 6, 9, 69, 77, 181,
				14, 4, 69, 109, 182, 14, 5, 69, 141, 183,
				14, 6, 7, 9, 69, 77, 184, 14, 4, 69,
				109, 185, 14, 5, 69, 141, 186, 14, 6, 9,
				69, 77, 187, 14, 4, 69, 109, 188, 14, 5,
				69, 141, 189, 14, 6, 2, 66, 0, 8, 7,
				10, 22, 77, 223, 16, 8, 22, 109, 224, 16,
				9, 22, 141, 225, 16, 10, 0, 7, 0, 10,
				22, 77, 229, 16, 11, 22, 109, 230, 16, 12,
				22, 141, 231, 16, 13, 7, 21, 77, 234, 16,
				2, 0, 7, 0, 21, 77, 237, 16, 3, 0,
				8, 0, 7, 9, 31, 77, 246, 16, 1, 1,
				0, 0, 9, 31, 77, 246, 16, 1, 1, 0,
				0, 0, 0, 8, 0, 7, 9, 5, 13, 77,
				254, 16, 0, 0, 0, 9, 5, 13, 77, 254,
				16, 0, 0, 0, 0, 0, 8, 7, 9, 47,
				77, 131, 17, 8, 47, 109, 132, 17, 9, 47,
				141, 133, 17, 10, 0, 7, 0, 9, 47, 77,
				137, 17, 11, 47, 109, 138, 17, 12, 47, 141,
				139, 17, 13, 0, 0, 2, 10, 0, 8, 0,
				9, 43, 77, 77, 77, 173, 17, 4, 43, 109,
				109, 77, 174, 17, 4, 43, 141, 141, 77, 175,
				17, 4, 0, 0, 8, 0, 7, 9, 43, 77,
				77, 77, 180, 17, 4, 43, 109, 109, 77, 181,
				17, 4, 43, 141, 141, 77, 182, 17, 4, 0,
				0, 0, 8, 0, 7, 0, 9, 43, 77, 77,
				77, 187, 17, 4, 43, 109, 109, 77, 188, 17,
				4, 43, 141, 141, 77, 189, 17, 4, 0, 0,
				8, 0, 7, 0, 9, 42, 77, 194, 17, 11,
				42, 109, 195, 17, 12, 42, 141, 196, 17, 13,
				0, 0, 8, 0, 9, 41, 77, 201, 17, 4,
				41, 109, 202, 17, 5, 41, 141, 203, 17, 6,
				0, 0, 8, 0, 7, 0, 9, 74, 77, 206,
				17, 3, 0, 0, 0, 0, 0, 8, 0, 9,
				41, 77, 221, 17, 4, 41, 109, 222, 17, 5,
				41, 141, 223, 17, 6, 0, 0, 8, 0, 9,
				41, 77, 228, 17, 4, 41, 109, 229, 17, 5,
				41, 141, 230, 17, 6, 0, 0, 8, 0, 9,
				41, 77, 235, 17, 4, 41, 109, 236, 17, 5,
				41, 141, 237, 17, 6, 0, 0, 8, 0, 7,
				9, 42, 77, 242, 17, 8, 42, 109, 243, 17,
				9, 42, 141, 244, 17, 10, 9, 42, 77, 245,
				17, 11, 42, 109, 246, 17, 12, 42, 141, 247,
				17, 13, 0, 0, 8, 0, 9, 41, 77, 252,
				17, 4, 41, 109, 253, 17, 5, 41, 141, 254,
				17, 6, 0, 0, 8, 0, 9, 41, 77, 131,
				18, 4, 41, 109, 132, 18, 5, 41, 141, 133,
				18, 6, 0, 0, 8, 0, 9, 41, 77, 138,
				18, 4, 41, 109, 139, 18, 5, 41, 141, 140,
				18, 6, 0, 0, 8, 0, 7, 9, 42, 77,
				145, 18, 8, 42, 109, 146, 18, 9, 42, 141,
				147, 18, 10, 9, 42, 77, 148, 18, 11, 42,
				109, 149, 18, 12, 42, 141, 150, 18, 13, 0,
				0, 8, 0, 9, 41, 77, 155, 18, 4, 41,
				109, 156, 18, 5, 41, 141, 157, 18, 6, 0,
				0, 8, 0, 9, 43, 77, 77, 77, 162, 18,
				4, 43, 109, 109, 77, 163, 18, 4, 43, 141,
				141, 77, 164, 18, 4, 0, 0, 8, 0, 7,
				9, 43, 77, 77, 77, 169, 18, 4, 43, 109,
				109, 77, 170, 18, 4, 43, 141, 141, 77, 171,
				18, 4, 9, 43, 77, 77, 77, 172, 18, 4,
				43, 109, 109, 77, 173, 18, 4, 43, 141, 141,
				77, 174, 18, 4, 0, 0, 8, 0, 9, 41,
				77, 179, 18, 4, 41, 109, 180, 18, 5, 41,
				141, 181, 18, 6, 0, 0, 8, 0, 9, 41,
				77, 186, 18, 4, 41, 109, 187, 18, 5, 41,
				141, 188, 18, 6, 0, 0, 8, 0, 9, 41,
				77, 193, 18, 4, 41, 109, 194, 18, 5, 41,
				141, 195, 18, 6, 0, 0, 8, 0, 7, 0,
				10, 57, 77, 77, 199, 18, 11, 1, 57, 77,
				109, 200, 18, 12, 1, 57, 109, 141, 201, 18,
				13, 1, 7, 10, 57, 77, 77, 205, 18, 7,
				0, 57, 109, 77, 206, 18, 8, 0, 57, 141,
				109, 207, 18, 9, 0, 10, 57, 77, 77, 208,
				18, 11, 0, 57, 109, 109, 209, 18, 12, 0,
				57, 141, 141, 210, 18, 13, 0, 7, 0, 10,
				57, 77, 77, 214, 18, 11, 0, 57, 77, 109,
				215, 18, 12, 0, 57, 109, 141, 216, 18, 13,
				0, 8, 0, 7, 9, 29, 77, 221, 18, 4,
				29, 109, 222, 18, 5, 29, 141, 223, 18, 6,
				0, 0, 0, 8, 0, 9, 41, 77, 228, 18,
				4, 41, 109, 229, 18, 5, 41, 141, 230, 18,
				6, 0, 0, 8, 0, 9, 41, 77, 235, 18,
				4, 41, 109, 236, 18, 5, 41, 141, 237, 18,
				6, 0, 0, 8, 0, 9, 41, 77, 242, 18,
				4, 41, 109, 243, 18, 5, 41, 141, 244, 18,
				6, 0, 0, 8, 0, 7, 9, 42, 77, 249,
				18, 8, 42, 109, 250, 18, 9, 42, 141, 251,
				18, 10, 9, 42, 77, 252, 18, 11, 42, 109,
				253, 18, 12, 42, 141, 254, 18, 13, 0, 0,
				8, 0, 9, 41, 77, 131, 19, 4, 41, 109,
				132, 19, 5, 41, 141, 133, 19, 6, 0, 0,
				8, 0, 9, 41, 77, 138, 19, 4, 41, 109,
				139, 19, 5, 41, 141, 140, 19, 6, 0, 0,
				8, 0, 9, 41, 77, 145, 19, 4, 41, 109,
				146, 19, 5, 41, 141, 147, 19, 6, 0, 0,
				8, 0, 7, 9, 42, 77, 152, 19, 8, 42,
				109, 153, 19, 9, 42, 141, 154, 19, 10, 9,
				42, 77, 155, 19, 11, 42, 109, 156, 19, 12,
				42, 141, 157, 19, 13, 0, 0, 0, 8, 0,
				9, 43, 77, 77, 77, 165, 19, 4, 43, 109,
				109, 77, 166, 19, 4, 43, 141, 141, 77, 167,
				19, 4, 0, 0, 8, 0, 7, 9, 43, 77,
				77, 77, 172, 19, 4, 43, 109, 109, 77, 173,
				19, 4, 43, 141, 141, 77, 174, 19, 4, 0,
				0, 0, 8, 0, 7, 0, 9, 43, 77, 77,
				77, 179, 19, 4, 43, 109, 109, 77, 180, 19,
				4, 43, 141, 141, 77, 181, 19, 4, 0, 0,
				8, 0, 7, 0, 9, 42, 77, 186, 19, 11,
				42, 109, 187, 19, 12, 42, 141, 188, 19, 13,
				0, 0, 8, 0, 9, 41, 77, 193, 19, 4,
				41, 109, 194, 19, 5, 41, 141, 195, 19, 6,
				0, 0, 8, 0, 9, 33, 77, 200, 19, 4,
				33, 109, 201, 19, 5, 33, 141, 202, 19, 6,
				0, 0, 0, 8, 0, 9, 41, 77, 210, 19,
				4, 41, 109, 211, 19, 5, 41, 141, 212, 19,
				6, 0, 0, 8, 0, 9, 41, 77, 217, 19,
				4, 41, 109, 218, 19, 5, 41, 141, 219, 19,
				6, 0, 0, 8, 0, 7, 9, 42, 77, 224,
				19, 8, 42, 109, 225, 19, 9, 42, 141, 226,
				19, 10, 0, 0, 0, 8, 0, 7, 0, 9,
				42, 77, 231, 19, 11, 42, 109, 232, 19, 12,
				42, 141, 233, 19, 13, 0, 0, 8, 0, 9,
				41, 77, 238, 19, 4, 41, 109, 239, 19, 5,
				41, 141, 240, 19, 6, 0, 0, 8, 0, 9,
				41, 77, 245, 19, 4, 41, 109, 246, 19, 5,
				41, 141, 247, 19, 6, 0, 0, 8, 0, 7,
				9, 42, 77, 252, 19, 8, 42, 109, 253, 19,
				9, 42, 141, 254, 19, 10, 0, 0, 0, 0
			};
		}
	}
	internal static class OpCodeHandlersTables_Legacy
	{
		internal static readonly OpCodeHandler[] Handlers_MAP0;

		private const int MaxIdNames = 82;

		private const uint Handlers_MAP0Index = 81u;

		static OpCodeHandlersTables_Legacy()
		{
			LegacyOpCodeHandlerReader handlerReader = new LegacyOpCodeHandlerReader();
			TableDeserializer tableDeserializer = new TableDeserializer(handlerReader, 82, GetSerializedTables());
			tableDeserializer.Deserialize();
			Handlers_MAP0 = tableDeserializer.GetTable(81u);
		}

		private static ReadOnlySpan<byte> GetSerializedTables()
		{
			return new byte[6384]
			{
				1, 8, 115, 238, 3, 115, 239, 3, 115, 240,
				3, 115, 241, 3, 115, 242, 3, 115, 243, 3,
				115, 244, 3, 115, 245, 3, 1, 8, 174, 246,
				3, 174, 247, 3, 174, 248, 3, 174, 249, 3,
				174, 250, 3, 174, 251, 3, 174, 252, 3, 174,
				253, 3, 1, 8, 115, 254, 3, 2, 115, 255,
				3, 115, 128, 4, 116, 129, 4, 115, 131, 4,
				117, 132, 4, 134, 4, 115, 136, 4, 1, 64,
				5, 8, 175, 138, 4, 5, 8, 174, 139, 4,
				164, 140, 4, 5, 6, 2, 200, 2, 164, 171,
				33, 128, 128, 64, 5, 8, 175, 141, 4, 164,
				142, 4, 164, 143, 4, 200, 2, 164, 172, 33,
				128, 128, 64, 2, 164, 144, 4, 164, 145, 4,
				200, 2, 164, 173, 33, 128, 128, 64, 200, 2,
				164, 174, 33, 128, 128, 64, 164, 146, 4, 164,
				147, 4, 164, 148, 4, 164, 149, 4, 164, 150,
				4, 164, 151, 4, 164, 152, 4, 2, 164, 153,
				4, 164, 154, 4, 164, 155, 4, 164, 156, 4,
				164, 157, 4, 164, 158, 4, 164, 159, 4, 164,
				160, 4, 164, 161, 4, 164, 162, 4, 164, 163,
				4, 164, 164, 4, 164, 165, 4, 164, 166, 4,
				164, 167, 4, 164, 168, 4, 1, 8, 115, 169,
				4, 115, 170, 4, 115, 171, 4, 115, 172, 4,
				115, 173, 4, 115, 174, 4, 115, 175, 4, 115,
				176, 4, 1, 64, 5, 8, 174, 177, 4, 5,
				8, 174, 178, 4, 5, 8, 174, 179, 4, 5,
				8, 174, 180, 4, 5, 9, 2, 164, 181, 4,
				5, 22, 2, 1, 8, 115, 182, 4, 115, 183,
				4, 115, 184, 4, 115, 185, 4, 2, 115, 186,
				4, 2, 115, 187, 4, 1, 64, 5, 8, 174,
				188, 4, 5, 8, 174, 189, 4, 5, 8, 174,
				190, 4, 5, 8, 174, 191, 4, 164, 192, 4,
				164, 194, 4, 164, 196, 4, 164, 198, 4, 164,
				200, 4, 0, 10, 2, 164, 202, 4, 64, 2,
				4, 5, 8, 174, 203, 4, 5, 8, 174, 204,
				4, 5, 4, 2, 200, 2, 164, 175, 33, 128,
				128, 64, 5, 3, 2, 1, 8, 115, 205, 4,
				115, 206, 4, 115, 207, 4, 115, 208, 4, 115,
				209, 4, 115, 210, 4, 115, 211, 4, 115, 212,
				4, 1, 8, 176, 213, 4, 176, 214, 4, 174,
				215, 4, 174, 216, 4, 176, 217, 4, 176, 218,
				4, 176, 219, 4, 176, 220, 4, 1, 8, 115,
				221, 4, 115, 222, 4, 115, 223, 4, 115, 224,
				4, 116, 225, 4, 2, 117, 227, 4, 229, 4,
				115, 231, 4, 1, 64, 5, 8, 175, 233, 4,
				5, 8, 174, 234, 4, 5, 8, 175, 235, 4,
				5, 8, 175, 236, 4, 5, 8, 174, 237, 4,
				5, 8, 174, 238, 4, 5, 12, 2, 200, 2,
				164, 176, 33, 128, 128, 64, 5, 3, 2, 1,
				8, 115, 239, 4, 115, 240, 4, 115, 241, 4,
				115, 242, 4, 115, 243, 4, 115, 244, 4, 115,
				245, 4, 115, 246, 4, 1, 64, 5, 8, 176,
				247, 4, 5, 8, 176, 248, 4, 5, 8, 174,
				249, 4, 200, 2, 164, 177, 33, 128, 128, 64,
				164, 250, 4, 200, 2, 164, 178, 33, 128, 128,
				64, 2, 200, 2, 164, 179, 33, 128, 128, 64,
				200, 2, 164, 180, 33, 128, 128, 64, 200, 2,
				164, 181, 33, 128, 128, 64, 2, 5, 8, 176,
				251, 4, 5, 8, 176, 252, 4, 5, 8, 176,
				253, 4, 5, 8, 176, 254, 4, 1, 8, 115,
				255, 4, 115, 128, 5, 115, 129, 5, 115, 130,
				5, 115, 131, 5, 115, 132, 5, 115, 133, 5,
				115, 134, 5, 1, 64, 5, 8, 175, 135, 5,
				5, 8, 174, 136, 5, 5, 8, 175, 137, 5,
				5, 8, 175, 138, 5, 145, 139, 5, 21, 0,
				10, 2, 145, 140, 33, 21, 64, 2, 0, 10,
				2, 145, 141, 33, 21, 64, 2, 5, 5, 2,
				5, 8, 174, 143, 5, 5, 8, 174, 144, 5,
				5, 4, 2, 200, 2, 164, 182, 33, 128, 128,
				64, 5, 3, 2, 1, 8, 46, 207, 1, 11,
				46, 208, 1, 11, 46, 209, 1, 11, 46, 210,
				1, 11, 46, 211, 1, 11, 46, 212, 1, 11,
				46, 213, 1, 11, 45, 214, 1, 1, 8, 66,
				215, 1, 11, 66, 218, 1, 11, 66, 221, 1,
				11, 66, 224, 1, 11, 66, 227, 1, 11, 66,
				230, 1, 11, 66, 233, 1, 11, 65, 236, 1,
				1, 8, 46, 239, 1, 11, 46, 240, 1, 11,
				46, 241, 1, 11, 46, 242, 1, 11, 46, 243,
				1, 11, 46, 244, 1, 11, 46, 245, 1, 11,
				45, 246, 1, 1, 8, 62, 247, 1, 11, 62,
				250, 1, 11, 62, 253, 1, 11, 62, 128, 2,
				11, 62, 131, 2, 11, 62, 134, 2, 11, 62,
				137, 2, 11, 61, 140, 2, 1, 8, 133, 168,
				2, 5, 7, 2, 1, 8, 45, 231, 2, 45,
				232, 2, 45, 233, 2, 45, 234, 2, 45, 235,
				2, 45, 236, 2, 45, 237, 2, 45, 238, 2,
				1, 8, 63, 239, 2, 63, 242, 2, 63, 245,
				2, 63, 248, 2, 63, 251, 2, 63, 254, 2,
				63, 129, 3, 63, 132, 3, 1, 8, 47, 170,
				3, 47, 171, 3, 47, 172, 3, 47, 173, 3,
				47, 174, 3, 47, 175, 3, 47, 176, 3, 47,
				177, 3, 1, 8, 71, 178, 3, 71, 181, 3,
				71, 184, 3, 71, 187, 3, 71, 190, 3, 71,
				193, 3, 71, 196, 3, 71, 199, 3, 1, 8,
				42, 202, 3, 42, 203, 3, 42, 204, 3, 42,
				205, 3, 42, 206, 3, 42, 207, 3, 42, 208,
				3, 42, 209, 3, 1, 8, 53, 210, 3, 53,
				213, 3, 53, 216, 3, 53, 219, 3, 53, 222,
				3, 53, 225, 3, 53, 228, 3, 53, 231, 3,
				1, 8, 45, 199, 5, 45, 200, 5, 41, 201,
				5, 11, 41, 202, 5, 11, 40, 203, 5, 40,
				204, 5, 40, 205, 5, 40, 206, 5, 1, 8,
				65, 207, 5, 65, 210, 5, 52, 213, 5, 11,
				52, 216, 5, 11, 50, 219, 5, 50, 222, 5,
				50, 225, 5, 50, 228, 5, 1, 8, 41, 237,
				5, 11, 41, 238, 5, 11, 5, 6, 2, 1,
				8, 52, 239, 5, 11, 52, 242, 5, 11, 72,
				245, 5, 49, 248, 5, 72, 251, 5, 49, 254,
				5, 133, 129, 6, 2, 1, 8, 73, 132, 6,
				73, 135, 6, 74, 138, 6, 74, 141, 6, 74,
				144, 6, 74, 147, 6, 12, 17, 2, 2, 2,
				1, 2, 73, 222, 33, 1, 51, 150, 6, 17,
				2, 2, 2, 1, 2, 73, 222, 33, 128, 32,
				2, 1, 8, 9, 2, 120, 152, 6, 9, 2,
				120, 155, 6, 9, 2, 120, 158, 6, 9, 2,
				120, 161, 6, 73, 164, 6, 17, 2, 2, 110,
				167, 6, 2, 73, 168, 6, 110, 171, 6, 1,
				64, 20, 164, 172, 6, 3, 3, 3, 20, 164,
				173, 6, 3, 3, 3, 20, 164, 174, 6, 3,
				3, 3, 20, 164, 175, 6, 3, 3, 3, 20,
				164, 176, 6, 3, 3, 3, 20, 164, 177, 6,
				3, 3, 3, 20, 164, 226, 37, 3, 0, 3,
				164, 227, 37, 0, 3, 164, 228, 37, 6, 20,
				171, 178, 6, 3, 3, 3, 20, 164, 181, 6,
				3, 3, 3, 20, 164, 182, 6, 3, 0, 3,
				164, 225, 33, 0, 3, 164, 226, 33, 20, 164,
				183, 6, 3, 3, 3, 20, 3, 164, 183, 33,
				3, 3, 20, 3, 0, 3, 164, 184, 33, 3,
				3, 20, 3, 0, 3, 164, 185, 33, 3, 3,
				20, 164, 184, 6, 0, 3, 164, 186, 33, 3,
				3, 20, 164, 185, 6, 3, 3, 3, 20, 164,
				186, 6, 3, 3, 3, 5, 2, 6, 20, 164,
				187, 6, 3, 3, 3, 20, 164, 188, 6, 3,
				3, 3, 20, 164, 189, 6, 3, 3, 3, 20,
				164, 190, 6, 3, 3, 3, 171, 191, 6, 20,
				164, 194, 6, 164, 194, 6, 164, 254, 32, 164,
				201, 33, 171, 195, 6, 171, 198, 6, 164, 201,
				6, 164, 202, 6, 164, 203, 6, 171, 204, 6,
				5, 8, 6, 17, 165, 241, 32, 2, 165, 207,
				6, 165, 242, 32, 17, 2, 2, 2, 165, 243,
				32, 17, 2, 2, 165, 208, 6, 2, 6, 20,
				3, 3, 0, 3, 164, 202, 33, 3, 20, 3,
				3, 0, 3, 164, 203, 33, 3, 20, 164, 209,
				6, 3, 0, 3, 164, 204, 33, 3, 20, 164,
				210, 6, 3, 0, 3, 164, 205, 33, 3, 5,
				8, 6, 0, 2, 164, 211, 6, 164, 212, 6,
				20, 171, 213, 6, 3, 164, 216, 6, 3, 20,
				164, 217, 6, 3, 3, 3, 171, 218, 6, 20,
				164, 221, 6, 3, 0, 3, 164, 229, 37, 3,
				20, 171, 244, 32, 3, 0, 3, 164, 235, 32,
				0, 3, 164, 236, 32, 20, 164, 247, 32, 3,
				0, 3, 164, 237, 32, 171, 238, 32, 1, 8,
				19, 142, 33, 3, 5, 7, 2, 1, 8, 19,
				143, 33, 3, 5, 7, 2, 1, 8, 9, 2,
				19, 149, 33, 2, 5, 7, 2, 1, 8, 9,
				2, 19, 150, 33, 2, 5, 7, 2, 1, 8,
				9, 2, 19, 151, 33, 2, 5, 7, 2, 1,
				8, 9, 2, 19, 152, 33, 2, 5, 7, 2,
				1, 8, 9, 18, 2, 2, 214, 166, 15, 2,
				0, 2, 9, 18, 2, 2, 171, 169, 15, 2,
				0, 2, 9, 18, 2, 2, 171, 172, 15, 2,
				0, 2, 9, 18, 2, 2, 171, 222, 37, 2,
				0, 2, 9, 18, 2, 2, 171, 216, 37, 2,
				0, 2, 9, 18, 2, 2, 171, 216, 33, 2,
				0, 2, 9, 18, 2, 2, 171, 210, 37, 2,
				0, 2, 9, 18, 2, 2, 171, 213, 37, 2,
				0, 2, 1, 8, 9, 171, 177, 15, 2, 9,
				18, 2, 2, 171, 180, 15, 2, 0, 2, 9,
				18, 2, 2, 171, 183, 15, 2, 0, 2, 9,
				18, 2, 2, 171, 186, 15, 2, 0, 2, 9,
				18, 2, 2, 171, 189, 15, 2, 0, 2, 9,
				18, 2, 2, 171, 192, 15, 2, 0, 2, 9,
				18, 2, 2, 171, 219, 33, 2, 0, 2, 9,
				18, 2, 2, 171, 219, 37, 2, 0, 2, 1,
				8, 5, 4, 2, 63, 183, 16, 64, 186, 16,
				11, 64, 189, 16, 11, 64, 192, 16, 11, 1,
				8, 2, 113, 140, 17, 11, 8, 2, 17, 112,
				142, 17, 2, 2, 2, 17, 112, 144, 17, 2,
				2, 2, 17, 9, 2, 68, 146, 17, 2, 2,
				2, 2, 21, 161, 151, 17, 110, 148, 17, 161,
				151, 17, 110, 149, 17, 1, 2, 204, 206, 33,
				110, 150, 17, 2, 2, 5, 21, 161, 155, 17,
				110, 154, 17, 161, 155, 17, 2, 162, 158, 17,
				2, 2, 2, 5, 1, 8, 46, 145, 3, 6,
				5, 7, 2, 1, 64, 5, 56, 6, 101, 146,
				3, 5, 7, 6, 1, 8, 66, 147, 3, 6,
				5, 7, 2, 1, 64, 5, 56, 6, 108, 150,
				3, 151, 3, 5, 7, 6, 1, 8, 4, 17,
				124, 223, 12, 159, 224, 12, 2, 2, 2, 17,
				124, 230, 12, 159, 231, 12, 2, 2, 2, 17,
				124, 237, 12, 159, 238, 12, 2, 2, 2, 1,
				8, 4, 17, 124, 128, 13, 159, 129, 13, 2,
				2, 2, 17, 124, 135, 13, 159, 136, 13, 2,
				2, 2, 17, 124, 145, 13, 159, 146, 13, 2,
				2, 2, 1, 8, 4, 17, 124, 152, 13, 159,
				153, 13, 2, 2, 17, 2, 159, 159, 13, 2,
				2, 4, 17, 124, 165, 13, 159, 166, 13, 2,
				2, 17, 2, 159, 172, 13, 2, 2, 1, 8,
				17, 111, 216, 15, 2, 1, 2, 9, 68, 218,
				15, 1, 2, 2, 17, 111, 220, 15, 2, 1,
				2, 9, 68, 222, 15, 1, 2, 2, 17, 110,
				224, 15, 2, 1, 2, 9, 68, 225, 15, 1,
				2, 2, 17, 110, 228, 15, 2, 1, 2, 9,
				68, 229, 15, 1, 2, 2, 17, 111, 232, 15,
				2, 68, 234, 15, 7, 2, 17, 111, 236, 15,
				2, 2, 2, 17, 111, 240, 15, 110, 242, 15,
				110, 245, 15, 2, 17, 110, 251, 15, 110, 252,
				15, 2, 2, 1, 64, 5, 40, 6, 17, 165,
				253, 15, 2, 68, 238, 15, 1, 2, 17, 165,
				254, 15, 2, 68, 238, 15, 1, 2, 17, 165,
				255, 15, 2, 68, 238, 15, 1, 2, 17, 165,
				128, 16, 2, 68, 238, 15, 1, 2, 17, 165,
				129, 16, 2, 68, 238, 15, 1, 2, 17, 165,
				130, 16, 2, 68, 238, 15, 1, 2, 17, 165,
				131, 16, 2, 68, 238, 15, 1, 2, 17, 165,
				132, 16, 2, 68, 238, 15, 1, 2, 17, 165,
				133, 16, 68, 243, 15, 1, 172, 246, 15, 68,
				249, 15, 1, 17, 165, 134, 16, 68, 243, 15,
				1, 172, 246, 15, 68, 249, 15, 1, 17, 165,
				135, 16, 68, 243, 15, 1, 172, 246, 15, 68,
				249, 15, 1, 17, 165, 136, 16, 68, 243, 15,
				1, 172, 246, 15, 68, 249, 15, 1, 17, 165,
				137, 16, 68, 243, 15, 1, 172, 246, 15, 68,
				249, 15, 1, 17, 165, 138, 16, 68, 243, 15,
				1, 172, 246, 15, 68, 249, 15, 1, 17, 165,
				139, 16, 68, 243, 15, 1, 172, 246, 15, 68,
				249, 15, 1, 17, 165, 140, 16, 68, 243, 15,
				1, 172, 246, 15, 68, 249, 15, 1, 17, 165,
				141, 16, 12, 2, 165, 149, 16, 128, 1, 2,
				2, 17, 165, 142, 16, 2, 2, 2, 17, 165,
				143, 16, 2, 2, 2, 17, 165, 144, 16, 2,
				2, 2, 17, 165, 145, 16, 2, 2, 2, 17,
				165, 146, 16, 2, 2, 2, 17, 165, 147, 16,
				2, 2, 2, 17, 165, 148, 16, 2, 2, 2,
				0, 55, 240, 6, 0, 55, 241, 7, 0, 55,
				244, 7, 0, 55, 247, 7, 0, 55, 250, 7,
				0, 55, 253, 7, 0, 55, 128, 8, 0, 55,
				131, 8, 0, 55, 134, 8, 1, 8, 110, 243,
				6, 110, 244, 6, 110, 245, 6, 110, 248, 32,
				110, 249, 32, 110, 250, 32, 110, 251, 32, 110,
				252, 32, 0, 9, 7, 53, 14, 8, 62, 1,
				8, 110, 137, 8, 110, 138, 8, 110, 139, 8,
				110, 140, 8, 5, 2, 7, 54, 110, 230, 37,
				110, 231, 37, 0, 158, 7, 54, 9, 7, 54,
				14, 8, 64, 1, 8, 18, 110, 155, 8, 7,
				58, 7, 58, 7, 58, 0, 5, 7, 7, 58,
				0, 158, 7, 58, 9, 7, 58, 14, 8, 66,
				1, 8, 5, 8, 7, 60, 0, 17, 7, 60,
				7, 60, 9, 68, 156, 8, 1, 7, 60, 7,
				60, 1, 64, 5, 8, 6, 5, 8, 7, 69,
				5, 42, 6, 17, 7, 60, 7, 60, 165, 158,
				8, 7, 60, 17, 7, 60, 7, 60, 165, 159,
				8, 7, 60, 5, 4, 6, 0, 158, 7, 60,
				9, 15, 8, 68, 8, 70, 7, 60, 1, 8,
				50, 160, 8, 5, 7, 7, 61, 0, 158, 7,
				61, 14, 8, 72, 1, 8, 160, 210, 13, 5,
				7, 2, 1, 8, 9, 2, 110, 187, 33, 9,
				2, 110, 188, 33, 9, 2, 110, 189, 33, 9,
				2, 110, 190, 33, 5, 4, 2, 1, 8, 5,
				8, 2, 1, 64, 20, 3, 3, 100, 207, 33,
				3, 5, 63, 6, 1, 128, 2, 17, 129, 130,
				20, 183, 131, 20, 2, 2, 17, 129, 137, 20,
				183, 138, 20, 2, 2, 17, 129, 141, 20, 183,
				142, 20, 2, 2, 17, 129, 145, 20, 183, 146,
				20, 2, 2, 17, 129, 149, 20, 183, 150, 20,
				2, 2, 17, 129, 156, 20, 183, 157, 20, 2,
				2, 17, 129, 160, 20, 183, 161, 20, 2, 2,
				17, 129, 164, 20, 183, 165, 20, 2, 2, 17,
				129, 168, 20, 183, 169, 20, 2, 2, 17, 129,
				172, 20, 183, 173, 20, 2, 2, 17, 129, 176,
				20, 183, 177, 20, 2, 2, 17, 129, 180, 20,
				183, 181, 20, 2, 2, 5, 4, 2, 17, 2,
				183, 201, 20, 2, 2, 5, 3, 2, 17, 2,
				183, 228, 20, 2, 2, 17, 2, 183, 238, 20,
				2, 2, 2, 17, 2, 183, 253, 20, 2, 2,
				5, 4, 2, 17, 129, 145, 21, 183, 146, 21,
				2, 2, 17, 129, 152, 21, 183, 153, 21, 2,
				2, 17, 129, 159, 21, 183, 160, 21, 2, 2,
				2, 17, 2, 183, 169, 21, 2, 2, 17, 2,
				183, 178, 21, 2, 2, 17, 2, 183, 187, 21,
				2, 2, 17, 2, 183, 196, 21, 2, 2, 17,
				2, 183, 205, 21, 2, 2, 17, 2, 183, 214,
				21, 2, 2, 4, 17, 2, 183, 247, 21, 2,
				2, 17, 2, 183, 131, 22, 2, 2, 17, 2,
				179, 143, 22, 2, 2, 17, 2, 183, 152, 22,
				2, 2, 5, 4, 2, 17, 2, 183, 174, 22,
				2, 2, 17, 2, 183, 183, 22, 2, 2, 17,
				2, 183, 192, 22, 2, 2, 17, 2, 183, 201,
				22, 2, 2, 17, 2, 183, 210, 22, 2, 2,
				17, 2, 183, 219, 22, 2, 2, 2, 17, 2,
				183, 233, 22, 2, 2, 17, 2, 183, 239, 22,
				2, 2, 17, 2, 183, 251, 22, 2, 2, 17,
				2, 183, 138, 23, 2, 2, 17, 2, 183, 147,
				23, 2, 2, 17, 2, 183, 156, 23, 2, 2,
				17, 2, 183, 162, 23, 2, 2, 17, 2, 183,
				171, 23, 2, 2, 17, 2, 183, 177, 23, 2,
				2, 17, 2, 183, 186, 23, 2, 2, 17, 2,
				183, 195, 23, 2, 2, 5, 62, 2, 17, 2,
				9, 2, 79, 166, 25, 0, 1, 2, 2, 17,
				2, 9, 2, 79, 168, 25, 0, 1, 2, 2,
				17, 2, 9, 2, 79, 170, 25, 0, 1, 2,
				2, 5, 69, 2, 17, 183, 156, 28, 2, 2,
				2, 17, 183, 159, 28, 2, 2, 2, 17, 183,
				160, 28, 2, 2, 2, 17, 183, 163, 28, 2,
				2, 2, 17, 183, 166, 28, 2, 2, 2, 17,
				183, 169, 28, 2, 2, 2, 2, 17, 2, 183,
				172, 28, 2, 2, 5, 8, 2, 17, 2, 2,
				14, 8, 75, 2, 4, 17, 2, 183, 178, 28,
				2, 2, 17, 2, 183, 180, 28, 184, 191, 33,
				192, 33, 2, 17, 2, 183, 186, 28, 9, 2,
				183, 193, 33, 2, 17, 2, 183, 192, 28, 9,
				2, 183, 194, 33, 2, 17, 2, 183, 198, 28,
				9, 2, 183, 195, 33, 2, 5, 16, 2, 18,
				94, 204, 28, 94, 204, 28, 2, 78, 207, 28,
				28, 18, 122, 209, 28, 122, 209, 28, 2, 76,
				212, 28, 28, 5, 3, 2, 17, 2, 9, 2,
				60, 225, 28, 2, 2, 17, 9, 2, 60, 231,
				28, 85, 233, 28, 85, 235, 28, 2, 2, 17,
				2, 90, 247, 28, 90, 250, 28, 90, 253, 28,
				17, 9, 2, 60, 128, 29, 2, 2, 2, 17,
				2, 2, 9, 205, 196, 33, 2, 2, 17, 2,
				2, 9, 205, 197, 33, 2, 2, 17, 9, 2,
				60, 232, 37, 9, 2, 60, 234, 37, 9, 2,
				60, 236, 37, 9, 2, 60, 238, 37, 5, 3,
				2, 1, 128, 2, 5, 8, 2, 17, 2, 185,
				155, 29, 2, 2, 17, 2, 185, 161, 29, 2,
				2, 17, 2, 185, 167, 29, 2, 2, 17, 2,
				185, 170, 29, 2, 2, 17, 2, 185, 173, 29,
				2, 2, 17, 2, 185, 176, 29, 2, 2, 17,
				2, 185, 179, 29, 2, 2, 17, 130, 182, 29,
				185, 183, 29, 2, 2, 5, 4, 2, 17, 2,
				99, 189, 29, 2, 2, 17, 2, 99, 195, 29,
				2, 2, 17, 2, 99, 201, 29, 2, 2, 17,
				2, 48, 207, 29, 2, 2, 5, 8, 2, 17,
				2, 187, 244, 29, 2, 2, 17, 2, 185, 250,
				29, 2, 2, 17, 2, 187, 253, 29, 2, 2,
				5, 29, 2, 17, 2, 185, 183, 30, 2, 2,
				17, 2, 185, 186, 30, 2, 2, 17, 2, 185,
				188, 30, 2, 2, 2, 17, 2, 185, 198, 30,
				2, 2, 5, 27, 2, 17, 2, 186, 131, 31,
				2, 2, 17, 2, 186, 135, 31, 2, 2, 17,
				2, 185, 139, 31, 2, 2, 17, 2, 185, 141,
				31, 2, 2, 5, 104, 2, 17, 185, 217, 31,
				2, 2, 2, 2, 17, 2, 185, 218, 31, 2,
				2, 17, 2, 185, 224, 31, 2, 2, 5, 15,
				2, 17, 2, 185, 230, 31, 2, 2, 5, 16,
				2, 15, 8, 76, 8, 77, 5, 15, 2, 1,
				128, 2, 14, 8, 31, 15, 8, 32, 8, 33,
				87, 222, 6, 87, 225, 6, 0, 10, 2, 164,
				228, 6, 128, 2, 2, 0, 10, 164, 230, 6,
				164, 229, 6, 128, 2, 164, 230, 6, 164, 231,
				6, 0, 10, 167, 233, 6, 233, 6, 234, 6,
				164, 232, 6, 128, 4, 167, 233, 6, 233, 6,
				234, 6, 164, 235, 6, 189, 0, 10, 2, 164,
				238, 6, 128, 8, 2, 164, 239, 6, 2, 158,
				7, 53, 7, 63, 10, 164, 246, 6, 164, 209,
				35, 128, 128, 2, 10, 22, 164, 210, 35, 128,
				128, 2, 0, 10, 17, 183, 253, 6, 183, 131,
				7, 183, 137, 7, 183, 142, 7, 43, 247, 6,
				8, 17, 183, 253, 6, 183, 131, 7, 183, 137,
				7, 183, 142, 7, 0, 10, 17, 190, 147, 7,
				190, 153, 7, 190, 159, 7, 190, 164, 7, 56,
				248, 6, 8, 17, 190, 147, 7, 190, 153, 7,
				190, 159, 7, 190, 164, 7, 0, 10, 17, 184,
				169, 7, 170, 7, 179, 175, 7, 183, 178, 7,
				183, 184, 7, 75, 250, 6, 8, 17, 184, 169,
				7, 170, 7, 179, 175, 7, 183, 178, 7, 183,
				184, 7, 0, 10, 17, 121, 190, 7, 121, 193,
				7, 2, 2, 81, 251, 6, 8, 17, 121, 190,
				7, 121, 193, 7, 2, 2, 17, 183, 196, 7,
				183, 202, 7, 2, 2, 17, 183, 208, 7, 183,
				214, 7, 2, 2, 17, 184, 220, 7, 223, 7,
				179, 226, 7, 183, 229, 7, 2, 17, 121, 235,
				7, 121, 238, 7, 2, 2, 7, 65, 7, 55,
				158, 7, 56, 12, 7, 56, 17, 9, 7, 56,
				31, 141, 8, 29, 142, 8, 30, 144, 8, 1,
				30, 146, 8, 1, 128, 128, 32, 158, 7, 57,
				12, 7, 57, 17, 9, 7, 57, 118, 148, 8,
				32, 149, 8, 9, 7, 57, 30, 151, 8, 0,
				30, 153, 8, 1, 128, 128, 32, 7, 67, 7,
				59, 7, 71, 7, 73, 141, 163, 8, 185, 141,
				165, 8, 201, 35, 167, 8, 185, 35, 169, 8,
				201, 0, 10, 2, 142, 171, 8, 233, 128, 16,
				2, 2, 0, 10, 2, 36, 172, 8, 233, 128,
				16, 2, 2, 17, 183, 173, 8, 183, 179, 8,
				2, 2, 17, 190, 185, 8, 190, 191, 8, 2,
				2, 17, 181, 197, 8, 181, 198, 8, 178, 199,
				8, 178, 205, 8, 17, 121, 211, 8, 121, 217,
				8, 121, 223, 8, 121, 224, 8, 17, 132, 225,
				8, 132, 226, 8, 98, 227, 8, 98, 233, 8,
				17, 132, 239, 8, 132, 240, 8, 98, 241, 8,
				98, 247, 8, 17, 183, 253, 8, 183, 128, 9,
				2, 2, 17, 183, 131, 9, 183, 132, 9, 2,
				2, 164, 137, 9, 164, 138, 9, 164, 139, 9,
				164, 140, 9, 164, 141, 9, 170, 142, 9, 200,
				2, 14, 8, 34, 128, 128, 64, 200, 20, 199,
				144, 9, 255, 32, 3, 3, 3, 14, 8, 35,
				128, 128, 64, 200, 13, 8, 78, 164, 144, 33,
				128, 128, 64, 200, 2, 164, 145, 33, 128, 128,
				128, 2, 201, 13, 8, 79, 164, 146, 33, 128,
				128, 128, 2, 164, 154, 33, 128, 128, 64, 200,
				2, 164, 155, 33, 128, 128, 64, 200, 2, 164,
				156, 33, 128, 128, 64, 200, 2, 164, 157, 33,
				128, 128, 64, 2, 200, 2, 164, 158, 33, 128,
				128, 128, 4, 80, 145, 9, 80, 148, 9, 80,
				151, 9, 80, 154, 9, 80, 157, 9, 80, 160,
				9, 80, 163, 9, 80, 166, 9, 80, 169, 9,
				80, 172, 9, 80, 175, 9, 80, 178, 9, 80,
				181, 9, 80, 184, 9, 80, 187, 9, 80, 190,
				9, 200, 17, 97, 224, 9, 97, 230, 9, 2,
				2, 129, 159, 33, 128, 128, 64, 200, 17, 183,
				236, 9, 183, 242, 9, 183, 248, 9, 183, 251,
				9, 129, 160, 33, 128, 128, 64, 200, 17, 183,
				254, 9, 2, 183, 129, 10, 2, 129, 161, 33,
				128, 128, 64, 17, 183, 131, 10, 2, 183, 134,
				10, 2, 200, 17, 183, 136, 10, 183, 142, 10,
				2, 2, 9, 2, 129, 162, 33, 128, 128, 64,
				200, 17, 183, 148, 10, 183, 154, 10, 2, 2,
				129, 163, 33, 128, 128, 64, 17, 183, 160, 10,
				183, 166, 10, 2, 2, 17, 183, 172, 10, 183,
				178, 10, 2, 2, 200, 17, 183, 184, 10, 183,
				190, 10, 183, 196, 10, 183, 199, 10, 9, 2,
				129, 164, 33, 128, 128, 64, 200, 17, 183, 202,
				10, 183, 208, 10, 183, 214, 10, 183, 217, 10,
				129, 165, 33, 128, 128, 64, 200, 17, 183, 220,
				10, 183, 226, 10, 183, 232, 10, 183, 235, 10,
				9, 2, 129, 166, 33, 128, 128, 64, 200, 17,
				183, 238, 10, 183, 247, 10, 183, 253, 10, 2,
				9, 2, 129, 167, 33, 128, 128, 64, 200, 17,
				183, 131, 11, 183, 137, 11, 183, 143, 11, 183,
				146, 11, 9, 2, 129, 168, 33, 128, 128, 64,
				200, 17, 183, 149, 11, 183, 155, 11, 183, 161,
				11, 183, 164, 11, 129, 169, 33, 128, 128, 64,
				200, 17, 183, 167, 11, 183, 173, 11, 183, 179,
				11, 183, 182, 11, 9, 2, 129, 170, 33, 128,
				128, 64, 17, 183, 185, 11, 183, 191, 11, 183,
				197, 11, 183, 200, 11, 17, 129, 203, 11, 183,
				204, 11, 2, 2, 17, 129, 210, 11, 183, 211,
				11, 2, 2, 17, 129, 217, 11, 183, 218, 11,
				2, 2, 17, 129, 224, 11, 183, 225, 11, 2,
				2, 17, 129, 231, 11, 183, 232, 11, 2, 2,
				17, 129, 238, 11, 183, 239, 11, 2, 2, 17,
				129, 245, 11, 183, 246, 11, 2, 2, 17, 129,
				252, 11, 183, 253, 11, 2, 2, 17, 129, 131,
				12, 183, 132, 12, 2, 2, 17, 129, 138, 12,
				183, 139, 12, 2, 2, 17, 129, 145, 12, 183,
				146, 12, 2, 2, 17, 129, 152, 12, 183, 153,
				12, 2, 2, 17, 2, 183, 159, 12, 2, 2,
				17, 2, 183, 165, 12, 2, 2, 17, 127, 171,
				12, 188, 173, 12, 2, 2, 17, 129, 179, 12,
				183, 180, 12, 183, 189, 12, 2, 17, 130, 204,
				12, 185, 205, 12, 185, 211, 12, 185, 217, 12,
				14, 8, 48, 14, 8, 49, 14, 8, 50, 17,
				129, 178, 13, 183, 179, 13, 2, 2, 17, 129,
				185, 13, 183, 186, 13, 2, 2, 17, 129, 192,
				13, 183, 193, 13, 2, 2, 20, 164, 199, 13,
				3, 3, 3, 200, 17, 54, 202, 13, 14, 8,
				74, 2, 182, 219, 13, 202, 147, 33, 128, 128,
				64, 200, 17, 79, 222, 13, 1, 1, 9, 184,
				230, 13, 0, 2, 2, 9, 184, 239, 13, 0,
				2, 203, 148, 33, 128, 128, 64, 200, 2, 14,
				8, 36, 128, 128, 64, 200, 2, 14, 8, 37,
				128, 128, 64, 200, 17, 2, 183, 142, 14, 2,
				183, 145, 14, 14, 8, 38, 128, 128, 64, 200,
				17, 2, 183, 148, 14, 2, 183, 151, 14, 14,
				8, 39, 128, 128, 64, 200, 17, 67, 154, 14,
				70, 156, 14, 183, 162, 14, 2, 164, 153, 33,
				128, 128, 128, 1, 17, 140, 165, 14, 190, 166,
				14, 190, 175, 14, 2, 109, 190, 14, 109, 193,
				14, 109, 196, 14, 109, 199, 14, 109, 202, 14,
				109, 205, 14, 109, 208, 14, 109, 211, 14, 109,
				214, 14, 109, 217, 14, 109, 220, 14, 109, 223,
				14, 109, 226, 14, 109, 229, 14, 109, 232, 14,
				109, 235, 14, 40, 238, 14, 40, 239, 14, 40,
				240, 14, 40, 241, 14, 40, 242, 14, 40, 243,
				14, 40, 244, 14, 40, 245, 14, 40, 246, 14,
				40, 247, 14, 40, 248, 14, 40, 249, 14, 40,
				250, 14, 40, 251, 14, 40, 252, 14, 40, 253,
				14, 136, 150, 15, 75, 136, 153, 15, 75, 164,
				156, 15, 55, 157, 15, 59, 160, 15, 58, 163,
				15, 0, 11, 14, 8, 40, 81, 175, 15, 16,
				43, 197, 15, 32, 14, 8, 40, 0, 11, 14,
				8, 41, 56, 195, 15, 16, 56, 198, 15, 32,
				14, 8, 41, 136, 200, 15, 76, 136, 203, 15,
				76, 164, 206, 15, 57, 207, 15, 11, 59, 210,
				15, 58, 213, 15, 15, 8, 51, 8, 52, 80,
				150, 16, 44, 153, 16, 11, 57, 154, 16, 11,
				93, 157, 16, 57, 160, 16, 11, 93, 163, 16,
				93, 166, 16, 77, 169, 16, 88, 172, 16, 10,
				18, 2, 2, 80, 177, 16, 2, 28, 0, 107,
				175, 16, 18, 2, 2, 80, 177, 16, 2, 28,
				128, 32, 80, 180, 16, 14, 8, 42, 57, 195,
				16, 11, 10, 18, 80, 198, 16, 80, 198, 16,
				80, 201, 16, 80, 198, 16, 20, 80, 198, 16,
				128, 128, 4, 10, 18, 80, 204, 16, 80, 204,
				16, 80, 207, 16, 80, 204, 16, 20, 80, 204,
				16, 128, 128, 8, 77, 210, 16, 88, 213, 16,
				44, 216, 16, 11, 57, 217, 16, 11, 17, 185,
				220, 16, 185, 226, 16, 185, 232, 16, 185, 235,
				16, 17, 123, 238, 16, 2, 2, 2, 17, 128,
				240, 16, 187, 242, 16, 2, 2, 17, 96, 248,
				16, 9, 83, 250, 16, 2, 2, 2, 17, 185,
				128, 17, 185, 134, 17, 2, 2, 14, 8, 43,
				173, 160, 17, 0, 173, 160, 17, 1, 173, 160,
				17, 2, 173, 160, 17, 3, 173, 160, 17, 4,
				173, 160, 17, 5, 173, 160, 17, 6, 173, 160,
				17, 7, 17, 2, 183, 163, 17, 2, 183, 166,
				17, 17, 129, 169, 17, 183, 170, 17, 2, 2,
				17, 129, 176, 17, 183, 177, 17, 2, 2, 17,
				129, 183, 17, 183, 184, 17, 2, 2, 17, 129,
				190, 17, 183, 191, 17, 2, 2, 17, 129, 197,
				17, 183, 198, 17, 2, 2, 17, 2, 190, 204,
				17, 180, 207, 17, 131, 208, 17, 17, 95, 209,
				17, 97, 211, 17, 2, 2, 17, 129, 217, 17,
				183, 218, 17, 2, 2, 17, 129, 224, 17, 183,
				225, 17, 2, 2, 17, 129, 231, 17, 183, 232,
				17, 2, 2, 17, 129, 238, 17, 183, 239, 17,
				2, 2, 17, 129, 248, 17, 183, 249, 17, 2,
				2, 17, 129, 255, 17, 183, 128, 18, 2, 2,
				17, 129, 134, 18, 183, 135, 18, 2, 2, 17,
				129, 141, 18, 183, 142, 18, 2, 2, 17, 129,
				151, 18, 183, 152, 18, 2, 2, 17, 129, 158,
				18, 183, 159, 18, 2, 2, 17, 129, 165, 18,
				183, 166, 18, 2, 2, 17, 129, 175, 18, 183,
				176, 18, 2, 2, 17, 129, 182, 18, 183, 183,
				18, 2, 2, 17, 129, 189, 18, 183, 190, 18,
				2, 2, 17, 2, 183, 196, 18, 183, 202, 18,
				183, 211, 18, 17, 119, 217, 18, 121, 218, 18,
				2, 2, 17, 129, 224, 18, 183, 225, 18, 2,
				2, 17, 129, 231, 18, 183, 232, 18, 2, 2,
				17, 129, 238, 18, 183, 239, 18, 2, 2, 17,
				129, 245, 18, 183, 246, 18, 2, 2, 17, 129,
				255, 18, 183, 128, 19, 2, 2, 17, 129, 134,
				19, 183, 135, 19, 2, 2, 17, 129, 141, 19,
				183, 142, 19, 2, 2, 17, 129, 148, 19, 183,
				149, 19, 2, 2, 17, 2, 2, 2, 179, 158,
				19, 17, 129, 161, 19, 183, 162, 19, 2, 2,
				17, 129, 168, 19, 183, 169, 19, 2, 2, 17,
				129, 175, 19, 183, 176, 19, 2, 2, 17, 129,
				182, 19, 183, 183, 19, 2, 2, 17, 129, 189,
				19, 183, 190, 19, 2, 2, 17, 129, 196, 19,
				183, 197, 19, 2, 2, 17, 143, 203, 19, 144,
				204, 19, 2, 2, 17, 129, 206, 19, 183, 207,
				19, 2, 2, 17, 129, 213, 19, 183, 214, 19,
				2, 2, 17, 129, 220, 19, 183, 221, 19, 2,
				2, 17, 129, 227, 19, 183, 228, 19, 2, 2,
				17, 129, 234, 19, 183, 235, 19, 2, 2, 17,
				129, 241, 19, 183, 242, 19, 2, 2, 17, 129,
				248, 19, 183, 249, 19, 2, 2, 10, 80, 255,
				19, 164, 253, 32, 2, 1, 128, 2, 44, 5,
				11, 57, 6, 11, 75, 9, 80, 10, 155, 13,
				1, 147, 14, 0, 137, 17, 71, 2, 0, 137,
				19, 71, 2, 44, 21, 11, 57, 22, 11, 75,
				25, 80, 26, 155, 29, 1, 147, 30, 0, 137,
				33, 72, 2, 13, 8, 80, 44, 36, 11, 57,
				37, 11, 75, 40, 80, 41, 155, 44, 1, 147,
				45, 0, 137, 48, 73, 2, 0, 137, 50, 73,
				2, 44, 52, 11, 57, 53, 11, 75, 56, 80,
				57, 155, 60, 1, 147, 61, 0, 137, 64, 74,
				2, 0, 137, 66, 74, 2, 44, 68, 11, 57,
				69, 11, 75, 72, 80, 73, 155, 76, 1, 147,
				77, 206, 71, 0, 164, 80, 2, 44, 81, 11,
				57, 82, 11, 75, 85, 80, 86, 155, 89, 1,
				147, 90, 206, 72, 0, 164, 93, 2, 44, 94,
				11, 57, 95, 11, 75, 98, 80, 99, 155, 102,
				1, 147, 103, 206, 73, 0, 164, 106, 2, 43,
				107, 55, 108, 75, 111, 80, 112, 155, 115, 1,
				147, 116, 206, 74, 0, 164, 119, 2, 213, 173,
				120, 0, 0, 213, 173, 120, 1, 1, 213, 173,
				120, 2, 2, 213, 173, 120, 3, 3, 213, 173,
				120, 4, 4, 213, 173, 120, 5, 5, 213, 173,
				120, 6, 6, 213, 173, 120, 7, 7, 213, 173,
				122, 0, 8, 213, 173, 122, 1, 9, 213, 173,
				122, 2, 10, 213, 173, 122, 3, 11, 213, 173,
				122, 4, 12, 213, 173, 122, 5, 13, 213, 173,
				122, 6, 14, 213, 173, 122, 7, 15, 139, 0,
				124, 139, 1, 124, 139, 2, 124, 139, 3, 124,
				139, 4, 124, 139, 5, 124, 139, 6, 124, 139,
				7, 124, 139, 0, 127, 139, 1, 127, 139, 2,
				127, 139, 3, 127, 139, 4, 127, 139, 5, 127,
				139, 6, 127, 139, 7, 127, 0, 167, 130, 1,
				131, 1, 131, 1, 2, 0, 167, 132, 1, 133,
				1, 133, 1, 2, 23, 91, 134, 1, 0, 163,
				136, 1, 86, 138, 1, 207, 75, 207, 76, 208,
				209, 135, 141, 1, 84, 144, 1, 134, 147, 1,
				82, 150, 1, 194, 153, 1, 23, 197, 154, 1,
				150, 156, 1, 23, 152, 157, 1, 105, 159, 1,
				105, 162, 1, 105, 165, 1, 105, 168, 1, 105,
				171, 1, 105, 174, 1, 105, 177, 1, 105, 180,
				1, 105, 183, 1, 105, 186, 1, 105, 189, 1,
				105, 192, 1, 105, 195, 1, 105, 198, 1, 105,
				201, 1, 105, 204, 1, 14, 8, 16, 14, 8,
				17, 0, 14, 8, 18, 2, 14, 8, 19, 43,
				143, 2, 55, 144, 2, 44, 147, 2, 15, 57,
				148, 2, 15, 44, 151, 2, 6, 57, 152, 2,
				6, 75, 155, 2, 80, 156, 2, 69, 159, 2,
				89, 162, 2, 177, 165, 2, 26, 14, 8, 20,
				192, 0, 192, 1, 192, 2, 192, 3, 192, 4,
				192, 5, 192, 6, 192, 7, 166, 178, 2, 166,
				181, 2, 0, 28, 184, 2, 2, 164, 186, 2,
				138, 187, 2, 138, 190, 2, 0, 164, 193, 2,
				10, 164, 193, 2, 2, 128, 128, 16, 0, 164,
				194, 2, 10, 164, 194, 2, 2, 128, 128, 16,
				148, 195, 2, 1, 149, 196, 2, 125, 199, 2,
				1, 126, 200, 2, 195, 203, 2, 198, 204, 2,
				191, 207, 2, 193, 208, 2, 155, 211, 2, 1,
				147, 212, 2, 194, 215, 2, 1, 196, 216, 2,
				150, 219, 2, 1, 151, 220, 2, 153, 223, 2,
				1, 154, 224, 2, 156, 0, 156, 1, 156, 2,
				156, 3, 156, 4, 156, 5, 156, 6, 156, 7,
				157, 0, 157, 1, 157, 2, 157, 3, 157, 4,
				157, 5, 157, 6, 157, 7, 14, 8, 21, 14,
				8, 22, 33, 135, 3, 34, 138, 3, 25, 92,
				141, 3, 24, 92, 143, 3, 15, 8, 44, 8,
				45, 15, 8, 46, 8, 47, 104, 152, 3, 169,
				155, 3, 168, 158, 3, 166, 161, 3, 164, 164,
				3, 100, 165, 3, 0, 164, 166, 3, 2, 166,
				167, 3, 14, 8, 23, 14, 8, 24, 14, 8,
				25, 14, 8, 26, 0, 100, 234, 3, 2, 0,
				100, 235, 3, 2, 0, 164, 236, 3, 2, 114,
				237, 3, 16, 8, 0, 8, 1, 15, 8, 2,
				8, 3, 15, 8, 4, 8, 5, 15, 8, 6,
				8, 7, 16, 8, 8, 8, 9, 15, 8, 10,
				8, 11, 15, 8, 12, 8, 13, 15, 8, 14,
				8, 15, 106, 145, 5, 147, 5, 150, 5, 146,
				5, 148, 5, 149, 5, 151, 5, 106, 152, 5,
				154, 5, 157, 5, 153, 5, 155, 5, 156, 5,
				158, 5, 106, 159, 5, 161, 5, 164, 5, 160,
				5, 162, 5, 163, 5, 165, 5, 106, 166, 5,
				168, 5, 171, 5, 167, 5, 169, 5, 170, 5,
				172, 5, 155, 173, 5, 1, 146, 174, 5, 102,
				176, 5, 1, 103, 177, 5, 109, 179, 5, 109,
				182, 5, 0, 28, 185, 5, 2, 105, 187, 5,
				27, 190, 5, 39, 191, 5, 37, 193, 5, 38,
				194, 5, 210, 164, 196, 5, 211, 212, 164, 197,
				5, 164, 198, 5, 14, 8, 27, 14, 8, 28,
				164, 231, 5, 164, 232, 5, 164, 233, 5, 164,
				234, 5, 164, 235, 5, 164, 236, 5, 14, 8,
				29, 14, 8, 30
			};
		}
	}
	internal static class OpCodeHandlersTables_MVEX
	{
		internal static readonly OpCodeHandler[] Handlers_0F;

		internal static readonly OpCodeHandler[] Handlers_0F38;

		internal static readonly OpCodeHandler[] Handlers_0F3A;

		private const int MaxIdNames = 7;

		private const uint Handlers_0FIndex = 6u;

		private const uint Handlers_0F38Index = 4u;

		private const uint Handlers_0F3AIndex = 5u;

		static OpCodeHandlersTables_MVEX()
		{
			MvexOpCodeHandlerReader handlerReader = new MvexOpCodeHandlerReader();
			TableDeserializer tableDeserializer = new TableDeserializer(handlerReader, 7, GetSerializedTables());
			tableDeserializer.Deserialize();
			Handlers_0F = tableDeserializer.GetTable(6u);
			Handlers_0F38 = tableDeserializer.GetTable(4u);
			Handlers_0F3A = tableDeserializer.GetTable(5u);
		}

		private static ReadOnlySpan<byte> GetSerializedTables()
		{
			return new byte[1666]
			{
				1, 8, 8, 10, 131, 36, 0, 0, 0, 8,
				10, 132, 36, 0, 0, 0, 8, 10, 133, 36,
				0, 0, 0, 8, 10, 134, 36, 0, 0, 0,
				8, 10, 135, 36, 0, 0, 0, 8, 10, 136,
				36, 0, 0, 0, 8, 10, 137, 36, 0, 0,
				0, 8, 10, 138, 36, 0, 0, 0, 1, 8,
				2, 2, 0, 8, 0, 7, 13, 159, 36, 0,
				0, 0, 0, 8, 0, 7, 13, 160, 36, 0,
				0, 0, 0, 8, 0, 7, 13, 161, 36, 0,
				0, 0, 0, 1, 8, 2, 7, 0, 8, 0,
				0, 10, 166, 36, 10, 167, 36, 1, 8, 8,
				0, 7, 5, 0, 20, 155, 37, 5, 0, 20,
				156, 37, 0, 0, 8, 0, 7, 5, 0, 20,
				157, 37, 0, 0, 0, 8, 0, 7, 5, 0,
				20, 158, 37, 0, 0, 0, 0, 8, 0, 7,
				5, 0, 20, 159, 37, 5, 0, 20, 160, 37,
				0, 0, 8, 0, 7, 5, 0, 20, 161, 37,
				0, 0, 0, 8, 0, 7, 5, 0, 20, 162,
				37, 0, 0, 0, 0, 1, 128, 2, 2, 24,
				0, 8, 0, 7, 5, 0, 12, 181, 36, 0,
				0, 0, 8, 0, 7, 0, 5, 0, 12, 182,
				36, 0, 0, 8, 0, 7, 5, 0, 12, 183,
				36, 0, 0, 0, 8, 0, 7, 0, 5, 0,
				12, 184, 36, 0, 0, 2, 11, 0, 8, 0,
				7, 18, 185, 36, 0, 0, 0, 2, 14, 0,
				8, 0, 7, 15, 186, 36, 0, 0, 0, 2,
				2, 0, 8, 0, 7, 15, 187, 36, 0, 0,
				0, 0, 8, 0, 7, 15, 188, 36, 0, 0,
				0, 0, 8, 0, 7, 15, 189, 36, 0, 0,
				0, 0, 8, 0, 7, 15, 190, 36, 0, 0,
				0, 8, 0, 7, 15, 191, 36, 0, 0, 0,
				0, 8, 0, 7, 12, 192, 36, 12, 193, 36,
				0, 0, 2, 2, 0, 8, 0, 7, 15, 194,
				36, 0, 0, 0, 8, 0, 7, 15, 195, 36,
				0, 0, 0, 8, 0, 7, 15, 196, 36, 0,
				0, 0, 8, 0, 7, 12, 197, 36, 0, 0,
				0, 8, 0, 7, 12, 198, 36, 0, 0, 0,
				8, 0, 7, 12, 199, 36, 0, 0, 0, 8,
				0, 7, 12, 200, 36, 0, 0, 0, 2, 4,
				0, 8, 0, 7, 15, 201, 36, 15, 202, 36,
				0, 0, 8, 0, 7, 15, 203, 36, 0, 0,
				0, 8, 0, 7, 15, 204, 36, 15, 205, 36,
				0, 0, 8, 0, 7, 15, 206, 36, 15, 207,
				36, 0, 0, 8, 0, 7, 15, 208, 36, 0,
				0, 0, 8, 0, 7, 15, 209, 36, 15, 210,
				36, 0, 0, 8, 0, 7, 15, 211, 36, 0,
				0, 0, 8, 0, 7, 15, 212, 36, 0, 0,
				0, 8, 0, 7, 5, 0, 12, 213, 36, 0,
				0, 0, 8, 0, 7, 0, 5, 0, 12, 214,
				36, 0, 0, 8, 0, 7, 5, 0, 12, 215,
				36, 0, 0, 0, 8, 0, 7, 0, 5, 0,
				12, 216, 36, 0, 0, 8, 0, 7, 17, 217,
				36, 0, 0, 0, 8, 0, 7, 17, 218, 36,
				0, 0, 0, 8, 0, 7, 17, 219, 36, 0,
				0, 0, 8, 0, 7, 17, 220, 36, 0, 0,
				0, 2, 4, 0, 8, 0, 7, 15, 221, 36,
				15, 222, 36, 0, 0, 8, 0, 7, 15, 223,
				36, 15, 224, 36, 0, 0, 0, 8, 0, 7,
				15, 225, 36, 0, 0, 0, 8, 0, 7, 12,
				226, 36, 0, 0, 0, 8, 0, 7, 12, 227,
				36, 0, 0, 0, 8, 0, 7, 12, 228, 36,
				0, 0, 0, 8, 0, 7, 12, 229, 36, 0,
				0, 0, 8, 0, 7, 15, 230, 36, 0, 0,
				0, 8, 0, 7, 15, 231, 36, 15, 232, 36,
				0, 0, 8, 0, 7, 17, 233, 36, 0, 0,
				0, 8, 0, 7, 17, 234, 36, 0, 0, 0,
				8, 0, 7, 15, 235, 36, 0, 0, 0, 8,
				0, 7, 15, 236, 36, 0, 0, 0, 8, 0,
				7, 15, 237, 36, 0, 0, 0, 8, 0, 7,
				15, 238, 36, 0, 0, 0, 8, 0, 7, 18,
				239, 36, 0, 0, 0, 2, 15, 0, 8, 0,
				7, 15, 240, 36, 0, 0, 0, 0, 8, 0,
				7, 15, 241, 36, 0, 0, 0, 8, 0, 7,
				15, 242, 36, 0, 0, 0, 2, 8, 0, 8,
				0, 7, 22, 243, 36, 22, 244, 36, 0, 0,
				0, 8, 0, 7, 22, 245, 36, 22, 246, 36,
				0, 0, 0, 8, 0, 7, 15, 247, 36, 15,
				248, 36, 0, 0, 2, 3, 0, 8, 0, 7,
				15, 249, 36, 15, 250, 36, 0, 0, 0, 8,
				0, 7, 15, 251, 36, 15, 252, 36, 0, 0,
				0, 8, 0, 7, 15, 253, 36, 15, 254, 36,
				0, 0, 0, 8, 0, 7, 15, 255, 36, 15,
				128, 37, 0, 0, 0, 8, 0, 7, 21, 129,
				37, 21, 130, 37, 0, 0, 0, 8, 0, 7,
				21, 131, 37, 21, 132, 37, 0, 0, 0, 8,
				0, 7, 15, 133, 37, 0, 0, 0, 2, 3,
				0, 8, 0, 7, 15, 134, 37, 15, 135, 37,
				0, 0, 0, 8, 0, 7, 15, 136, 37, 15,
				137, 37, 0, 0, 0, 8, 0, 7, 15, 138,
				37, 15, 139, 37, 0, 0, 0, 8, 0, 7,
				15, 140, 37, 15, 141, 37, 0, 0, 0, 8,
				0, 7, 22, 142, 37, 0, 0, 0, 0, 8,
				0, 7, 22, 143, 37, 0, 0, 0, 0, 8,
				0, 7, 15, 144, 37, 0, 0, 0, 8, 0,
				7, 15, 145, 37, 0, 0, 0, 2, 2, 0,
				8, 0, 7, 15, 146, 37, 15, 147, 37, 0,
				0, 0, 8, 0, 7, 15, 148, 37, 15, 149,
				37, 0, 0, 0, 8, 0, 7, 15, 150, 37,
				15, 151, 37, 0, 0, 0, 8, 0, 7, 15,
				152, 37, 15, 153, 37, 0, 0, 0, 8, 0,
				7, 22, 154, 37, 0, 0, 0, 2, 5, 0,
				6, 4, 3, 0, 8, 0, 7, 12, 163, 37,
				0, 0, 0, 8, 0, 7, 12, 164, 37, 0,
				0, 0, 8, 0, 7, 12, 165, 37, 0, 0,
				0, 8, 0, 7, 12, 166, 37, 0, 0, 0,
				8, 0, 7, 15, 167, 37, 0, 0, 0, 8,
				0, 7, 15, 168, 37, 0, 0, 0, 8, 0,
				7, 15, 169, 37, 15, 170, 37, 0, 0, 8,
				0, 7, 15, 171, 37, 0, 0, 0, 8, 7,
				5, 0, 12, 172, 37, 5, 0, 12, 173, 37,
				7, 11, 174, 37, 11, 175, 37, 0, 0, 8,
				7, 5, 0, 12, 176, 37, 5, 0, 12, 177,
				37, 7, 11, 178, 37, 11, 179, 37, 0, 0,
				8, 7, 12, 180, 37, 0, 7, 12, 181, 37,
				0, 0, 0, 8, 7, 12, 182, 37, 0, 0,
				0, 0, 8, 7, 5, 0, 12, 183, 37, 5,
				0, 12, 184, 37, 7, 11, 185, 37, 11, 186,
				37, 0, 0, 8, 7, 5, 0, 12, 187, 37,
				5, 0, 12, 188, 37, 7, 11, 189, 37, 11,
				190, 37, 0, 0, 8, 7, 12, 191, 37, 0,
				7, 12, 192, 37, 0, 0, 0, 8, 7, 12,
				193, 37, 0, 0, 0, 0, 2, 40, 0, 1,
				128, 2, 2, 3, 0, 8, 0, 7, 16, 194,
				37, 0, 0, 0, 2, 3, 0, 8, 0, 7,
				14, 195, 37, 0, 0, 0, 2, 22, 0, 8,
				0, 7, 19, 196, 37, 0, 0, 0, 8, 0,
				7, 19, 197, 37, 0, 0, 0, 2, 6, 0,
				8, 0, 7, 14, 198, 37, 14, 199, 37, 0,
				0, 2, 43, 0, 8, 0, 7, 14, 200, 37,
				14, 201, 37, 0, 0, 2, 119, 0, 8, 7,
				14, 202, 37, 0, 7, 14, 203, 37, 0, 0,
				7, 0, 14, 204, 37, 8, 7, 14, 205, 37,
				0, 7, 14, 206, 37, 0, 0, 0, 2, 4,
				0, 8, 0, 7, 14, 207, 37, 0, 0, 0,
				8, 0, 7, 14, 208, 37, 0, 0, 0, 2,
				20, 0, 8, 0, 0, 0, 7, 0, 14, 209,
				37, 2, 25, 0, 1, 128, 2, 2, 24, 0,
				6, 4, 0, 2, 15, 0, 8, 7, 12, 139,
				36, 0, 7, 0, 12, 140, 36, 0, 0, 8,
				7, 11, 141, 36, 0, 7, 0, 11, 142, 36,
				7, 0, 9, 11, 143, 36, 11, 144, 36, 7,
				9, 11, 145, 36, 11, 146, 36, 0, 2, 46,
				0, 8, 7, 15, 147, 36, 0, 7, 0, 15,
				148, 36, 0, 0, 8, 7, 15, 149, 36, 0,
				7, 0, 15, 150, 36, 0, 0, 8, 7, 12,
				151, 36, 0, 7, 0, 12, 152, 36, 0, 0,
				0, 8, 7, 15, 153, 36, 0, 7, 0, 15,
				154, 36, 0, 0, 2, 9, 0, 8, 0, 7,
				18, 155, 36, 0, 0, 0, 2, 8, 0, 8,
				0, 7, 12, 156, 36, 12, 157, 36, 0, 0,
				8, 0, 7, 14, 158, 36, 0, 0, 0, 0,
				6, 4, 1, 2, 3, 0, 8, 0, 7, 18,
				162, 36, 0, 0, 0, 2, 3, 0, 8, 0,
				0, 7, 12, 163, 36, 0, 0, 2, 4, 0,
				8, 0, 7, 11, 164, 36, 11, 165, 36, 0,
				0, 2, 46, 0, 6, 4, 2, 2, 19, 0,
				8, 7, 19, 168, 36, 0, 7, 0, 19, 169,
				36, 0, 0, 2, 24, 0, 8, 0, 7, 15,
				170, 36, 15, 171, 36, 0, 0, 2, 3, 0,
				8, 0, 7, 15, 172, 36, 15, 173, 36, 0,
				0, 2, 6, 0, 8, 0, 0, 7, 12, 174,
				36, 0, 0, 2, 4, 0, 8, 0, 7, 15,
				175, 36, 15, 176, 36, 0, 0, 2, 3, 0,
				8, 0, 7, 15, 177, 36, 15, 178, 36, 0,
				0, 2, 10, 0, 8, 0, 7, 15, 179, 36,
				0, 0, 0, 2, 3, 0, 8, 0, 7, 15,
				180, 36, 0, 0, 0, 0
			};
		}
	}
	internal static class OpCodeHandlersTables_VEX
	{
		internal static readonly OpCodeHandler[] Handlers_MAP0;

		internal static readonly OpCodeHandler[] Handlers_0F;

		internal static readonly OpCodeHandler[] Handlers_0F38;

		internal static readonly OpCodeHandler[] Handlers_0F3A;

		private const int MaxIdNames = 16;

		private const uint Handlers_MAP0Index = 14u;

		private const uint Handlers_0FIndex = 15u;

		private const uint Handlers_0F38Index = 12u;

		private const uint Handlers_0F3AIndex = 13u;

		static OpCodeHandlersTables_VEX()
		{
			VexOpCodeHandlerReader handlerReader = new VexOpCodeHandlerReader();
			TableDeserializer tableDeserializer = new TableDeserializer(handlerReader, 16, GetSerializedTables());
			tableDeserializer.Deserialize();
			Handlers_MAP0 = tableDeserializer.GetTable(14u);
			Handlers_0F = tableDeserializer.GetTable(15u);
			Handlers_0F38 = tableDeserializer.GetTable(12u);
			Handlers_0F3A = tableDeserializer.GetTable(13u);
		}

		private static ReadOnlySpan<byte> GetSerializedTables()
		{
			return new byte[6572]
			{
				1, 8, 11, 14, 71, 0, 4, 0, 29, 213,
				35, 128, 128, 128, 8, 0, 0, 0, 0, 11,
				14, 71, 0, 4, 0, 29, 214, 35, 128, 128,
				128, 8, 0, 0, 0, 0, 11, 14, 71, 0,
				4, 0, 29, 215, 35, 128, 128, 128, 8, 0,
				0, 0, 0, 11, 14, 71, 0, 4, 0, 29,
				216, 35, 128, 128, 128, 8, 0, 0, 0, 0,
				11, 14, 71, 0, 4, 0, 29, 217, 35, 128,
				128, 128, 8, 0, 0, 0, 0, 11, 14, 71,
				0, 4, 0, 29, 218, 35, 128, 128, 128, 8,
				0, 0, 0, 0, 11, 14, 71, 0, 4, 0,
				29, 219, 35, 128, 128, 128, 8, 0, 0, 0,
				0, 11, 14, 71, 0, 4, 0, 29, 220, 35,
				128, 128, 128, 8, 0, 0, 0, 0, 1, 8,
				1, 11, 0, 14, 26, 77, 225, 12, 26, 109,
				226, 12, 0, 0, 0, 11, 0, 14, 26, 77,
				232, 12, 26, 109, 233, 12, 0, 0, 0, 11,
				0, 14, 26, 77, 239, 12, 26, 109, 240, 12,
				0, 0, 0, 1, 8, 1, 11, 0, 14, 26,
				77, 130, 13, 26, 109, 131, 13, 0, 0, 0,
				11, 0, 14, 26, 77, 137, 13, 26, 109, 138,
				13, 0, 0, 0, 11, 0, 14, 26, 77, 147,
				13, 26, 109, 148, 13, 0, 0, 0, 1, 8,
				1, 11, 0, 14, 26, 77, 154, 13, 26, 109,
				155, 13, 0, 0, 11, 0, 14, 26, 77, 160,
				13, 26, 109, 161, 13, 0, 0, 1, 11, 0,
				14, 26, 77, 167, 13, 26, 109, 168, 13, 0,
				0, 11, 0, 14, 26, 77, 173, 13, 26, 109,
				174, 13, 0, 0, 1, 8, 1, 11, 14, 29,
				227, 15, 0, 0, 0, 0, 11, 14, 29, 231,
				15, 0, 0, 0, 0, 1, 11, 0, 0, 14,
				71, 0, 4, 0, 7, 75, 238, 35, 0, 128,
				128, 128, 8, 0, 14, 71, 0, 4, 0, 7,
				75, 240, 35, 0, 128, 128, 128, 8, 0, 11,
				0, 0, 14, 71, 0, 4, 0, 29, 242, 35,
				128, 128, 128, 8, 0, 14, 71, 0, 4, 0,
				29, 243, 35, 128, 128, 128, 8, 0, 1, 8,
				0, 11, 14, 28, 217, 28, 0, 0, 0, 0,
				11, 14, 28, 219, 28, 0, 0, 0, 0, 11,
				14, 28, 221, 28, 0, 0, 0, 0, 2, 4,
				0, 1, 8, 7, 0, 29, 128, 33, 2, 7,
				0, 1, 64, 35, 129, 33, 2, 63, 70, 1,
				8, 7, 0, 29, 130, 33, 2, 7, 0, 1,
				64, 2, 64, 70, 1, 8, 2, 8, 0, 1,
				64, 66, 131, 33, 2, 7, 70, 66, 131, 33,
				2, 7, 70, 66, 131, 33, 2, 7, 70, 66,
				131, 33, 2, 7, 70, 66, 131, 33, 2, 7,
				70, 66, 131, 33, 2, 7, 70, 66, 131, 33,
				2, 7, 70, 66, 131, 33, 2, 7, 70, 1,
				128, 2, 11, 0, 14, 41, 77, 132, 20, 41,
				109, 133, 20, 0, 0, 11, 0, 14, 41, 77,
				139, 20, 41, 109, 140, 20, 0, 0, 11, 0,
				14, 41, 77, 143, 20, 41, 109, 144, 20, 0,
				0, 11, 0, 14, 41, 77, 147, 20, 41, 109,
				148, 20, 0, 0, 11, 0, 14, 41, 77, 151,
				20, 41, 109, 152, 20, 0, 0, 11, 0, 14,
				41, 77, 158, 20, 41, 109, 159, 20, 0, 0,
				11, 0, 14, 41, 77, 162, 20, 41, 109, 163,
				20, 0, 0, 11, 0, 14, 41, 77, 166, 20,
				41, 109, 167, 20, 0, 0, 11, 0, 14, 41,
				77, 170, 20, 41, 109, 171, 20, 0, 0, 11,
				0, 14, 41, 77, 174, 20, 41, 109, 175, 20,
				0, 0, 11, 0, 14, 41, 77, 178, 20, 41,
				109, 179, 20, 0, 0, 11, 0, 14, 41, 77,
				182, 20, 41, 109, 183, 20, 0, 0, 11, 0,
				9, 14, 41, 77, 187, 20, 41, 109, 188, 20,
				0, 0, 0, 11, 0, 9, 14, 41, 77, 192,
				20, 41, 109, 193, 20, 0, 0, 0, 11, 0,
				9, 14, 54, 77, 197, 20, 54, 109, 198, 20,
				0, 0, 0, 11, 0, 9, 14, 54, 77, 199,
				20, 54, 109, 200, 20, 0, 0, 0, 2, 3,
				0, 11, 0, 9, 14, 55, 77, 77, 220, 20,
				55, 109, 77, 221, 20, 0, 0, 0, 1, 11,
				0, 9, 14, 0, 41, 109, 248, 20, 0, 0,
				0, 11, 0, 14, 54, 77, 254, 20, 54, 109,
				255, 20, 0, 0, 11, 0, 9, 14, 7, 55,
				77, 77, 198, 33, 55, 77, 77, 128, 21, 7,
				55, 109, 77, 199, 33, 55, 109, 77, 129, 21,
				0, 0, 0, 11, 0, 9, 14, 0, 7, 55,
				109, 77, 200, 33, 55, 109, 77, 133, 21, 0,
				0, 0, 11, 0, 9, 14, 0, 53, 109, 138,
				21, 0, 0, 0, 0, 11, 0, 14, 54, 77,
				147, 21, 54, 109, 148, 21, 0, 0, 11, 0,
				14, 54, 77, 154, 21, 54, 109, 155, 21, 0,
				0, 11, 0, 14, 54, 77, 161, 21, 54, 109,
				162, 21, 0, 0, 0, 11, 0, 14, 55, 77,
				77, 170, 21, 55, 109, 77, 171, 21, 0, 0,
				11, 0, 14, 55, 77, 77, 179, 21, 55, 109,
				77, 180, 21, 0, 0, 11, 0, 14, 55, 77,
				77, 188, 21, 55, 109, 77, 189, 21, 0, 0,
				11, 0, 14, 55, 77, 77, 197, 21, 55, 109,
				77, 198, 21, 0, 0, 11, 0, 14, 55, 77,
				77, 206, 21, 55, 109, 77, 207, 21, 0, 0,
				11, 0, 14, 55, 77, 77, 215, 21, 55, 109,
				77, 216, 21, 0, 0, 1, 11, 0, 14, 41,
				77, 248, 21, 41, 109, 249, 21, 0, 0, 11,
				0, 14, 41, 77, 132, 22, 41, 109, 133, 22,
				0, 0, 11, 0, 14, 53, 77, 144, 22, 53,
				109, 145, 22, 0, 0, 11, 0, 14, 41, 77,
				153, 22, 41, 109, 154, 22, 0, 0, 11, 0,
				9, 14, 40, 77, 158, 22, 40, 109, 159, 22,
				0, 0, 0, 11, 0, 9, 14, 40, 77, 166,
				22, 40, 109, 167, 22, 0, 0, 0, 11, 0,
				9, 14, 30, 77, 170, 22, 30, 109, 171, 22,
				0, 0, 0, 11, 0, 9, 14, 30, 77, 172,
				22, 30, 109, 173, 22, 0, 0, 0, 11, 0,
				14, 55, 77, 77, 175, 22, 55, 109, 77, 176,
				22, 0, 0, 11, 0, 14, 55, 77, 77, 184,
				22, 55, 109, 77, 185, 22, 0, 0, 11, 0,
				14, 55, 77, 77, 193, 22, 55, 109, 77, 194,
				22, 0, 0, 11, 0, 14, 55, 77, 77, 202,
				22, 55, 109, 77, 203, 22, 0, 0, 11, 0,
				14, 55, 77, 77, 211, 22, 55, 109, 77, 212,
				22, 0, 0, 11, 0, 14, 55, 77, 77, 220,
				22, 55, 109, 77, 221, 22, 0, 0, 11, 0,
				9, 14, 0, 41, 109, 228, 22, 0, 0, 0,
				11, 0, 14, 41, 77, 234, 22, 41, 109, 235,
				22, 0, 0, 11, 0, 14, 41, 77, 240, 22,
				41, 109, 241, 22, 0, 0, 11, 0, 14, 41,
				77, 252, 22, 41, 109, 253, 22, 0, 0, 11,
				0, 14, 41, 77, 139, 23, 41, 109, 140, 23,
				0, 0, 11, 0, 14, 41, 77, 148, 23, 41,
				109, 149, 23, 0, 0, 11, 0, 14, 41, 77,
				157, 23, 41, 109, 158, 23, 0, 0, 11, 0,
				14, 41, 77, 163, 23, 41, 109, 164, 23, 0,
				0, 11, 0, 14, 41, 77, 172, 23, 41, 109,
				173, 23, 0, 0, 11, 0, 14, 41, 77, 178,
				23, 41, 109, 179, 23, 0, 0, 11, 0, 14,
				41, 77, 187, 23, 41, 109, 188, 23, 0, 0,
				11, 0, 14, 54, 77, 196, 23, 0, 0, 0,
				2, 3, 0, 11, 0, 9, 14, 41, 77, 211,
				23, 41, 109, 212, 23, 14, 41, 77, 213, 23,
				41, 109, 214, 23, 0, 0, 11, 0, 9, 14,
				41, 77, 221, 23, 41, 109, 222, 23, 0, 0,
				0, 11, 0, 9, 14, 41, 77, 229, 23, 41,
				109, 230, 23, 14, 41, 77, 231, 23, 41, 109,
				232, 23, 0, 0, 0, 69, 0, 11, 9, 14,
				68, 6, 6, 6, 7, 0, 0, 9, 14, 68,
				6, 8, 6, 9, 0, 0, 0, 9, 14, 68,
				6, 10, 6, 11, 0, 0, 0, 69, 0, 11,
				0, 9, 14, 7, 0, 64, 132, 33, 0, 0,
				9, 14, 7, 0, 65, 133, 33, 0, 0, 9,
				14, 7, 0, 64, 134, 33, 0, 0, 2, 4,
				0, 11, 9, 14, 41, 77, 240, 37, 41, 109,
				241, 37, 0, 9, 14, 41, 77, 208, 33, 41,
				109, 209, 33, 0, 9, 14, 41, 77, 242, 37,
				41, 109, 243, 37, 0, 9, 14, 41, 77, 244,
				37, 41, 109, 245, 37, 0, 11, 9, 14, 41,
				77, 246, 37, 41, 109, 247, 37, 0, 9, 14,
				41, 77, 210, 33, 41, 109, 211, 33, 0, 9,
				14, 41, 77, 248, 37, 41, 109, 249, 37, 0,
				9, 14, 41, 77, 250, 37, 41, 109, 251, 37,
				0, 11, 0, 9, 14, 41, 77, 212, 33, 41,
				109, 213, 33, 0, 0, 0, 11, 0, 9, 14,
				41, 77, 214, 33, 41, 109, 215, 33, 0, 0,
				0, 2, 4, 0, 11, 0, 9, 14, 55, 77,
				77, 156, 24, 55, 109, 77, 157, 24, 0, 0,
				0, 11, 0, 9, 14, 55, 77, 77, 161, 24,
				55, 109, 77, 162, 24, 0, 0, 0, 11, 0,
				9, 14, 0, 53, 109, 169, 24, 0, 0, 0,
				0, 69, 0, 11, 0, 0, 9, 14, 7, 67,
				135, 33, 0, 0, 0, 9, 14, 7, 67, 252,
				37, 0, 0, 0, 0, 69, 0, 11, 9, 14,
				7, 67, 136, 33, 0, 0, 0, 9, 14, 7,
				67, 137, 33, 0, 0, 0, 9, 14, 7, 67,
				138, 33, 0, 0, 0, 9, 14, 7, 67, 139,
				33, 0, 0, 0, 2, 19, 0, 11, 0, 0,
				9, 14, 55, 77, 77, 253, 37, 55, 77, 109,
				254, 37, 0, 0, 2, 5, 0, 11, 0, 9,
				14, 55, 77, 77, 254, 24, 55, 109, 77, 255,
				24, 0, 0, 0, 11, 0, 9, 14, 55, 77,
				77, 131, 25, 55, 109, 77, 132, 25, 0, 0,
				0, 2, 18, 0, 11, 0, 9, 14, 40, 77,
				199, 25, 40, 109, 200, 25, 14, 40, 77, 201,
				25, 40, 109, 202, 25, 0, 0, 0, 11, 0,
				9, 14, 30, 77, 209, 25, 30, 109, 210, 25,
				14, 30, 77, 211, 25, 30, 109, 212, 25, 0,
				0, 0, 11, 0, 9, 14, 60, 77, 77, 77,
				216, 25, 60, 109, 109, 109, 217, 25, 14, 60,
				77, 77, 77, 218, 25, 60, 109, 77, 109, 219,
				25, 0, 0, 11, 0, 9, 14, 60, 77, 77,
				77, 226, 25, 60, 77, 109, 77, 227, 25, 14,
				60, 77, 77, 77, 228, 25, 60, 109, 109, 109,
				229, 25, 0, 0, 11, 0, 9, 14, 60, 77,
				77, 77, 236, 25, 60, 109, 109, 109, 237, 25,
				14, 60, 77, 77, 77, 238, 25, 60, 109, 77,
				109, 239, 25, 0, 0, 11, 0, 9, 14, 60,
				77, 77, 77, 246, 25, 60, 77, 109, 77, 247,
				25, 14, 60, 77, 77, 77, 248, 25, 60, 109,
				109, 109, 249, 25, 0, 0, 1, 11, 0, 9,
				14, 41, 77, 128, 26, 41, 109, 129, 26, 14,
				41, 77, 130, 26, 41, 109, 131, 26, 0, 0,
				11, 0, 9, 14, 41, 77, 138, 26, 41, 109,
				139, 26, 14, 41, 77, 140, 26, 41, 109, 141,
				26, 0, 0, 11, 0, 9, 14, 41, 77, 148,
				26, 41, 109, 149, 26, 14, 41, 77, 150, 26,
				41, 109, 151, 26, 0, 0, 11, 0, 9, 41,
				77, 158, 26, 41, 77, 159, 26, 0, 0, 11,
				0, 9, 14, 41, 77, 162, 26, 41, 109, 163,
				26, 14, 41, 77, 164, 26, 41, 109, 165, 26,
				0, 0, 11, 0, 9, 41, 77, 173, 26, 41,
				77, 174, 26, 0, 0, 11, 0, 9, 14, 41,
				77, 178, 26, 41, 109, 179, 26, 14, 41, 77,
				180, 26, 41, 109, 181, 26, 0, 0, 11, 0,
				9, 41, 77, 188, 26, 41, 77, 189, 26, 0,
				0, 11, 0, 9, 14, 41, 77, 192, 26, 41,
				109, 193, 26, 14, 41, 77, 194, 26, 41, 109,
				195, 26, 0, 0, 11, 0, 9, 41, 77, 202,
				26, 41, 77, 203, 26, 0, 0, 2, 6, 0,
				11, 0, 9, 14, 41, 77, 230, 26, 41, 109,
				231, 26, 14, 41, 77, 232, 26, 41, 109, 233,
				26, 0, 0, 11, 0, 9, 14, 41, 77, 240,
				26, 41, 109, 241, 26, 14, 41, 77, 242, 26,
				41, 109, 243, 26, 0, 0, 11, 0, 9, 14,
				41, 77, 250, 26, 41, 109, 251, 26, 14, 41,
				77, 252, 26, 41, 109, 253, 26, 0, 0, 11,
				0, 9, 41, 77, 132, 27, 41, 77, 133, 27,
				0, 0, 11, 0, 9, 14, 41, 77, 136, 27,
				41, 109, 137, 27, 14, 41, 77, 138, 27, 41,
				109, 139, 27, 0, 0, 11, 0, 9, 41, 77,
				147, 27, 41, 77, 148, 27, 0, 0, 11, 0,
				9, 14, 41, 77, 152, 27, 41, 109, 153, 27,
				14, 41, 77, 154, 27, 41, 109, 155, 27, 0,
				0, 11, 0, 9, 41, 77, 162, 27, 41, 77,
				163, 27, 0, 0, 11, 0, 9, 14, 41, 77,
				166, 27, 41, 109, 167, 27, 14, 41, 77, 168,
				27, 41, 109, 169, 27, 0, 0, 11, 0, 9,
				41, 77, 176, 27, 41, 77, 177, 27, 0, 0,
				11, 9, 14, 53, 77, 255, 37, 53, 109, 128,
				38, 0, 9, 14, 53, 77, 129, 38, 53, 109,
				130, 38, 0, 9, 14, 53, 77, 131, 38, 53,
				109, 132, 38, 0, 9, 14, 53, 77, 133, 38,
				53, 109, 134, 38, 0, 11, 0, 9, 14, 53,
				77, 135, 38, 53, 109, 136, 38, 0, 9, 14,
				53, 77, 137, 38, 53, 109, 138, 38, 0, 0,
				1, 11, 0, 9, 0, 14, 41, 77, 139, 38,
				41, 109, 140, 38, 0, 0, 11, 0, 9, 0,
				14, 41, 77, 141, 38, 41, 109, 142, 38, 0,
				0, 11, 0, 9, 14, 41, 77, 186, 27, 41,
				109, 187, 27, 14, 41, 77, 188, 27, 41, 109,
				189, 27, 0, 0, 11, 0, 9, 14, 41, 77,
				196, 27, 41, 109, 197, 27, 14, 41, 77, 198,
				27, 41, 109, 199, 27, 0, 0, 11, 0, 9,
				14, 41, 77, 206, 27, 41, 109, 207, 27, 14,
				41, 77, 208, 27, 41, 109, 209, 27, 0, 0,
				11, 0, 9, 41, 77, 216, 27, 41, 77, 217,
				27, 0, 0, 11, 0, 9, 14, 41, 77, 220,
				27, 41, 109, 221, 27, 14, 41, 77, 222, 27,
				41, 109, 223, 27, 0, 0, 11, 0, 9, 41,
				77, 230, 27, 41, 77, 231, 27, 0, 0, 11,
				0, 9, 14, 41, 77, 234, 27, 41, 109, 235,
				27, 14, 41, 77, 236, 27, 41, 109, 237, 27,
				0, 0, 11, 0, 9, 41, 77, 244, 27, 41,
				77, 245, 27, 0, 0, 11, 0, 9, 14, 41,
				77, 248, 27, 41, 109, 249, 27, 14, 41, 77,
				250, 27, 41, 109, 251, 27, 0, 0, 11, 0,
				9, 41, 77, 130, 28, 41, 77, 131, 28, 0,
				0, 2, 15, 0, 11, 0, 9, 14, 41, 77,
				173, 28, 41, 109, 174, 28, 0, 0, 0, 2,
				11, 0, 11, 0, 14, 54, 77, 179, 28, 0,
				0, 0, 11, 0, 14, 41, 77, 181, 28, 41,
				109, 182, 28, 0, 0, 11, 0, 14, 41, 77,
				187, 28, 41, 109, 188, 28, 0, 0, 11, 0,
				14, 41, 77, 193, 28, 41, 109, 194, 28, 0,
				0, 11, 0, 14, 41, 77, 199, 28, 41, 109,
				200, 28, 0, 0, 69, 0, 11, 0, 14, 7,
				0, 78, 143, 38, 0, 0, 0, 69, 0, 11,
				0, 14, 7, 0, 78, 145, 38, 0, 0, 0,
				69, 0, 11, 0, 14, 7, 0, 78, 147, 38,
				0, 0, 0, 69, 0, 11, 0, 14, 7, 0,
				78, 149, 38, 0, 0, 0, 69, 0, 11, 0,
				14, 7, 0, 78, 151, 38, 0, 0, 0, 69,
				0, 11, 0, 14, 7, 0, 78, 153, 38, 0,
				0, 0, 69, 0, 11, 0, 14, 7, 0, 78,
				155, 38, 0, 0, 0, 69, 0, 11, 0, 14,
				7, 0, 78, 157, 38, 0, 0, 0, 69, 0,
				11, 0, 14, 7, 0, 78, 159, 38, 0, 0,
				0, 69, 0, 11, 0, 14, 7, 0, 78, 161,
				38, 0, 0, 0, 69, 0, 11, 0, 14, 7,
				0, 78, 163, 38, 0, 0, 0, 69, 0, 11,
				0, 14, 7, 0, 78, 165, 38, 0, 0, 0,
				69, 0, 11, 0, 14, 7, 0, 78, 167, 38,
				0, 0, 0, 69, 0, 11, 0, 14, 7, 0,
				78, 169, 38, 0, 0, 0, 69, 0, 11, 0,
				14, 7, 0, 78, 171, 38, 0, 0, 0, 69,
				0, 11, 0, 14, 7, 0, 78, 173, 38, 0,
				0, 0, 11, 0, 0, 14, 71, 0, 4, 0,
				74, 252, 35, 128, 128, 128, 8, 0, 14, 71,
				0, 4, 0, 74, 254, 35, 128, 128, 128, 8,
				0, 11, 0, 0, 0, 14, 71, 0, 4, 0,
				74, 128, 36, 128, 128, 128, 8, 0, 11, 14,
				22, 215, 28, 0, 0, 0, 0, 8, 6, 5,
				0, 11, 14, 18, 223, 28, 0, 0, 14, 22,
				227, 28, 0, 14, 22, 229, 28, 0, 11, 0,
				0, 0, 14, 22, 237, 28, 0, 11, 14, 18,
				239, 28, 0, 14, 18, 241, 28, 0, 14, 18,
				243, 28, 0, 14, 18, 245, 28, 0, 2, 8,
				0, 1, 128, 2, 11, 0, 9, 0, 14, 0,
				57, 109, 130, 29, 0, 0, 11, 0, 9, 0,
				14, 0, 57, 109, 133, 29, 0, 0, 11, 0,
				9, 14, 44, 77, 136, 29, 44, 109, 137, 29,
				0, 0, 0, 0, 11, 0, 9, 14, 57, 77,
				144, 29, 57, 109, 145, 29, 0, 0, 0, 11,
				0, 9, 14, 57, 77, 149, 29, 57, 109, 150,
				29, 0, 0, 0, 11, 0, 9, 14, 0, 44,
				109, 154, 29, 0, 0, 0, 0, 11, 0, 14,
				57, 77, 156, 29, 57, 109, 157, 29, 0, 0,
				11, 0, 14, 57, 77, 162, 29, 57, 109, 163,
				29, 0, 0, 11, 0, 44, 77, 168, 29, 0,
				0, 11, 0, 44, 77, 171, 29, 0, 0, 11,
				0, 14, 44, 77, 174, 29, 44, 109, 175, 29,
				0, 0, 11, 0, 14, 44, 77, 177, 29, 44,
				109, 178, 29, 0, 0, 11, 0, 14, 44, 77,
				180, 29, 44, 109, 181, 29, 0, 0, 11, 0,
				14, 44, 77, 184, 29, 44, 109, 185, 29, 0,
				0, 2, 4, 0, 11, 0, 14, 25, 77, 191,
				29, 0, 0, 0, 11, 0, 14, 25, 77, 197,
				29, 0, 0, 0, 11, 0, 14, 25, 77, 203,
				29, 0, 0, 0, 11, 0, 14, 15, 77, 209,
				29, 0, 0, 0, 11, 0, 9, 14, 0, 45,
				109, 109, 77, 213, 29, 0, 0, 0, 11, 0,
				9, 14, 0, 63, 77, 109, 218, 29, 0, 0,
				0, 2, 3, 0, 11, 0, 9, 14, 63, 77,
				77, 227, 29, 63, 77, 109, 228, 29, 0, 0,
				0, 1, 11, 0, 14, 37, 77, 246, 29, 0,
				0, 0, 11, 0, 14, 44, 77, 251, 29, 0,
				0, 0, 11, 0, 14, 37, 77, 255, 29, 0,
				0, 0, 2, 13, 0, 11, 0, 14, 9, 51,
				149, 30, 51, 150, 30, 0, 0, 0, 11, 0,
				14, 9, 51, 151, 30, 51, 152, 30, 0, 0,
				0, 11, 0, 14, 9, 51, 153, 30, 51, 154,
				30, 0, 0, 0, 11, 0, 14, 9, 51, 155,
				30, 51, 156, 30, 0, 0, 0, 2, 4, 0,
				11, 0, 9, 14, 0, 45, 109, 109, 77, 157,
				30, 0, 0, 0, 11, 0, 9, 14, 0, 63,
				77, 109, 162, 30, 0, 0, 0, 2, 4, 0,
				11, 0, 14, 9, 71, 0, 4, 0, 73, 130,
				36, 53, 128, 128, 128, 8, 0, 0, 0, 0,
				0, 11, 0, 14, 44, 77, 184, 30, 44, 109,
				185, 30, 0, 0, 11, 0, 14, 44, 77, 187,
				30, 0, 0, 0, 11, 0, 14, 44, 77, 189,
				30, 44, 109, 190, 30, 0, 0, 0, 11, 0,
				14, 44, 77, 199, 30, 44, 109, 200, 30, 0,
				0, 0, 11, 0, 9, 14, 0, 44, 109, 204,
				30, 0, 0, 0, 0, 11, 0, 9, 14, 47,
				77, 205, 30, 47, 109, 206, 30, 14, 39, 77,
				207, 30, 39, 109, 208, 30, 0, 0, 11, 0,
				9, 14, 47, 77, 209, 30, 47, 109, 210, 30,
				14, 39, 77, 211, 30, 39, 109, 212, 30, 0,
				0, 11, 0, 9, 14, 46, 77, 213, 30, 46,
				109, 214, 30, 0, 0, 0, 11, 0, 9, 14,
				46, 77, 215, 30, 46, 109, 216, 30, 0, 0,
				0, 11, 0, 9, 14, 46, 77, 217, 30, 46,
				109, 218, 30, 0, 0, 0, 2, 15, 0, 11,
				0, 9, 14, 46, 77, 243, 30, 46, 109, 244,
				30, 14, 38, 77, 245, 30, 38, 109, 246, 30,
				0, 0, 11, 0, 9, 14, 46, 77, 247, 30,
				46, 109, 248, 30, 14, 38, 77, 249, 30, 38,
				109, 250, 30, 0, 0, 11, 0, 9, 14, 46,
				77, 251, 30, 46, 109, 252, 30, 14, 38, 77,
				253, 30, 38, 109, 254, 30, 0, 0, 11, 0,
				9, 14, 46, 77, 255, 30, 46, 109, 128, 31,
				14, 38, 77, 129, 31, 38, 109, 130, 31, 0,
				0, 11, 0, 14, 58, 77, 133, 31, 0, 0,
				0, 11, 0, 14, 58, 77, 137, 31, 0, 0,
				0, 11, 0, 14, 57, 77, 140, 31, 0, 0,
				0, 11, 0, 14, 57, 77, 142, 31, 0, 0,
				0, 2, 4, 0, 11, 0, 9, 14, 46, 77,
				151, 31, 46, 109, 152, 31, 14, 38, 77, 153,
				31, 38, 109, 154, 31, 0, 0, 11, 0, 9,
				14, 46, 77, 155, 31, 46, 109, 156, 31, 14,
				38, 77, 157, 31, 38, 109, 158, 31, 0, 0,
				11, 0, 9, 46, 77, 159, 31, 38, 77, 160,
				31, 0, 0, 11, 0, 9, 46, 77, 161, 31,
				38, 77, 162, 31, 0, 0, 11, 0, 9, 14,
				46, 77, 163, 31, 46, 109, 164, 31, 14, 38,
				77, 165, 31, 38, 109, 166, 31, 0, 0, 11,
				0, 9, 14, 46, 77, 167, 31, 46, 109, 168,
				31, 14, 38, 77, 169, 31, 38, 109, 170, 31,
				0, 0, 11, 0, 9, 46, 77, 171, 31, 38,
				77, 172, 31, 0, 0, 11, 0, 9, 46, 77,
				173, 31, 38, 77, 174, 31, 0, 0, 2, 8,
				0, 11, 0, 9, 14, 46, 77, 193, 31, 46,
				109, 194, 31, 14, 38, 77, 195, 31, 38, 109,
				196, 31, 0, 0, 11, 0, 9, 14, 46, 77,
				197, 31, 46, 109, 198, 31, 14, 38, 77, 199,
				31, 38, 109, 200, 31, 0, 0, 11, 0, 9,
				46, 77, 201, 31, 38, 77, 202, 31, 0, 0,
				11, 0, 9, 46, 77, 203, 31, 38, 77, 204,
				31, 0, 0, 11, 0, 9, 14, 46, 77, 205,
				31, 46, 109, 206, 31, 14, 38, 77, 207, 31,
				38, 109, 208, 31, 0, 0, 11, 0, 9, 14,
				46, 77, 209, 31, 46, 109, 210, 31, 14, 38,
				77, 211, 31, 38, 109, 212, 31, 0, 0, 11,
				0, 9, 46, 77, 213, 31, 38, 77, 214, 31,
				0, 0, 11, 0, 9, 46, 77, 215, 31, 38,
				77, 216, 31, 0, 0, 2, 78, 0, 11, 0,
				9, 0, 14, 44, 77, 219, 31, 44, 109, 220,
				31, 0, 0, 11, 0, 9, 0, 14, 44, 77,
				225, 31, 44, 109, 226, 31, 0, 0, 2, 15,
				0, 11, 0, 14, 57, 77, 231, 31, 0, 0,
				0, 2, 16, 0, 11, 0, 0, 0, 14, 19,
				232, 31, 0, 2, 15, 0, 1, 128, 2, 2,
				116, 0, 11, 14, 9, 71, 0, 4, 0, 76,
				211, 35, 128, 128, 128, 8, 0, 0, 0, 0,
				0, 11, 14, 9, 71, 0, 4, 0, 76, 212,
				35, 128, 128, 128, 8, 0, 0, 0, 0, 0,
				2, 138, 1, 0, 1, 128, 2, 2, 16, 0,
				11, 14, 54, 77, 254, 6, 54, 109, 255, 6,
				14, 54, 77, 132, 7, 54, 109, 133, 7, 7,
				41, 77, 138, 7, 53, 77, 139, 7, 7, 41,
				77, 143, 7, 53, 77, 144, 7, 11, 14, 62,
				77, 148, 7, 62, 109, 149, 7, 14, 62, 77,
				154, 7, 62, 109, 155, 7, 7, 61, 77, 160,
				7, 32, 77, 161, 7, 7, 61, 77, 165, 7,
				32, 77, 166, 7, 11, 14, 42, 77, 171, 7,
				172, 7, 0, 14, 40, 77, 176, 7, 0, 14,
				54, 77, 179, 7, 54, 109, 180, 7, 14, 54,
				77, 185, 7, 54, 109, 186, 7, 11, 14, 32,
				77, 191, 7, 0, 14, 32, 77, 194, 7, 0,
				0, 0, 11, 14, 41, 77, 197, 7, 41, 109,
				198, 7, 14, 41, 77, 203, 7, 41, 109, 204,
				7, 0, 0, 11, 14, 41, 77, 209, 7, 41,
				109, 210, 7, 14, 41, 77, 215, 7, 41, 109,
				216, 7, 0, 0, 11, 14, 42, 77, 221, 7,
				224, 7, 0, 14, 40, 77, 227, 7, 0, 14,
				54, 77, 230, 7, 54, 109, 231, 7, 0, 11,
				14, 32, 77, 236, 7, 0, 14, 32, 77, 239,
				7, 0, 0, 0, 8, 6, 0, 2, 15, 0,
				11, 14, 54, 77, 174, 8, 54, 109, 175, 8,
				14, 54, 77, 180, 8, 54, 109, 181, 8, 0,
				0, 11, 14, 62, 77, 186, 8, 62, 109, 187,
				8, 14, 62, 77, 192, 8, 62, 109, 193, 8,
				0, 0, 11, 0, 0, 36, 77, 201, 8, 36,
				77, 207, 8, 11, 14, 32, 77, 212, 8, 32,
				109, 213, 8, 14, 32, 77, 218, 8, 32, 109,
				219, 8, 0, 0, 11, 0, 0, 24, 77, 229,
				8, 24, 77, 235, 8, 11, 0, 0, 24, 77,
				243, 8, 24, 77, 249, 8, 11, 54, 77, 254,
				8, 54, 77, 129, 9, 0, 0, 11, 54, 77,
				133, 9, 54, 77, 134, 9, 0, 0, 2, 17,
				0, 11, 14, 9, 71, 0, 4, 0, 50, 221,
				35, 128, 128, 128, 8, 0, 9, 48, 193, 9,
				48, 194, 9, 14, 0, 9, 48, 195, 9, 48,
				196, 9, 0, 0, 11, 14, 9, 71, 0, 4,
				0, 50, 222, 35, 128, 128, 128, 8, 0, 9,
				48, 197, 9, 48, 198, 9, 14, 0, 9, 48,
				199, 9, 48, 200, 9, 0, 0, 11, 14, 9,
				71, 0, 4, 0, 50, 223, 35, 128, 128, 128,
				8, 0, 0, 0, 0, 0, 11, 14, 9, 71,
				50, 201, 9, 4, 0, 50, 224, 35, 128, 128,
				128, 8, 50, 202, 9, 0, 14, 9, 50, 203,
				9, 50, 204, 9, 0, 0, 0, 11, 14, 9,
				71, 0, 4, 0, 50, 225, 35, 128, 128, 128,
				8, 0, 9, 48, 205, 9, 48, 206, 9, 14,
				0, 9, 48, 207, 9, 48, 208, 9, 0, 0,
				11, 14, 9, 71, 0, 4, 0, 50, 226, 35,
				128, 128, 128, 8, 0, 9, 48, 209, 9, 48,
				210, 9, 14, 0, 9, 48, 211, 9, 48, 212,
				9, 0, 0, 11, 14, 9, 71, 0, 4, 0,
				50, 227, 35, 128, 128, 128, 8, 0, 9, 48,
				213, 9, 48, 214, 9, 14, 0, 9, 48, 215,
				9, 48, 216, 9, 0, 0, 11, 14, 9, 71,
				0, 4, 0, 50, 228, 35, 128, 128, 128, 8,
				0, 0, 0, 0, 0, 11, 14, 9, 71, 0,
				4, 0, 50, 229, 35, 128, 128, 128, 8, 0,
				0, 0, 0, 0, 11, 14, 0, 9, 48, 217,
				9, 48, 218, 9, 14, 0, 9, 48, 219, 9,
				48, 220, 9, 0, 0, 11, 14, 0, 9, 48,
				221, 9, 48, 222, 9, 14, 0, 9, 48, 223,
				9, 0, 0, 0, 2, 4, 0, 11, 14, 23,
				77, 226, 9, 23, 109, 228, 9, 14, 23, 77,
				232, 9, 23, 109, 234, 9, 0, 0, 11, 14,
				54, 77, 237, 9, 54, 109, 238, 9, 14, 54,
				77, 243, 9, 54, 109, 244, 9, 41, 77, 249,
				9, 41, 77, 252, 9, 11, 14, 54, 77, 255,
				9, 54, 109, 128, 10, 0, 41, 77, 130, 10,
				0, 11, 14, 54, 77, 132, 10, 54, 109, 133,
				10, 0, 41, 77, 135, 10, 0, 11, 14, 41,
				77, 137, 10, 41, 109, 138, 10, 14, 41, 77,
				143, 10, 41, 109, 144, 10, 0, 0, 11, 14,
				41, 77, 149, 10, 41, 109, 150, 10, 14, 41,
				77, 155, 10, 41, 109, 156, 10, 0, 0, 11,
				14, 41, 77, 161, 10, 41, 109, 162, 10, 14,
				41, 77, 167, 10, 41, 109, 168, 10, 0, 0,
				11, 14, 41, 77, 173, 10, 41, 109, 174, 10,
				14, 41, 77, 179, 10, 41, 109, 180, 10, 0,
				0, 11, 14, 41, 77, 185, 10, 41, 109, 186,
				10, 14, 41, 77, 191, 10, 41, 109, 192, 10,
				41, 77, 197, 10, 41, 77, 200, 10, 11, 14,
				41, 77, 203, 10, 41, 109, 204, 10, 14, 41,
				77, 209, 10, 41, 109, 210, 10, 41, 77, 215,
				10, 41, 77, 218, 10, 11, 14, 54, 77, 221,
				10, 55, 109, 77, 222, 10, 14, 54, 77, 227,
				10, 55, 77, 109, 228, 10, 41, 77, 233, 10,
				41, 77, 236, 10, 11, 14, 54, 77, 239, 10,
				54, 109, 240, 10, 14, 54, 77, 248, 10, 54,
				109, 249, 10, 14, 54, 77, 254, 10, 54, 109,
				255, 10, 0, 11, 14, 41, 77, 132, 11, 41,
				109, 133, 11, 14, 41, 77, 138, 11, 41, 109,
				139, 11, 41, 77, 144, 11, 41, 77, 147, 11,
				11, 14, 41, 77, 150, 11, 41, 109, 151, 11,
				14, 41, 77, 156, 11, 41, 109, 157, 11, 41,
				77, 162, 11, 41, 77, 165, 11, 11, 14, 41,
				77, 168, 11, 41, 109, 169, 11, 14, 41, 77,
				174, 11, 41, 109, 175, 11, 41, 77, 180, 11,
				41, 77, 183, 11, 11, 14, 41, 77, 186, 11,
				41, 109, 187, 11, 14, 41, 77, 192, 11, 41,
				109, 193, 11, 41, 77, 198, 11, 41, 77, 201,
				11, 11, 0, 14, 41, 77, 205, 11, 41, 109,
				206, 11, 0, 0, 11, 0, 14, 41, 77, 212,
				11, 41, 109, 213, 11, 0, 0, 11, 0, 14,
				41, 77, 219, 11, 41, 109, 220, 11, 0, 0,
				11, 0, 14, 41, 77, 226, 11, 41, 109, 227,
				11, 0, 0, 11, 0, 14, 41, 77, 233, 11,
				41, 109, 234, 11, 0, 0, 11, 0, 14, 41,
				77, 240, 11, 41, 109, 241, 11, 0, 0, 11,
				0, 14, 41, 77, 247, 11, 41, 109, 248, 11,
				0, 0, 11, 0, 14, 41, 77, 254, 11, 41,
				109, 255, 11, 0, 0, 11, 0, 14, 41, 77,
				133, 12, 41, 109, 134, 12, 0, 0, 11, 0,
				14, 41, 77, 140, 12, 41, 109, 141, 12, 0,
				0, 11, 0, 14, 41, 77, 147, 12, 41, 109,
				148, 12, 0, 0, 11, 0, 14, 41, 77, 154,
				12, 41, 109, 155, 12, 0, 0, 11, 0, 14,
				41, 77, 160, 12, 41, 109, 161, 12, 0, 0,
				11, 0, 14, 41, 77, 166, 12, 41, 109, 167,
				12, 0, 0, 11, 0, 14, 59, 175, 12, 0,
				0, 0, 11, 0, 14, 54, 77, 181, 12, 54,
				109, 182, 12, 14, 54, 77, 190, 12, 54, 109,
				191, 12, 0, 11, 0, 14, 57, 77, 206, 12,
				57, 109, 207, 12, 14, 57, 77, 212, 12, 57,
				109, 213, 12, 14, 57, 77, 218, 12, 57, 109,
				219, 12, 8, 6, 1, 8, 6, 2, 8, 6,
				3, 11, 0, 14, 41, 77, 180, 13, 41, 109,
				181, 13, 0, 0, 11, 0, 14, 41, 77, 187,
				13, 41, 109, 188, 13, 0, 0, 11, 0, 14,
				41, 77, 194, 13, 41, 109, 195, 13, 0, 0,
				12, 13, 35, 200, 13, 35, 201, 13, 3, 3,
				3, 2, 4, 0, 11, 0, 14, 41, 77, 143,
				14, 41, 109, 144, 14, 0, 14, 41, 77, 146,
				14, 41, 109, 147, 14, 11, 0, 14, 41, 77,
				149, 14, 41, 109, 150, 14, 0, 14, 41, 77,
				152, 14, 41, 109, 153, 14, 11, 0, 14, 16,
				158, 14, 0, 14, 54, 77, 163, 14, 0, 0,
				11, 0, 14, 62, 77, 167, 14, 62, 109, 168,
				14, 14, 62, 77, 176, 14, 62, 109, 177, 14,
				0, 2, 4, 0, 11, 14, 9, 71, 0, 4,
				0, 77, 230, 35, 128, 128, 128, 8, 0, 0,
				0, 0, 0, 11, 14, 9, 71, 0, 4, 0,
				77, 231, 35, 128, 128, 128, 8, 0, 0, 0,
				0, 0, 2, 10, 0, 11, 14, 9, 71, 52,
				254, 14, 4, 0, 50, 232, 35, 128, 128, 128,
				8, 52, 255, 14, 0, 14, 9, 52, 128, 15,
				52, 129, 15, 0, 0, 0, 11, 14, 9, 31,
				130, 15, 31, 131, 15, 0, 14, 9, 31, 132,
				15, 31, 133, 15, 0, 0, 0, 11, 14, 9,
				71, 49, 134, 15, 37, 4, 0, 49, 233, 35,
				37, 128, 128, 128, 8, 0, 0, 14, 9, 49,
				135, 15, 37, 0, 0, 0, 14, 9, 49, 136,
				15, 37, 4, 49, 136, 15, 37, 49, 137, 15,
				53, 0, 11, 14, 9, 71, 17, 138, 15, 37,
				4, 0, 17, 234, 35, 37, 128, 128, 128, 8,
				0, 0, 14, 9, 17, 139, 15, 37, 0, 0,
				0, 14, 9, 17, 140, 15, 37, 4, 17, 140,
				15, 37, 17, 141, 15, 53, 0, 0, 11, 14,
				9, 71, 0, 4, 0, 72, 235, 35, 128, 128,
				128, 8, 0, 0, 0, 0, 0, 0, 11, 14,
				9, 71, 0, 4, 0, 72, 236, 35, 128, 128,
				128, 8, 0, 0, 0, 0, 0, 11, 14, 9,
				71, 50, 142, 15, 4, 0, 50, 237, 35, 128,
				128, 128, 8, 50, 143, 15, 0, 14, 9, 50,
				144, 15, 50, 145, 15, 0, 0, 0, 11, 14,
				9, 50, 146, 15, 50, 147, 15, 0, 14, 9,
				50, 148, 15, 50, 149, 15, 0, 0, 0, 2,
				20, 0, 8, 6, 4, 2, 9, 0, 11, 0,
				0, 14, 71, 0, 4, 0, 7, 74, 244, 35,
				0, 128, 128, 128, 8, 0, 0, 2, 3, 0,
				11, 0, 0, 14, 71, 0, 4, 0, 7, 74,
				246, 35, 0, 128, 128, 128, 8, 0, 14, 71,
				0, 4, 0, 7, 74, 248, 35, 0, 128, 128,
				128, 8, 0, 11, 0, 0, 14, 71, 0, 4,
				0, 7, 74, 250, 35, 0, 128, 128, 128, 8,
				0, 0, 2, 4, 0, 11, 14, 44, 77, 221,
				16, 44, 109, 222, 16, 14, 44, 77, 227, 16,
				44, 109, 228, 16, 44, 77, 233, 16, 44, 77,
				236, 16, 0, 11, 0, 14, 37, 77, 244, 16,
				0, 0, 0, 11, 0, 14, 21, 77, 252, 16,
				0, 0, 0, 11, 14, 44, 77, 129, 17, 44,
				109, 130, 17, 14, 44, 77, 135, 17, 44, 109,
				136, 17, 0, 0, 2, 9, 0, 11, 0, 14,
				41, 77, 164, 17, 41, 109, 165, 17, 0, 14,
				41, 77, 167, 17, 41, 109, 168, 17, 11, 0,
				14, 43, 77, 77, 77, 171, 17, 43, 109, 109,
				77, 172, 17, 0, 0, 11, 0, 14, 43, 77,
				77, 77, 178, 17, 43, 109, 109, 77, 179, 17,
				0, 0, 11, 0, 14, 43, 77, 77, 77, 185,
				17, 43, 109, 109, 77, 186, 17, 0, 0, 11,
				0, 14, 41, 77, 192, 17, 41, 109, 193, 17,
				0, 0, 11, 0, 14, 41, 77, 199, 17, 41,
				109, 200, 17, 0, 0, 11, 0, 14, 62, 77,
				205, 17, 0, 0, 0, 11, 0, 14, 23, 77,
				213, 17, 23, 109, 215, 17, 0, 0, 11, 0,
				14, 41, 77, 219, 17, 41, 109, 220, 17, 0,
				0, 11, 0, 14, 41, 77, 226, 17, 41, 109,
				227, 17, 0, 0, 11, 0, 14, 41, 77, 233,
				17, 41, 109, 234, 17, 0, 0, 11, 0, 14,
				41, 77, 240, 17, 41, 109, 241, 17, 0, 0,
				11, 0, 14, 41, 77, 250, 17, 41, 109, 251,
				17, 0, 0, 11, 0, 14, 41, 77, 129, 18,
				41, 109, 130, 18, 0, 0, 11, 0, 14, 41,
				77, 136, 18, 41, 109, 137, 18, 0, 0, 11,
				0, 14, 41, 77, 143, 18, 41, 109, 144, 18,
				0, 0, 11, 0, 14, 41, 77, 153, 18, 41,
				109, 154, 18, 0, 0, 11, 0, 14, 43, 77,
				77, 77, 160, 18, 43, 109, 109, 77, 161, 18,
				0, 0, 11, 0, 14, 43, 77, 77, 77, 167,
				18, 43, 109, 109, 77, 168, 18, 0, 0, 11,
				0, 14, 41, 77, 177, 18, 41, 109, 178, 18,
				0, 0, 11, 0, 14, 41, 77, 184, 18, 41,
				109, 185, 18, 0, 0, 11, 0, 14, 41, 77,
				191, 18, 41, 109, 192, 18, 0, 0, 11, 0,
				14, 54, 77, 197, 18, 55, 77, 109, 198, 18,
				14, 54, 77, 203, 18, 55, 109, 77, 204, 18,
				14, 54, 77, 212, 18, 55, 77, 109, 213, 18,
				11, 0, 14, 32, 77, 219, 18, 32, 109, 220,
				18, 0, 0, 11, 0, 14, 41, 77, 226, 18,
				41, 109, 227, 18, 0, 0, 11, 0, 14, 41,
				77, 233, 18, 41, 109, 234, 18, 0, 0, 11,
				0, 14, 41, 77, 240, 18, 41, 109, 241, 18,
				0, 0, 11, 0, 14, 41, 77, 247, 18, 41,
				109, 248, 18, 0, 0, 11, 0, 14, 41, 77,
				129, 19, 41, 109, 130, 19, 0, 0, 11, 0,
				14, 41, 77, 136, 19, 41, 109, 137, 19, 0,
				0, 11, 0, 14, 41, 77, 143, 19, 41, 109,
				144, 19, 0, 0, 11, 0, 14, 41, 77, 150,
				19, 41, 109, 151, 19, 0, 0, 11, 0, 0,
				0, 14, 53, 77, 159, 19, 53, 109, 160, 19,
				11, 0, 14, 43, 77, 77, 77, 163, 19, 43,
				109, 109, 77, 164, 19, 0, 0, 11, 0, 14,
				43, 77, 77, 77, 170, 19, 43, 109, 109, 77,
				171, 19, 0, 0, 11, 0, 14, 43, 77, 77,
				77, 177, 19, 43, 109, 109, 77, 178, 19, 0,
				0, 11, 0, 14, 41, 77, 184, 19, 41, 109,
				185, 19, 0, 0, 11, 0, 14, 41, 77, 191,
				19, 41, 109, 192, 19, 0, 0, 11, 0, 14,
				41, 77, 198, 19, 41, 109, 199, 19, 0, 0,
				11, 0, 14, 33, 77, 205, 19, 0, 0, 0,
				11, 0, 14, 41, 77, 208, 19, 41, 109, 209,
				19, 0, 0, 11, 0, 14, 41, 77, 215, 19,
				41, 109, 216, 19, 0, 0, 11, 0, 14, 41,
				77, 222, 19, 41, 109, 223, 19, 0, 0, 11,
				0, 14, 41, 77, 229, 19, 41, 109, 230, 19,
				0, 0, 11, 0, 14, 41, 77, 236, 19, 41,
				109, 237, 19, 0, 0, 11, 0, 14, 41, 77,
				243, 19, 41, 109, 244, 19, 0, 0, 11, 0,
				14, 41, 77, 250, 19, 41, 109, 251, 19, 0,
				0, 0
			};
		}
	}
	internal static class OpCodeHandlersTables_XOP
	{
		internal static readonly OpCodeHandler[] Handlers_MAP8;

		internal static readonly OpCodeHandler[] Handlers_MAP9;

		internal static readonly OpCodeHandler[] Handlers_MAP10;

		private const int MaxIdNames = 7;

		private const uint Handlers_MAP8Index = 4u;

		private const uint Handlers_MAP9Index = 5u;

		private const uint Handlers_MAP10Index = 6u;

		static OpCodeHandlersTables_XOP()
		{
			VexOpCodeHandlerReader handlerReader = new VexOpCodeHandlerReader();
			TableDeserializer tableDeserializer = new TableDeserializer(handlerReader, 7, GetSerializedTables());
			tableDeserializer.Deserialize();
			Handlers_MAP8 = tableDeserializer.GetTable(4u);
			Handlers_MAP9 = tableDeserializer.GetTable(5u);
			Handlers_MAP10 = tableDeserializer.GetTable(6u);
		}

		private static ReadOnlySpan<byte> GetSerializedTables()
		{
			return new byte[768]
			{
				1, 8, 0, 10, 14, 28, 136, 32, 0, 10,
				14, 28, 138, 32, 0, 10, 14, 28, 140, 32,
				0, 10, 14, 28, 142, 32, 0, 10, 14, 28,
				144, 32, 0, 10, 14, 28, 146, 32, 0, 10,
				14, 28, 148, 32, 0, 1, 8, 0, 10, 14,
				28, 150, 32, 0, 2, 4, 0, 10, 14, 28,
				152, 32, 0, 0, 1, 8, 10, 14, 34, 154,
				32, 0, 10, 14, 34, 156, 32, 0, 2, 6,
				0, 1, 8, 10, 14, 27, 205, 32, 0, 10,
				14, 27, 207, 32, 0, 2, 6, 0, 1, 128,
				2, 2, 133, 1, 0, 10, 14, 9, 46, 77,
				234, 31, 0, 0, 10, 14, 9, 46, 77, 235,
				31, 0, 0, 10, 14, 9, 46, 77, 236, 31,
				0, 0, 2, 6, 0, 10, 14, 9, 46, 77,
				237, 31, 0, 0, 10, 14, 9, 46, 77, 238,
				31, 0, 0, 2, 5, 0, 10, 14, 9, 46,
				77, 239, 31, 0, 0, 10, 14, 9, 46, 77,
				240, 31, 0, 0, 10, 14, 9, 46, 77, 241,
				31, 0, 0, 2, 6, 0, 10, 14, 9, 46,
				77, 242, 31, 0, 0, 10, 14, 9, 46, 77,
				243, 31, 0, 0, 1, 10, 9, 14, 46, 77,
				244, 31, 46, 109, 245, 31, 14, 38, 77, 246,
				31, 38, 109, 247, 31, 10, 9, 14, 46, 77,
				248, 31, 0, 14, 38, 77, 249, 31, 0, 1,
				10, 14, 9, 46, 77, 250, 31, 0, 0, 2,
				15, 0, 10, 14, 9, 46, 77, 251, 31, 0,
				0, 2, 9, 0, 10, 14, 9, 57, 77, 252,
				31, 0, 0, 10, 14, 9, 57, 77, 253, 31,
				0, 0, 10, 14, 9, 57, 77, 254, 31, 0,
				0, 10, 14, 9, 57, 77, 255, 31, 0, 0,
				2, 8, 0, 10, 14, 9, 44, 77, 128, 32,
				0, 0, 10, 14, 9, 44, 77, 129, 32, 0,
				0, 10, 14, 9, 44, 77, 130, 32, 0, 0,
				10, 14, 9, 44, 77, 131, 32, 0, 0, 2,
				28, 0, 10, 14, 9, 44, 77, 132, 32, 0,
				0, 10, 14, 9, 44, 77, 133, 32, 0, 0,
				10, 14, 9, 44, 77, 134, 32, 0, 0, 10,
				14, 9, 44, 77, 135, 32, 0, 0, 2, 16,
				0, 1, 128, 2, 0, 8, 6, 0, 8, 6,
				1, 2, 15, 0, 8, 6, 2, 2, 109, 0,
				10, 14, 9, 54, 77, 158, 32, 0, 9, 54,
				109, 159, 32, 0, 10, 14, 9, 54, 77, 160,
				32, 0, 9, 54, 109, 161, 32, 0, 10, 14,
				9, 54, 77, 162, 32, 0, 0, 10, 14, 9,
				54, 77, 163, 32, 0, 0, 2, 12, 0, 10,
				14, 9, 56, 77, 164, 32, 41, 77, 165, 32,
				0, 10, 14, 9, 56, 77, 166, 32, 41, 77,
				167, 32, 0, 10, 14, 9, 56, 77, 168, 32,
				41, 77, 169, 32, 0, 10, 14, 9, 56, 77,
				170, 32, 41, 77, 171, 32, 0, 10, 14, 9,
				56, 77, 172, 32, 41, 77, 173, 32, 0, 10,
				14, 9, 56, 77, 174, 32, 41, 77, 175, 32,
				0, 10, 14, 9, 56, 77, 176, 32, 41, 77,
				177, 32, 0, 10, 14, 9, 56, 77, 178, 32,
				41, 77, 179, 32, 0, 10, 14, 9, 56, 77,
				180, 32, 41, 77, 181, 32, 0, 10, 14, 9,
				56, 77, 182, 32, 41, 77, 183, 32, 0, 10,
				14, 9, 56, 77, 184, 32, 41, 77, 185, 32,
				0, 10, 14, 9, 56, 77, 186, 32, 41, 77,
				187, 32, 0, 2, 37, 0, 10, 14, 9, 54,
				77, 188, 32, 0, 0, 10, 14, 9, 54, 77,
				189, 32, 0, 0, 10, 14, 9, 54, 77, 190,
				32, 0, 0, 1, 10, 14, 9, 54, 77, 191,
				32, 0, 0, 10, 14, 9, 54, 77, 192, 32,
				0, 0, 2, 3, 0, 10, 14, 9, 54, 77,
				193, 32, 0, 0, 2, 5, 0, 10, 14, 9,
				54, 77, 194, 32, 0, 0, 10, 14, 9, 54,
				77, 195, 32, 0, 0, 10, 14, 9, 54, 77,
				196, 32, 0, 0, 1, 10, 14, 9, 54, 77,
				197, 32, 0, 0, 10, 14, 9, 54, 77, 198,
				32, 0, 0, 2, 3, 0, 10, 14, 9, 54,
				77, 199, 32, 0, 0, 2, 5, 0, 10, 14,
				9, 54, 77, 200, 32, 0, 0, 10, 14, 9,
				54, 77, 201, 32, 0, 0, 10, 14, 9, 54,
				77, 202, 32, 0, 0, 2, 28, 0, 1, 128,
				2, 2, 16, 0, 10, 14, 20, 203, 32, 0,
				0, 8, 6, 3, 2, 237, 1, 0
			};
		}
	}
	internal sealed class OpCodeHandler_D3NOW : OpCodeHandlerModRM
	{
		internal static readonly Code[] CodeValues = CreateCodeValues();

		private readonly Code[] codeValues = CodeValues;

		private static Code[] CreateCodeValues()
		{
			Code[] array = new Code[256];
			array[191] = Code.D3NOW_Pavgusb_mm_mmm64;
			array[187] = Code.D3NOW_Pswapd_mm_mmm64;
			array[183] = Code.D3NOW_Pmulhrw_mm_mmm64;
			array[182] = Code.D3NOW_Pfrcpit2_mm_mmm64;
			array[180] = Code.D3NOW_Pfmul_mm_mmm64;
			array[176] = Code.D3NOW_Pfcmpeq_mm_mmm64;
			array[174] = Code.D3NOW_Pfacc_mm_mmm64;
			array[170] = Code.D3NOW_Pfsubr_mm_mmm64;
			array[167] = Code.D3NOW_Pfrsqit1_mm_mmm64;
			array[166] = Code.D3NOW_Pfrcpit1_mm_mmm64;
			array[164] = Code.D3NOW_Pfmax_mm_mmm64;
			array[160] = Code.D3NOW_Pfcmpgt_mm_mmm64;
			array[158] = Code.D3NOW_Pfadd_mm_mmm64;
			array[154] = Code.D3NOW_Pfsub_mm_mmm64;
			array[151] = Code.D3NOW_Pfrsqrt_mm_mmm64;
			array[150] = Code.D3NOW_Pfrcp_mm_mmm64;
			array[148] = Code.D3NOW_Pfmin_mm_mmm64;
			array[144] = Code.D3NOW_Pfcmpge_mm_mmm64;
			array[142] = Code.D3NOW_Pfpnacc_mm_mmm64;
			array[138] = Code.D3NOW_Pfnacc_mm_mmm64;
			array[135] = Code.D3NOW_Pfrsqrtv_mm_mmm64;
			array[134] = Code.D3NOW_Pfrcpv_mm_mmm64;
			array[29] = Code.D3NOW_Pf2id_mm_mmm64;
			array[28] = Code.D3NOW_Pf2iw_mm_mmm64;
			array[13] = Code.D3NOW_Pi2fd_mm_mmm64;
			array[12] = Code.D3NOW_Pi2fw_mm_mmm64;
			return array;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			instruction.Op0Register = (Register)(decoder.state.reg + 225);
			if (decoder.state.mod == 3)
			{
				instruction.Op1Register = (Register)(decoder.state.rm + 225);
			}
			else
			{
				instruction.Op1Kind = OpKind.Memory;
				decoder.ReadOpMem(ref instruction);
			}
			Code code = codeValues[decoder.ReadByte()];
			if ((uint)(code - 4181) <= 1u && ((decoder.options & DecoderOptions.Cyrix) == 0 || decoder.Bitness == 64))
			{
				code = Code.INVALID;
			}
			instruction.InternalSetCodeNoCheck(code);
			if (code == Code.INVALID)
			{
				decoder.SetInvalidInstruction();
			}
		}
	}
	internal sealed class OpCodeHandler_VectorLength_EVEX : OpCodeHandlerModRM
	{
		private readonly OpCodeHandler[] handlers;

		public OpCodeHandler_VectorLength_EVEX(OpCodeHandler handler128, OpCodeHandler handler256, OpCodeHandler handler512)
		{
			handlers = new OpCodeHandler[4]
			{
				handler128 ?? throw new ArgumentNullException("handler128"),
				handler256 ?? throw new ArgumentNullException("handler256"),
				handler512 ?? throw new ArgumentNullException("handler512"),
				OpCodeHandler_Invalid.Instance
			};
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			handlers[decoder.state.vectorLength].Decode(decoder, ref instruction);
		}
	}
	internal sealed class OpCodeHandler_VectorLength_EVEX_er : OpCodeHandlerModRM
	{
		private readonly OpCodeHandler[] handlers;

		public OpCodeHandler_VectorLength_EVEX_er(OpCodeHandler handler128, OpCodeHandler handler256, OpCodeHandler handler512)
		{
			handlers = new OpCodeHandler[4]
			{
				handler128 ?? throw new ArgumentNullException("handler128"),
				handler256 ?? throw new ArgumentNullException("handler256"),
				handler512 ?? throw new ArgumentNullException("handler512"),
				OpCodeHandler_Invalid.Instance
			};
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			int num = (int)decoder.state.vectorLength;
			if (decoder.state.mod == 3 && (decoder.state.zs.flags & StateFlags.b) != 0)
			{
				num = 2;
			}
			handlers[num].Decode(decoder, ref instruction);
		}
	}
	internal sealed class OpCodeHandler_EVEX_V_H_Ev_er : OpCodeHandlerModRM
	{
		private readonly Register baseReg;

		private readonly Code codeW0;

		private readonly Code codeW1;

		private readonly TupleType tupleTypeW0;

		private readonly TupleType tupleTypeW1;

		public OpCodeHandler_EVEX_V_H_Ev_er(Register baseReg, Code codeW0, Code codeW1, TupleType tupleTypeW0, TupleType tupleTypeW1)
		{
			this.baseReg = baseReg;
			this.codeW0 = codeW0;
			this.codeW1 = codeW1;
			this.tupleTypeW0 = tupleTypeW0;
			this.tupleTypeW1 = tupleTypeW1;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if ((((uint)(decoder.state.zs.flags & StateFlags.z) | decoder.state.aaa) & decoder.invalidCheckMask) != 0)
			{
				decoder.SetInvalidInstruction();
			}
			TupleType tupleType;
			Register register;
			if (((uint)decoder.state.zs.flags & decoder.is64bMode_and_W) != 0)
			{
				instruction.InternalSetCodeNoCheck(codeW1);
				tupleType = tupleTypeW1;
				register = Register.RAX;
			}
			else
			{
				instruction.InternalSetCodeNoCheck(codeW0);
				tupleType = tupleTypeW0;
				register = Register.EAX;
			}
			instruction.Op0Register = (Register)((int)(decoder.state.reg + decoder.state.zs.extraRegisterBase + decoder.state.extraRegisterBaseEVEX) + (int)baseReg);
			instruction.Op1Register = (Register)((int)decoder.state.vvvv + (int)baseReg);
			if (decoder.state.mod == 3)
			{
				instruction.Op2Register = (Register)((int)(decoder.state.rm + decoder.state.zs.extraBaseRegisterBase) + (int)register);
				if ((decoder.state.zs.flags & StateFlags.b) != 0)
				{
					instruction.InternalRoundingControl = decoder.state.vectorLength + 1;
				}
				return;
			}
			if (((uint)(decoder.state.zs.flags & StateFlags.b) & decoder.invalidCheckMask) != 0)
			{
				decoder.SetInvalidInstruction();
			}
			instruction.Op2Kind = OpKind.Memory;
			decoder.ReadOpMem(ref instruction, tupleType);
		}
	}
	internal sealed class OpCodeHandler_EVEX_V_H_Ev_Ib : OpCodeHandlerModRM
	{
		private readonly Register baseReg;

		private readonly Code codeW0;

		private readonly Code codeW1;

		private readonly TupleType tupleTypeW0;

		private readonly TupleType tupleTypeW1;

		public OpCodeHandler_EVEX_V_H_Ev_Ib(Register baseReg, Code codeW0, Code codeW1, TupleType tupleTypeW0, TupleType tupleTypeW1)
		{
			this.baseReg = baseReg;
			this.codeW0 = codeW0;
			this.codeW1 = codeW1;
			this.tupleTypeW0 = tupleTypeW0;
			this.tupleTypeW1 = tupleTypeW1;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if ((((uint)(decoder.state.zs.flags & (StateFlags.b | StateFlags.z)) | decoder.state.aaa) & decoder.invalidCheckMask) != 0)
			{
				decoder.SetInvalidInstruction();
			}
			Register register;
			if (((uint)decoder.state.zs.flags & decoder.is64bMode_and_W) != 0)
			{
				instruction.InternalSetCodeNoCheck(codeW1);
				register = Register.RAX;
			}
			else
			{
				instruction.InternalSetCodeNoCheck(codeW0);
				register = Register.EAX;
			}
			instruction.Op0Register = (Register)((int)(decoder.state.reg + decoder.state.zs.extraRegisterBase + decoder.state.extraRegisterBaseEVEX) + (int)baseReg);
			instruction.Op1Register = (Register)((int)decoder.state.vvvv + (int)baseReg);
			if (decoder.state.mod == 3)
			{
				instruction.Op2Register = (Register)((int)(decoder.state.rm + decoder.state.zs.extraBaseRegisterBase) + (int)register);
			}
			else
			{
				instruction.Op2Kind = OpKind.Memory;
				if (((uint)decoder.state.zs.flags & decoder.is64bMode_and_W) != 0)
				{
					decoder.ReadOpMem(ref instruction, tupleTypeW1);
				}
				else
				{
					decoder.ReadOpMem(ref instruction, tupleTypeW0);
				}
			}
			instruction.Op3Kind = OpKind.Immediate8;
			instruction.InternalImmediate8 = decoder.ReadByte();
		}
	}
	internal sealed class OpCodeHandler_EVEX_Ed_V_Ib : OpCodeHandlerModRM
	{
		private readonly Register baseReg;

		private readonly Code code32;

		private readonly Code code64;

		private readonly TupleType tupleType32;

		private readonly TupleType tupleType64;

		public OpCodeHandler_EVEX_Ed_V_Ib(Register baseReg, Code code32, Code code64, TupleType tupleType32, TupleType tupleType64)
		{
			this.baseReg = baseReg;
			this.code32 = code32;
			this.code64 = code64;
			this.tupleType32 = tupleType32;
			this.tupleType64 = tupleType64;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if ((((uint)(decoder.state.zs.flags & (StateFlags.b | StateFlags.z)) | decoder.state.vvvv_invalidCheck | decoder.state.aaa) & decoder.invalidCheckMask) != 0)
			{
				decoder.SetInvalidInstruction();
			}
			Register register;
			if (((uint)decoder.state.zs.flags & decoder.is64bMode_and_W) != 0)
			{
				instruction.InternalSetCodeNoCheck(code64);
				register = Register.RAX;
			}
			else
			{
				instruction.InternalSetCodeNoCheck(code32);
				register = Register.EAX;
			}
			if (decoder.state.mod == 3)
			{
				instruction.Op0Register = (Register)((int)(decoder.state.rm + decoder.state.zs.extraBaseRegisterBase) + (int)register);
			}
			else
			{
				instruction.Op0Kind = OpKind.Memory;
				if (((uint)decoder.state.zs.flags & decoder.is64bMode_and_W) != 0)
				{
					decoder.ReadOpMem(ref instruction, tupleType64);
				}
				else
				{
					decoder.ReadOpMem(ref instruction, tupleType32);
				}
			}
			instruction.Op1Register = (Register)((int)(decoder.state.reg + decoder.state.zs.extraRegisterBase + decoder.state.extraRegisterBaseEVEX) + (int)baseReg);
			instruction.Op2Kind = OpKind.Immediate8;
			instruction.InternalImmediate8 = decoder.ReadByte();
		}
	}
	internal sealed class OpCodeHandler_EVEX_VkHW_er : OpCodeHandlerModRM
	{
		private readonly Register baseReg;

		private readonly Code code;

		private readonly TupleType tupleType;

		private readonly bool onlySAE;

		private readonly bool canBroadcast;

		public OpCodeHandler_EVEX_VkHW_er(Register baseReg, Code code, TupleType tupleType, bool onlySAE, bool canBroadcast)
		{
			this.baseReg = baseReg;
			this.code = code;
			this.tupleType = tupleType;
			this.onlySAE = onlySAE;
			this.canBroadcast = canBroadcast;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			instruction.InternalSetCodeNoCheck(code);
			instruction.Op0Register = (Register)((int)(decoder.state.reg + decoder.state.zs.extraRegisterBase + decoder.state.extraRegisterBaseEVEX) + (int)baseReg);
			instruction.Op1Register = (Register)((int)decoder.state.vvvv + (int)baseReg);
			if (decoder.state.mod == 3)
			{
				instruction.Op2Register = (Register)((int)(decoder.state.rm + decoder.state.extraBaseRegisterBaseEVEX) + (int)baseReg);
				if ((decoder.state.zs.flags & StateFlags.b) != 0)
				{
					if (onlySAE)
					{
						instruction.InternalSetSuppressAllExceptions();
					}
					else
					{
						instruction.InternalRoundingControl = decoder.state.vectorLength + 1;
					}
				}
				return;
			}
			instruction.Op2Kind = OpKind.Memory;
			if ((decoder.state.zs.flags & StateFlags.b) != 0)
			{
				if (canBroadcast)
				{
					instruction.InternalSetIsBroadcast();
				}
				else if (decoder.invalidCheckMask != 0)
				{
					decoder.SetInvalidInstruction();
				}
			}
			decoder.ReadOpMem(ref instruction, tupleType);
		}
	}
	internal sealed class OpCodeHandler_EVEX_VkHW_er_ur : OpCodeHandlerModRM
	{
		private readonly Register baseReg;

		private readonly Code code;

		private readonly TupleType tupleType;

		private readonly bool canBroadcast;

		public OpCodeHandler_EVEX_VkHW_er_ur(Register baseReg, Code code, TupleType tupleType, bool canBroadcast)
		{
			this.baseReg = baseReg;
			this.code = code;
			this.tupleType = tupleType;
			this.canBroadcast = canBroadcast;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			instruction.InternalSetCodeNoCheck(code);
			int num = (int)(decoder.state.reg + decoder.state.zs.extraRegisterBase + decoder.state.extraRegisterBaseEVEX);
			instruction.Op0Register = num + baseReg;
			instruction.Op1Register = (Register)((int)decoder.state.vvvv + (int)baseReg);
			if (decoder.state.mod == 3)
			{
				int num2 = (int)(decoder.state.rm + decoder.state.extraBaseRegisterBaseEVEX);
				instruction.Op2Register = num2 + baseReg;
				if (decoder.invalidCheckMask != 0 && (num == (int)decoder.state.vvvv || num == num2))
				{
					decoder.SetInvalidInstruction();
				}
				if ((decoder.state.zs.flags & StateFlags.b) != 0)
				{
					instruction.InternalRoundingControl = decoder.state.vectorLength + 1;
				}
				return;
			}
			if (decoder.invalidCheckMask != 0 && num == (int)decoder.state.vvvv)
			{
				decoder.SetInvalidInstruction();
			}
			instruction.Op2Kind = OpKind.Memory;
			if ((decoder.state.zs.flags & StateFlags.b) != 0)
			{
				if (canBroadcast)
				{
					instruction.InternalSetIsBroadcast();
				}
				else if (decoder.invalidCheckMask != 0)
				{
					decoder.SetInvalidInstruction();
				}
			}
			decoder.ReadOpMem(ref instruction, tupleType);
		}
	}
	internal sealed class OpCodeHandler_EVEX_VkW_er : OpCodeHandlerModRM
	{
		private readonly Register baseReg1;

		private readonly Register baseReg2;

		private readonly Code code;

		private readonly TupleType tupleType;

		private readonly bool onlySAE;

		private readonly bool canBroadcast;

		public OpCodeHandler_EVEX_VkW_er(Register baseReg, Code code, TupleType tupleType, bool onlySAE)
		{
			baseReg1 = baseReg;
			baseReg2 = baseReg;
			this.code = code;
			this.tupleType = tupleType;
			this.onlySAE = onlySAE;
			canBroadcast = true;
		}

		public OpCodeHandler_EVEX_VkW_er(Register baseReg1, Register baseReg2, Code code, TupleType tupleType, bool onlySAE)
		{
			this.baseReg1 = baseReg1;
			this.baseReg2 = baseReg2;
			this.code = code;
			this.tupleType = tupleType;
			this.onlySAE = onlySAE;
			canBroadcast = true;
		}

		public OpCodeHandler_EVEX_VkW_er(Register baseReg1, Register baseReg2, Code code, TupleType tupleType, bool onlySAE, bool canBroadcast)
		{
			this.baseReg1 = baseReg1;
			this.baseReg2 = baseReg2;
			this.code = code;
			this.tupleType = tupleType;
			this.onlySAE = onlySAE;
			this.canBroadcast = canBroadcast;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if ((decoder.state.vvvv_invalidCheck & decoder.invalidCheckMask) != 0)
			{
				decoder.SetInvalidInstruction();
			}
			instruction.InternalSetCodeNoCheck(code);
			instruction.Op0Register = (Register)((int)(decoder.state.reg + decoder.state.zs.extraRegisterBase + decoder.state.extraRegisterBaseEVEX) + (int)baseReg1);
			if (decoder.state.mod == 3)
			{
				instruction.Op1Register = (Register)((int)(decoder.state.rm + decoder.state.extraBaseRegisterBaseEVEX) + (int)baseReg2);
				if ((decoder.state.zs.flags & StateFlags.b) != 0)
				{
					if (onlySAE)
					{
						instruction.InternalSetSuppressAllExceptions();
					}
					else
					{
						instruction.InternalRoundingControl = decoder.state.vectorLength + 1;
					}
				}
				return;
			}
			instruction.Op1Kind = OpKind.Memory;
			if ((decoder.state.zs.flags & StateFlags.b) != 0)
			{
				if (canBroadcast)
				{
					instruction.InternalSetIsBroadcast();
				}
				else if (decoder.invalidCheckMask != 0)
				{
					decoder.SetInvalidInstruction();
				}
			}
			decoder.ReadOpMem(ref instruction, tupleType);
		}
	}
	internal sealed class OpCodeHandler_EVEX_VkWIb_er : OpCodeHandlerModRM
	{
		private readonly Register baseReg1;

		private readonly Register baseReg2;

		private readonly Code code;

		private readonly TupleType tupleType;

		public OpCodeHandler_EVEX_VkWIb_er(Register baseReg, Code code, TupleType tupleType)
		{
			baseReg1 = baseReg;
			baseReg2 = baseReg;
			this.code = code;
			this.tupleType = tupleType;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if ((decoder.state.vvvv_invalidCheck & decoder.invalidCheckMask) != 0)
			{
				decoder.SetInvalidInstruction();
			}
			instruction.InternalSetCodeNoCheck(code);
			instruction.Op0Register = (Register)((int)(decoder.state.reg + decoder.state.zs.extraRegisterBase + decoder.state.extraRegisterBaseEVEX) + (int)baseReg1);
			if (decoder.state.mod == 3)
			{
				instruction.Op1Register = (Register)((int)(decoder.state.rm + decoder.state.extraBaseRegisterBaseEVEX) + (int)baseReg2);
				if ((decoder.state.zs.flags & StateFlags.b) != 0)
				{
					instruction.InternalSetSuppressAllExceptions();
				}
			}
			else
			{
				instruction.Op1Kind = OpKind.Memory;
				if ((decoder.state.zs.flags & StateFlags.b) != 0)
				{
					instruction.InternalSetIsBroadcast();
				}
				decoder.ReadOpMem(ref instruction, tupleType);
			}
			instruction.Op2Kind = OpKind.Immediate8;
			instruction.InternalImmediate8 = decoder.ReadByte();
		}
	}
	internal sealed class OpCodeHandler_EVEX_VkW : OpCodeHandlerModRM
	{
		private readonly Register baseReg1;

		private readonly Register baseReg2;

		private readonly Code code;

		private readonly TupleType tupleType;

		private readonly bool canBroadcast;

		public OpCodeHandler_EVEX_VkW(Register baseReg, Code code, TupleType tupleType, bool canBroadcast)
		{
			baseReg1 = baseReg;
			baseReg2 = baseReg;
			this.code = code;
			this.tupleType = tupleType;
			this.canBroadcast = canBroadcast;
		}

		public OpCodeHandler_EVEX_VkW(Register baseReg1, Register baseReg2, Code code, TupleType tupleType, bool canBroadcast)
		{
			this.baseReg1 = baseReg1;
			this.baseReg2 = baseReg2;
			this.code = code;
			this.tupleType = tupleType;
			this.canBroadcast = canBroadcast;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if ((decoder.state.vvvv_invalidCheck & decoder.invalidCheckMask) != 0)
			{
				decoder.SetInvalidInstruction();
			}
			instruction.InternalSetCodeNoCheck(code);
			instruction.Op0Register = (Register)((int)(decoder.state.reg + decoder.state.zs.extraRegisterBase + decoder.state.extraRegisterBaseEVEX) + (int)baseReg1);
			if (decoder.state.mod == 3)
			{
				instruction.Op1Register = (Register)((int)(decoder.state.rm + decoder.state.extraBaseRegisterBaseEVEX) + (int)baseReg2);
				if (((uint)(decoder.state.zs.flags & StateFlags.b) & decoder.invalidCheckMask) != 0)
				{
					decoder.SetInvalidInstruction();
				}
				return;
			}
			instruction.Op1Kind = OpKind.Memory;
			if ((decoder.state.zs.flags & StateFlags.b) != 0)
			{
				if (canBroadcast)
				{
					instruction.InternalSetIsBroadcast();
				}
				else if (decoder.invalidCheckMask != 0)
				{
					decoder.SetInvalidInstruction();
				}
			}
			decoder.ReadOpMem(ref instruction, tupleType);
		}
	}
	internal sealed class OpCodeHandler_EVEX_WkV : OpCodeHandlerModRM
	{
		private readonly Register baseReg1;

		private readonly Register baseReg2;

		private readonly Code code;

		private readonly TupleType tupleType;

		private readonly uint disallowZeroingMasking;

		public OpCodeHandler_EVEX_WkV(Register baseReg, Code code, TupleType tupleType)
		{
			baseReg1 = baseReg;
			baseReg2 = baseReg;
			this.code = code;
			this.tupleType = tupleType;
			disallowZeroingMasking = 0u;
		}

		public OpCodeHandler_EVEX_WkV(Register baseReg, Code code, TupleType tupleType, bool allowZeroingMasking)
		{
			baseReg1 = baseReg;
			baseReg2 = baseReg;
			this.code = code;
			this.tupleType = tupleType;
			disallowZeroingMasking = ((!allowZeroingMasking) ? uint.MaxValue : 0u);
		}

		public OpCodeHandler_EVEX_WkV(Register baseReg1, Register baseReg2, Code code, TupleType tupleType)
		{
			this.baseReg1 = baseReg1;
			this.baseReg2 = baseReg2;
			this.code = code;
			this.tupleType = tupleType;
			disallowZeroingMasking = 0u;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if ((((uint)(decoder.state.zs.flags & StateFlags.b) | decoder.state.vvvv_invalidCheck) & decoder.invalidCheckMask) != 0)
			{
				decoder.SetInvalidInstruction();
			}
			instruction.InternalSetCodeNoCheck(code);
			instruction.Op1Register = (Register)((int)(decoder.state.reg + decoder.state.zs.extraRegisterBase + decoder.state.extraRegisterBaseEVEX) + (int)baseReg2);
			if (((uint)(decoder.state.zs.flags & StateFlags.z) & disallowZeroingMasking & decoder.invalidCheckMask) != 0)
			{
				decoder.SetInvalidInstruction();
			}
			if (decoder.state.mod == 3)
			{
				instruction.Op0Register = (Register)((int)(decoder.state.rm + decoder.state.extraBaseRegisterBaseEVEX) + (int)baseReg1);
				return;
			}
			instruction.Op0Kind = OpKind.Memory;
			if (((uint)(decoder.state.zs.flags & StateFlags.z) & decoder.invalidCheckMask) != 0)
			{
				decoder.SetInvalidInstruction();
			}
			decoder.ReadOpMem(ref instruction, tupleType);
		}
	}
	internal sealed class OpCodeHandler_EVEX_VkM : OpCodeHandlerModRM
	{
		private readonly Register baseReg;

		private readonly Code code;

		private readonly TupleType tupleType;

		public OpCodeHandler_EVEX_VkM(Register baseReg, Code code, TupleType tupleType)
		{
			this.baseReg = baseReg;
			this.code = code;
			this.tupleType = tupleType;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if ((((uint)(decoder.state.zs.flags & StateFlags.b) | decoder.state.vvvv_invalidCheck) & decoder.invalidCheckMask) != 0)
			{
				decoder.SetInvalidInstruction();
			}
			instruction.InternalSetCodeNoCheck(code);
			instruction.Op0Register = (Register)((int)(decoder.state.reg + decoder.state.zs.extraRegisterBase + decoder.state.extraRegisterBaseEVEX) + (int)baseReg);
			if (decoder.state.mod == 3)
			{
				decoder.SetInvalidInstruction();
				return;
			}
			instruction.Op1Kind = OpKind.Memory;
			decoder.ReadOpMem(ref instruction, tupleType);
		}
	}
	internal sealed class OpCodeHandler_EVEX_VkWIb : OpCodeHandlerModRM
	{
		private readonly Register baseReg1;

		private readonly Register baseReg2;

		private readonly Code code;

		private readonly TupleType tupleType;

		private readonly bool canBroadcast;

		public OpCodeHandler_EVEX_VkWIb(Register baseReg, Code code, TupleType tupleType, bool canBroadcast)
		{
			baseReg1 = baseReg;
			baseReg2 = baseReg;
			this.code = code;
			this.tupleType = tupleType;
			this.canBroadcast = canBroadcast;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if ((decoder.state.vvvv_invalidCheck & decoder.invalidCheckMask) != 0)
			{
				decoder.SetInvalidInstruction();
			}
			instruction.InternalSetCodeNoCheck(code);
			instruction.Op0Register = (Register)((int)(decoder.state.reg + decoder.state.zs.extraRegisterBase + decoder.state.extraRegisterBaseEVEX) + (int)baseReg1);
			if (decoder.state.mod == 3)
			{
				instruction.Op1Register = (Register)((int)(decoder.state.rm + decoder.state.extraBaseRegisterBaseEVEX) + (int)baseReg2);
				if (((uint)(decoder.state.zs.flags & StateFlags.b) & decoder.invalidCheckMask) != 0)
				{
					decoder.SetInvalidInstruction();
				}
			}
			else
			{
				instruction.Op1Kind = OpKind.Memory;
				if ((decoder.state.zs.flags & StateFlags.b) != 0)
				{
					if (canBroadcast)
					{
						instruction.InternalSetIsBroadcast();
					}
					else if (decoder.invalidCheckMask != 0)
					{
						decoder.SetInvalidInstruction();
					}
				}
				decoder.ReadOpMem(ref instruction, tupleType);
			}
			instruction.Op2Kind = OpKind.Immediate8;
			instruction.InternalImmediate8 = decoder.ReadByte();
		}
	}
	internal sealed class OpCodeHandler_EVEX_WkVIb : OpCodeHandlerModRM
	{
		private readonly Register baseReg1;

		private readonly Register baseReg2;

		private readonly Code code;

		private readonly TupleType tupleType;

		public OpCodeHandler_EVEX_WkVIb(Register baseReg1, Register baseReg2, Code code, TupleType tupleType)
		{
			this.baseReg1 = baseReg1;
			this.baseReg2 = baseReg2;
			this.code = code;
			this.tupleType = tupleType;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if ((((uint)(decoder.state.zs.flags & StateFlags.b) | decoder.state.vvvv_invalidCheck) & decoder.invalidCheckMask) != 0)
			{
				decoder.SetInvalidInstruction();
			}
			instruction.InternalSetCodeNoCheck(code);
			if (decoder.state.mod == 3)
			{
				instruction.Op0Register = (Register)((int)(decoder.state.rm + decoder.state.extraBaseRegisterBaseEVEX) + (int)baseReg1);
			}
			else
			{
				instruction.Op0Kind = OpKind.Memory;
				if (((uint)(decoder.state.zs.flags & StateFlags.z) & decoder.invalidCheckMask) != 0)
				{
					decoder.SetInvalidInstruction();
				}
				decoder.ReadOpMem(ref instruction, tupleType);
			}
			instruction.Op1Register = (Register)((int)(decoder.state.reg + decoder.state.zs.extraRegisterBase + decoder.state.extraRegisterBaseEVEX) + (int)baseReg2);
			instruction.Op2Kind = OpKind.Immediate8;
			instruction.InternalImmediate8 = decoder.ReadByte();
		}
	}
	internal sealed class OpCodeHandler_EVEX_HkWIb : OpCodeHandlerModRM
	{
		private readonly Register baseReg1;

		private readonly Register baseReg2;

		private readonly Code code;

		private readonly TupleType tupleType;

		private readonly bool canBroadcast;

		public OpCodeHandler_EVEX_HkWIb(Register baseReg, Code code, TupleType tupleType, bool canBroadcast)
		{
			baseReg1 = baseReg;
			baseReg2 = baseReg;
			this.code = code;
			this.tupleType = tupleType;
			this.canBroadcast = canBroadcast;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			instruction.InternalSetCodeNoCheck(code);
			instruction.Op0Register = (Register)((int)decoder.state.vvvv + (int)baseReg1);
			if (decoder.state.mod == 3)
			{
				instruction.Op1Register = (Register)((int)(decoder.state.rm + decoder.state.extraBaseRegisterBaseEVEX) + (int)baseReg2);
				if (((uint)(decoder.state.zs.flags & StateFlags.b) & decoder.invalidCheckMask) != 0)
				{
					decoder.SetInvalidInstruction();
				}
			}
			else
			{
				instruction.Op1Kind = OpKind.Memory;
				if ((decoder.state.zs.flags & StateFlags.b) != 0)
				{
					if (canBroadcast)
					{
						instruction.InternalSetIsBroadcast();
					}
					else if (decoder.invalidCheckMask != 0)
					{
						decoder.SetInvalidInstruction();
					}
				}
				decoder.ReadOpMem(ref instruction, tupleType);
			}
			instruction.Op2Kind = OpKind.Immediate8;
			instruction.InternalImmediate8 = decoder.ReadByte();
		}
	}
	internal sealed class OpCodeHandler_EVEX_HWIb : OpCodeHandlerModRM
	{
		private readonly Register baseReg1;

		private readonly Register baseReg2;

		private readonly Code code;

		private readonly TupleType tupleType;

		public OpCodeHandler_EVEX_HWIb(Register baseReg, Code code, TupleType tupleType)
		{
			baseReg1 = baseReg;
			baseReg2 = baseReg;
			this.code = code;
			this.tupleType = tupleType;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			instruction.InternalSetCodeNoCheck(code);
			if ((((uint)(decoder.state.zs.flags & (StateFlags.b | StateFlags.z)) | decoder.state.aaa) & decoder.invalidCheckMask) != 0)
			{
				decoder.SetInvalidInstruction();
			}
			instruction.Op0Register = (Register)((int)decoder.state.vvvv + (int)baseReg1);
			if (decoder.state.mod == 3)
			{
				instruction.Op1Register = (Register)((int)(decoder.state.rm + decoder.state.extraBaseRegisterBaseEVEX) + (int)baseReg2);
				if (((uint)(decoder.state.zs.flags & StateFlags.b) & decoder.invalidCheckMask) != 0)
				{
					decoder.SetInvalidInstruction();
				}
			}
			else
			{
				instruction.Op1Kind = OpKind.Memory;
				decoder.ReadOpMem(ref instruction, tupleType);
			}
			instruction.Op2Kind = OpKind.Immediate8;
			instruction.InternalImmediate8 = decoder.ReadByte();
		}
	}
	internal sealed class OpCodeHandler_EVEX_WkVIb_er : OpCodeHandlerModRM
	{
		private readonly Register baseReg1;

		private readonly Register baseReg2;

		private readonly Code code;

		private readonly TupleType tupleType;

		public OpCodeHandler_EVEX_WkVIb_er(Register baseReg1, Register baseReg2, Code code, TupleType tupleType)
		{
			this.baseReg1 = baseReg1;
			this.baseReg2 = baseReg2;
			this.code = code;
			this.tupleType = tupleType;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if ((decoder.state.vvvv_invalidCheck & decoder.invalidCheckMask) != 0)
			{
				decoder.SetInvalidInstruction();
			}
			instruction.InternalSetCodeNoCheck(code);
			if (decoder.state.mod == 3)
			{
				instruction.Op0Register = (Register)((int)(decoder.state.rm + decoder.state.extraBaseRegisterBaseEVEX) + (int)baseReg1);
				if ((decoder.state.zs.flags & StateFlags.b) != 0)
				{
					instruction.InternalSetSuppressAllExceptions();
				}
			}
			else
			{
				instruction.Op0Kind = OpKind.Memory;
				if (((uint)(decoder.state.zs.flags & (StateFlags.b | StateFlags.z)) & decoder.invalidCheckMask) != 0)
				{
					decoder.SetInvalidInstruction();
				}
				decoder.ReadOpMem(ref instruction, tupleType);
			}
			instruction.Op1Register = (Register)((int)(decoder.state.reg + decoder.state.zs.extraRegisterBase + decoder.state.extraRegisterBaseEVEX) + (int)baseReg2);
			instruction.Op2Kind = OpKind.Immediate8;
			instruction.InternalImmediate8 = decoder.ReadByte();
		}
	}
	internal sealed class OpCodeHandler_EVEX_VW_er : OpCodeHandlerModRM
	{
		private readonly Register baseReg1;

		private readonly Register baseReg2;

		private readonly Code code;

		private readonly TupleType tupleType;

		public OpCodeHandler_EVEX_VW_er(Register baseReg, Code code, TupleType tupleType)
		{
			baseReg1 = baseReg;
			baseReg2 = baseReg;
			this.code = code;
			this.tupleType = tupleType;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			instruction.InternalSetCodeNoCheck(code);
			instruction.Op0Register = (Register)((int)(decoder.state.reg + decoder.state.zs.extraRegisterBase + decoder.state.extraRegisterBaseEVEX) + (int)baseReg1);
			if ((((uint)(decoder.state.zs.flags & StateFlags.z) | decoder.state.vvvv_invalidCheck | decoder.state.aaa) & decoder.invalidCheckMask) != 0)
			{
				decoder.SetInvalidInstruction();
			}
			if (decoder.state.mod == 3)
			{
				instruction.Op1Register = (Register)((int)(decoder.state.rm + decoder.state.extraBaseRegisterBaseEVEX) + (int)baseReg2);
				if ((decoder.state.zs.flags & StateFlags.b) != 0)
				{
					instruction.InternalSetSuppressAllExceptions();
				}
				return;
			}
			instruction.Op1Kind = OpKind.Memory;
			if (((uint)(decoder.state.zs.flags & StateFlags.b) & decoder.invalidCheckMask) != 0)
			{
				decoder.SetInvalidInstruction();
			}
			decoder.ReadOpMem(ref instruction, tupleType);
		}
	}
	internal sealed class OpCodeHandler_EVEX_VW : OpCodeHandlerModRM
	{
		private readonly Register baseReg1;

		private readonly Register baseReg2;

		private readonly Code code;

		private readonly TupleType tupleType;

		public OpCodeHandler_EVEX_VW(Register baseReg, Code code, TupleType tupleType)
		{
			baseReg1 = baseReg;
			baseReg2 = baseReg;
			this.code = code;
			this.tupleType = tupleType;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if ((((uint)(decoder.state.zs.flags & (StateFlags.b | StateFlags.z)) | decoder.state.vvvv_invalidCheck | decoder.state.aaa) & decoder.invalidCheckMask) != 0)
			{
				decoder.SetInvalidInstruction();
			}
			instruction.InternalSetCodeNoCheck(code);
			instruction.Op0Register = (Register)((int)(decoder.state.reg + decoder.state.zs.extraRegisterBase + decoder.state.extraRegisterBaseEVEX) + (int)baseReg1);
			if (decoder.state.mod == 3)
			{
				instruction.Op1Register = (Register)((int)(decoder.state.rm + decoder.state.extraBaseRegisterBaseEVEX) + (int)baseReg2);
				if (((uint)(decoder.state.zs.flags & StateFlags.b) & decoder.invalidCheckMask) != 0)
				{
					decoder.SetInvalidInstruction();
				}
			}
			else
			{
				instruction.Op1Kind = OpKind.Memory;
				decoder.ReadOpMem(ref instruction, tupleType);
			}
		}
	}
	internal sealed class OpCodeHandler_EVEX_WV : OpCodeHandlerModRM
	{
		private readonly Register baseReg1;

		private readonly Register baseReg2;

		private readonly Code code;

		private readonly TupleType tupleType;

		public OpCodeHandler_EVEX_WV(Register baseReg, Code code, TupleType tupleType)
		{
			baseReg1 = baseReg;
			baseReg2 = baseReg;
			this.code = code;
			this.tupleType = tupleType;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if ((((uint)(decoder.state.zs.flags & (StateFlags.b | StateFlags.z)) | decoder.state.vvvv_invalidCheck | decoder.state.aaa) & decoder.invalidCheckMask) != 0)
			{
				decoder.SetInvalidInstruction();
			}
			instruction.InternalSetCodeNoCheck(code);
			instruction.Op1Register = (Register)((int)(decoder.state.reg + decoder.state.zs.extraRegisterBase + decoder.state.extraRegisterBaseEVEX) + (int)baseReg1);
			if (decoder.state.mod == 3)
			{
				instruction.Op0Register = (Register)((int)(decoder.state.rm + decoder.state.extraBaseRegisterBaseEVEX) + (int)baseReg2);
				if (((uint)(decoder.state.zs.flags & StateFlags.b) & decoder.invalidCheckMask) != 0)
				{
					decoder.SetInvalidInstruction();
				}
			}
			else
			{
				instruction.Op0Kind = OpKind.Memory;
				decoder.ReadOpMem(ref instruction, tupleType);
			}
		}
	}
	internal sealed class OpCodeHandler_EVEX_VM : OpCodeHandlerModRM
	{
		private readonly Register baseReg;

		private readonly Code code;

		private readonly TupleType tupleType;

		public OpCodeHandler_EVEX_VM(Register baseReg, Code code, TupleType tupleType)
		{
			this.baseReg = baseReg;
			this.code = code;
			this.tupleType = tupleType;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if ((((uint)(decoder.state.zs.flags & (StateFlags.b | StateFlags.z)) | decoder.state.vvvv_invalidCheck | decoder.state.aaa) & decoder.invalidCheckMask) != 0)
			{
				decoder.SetInvalidInstruction();
			}
			instruction.InternalSetCodeNoCheck(code);
			instruction.Op0Register = (Register)((int)(decoder.state.reg + decoder.state.zs.extraRegisterBase + decoder.state.extraRegisterBaseEVEX) + (int)baseReg);
			if (decoder.state.mod == 3)
			{
				decoder.SetInvalidInstruction();
				return;
			}
			instruction.Op1Kind = OpKind.Memory;
			decoder.ReadOpMem(ref instruction, tupleType);
		}
	}
	internal sealed class OpCodeHandler_EVEX_VK : OpCodeHandlerModRM
	{
		private readonly Register baseReg;

		private readonly Code code;

		public OpCodeHandler_EVEX_VK(Register baseReg, Code code)
		{
			this.baseReg = baseReg;
			this.code = code;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if ((((uint)(decoder.state.zs.flags & (StateFlags.b | StateFlags.z)) | decoder.state.vvvv_invalidCheck | decoder.state.aaa) & decoder.invalidCheckMask) != 0)
			{
				decoder.SetInvalidInstruction();
			}
			instruction.InternalSetCodeNoCheck(code);
			instruction.Op0Register = (Register)((int)(decoder.state.reg + decoder.state.zs.extraRegisterBase + decoder.state.extraRegisterBaseEVEX) + (int)baseReg);
			if (decoder.state.mod == 3)
			{
				instruction.Op1Register = (Register)(decoder.state.rm + 173);
			}
			else
			{
				decoder.SetInvalidInstruction();
			}
		}
	}
	internal sealed class OpCodeHandler_EVEX_KR : OpCodeHandlerModRM
	{
		private readonly Register baseReg;

		private readonly Code code;

		public OpCodeHandler_EVEX_KR(Register baseReg, Code code)
		{
			this.baseReg = baseReg;
			this.code = code;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if ((((uint)(decoder.state.zs.flags & (StateFlags.b | StateFlags.z)) | decoder.state.vvvv_invalidCheck | decoder.state.aaa | decoder.state.zs.extraRegisterBase | decoder.state.extraRegisterBaseEVEX) & decoder.invalidCheckMask) != 0)
			{
				decoder.SetInvalidInstruction();
			}
			instruction.InternalSetCodeNoCheck(code);
			instruction.Op0Register = (Register)(decoder.state.reg + 173);
			if (decoder.state.mod == 3)
			{
				instruction.Op1Register = (Register)((int)(decoder.state.rm + decoder.state.extraBaseRegisterBaseEVEX) + (int)baseReg);
			}
			else
			{
				decoder.SetInvalidInstruction();
			}
		}
	}
	internal sealed class OpCodeHandler_EVEX_KkHWIb_sae : OpCodeHandlerModRM
	{
		private readonly Register baseReg;

		private readonly Code code;

		private readonly TupleType tupleType;

		private readonly bool canBroadcast;

		public OpCodeHandler_EVEX_KkHWIb_sae(Register baseReg, Code code, TupleType tupleType, bool canBroadcast)
		{
			this.baseReg = baseReg;
			this.code = code;
			this.tupleType = tupleType;
			this.canBroadcast = canBroadcast;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if ((((uint)(decoder.state.zs.flags & StateFlags.z) | decoder.state.zs.extraRegisterBase | decoder.state.extraRegisterBaseEVEX) & decoder.invalidCheckMask) != 0)
			{
				decoder.SetInvalidInstruction();
			}
			instruction.InternalSetCodeNoCheck(code);
			instruction.Op0Register = (Register)(decoder.state.reg + 173);
			instruction.Op1Register = (Register)((int)decoder.state.vvvv + (int)baseReg);
			if (decoder.state.mod == 3)
			{
				instruction.Op2Register = (Register)((int)(decoder.state.rm + decoder.state.extraBaseRegisterBaseEVEX) + (int)baseReg);
				if ((decoder.state.zs.flags & StateFlags.b) != 0)
				{
					instruction.InternalSetSuppressAllExceptions();
				}
			}
			else
			{
				instruction.Op2Kind = OpKind.Memory;
				if ((decoder.state.zs.flags & StateFlags.b) != 0)
				{
					if (canBroadcast)
					{
						instruction.InternalSetIsBroadcast();
					}
					else if (decoder.invalidCheckMask != 0)
					{
						decoder.SetInvalidInstruction();
					}
				}
				decoder.ReadOpMem(ref instruction, tupleType);
			}
			instruction.Op3Kind = OpKind.Immediate8;
			instruction.InternalImmediate8 = decoder.ReadByte();
		}
	}
	internal sealed class OpCodeHandler_EVEX_VkHW : OpCodeHandlerModRM
	{
		private readonly Register baseReg1;

		private readonly Register baseReg2;

		private readonly Register baseReg3;

		private readonly Code code;

		private readonly TupleType tupleType;

		private readonly bool canBroadcast;

		public OpCodeHandler_EVEX_VkHW(Register baseReg, Code code, TupleType tupleType, bool canBroadcast)
		{
			baseReg1 = baseReg;
			baseReg2 = baseReg;
			baseReg3 = baseReg;
			this.code = code;
			this.tupleType = tupleType;
			this.canBroadcast = canBroadcast;
		}

		public OpCodeHandler_EVEX_VkHW(Register baseReg1, Register baseReg2, Register baseReg3, Code code, TupleType tupleType, bool canBroadcast)
		{
			this.baseReg1 = baseReg1;
			this.baseReg2 = baseReg2;
			this.baseReg3 = baseReg3;
			this.code = code;
			this.tupleType = tupleType;
			this.canBroadcast = canBroadcast;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			instruction.InternalSetCodeNoCheck(code);
			instruction.Op0Register = (Register)((int)(decoder.state.reg + decoder.state.zs.extraRegisterBase + decoder.state.extraRegisterBaseEVEX) + (int)baseReg1);
			instruction.Op1Register = (Register)((int)decoder.state.vvvv + (int)baseReg2);
			if (decoder.state.mod == 3)
			{
				instruction.Op2Register = (Register)((int)(decoder.state.rm + decoder.state.extraBaseRegisterBaseEVEX) + (int)baseReg3);
				if (((uint)(decoder.state.zs.flags & StateFlags.b) & decoder.invalidCheckMask) != 0)
				{
					decoder.SetInvalidInstruction();
				}
				return;
			}
			instruction.Op2Kind = OpKind.Memory;
			if ((decoder.state.zs.flags & StateFlags.b) != 0)
			{
				if (canBroadcast)
				{
					instruction.InternalSetIsBroadcast();
				}
				else if (decoder.invalidCheckMask != 0)
				{
					decoder.SetInvalidInstruction();
				}
			}
			decoder.ReadOpMem(ref instruction, tupleType);
		}
	}
	internal sealed class OpCodeHandler_EVEX_VkHM : OpCodeHandlerModRM
	{
		private readonly Register baseReg1;

		private readonly Register baseReg2;

		private readonly Code code;

		private readonly TupleType tupleType;

		public OpCodeHandler_EVEX_VkHM(Register baseReg, Code code, TupleType tupleType)
		{
			baseReg1 = baseReg;
			baseReg2 = baseReg;
			this.code = code;
			this.tupleType = tupleType;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			instruction.InternalSetCodeNoCheck(code);
			instruction.Op0Register = (Register)((int)(decoder.state.reg + decoder.state.zs.extraRegisterBase + decoder.state.extraRegisterBaseEVEX) + (int)baseReg1);
			instruction.Op1Register = (Register)((int)decoder.state.vvvv + (int)baseReg2);
			if (decoder.state.mod == 3)
			{
				decoder.SetInvalidInstruction();
				return;
			}
			instruction.Op2Kind = OpKind.Memory;
			if (((uint)(decoder.state.zs.flags & StateFlags.b) & decoder.invalidCheckMask) != 0)
			{
				decoder.SetInvalidInstruction();
			}
			decoder.ReadOpMem(ref instruction, tupleType);
		}
	}
	internal sealed class OpCodeHandler_EVEX_VkHWIb : OpCodeHandlerModRM
	{
		private readonly Register baseReg1;

		private readonly Register baseReg2;

		private readonly Register baseReg3;

		private readonly Code code;

		private readonly TupleType tupleType;

		private readonly bool canBroadcast;

		public OpCodeHandler_EVEX_VkHWIb(Register baseReg, Code code, TupleType tupleType, bool canBroadcast)
		{
			baseReg1 = baseReg;
			baseReg2 = baseReg;
			baseReg3 = baseReg;
			this.code = code;
			this.tupleType = tupleType;
			this.canBroadcast = canBroadcast;
		}

		public OpCodeHandler_EVEX_VkHWIb(Register baseReg1, Register baseReg2, Register baseReg3, Code code, TupleType tupleType, bool canBroadcast)
		{
			this.baseReg1 = baseReg1;
			this.baseReg2 = baseReg2;
			this.baseReg3 = baseReg3;
			this.code = code;
			this.tupleType = tupleType;
			this.canBroadcast = canBroadcast;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			instruction.InternalSetCodeNoCheck(code);
			instruction.Op0Register = (Register)((int)(decoder.state.reg + decoder.state.zs.extraRegisterBase + decoder.state.extraRegisterBaseEVEX) + (int)baseReg1);
			instruction.Op1Register = (Register)((int)decoder.state.vvvv + (int)baseReg2);
			if (decoder.state.mod == 3)
			{
				instruction.Op2Register = (Register)((int)(decoder.state.rm + decoder.state.extraBaseRegisterBaseEVEX) + (int)baseReg3);
				if (((uint)(decoder.state.zs.flags & StateFlags.b) & decoder.invalidCheckMask) != 0)
				{
					decoder.SetInvalidInstruction();
				}
			}
			else
			{
				instruction.Op2Kind = OpKind.Memory;
				if ((decoder.state.zs.flags & StateFlags.b) != 0)
				{
					if (canBroadcast)
					{
						instruction.InternalSetIsBroadcast();
					}
					else if (decoder.invalidCheckMask != 0)
					{
						decoder.SetInvalidInstruction();
					}
				}
				decoder.ReadOpMem(ref instruction, tupleType);
			}
			instruction.Op3Kind = OpKind.Immediate8;
			instruction.InternalImmediate8 = decoder.ReadByte();
		}
	}
	internal sealed class OpCodeHandler_EVEX_VkHWIb_er : OpCodeHandlerModRM
	{
		private readonly Register baseReg1;

		private readonly Register baseReg2;

		private readonly Register baseReg3;

		private readonly Code code;

		private readonly TupleType tupleType;

		private readonly bool canBroadcast;

		public OpCodeHandler_EVEX_VkHWIb_er(Register baseReg, Code code, TupleType tupleType, bool canBroadcast)
		{
			baseReg1 = baseReg;
			baseReg2 = baseReg;
			baseReg3 = baseReg;
			this.code = code;
			this.tupleType = tupleType;
			this.canBroadcast = canBroadcast;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			instruction.InternalSetCodeNoCheck(code);
			instruction.Op0Register = (Register)((int)(decoder.state.reg + decoder.state.zs.extraRegisterBase + decoder.state.extraRegisterBaseEVEX) + (int)baseReg1);
			instruction.Op1Register = (Register)((int)decoder.state.vvvv + (int)baseReg2);
			if (decoder.state.mod == 3)
			{
				instruction.Op2Register = (Register)((int)(decoder.state.rm + decoder.state.extraBaseRegisterBaseEVEX) + (int)baseReg3);
				if ((decoder.state.zs.flags & StateFlags.b) != 0)
				{
					instruction.InternalSetSuppressAllExceptions();
				}
			}
			else
			{
				instruction.Op2Kind = OpKind.Memory;
				if ((decoder.state.zs.flags & StateFlags.b) != 0)
				{
					if (canBroadcast)
					{
						instruction.InternalSetIsBroadcast();
					}
					else if (decoder.invalidCheckMask != 0)
					{
						decoder.SetInvalidInstruction();
					}
				}
				decoder.ReadOpMem(ref instruction, tupleType);
			}
			instruction.Op3Kind = OpKind.Immediate8;
			instruction.InternalImmediate8 = decoder.ReadByte();
		}
	}
	internal sealed class OpCodeHandler_EVEX_KkHW : OpCodeHandlerModRM
	{
		private readonly Register baseReg;

		private readonly Code code;

		private readonly TupleType tupleType;

		private readonly bool canBroadcast;

		public OpCodeHandler_EVEX_KkHW(Register baseReg, Code code, TupleType tupleType, bool canBroadcast)
		{
			this.baseReg = baseReg;
			this.code = code;
			this.tupleType = tupleType;
			this.canBroadcast = canBroadcast;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			instruction.InternalSetCodeNoCheck(code);
			instruction.Op0Register = (Register)(decoder.state.reg + 173);
			instruction.Op1Register = (Register)((int)decoder.state.vvvv + (int)baseReg);
			if ((((uint)(decoder.state.zs.flags & StateFlags.z) | decoder.state.zs.extraRegisterBase | decoder.state.extraRegisterBaseEVEX) & decoder.invalidCheckMask) != 0)
			{
				decoder.SetInvalidInstruction();
			}
			if (decoder.state.mod == 3)
			{
				instruction.Op2Register = (Register)((int)(decoder.state.rm + decoder.state.extraBaseRegisterBaseEVEX) + (int)baseReg);
				if (((uint)(decoder.state.zs.flags & StateFlags.b) & decoder.invalidCheckMask) != 0)
				{
					decoder.SetInvalidInstruction();
				}
				return;
			}
			instruction.Op2Kind = OpKind.Memory;
			if ((decoder.state.zs.flags & StateFlags.b) != 0)
			{
				if (canBroadcast)
				{
					instruction.InternalSetIsBroadcast();
				}
				else if (decoder.invalidCheckMask != 0)
				{
					decoder.SetInvalidInstruction();
				}
			}
			decoder.ReadOpMem(ref instruction, tupleType);
		}
	}
	internal sealed class OpCodeHandler_EVEX_KP1HW : OpCodeHandlerModRM
	{
		private readonly Register baseReg;

		private readonly Code code;

		private readonly TupleType tupleType;

		public OpCodeHandler_EVEX_KP1HW(Register baseReg, Code code, TupleType tupleType)
		{
			this.baseReg = baseReg;
			this.code = code;
			this.tupleType = tupleType;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			instruction.InternalSetCodeNoCheck(code);
			instruction.Op0Register = (Register)(decoder.state.reg + 173);
			instruction.Op1Register = (Register)((int)decoder.state.vvvv + (int)baseReg);
			if ((((uint)(decoder.state.zs.flags & StateFlags.z) | decoder.state.aaa | decoder.state.zs.extraRegisterBase | decoder.state.extraRegisterBaseEVEX) & decoder.invalidCheckMask) != 0)
			{
				decoder.SetInvalidInstruction();
			}
			if (decoder.state.mod == 3)
			{
				instruction.Op2Register = (Register)((int)(decoder.state.rm + decoder.state.extraBaseRegisterBaseEVEX) + (int)baseReg);
				if (((uint)(decoder.state.zs.flags & StateFlags.b) & decoder.invalidCheckMask) != 0)
				{
					decoder.SetInvalidInstruction();
				}
				return;
			}
			instruction.Op2Kind = OpKind.Memory;
			if ((decoder.state.zs.flags & StateFlags.b) != 0)
			{
				instruction.InternalSetIsBroadcast();
			}
			decoder.ReadOpMem(ref instruction, tupleType);
		}
	}
	internal sealed class OpCodeHandler_EVEX_KkHWIb : OpCodeHandlerModRM
	{
		private readonly Register baseReg;

		private readonly Code code;

		private readonly TupleType tupleType;

		private readonly bool canBroadcast;

		public OpCodeHandler_EVEX_KkHWIb(Register baseReg, Code code, TupleType tupleType, bool canBroadcast)
		{
			this.baseReg = baseReg;
			this.code = code;
			this.tupleType = tupleType;
			this.canBroadcast = canBroadcast;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			instruction.InternalSetCodeNoCheck(code);
			instruction.Op0Register = (Register)(decoder.state.reg + 173);
			instruction.Op1Register = (Register)((int)decoder.state.vvvv + (int)baseReg);
			if ((((uint)(decoder.state.zs.flags & StateFlags.z) | decoder.state.zs.extraRegisterBase | decoder.state.extraRegisterBaseEVEX) & decoder.invalidCheckMask) != 0)
			{
				decoder.SetInvalidInstruction();
			}
			if (decoder.state.mod == 3)
			{
				instruction.Op2Register = (Register)((int)(decoder.state.rm + decoder.state.extraBaseRegisterBaseEVEX) + (int)baseReg);
				if (((uint)(decoder.state.zs.flags & StateFlags.b) & decoder.invalidCheckMask) != 0)
				{
					decoder.SetInvalidInstruction();
				}
			}
			else
			{
				instruction.Op2Kind = OpKind.Memory;
				if ((decoder.state.zs.flags & StateFlags.b) != 0)
				{
					if (canBroadcast)
					{
						instruction.InternalSetIsBroadcast();
					}
					else if (decoder.invalidCheckMask != 0)
					{
						decoder.SetInvalidInstruction();
					}
				}
				decoder.ReadOpMem(ref instruction, tupleType);
			}
			instruction.Op3Kind = OpKind.Immediate8;
			instruction.InternalImmediate8 = decoder.ReadByte();
		}
	}
	internal sealed class OpCodeHandler_EVEX_WkHV : OpCodeHandlerModRM
	{
		private readonly Register baseReg;

		private readonly Code code;

		public OpCodeHandler_EVEX_WkHV(Register baseReg, Code code)
		{
			this.baseReg = baseReg;
			this.code = code;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			instruction.InternalSetCodeNoCheck(code);
			instruction.Op0Register = (Register)((int)(decoder.state.rm + decoder.state.extraBaseRegisterBaseEVEX) + (int)baseReg);
			if (((uint)(decoder.state.zs.flags & StateFlags.b) & decoder.invalidCheckMask) != 0)
			{
				decoder.SetInvalidInstruction();
			}
			instruction.Op1Register = (Register)((int)decoder.state.vvvv + (int)baseReg);
			instruction.Op2Register = (Register)((int)(decoder.state.reg + decoder.state.zs.extraRegisterBase + decoder.state.extraRegisterBaseEVEX) + (int)baseReg);
		}
	}
	internal sealed class OpCodeHandler_EVEX_VHWIb : OpCodeHandlerModRM
	{
		private readonly Register baseReg;

		private readonly Code code;

		private readonly TupleType tupleType;

		public OpCodeHandler_EVEX_VHWIb(Register baseReg, Code code, TupleType tupleType)
		{
			this.baseReg = baseReg;
			this.code = code;
			this.tupleType = tupleType;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if ((((uint)(decoder.state.zs.flags & (StateFlags.b | StateFlags.z)) | decoder.state.aaa) & decoder.invalidCheckMask) != 0)
			{
				decoder.SetInvalidInstruction();
			}
			instruction.InternalSetCodeNoCheck(code);
			instruction.Op0Register = (Register)((int)(decoder.state.reg + decoder.state.zs.extraRegisterBase + decoder.state.extraRegisterBaseEVEX) + (int)baseReg);
			instruction.Op1Register = (Register)((int)decoder.state.vvvv + (int)baseReg);
			if (decoder.state.mod == 3)
			{
				instruction.Op2Register = (Register)((int)(decoder.state.rm + decoder.state.extraBaseRegisterBaseEVEX) + (int)baseReg);
			}
			else
			{
				instruction.Op2Kind = OpKind.Memory;
				decoder.ReadOpMem(ref instruction, tupleType);
			}
			instruction.Op3Kind = OpKind.Immediate8;
			instruction.InternalImmediate8 = decoder.ReadByte();
		}
	}
	internal sealed class OpCodeHandler_EVEX_VHW : OpCodeHandlerModRM
	{
		private readonly Register baseReg1;

		private readonly Register baseReg2;

		private readonly Register baseReg3;

		private readonly Code codeR;

		private readonly Code codeM;

		private readonly TupleType tupleType;

		public OpCodeHandler_EVEX_VHW(Register baseReg, Code codeR, Code codeM, TupleType tupleType)
		{
			baseReg1 = baseReg;
			baseReg2 = baseReg;
			baseReg3 = baseReg;
			this.codeR = codeR;
			this.codeM = codeM;
			this.tupleType = tupleType;
		}

		public OpCodeHandler_EVEX_VHW(Register baseReg, Code code, TupleType tupleType)
		{
			baseReg1 = baseReg;
			baseReg2 = baseReg;
			baseReg3 = baseReg;
			codeR = code;
			codeM = code;
			this.tupleType = tupleType;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if ((((uint)(decoder.state.zs.flags & (StateFlags.b | StateFlags.z)) | decoder.state.aaa) & decoder.invalidCheckMask) != 0)
			{
				decoder.SetInvalidInstruction();
			}
			instruction.Op0Register = (Register)((int)(decoder.state.reg + decoder.state.zs.extraRegisterBase + decoder.state.extraRegisterBaseEVEX) + (int)baseReg1);
			instruction.Op1Register = (Register)((int)decoder.state.vvvv + (int)baseReg2);
			if (decoder.state.mod == 3)
			{
				instruction.InternalSetCodeNoCheck(codeR);
				instruction.Op2Register = (Register)((int)(decoder.state.rm + decoder.state.extraBaseRegisterBaseEVEX) + (int)baseReg3);
			}
			else
			{
				instruction.InternalSetCodeNoCheck(codeM);
				instruction.Op2Kind = OpKind.Memory;
				decoder.ReadOpMem(ref instruction, tupleType);
			}
		}
	}
	internal sealed class OpCodeHandler_EVEX_VHM : OpCodeHandlerModRM
	{
		private readonly Register baseReg;

		private readonly Code code;

		private readonly TupleType tupleType;

		public OpCodeHandler_EVEX_VHM(Register baseReg, Code code, TupleType tupleType)
		{
			this.baseReg = baseReg;
			this.code = code;
			this.tupleType = tupleType;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if ((((uint)(decoder.state.zs.flags & (StateFlags.b | StateFlags.z)) | decoder.state.aaa) & decoder.invalidCheckMask) != 0)
			{
				decoder.SetInvalidInstruction();
			}
			instruction.InternalSetCodeNoCheck(code);
			instruction.Op0Register = (Register)((int)(decoder.state.reg + decoder.state.zs.extraRegisterBase + decoder.state.extraRegisterBaseEVEX) + (int)baseReg);
			instruction.Op1Register = (Register)((int)decoder.state.vvvv + (int)baseReg);
			if (decoder.state.mod == 3)
			{
				decoder.SetInvalidInstruction();
				return;
			}
			instruction.Op2Kind = OpKind.Memory;
			decoder.ReadOpMem(ref instruction, tupleType);
		}
	}
	internal sealed class OpCodeHandler_EVEX_Gv_W_er : OpCodeHandlerModRM
	{
		private readonly Register baseReg;

		private readonly Code codeW0;

		private readonly Code codeW1;

		private readonly TupleType tupleType;

		private readonly bool onlySAE;

		public OpCodeHandler_EVEX_Gv_W_er(Register baseReg, Code codeW0, Code codeW1, TupleType tupleType, bool onlySAE)
		{
			this.baseReg = baseReg;
			this.codeW0 = codeW0;
			this.codeW1 = codeW1;
			this.tupleType = tupleType;
			this.onlySAE = onlySAE;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if ((((uint)(decoder.state.zs.flags & StateFlags.z) | decoder.state.vvvv_invalidCheck | decoder.state.aaa | decoder.state.extraRegisterBaseEVEX) & decoder.invalidCheckMask) != 0)
			{
				decoder.SetInvalidInstruction();
			}
			if (((uint)decoder.state.zs.flags & decoder.is64bMode_and_W) != 0)
			{
				instruction.InternalSetCodeNoCheck(codeW1);
				instruction.Op0Register = (Register)(decoder.state.reg + decoder.state.zs.extraRegisterBase + 53);
			}
			else
			{
				instruction.InternalSetCodeNoCheck(codeW0);
				instruction.Op0Register = (Register)(decoder.state.reg + decoder.state.zs.extraRegisterBase + 37);
			}
			if (decoder.state.mod == 3)
			{
				instruction.Op1Register = (Register)((int)(decoder.state.rm + decoder.state.extraBaseRegisterBaseEVEX) + (int)baseReg);
				if ((decoder.state.zs.flags & StateFlags.b) != 0)
				{
					if (onlySAE)
					{
						instruction.InternalSetSuppressAllExceptions();
					}
					else
					{
						instruction.InternalRoundingControl = decoder.state.vectorLength + 1;
					}
				}
			}
			else
			{
				if (((uint)(decoder.state.zs.flags & StateFlags.b) & decoder.invalidCheckMask) != 0)
				{
					decoder.SetInvalidInstruction();
				}
				instruction.Op1Kind = OpKind.Memory;
				decoder.ReadOpMem(ref instruction, tupleType);
			}
		}
	}
	internal sealed class OpCodeHandler_EVEX_VX_Ev : OpCodeHandlerModRM
	{
		private readonly Code code32;

		private readonly Code code64;

		private readonly TupleType tupleTypeW0;

		private readonly TupleType tupleTypeW1;

		public OpCodeHandler_EVEX_VX_Ev(Code code32, Code code64, TupleType tupleTypeW0, TupleType tupleTypeW1)
		{
			this.code32 = code32;
			this.code64 = code64;
			this.tupleTypeW0 = tupleTypeW0;
			this.tupleTypeW1 = tupleTypeW1;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if ((((uint)(decoder.state.zs.flags & (StateFlags.b | StateFlags.z)) | decoder.state.vvvv_invalidCheck | decoder.state.aaa) & decoder.invalidCheckMask) != 0)
			{
				decoder.SetInvalidInstruction();
			}
			TupleType tupleType;
			Register register;
			if (((uint)decoder.state.zs.flags & decoder.is64bMode_and_W) != 0)
			{
				instruction.InternalSetCodeNoCheck(code64);
				tupleType = tupleTypeW1;
				register = Register.RAX;
			}
			else
			{
				instruction.InternalSetCodeNoCheck(code32);
				tupleType = tupleTypeW0;
				register = Register.EAX;
			}
			instruction.Op0Register = (Register)(decoder.state.reg + decoder.state.zs.extraRegisterBase + decoder.state.extraRegisterBaseEVEX + 77);
			if (decoder.state.mod == 3)
			{
				instruction.Op1Register = (Register)((int)(decoder.state.rm + decoder.state.zs.extraBaseRegisterBase) + (int)register);
				return;
			}
			instruction.Op1Kind = OpKind.Memory;
			decoder.ReadOpMem(ref instruction, tupleType);
		}
	}
	internal sealed class OpCodeHandler_EVEX_Ev_VX : OpCodeHandlerModRM
	{
		private readonly Code code32;

		private readonly Code code64;

		private readonly TupleType tupleTypeW0;

		private readonly TupleType tupleTypeW1;

		public OpCodeHandler_EVEX_Ev_VX(Code code32, Code code64, TupleType tupleTypeW0, TupleType tupleTypeW1)
		{
			this.code32 = code32;
			this.code64 = code64;
			this.tupleTypeW0 = tupleTypeW0;
			this.tupleTypeW1 = tupleTypeW1;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if ((((uint)(decoder.state.zs.flags & (StateFlags.b | StateFlags.z)) | decoder.state.vvvv_invalidCheck | decoder.state.aaa) & decoder.invalidCheckMask) != 0)
			{
				decoder.SetInvalidInstruction();
			}
			instruction.Op1Register = (Register)(decoder.state.reg + decoder.state.zs.extraRegisterBase + decoder.state.extraRegisterBaseEVEX + 77);
			TupleType tupleType;
			Register register;
			if (((uint)decoder.state.zs.flags & decoder.is64bMode_and_W) != 0)
			{
				instruction.InternalSetCodeNoCheck(code64);
				tupleType = tupleTypeW1;
				register = Register.RAX;
			}
			else
			{
				instruction.InternalSetCodeNoCheck(code32);
				tupleType = tupleTypeW0;
				register = Register.EAX;
			}
			if (decoder.state.mod == 3)
			{
				instruction.Op0Register = (Register)((int)(decoder.state.rm + decoder.state.zs.extraBaseRegisterBase) + (int)register);
				return;
			}
			instruction.Op0Kind = OpKind.Memory;
			decoder.ReadOpMem(ref instruction, tupleType);
		}
	}
	internal sealed class OpCodeHandler_EVEX_Ev_VX_Ib : OpCodeHandlerModRM
	{
		private readonly Register baseReg;

		private readonly Code code32;

		private readonly Code code64;

		public OpCodeHandler_EVEX_Ev_VX_Ib(Register baseReg, Code code32, Code code64)
		{
			this.baseReg = baseReg;
			this.code32 = code32;
			this.code64 = code64;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if ((((uint)(decoder.state.zs.flags & (StateFlags.b | StateFlags.z)) | decoder.state.vvvv_invalidCheck | decoder.state.aaa | decoder.state.extraRegisterBaseEVEX) & decoder.invalidCheckMask) != 0)
			{
				decoder.SetInvalidInstruction();
			}
			Register register;
			if (((uint)decoder.state.zs.flags & decoder.is64bMode_and_W) != 0)
			{
				instruction.InternalSetCodeNoCheck(code64);
				register = Register.RAX;
			}
			else
			{
				instruction.InternalSetCodeNoCheck(code32);
				register = Register.EAX;
			}
			instruction.Op0Register = (Register)((int)(decoder.state.reg + decoder.state.zs.extraRegisterBase) + (int)register);
			instruction.Op1Register = (Register)((int)(decoder.state.rm + decoder.state.extraBaseRegisterBaseEVEX) + (int)baseReg);
			instruction.Op2Kind = OpKind.Immediate8;
			instruction.InternalImmediate8 = decoder.ReadByte();
		}
	}
	internal sealed class OpCodeHandler_EVEX_MV : OpCodeHandlerModRM
	{
		private readonly Register baseReg;

		private readonly Code code;

		private readonly TupleType tupleType;

		public OpCodeHandler_EVEX_MV(Register baseReg, Code code, TupleType tupleType)
		{
			this.baseReg = baseReg;
			this.code = code;
			this.tupleType = tupleType;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if ((((uint)(decoder.state.zs.flags & (StateFlags.b | StateFlags.z)) | decoder.state.vvvv_invalidCheck | decoder.state.aaa) & decoder.invalidCheckMask) != 0)
			{
				decoder.SetInvalidInstruction();
			}
			instruction.InternalSetCodeNoCheck(code);
			instruction.Op1Register = (Register)((int)(decoder.state.reg + decoder.state.zs.extraRegisterBase + decoder.state.extraRegisterBaseEVEX) + (int)baseReg);
			if (decoder.state.mod == 3)
			{
				decoder.SetInvalidInstruction();
				return;
			}
			instruction.Op0Kind = OpKind.Memory;
			decoder.ReadOpMem(ref instruction, tupleType);
		}
	}
	internal sealed class OpCodeHandler_EVEX_VkEv_REXW : OpCodeHandlerModRM
	{
		private readonly Register baseReg;

		private readonly Code code32;

		private readonly Code code64;

		public OpCodeHandler_EVEX_VkEv_REXW(Register baseReg, Code code32)
		{
			this.baseReg = baseReg;
			this.code32 = code32;
			code64 = Code.INVALID;
		}

		public OpCodeHandler_EVEX_VkEv_REXW(Register baseReg, Code code32, Code code64)
		{
			this.baseReg = baseReg;
			this.code32 = code32;
			this.code64 = code64;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if ((((uint)(decoder.state.zs.flags & StateFlags.b) | decoder.state.vvvv_invalidCheck) & decoder.invalidCheckMask) != 0)
			{
				decoder.SetInvalidInstruction();
			}
			Register register;
			if (((uint)decoder.state.zs.flags & decoder.is64bMode_and_W) != 0)
			{
				instruction.InternalSetCodeNoCheck(code64);
				register = Register.RAX;
			}
			else
			{
				instruction.InternalSetCodeNoCheck(code32);
				register = Register.EAX;
			}
			instruction.Op0Register = (Register)((int)(decoder.state.reg + decoder.state.zs.extraRegisterBase + decoder.state.extraRegisterBaseEVEX) + (int)baseReg);
			if (decoder.state.mod == 3)
			{
				instruction.Op1Register = (Register)((int)(decoder.state.rm + decoder.state.zs.extraBaseRegisterBase) + (int)register);
			}
			else
			{
				decoder.SetInvalidInstruction();
			}
		}
	}
	internal sealed class OpCodeHandler_EVEX_Vk_VSIB : OpCodeHandlerModRM
	{
		private readonly Register baseReg;

		private readonly Register vsibBase;

		private readonly Code code;

		private readonly TupleType tupleType;

		public OpCodeHandler_EVEX_Vk_VSIB(Register baseReg, Register vsibBase, Code code, TupleType tupleType)
		{
			this.baseReg = baseReg;
			this.vsibBase = vsibBase;
			this.code = code;
			this.tupleType = tupleType;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if (decoder.invalidCheckMask != 0 && (((uint)(decoder.state.zs.flags & (StateFlags.b | StateFlags.z)) | (decoder.state.vvvv_invalidCheck & 0xFu)) != 0 || decoder.state.aaa == 0))
			{
				decoder.SetInvalidInstruction();
			}
			instruction.InternalSetCodeNoCheck(code);
			int num = (int)(decoder.state.reg + decoder.state.zs.extraRegisterBase + decoder.state.extraRegisterBaseEVEX);
			instruction.Op0Register = num + baseReg;
			if (decoder.state.mod == 3)
			{
				decoder.SetInvalidInstruction();
				return;
			}
			instruction.Op1Kind = OpKind.Memory;
			decoder.ReadOpMem_VSIB(ref instruction, vsibBase, tupleType);
			if (decoder.invalidCheckMask != 0 && num == (int)((uint)(instruction.MemoryIndex - 77) % 32u))
			{
				decoder.SetInvalidInstruction();
			}
		}
	}
	internal sealed class OpCodeHandler_EVEX_VSIB_k1_VX : OpCodeHandlerModRM
	{
		private readonly Register vsibIndex;

		private readonly Register baseReg;

		private readonly Code code;

		private readonly TupleType tupleType;

		public OpCodeHandler_EVEX_VSIB_k1_VX(Register vsibIndex, Register baseReg, Code code, TupleType tupleType)
		{
			this.vsibIndex = vsibIndex;
			this.baseReg = baseReg;
			this.code = code;
			this.tupleType = tupleType;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if (decoder.invalidCheckMask != 0 && (((uint)(decoder.state.zs.flags & (StateFlags.b | StateFlags.z)) | (decoder.state.vvvv_invalidCheck & 0xFu)) != 0 || decoder.state.aaa == 0))
			{
				decoder.SetInvalidInstruction();
			}
			instruction.InternalSetCodeNoCheck(code);
			instruction.Op1Register = (Register)((int)(decoder.state.reg + decoder.state.zs.extraRegisterBase + decoder.state.extraRegisterBaseEVEX) + (int)baseReg);
			if (decoder.state.mod == 3)
			{
				decoder.SetInvalidInstruction();
				return;
			}
			instruction.Op0Kind = OpKind.Memory;
			decoder.ReadOpMem_VSIB(ref instruction, vsibIndex, tupleType);
		}
	}
	internal sealed class OpCodeHandler_EVEX_VSIB_k1 : OpCodeHandlerModRM
	{
		private readonly Register vsibIndex;

		private readonly Code code;

		private readonly TupleType tupleType;

		public OpCodeHandler_EVEX_VSIB_k1(Register vsibIndex, Code code, TupleType tupleType)
		{
			this.vsibIndex = vsibIndex;
			this.code = code;
			this.tupleType = tupleType;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if (decoder.invalidCheckMask != 0 && (((uint)(decoder.state.zs.flags & (StateFlags.b | StateFlags.z)) | (decoder.state.vvvv_invalidCheck & 0xFu)) != 0 || decoder.state.aaa == 0))
			{
				decoder.SetInvalidInstruction();
			}
			instruction.InternalSetCodeNoCheck(code);
			if (decoder.state.mod == 3)
			{
				decoder.SetInvalidInstruction();
				return;
			}
			instruction.Op0Kind = OpKind.Memory;
			decoder.ReadOpMem_VSIB(ref instruction, vsibIndex, tupleType);
		}
	}
	internal sealed class OpCodeHandler_EVEX_GvM_VX_Ib : OpCodeHandlerModRM
	{
		private readonly Register baseReg;

		private readonly Code code32;

		private readonly Code code64;

		private readonly TupleType tupleType32;

		private readonly TupleType tupleType64;

		public OpCodeHandler_EVEX_GvM_VX_Ib(Register baseReg, Code code32, Code code64, TupleType tupleType32, TupleType tupleType64)
		{
			this.baseReg = baseReg;
			this.code32 = code32;
			this.code64 = code64;
			this.tupleType32 = tupleType32;
			this.tupleType64 = tupleType64;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if ((((uint)(decoder.state.zs.flags & (StateFlags.b | StateFlags.z)) | decoder.state.vvvv_invalidCheck | decoder.state.aaa) & decoder.invalidCheckMask) != 0)
			{
				decoder.SetInvalidInstruction();
			}
			Register register;
			if (((uint)decoder.state.zs.flags & decoder.is64bMode_and_W) != 0)
			{
				instruction.InternalSetCodeNoCheck(code64);
				register = Register.RAX;
			}
			else
			{
				instruction.InternalSetCodeNoCheck(code32);
				register = Register.EAX;
			}
			if (decoder.state.mod == 3)
			{
				instruction.Op0Register = (Register)((int)(decoder.state.rm + decoder.state.zs.extraBaseRegisterBase) + (int)register);
			}
			else
			{
				instruction.Op0Kind = OpKind.Memory;
				if (((uint)decoder.state.zs.flags & decoder.is64bMode_and_W) != 0)
				{
					decoder.ReadOpMem(ref instruction, tupleType64);
				}
				else
				{
					decoder.ReadOpMem(ref instruction, tupleType32);
				}
			}
			instruction.Op1Register = (Register)((int)(decoder.state.reg + decoder.state.zs.extraRegisterBase + decoder.state.extraRegisterBaseEVEX) + (int)baseReg);
			instruction.Op2Kind = OpKind.Immediate8;
			instruction.InternalImmediate8 = decoder.ReadByte();
		}
	}
	internal sealed class OpCodeHandler_EVEX_KkWIb : OpCodeHandlerModRM
	{
		private readonly Register baseReg;

		private readonly Code code;

		private readonly TupleType tupleType;

		private readonly bool canBroadcast;

		public OpCodeHandler_EVEX_KkWIb(Register baseReg, Code code, TupleType tupleType, bool canBroadcast)
		{
			this.baseReg = baseReg;
			this.code = code;
			this.tupleType = tupleType;
			this.canBroadcast = canBroadcast;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if ((((uint)(decoder.state.zs.flags & StateFlags.z) | decoder.state.vvvv_invalidCheck | decoder.state.zs.extraRegisterBase | decoder.state.extraRegisterBaseEVEX) & decoder.invalidCheckMask) != 0)
			{
				decoder.SetInvalidInstruction();
			}
			instruction.InternalSetCodeNoCheck(code);
			instruction.Op0Register = (Register)(decoder.state.reg + 173);
			if (decoder.state.mod == 3)
			{
				instruction.Op1Register = (Register)((int)(decoder.state.rm + decoder.state.extraBaseRegisterBaseEVEX) + (int)baseReg);
				if (((uint)(decoder.state.zs.flags & StateFlags.b) & decoder.invalidCheckMask) != 0)
				{
					decoder.SetInvalidInstruction();
				}
			}
			else
			{
				instruction.Op1Kind = OpKind.Memory;
				if ((decoder.state.zs.flags & StateFlags.b) != 0)
				{
					if (canBroadcast)
					{
						instruction.InternalSetIsBroadcast();
					}
					else if (decoder.invalidCheckMask != 0)
					{
						decoder.SetInvalidInstruction();
					}
				}
				decoder.ReadOpMem(ref instruction, tupleType);
			}
			instruction.Op2Kind = OpKind.Immediate8;
			instruction.InternalImmediate8 = decoder.ReadByte();
		}
	}
	internal sealed class OpCodeHandler_ST_STi : OpCodeHandlerModRM
	{
		private readonly Code code;

		public OpCodeHandler_ST_STi(Code code)
		{
			this.code = code;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			instruction.InternalSetCodeNoCheck(code);
			instruction.Op0Register = Register.ST0;
			instruction.Op1Register = (Register)(217 + decoder.state.rm);
		}
	}
	internal sealed class OpCodeHandler_STi_ST : OpCodeHandlerModRM
	{
		private readonly Code code;

		public OpCodeHandler_STi_ST(Code code)
		{
			this.code = code;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			instruction.InternalSetCodeNoCheck(code);
			instruction.Op0Register = (Register)(217 + decoder.state.rm);
			instruction.Op1Register = Register.ST0;
		}
	}
	internal sealed class OpCodeHandler_STi : OpCodeHandlerModRM
	{
		private readonly Code code;

		public OpCodeHandler_STi(Code code)
		{
			this.code = code;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			instruction.InternalSetCodeNoCheck(code);
			instruction.Op0Register = (Register)(217 + decoder.state.rm);
		}
	}
	internal sealed class OpCodeHandler_Mf : OpCodeHandlerModRM
	{
		private readonly Code code16;

		private readonly Code code32;

		public OpCodeHandler_Mf(Code code)
		{
			code16 = code;
			code32 = code;
		}

		public OpCodeHandler_Mf(Code code16, Code code32)
		{
			this.code16 = code16;
			this.code32 = code32;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if (decoder.state.operandSize != 0)
			{
				instruction.InternalSetCodeNoCheck(code32);
			}
			else
			{
				instruction.InternalSetCodeNoCheck(code16);
			}
			instruction.Op0Kind = OpKind.Memory;
			decoder.ReadOpMem(ref instruction);
		}
	}
	internal struct Code3
	{
		public unsafe fixed ushort codes[3];

		public unsafe Code3(Code code16, Code code32, Code code64)
		{
			codes[0] = (ushort)code16;
			codes[1] = (ushort)code32;
			codes[2] = (ushort)code64;
		}
	}
	internal sealed class OpCodeHandler_VEX2 : OpCodeHandlerModRM
	{
		private readonly OpCodeHandler handlerMem;

		public OpCodeHandler_VEX2(OpCodeHandler handlerMem)
		{
			this.handlerMem = handlerMem ?? throw new ArgumentNullException("handlerMem");
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if (decoder.is64bMode)
			{
				decoder.VEX2(ref instruction);
			}
			else if (decoder.state.mod == 3)
			{
				decoder.VEX2(ref instruction);
			}
			else
			{
				handlerMem.Decode(decoder, ref instruction);
			}
		}
	}
	internal sealed class OpCodeHandler_VEX3 : OpCodeHandlerModRM
	{
		private readonly OpCodeHandler handlerMem;

		public OpCodeHandler_VEX3(OpCodeHandler handlerMem)
		{
			this.handlerMem = handlerMem ?? throw new ArgumentNullException("handlerMem");
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if (decoder.is64bMode)
			{
				decoder.VEX3(ref instruction);
			}
			else if (decoder.state.mod == 3)
			{
				decoder.VEX3(ref instruction);
			}
			else
			{
				handlerMem.Decode(decoder, ref instruction);
			}
		}
	}
	internal sealed class OpCodeHandler_XOP : OpCodeHandlerModRM
	{
		private readonly OpCodeHandler handler_reg0;

		public OpCodeHandler_XOP(OpCodeHandler handler_reg0)
		{
			this.handler_reg0 = handler_reg0 ?? throw new ArgumentNullException("handler_reg0");
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if ((decoder.state.modrm & 0x1F) < 8)
			{
				handler_reg0.Decode(decoder, ref instruction);
			}
			else
			{
				decoder.XOP(ref instruction);
			}
		}
	}
	internal sealed class OpCodeHandler_EVEX : OpCodeHandlerModRM
	{
		private readonly OpCodeHandler handlerMem;

		public OpCodeHandler_EVEX(OpCodeHandler handlerMem)
		{
			this.handlerMem = handlerMem ?? throw new ArgumentNullException("handlerMem");
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if (decoder.is64bMode)
			{
				decoder.EVEX_MVEX(ref instruction);
			}
			else if (decoder.state.mod == 3)
			{
				decoder.EVEX_MVEX(ref instruction);
			}
			else
			{
				handlerMem.Decode(decoder, ref instruction);
			}
		}
	}
	internal sealed class OpCodeHandler_PrefixEsCsSsDs : OpCodeHandler
	{
		private readonly Register seg;

		public OpCodeHandler_PrefixEsCsSsDs(Register seg)
		{
			this.seg = seg;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if (!decoder.is64bMode || decoder.state.zs.segmentPrio <= 0)
			{
				instruction.SegmentPrefix = seg;
			}
			decoder.ResetRexPrefixState();
			decoder.CallOpCodeHandlerXXTable(ref instruction);
		}
	}
	internal sealed class OpCodeHandler_PrefixFsGs : OpCodeHandler
	{
		private readonly Register seg;

		public OpCodeHandler_PrefixFsGs(Register seg)
		{
			this.seg = seg;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			instruction.SegmentPrefix = seg;
			decoder.state.zs.segmentPrio = 1;
			decoder.ResetRexPrefixState();
			decoder.CallOpCodeHandlerXXTable(ref instruction);
		}
	}
	internal sealed class OpCodeHandler_Prefix66 : OpCodeHandler
	{
		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			decoder.state.zs.flags |= StateFlags.Has66;
			decoder.state.operandSize = decoder.defaultInvertedOperandSize;
			if (decoder.state.zs.mandatoryPrefix == MandatoryPrefixByte.None)
			{
				decoder.state.zs.mandatoryPrefix = MandatoryPrefixByte.P66;
			}
			decoder.ResetRexPrefixState();
			decoder.CallOpCodeHandlerXXTable(ref instruction);
		}
	}
	internal sealed class OpCodeHandler_Prefix67 : OpCodeHandler
	{
		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			decoder.state.addressSize = decoder.defaultInvertedAddressSize;
			decoder.ResetRexPrefixState();
			decoder.CallOpCodeHandlerXXTable(ref instruction);
		}
	}
	internal sealed class OpCodeHandler_PrefixF0 : OpCodeHandler
	{
		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			instruction.InternalSetHasLockPrefix();
			decoder.state.zs.flags |= StateFlags.Lock;
			decoder.ResetRexPrefixState();
			decoder.CallOpCodeHandlerXXTable(ref instruction);
		}
	}
	internal sealed class OpCodeHandler_PrefixF2 : OpCodeHandler
	{
		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			instruction.InternalSetHasRepnePrefix();
			decoder.state.zs.mandatoryPrefix = MandatoryPrefixByte.PF2;
			decoder.ResetRexPrefixState();
			decoder.CallOpCodeHandlerXXTable(ref instruction);
		}
	}
	internal sealed class OpCodeHandler_PrefixF3 : OpCodeHandler
	{
		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			instruction.InternalSetHasRepePrefix();
			decoder.state.zs.mandatoryPrefix = MandatoryPrefixByte.PF3;
			decoder.ResetRexPrefixState();
			decoder.CallOpCodeHandlerXXTable(ref instruction);
		}
	}
	internal sealed class OpCodeHandler_PrefixREX : OpCodeHandler
	{
		private readonly OpCodeHandler handler;

		private readonly uint rex;

		public OpCodeHandler_PrefixREX(OpCodeHandler handler, uint rex)
		{
			this.handler = handler ?? throw new InvalidOperationException();
			this.rex = rex;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if (decoder.is64bMode)
			{
				if ((rex & 8u) != 0)
				{
					decoder.state.operandSize = OpSize.Size64;
					decoder.state.zs.flags |= StateFlags.HasRex | StateFlags.W;
				}
				else
				{
					decoder.state.zs.flags |= StateFlags.HasRex;
					decoder.state.zs.flags &= ~StateFlags.W;
					if ((decoder.state.zs.flags & StateFlags.Has66) == 0)
					{
						decoder.state.operandSize = OpSize.Size32;
					}
					else
					{
						decoder.state.operandSize = OpSize.Size16;
					}
				}
				decoder.state.zs.extraRegisterBase = (rex << 1) & 8u;
				decoder.state.zs.extraIndexRegisterBase = (rex << 2) & 8u;
				decoder.state.zs.extraBaseRegisterBase = (rex << 3) & 8u;
				decoder.CallOpCodeHandlerXXTable(ref instruction);
			}
			else
			{
				handler.Decode(decoder, ref instruction);
			}
		}
	}
	internal sealed class OpCodeHandler_Reg : OpCodeHandler
	{
		private readonly Code code;

		private readonly Register reg;

		public OpCodeHandler_Reg(Code code, Register reg)
		{
			this.code = code;
			this.reg = reg;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			instruction.InternalSetCodeNoCheck(code);
			instruction.Op0Register = reg;
		}
	}
	internal sealed class OpCodeHandler_RegIb : OpCodeHandler
	{
		private readonly Code code;

		private readonly Register reg;

		public OpCodeHandler_RegIb(Code code, Register reg)
		{
			this.code = code;
			this.reg = reg;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			instruction.InternalSetCodeNoCheck(code);
			instruction.Op0Register = reg;
			instruction.Op1Kind = OpKind.Immediate8;
			instruction.InternalImmediate8 = decoder.ReadByte();
		}
	}
	internal sealed class OpCodeHandler_IbReg : OpCodeHandler
	{
		private readonly Code code;

		private readonly Register reg;

		public OpCodeHandler_IbReg(Code code, Register reg)
		{
			this.code = code;
			this.reg = reg;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			instruction.InternalSetCodeNoCheck(code);
			instruction.Op1Register = reg;
			instruction.Op0Kind = OpKind.Immediate8;
			instruction.InternalImmediate8 = decoder.ReadByte();
		}
	}
	internal sealed class OpCodeHandler_AL_DX : OpCodeHandler
	{
		private readonly Code code;

		public OpCodeHandler_AL_DX(Code code)
		{
			this.code = code;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			instruction.InternalSetCodeNoCheck(code);
			instruction.Op0Register = Register.AL;
			instruction.Op1Register = Register.DX;
		}
	}
	internal sealed class OpCodeHandler_DX_AL : OpCodeHandler
	{
		private readonly Code code;

		public OpCodeHandler_DX_AL(Code code)
		{
			this.code = code;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			instruction.InternalSetCodeNoCheck(code);
			instruction.Op0Register = Register.DX;
			instruction.Op1Register = Register.AL;
		}
	}
	internal sealed class OpCodeHandler_Ib : OpCodeHandler
	{
		private readonly Code code;

		public OpCodeHandler_Ib(Code code)
		{
			this.code = code;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			instruction.InternalSetCodeNoCheck(code);
			instruction.Op0Kind = OpKind.Immediate8;
			instruction.InternalImmediate8 = decoder.ReadByte();
		}
	}
	internal sealed class OpCodeHandler_Ib3 : OpCodeHandlerModRM
	{
		private readonly Code code;

		public OpCodeHandler_Ib3(Code code)
		{
			this.code = code;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			instruction.InternalSetCodeNoCheck(code);
			instruction.Op0Kind = OpKind.Immediate8;
			instruction.InternalImmediate8 = decoder.ReadByte();
		}
	}
	internal sealed class OpCodeHandler_MandatoryPrefix : OpCodeHandlerModRM
	{
		private readonly OpCodeHandler[] handlers;

		public OpCodeHandler_MandatoryPrefix(OpCodeHandler handler, OpCodeHandler handler66, OpCodeHandler handlerF3, OpCodeHandler handlerF2)
		{
			handlers = new OpCodeHandler[4]
			{
				handler ?? throw new ArgumentNullException("handler"),
				handler66 ?? throw new ArgumentNullException("handler66"),
				handlerF3 ?? throw new ArgumentNullException("handlerF3"),
				handlerF2 ?? throw new ArgumentNullException("handlerF2")
			};
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			decoder.ClearMandatoryPrefix(ref instruction);
			handlers[(uint)decoder.state.zs.mandatoryPrefix].Decode(decoder, ref instruction);
		}
	}
	internal sealed class OpCodeHandler_MandatoryPrefix3 : OpCodeHandlerModRM
	{
		private readonly struct Info
		{
			public readonly OpCodeHandler handler;

			public readonly bool mandatoryPrefix;

			public Info(OpCodeHandler handler, bool mandatoryPrefix)
			{
				this.handler = handler;
				this.mandatoryPrefix = mandatoryPrefix;
			}
		}

		private readonly Info[] handlers_reg;

		private readonly Info[] handlers_mem;

		public OpCodeHandler_MandatoryPrefix3(OpCodeHandler handler_reg, OpCodeHandler handler_mem, OpCodeHandler handler66_reg, OpCodeHandler handler66_mem, OpCodeHandler handlerF3_reg, OpCodeHandler handlerF3_mem, OpCodeHandler handlerF2_reg, OpCodeHandler handlerF2_mem, LegacyHandlerFlags flags)
		{
			handlers_reg = new Info[4]
			{
				new Info(handler_reg ?? throw new ArgumentNullException("handler_reg"), (flags & LegacyHandlerFlags.HandlerReg) == 0),
				new Info(handler66_reg ?? throw new ArgumentNullException("handler66_reg"), (flags & LegacyHandlerFlags.Handler66Reg) == 0),
				new Info(handlerF3_reg ?? throw new ArgumentNullException("handlerF3_reg"), (flags & LegacyHandlerFlags.HandlerF3Reg) == 0),
				new Info(handlerF2_reg ?? throw new ArgumentNullException("handlerF2_reg"), (flags & LegacyHandlerFlags.HandlerF2Reg) == 0)
			};
			handlers_mem = new Info[4]
			{
				new Info(handler_mem ?? throw new ArgumentNullException("handler_mem"), (flags & LegacyHandlerFlags.HandlerMem) == 0),
				new Info(handler66_mem ?? throw new ArgumentNullException("handler66_mem"), (flags & LegacyHandlerFlags.Handler66Mem) == 0),
				new Info(handlerF3_mem ?? throw new ArgumentNullException("handlerF3_mem"), (flags & LegacyHandlerFlags.HandlerF3Mem) == 0),
				new Info(handlerF2_mem ?? throw new ArgumentNullException("handlerF2_mem"), (flags & LegacyHandlerFlags.HandlerF2Mem) == 0)
			};
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			Info info = ((decoder.state.mod == 3) ? handlers_reg : handlers_mem)[(uint)decoder.state.zs.mandatoryPrefix];
			if (info.mandatoryPrefix)
			{
				decoder.ClearMandatoryPrefix(ref instruction);
			}
			info.handler.Decode(decoder, ref instruction);
		}
	}
	internal sealed class OpCodeHandler_MandatoryPrefix4 : OpCodeHandler
	{
		private readonly OpCodeHandler handlerNP;

		private readonly OpCodeHandler handler66;

		private readonly OpCodeHandler handlerF3;

		private readonly OpCodeHandler handlerF2;

		private readonly uint flags;

		public OpCodeHandler_MandatoryPrefix4(OpCodeHandler handlerNP, OpCodeHandler handler66, OpCodeHandler handlerF3, OpCodeHandler handlerF2, uint flags)
		{
			this.handlerNP = handlerNP ?? throw new ArgumentNullException("handlerNP");
			this.handler66 = handler66 ?? throw new ArgumentNullException("handler66");
			this.handlerF3 = handlerF3 ?? throw new ArgumentNullException("handlerF3");
			this.handlerF2 = handlerF2 ?? throw new ArgumentNullException("handlerF2");
			this.flags = flags;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			OpCodeHandler opCodeHandler;
			switch (decoder.state.zs.mandatoryPrefix)
			{
			case MandatoryPrefixByte.None:
				opCodeHandler = handlerNP;
				break;
			case MandatoryPrefixByte.P66:
				opCodeHandler = handler66;
				break;
			case MandatoryPrefixByte.PF3:
				if ((flags & 4u) != 0)
				{
					decoder.ClearMandatoryPrefixF3(ref instruction);
				}
				opCodeHandler = handlerF3;
				break;
			case MandatoryPrefixByte.PF2:
				if ((flags & 8u) != 0)
				{
					decoder.ClearMandatoryPrefixF2(ref instruction);
				}
				opCodeHandler = handlerF2;
				break;
			default:
				throw new InvalidOperationException();
			}
			if (opCodeHandler.HasModRM && (flags & 0x10u) != 0)
			{
				decoder.ReadModRM();
			}
			opCodeHandler.Decode(decoder, ref instruction);
		}
	}
	internal sealed class OpCodeHandler_MandatoryPrefix_NoModRM : OpCodeHandler
	{
		private readonly OpCodeHandler[] handlers;

		public OpCodeHandler_MandatoryPrefix_NoModRM(OpCodeHandler handler, OpCodeHandler handler66, OpCodeHandler handlerF3, OpCodeHandler handlerF2)
		{
			handlers = new OpCodeHandler[4]
			{
				handler ?? throw new ArgumentNullException("handler"),
				handler66 ?? throw new ArgumentNullException("handler66"),
				handlerF3 ?? throw new ArgumentNullException("handlerF3"),
				handlerF2 ?? throw new ArgumentNullException("handlerF2")
			};
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			decoder.ClearMandatoryPrefix(ref instruction);
			handlers[(uint)decoder.state.zs.mandatoryPrefix].Decode(decoder, ref instruction);
		}
	}
	internal sealed class OpCodeHandler_NIb : OpCodeHandlerModRM
	{
		private readonly Code code;

		public OpCodeHandler_NIb(Code code)
		{
			this.code = code;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			instruction.InternalSetCodeNoCheck(code);
			if (decoder.state.mod == 3)
			{
				instruction.Op0Register = (Register)(decoder.state.rm + 225);
			}
			else
			{
				decoder.SetInvalidInstruction();
			}
			instruction.Op1Kind = OpKind.Immediate8;
			instruction.InternalImmediate8 = decoder.ReadByte();
		}
	}
	internal sealed class OpCodeHandler_Reservednop : OpCodeHandlerModRM
	{
		private readonly OpCodeHandler reservedNopHandler;

		private readonly OpCodeHandler otherHandler;

		public OpCodeHandler_Reservednop(OpCodeHandler reservedNopHandler, OpCodeHandler otherHandler)
		{
			this.reservedNopHandler = reservedNopHandler ?? throw new ArgumentNullException("reservedNopHandler");
			this.otherHandler = otherHandler ?? throw new ArgumentNullException("otherHandler");
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			(((decoder.options & DecoderOptions.ForceReservedNop) != 0) ? reservedNopHandler : otherHandler).Decode(decoder, ref instruction);
		}
	}
	internal sealed class OpCodeHandler_Ev_Iz : OpCodeHandlerModRM
	{
		private readonly Code3 codes;

		private readonly HandlerFlags flags;

		public OpCodeHandler_Ev_Iz(Code code16, Code code32, Code code64)
		{
			codes = new Code3(code16, code32, code64);
		}

		public OpCodeHandler_Ev_Iz(Code code16, Code code32, Code code64, HandlerFlags flags)
		{
			codes = new Code3(code16, code32, code64);
			this.flags = flags;
		}

		public unsafe override void Decode(Decoder decoder, ref Instruction instruction)
		{
			nuint num = (nuint)decoder.state.operandSize;
			instruction.InternalSetCodeNoCheck((Code)codes.codes[num]);
			if (decoder.state.mod < 3)
			{
				decoder.state.zs.flags |= (StateFlags)((uint)(flags & HandlerFlags.Lock) << 10);
				instruction.Op0Kind = OpKind.Memory;
				decoder.ReadOpMem(ref instruction);
			}
			else
			{
				instruction.Op0Register = (Register)(((int)num << 4) + (int)(decoder.state.rm + decoder.state.zs.extraBaseRegisterBase) + 21);
			}
			if ((int)num == 1)
			{
				instruction.Op1Kind = OpKind.Immediate32;
				instruction.Immediate32 = decoder.ReadUInt32();
			}
			else if ((int)num == 2)
			{
				instruction.Op1Kind = OpKind.Immediate32to64;
				instruction.Immediate32 = decoder.ReadUInt32();
			}
			else
			{
				instruction.Op1Kind = OpKind.Immediate16;
				instruction.InternalImmediate16 = decoder.ReadUInt16();
			}
		}
	}
	internal sealed class OpCodeHandler_Ev_Ib : OpCodeHandlerModRM
	{
		private readonly Code3 codes;

		private readonly HandlerFlags flags;

		public OpCodeHandler_Ev_Ib(Code code16, Code code32, Code code64)
		{
			codes = new Code3(code16, code32, code64);
		}

		public OpCodeHandler_Ev_Ib(Code code16, Code code32, Code code64, HandlerFlags flags)
		{
			codes = new Code3(code16, code32, code64);
			this.flags = flags;
		}

		public unsafe override void Decode(Decoder decoder, ref Instruction instruction)
		{
			nuint num = (nuint)decoder.state.operandSize;
			instruction.InternalSetCodeNoCheck((Code)codes.codes[num]);
			if (decoder.state.mod == 3)
			{
				instruction.Op0Register = (Register)(((int)num << 4) + (int)(decoder.state.rm + decoder.state.zs.extraBaseRegisterBase) + 21);
			}
			else
			{
				decoder.state.zs.flags |= (StateFlags)((uint)(flags & HandlerFlags.Lock) << 10);
				instruction.Op0Kind = OpKind.Memory;
				decoder.ReadOpMem(ref instruction);
			}
			if ((int)num == 1)
			{
				instruction.Op1Kind = OpKind.Immediate8to32;
			}
			else if ((int)num == 2)
			{
				instruction.Op1Kind = OpKind.Immediate8to64;
			}
			else
			{
				instruction.Op1Kind = OpKind.Immediate8to16;
			}
			instruction.InternalImmediate8 = decoder.ReadByte();
		}
	}
	internal sealed class OpCodeHandler_Ev_Ib2 : OpCodeHandlerModRM
	{
		private readonly Code3 codes;

		private readonly HandlerFlags flags;

		public OpCodeHandler_Ev_Ib2(Code code16, Code code32, Code code64)
		{
			codes = new Code3(code16, code32, code64);
		}

		public OpCodeHandler_Ev_Ib2(Code code16, Code code32, Code code64, HandlerFlags flags)
		{
			codes = new Code3(code16, code32, code64);
			this.flags = flags;
		}

		public unsafe override void Decode(Decoder decoder, ref Instruction instruction)
		{
			nuint num = (nuint)decoder.state.operandSize;
			instruction.InternalSetCodeNoCheck((Code)codes.codes[num]);
			if (decoder.state.mod == 3)
			{
				instruction.Op0Register = (Register)(((int)num << 4) + (int)(decoder.state.rm + decoder.state.zs.extraBaseRegisterBase) + 21);
			}
			else
			{
				decoder.state.zs.flags |= (StateFlags)((uint)(flags & HandlerFlags.Lock) << 10);
				instruction.Op0Kind = OpKind.Memory;
				decoder.ReadOpMem(ref instruction);
			}
			instruction.Op1Kind = OpKind.Immediate8;
			instruction.InternalImmediate8 = decoder.ReadByte();
		}
	}
	internal sealed class OpCodeHandler_Ev_1 : OpCodeHandlerModRM
	{
		private readonly Code3 codes;

		public OpCodeHandler_Ev_1(Code code16, Code code32, Code code64)
		{
			codes = new Code3(code16, code32, code64);
		}

		public unsafe override void Decode(Decoder decoder, ref Instruction instruction)
		{
			nuint num = (nuint)decoder.state.operandSize;
			instruction.InternalSetCodeNoCheck((Code)codes.codes[num]);
			instruction.Op1Kind = OpKind.Immediate8;
			instruction.InternalImmediate8 = 1u;
			decoder.state.zs.flags |= StateFlags.NoImm;
			if (decoder.state.mod == 3)
			{
				instruction.Op0Register = (Register)(((int)num << 4) + (int)(decoder.state.rm + decoder.state.zs.extraBaseRegisterBase) + 21);
				return;
			}
			instruction.Op0Kind = OpKind.Memory;
			decoder.ReadOpMem(ref instruction);
		}
	}
	internal sealed class OpCodeHandler_Ev_CL : OpCodeHandlerModRM
	{
		private readonly Code3 codes;

		public OpCodeHandler_Ev_CL(Code code16, Code code32, Code code64)
		{
			codes = new Code3(code16, code32, code64);
		}

		public unsafe override void Decode(Decoder decoder, ref Instruction instruction)
		{
			nuint num = (nuint)decoder.state.operandSize;
			instruction.InternalSetCodeNoCheck((Code)codes.codes[num]);
			instruction.Op1Register = Register.CL;
			if (decoder.state.mod == 3)
			{
				instruction.Op0Register = (Register)(((int)num << 4) + (int)(decoder.state.rm + decoder.state.zs.extraBaseRegisterBase) + 21);
				return;
			}
			instruction.Op0Kind = OpKind.Memory;
			decoder.ReadOpMem(ref instruction);
		}
	}
	internal sealed class OpCodeHandler_Ev : OpCodeHandlerModRM
	{
		private readonly Code3 codes;

		private readonly HandlerFlags flags;

		public OpCodeHandler_Ev(Code code16, Code code32, Code code64)
		{
			codes = new Code3(code16, code32, code64);
		}

		public OpCodeHandler_Ev(Code code16, Code code32, Code code64, HandlerFlags flags)
		{
			codes = new Code3(code16, code32, code64);
			this.flags = flags;
		}

		public unsafe override void Decode(Decoder decoder, ref Instruction instruction)
		{
			nuint num = (nuint)decoder.state.operandSize;
			instruction.InternalSetCodeNoCheck((Code)codes.codes[num]);
			if (decoder.state.mod == 3)
			{
				instruction.Op0Register = (Register)(((int)num << 4) + (int)(decoder.state.rm + decoder.state.zs.extraBaseRegisterBase) + 21);
				return;
			}
			decoder.state.zs.flags |= (StateFlags)((uint)(flags & HandlerFlags.Lock) << 10);
			instruction.Op0Kind = OpKind.Memory;
			decoder.ReadOpMem(ref instruction);
		}
	}
	internal sealed class OpCodeHandler_Rv : OpCodeHandlerModRM
	{
		private readonly Code3 codes;

		public OpCodeHandler_Rv(Code code16, Code code32, Code code64)
		{
			codes = new Code3(code16, code32, code64);
		}

		public unsafe override void Decode(Decoder decoder, ref Instruction instruction)
		{
			nuint num = (nuint)decoder.state.operandSize;
			instruction.InternalSetCodeNoCheck((Code)codes.codes[num]);
			instruction.Op0Register = (Register)(((int)num << 4) + (int)(decoder.state.rm + decoder.state.zs.extraBaseRegisterBase) + 21);
		}
	}
	internal sealed class OpCodeHandler_Rv_32_64 : OpCodeHandlerModRM
	{
		private readonly Code code32;

		private readonly Code code64;

		public OpCodeHandler_Rv_32_64(Code code32, Code code64)
		{
			this.code32 = code32;
			this.code64 = code64;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			Register register;
			if (decoder.is64bMode)
			{
				instruction.InternalSetCodeNoCheck(code64);
				register = Register.RAX;
			}
			else
			{
				instruction.InternalSetCodeNoCheck(code32);
				register = Register.EAX;
			}
			instruction.Op0Register = (Register)((int)(decoder.state.rm + decoder.state.zs.extraBaseRegisterBase) + (int)register);
		}
	}
	internal sealed class OpCodeHandler_Rq : OpCodeHandlerModRM
	{
		private readonly Code code;

		public OpCodeHandler_Rq(Code code)
		{
			this.code = code;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			instruction.InternalSetCodeNoCheck(code);
			instruction.Op0Register = (Register)(decoder.state.rm + decoder.state.zs.extraBaseRegisterBase + 53);
		}
	}
	internal sealed class OpCodeHandler_Ev_REXW : OpCodeHandlerModRM
	{
		private readonly Code code32;

		private readonly Code code64;

		private readonly uint flags;

		private readonly uint disallowReg;

		private readonly uint disallowMem;

		public OpCodeHandler_Ev_REXW(Code code32, Code code64, uint flags)
		{
			this.code32 = code32;
			this.code64 = code64;
			this.flags = flags;
			disallowReg = (((flags & 1) == 0) ? uint.MaxValue : 0u);
			disallowMem = (((flags & 2) == 0) ? uint.MaxValue : 0u);
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if ((decoder.state.zs.flags & StateFlags.W) != 0)
			{
				instruction.InternalSetCodeNoCheck(code64);
			}
			else
			{
				instruction.InternalSetCodeNoCheck(code32);
			}
			if ((((flags & 4) | (uint)(decoder.state.zs.flags & StateFlags.Has66)) & decoder.invalidCheckMask) == 32772)
			{
				decoder.SetInvalidInstruction();
			}
			if (decoder.state.mod == 3)
			{
				if ((decoder.state.zs.flags & StateFlags.W) != 0)
				{
					instruction.Op0Register = (Register)(decoder.state.rm + decoder.state.zs.extraBaseRegisterBase + 53);
				}
				else
				{
					instruction.Op0Register = (Register)(decoder.state.rm + decoder.state.zs.extraBaseRegisterBase + 37);
				}
				if ((disallowReg & decoder.invalidCheckMask) != 0)
				{
					decoder.SetInvalidInstruction();
				}
			}
			else
			{
				if ((disallowMem & decoder.invalidCheckMask) != 0)
				{
					decoder.SetInvalidInstruction();
				}
				instruction.Op0Kind = OpKind.Memory;
				decoder.ReadOpMem(ref instruction);
			}
		}
	}
	internal sealed class OpCodeHandler_Evj : OpCodeHandlerModRM
	{
		private readonly Code code16;

		private readonly Code code32;

		private readonly Code code64;

		public OpCodeHandler_Evj(Code code16, Code code32, Code code64)
		{
			this.code16 = code16;
			this.code32 = code32;
			this.code64 = code64;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if (decoder.is64bMode)
			{
				if ((decoder.options & DecoderOptions.AMD) == 0 || decoder.state.operandSize != 0)
				{
					instruction.InternalSetCodeNoCheck(code64);
				}
				else
				{
					instruction.InternalSetCodeNoCheck(code16);
				}
				if (decoder.state.mod < 3)
				{
					instruction.Op0Kind = OpKind.Memory;
					decoder.ReadOpMem(ref instruction);
				}
				else if ((decoder.options & DecoderOptions.AMD) == 0 || decoder.state.operandSize != 0)
				{
					instruction.Op0Register = (Register)(decoder.state.rm + decoder.state.zs.extraBaseRegisterBase + 53);
				}
				else
				{
					instruction.Op0Register = (Register)(decoder.state.rm + decoder.state.zs.extraBaseRegisterBase + 21);
				}
			}
			else
			{
				if (decoder.state.operandSize == OpSize.Size32)
				{
					instruction.InternalSetCodeNoCheck(code32);
				}
				else
				{
					instruction.InternalSetCodeNoCheck(code16);
				}
				if (decoder.state.mod < 3)
				{
					instruction.Op0Kind = OpKind.Memory;
					decoder.ReadOpMem(ref instruction);
				}
				else if (decoder.state.operandSize == OpSize.Size32)
				{
					instruction.Op0Register = (Register)(decoder.state.rm + 37);
				}
				else
				{
					instruction.Op0Register = (Register)(decoder.state.rm + 21);
				}
			}
		}
	}
	internal sealed class OpCodeHandler_Ep : OpCodeHandlerModRM
	{
		private readonly Code code16;

		private readonly Code code32;

		private readonly Code code64;

		public OpCodeHandler_Ep(Code code16, Code code32, Code code64)
		{
			this.code16 = code16;
			this.code32 = code32;
			this.code64 = code64;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if (decoder.state.operandSize == OpSize.Size64 && (decoder.options & DecoderOptions.AMD) == 0)
			{
				instruction.InternalSetCodeNoCheck(code64);
			}
			else if (decoder.state.operandSize == OpSize.Size16)
			{
				instruction.InternalSetCodeNoCheck(code16);
			}
			else
			{
				instruction.InternalSetCodeNoCheck(code32);
			}
			if (decoder.state.mod == 3)
			{
				decoder.SetInvalidInstruction();
				return;
			}
			instruction.Op0Kind = OpKind.Memory;
			decoder.ReadOpMem(ref instruction);
		}
	}
	internal sealed class OpCodeHandler_Evw : OpCodeHandlerModRM
	{
		private readonly Code3 codes;

		public OpCodeHandler_Evw(Code code16, Code code32, Code code64)
		{
			codes = new Code3(code16, code32, code64);
		}

		public unsafe override void Decode(Decoder decoder, ref Instruction instruction)
		{
			nuint num = (nuint)decoder.state.operandSize;
			instruction.InternalSetCodeNoCheck((Code)codes.codes[num]);
			if (decoder.state.mod == 3)
			{
				instruction.Op0Register = (Register)(((int)num << 4) + (int)(decoder.state.rm + decoder.state.zs.extraBaseRegisterBase) + 21);
				return;
			}
			instruction.Op0Kind = OpKind.Memory;
			decoder.ReadOpMem(ref instruction);
		}
	}
	internal sealed class OpCodeHandler_Ew : OpCodeHandlerModRM
	{
		private readonly Code3 codes;

		public OpCodeHandler_Ew(Code code16, Code code32, Code code64)
		{
			codes = new Code3(code16, code32, code64);
		}

		public unsafe override void Decode(Decoder decoder, ref Instruction instruction)
		{
			nuint num = (nuint)decoder.state.operandSize;
			instruction.InternalSetCodeNoCheck((Code)codes.codes[num]);
			if (decoder.state.mod == 3)
			{
				instruction.Op0Register = (Register)(((int)num << 4) + (int)(decoder.state.rm + decoder.state.zs.extraBaseRegisterBase) + 21);
				return;
			}
			instruction.Op0Kind = OpKind.Memory;
			decoder.ReadOpMem(ref instruction);
		}
	}
	internal sealed class OpCodeHandler_Ms : OpCodeHandlerModRM
	{
		private readonly Code code16;

		private readonly Code code32;

		private readonly Code code64;

		public OpCodeHandler_Ms(Code code16, Code code32, Code code64)
		{
			this.code16 = code16;
			this.code32 = code32;
			this.code64 = code64;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if (decoder.is64bMode)
			{
				instruction.InternalSetCodeNoCheck(code64);
			}
			else if (decoder.state.operandSize == OpSize.Size32)
			{
				instruction.InternalSetCodeNoCheck(code32);
			}
			else
			{
				instruction.InternalSetCodeNoCheck(code16);
			}
			instruction.Op0Kind = OpKind.Memory;
			decoder.ReadOpMem(ref instruction);
		}
	}
	internal sealed class OpCodeHandler_Gv_Ev : OpCodeHandlerModRM
	{
		private readonly Code3 codes;

		public OpCodeHandler_Gv_Ev(Code code16, Code code32, Code code64)
		{
			codes = new Code3(code16, code32, code64);
		}

		public unsafe override void Decode(Decoder decoder, ref Instruction instruction)
		{
			nuint num = (nuint)decoder.state.operandSize;
			instruction.InternalSetCodeNoCheck((Code)codes.codes[num]);
			instruction.Op0Register = (Register)(((int)num << 4) + (int)(decoder.state.reg + decoder.state.zs.extraRegisterBase) + 21);
			if (decoder.state.mod < 3)
			{
				instruction.Op1Kind = OpKind.Memory;
				decoder.ReadOpMem(ref instruction);
			}
			else
			{
				instruction.Op1Register = (Register)(((int)num << 4) + (int)(decoder.state.rm + decoder.state.zs.extraBaseRegisterBase) + 21);
			}
		}
	}
	internal sealed class OpCodeHandler_Gd_Rd : OpCodeHandlerModRM
	{
		private readonly Code code;

		public OpCodeHandler_Gd_Rd(Code code)
		{
			this.code = code;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			instruction.InternalSetCodeNoCheck(code);
			instruction.Op0Register = (Register)(decoder.state.reg + decoder.state.zs.extraRegisterBase + 37);
			if (decoder.state.mod == 3)
			{
				instruction.Op1Register = (Register)(decoder.state.rm + decoder.state.zs.extraBaseRegisterBase + 37);
			}
			else
			{
				decoder.SetInvalidInstruction();
			}
		}
	}
	internal sealed class OpCodeHandler_Gv_M_as : OpCodeHandlerModRM
	{
		private readonly Code3 codes;

		public OpCodeHandler_Gv_M_as(Code code16, Code code32, Code code64)
		{
			codes = new Code3(code16, code32, code64);
		}

		public unsafe override void Decode(Decoder decoder, ref Instruction instruction)
		{
			nuint num = (nuint)decoder.state.addressSize;
			instruction.InternalSetCodeNoCheck((Code)codes.codes[num]);
			instruction.Op0Register = (Register)(((int)num << 4) + (int)(decoder.state.reg + decoder.state.zs.extraRegisterBase) + 21);
			if (decoder.state.mod == 3)
			{
				decoder.SetInvalidInstruction();
				return;
			}
			instruction.Op1Kind = OpKind.Memory;
			decoder.ReadOpMem(ref instruction);
		}
	}
	internal sealed class OpCodeHandler_Gdq_Ev : OpCodeHandlerModRM
	{
		private readonly Code3 codes;

		public OpCodeHandler_Gdq_Ev(Code code16, Code code32, Code code64)
		{
			codes = new Code3(code16, code32, code64);
		}

		public unsafe override void Decode(Decoder decoder, ref Instruction instruction)
		{
			nuint num = (nuint)decoder.state.operandSize;
			instruction.InternalSetCodeNoCheck((Code)codes.codes[num]);
			if ((int)num != 2)
			{
				instruction.Op0Register = (Register)(decoder.state.reg + decoder.state.zs.extraRegisterBase + 37);
			}
			else
			{
				instruction.Op0Register = (Register)(decoder.state.reg + decoder.state.zs.extraRegisterBase + 53);
			}
			if (decoder.state.mod == 3)
			{
				instruction.Op1Register = (Register)(((int)num << 4) + (int)(decoder.state.rm + decoder.state.zs.extraBaseRegisterBase) + 21);
				return;
			}
			instruction.Op1Kind = OpKind.Memory;
			decoder.ReadOpMem(ref instruction);
		}
	}
	internal sealed class OpCodeHandler_Gv_Ev3 : OpCodeHandlerModRM
	{
		private readonly Code3 codes;

		public OpCodeHandler_Gv_Ev3(Code code16, Code code32, Code code64)
		{
			codes = new Code3(code16, code32, code64);
		}

		public unsafe override void Decode(Decoder decoder, ref Instruction instruction)
		{
			nuint num = (nuint)decoder.state.operandSize;
			instruction.InternalSetCodeNoCheck((Code)codes.codes[num]);
			instruction.Op0Register = (Register)(((int)num << 4) + (int)(decoder.state.reg + decoder.state.zs.extraRegisterBase) + 21);
			if (decoder.state.mod == 3)
			{
				instruction.Op1Register = (Register)(((int)num << 4) + (int)(decoder.state.rm + decoder.state.zs.extraBaseRegisterBase) + 21);
				return;
			}
			instruction.Op1Kind = OpKind.Memory;
			decoder.ReadOpMem(ref instruction);
		}
	}
	internal sealed class OpCodeHandler_Gv_Ev2 : OpCodeHandlerModRM
	{
		private readonly Code3 codes;

		public OpCodeHandler_Gv_Ev2(Code code16, Code code32, Code code64)
		{
			codes = new Code3(code16, code32, code64);
		}

		public unsafe override void Decode(Decoder decoder, ref Instruction instruction)
		{
			nuint num = (nuint)decoder.state.operandSize;
			instruction.InternalSetCodeNoCheck((Code)codes.codes[num]);
			instruction.Op0Register = (Register)(((int)num << 4) + (int)(decoder.state.reg + decoder.state.zs.extraRegisterBase) + 21);
			if (decoder.state.mod == 3)
			{
				uint num2 = decoder.state.rm + decoder.state.zs.extraBaseRegisterBase;
				if (decoder.state.operandSize != 0)
				{
					instruction.Op1Register = (Register)(num2 + 37);
				}
				else
				{
					instruction.Op1Register = (Register)(num2 + 21);
				}
			}
			else
			{
				instruction.Op1Kind = OpKind.Memory;
				decoder.ReadOpMem(ref instruction);
			}
		}
	}
	internal sealed class OpCodeHandler_R_C : OpCodeHandlerModRM
	{
		private readonly Code code32;

		private readonly Code code64;

		private readonly Register baseReg;

		public OpCodeHandler_R_C(Code code32, Code code64, Register baseReg)
		{
			this.code32 = code32;
			this.code64 = code64;
			this.baseReg = baseReg;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if (decoder.is64bMode)
			{
				instruction.InternalSetCodeNoCheck(code64);
				instruction.Op0Register = (Register)(decoder.state.rm + decoder.state.zs.extraBaseRegisterBase + 53);
			}
			else
			{
				instruction.InternalSetCodeNoCheck(code32);
				instruction.Op0Register = (Register)(decoder.state.rm + decoder.state.zs.extraBaseRegisterBase + 37);
			}
			uint num = decoder.state.zs.extraRegisterBase;
			if (baseReg == Register.CR0 && instruction.HasLockPrefix && (decoder.options & DecoderOptions.AMD) != 0)
			{
				if ((num & decoder.invalidCheckMask) != 0)
				{
					decoder.SetInvalidInstruction();
				}
				num = 8u;
				instruction.InternalClearHasLockPrefix();
				decoder.state.zs.flags &= ~StateFlags.Lock;
			}
			int num2 = (int)(decoder.state.reg + num);
			if (decoder.invalidCheckMask != 0)
			{
				if (baseReg == Register.CR0)
				{
					if (num2 == 1 || (num2 != 8 && num2 >= 5))
					{
						decoder.SetInvalidInstruction();
					}
				}
				else if (baseReg == Register.DR0 && num2 > 7)
				{
					decoder.SetInvalidInstruction();
				}
			}
			instruction.Op1Register = num2 + baseReg;
		}
	}
	internal sealed class OpCodeHandler_C_R : OpCodeHandlerModRM
	{
		private readonly Code code32;

		private readonly Code code64;

		private readonly Register baseReg;

		public OpCodeHandler_C_R(Code code32, Code code64, Register baseReg)
		{
			this.code32 = code32;
			this.code64 = code64;
			this.baseReg = baseReg;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if (decoder.is64bMode)
			{
				instruction.InternalSetCodeNoCheck(code64);
				instruction.Op1Register = (Register)(decoder.state.rm + decoder.state.zs.extraBaseRegisterBase + 53);
			}
			else
			{
				instruction.InternalSetCodeNoCheck(code32);
				instruction.Op1Register = (Register)(decoder.state.rm + decoder.state.zs.extraBaseRegisterBase + 37);
			}
			uint num = decoder.state.zs.extraRegisterBase;
			if (baseReg == Register.CR0 && instruction.HasLockPrefix && (decoder.options & DecoderOptions.AMD) != 0)
			{
				if ((num & decoder.invalidCheckMask) != 0)
				{
					decoder.SetInvalidInstruction();
				}
				num = 8u;
				instruction.InternalClearHasLockPrefix();
				decoder.state.zs.flags &= ~StateFlags.Lock;
			}
			int num2 = (int)(decoder.state.reg + num);
			if (decoder.invalidCheckMask != 0)
			{
				if (baseReg == Register.CR0)
				{
					if (num2 == 1 || (num2 != 8 && num2 >= 5))
					{
						decoder.SetInvalidInstruction();
					}
				}
				else if (baseReg == Register.DR0 && num2 > 7)
				{
					decoder.SetInvalidInstruction();
				}
			}
			instruction.Op0Register = num2 + baseReg;
		}
	}
	internal sealed class OpCodeHandler_Jb : OpCodeHandler
	{
		private readonly Code code16;

		private readonly Code code32;

		private readonly Code code64;

		public OpCodeHandler_Jb(Code code16, Code code32, Code code64)
		{
			this.code16 = code16;
			this.code32 = code32;
			this.code64 = code64;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			decoder.state.zs.flags |= StateFlags.BranchImm8;
			if (decoder.is64bMode)
			{
				if ((decoder.options & DecoderOptions.AMD) == 0 || decoder.state.operandSize != 0)
				{
					instruction.InternalSetCodeNoCheck(code64);
					instruction.Op0Kind = OpKind.NearBranch64;
					instruction.NearBranch64 = (ulong)(sbyte)decoder.ReadByte() + decoder.GetCurrentInstructionPointer64();
				}
				else
				{
					instruction.InternalSetCodeNoCheck(code16);
					instruction.Op0Kind = OpKind.NearBranch16;
					instruction.InternalNearBranch16 = (ushort)((uint)(sbyte)decoder.ReadByte() + decoder.GetCurrentInstructionPointer32());
				}
			}
			else if (decoder.state.operandSize != 0)
			{
				instruction.InternalSetCodeNoCheck(code32);
				instruction.Op0Kind = OpKind.NearBranch32;
				instruction.NearBranch32 = (uint)(sbyte)decoder.ReadByte() + decoder.GetCurrentInstructionPointer32();
			}
			else
			{
				instruction.InternalSetCodeNoCheck(code16);
				instruction.Op0Kind = OpKind.NearBranch16;
				instruction.InternalNearBranch16 = (ushort)((uint)(sbyte)decoder.ReadByte() + decoder.GetCurrentInstructionPointer32());
			}
		}
	}
	internal sealed class OpCodeHandler_Jx : OpCodeHandler
	{
		private readonly Code code16;

		private readonly Code code32;

		private readonly Code code64;

		public OpCodeHandler_Jx(Code code16, Code code32, Code code64)
		{
			this.code16 = code16;
			this.code32 = code32;
			this.code64 = code64;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			decoder.state.zs.flags |= StateFlags.Xbegin;
			if (decoder.is64bMode)
			{
				if (decoder.state.operandSize == OpSize.Size32)
				{
					instruction.InternalSetCodeNoCheck(code32);
					instruction.Op0Kind = OpKind.NearBranch64;
					instruction.NearBranch64 = (ulong)(int)decoder.ReadUInt32() + decoder.GetCurrentInstructionPointer64();
				}
				else if (decoder.state.operandSize == OpSize.Size64)
				{
					instruction.InternalSetCodeNoCheck(code64);
					instruction.Op0Kind = OpKind.NearBranch64;
					instruction.NearBranch64 = (ulong)(int)decoder.ReadUInt32() + decoder.GetCurrentInstructionPointer64();
				}
				else
				{
					instruction.InternalSetCodeNoCheck(code16);
					instruction.Op0Kind = OpKind.NearBranch64;
					instruction.NearBranch64 = (ulong)(short)decoder.ReadUInt16() + decoder.GetCurrentInstructionPointer64();
				}
			}
			else if (decoder.state.operandSize == OpSize.Size32)
			{
				instruction.InternalSetCodeNoCheck(code32);
				instruction.Op0Kind = OpKind.NearBranch32;
				instruction.NearBranch32 = decoder.ReadUInt32() + decoder.GetCurrentInstructionPointer32();
			}
			else
			{
				instruction.InternalSetCodeNoCheck(code16);
				instruction.Op0Kind = OpKind.NearBranch32;
				instruction.NearBranch32 = (uint)(short)decoder.ReadUInt16() + decoder.GetCurrentInstructionPointer32();
			}
		}
	}
	internal sealed class OpCodeHandler_Jz : OpCodeHandler
	{
		private readonly Code code16;

		private readonly Code code32;

		private readonly Code code64;

		public OpCodeHandler_Jz(Code code16, Code code32, Code code64)
		{
			this.code16 = code16;
			this.code32 = code32;
			this.code64 = code64;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if (decoder.is64bMode)
			{
				if ((decoder.options & DecoderOptions.AMD) == 0 || decoder.state.operandSize != 0)
				{
					instruction.InternalSetCodeNoCheck(code64);
					instruction.Op0Kind = OpKind.NearBranch64;
					instruction.NearBranch64 = (ulong)(int)decoder.ReadUInt32() + decoder.GetCurrentInstructionPointer64();
				}
				else
				{
					instruction.InternalSetCodeNoCheck(code16);
					instruction.Op0Kind = OpKind.NearBranch16;
					instruction.InternalNearBranch16 = (ushort)(decoder.ReadUInt16() + decoder.GetCurrentInstructionPointer32());
				}
			}
			else if (decoder.state.operandSize != 0)
			{
				instruction.InternalSetCodeNoCheck(code32);
				instruction.Op0Kind = OpKind.NearBranch32;
				instruction.NearBranch32 = decoder.ReadUInt32() + decoder.GetCurrentInstructionPointer32();
			}
			else
			{
				instruction.InternalSetCodeNoCheck(code16);
				instruction.Op0Kind = OpKind.NearBranch16;
				instruction.InternalNearBranch16 = (ushort)(decoder.ReadUInt16() + decoder.GetCurrentInstructionPointer32());
			}
		}
	}
	internal sealed class OpCodeHandler_Jb2 : OpCodeHandler
	{
		private readonly Code code16_16;

		private readonly Code code16_32;

		private readonly Code code16_64;

		private readonly Code code32_16;

		private readonly Code code32_32;

		private readonly Code code64_32;

		private readonly Code code64_64;

		public OpCodeHandler_Jb2(Code code16_16, Code code16_32, Code code16_64, Code code32_16, Code code32_32, Code code64_32, Code code64_64)
		{
			this.code16_16 = code16_16;
			this.code16_32 = code16_32;
			this.code16_64 = code16_64;
			this.code32_16 = code32_16;
			this.code32_32 = code32_32;
			this.code64_32 = code64_32;
			this.code64_64 = code64_64;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			decoder.state.zs.flags |= StateFlags.BranchImm8;
			if (decoder.is64bMode)
			{
				if ((decoder.options & DecoderOptions.AMD) == 0 || decoder.state.operandSize != 0)
				{
					if (decoder.state.addressSize == OpSize.Size64)
					{
						instruction.InternalSetCodeNoCheck(code64_64);
					}
					else
					{
						instruction.InternalSetCodeNoCheck(code64_32);
					}
					instruction.Op0Kind = OpKind.NearBranch64;
					instruction.NearBranch64 = (ulong)(sbyte)decoder.ReadByte() + decoder.GetCurrentInstructionPointer64();
				}
				else
				{
					if (decoder.state.addressSize == OpSize.Size64)
					{
						instruction.InternalSetCodeNoCheck(code16_64);
					}
					else
					{
						instruction.InternalSetCodeNoCheck(code16_32);
					}
					instruction.Op0Kind = OpKind.NearBranch16;
					instruction.InternalNearBranch16 = (ushort)((uint)(sbyte)decoder.ReadByte() + decoder.GetCurrentInstructionPointer32());
				}
			}
			else if (decoder.state.operandSize == OpSize.Size32)
			{
				if (decoder.state.addressSize == OpSize.Size32)
				{
					instruction.InternalSetCodeNoCheck(code32_32);
				}
				else
				{
					instruction.InternalSetCodeNoCheck(code32_16);
				}
				instruction.Op0Kind = OpKind.NearBranch32;
				instruction.NearBranch32 = (uint)(sbyte)decoder.ReadByte() + decoder.GetCurrentInstructionPointer32();
			}
			else
			{
				if (decoder.state.addressSize == OpSize.Size32)
				{
					instruction.InternalSetCodeNoCheck(code16_32);
				}
				else
				{
					instruction.InternalSetCodeNoCheck(code16_16);
				}
				instruction.Op0Kind = OpKind.NearBranch16;
				instruction.InternalNearBranch16 = (ushort)((uint)(sbyte)decoder.ReadByte() + decoder.GetCurrentInstructionPointer32());
			}
		}
	}
	internal sealed class OpCodeHandler_Jdisp : OpCodeHandler
	{
		private readonly Code code16;

		private readonly Code code32;

		public OpCodeHandler_Jdisp(Code code16, Code code32)
		{
			this.code16 = code16;
			this.code32 = code32;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if (decoder.state.operandSize != 0)
			{
				instruction.InternalSetCodeNoCheck(code32);
				instruction.Op0Kind = OpKind.NearBranch32;
				instruction.NearBranch32 = decoder.ReadUInt32();
			}
			else
			{
				instruction.InternalSetCodeNoCheck(code16);
				instruction.Op0Kind = OpKind.NearBranch16;
				instruction.InternalNearBranch16 = decoder.ReadUInt16();
			}
		}
	}
	internal sealed class OpCodeHandler_PushOpSizeReg : OpCodeHandler
	{
		private readonly Code code16;

		private readonly Code code32;

		private readonly Code code64;

		private readonly Register reg;

		public OpCodeHandler_PushOpSizeReg(Code code16, Code code32, Code code64, Register reg)
		{
			this.code16 = code16;
			this.code32 = code32;
			this.code64 = code64;
			this.reg = reg;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if (decoder.is64bMode)
			{
				if (decoder.state.operandSize != 0)
				{
					instruction.InternalSetCodeNoCheck(code64);
				}
				else
				{
					instruction.InternalSetCodeNoCheck(code16);
				}
			}
			else if (decoder.state.operandSize == OpSize.Size32)
			{
				instruction.InternalSetCodeNoCheck(code32);
			}
			else
			{
				instruction.InternalSetCodeNoCheck(code16);
			}
			instruction.Op0Register = reg;
		}
	}
	internal sealed class OpCodeHandler_PushEv : OpCodeHandlerModRM
	{
		private readonly Code code16;

		private readonly Code code32;

		private readonly Code code64;

		public OpCodeHandler_PushEv(Code code16, Code code32, Code code64)
		{
			this.code16 = code16;
			this.code32 = code32;
			this.code64 = code64;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if (decoder.is64bMode)
			{
				if (decoder.state.operandSize != 0)
				{
					instruction.InternalSetCodeNoCheck(code64);
				}
				else
				{
					instruction.InternalSetCodeNoCheck(code16);
				}
			}
			else if (decoder.state.operandSize == OpSize.Size32)
			{
				instruction.InternalSetCodeNoCheck(code32);
			}
			else
			{
				instruction.InternalSetCodeNoCheck(code16);
			}
			if (decoder.state.mod == 3)
			{
				uint num = decoder.state.rm + decoder.state.zs.extraBaseRegisterBase;
				if (decoder.is64bMode)
				{
					if (decoder.state.operandSize != 0)
					{
						instruction.Op0Register = (Register)(num + 53);
					}
					else
					{
						instruction.Op0Register = (Register)(num + 21);
					}
				}
				else if (decoder.state.operandSize == OpSize.Size32)
				{
					instruction.Op0Register = (Register)(num + 37);
				}
				else
				{
					instruction.Op0Register = (Register)(num + 21);
				}
			}
			else
			{
				instruction.Op0Kind = OpKind.Memory;
				decoder.ReadOpMem(ref instruction);
			}
		}
	}
	internal sealed class OpCodeHandler_Ev_Gv : OpCodeHandlerModRM
	{
		private readonly Code3 codes;

		private readonly HandlerFlags flags;

		public OpCodeHandler_Ev_Gv(Code code16, Code code32, Code code64)
		{
			codes = new Code3(code16, code32, code64);
		}

		public OpCodeHandler_Ev_Gv(Code code16, Code code32, Code code64, HandlerFlags flags)
		{
			codes = new Code3(code16, code32, code64);
			this.flags = flags;
		}

		public unsafe override void Decode(Decoder decoder, ref Instruction instruction)
		{
			nuint num = (nuint)decoder.state.operandSize;
			instruction.InternalSetCodeNoCheck((Code)codes.codes[num]);
			instruction.Op1Register = (Register)(((int)num << 4) + (int)(decoder.state.reg + decoder.state.zs.extraRegisterBase) + 21);
			if (decoder.state.mod == 3)
			{
				instruction.Op0Register = (Register)(((int)num << 4) + (int)(decoder.state.rm + decoder.state.zs.extraBaseRegisterBase) + 21);
				return;
			}
			decoder.state.zs.flags |= (StateFlags)((uint)(flags & HandlerFlags.Lock) << 10);
			instruction.Op0Kind = OpKind.Memory;
			decoder.ReadOpMem(ref instruction);
		}
	}
	internal sealed class OpCodeHandler_Ev_Gv_32_64 : OpCodeHandlerModRM
	{
		private readonly Code code32;

		private readonly Code code64;

		public OpCodeHandler_Ev_Gv_32_64(Code code32, Code code64)
		{
			this.code32 = code32;
			this.code64 = code64;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			Register register;
			if (decoder.is64bMode)
			{
				instruction.InternalSetCodeNoCheck(code64);
				register = Register.RAX;
			}
			else
			{
				instruction.InternalSetCodeNoCheck(code32);
				register = Register.EAX;
			}
			instruction.Op1Register = (Register)((int)(decoder.state.reg + decoder.state.zs.extraRegisterBase) + (int)register);
			if (decoder.state.mod == 3)
			{
				instruction.Op0Register = (Register)((int)(decoder.state.rm + decoder.state.zs.extraBaseRegisterBase) + (int)register);
				return;
			}
			instruction.Op0Kind = OpKind.Memory;
			decoder.ReadOpMem(ref instruction);
		}
	}
	internal sealed class OpCodeHandler_Ev_Gv_Ib : OpCodeHandlerModRM
	{
		private readonly Code3 codes;

		public OpCodeHandler_Ev_Gv_Ib(Code code16, Code code32, Code code64)
		{
			codes = new Code3(code16, code32, code64);
		}

		public unsafe override void Decode(Decoder decoder, ref Instruction instruction)
		{
			nuint num = (nuint)decoder.state.operandSize;
			instruction.InternalSetCodeNoCheck((Code)codes.codes[num]);
			instruction.Op1Register = (Register)(((int)num << 4) + (int)(decoder.state.reg + decoder.state.zs.extraRegisterBase) + 21);
			if (decoder.state.mod == 3)
			{
				instruction.Op0Register = (Register)(((int)num << 4) + (int)(decoder.state.rm + decoder.state.zs.extraBaseRegisterBase) + 21);
			}
			else
			{
				instruction.Op0Kind = OpKind.Memory;
				decoder.ReadOpMem(ref instruction);
			}
			instruction.Op2Kind = OpKind.Immediate8;
			instruction.InternalImmediate8 = decoder.ReadByte();
		}
	}
	internal sealed class OpCodeHandler_Ev_Gv_CL : OpCodeHandlerModRM
	{
		private readonly Code3 codes;

		public OpCodeHandler_Ev_Gv_CL(Code code16, Code code32, Code code64)
		{
			codes = new Code3(code16, code32, code64);
		}

		public unsafe override void Decode(Decoder decoder, ref Instruction instruction)
		{
			instruction.Op2Register = Register.CL;
			nuint num = (nuint)decoder.state.operandSize;
			instruction.InternalSetCodeNoCheck((Code)codes.codes[num]);
			instruction.Op1Register = (Register)(((int)num << 4) + (int)(decoder.state.reg + decoder.state.zs.extraRegisterBase) + 21);
			if (decoder.state.mod == 3)
			{
				instruction.Op0Register = (Register)(((int)num << 4) + (int)(decoder.state.rm + decoder.state.zs.extraBaseRegisterBase) + 21);
				return;
			}
			instruction.Op0Kind = OpKind.Memory;
			decoder.ReadOpMem(ref instruction);
		}
	}
	internal sealed class OpCodeHandler_Gv_Mp : OpCodeHandlerModRM
	{
		private readonly Code code16;

		private readonly Code code32;

		private readonly Code code64;

		public OpCodeHandler_Gv_Mp(Code code16, Code code32, Code code64)
		{
			this.code16 = code16;
			this.code32 = code32;
			this.code64 = code64;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if (decoder.state.operandSize == OpSize.Size64 && (decoder.options & DecoderOptions.AMD) == 0)
			{
				instruction.InternalSetCodeNoCheck(code64);
				instruction.Op0Register = (Register)(decoder.state.reg + decoder.state.zs.extraRegisterBase + 53);
			}
			else if (decoder.state.operandSize == OpSize.Size16)
			{
				instruction.InternalSetCodeNoCheck(code16);
				instruction.Op0Register = (Register)(decoder.state.reg + decoder.state.zs.extraRegisterBase + 21);
			}
			else
			{
				instruction.InternalSetCodeNoCheck(code32);
				instruction.Op0Register = (Register)(decoder.state.reg + decoder.state.zs.extraRegisterBase + 37);
			}
			if (decoder.state.mod == 3)
			{
				decoder.SetInvalidInstruction();
				return;
			}
			instruction.Op1Kind = OpKind.Memory;
			decoder.ReadOpMem(ref instruction);
		}
	}
	internal sealed class OpCodeHandler_Gv_Eb : OpCodeHandlerModRM
	{
		private readonly Code3 codes;

		public OpCodeHandler_Gv_Eb(Code code16, Code code32, Code code64)
		{
			codes = new Code3(code16, code32, code64);
		}

		public unsafe override void Decode(Decoder decoder, ref Instruction instruction)
		{
			nuint num = (nuint)decoder.state.operandSize;
			instruction.InternalSetCodeNoCheck((Code)codes.codes[num]);
			instruction.Op0Register = (Register)(((int)num << 4) + (int)(decoder.state.reg + decoder.state.zs.extraRegisterBase) + 21);
			if (decoder.state.mod == 3)
			{
				uint num2 = decoder.state.rm + decoder.state.zs.extraBaseRegisterBase;
				if ((decoder.state.zs.flags & StateFlags.HasRex) != 0 && num2 >= 4)
				{
					num2 += 4;
				}
				instruction.Op1Register = (Register)(num2 + 1);
			}
			else
			{
				instruction.Op1Kind = OpKind.Memory;
				decoder.ReadOpMem(ref instruction);
			}
		}
	}
	internal sealed class OpCodeHandler_Gv_Ew : OpCodeHandlerModRM
	{
		private readonly Code3 codes;

		public OpCodeHandler_Gv_Ew(Code code16, Code code32, Code code64)
		{
			codes = new Code3(code16, code32, code64);
		}

		public unsafe override void Decode(Decoder decoder, ref Instruction instruction)
		{
			nuint num = (nuint)decoder.state.operandSize;
			instruction.InternalSetCodeNoCheck((Code)codes.codes[num]);
			instruction.Op0Register = (Register)(((int)num << 4) + (int)(decoder.state.reg + decoder.state.zs.extraRegisterBase) + 21);
			if (decoder.state.mod == 3)
			{
				instruction.Op1Register = (Register)(decoder.state.rm + decoder.state.zs.extraBaseRegisterBase + 21);
				return;
			}
			instruction.Op1Kind = OpKind.Memory;
			decoder.ReadOpMem(ref instruction);
		}
	}
	internal sealed class OpCodeHandler_PushSimple2 : OpCodeHandler
	{
		private readonly Code code16;

		private readonly Code code32;

		private readonly Code code64;

		public OpCodeHandler_PushSimple2(Code code16, Code code32, Code code64)
		{
			this.code16 = code16;
			this.code32 = code32;
			this.code64 = code64;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if (decoder.is64bMode)
			{
				if (decoder.state.operandSize != 0)
				{
					instruction.InternalSetCodeNoCheck(code64);
				}
				else
				{
					instruction.InternalSetCodeNoCheck(code16);
				}
			}
			else if (decoder.state.operandSize == OpSize.Size32)
			{
				instruction.InternalSetCodeNoCheck(code32);
			}
			else
			{
				instruction.InternalSetCodeNoCheck(code16);
			}
		}
	}
	internal sealed class OpCodeHandler_Simple2 : OpCodeHandler
	{
		private readonly Code3 codes;

		public OpCodeHandler_Simple2(Code code16, Code code32, Code code64)
		{
			codes = new Code3(code16, code32, code64);
		}

		public unsafe override void Decode(Decoder decoder, ref Instruction instruction)
		{
			nuint num = (nuint)decoder.state.operandSize;
			instruction.InternalSetCodeNoCheck((Code)codes.codes[num]);
		}
	}
	internal sealed class OpCodeHandler_Simple2Iw : OpCodeHandler
	{
		private readonly Code3 codes;

		public OpCodeHandler_Simple2Iw(Code code16, Code code32, Code code64)
		{
			codes = new Code3(code16, code32, code64);
		}

		public unsafe override void Decode(Decoder decoder, ref Instruction instruction)
		{
			nuint num = (nuint)decoder.state.operandSize;
			instruction.InternalSetCodeNoCheck((Code)codes.codes[num]);
			instruction.Op0Kind = OpKind.Immediate16;
			instruction.InternalImmediate16 = decoder.ReadUInt16();
		}
	}
	internal sealed class OpCodeHandler_Simple3 : OpCodeHandler
	{
		private readonly Code code16;

		private readonly Code code32;

		private readonly Code code64;

		public OpCodeHandler_Simple3(Code code16, Code code32, Code code64)
		{
			this.code16 = code16;
			this.code32 = code32;
			this.code64 = code64;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if (decoder.is64bMode)
			{
				if (decoder.state.operandSize != 0)
				{
					instruction.InternalSetCodeNoCheck(code64);
				}
				else
				{
					instruction.InternalSetCodeNoCheck(code16);
				}
			}
			else if (decoder.state.operandSize == OpSize.Size32)
			{
				instruction.InternalSetCodeNoCheck(code32);
			}
			else
			{
				instruction.InternalSetCodeNoCheck(code16);
			}
		}
	}
	internal sealed class OpCodeHandler_Simple5 : OpCodeHandler
	{
		private readonly Code3 codes;

		public OpCodeHandler_Simple5(Code code16, Code code32, Code code64)
		{
			codes = new Code3(code16, code32, code64);
		}

		public unsafe override void Decode(Decoder decoder, ref Instruction instruction)
		{
			nuint num = (nuint)decoder.state.addressSize;
			instruction.InternalSetCodeNoCheck((Code)codes.codes[num]);
		}
	}
	internal sealed class OpCodeHandler_Simple5_a32 : OpCodeHandler
	{
		private readonly Code3 codes;

		public OpCodeHandler_Simple5_a32(Code code16, Code code32, Code code64)
		{
			codes = new Code3(code16, code32, code64);
		}

		public unsafe override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if (decoder.state.addressSize != OpSize.Size32 && decoder.invalidCheckMask != 0)
			{
				decoder.SetInvalidInstruction();
			}
			nuint num = (nuint)decoder.state.addressSize;
			instruction.InternalSetCodeNoCheck((Code)codes.codes[num]);
		}
	}
	internal sealed class OpCodeHandler_Simple5_ModRM_as : OpCodeHandlerModRM
	{
		private readonly Code3 codes;

		public OpCodeHandler_Simple5_ModRM_as(Code code16, Code code32, Code code64)
		{
			codes = new Code3(code16, code32, code64);
		}

		public unsafe override void Decode(Decoder decoder, ref Instruction instruction)
		{
			nuint num = (nuint)decoder.state.addressSize;
			instruction.InternalSetCodeNoCheck((Code)codes.codes[num]);
			instruction.Op0Register = (Register)(((int)num << 4) + (int)(decoder.state.rm + decoder.state.zs.extraBaseRegisterBase) + 21);
		}
	}
	internal sealed class OpCodeHandler_Simple4 : OpCodeHandler
	{
		private readonly Code code32;

		private readonly Code code64;

		public OpCodeHandler_Simple4(Code code32, Code code64)
		{
			this.code32 = code32;
			this.code64 = code64;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if ((decoder.state.zs.flags & StateFlags.W) != 0)
			{
				instruction.InternalSetCodeNoCheck(code64);
			}
			else
			{
				instruction.InternalSetCodeNoCheck(code32);
			}
		}
	}
	internal sealed class OpCodeHandler_PushSimpleReg : OpCodeHandler
	{
		private readonly int index;

		private readonly Code code16;

		private readonly Code code32;

		private readonly Code code64;

		public OpCodeHandler_PushSimpleReg(int index, Code code16, Code code32, Code code64)
		{
			this.index = index;
			this.code16 = code16;
			this.code32 = code32;
			this.code64 = code64;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if (decoder.is64bMode)
			{
				if (decoder.state.operandSize != 0)
				{
					instruction.InternalSetCodeNoCheck(code64);
					instruction.Op0Register = (Register)(index + (int)decoder.state.zs.extraBaseRegisterBase + 53);
				}
				else
				{
					instruction.InternalSetCodeNoCheck(code16);
					instruction.Op0Register = (Register)(index + (int)decoder.state.zs.extraBaseRegisterBase + 21);
				}
			}
			else if (decoder.state.operandSize == OpSize.Size32)
			{
				instruction.InternalSetCodeNoCheck(code32);
				instruction.Op0Register = (Register)(index + (int)decoder.state.zs.extraBaseRegisterBase + 37);
			}
			else
			{
				instruction.InternalSetCodeNoCheck(code16);
				instruction.Op0Register = (Register)(index + (int)decoder.state.zs.extraBaseRegisterBase + 21);
			}
		}
	}
	internal sealed class OpCodeHandler_SimpleReg : OpCodeHandler
	{
		private readonly Code code;

		private readonly int index;

		public OpCodeHandler_SimpleReg(Code code, int index)
		{
			this.code = code;
			this.index = index;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			int operandSize = (int)decoder.state.operandSize;
			instruction.InternalSetCodeNoCheck(operandSize + code);
			instruction.Op0Register = (Register)(operandSize * 16 + index + (int)decoder.state.zs.extraBaseRegisterBase + 21);
		}
	}
	internal sealed class OpCodeHandler_Xchg_Reg_rAX : OpCodeHandler
	{
		private readonly int index;

		private readonly Code[] codes;

		private static readonly Code[] s_codes = new Code[48]
		{
			Code.Nopw,
			Code.Xchg_r16_AX,
			Code.Xchg_r16_AX,
			Code.Xchg_r16_AX,
			Code.Xchg_r16_AX,
			Code.Xchg_r16_AX,
			Code.Xchg_r16_AX,
			Code.Xchg_r16_AX,
			Code.Xchg_r16_AX,
			Code.Xchg_r16_AX,
			Code.Xchg_r16_AX,
			Code.Xchg_r16_AX,
			Code.Xchg_r16_AX,
			Code.Xchg_r16_AX,
			Code.Xchg_r16_AX,
			Code.Xchg_r16_AX,
			Code.Nopd,
			Code.Xchg_r32_EAX,
			Code.Xchg_r32_EAX,
			Code.Xchg_r32_EAX,
			Code.Xchg_r32_EAX,
			Code.Xchg_r32_EAX,
			Code.Xchg_r32_EAX,
			Code.Xchg_r32_EAX,
			Code.Xchg_r32_EAX,
			Code.Xchg_r32_EAX,
			Code.Xchg_r32_EAX,
			Code.Xchg_r32_EAX,
			Code.Xchg_r32_EAX,
			Code.Xchg_r32_EAX,
			Code.Xchg_r32_EAX,
			Code.Xchg_r32_EAX,
			Code.Nopq,
			Code.Xchg_r64_RAX,
			Code.Xchg_r64_RAX,
			Code.Xchg_r64_RAX,
			Code.Xchg_r64_RAX,
			Code.Xchg_r64_RAX,
			Code.Xchg_r64_RAX,
			Code.Xchg_r64_RAX,
			Code.Xchg_r64_RAX,
			Code.Xchg_r64_RAX,
			Code.Xchg_r64_RAX,
			Code.Xchg_r64_RAX,
			Code.Xchg_r64_RAX,
			Code.Xchg_r64_RAX,
			Code.Xchg_r64_RAX,
			Code.Xchg_r64_RAX
		};

		public OpCodeHandler_Xchg_Reg_rAX(int index)
		{
			this.index = index;
			codes = s_codes;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if (index == 0 && decoder.state.zs.mandatoryPrefix == MandatoryPrefixByte.PF3 && (decoder.options & DecoderOptions.NoPause) == 0)
			{
				decoder.ClearMandatoryPrefixF3(ref instruction);
				instruction.InternalSetCodeNoCheck(Code.Pause);
				return;
			}
			int operandSize = (int)decoder.state.operandSize;
			int num = index + (int)decoder.state.zs.extraBaseRegisterBase;
			instruction.InternalSetCodeNoCheck(codes[operandSize * 16 + num]);
			if (num != 0)
			{
				Register op0Register = (Register)(operandSize * 16 + num + 21);
				instruction.Op0Register = op0Register;
				instruction.Op1Register = (Register)(operandSize * 16 + 21);
			}
		}
	}
	internal sealed class OpCodeHandler_Reg_Iz : OpCodeHandler
	{
		private readonly Code code16;

		private readonly Code code32;

		private readonly Code code64;

		public OpCodeHandler_Reg_Iz(Code code16, Code code32, Code code64)
		{
			this.code16 = code16;
			this.code32 = code32;
			this.code64 = code64;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if (decoder.state.operandSize == OpSize.Size32)
			{
				instruction.InternalSetCodeNoCheck(code32);
				instruction.Op0Register = Register.EAX;
				instruction.Op1Kind = OpKind.Immediate32;
				instruction.Immediate32 = decoder.ReadUInt32();
			}
			else if (decoder.state.operandSize == OpSize.Size64)
			{
				instruction.InternalSetCodeNoCheck(code64);
				instruction.Op0Register = Register.RAX;
				instruction.Op1Kind = OpKind.Immediate32to64;
				instruction.Immediate32 = decoder.ReadUInt32();
			}
			else
			{
				instruction.InternalSetCodeNoCheck(code16);
				instruction.Op0Register = Register.AX;
				instruction.Op1Kind = OpKind.Immediate16;
				instruction.InternalImmediate16 = decoder.ReadUInt16();
			}
		}
	}
	internal sealed class OpCodeHandler_RegIb3 : OpCodeHandler
	{
		private readonly int index;

		private readonly Register[] withRexPrefix;

		private static readonly Register[] s_withRexPrefix = new Register[16]
		{
			Register.AL,
			Register.CL,
			Register.DL,
			Register.BL,
			Register.SPL,
			Register.BPL,
			Register.SIL,
			Register.DIL,
			Register.R8L,
			Register.R9L,
			Register.R10L,
			Register.R11L,
			Register.R12L,
			Register.R13L,
			Register.R14L,
			Register.R15L
		};

		public OpCodeHandler_RegIb3(int index)
		{
			this.index = index;
			withRexPrefix = s_withRexPrefix;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			Register op0Register = (((decoder.state.zs.flags & StateFlags.HasRex) == 0) ? ((Register)(index + 1)) : withRexPrefix[index + (int)decoder.state.zs.extraBaseRegisterBase]);
			instruction.InternalSetCodeNoCheck(Code.Mov_r8_imm8);
			instruction.Op0Register = op0Register;
			instruction.Op1Kind = OpKind.Immediate8;
			instruction.InternalImmediate8 = decoder.ReadByte();
		}
	}
	internal sealed class OpCodeHandler_RegIz2 : OpCodeHandler
	{
		private readonly int index;

		public OpCodeHandler_RegIz2(int index)
		{
			this.index = index;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if (decoder.state.operandSize == OpSize.Size32)
			{
				instruction.InternalSetCodeNoCheck(Code.Mov_r32_imm32);
				instruction.Op0Register = (Register)(index + (int)decoder.state.zs.extraBaseRegisterBase + 37);
				instruction.Op1Kind = OpKind.Immediate32;
				instruction.Immediate32 = decoder.ReadUInt32();
			}
			else if (decoder.state.operandSize == OpSize.Size64)
			{
				instruction.InternalSetCodeNoCheck(Code.Mov_r64_imm64);
				instruction.Op0Register = (Register)(index + (int)decoder.state.zs.extraBaseRegisterBase + 53);
				instruction.Op1Kind = OpKind.Immediate64;
				instruction.InternalImmediate64_lo = decoder.ReadUInt32();
				instruction.InternalImmediate64_hi = decoder.ReadUInt32();
			}
			else
			{
				instruction.InternalSetCodeNoCheck(Code.Mov_r16_imm16);
				instruction.Op0Register = (Register)(index + (int)decoder.state.zs.extraBaseRegisterBase + 21);
				instruction.Op1Kind = OpKind.Immediate16;
				instruction.InternalImmediate16 = decoder.ReadUInt16();
			}
		}
	}
	internal sealed class OpCodeHandler_PushIb2 : OpCodeHandler
	{
		private readonly Code code16;

		private readonly Code code32;

		private readonly Code code64;

		public OpCodeHandler_PushIb2(Code code16, Code code32, Code code64)
		{
			this.code16 = code16;
			this.code32 = code32;
			this.code64 = code64;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if (decoder.is64bMode)
			{
				if (decoder.state.operandSize != 0)
				{
					instruction.InternalSetCodeNoCheck(code64);
					instruction.Op0Kind = OpKind.Immediate8to64;
					instruction.InternalImmediate8 = decoder.ReadByte();
				}
				else
				{
					instruction.InternalSetCodeNoCheck(code16);
					instruction.Op0Kind = OpKind.Immediate8to16;
					instruction.InternalImmediate8 = decoder.ReadByte();
				}
			}
			else if (decoder.state.operandSize == OpSize.Size32)
			{
				instruction.InternalSetCodeNoCheck(code32);
				instruction.Op0Kind = OpKind.Immediate8to32;
				instruction.InternalImmediate8 = decoder.ReadByte();
			}
			else
			{
				instruction.InternalSetCodeNoCheck(code16);
				instruction.Op0Kind = OpKind.Immediate8to16;
				instruction.InternalImmediate8 = decoder.ReadByte();
			}
		}
	}
	internal sealed class OpCodeHandler_PushIz : OpCodeHandler
	{
		private readonly Code code16;

		private readonly Code code32;

		private readonly Code code64;

		public OpCodeHandler_PushIz(Code code16, Code code32, Code code64)
		{
			this.code16 = code16;
			this.code32 = code32;
			this.code64 = code64;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if (decoder.is64bMode)
			{
				if (decoder.state.operandSize != 0)
				{
					instruction.InternalSetCodeNoCheck(code64);
					instruction.Op0Kind = OpKind.Immediate32to64;
					instruction.Immediate32 = decoder.ReadUInt32();
				}
				else
				{
					instruction.InternalSetCodeNoCheck(code16);
					instruction.Op0Kind = OpKind.Immediate16;
					instruction.InternalImmediate16 = decoder.ReadUInt16();
				}
			}
			else if (decoder.state.operandSize == OpSize.Size32)
			{
				instruction.InternalSetCodeNoCheck(code32);
				instruction.Op0Kind = OpKind.Immediate32;
				instruction.Immediate32 = decoder.ReadUInt32();
			}
			else
			{
				instruction.InternalSetCodeNoCheck(code16);
				instruction.Op0Kind = OpKind.Immediate16;
				instruction.InternalImmediate16 = decoder.ReadUInt16();
			}
		}
	}
	internal sealed class OpCodeHandler_Gv_Ma : OpCodeHandlerModRM
	{
		private readonly Code code16;

		private readonly Code code32;

		public OpCodeHandler_Gv_Ma(Code code16, Code code32)
		{
			this.code16 = code16;
			this.code32 = code32;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if (decoder.state.operandSize != 0)
			{
				instruction.InternalSetCodeNoCheck(code32);
				instruction.Op0Register = (Register)(decoder.state.reg + decoder.state.zs.extraRegisterBase + 37);
			}
			else
			{
				instruction.InternalSetCodeNoCheck(code16);
				instruction.Op0Register = (Register)(decoder.state.reg + decoder.state.zs.extraRegisterBase + 21);
			}
			instruction.Op1Kind = OpKind.Memory;
			decoder.ReadOpMem(ref instruction);
		}
	}
	internal sealed class OpCodeHandler_RvMw_Gw : OpCodeHandlerModRM
	{
		private readonly Code code16;

		private readonly Code code32;

		public OpCodeHandler_RvMw_Gw(Code code16, Code code32)
		{
			this.code16 = code16;
			this.code32 = code32;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			Register register;
			if (decoder.state.operandSize != 0)
			{
				instruction.InternalSetCodeNoCheck(code32);
				instruction.Op1Register = (Register)(decoder.state.reg + decoder.state.zs.extraRegisterBase + 37);
				register = Register.EAX;
			}
			else
			{
				instruction.InternalSetCodeNoCheck(code16);
				instruction.Op1Register = (Register)(decoder.state.reg + decoder.state.zs.extraRegisterBase + 21);
				register = Register.AX;
			}
			if (decoder.state.mod == 3)
			{
				instruction.Op0Register = (Register)((int)(decoder.state.rm + decoder.state.zs.extraBaseRegisterBase) + (int)register);
				return;
			}
			instruction.Op0Kind = OpKind.Memory;
			decoder.ReadOpMem(ref instruction);
		}
	}
	internal sealed class OpCodeHandler_Gv_Ev_Ib : OpCodeHandlerModRM
	{
		private readonly Code3 codes;

		public OpCodeHandler_Gv_Ev_Ib(Code code16, Code code32, Code code64)
		{
			codes = new Code3(code16, code32, code64);
		}

		public unsafe override void Decode(Decoder decoder, ref Instruction instruction)
		{
			nuint num = (nuint)decoder.state.operandSize;
			instruction.InternalSetCodeNoCheck((Code)codes.codes[num]);
			instruction.Op0Register = (Register)(((int)num << 4) + (int)(decoder.state.reg + decoder.state.zs.extraRegisterBase) + 21);
			if (decoder.state.mod == 3)
			{
				instruction.Op1Register = (Register)(((int)num << 4) + (int)(decoder.state.rm + decoder.state.zs.extraBaseRegisterBase) + 21);
			}
			else
			{
				instruction.Op1Kind = OpKind.Memory;
				decoder.ReadOpMem(ref instruction);
			}
			if ((int)num == 1)
			{
				instruction.Op2Kind = OpKind.Immediate8to32;
				instruction.InternalImmediate8 = decoder.ReadByte();
			}
			else if ((int)num == 2)
			{
				instruction.Op2Kind = OpKind.Immediate8to64;
				instruction.InternalImmediate8 = decoder.ReadByte();
			}
			else
			{
				instruction.Op2Kind = OpKind.Immediate8to16;
				instruction.InternalImmediate8 = decoder.ReadByte();
			}
		}
	}
	internal sealed class OpCodeHandler_Gv_Ev_Ib_REX : OpCodeHandlerModRM
	{
		private readonly Code code32;

		private readonly Code code64;

		public OpCodeHandler_Gv_Ev_Ib_REX(Code code32, Code code64)
		{
			this.code32 = code32;
			this.code64 = code64;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if ((decoder.state.zs.flags & StateFlags.W) != 0)
			{
				instruction.InternalSetCodeNoCheck(code64);
				instruction.Op0Register = (Register)(decoder.state.reg + decoder.state.zs.extraRegisterBase + 53);
			}
			else
			{
				instruction.InternalSetCodeNoCheck(code32);
				instruction.Op0Register = (Register)(decoder.state.reg + decoder.state.zs.extraRegisterBase + 37);
			}
			instruction.Op1Register = (Register)(decoder.state.rm + decoder.state.zs.extraBaseRegisterBase + 77);
			instruction.Op2Kind = OpKind.Immediate8;
			instruction.InternalImmediate8 = decoder.ReadByte();
		}
	}
	internal sealed class OpCodeHandler_Gv_Ev_32_64 : OpCodeHandlerModRM
	{
		private readonly Code code32;

		private readonly Code code64;

		private readonly uint disallowReg;

		private readonly uint disallowMem;

		public OpCodeHandler_Gv_Ev_32_64(Code code32, Code code64, bool allowReg, bool allowMem)
		{
			this.code32 = code32;
			this.code64 = code64;
			disallowMem = ((!allowMem) ? uint.MaxValue : 0u);
			disallowReg = ((!allowReg) ? uint.MaxValue : 0u);
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			Register register;
			if (decoder.is64bMode)
			{
				instruction.InternalSetCodeNoCheck(code64);
				register = Register.RAX;
			}
			else
			{
				instruction.InternalSetCodeNoCheck(code32);
				register = Register.EAX;
			}
			instruction.Op0Register = (Register)((int)(decoder.state.reg + decoder.state.zs.extraRegisterBase) + (int)register);
			if (decoder.state.mod == 3)
			{
				instruction.Op1Register = (Register)((int)(decoder.state.rm + decoder.state.zs.extraBaseRegisterBase) + (int)register);
				if ((disallowReg & decoder.invalidCheckMask) != 0)
				{
					decoder.SetInvalidInstruction();
				}
				return;
			}
			if ((disallowMem & decoder.invalidCheckMask) != 0)
			{
				decoder.SetInvalidInstruction();
			}
			instruction.Op1Kind = OpKind.Memory;
			decoder.ReadOpMem(ref instruction);
		}
	}
	internal sealed class OpCodeHandler_Gv_Ev_Iz : OpCodeHandlerModRM
	{
		private readonly Code3 codes;

		public OpCodeHandler_Gv_Ev_Iz(Code code16, Code code32, Code code64)
		{
			codes = new Code3(code16, code32, code64);
		}

		public unsafe override void Decode(Decoder decoder, ref Instruction instruction)
		{
			nuint num = (nuint)decoder.state.operandSize;
			instruction.InternalSetCodeNoCheck((Code)codes.codes[num]);
			instruction.Op0Register = (Register)(((int)num << 4) + (int)(decoder.state.reg + decoder.state.zs.extraRegisterBase) + 21);
			if (decoder.state.mod == 3)
			{
				instruction.Op1Register = (Register)(((int)num << 4) + (int)(decoder.state.rm + decoder.state.zs.extraBaseRegisterBase) + 21);
			}
			else
			{
				instruction.Op1Kind = OpKind.Memory;
				decoder.ReadOpMem(ref instruction);
			}
			if ((int)num == 1)
			{
				instruction.Op2Kind = OpKind.Immediate32;
				instruction.Immediate32 = decoder.ReadUInt32();
			}
			else if ((int)num == 2)
			{
				instruction.Op2Kind = OpKind.Immediate32to64;
				instruction.Immediate32 = decoder.ReadUInt32();
			}
			else
			{
				instruction.Op2Kind = OpKind.Immediate16;
				instruction.InternalImmediate16 = decoder.ReadUInt16();
			}
		}
	}
	internal sealed class OpCodeHandler_Yb_Reg : OpCodeHandler
	{
		private readonly Code code;

		private readonly Register reg;

		public OpCodeHandler_Yb_Reg(Code code, Register reg)
		{
			this.code = code;
			this.reg = reg;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			instruction.InternalSetCodeNoCheck(code);
			instruction.Op1Register = reg;
			if (decoder.state.addressSize == OpSize.Size64)
			{
				instruction.Op0Kind = OpKind.MemoryESRDI;
			}
			else if (decoder.state.addressSize == OpSize.Size32)
			{
				instruction.Op0Kind = OpKind.MemoryESEDI;
			}
			else
			{
				instruction.Op0Kind = OpKind.MemoryESDI;
			}
		}
	}
	internal sealed class OpCodeHandler_Yv_Reg : OpCodeHandler
	{
		private readonly Code3 codes;

		public OpCodeHandler_Yv_Reg(Code code16, Code code32, Code code64)
		{
			codes = new Code3(code16, code32, code64);
		}

		public unsafe override void Decode(Decoder decoder, ref Instruction instruction)
		{
			nuint num = (nuint)decoder.state.operandSize;
			instruction.InternalSetCodeNoCheck((Code)codes.codes[num]);
			instruction.Op1Register = (Register)(((int)num << 4) + 21);
			if (decoder.state.addressSize == OpSize.Size64)
			{
				instruction.Op0Kind = OpKind.MemoryESRDI;
			}
			else if (decoder.state.addressSize == OpSize.Size32)
			{
				instruction.Op0Kind = OpKind.MemoryESEDI;
			}
			else
			{
				instruction.Op0Kind = OpKind.MemoryESDI;
			}
		}
	}
	internal sealed class OpCodeHandler_Yv_Reg2 : OpCodeHandler
	{
		private readonly Code code16;

		private readonly Code code32;

		public OpCodeHandler_Yv_Reg2(Code code16, Code code32)
		{
			this.code16 = code16;
			this.code32 = code32;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if (decoder.state.operandSize != 0)
			{
				instruction.InternalSetCodeNoCheck(code32);
				instruction.Op1Register = Register.DX;
			}
			else
			{
				instruction.InternalSetCodeNoCheck(code16);
				instruction.Op1Register = Register.DX;
			}
			if (decoder.state.addressSize == OpSize.Size64)
			{
				instruction.Op0Kind = OpKind.MemoryESRDI;
			}
			else if (decoder.state.addressSize == OpSize.Size32)
			{
				instruction.Op0Kind = OpKind.MemoryESEDI;
			}
			else
			{
				instruction.Op0Kind = OpKind.MemoryESDI;
			}
		}
	}
	internal sealed class OpCodeHandler_Reg_Xb : OpCodeHandler
	{
		private readonly Code code;

		private readonly Register reg;

		public OpCodeHandler_Reg_Xb(Code code, Register reg)
		{
			this.code = code;
			this.reg = reg;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			instruction.InternalSetCodeNoCheck(code);
			instruction.Op0Register = reg;
			if (decoder.state.addressSize == OpSize.Size64)
			{
				instruction.Op1Kind = OpKind.MemorySegRSI;
			}
			else if (decoder.state.addressSize == OpSize.Size32)
			{
				instruction.Op1Kind = OpKind.MemorySegESI;
			}
			else
			{
				instruction.Op1Kind = OpKind.MemorySegSI;
			}
		}
	}
	internal sealed class OpCodeHandler_Reg_Xv : OpCodeHandler
	{
		private readonly Code3 codes;

		public OpCodeHandler_Reg_Xv(Code code16, Code code32, Code code64)
		{
			codes = new Code3(code16, code32, code64);
		}

		public unsafe override void Decode(Decoder decoder, ref Instruction instruction)
		{
			nuint num = (nuint)decoder.state.operandSize;
			instruction.InternalSetCodeNoCheck((Code)codes.codes[num]);
			instruction.Op0Register = (Register)(((int)num << 4) + 21);
			if (decoder.state.addressSize == OpSize.Size64)
			{
				instruction.Op1Kind = OpKind.MemorySegRSI;
			}
			else if (decoder.state.addressSize == OpSize.Size32)
			{
				instruction.Op1Kind = OpKind.MemorySegESI;
			}
			else
			{
				instruction.Op1Kind = OpKind.MemorySegSI;
			}
		}
	}
	internal sealed class OpCodeHandler_Reg_Xv2 : OpCodeHandler
	{
		private readonly Code code16;

		private readonly Code code32;

		public OpCodeHandler_Reg_Xv2(Code code16, Code code32)
		{
			this.code16 = code16;
			this.code32 = code32;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if (decoder.state.operandSize != 0)
			{
				instruction.InternalSetCodeNoCheck(code32);
				instruction.Op0Register = Register.DX;
			}
			else
			{
				instruction.InternalSetCodeNoCheck(code16);
				instruction.Op0Register = Register.DX;
			}
			if (decoder.state.addressSize == OpSize.Size64)
			{
				instruction.Op1Kind = OpKind.MemorySegRSI;
			}
			else if (decoder.state.addressSize == OpSize.Size32)
			{
				instruction.Op1Kind = OpKind.MemorySegESI;
			}
			else
			{
				instruction.Op1Kind = OpKind.MemorySegSI;
			}
		}
	}
	internal sealed class OpCodeHandler_Reg_Yb : OpCodeHandler
	{
		private readonly Code code;

		private readonly Register reg;

		public OpCodeHandler_Reg_Yb(Code code, Register reg)
		{
			this.code = code;
			this.reg = reg;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			instruction.InternalSetCodeNoCheck(code);
			instruction.Op0Register = reg;
			if (decoder.state.addressSize == OpSize.Size64)
			{
				instruction.Op1Kind = OpKind.MemoryESRDI;
			}
			else if (decoder.state.addressSize == OpSize.Size32)
			{
				instruction.Op1Kind = OpKind.MemoryESEDI;
			}
			else
			{
				instruction.Op1Kind = OpKind.MemoryESDI;
			}
		}
	}
	internal sealed class OpCodeHandler_Reg_Yv : OpCodeHandler
	{
		private readonly Code3 codes;

		public OpCodeHandler_Reg_Yv(Code code16, Code code32, Code code64)
		{
			codes = new Code3(code16, code32, code64);
		}

		public unsafe override void Decode(Decoder decoder, ref Instruction instruction)
		{
			nuint num = (nuint)decoder.state.operandSize;
			instruction.InternalSetCodeNoCheck((Code)codes.codes[num]);
			instruction.Op0Register = (Register)(((int)num << 4) + 21);
			if (decoder.state.addressSize == OpSize.Size64)
			{
				instruction.Op1Kind = OpKind.MemoryESRDI;
			}
			else if (decoder.state.addressSize == OpSize.Size32)
			{
				instruction.Op1Kind = OpKind.MemoryESEDI;
			}
			else
			{
				instruction.Op1Kind = OpKind.MemoryESDI;
			}
		}
	}
	internal sealed class OpCodeHandler_Yb_Xb : OpCodeHandler
	{
		private readonly Code code;

		public OpCodeHandler_Yb_Xb(Code code)
		{
			this.code = code;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			instruction.InternalSetCodeNoCheck(code);
			if (decoder.state.addressSize == OpSize.Size64)
			{
				instruction.Op0Kind = OpKind.MemoryESRDI;
				instruction.Op1Kind = OpKind.MemorySegRSI;
			}
			else if (decoder.state.addressSize == OpSize.Size32)
			{
				instruction.Op0Kind = OpKind.MemoryESEDI;
				instruction.Op1Kind = OpKind.MemorySegESI;
			}
			else
			{
				instruction.Op0Kind = OpKind.MemoryESDI;
				instruction.Op1Kind = OpKind.MemorySegSI;
			}
		}
	}
	internal sealed class OpCodeHandler_Yv_Xv : OpCodeHandler
	{
		private readonly Code3 codes;

		public OpCodeHandler_Yv_Xv(Code code16, Code code32, Code code64)
		{
			codes = new Code3(code16, code32, code64);
		}

		public unsafe override void Decode(Decoder decoder, ref Instruction instruction)
		{
			nuint num = (nuint)decoder.state.operandSize;
			instruction.InternalSetCodeNoCheck((Code)codes.codes[num]);
			if (decoder.state.addressSize == OpSize.Size64)
			{
				instruction.Op0Kind = OpKind.MemoryESRDI;
				instruction.Op1Kind = OpKind.MemorySegRSI;
			}
			else if (decoder.state.addressSize == OpSize.Size32)
			{
				instruction.Op0Kind = OpKind.MemoryESEDI;
				instruction.Op1Kind = OpKind.MemorySegESI;
			}
			else
			{
				instruction.Op0Kind = OpKind.MemoryESDI;
				instruction.Op1Kind = OpKind.MemorySegSI;
			}
		}
	}
	internal sealed class OpCodeHandler_Xb_Yb : OpCodeHandler
	{
		private readonly Code code;

		public OpCodeHandler_Xb_Yb(Code code)
		{
			this.code = code;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			instruction.InternalSetCodeNoCheck(code);
			if (decoder.state.addressSize == OpSize.Size64)
			{
				instruction.Op0Kind = OpKind.MemorySegRSI;
				instruction.Op1Kind = OpKind.MemoryESRDI;
			}
			else if (decoder.state.addressSize == OpSize.Size32)
			{
				instruction.Op0Kind = OpKind.MemorySegESI;
				instruction.Op1Kind = OpKind.MemoryESEDI;
			}
			else
			{
				instruction.Op0Kind = OpKind.MemorySegSI;
				instruction.Op1Kind = OpKind.MemoryESDI;
			}
		}
	}
	internal sealed class OpCodeHandler_Xv_Yv : OpCodeHandler
	{
		private readonly Code3 codes;

		public OpCodeHandler_Xv_Yv(Code code16, Code code32, Code code64)
		{
			codes = new Code3(code16, code32, code64);
		}

		public unsafe override void Decode(Decoder decoder, ref Instruction instruction)
		{
			nuint num = (nuint)decoder.state.operandSize;
			instruction.InternalSetCodeNoCheck((Code)codes.codes[num]);
			if (decoder.state.addressSize == OpSize.Size64)
			{
				instruction.Op0Kind = OpKind.MemorySegRSI;
				instruction.Op1Kind = OpKind.MemoryESRDI;
			}
			else if (decoder.state.addressSize == OpSize.Size32)
			{
				instruction.Op0Kind = OpKind.MemorySegESI;
				instruction.Op1Kind = OpKind.MemoryESEDI;
			}
			else
			{
				instruction.Op0Kind = OpKind.MemorySegSI;
				instruction.Op1Kind = OpKind.MemoryESDI;
			}
		}
	}
	internal sealed class OpCodeHandler_Ev_Sw : OpCodeHandlerModRM
	{
		private readonly Code3 codes;

		public OpCodeHandler_Ev_Sw(Code code16, Code code32, Code code64)
		{
			codes = new Code3(code16, code32, code64);
		}

		public unsafe override void Decode(Decoder decoder, ref Instruction instruction)
		{
			instruction.Op1Register = decoder.ReadOpSegReg();
			nuint num = (nuint)decoder.state.operandSize;
			instruction.InternalSetCodeNoCheck((Code)codes.codes[num]);
			if (decoder.state.mod == 3)
			{
				instruction.Op0Register = (Register)(((int)num << 4) + (int)(decoder.state.rm + decoder.state.zs.extraBaseRegisterBase) + 21);
				return;
			}
			instruction.Op0Kind = OpKind.Memory;
			decoder.ReadOpMem(ref instruction);
		}
	}
	internal sealed class OpCodeHandler_M_Sw : OpCodeHandlerModRM
	{
		private readonly Code code;

		public OpCodeHandler_M_Sw(Code code)
		{
			this.code = code;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			instruction.InternalSetCodeNoCheck(code);
			instruction.Op1Register = decoder.ReadOpSegReg();
			if (decoder.state.mod == 3)
			{
				decoder.SetInvalidInstruction();
				return;
			}
			instruction.Op0Kind = OpKind.Memory;
			decoder.ReadOpMem(ref instruction);
		}
	}
	internal sealed class OpCodeHandler_Gv_M : OpCodeHandlerModRM
	{
		private readonly Code3 codes;

		public OpCodeHandler_Gv_M(Code code16, Code code32, Code code64)
		{
			codes = new Code3(code16, code32, code64);
		}

		public unsafe override void Decode(Decoder decoder, ref Instruction instruction)
		{
			nuint num = (nuint)decoder.state.operandSize;
			instruction.InternalSetCodeNoCheck((Code)codes.codes[num]);
			instruction.Op0Register = (Register)(((int)num << 4) + (int)(decoder.state.reg + decoder.state.zs.extraRegisterBase) + 21);
			if (decoder.state.mod < 3)
			{
				instruction.Op1Kind = OpKind.Memory;
				decoder.ReadOpMem(ref instruction);
			}
			else
			{
				decoder.SetInvalidInstruction();
			}
		}
	}
	internal sealed class OpCodeHandler_Sw_Ev : OpCodeHandlerModRM
	{
		private readonly Code3 codes;

		public OpCodeHandler_Sw_Ev(Code code16, Code code32, Code code64)
		{
			codes = new Code3(code16, code32, code64);
		}

		public unsafe override void Decode(Decoder decoder, ref Instruction instruction)
		{
			nuint num = (nuint)decoder.state.operandSize;
			instruction.InternalSetCodeNoCheck((Code)codes.codes[num]);
			Register register = decoder.ReadOpSegReg();
			if (decoder.invalidCheckMask != 0 && register == Register.CS)
			{
				decoder.SetInvalidInstruction();
			}
			instruction.Op0Register = register;
			if (decoder.state.mod == 3)
			{
				instruction.Op1Register = (Register)(((int)num << 4) + (int)(decoder.state.rm + decoder.state.zs.extraBaseRegisterBase) + 21);
				return;
			}
			instruction.Op1Kind = OpKind.Memory;
			decoder.ReadOpMem(ref instruction);
		}
	}
	internal sealed class OpCodeHandler_Sw_M : OpCodeHandlerModRM
	{
		private readonly Code code;

		public OpCodeHandler_Sw_M(Code code)
		{
			this.code = code;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			instruction.InternalSetCodeNoCheck(code);
			instruction.Op0Register = decoder.ReadOpSegReg();
			if (decoder.state.mod == 3)
			{
				decoder.SetInvalidInstruction();
				return;
			}
			instruction.Op1Kind = OpKind.Memory;
			decoder.ReadOpMem(ref instruction);
		}
	}
	internal sealed class OpCodeHandler_Ap : OpCodeHandler
	{
		private readonly Code code16;

		private readonly Code code32;

		public OpCodeHandler_Ap(Code code16, Code code32)
		{
			this.code16 = code16;
			this.code32 = code32;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if (decoder.state.operandSize != 0)
			{
				instruction.InternalSetCodeNoCheck(code32);
			}
			else
			{
				instruction.InternalSetCodeNoCheck(code16);
			}
			if (decoder.state.operandSize != 0)
			{
				instruction.Op0Kind = OpKind.FarBranch32;
				instruction.FarBranch32 = decoder.ReadUInt32();
			}
			else
			{
				instruction.Op0Kind = OpKind.FarBranch16;
				instruction.InternalFarBranch16 = decoder.ReadUInt16();
			}
			instruction.InternalFarBranchSelector = decoder.ReadUInt16();
		}
	}
	internal sealed class OpCodeHandler_Reg_Ob : OpCodeHandler
	{
		private readonly Code code;

		private readonly Register reg;

		public OpCodeHandler_Reg_Ob(Code code, Register reg)
		{
			this.code = code;
			this.reg = reg;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			instruction.InternalSetCodeNoCheck(code);
			instruction.Op0Register = reg;
			decoder.displIndex = decoder.state.zs.instructionLength;
			instruction.Op1Kind = OpKind.Memory;
			if (decoder.state.addressSize == OpSize.Size64)
			{
				instruction.InternalSetMemoryDisplSize(4u);
				decoder.state.zs.flags |= StateFlags.Addr64;
				instruction.MemoryDisplacement64 = decoder.ReadUInt64();
			}
			else if (decoder.state.addressSize == OpSize.Size32)
			{
				instruction.InternalSetMemoryDisplSize(3u);
				instruction.MemoryDisplacement64 = decoder.ReadUInt32();
			}
			else
			{
				instruction.InternalSetMemoryDisplSize(2u);
				instruction.MemoryDisplacement64 = decoder.ReadUInt16();
			}
		}
	}
	internal sealed class OpCodeHandler_Ob_Reg : OpCodeHandler
	{
		private readonly Code code;

		private readonly Register reg;

		public OpCodeHandler_Ob_Reg(Code code, Register reg)
		{
			this.code = code;
			this.reg = reg;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			instruction.InternalSetCodeNoCheck(code);
			decoder.displIndex = decoder.state.zs.instructionLength;
			instruction.Op0Kind = OpKind.Memory;
			instruction.Op1Register = reg;
			if (decoder.state.addressSize == OpSize.Size64)
			{
				instruction.InternalSetMemoryDisplSize(4u);
				decoder.state.zs.flags |= StateFlags.Addr64;
				instruction.MemoryDisplacement64 = decoder.ReadUInt64();
			}
			else if (decoder.state.addressSize == OpSize.Size32)
			{
				instruction.InternalSetMemoryDisplSize(3u);
				instruction.MemoryDisplacement64 = decoder.ReadUInt32();
			}
			else
			{
				instruction.InternalSetMemoryDisplSize(2u);
				instruction.MemoryDisplacement64 = decoder.ReadUInt16();
			}
		}
	}
	internal sealed class OpCodeHandler_Reg_Ov : OpCodeHandler
	{
		private readonly Code3 codes;

		public OpCodeHandler_Reg_Ov(Code code16, Code code32, Code code64)
		{
			codes = new Code3(code16, code32, code64);
		}

		public unsafe override void Decode(Decoder decoder, ref Instruction instruction)
		{
			decoder.displIndex = decoder.state.zs.instructionLength;
			instruction.Op1Kind = OpKind.Memory;
			nuint num = (nuint)decoder.state.operandSize;
			instruction.InternalSetCodeNoCheck((Code)codes.codes[num]);
			instruction.Op0Register = (Register)(((int)num << 4) + 21);
			if (decoder.state.addressSize == OpSize.Size64)
			{
				instruction.InternalSetMemoryDisplSize(4u);
				decoder.state.zs.flags |= StateFlags.Addr64;
				instruction.MemoryDisplacement64 = decoder.ReadUInt64();
			}
			else if (decoder.state.addressSize == OpSize.Size32)
			{
				instruction.InternalSetMemoryDisplSize(3u);
				instruction.MemoryDisplacement64 = decoder.ReadUInt32();
			}
			else
			{
				instruction.InternalSetMemoryDisplSize(2u);
				instruction.MemoryDisplacement64 = decoder.ReadUInt16();
			}
		}
	}
	internal sealed class OpCodeHandler_Ov_Reg : OpCodeHandler
	{
		private readonly Code3 codes;

		public OpCodeHandler_Ov_Reg(Code code16, Code code32, Code code64)
		{
			codes = new Code3(code16, code32, code64);
		}

		public unsafe override void Decode(Decoder decoder, ref Instruction instruction)
		{
			decoder.displIndex = decoder.state.zs.instructionLength;
			instruction.Op0Kind = OpKind.Memory;
			nuint num = (nuint)decoder.state.operandSize;
			instruction.InternalSetCodeNoCheck((Code)codes.codes[num]);
			instruction.Op1Register = (Register)(((int)num << 4) + 21);
			if (decoder.state.addressSize == OpSize.Size64)
			{
				instruction.InternalSetMemoryDisplSize(4u);
				decoder.state.zs.flags |= StateFlags.Addr64;
				instruction.MemoryDisplacement64 = decoder.ReadUInt64();
			}
			else if (decoder.state.addressSize == OpSize.Size32)
			{
				instruction.InternalSetMemoryDisplSize(3u);
				instruction.MemoryDisplacement64 = decoder.ReadUInt32();
			}
			else
			{
				instruction.InternalSetMemoryDisplSize(2u);
				instruction.MemoryDisplacement64 = decoder.ReadUInt16();
			}
		}
	}
	internal sealed class OpCodeHandler_BranchIw : OpCodeHandler
	{
		private readonly Code code16;

		private readonly Code code32;

		private readonly Code code64;

		public OpCodeHandler_BranchIw(Code code16, Code code32, Code code64)
		{
			this.code16 = code16;
			this.code32 = code32;
			this.code64 = code64;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if (decoder.is64bMode)
			{
				if ((decoder.options & DecoderOptions.AMD) == 0 || decoder.state.operandSize != 0)
				{
					instruction.InternalSetCodeNoCheck(code64);
				}
				else
				{
					instruction.InternalSetCodeNoCheck(code16);
				}
			}
			else if (decoder.state.operandSize == OpSize.Size32)
			{
				instruction.InternalSetCodeNoCheck(code32);
			}
			else
			{
				instruction.InternalSetCodeNoCheck(code16);
			}
			instruction.Op0Kind = OpKind.Immediate16;
			instruction.InternalImmediate16 = decoder.ReadUInt16();
		}
	}
	internal sealed class OpCodeHandler_BranchSimple : OpCodeHandler
	{
		private readonly Code code16;

		private readonly Code code32;

		private readonly Code code64;

		public OpCodeHandler_BranchSimple(Code code16, Code code32, Code code64)
		{
			this.code16 = code16;
			this.code32 = code32;
			this.code64 = code64;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if (decoder.is64bMode)
			{
				if ((decoder.options & DecoderOptions.AMD) == 0 || decoder.state.operandSize != 0)
				{
					instruction.InternalSetCodeNoCheck(code64);
				}
				else
				{
					instruction.InternalSetCodeNoCheck(code16);
				}
			}
			else if (decoder.state.operandSize == OpSize.Size32)
			{
				instruction.InternalSetCodeNoCheck(code32);
			}
			else
			{
				instruction.InternalSetCodeNoCheck(code16);
			}
		}
	}
	internal sealed class OpCodeHandler_Iw_Ib : OpCodeHandler
	{
		private readonly Code code16;

		private readonly Code code32;

		private readonly Code code64;

		public OpCodeHandler_Iw_Ib(Code code16, Code code32, Code code64)
		{
			this.code16 = code16;
			this.code32 = code32;
			this.code64 = code64;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			instruction.Op0Kind = OpKind.Immediate16;
			instruction.InternalImmediate16 = decoder.ReadUInt16();
			instruction.Op1Kind = OpKind.Immediate8_2nd;
			instruction.InternalImmediate8_2nd = decoder.ReadByte();
			if (decoder.is64bMode)
			{
				if (decoder.state.operandSize != 0)
				{
					instruction.InternalSetCodeNoCheck(code64);
				}
				else
				{
					instruction.InternalSetCodeNoCheck(code16);
				}
			}
			else if (decoder.state.operandSize == OpSize.Size32)
			{
				instruction.InternalSetCodeNoCheck(code32);
			}
			else
			{
				instruction.InternalSetCodeNoCheck(code16);
			}
		}
	}
	internal sealed class OpCodeHandler_Reg_Ib2 : OpCodeHandler
	{
		private readonly Code code16;

		private readonly Code code32;

		public OpCodeHandler_Reg_Ib2(Code code16, Code code32)
		{
			this.code16 = code16;
			this.code32 = code32;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			instruction.Op1Kind = OpKind.Immediate8;
			instruction.InternalImmediate8 = decoder.ReadByte();
			if (decoder.state.operandSize != 0)
			{
				instruction.InternalSetCodeNoCheck(code32);
				instruction.Op0Register = Register.EAX;
			}
			else
			{
				instruction.InternalSetCodeNoCheck(code16);
				instruction.Op0Register = Register.AX;
			}
		}
	}
	internal sealed class OpCodeHandler_IbReg2 : OpCodeHandler
	{
		private readonly Code code16;

		private readonly Code code32;

		public OpCodeHandler_IbReg2(Code code16, Code code32)
		{
			this.code16 = code16;
			this.code32 = code32;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			instruction.Op0Kind = OpKind.Immediate8;
			instruction.InternalImmediate8 = decoder.ReadByte();
			if (decoder.state.operandSize != 0)
			{
				instruction.InternalSetCodeNoCheck(code32);
				instruction.Op1Register = Register.EAX;
			}
			else
			{
				instruction.InternalSetCodeNoCheck(code16);
				instruction.Op1Register = Register.AX;
			}
		}
	}
	internal sealed class OpCodeHandler_eAX_DX : OpCodeHandler
	{
		private readonly Code code16;

		private readonly Code code32;

		public OpCodeHandler_eAX_DX(Code code16, Code code32)
		{
			this.code16 = code16;
			this.code32 = code32;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			instruction.Op1Register = Register.DX;
			if (decoder.state.operandSize != 0)
			{
				instruction.InternalSetCodeNoCheck(code32);
				instruction.Op0Register = Register.EAX;
			}
			else
			{
				instruction.InternalSetCodeNoCheck(code16);
				instruction.Op0Register = Register.AX;
			}
		}
	}
	internal sealed class OpCodeHandler_DX_eAX : OpCodeHandler
	{
		private readonly Code code16;

		private readonly Code code32;

		public OpCodeHandler_DX_eAX(Code code16, Code code32)
		{
			this.code16 = code16;
			this.code32 = code32;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			instruction.Op0Register = Register.DX;
			if (decoder.state.operandSize != 0)
			{
				instruction.InternalSetCodeNoCheck(code32);
				instruction.Op1Register = Register.EAX;
			}
			else
			{
				instruction.InternalSetCodeNoCheck(code16);
				instruction.Op1Register = Register.AX;
			}
		}
	}
	internal sealed class OpCodeHandler_Eb_Ib : OpCodeHandlerModRM
	{
		private readonly Code code;

		private readonly HandlerFlags flags;

		public OpCodeHandler_Eb_Ib(Code code)
		{
			this.code = code;
		}

		public OpCodeHandler_Eb_Ib(Code code, HandlerFlags flags)
		{
			this.code = code;
			this.flags = flags;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			instruction.InternalSetCodeNoCheck(code);
			if (decoder.state.mod < 3)
			{
				decoder.state.zs.flags |= (StateFlags)((uint)(flags & HandlerFlags.Lock) << 10);
				instruction.Op0Kind = OpKind.Memory;
				decoder.ReadOpMem(ref instruction);
			}
			else
			{
				uint num = decoder.state.rm + decoder.state.zs.extraBaseRegisterBase;
				if ((decoder.state.zs.flags & StateFlags.HasRex) != 0 && num >= 4)
				{
					num += 4;
				}
				instruction.Op0Register = (Register)(num + 1);
			}
			instruction.Op1Kind = OpKind.Immediate8;
			instruction.InternalImmediate8 = decoder.ReadByte();
		}
	}
	internal sealed class OpCodeHandler_Eb_1 : OpCodeHandlerModRM
	{
		private readonly Code code;

		public OpCodeHandler_Eb_1(Code code)
		{
			this.code = code;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			instruction.InternalSetCodeNoCheck(code);
			instruction.Op1Kind = OpKind.Immediate8;
			instruction.InternalImmediate8 = 1u;
			decoder.state.zs.flags |= StateFlags.NoImm;
			if (decoder.state.mod == 3)
			{
				uint num = decoder.state.rm + decoder.state.zs.extraBaseRegisterBase;
				if ((decoder.state.zs.flags & StateFlags.HasRex) != 0 && num >= 4)
				{
					num += 4;
				}
				instruction.Op0Register = (Register)(num + 1);
			}
			else
			{
				instruction.Op0Kind = OpKind.Memory;
				decoder.ReadOpMem(ref instruction);
			}
		}
	}
	internal sealed class OpCodeHandler_Eb_CL : OpCodeHandlerModRM
	{
		private readonly Code code;

		public OpCodeHandler_Eb_CL(Code code)
		{
			this.code = code;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			instruction.InternalSetCodeNoCheck(code);
			instruction.Op1Register = Register.CL;
			if (decoder.state.mod == 3)
			{
				uint num = decoder.state.rm + decoder.state.zs.extraBaseRegisterBase;
				if ((decoder.state.zs.flags & StateFlags.HasRex) != 0 && num >= 4)
				{
					num += 4;
				}
				instruction.Op0Register = (Register)(num + 1);
			}
			else
			{
				instruction.Op0Kind = OpKind.Memory;
				decoder.ReadOpMem(ref instruction);
			}
		}
	}
	internal sealed class OpCodeHandler_Eb : OpCodeHandlerModRM
	{
		private readonly Code code;

		private readonly HandlerFlags flags;

		public OpCodeHandler_Eb(Code code)
		{
			this.code = code;
		}

		public OpCodeHandler_Eb(Code code, HandlerFlags flags)
		{
			this.code = code;
			this.flags = flags;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			instruction.InternalSetCodeNoCheck(code);
			if (decoder.state.mod == 3)
			{
				uint num = decoder.state.rm + decoder.state.zs.extraBaseRegisterBase;
				if ((decoder.state.zs.flags & StateFlags.HasRex) != 0 && num >= 4)
				{
					num += 4;
				}
				instruction.Op0Register = (Register)(num + 1);
			}
			else
			{
				decoder.state.zs.flags |= (StateFlags)((uint)(flags & HandlerFlags.Lock) << 10);
				instruction.Op0Kind = OpKind.Memory;
				decoder.ReadOpMem(ref instruction);
			}
		}
	}
	internal sealed class OpCodeHandler_Eb_Gb : OpCodeHandlerModRM
	{
		private readonly Code code;

		private readonly HandlerFlags flags;

		public OpCodeHandler_Eb_Gb(Code code)
		{
			this.code = code;
		}

		public OpCodeHandler_Eb_Gb(Code code, HandlerFlags flags)
		{
			this.code = code;
			this.flags = flags;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			instruction.InternalSetCodeNoCheck(code);
			uint num = decoder.state.reg + decoder.state.zs.extraRegisterBase;
			if ((decoder.state.zs.flags & StateFlags.HasRex) != 0 && num >= 4)
			{
				num += 4;
			}
			instruction.Op1Register = (Register)(num + 1);
			if (decoder.state.mod == 3)
			{
				num = decoder.state.rm + decoder.state.zs.extraBaseRegisterBase;
				if ((decoder.state.zs.flags & StateFlags.HasRex) != 0 && num >= 4)
				{
					num += 4;
				}
				instruction.Op0Register = (Register)(num + 1);
			}
			else
			{
				decoder.state.zs.flags |= (StateFlags)((uint)(flags & HandlerFlags.Lock) << 10);
				instruction.Op0Kind = OpKind.Memory;
				decoder.ReadOpMem(ref instruction);
			}
		}
	}
	internal sealed class OpCodeHandler_Gb_Eb : OpCodeHandlerModRM
	{
		private readonly Code code;

		public OpCodeHandler_Gb_Eb(Code code)
		{
			this.code = code;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			instruction.InternalSetCodeNoCheck(code);
			uint num = decoder.state.reg + decoder.state.zs.extraRegisterBase;
			if ((decoder.state.zs.flags & StateFlags.HasRex) != 0 && num >= 4)
			{
				num += 4;
			}
			instruction.Op0Register = (Register)(num + 1);
			if (decoder.state.mod == 3)
			{
				num = decoder.state.rm + decoder.state.zs.extraBaseRegisterBase;
				if ((decoder.state.zs.flags & StateFlags.HasRex) != 0 && num >= 4)
				{
					num += 4;
				}
				instruction.Op1Register = (Register)(num + 1);
			}
			else
			{
				instruction.Op1Kind = OpKind.Memory;
				decoder.ReadOpMem(ref instruction);
			}
		}
	}
	internal sealed class OpCodeHandler_M : OpCodeHandlerModRM
	{
		private readonly Code codeW0;

		private readonly Code codeW1;

		public OpCodeHandler_M(Code codeW0, Code codeW1)
		{
			this.codeW0 = codeW0;
			this.codeW1 = codeW1;
		}

		public OpCodeHandler_M(Code codeW0)
		{
			this.codeW0 = codeW0;
			codeW1 = codeW0;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if ((decoder.state.zs.flags & StateFlags.W) != 0)
			{
				instruction.InternalSetCodeNoCheck(codeW1);
			}
			else
			{
				instruction.InternalSetCodeNoCheck(codeW0);
			}
			if (decoder.state.mod == 3)
			{
				decoder.SetInvalidInstruction();
				return;
			}
			instruction.Op0Kind = OpKind.Memory;
			decoder.ReadOpMem(ref instruction);
		}
	}
	internal sealed class OpCodeHandler_M_REXW : OpCodeHandlerModRM
	{
		private readonly Code code32;

		private readonly Code code64;

		private readonly HandlerFlags flags32;

		private readonly HandlerFlags flags64;

		public OpCodeHandler_M_REXW(Code code32, Code code64)
		{
			this.code32 = code32;
			this.code64 = code64;
		}

		public OpCodeHandler_M_REXW(Code code32, Code code64, HandlerFlags flags32, HandlerFlags flags64)
		{
			this.code32 = code32;
			this.code64 = code64;
			this.flags32 = flags32;
			this.flags64 = flags64;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if ((decoder.state.zs.flags & StateFlags.W) != 0)
			{
				instruction.InternalSetCodeNoCheck(code64);
			}
			else
			{
				instruction.InternalSetCodeNoCheck(code32);
			}
			if (decoder.state.mod == 3)
			{
				decoder.SetInvalidInstruction();
				return;
			}
			instruction.Op0Kind = OpKind.Memory;
			HandlerFlags handlerFlags = (((decoder.state.zs.flags & StateFlags.W) != 0) ? flags64 : flags32);
			if ((handlerFlags & (HandlerFlags.Xacquire | HandlerFlags.Xrelease)) != 0)
			{
				decoder.SetXacquireXrelease(ref instruction);
			}
			decoder.state.zs.flags |= (StateFlags)((uint)(handlerFlags & HandlerFlags.Lock) << 10);
			decoder.ReadOpMem(ref instruction);
		}
	}
	internal sealed class OpCodeHandler_MemBx : OpCodeHandler
	{
		private readonly Code code;

		public OpCodeHandler_MemBx(Code code)
		{
			this.code = code;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			instruction.InternalSetCodeNoCheck(code);
			instruction.InternalMemoryIndex = Register.AL;
			instruction.Op0Kind = OpKind.Memory;
			if (decoder.state.addressSize == OpSize.Size64)
			{
				instruction.InternalMemoryBase = Register.RBX;
			}
			else if (decoder.state.addressSize == OpSize.Size32)
			{
				instruction.InternalMemoryBase = Register.EBX;
			}
			else
			{
				instruction.InternalMemoryBase = Register.BX;
			}
		}
	}
	internal sealed class OpCodeHandler_VW : OpCodeHandlerModRM
	{
		private readonly Code codeR;

		private readonly Code codeM;

		public OpCodeHandler_VW(Code codeR, Code codeM)
		{
			this.codeR = codeR;
			this.codeM = codeM;
		}

		public OpCodeHandler_VW(Code code)
		{
			codeR = code;
			codeM = code;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			instruction.Op0Register = (Register)(decoder.state.reg + decoder.state.zs.extraRegisterBase + 77);
			if (decoder.state.mod == 3)
			{
				instruction.InternalSetCodeNoCheck(codeR);
				instruction.Op1Register = (Register)(decoder.state.rm + decoder.state.zs.extraBaseRegisterBase + 77);
			}
			else
			{
				instruction.InternalSetCodeNoCheck(codeM);
				instruction.Op1Kind = OpKind.Memory;
				decoder.ReadOpMem(ref instruction);
			}
		}
	}
	internal sealed class OpCodeHandler_WV : OpCodeHandlerModRM
	{
		private readonly Code code;

		public OpCodeHandler_WV(Code code)
		{
			this.code = code;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			instruction.InternalSetCodeNoCheck(code);
			instruction.Op1Register = (Register)(decoder.state.reg + decoder.state.zs.extraRegisterBase + 77);
			if (decoder.state.mod < 3)
			{
				instruction.Op0Kind = OpKind.Memory;
				decoder.ReadOpMem(ref instruction);
			}
			else
			{
				instruction.Op0Register = (Register)(decoder.state.rm + decoder.state.zs.extraBaseRegisterBase + 77);
			}
		}
	}
	internal sealed class OpCodeHandler_rDI_VX_RX : OpCodeHandlerModRM
	{
		private readonly Code code;

		public OpCodeHandler_rDI_VX_RX(Code code)
		{
			this.code = code;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			instruction.InternalSetCodeNoCheck(code);
			if (decoder.state.addressSize == OpSize.Size64)
			{
				instruction.Op0Kind = OpKind.MemorySegRDI;
			}
			else if (decoder.state.addressSize == OpSize.Size32)
			{
				instruction.Op0Kind = OpKind.MemorySegEDI;
			}
			else
			{
				instruction.Op0Kind = OpKind.MemorySegDI;
			}
			instruction.Op1Register = (Register)(decoder.state.reg + decoder.state.zs.extraRegisterBase + 77);
			if (decoder.state.mod == 3)
			{
				instruction.Op2Register = (Register)(decoder.state.rm + decoder.state.zs.extraBaseRegisterBase + 77);
			}
			else
			{
				decoder.SetInvalidInstruction();
			}
		}
	}
	internal sealed class OpCodeHandler_rDI_P_N : OpCodeHandlerModRM
	{
		private readonly Code code;

		public OpCodeHandler_rDI_P_N(Code code)
		{
			this.code = code;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			instruction.InternalSetCodeNoCheck(code);
			if (decoder.state.addressSize == OpSize.Size64)
			{
				instruction.Op0Kind = OpKind.MemorySegRDI;
			}
			else if (decoder.state.addressSize == OpSize.Size32)
			{
				instruction.Op0Kind = OpKind.MemorySegEDI;
			}
			else
			{
				instruction.Op0Kind = OpKind.MemorySegDI;
			}
			instruction.Op1Register = (Register)(decoder.state.reg + 225);
			if (decoder.state.mod == 3)
			{
				instruction.Op2Register = (Register)(decoder.state.rm + 225);
			}
			else
			{
				decoder.SetInvalidInstruction();
			}
		}
	}
	internal sealed class OpCodeHandler_VM : OpCodeHandlerModRM
	{
		private readonly Code code;

		public OpCodeHandler_VM(Code code)
		{
			this.code = code;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			instruction.InternalSetCodeNoCheck(code);
			instruction.Op0Register = (Register)(decoder.state.reg + decoder.state.zs.extraRegisterBase + 77);
			if (decoder.state.mod == 3)
			{
				decoder.SetInvalidInstruction();
				return;
			}
			instruction.Op1Kind = OpKind.Memory;
			decoder.ReadOpMem(ref instruction);
		}
	}
	internal sealed class OpCodeHandler_MV : OpCodeHandlerModRM
	{
		private readonly Code code;

		public OpCodeHandler_MV(Code code)
		{
			this.code = code;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			instruction.InternalSetCodeNoCheck(code);
			instruction.Op1Register = (Register)(decoder.state.reg + decoder.state.zs.extraRegisterBase + 77);
			if (decoder.state.mod == 3)
			{
				decoder.SetInvalidInstruction();
				return;
			}
			instruction.Op0Kind = OpKind.Memory;
			decoder.ReadOpMem(ref instruction);
		}
	}
	internal sealed class OpCodeHandler_VQ : OpCodeHandlerModRM
	{
		private readonly Code code;

		public OpCodeHandler_VQ(Code code)
		{
			this.code = code;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			instruction.InternalSetCodeNoCheck(code);
			instruction.Op0Register = (Register)(decoder.state.reg + decoder.state.zs.extraRegisterBase + 77);
			if (decoder.state.mod == 3)
			{
				instruction.Op1Register = (Register)(decoder.state.rm + 225);
				return;
			}
			instruction.Op1Kind = OpKind.Memory;
			decoder.ReadOpMem(ref instruction);
		}
	}
	internal sealed class OpCodeHandler_P_Q : OpCodeHandlerModRM
	{
		private readonly Code code;

		public OpCodeHandler_P_Q(Code code)
		{
			this.code = code;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			instruction.InternalSetCodeNoCheck(code);
			instruction.Op0Register = (Register)(decoder.state.reg + 225);
			if (decoder.state.mod == 3)
			{
				instruction.Op1Register = (Register)(decoder.state.rm + 225);
				return;
			}
			instruction.Op1Kind = OpKind.Memory;
			decoder.ReadOpMem(ref instruction);
		}
	}
	internal sealed class OpCodeHandler_Q_P : OpCodeHandlerModRM
	{
		private readonly Code code;

		public OpCodeHandler_Q_P(Code code)
		{
			this.code = code;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			instruction.InternalSetCodeNoCheck(code);
			instruction.Op1Register = (Register)(decoder.state.reg + 225);
			if (decoder.state.mod == 3)
			{
				instruction.Op0Register = (Register)(decoder.state.rm + 225);
				return;
			}
			instruction.Op0Kind = OpKind.Memory;
			decoder.ReadOpMem(ref instruction);
		}
	}
	internal sealed class OpCodeHandler_MP : OpCodeHandlerModRM
	{
		private readonly Code code;

		public OpCodeHandler_MP(Code code)
		{
			this.code = code;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			instruction.InternalSetCodeNoCheck(code);
			instruction.Op1Register = (Register)(decoder.state.reg + 225);
			if (decoder.state.mod == 3)
			{
				decoder.SetInvalidInstruction();
				return;
			}
			instruction.Op0Kind = OpKind.Memory;
			decoder.ReadOpMem(ref instruction);
		}
	}
	internal sealed class OpCodeHandler_P_Q_Ib : OpCodeHandlerModRM
	{
		private readonly Code code;

		public OpCodeHandler_P_Q_Ib(Code code)
		{
			this.code = code;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			instruction.InternalSetCodeNoCheck(code);
			instruction.Op0Register = (Register)(decoder.state.reg + 225);
			if (decoder.state.mod == 3)
			{
				instruction.Op1Register = (Register)(decoder.state.rm + 225);
			}
			else
			{
				instruction.Op1Kind = OpKind.Memory;
				decoder.ReadOpMem(ref instruction);
			}
			instruction.Op2Kind = OpKind.Immediate8;
			instruction.InternalImmediate8 = decoder.ReadByte();
		}
	}
	internal sealed class OpCodeHandler_P_W : OpCodeHandlerModRM
	{
		private readonly Code code;

		public OpCodeHandler_P_W(Code code)
		{
			this.code = code;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			instruction.InternalSetCodeNoCheck(code);
			instruction.Op0Register = (Register)(decoder.state.reg + 225);
			if (decoder.state.mod == 3)
			{
				instruction.Op1Register = (Register)(decoder.state.rm + decoder.state.zs.extraBaseRegisterBase + 77);
				return;
			}
			instruction.Op1Kind = OpKind.Memory;
			decoder.ReadOpMem(ref instruction);
		}
	}
	internal sealed class OpCodeHandler_P_R : OpCodeHandlerModRM
	{
		private readonly Code code;

		public OpCodeHandler_P_R(Code code)
		{
			this.code = code;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			instruction.InternalSetCodeNoCheck(code);
			instruction.Op0Register = (Register)(decoder.state.reg + 225);
			if (decoder.state.mod == 3)
			{
				instruction.Op1Register = (Register)(decoder.state.rm + decoder.state.zs.extraBaseRegisterBase + 77);
			}
			else
			{
				decoder.SetInvalidInstruction();
			}
		}
	}
	internal sealed class OpCodeHandler_P_Ev : OpCodeHandlerModRM
	{
		private readonly Code code32;

		private readonly Code code64;

		public OpCodeHandler_P_Ev(Code code32, Code code64)
		{
			this.code32 = code32;
			this.code64 = code64;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			Register register;
			if ((decoder.state.zs.flags & StateFlags.W) != 0)
			{
				instruction.InternalSetCodeNoCheck(code64);
				register = Register.RAX;
			}
			else
			{
				instruction.InternalSetCodeNoCheck(code32);
				register = Register.EAX;
			}
			instruction.Op0Register = (Register)(decoder.state.reg + 225);
			if (decoder.state.mod == 3)
			{
				instruction.Op1Register = (Register)((int)(decoder.state.rm + decoder.state.zs.extraBaseRegisterBase) + (int)register);
				return;
			}
			instruction.Op1Kind = OpKind.Memory;
			decoder.ReadOpMem(ref instruction);
		}
	}
	internal sealed class OpCodeHandler_P_Ev_Ib : OpCodeHandlerModRM
	{
		private readonly Code code32;

		private readonly Code code64;

		public OpCodeHandler_P_Ev_Ib(Code code32, Code code64)
		{
			this.code32 = code32;
			this.code64 = code64;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			Register register;
			if ((decoder.state.zs.flags & StateFlags.W) != 0)
			{
				instruction.InternalSetCodeNoCheck(code64);
				register = Register.RAX;
			}
			else
			{
				instruction.InternalSetCodeNoCheck(code32);
				register = Register.EAX;
			}
			instruction.Op0Register = (Register)(decoder.state.reg + 225);
			if (decoder.state.mod == 3)
			{
				instruction.Op1Register = (Register)((int)(decoder.state.rm + decoder.state.zs.extraBaseRegisterBase) + (int)register);
			}
			else
			{
				instruction.Op1Kind = OpKind.Memory;
				decoder.ReadOpMem(ref instruction);
			}
			instruction.Op2Kind = OpKind.Immediate8;
			instruction.InternalImmediate8 = decoder.ReadByte();
		}
	}
	internal sealed class OpCodeHandler_Ev_P : OpCodeHandlerModRM
	{
		private readonly Code code32;

		private readonly Code code64;

		public OpCodeHandler_Ev_P(Code code32, Code code64)
		{
			this.code32 = code32;
			this.code64 = code64;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			instruction.Op1Register = (Register)(decoder.state.reg + 225);
			Register register;
			if ((decoder.state.zs.flags & StateFlags.W) != 0)
			{
				instruction.InternalSetCodeNoCheck(code64);
				register = Register.RAX;
			}
			else
			{
				instruction.InternalSetCodeNoCheck(code32);
				register = Register.EAX;
			}
			if (decoder.state.mod == 3)
			{
				instruction.Op0Register = (Register)((int)(decoder.state.rm + decoder.state.zs.extraBaseRegisterBase) + (int)register);
				return;
			}
			instruction.Op0Kind = OpKind.Memory;
			decoder.ReadOpMem(ref instruction);
		}
	}
	internal sealed class OpCodeHandler_Gv_W : OpCodeHandlerModRM
	{
		private readonly Code codeW0;

		private readonly Code codeW1;

		public OpCodeHandler_Gv_W(Code codeW0, Code codeW1)
		{
			this.codeW0 = codeW0;
			this.codeW1 = codeW1;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if ((decoder.state.zs.flags & StateFlags.W) != 0)
			{
				instruction.InternalSetCodeNoCheck(codeW1);
				instruction.Op0Register = (Register)(decoder.state.reg + decoder.state.zs.extraRegisterBase + 53);
			}
			else
			{
				instruction.InternalSetCodeNoCheck(codeW0);
				instruction.Op0Register = (Register)(decoder.state.reg + decoder.state.zs.extraRegisterBase + 37);
			}
			if (decoder.state.mod == 3)
			{
				instruction.Op1Register = (Register)(decoder.state.rm + decoder.state.zs.extraBaseRegisterBase + 77);
				return;
			}
			instruction.Op1Kind = OpKind.Memory;
			decoder.ReadOpMem(ref instruction);
		}
	}
	internal sealed class OpCodeHandler_V_Ev : OpCodeHandlerModRM
	{
		private readonly Code codeW0;

		private readonly Code codeW1;

		public OpCodeHandler_V_Ev(Code codeW0, Code codeW1)
		{
			this.codeW0 = codeW0;
			this.codeW1 = codeW1;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			Register register;
			if (decoder.state.operandSize != OpSize.Size64)
			{
				instruction.InternalSetCodeNoCheck(codeW0);
				register = Register.EAX;
			}
			else
			{
				instruction.InternalSetCodeNoCheck(codeW1);
				register = Register.RAX;
			}
			instruction.Op0Register = (Register)(decoder.state.reg + decoder.state.zs.extraRegisterBase + 77);
			if (decoder.state.mod == 3)
			{
				instruction.Op1Register = (Register)((int)(decoder.state.rm + decoder.state.zs.extraBaseRegisterBase) + (int)register);
				return;
			}
			instruction.Op1Kind = OpKind.Memory;
			decoder.ReadOpMem(ref instruction);
		}
	}
	internal sealed class OpCodeHandler_VWIb : OpCodeHandlerModRM
	{
		private readonly Code codeW0;

		private readonly Code codeW1;

		public OpCodeHandler_VWIb(Code code)
		{
			codeW0 = code;
			codeW1 = code;
		}

		public OpCodeHandler_VWIb(Code codeW0, Code codeW1)
		{
			this.codeW0 = codeW0;
			this.codeW1 = codeW1;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if ((decoder.state.zs.flags & StateFlags.W) != 0)
			{
				instruction.InternalSetCodeNoCheck(codeW1);
			}
			else
			{
				instruction.InternalSetCodeNoCheck(codeW0);
			}
			instruction.Op0Register = (Register)(decoder.state.reg + decoder.state.zs.extraRegisterBase + 77);
			if (decoder.state.mod == 3)
			{
				instruction.Op1Register = (Register)(decoder.state.rm + decoder.state.zs.extraBaseRegisterBase + 77);
			}
			else
			{
				instruction.Op1Kind = OpKind.Memory;
				decoder.ReadOpMem(ref instruction);
			}
			instruction.Op2Kind = OpKind.Immediate8;
			instruction.InternalImmediate8 = decoder.ReadByte();
		}
	}
	internal sealed class OpCodeHandler_VRIbIb : OpCodeHandlerModRM
	{
		private readonly Code code;

		public OpCodeHandler_VRIbIb(Code code)
		{
			this.code = code;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			instruction.InternalSetCodeNoCheck(code);
			instruction.Op0Register = (Register)(decoder.state.reg + decoder.state.zs.extraRegisterBase + 77);
			if (decoder.state.mod == 3)
			{
				instruction.Op1Register = (Register)(decoder.state.rm + decoder.state.zs.extraBaseRegisterBase + 77);
			}
			else
			{
				decoder.SetInvalidInstruction();
			}
			instruction.Op2Kind = OpKind.Immediate8;
			instruction.InternalImmediate8 = decoder.ReadByte();
			instruction.Op3Kind = OpKind.Immediate8_2nd;
			instruction.InternalImmediate8_2nd = decoder.ReadByte();
		}
	}
	internal sealed class OpCodeHandler_RIbIb : OpCodeHandlerModRM
	{
		private readonly Code code;

		public OpCodeHandler_RIbIb(Code code)
		{
			this.code = code;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			instruction.InternalSetCodeNoCheck(code);
			if (decoder.state.mod == 3)
			{
				instruction.Op0Register = (Register)(decoder.state.rm + decoder.state.zs.extraBaseRegisterBase + 77);
			}
			else
			{
				decoder.SetInvalidInstruction();
			}
			instruction.Op1Kind = OpKind.Immediate8;
			instruction.InternalImmediate8 = decoder.ReadByte();
			instruction.Op2Kind = OpKind.Immediate8_2nd;
			instruction.InternalImmediate8_2nd = decoder.ReadByte();
		}
	}
	internal sealed class OpCodeHandler_RIb : OpCodeHandlerModRM
	{
		private readonly Code code;

		public OpCodeHandler_RIb(Code code)
		{
			this.code = code;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			instruction.InternalSetCodeNoCheck(code);
			if (decoder.state.mod == 3)
			{
				instruction.Op0Register = (Register)(decoder.state.rm + decoder.state.zs.extraBaseRegisterBase + 77);
			}
			else
			{
				decoder.SetInvalidInstruction();
			}
			instruction.Op1Kind = OpKind.Immediate8;
			instruction.InternalImmediate8 = decoder.ReadByte();
		}
	}
	internal sealed class OpCodeHandler_Ed_V_Ib : OpCodeHandlerModRM
	{
		private readonly Code code32;

		private readonly Code code64;

		public OpCodeHandler_Ed_V_Ib(Code code32, Code code64)
		{
			this.code32 = code32;
			this.code64 = code64;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			instruction.Op1Register = (Register)(decoder.state.reg + decoder.state.zs.extraRegisterBase + 77);
			Register register;
			if ((decoder.state.zs.flags & StateFlags.W) != 0)
			{
				instruction.InternalSetCodeNoCheck(code64);
				register = Register.RAX;
			}
			else
			{
				instruction.InternalSetCodeNoCheck(code32);
				register = Register.EAX;
			}
			if (decoder.state.mod == 3)
			{
				instruction.Op0Register = (Register)((int)(decoder.state.rm + decoder.state.zs.extraBaseRegisterBase) + (int)register);
			}
			else
			{
				instruction.Op0Kind = OpKind.Memory;
				decoder.ReadOpMem(ref instruction);
			}
			instruction.Op2Kind = OpKind.Immediate8;
			instruction.InternalImmediate8 = decoder.ReadByte();
		}
	}
	internal sealed class OpCodeHandler_VX_Ev : OpCodeHandlerModRM
	{
		private readonly Code code32;

		private readonly Code code64;

		public OpCodeHandler_VX_Ev(Code code32, Code code64)
		{
			this.code32 = code32;
			this.code64 = code64;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			Register register;
			if ((decoder.state.zs.flags & StateFlags.W) != 0)
			{
				instruction.InternalSetCodeNoCheck(code64);
				register = Register.RAX;
			}
			else
			{
				instruction.InternalSetCodeNoCheck(code32);
				register = Register.EAX;
			}
			instruction.Op0Register = (Register)(decoder.state.reg + decoder.state.zs.extraRegisterBase + 77);
			if (decoder.state.mod == 3)
			{
				instruction.Op1Register = (Register)((int)(decoder.state.rm + decoder.state.zs.extraBaseRegisterBase) + (int)register);
				return;
			}
			instruction.Op1Kind = OpKind.Memory;
			decoder.ReadOpMem(ref instruction);
		}
	}
	internal sealed class OpCodeHandler_Ev_VX : OpCodeHandlerModRM
	{
		private readonly Code code32;

		private readonly Code code64;

		public OpCodeHandler_Ev_VX(Code code32, Code code64)
		{
			this.code32 = code32;
			this.code64 = code64;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			instruction.Op1Register = (Register)(decoder.state.reg + decoder.state.zs.extraRegisterBase + 77);
			Register register;
			if ((decoder.state.zs.flags & StateFlags.W) != 0)
			{
				instruction.InternalSetCodeNoCheck(code64);
				register = Register.RAX;
			}
			else
			{
				instruction.InternalSetCodeNoCheck(code32);
				register = Register.EAX;
			}
			if (decoder.state.mod == 3)
			{
				instruction.Op0Register = (Register)((int)(decoder.state.rm + decoder.state.zs.extraBaseRegisterBase) + (int)register);
				return;
			}
			instruction.Op0Kind = OpKind.Memory;
			decoder.ReadOpMem(ref instruction);
		}
	}
	internal sealed class OpCodeHandler_VX_E_Ib : OpCodeHandlerModRM
	{
		private readonly Code code32;

		private readonly Code code64;

		public OpCodeHandler_VX_E_Ib(Code code32, Code code64)
		{
			this.code32 = code32;
			this.code64 = code64;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			Register register;
			if ((decoder.state.zs.flags & StateFlags.W) != 0)
			{
				instruction.InternalSetCodeNoCheck(code64);
				register = Register.RAX;
			}
			else
			{
				instruction.InternalSetCodeNoCheck(code32);
				register = Register.EAX;
			}
			instruction.Op0Register = (Register)(decoder.state.reg + decoder.state.zs.extraRegisterBase + 77);
			if (decoder.state.mod == 3)
			{
				instruction.Op1Register = (Register)((int)(decoder.state.rm + decoder.state.zs.extraBaseRegisterBase) + (int)register);
			}
			else
			{
				instruction.Op1Kind = OpKind.Memory;
				decoder.ReadOpMem(ref instruction);
			}
			instruction.Op2Kind = OpKind.Immediate8;
			instruction.InternalImmediate8 = decoder.ReadByte();
		}
	}
	internal sealed class OpCodeHandler_Gv_RX : OpCodeHandlerModRM
	{
		private readonly Code code32;

		private readonly Code code64;

		public OpCodeHandler_Gv_RX(Code code32, Code code64)
		{
			this.code32 = code32;
			this.code64 = code64;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if ((decoder.state.zs.flags & StateFlags.W) != 0)
			{
				instruction.InternalSetCodeNoCheck(code64);
			}
			else
			{
				instruction.InternalSetCodeNoCheck(code32);
			}
			if ((decoder.state.zs.flags & StateFlags.W) != 0)
			{
				instruction.Op0Register = (Register)(decoder.state.reg + decoder.state.zs.extraRegisterBase + 53);
			}
			else
			{
				instruction.Op0Register = (Register)(decoder.state.reg + decoder.state.zs.extraRegisterBase + 37);
			}
			if (decoder.state.mod == 3)
			{
				instruction.Op1Register = (Register)(decoder.state.rm + decoder.state.zs.extraBaseRegisterBase + 77);
			}
			else
			{
				decoder.SetInvalidInstruction();
			}
		}
	}
	internal sealed class OpCodeHandler_B_MIB : OpCodeHandlerModRM
	{
		private readonly Code code;

		public OpCodeHandler_B_MIB(Code code)
		{
			this.code = code;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if (decoder.state.reg > 3 || (decoder.state.zs.extraRegisterBase & decoder.invalidCheckMask) != 0)
			{
				decoder.SetInvalidInstruction();
			}
			instruction.InternalSetCodeNoCheck(code);
			instruction.Op0Register = (Register)(decoder.state.reg + 181);
			instruction.Op1Kind = OpKind.Memory;
			decoder.ReadOpMem_MPX(ref instruction);
			if (decoder.invalidCheckMask != 0 && instruction.MemoryBase == Register.RIP)
			{
				decoder.SetInvalidInstruction();
			}
		}
	}
	internal sealed class OpCodeHandler_MIB_B : OpCodeHandlerModRM
	{
		private readonly Code code;

		public OpCodeHandler_MIB_B(Code code)
		{
			this.code = code;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if (decoder.state.reg > 3 || (decoder.state.zs.extraRegisterBase & decoder.invalidCheckMask) != 0)
			{
				decoder.SetInvalidInstruction();
			}
			instruction.InternalSetCodeNoCheck(code);
			instruction.Op1Register = (Register)(decoder.state.reg + 181);
			instruction.Op0Kind = OpKind.Memory;
			decoder.ReadOpMem_MPX(ref instruction);
			if (decoder.invalidCheckMask != 0 && instruction.MemoryBase == Register.RIP)
			{
				decoder.SetInvalidInstruction();
			}
		}
	}
	internal sealed class OpCodeHandler_B_BM : OpCodeHandlerModRM
	{
		private readonly Code code32;

		private readonly Code code64;

		public OpCodeHandler_B_BM(Code code32, Code code64)
		{
			this.code32 = code32;
			this.code64 = code64;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if (decoder.state.reg > 3 || (decoder.state.zs.extraRegisterBase & decoder.invalidCheckMask) != 0)
			{
				decoder.SetInvalidInstruction();
			}
			if (decoder.is64bMode)
			{
				instruction.InternalSetCodeNoCheck(code64);
			}
			else
			{
				instruction.InternalSetCodeNoCheck(code32);
			}
			instruction.Op0Register = (Register)(decoder.state.reg + 181);
			if (decoder.state.mod == 3)
			{
				instruction.Op1Register = (Register)(decoder.state.rm + 181);
				if (decoder.state.rm > 3 || (decoder.state.zs.extraBaseRegisterBase & decoder.invalidCheckMask) != 0)
				{
					decoder.SetInvalidInstruction();
				}
			}
			else
			{
				instruction.Op1Kind = OpKind.Memory;
				decoder.ReadOpMem_MPX(ref instruction);
			}
		}
	}
	internal sealed class OpCodeHandler_BM_B : OpCodeHandlerModRM
	{
		private readonly Code code32;

		private readonly Code code64;

		public OpCodeHandler_BM_B(Code code32, Code code64)
		{
			this.code32 = code32;
			this.code64 = code64;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if (decoder.state.reg > 3 || (decoder.state.zs.extraRegisterBase & decoder.invalidCheckMask) != 0)
			{
				decoder.SetInvalidInstruction();
			}
			if (decoder.is64bMode)
			{
				instruction.InternalSetCodeNoCheck(code64);
			}
			else
			{
				instruction.InternalSetCodeNoCheck(code32);
			}
			instruction.Op1Register = (Register)(decoder.state.reg + 181);
			if (decoder.state.mod == 3)
			{
				instruction.Op0Register = (Register)(decoder.state.rm + 181);
				if (decoder.state.rm > 3 || (decoder.state.zs.extraBaseRegisterBase & decoder.invalidCheckMask) != 0)
				{
					decoder.SetInvalidInstruction();
				}
			}
			else
			{
				instruction.Op0Kind = OpKind.Memory;
				decoder.ReadOpMem_MPX(ref instruction);
			}
		}
	}
	internal sealed class OpCodeHandler_B_Ev : OpCodeHandlerModRM
	{
		private readonly Code code32;

		private readonly Code code64;

		private readonly uint ripRelMask;

		public OpCodeHandler_B_Ev(Code code32, Code code64, bool supportsRipRel)
		{
			this.code32 = code32;
			this.code64 = code64;
			ripRelMask = ((!supportsRipRel) ? uint.MaxValue : 0u);
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if (decoder.state.reg > 3 || (decoder.state.zs.extraRegisterBase & decoder.invalidCheckMask) != 0)
			{
				decoder.SetInvalidInstruction();
			}
			Register register;
			if (decoder.is64bMode)
			{
				instruction.InternalSetCodeNoCheck(code64);
				register = Register.RAX;
			}
			else
			{
				instruction.InternalSetCodeNoCheck(code32);
				register = Register.EAX;
			}
			instruction.Op0Register = (Register)(decoder.state.reg + 181);
			if (decoder.state.mod == 3)
			{
				instruction.Op1Register = (Register)((int)(decoder.state.rm + decoder.state.zs.extraBaseRegisterBase) + (int)register);
				return;
			}
			instruction.Op1Kind = OpKind.Memory;
			decoder.ReadOpMem_MPX(ref instruction);
			if ((ripRelMask & decoder.invalidCheckMask) != 0 && instruction.MemoryBase == Register.RIP)
			{
				decoder.SetInvalidInstruction();
			}
		}
	}
	internal sealed class OpCodeHandler_Mv_Gv_REXW : OpCodeHandlerModRM
	{
		private readonly Code code32;

		private readonly Code code64;

		public OpCodeHandler_Mv_Gv_REXW(Code code32, Code code64)
		{
			this.code32 = code32;
			this.code64 = code64;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if ((decoder.state.zs.flags & StateFlags.W) != 0)
			{
				instruction.InternalSetCodeNoCheck(code64);
				instruction.Op1Register = (Register)(decoder.state.reg + decoder.state.zs.extraRegisterBase + 53);
			}
			else
			{
				instruction.InternalSetCodeNoCheck(code32);
				instruction.Op1Register = (Register)(decoder.state.reg + decoder.state.zs.extraRegisterBase + 37);
			}
			if (decoder.state.mod == 3)
			{
				decoder.SetInvalidInstruction();
				return;
			}
			instruction.Op0Kind = OpKind.Memory;
			decoder.ReadOpMem(ref instruction);
		}
	}
	internal sealed class OpCodeHandler_Gv_N_Ib_REX : OpCodeHandlerModRM
	{
		private readonly Code code32;

		private readonly Code code64;

		public OpCodeHandler_Gv_N_Ib_REX(Code code32, Code code64)
		{
			this.code32 = code32;
			this.code64 = code64;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if ((decoder.state.zs.flags & StateFlags.W) != 0)
			{
				instruction.InternalSetCodeNoCheck(code64);
			}
			else
			{
				instruction.InternalSetCodeNoCheck(code32);
			}
			if ((decoder.state.zs.flags & StateFlags.W) != 0)
			{
				instruction.Op0Register = (Register)(decoder.state.reg + decoder.state.zs.extraRegisterBase + 53);
			}
			else
			{
				instruction.Op0Register = (Register)(decoder.state.reg + decoder.state.zs.extraRegisterBase + 37);
			}
			if (decoder.state.mod == 3)
			{
				instruction.Op1Register = (Register)(decoder.state.rm + 225);
			}
			else
			{
				decoder.SetInvalidInstruction();
			}
			instruction.Op2Kind = OpKind.Immediate8;
			instruction.InternalImmediate8 = decoder.ReadByte();
		}
	}
	internal sealed class OpCodeHandler_Gv_N : OpCodeHandlerModRM
	{
		private readonly Code code32;

		private readonly Code code64;

		public OpCodeHandler_Gv_N(Code code32, Code code64)
		{
			this.code32 = code32;
			this.code64 = code64;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if ((decoder.state.zs.flags & StateFlags.W) != 0)
			{
				instruction.InternalSetCodeNoCheck(code64);
			}
			else
			{
				instruction.InternalSetCodeNoCheck(code32);
			}
			if ((decoder.state.zs.flags & StateFlags.W) != 0)
			{
				instruction.Op0Register = (Register)(decoder.state.reg + decoder.state.zs.extraRegisterBase + 53);
			}
			else
			{
				instruction.Op0Register = (Register)(decoder.state.reg + decoder.state.zs.extraRegisterBase + 37);
			}
			if (decoder.state.mod == 3)
			{
				instruction.Op1Register = (Register)(decoder.state.rm + 225);
			}
			else
			{
				decoder.SetInvalidInstruction();
			}
		}
	}
	internal sealed class OpCodeHandler_VN : OpCodeHandlerModRM
	{
		private readonly Code code;

		public OpCodeHandler_VN(Code code)
		{
			this.code = code;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			instruction.InternalSetCodeNoCheck(code);
			instruction.Op0Register = (Register)(decoder.state.reg + decoder.state.zs.extraRegisterBase + 77);
			if (decoder.state.mod == 3)
			{
				instruction.Op1Register = (Register)(decoder.state.rm + 225);
			}
			else
			{
				decoder.SetInvalidInstruction();
			}
		}
	}
	internal sealed class OpCodeHandler_Gv_Mv : OpCodeHandlerModRM
	{
		private readonly Code3 codes;

		public OpCodeHandler_Gv_Mv(Code code16, Code code32, Code code64)
		{
			codes = new Code3(code16, code32, code64);
		}

		public unsafe override void Decode(Decoder decoder, ref Instruction instruction)
		{
			nuint num = (nuint)decoder.state.operandSize;
			instruction.InternalSetCodeNoCheck((Code)codes.codes[num]);
			instruction.Op0Register = (Register)(((int)num << 4) + (int)(decoder.state.reg + decoder.state.zs.extraRegisterBase) + 21);
			if (decoder.state.mod == 3)
			{
				decoder.SetInvalidInstruction();
				return;
			}
			instruction.Op1Kind = OpKind.Memory;
			decoder.ReadOpMem(ref instruction);
		}
	}
	internal sealed class OpCodeHandler_Mv_Gv : OpCodeHandlerModRM
	{
		private readonly Code3 codes;

		public OpCodeHandler_Mv_Gv(Code code16, Code code32, Code code64)
		{
			codes = new Code3(code16, code32, code64);
		}

		public unsafe override void Decode(Decoder decoder, ref Instruction instruction)
		{
			nuint num = (nuint)decoder.state.operandSize;
			instruction.InternalSetCodeNoCheck((Code)codes.codes[num]);
			instruction.Op1Register = (Register)(((int)num << 4) + (int)(decoder.state.reg + decoder.state.zs.extraRegisterBase) + 21);
			if (decoder.state.mod == 3)
			{
				decoder.SetInvalidInstruction();
				return;
			}
			instruction.Op0Kind = OpKind.Memory;
			decoder.ReadOpMem(ref instruction);
		}
	}
	internal sealed class OpCodeHandler_Gv_Eb_REX : OpCodeHandlerModRM
	{
		private readonly Code code32;

		private readonly Code code64;

		public OpCodeHandler_Gv_Eb_REX(Code code32, Code code64)
		{
			this.code32 = code32;
			this.code64 = code64;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if ((decoder.state.zs.flags & StateFlags.W) != 0)
			{
				instruction.InternalSetCodeNoCheck(code64);
				instruction.Op0Register = (Register)(decoder.state.reg + decoder.state.zs.extraRegisterBase + 53);
			}
			else
			{
				instruction.InternalSetCodeNoCheck(code32);
				instruction.Op0Register = (Register)(decoder.state.reg + decoder.state.zs.extraRegisterBase + 37);
			}
			if (decoder.state.mod == 3)
			{
				uint num = decoder.state.rm + decoder.state.zs.extraBaseRegisterBase;
				if ((decoder.state.zs.flags & StateFlags.HasRex) != 0 && num >= 4)
				{
					num += 4;
				}
				instruction.Op1Register = (Register)(num + 1);
			}
			else
			{
				instruction.Op1Kind = OpKind.Memory;
				decoder.ReadOpMem(ref instruction);
			}
		}
	}
	internal sealed class OpCodeHandler_Gv_Ev_REX : OpCodeHandlerModRM
	{
		private readonly Code code32;

		private readonly Code code64;

		public OpCodeHandler_Gv_Ev_REX(Code code32, Code code64)
		{
			this.code32 = code32;
			this.code64 = code64;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if ((decoder.state.zs.flags & StateFlags.W) != 0)
			{
				instruction.InternalSetCodeNoCheck(code64);
				instruction.Op0Register = (Register)(decoder.state.reg + decoder.state.zs.extraRegisterBase + 53);
			}
			else
			{
				instruction.InternalSetCodeNoCheck(code32);
				instruction.Op0Register = (Register)(decoder.state.reg + decoder.state.zs.extraRegisterBase + 37);
			}
			if (decoder.state.mod == 3)
			{
				if ((decoder.state.zs.flags & StateFlags.W) != 0)
				{
					instruction.Op1Register = (Register)(decoder.state.rm + decoder.state.zs.extraBaseRegisterBase + 53);
				}
				else
				{
					instruction.Op1Register = (Register)(decoder.state.rm + decoder.state.zs.extraBaseRegisterBase + 37);
				}
			}
			else
			{
				instruction.Op1Kind = OpKind.Memory;
				decoder.ReadOpMem(ref instruction);
			}
		}
	}
	internal sealed class OpCodeHandler_Ev_Gv_REX : OpCodeHandlerModRM
	{
		private readonly Code code32;

		private readonly Code code64;

		public OpCodeHandler_Ev_Gv_REX(Code code32, Code code64)
		{
			this.code32 = code32;
			this.code64 = code64;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if ((decoder.state.zs.flags & StateFlags.W) != 0)
			{
				instruction.InternalSetCodeNoCheck(code64);
				instruction.Op1Register = (Register)(decoder.state.reg + decoder.state.zs.extraRegisterBase + 53);
			}
			else
			{
				instruction.InternalSetCodeNoCheck(code32);
				instruction.Op1Register = (Register)(decoder.state.reg + decoder.state.zs.extraRegisterBase + 37);
			}
			instruction.Op0Kind = OpKind.Memory;
			decoder.ReadOpMem(ref instruction);
		}
	}
	internal sealed class OpCodeHandler_GvM_VX_Ib : OpCodeHandlerModRM
	{
		private readonly Code code32;

		private readonly Code code64;

		public OpCodeHandler_GvM_VX_Ib(Code code32, Code code64)
		{
			this.code32 = code32;
			this.code64 = code64;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			instruction.Op1Register = (Register)(decoder.state.reg + decoder.state.zs.extraRegisterBase + 77);
			Register register;
			if ((decoder.state.zs.flags & StateFlags.W) != 0)
			{
				instruction.InternalSetCodeNoCheck(code64);
				register = Register.RAX;
			}
			else
			{
				instruction.InternalSetCodeNoCheck(code32);
				register = Register.EAX;
			}
			if (decoder.state.mod == 3)
			{
				instruction.Op0Register = (Register)((int)(decoder.state.rm + decoder.state.zs.extraBaseRegisterBase) + (int)register);
			}
			else
			{
				instruction.Op0Kind = OpKind.Memory;
				decoder.ReadOpMem(ref instruction);
			}
			instruction.Op2Kind = OpKind.Immediate8;
			instruction.InternalImmediate8 = decoder.ReadByte();
		}
	}
	internal sealed class OpCodeHandler_Wbinvd : OpCodeHandler
	{
		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if ((decoder.options & DecoderOptions.NoWbnoinvd) != 0 || decoder.state.zs.mandatoryPrefix != MandatoryPrefixByte.PF3)
			{
				instruction.InternalSetCodeNoCheck(Code.Wbinvd);
				return;
			}
			decoder.ClearMandatoryPrefixF3(ref instruction);
			instruction.InternalSetCodeNoCheck(Code.Wbnoinvd);
		}
	}
	internal sealed class OpCodeHandler_EH : OpCodeHandlerModRM
	{
		private readonly OpCodeHandler handlerEH0;

		private readonly OpCodeHandler handlerEH1;

		public OpCodeHandler_EH(OpCodeHandler handlerEH0, OpCodeHandler handlerEH1)
		{
			this.handlerEH0 = handlerEH0 ?? throw new ArgumentNullException("handlerEH0");
			this.handlerEH1 = handlerEH1 ?? throw new ArgumentNullException("handlerEH1");
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			(((decoder.state.zs.flags & StateFlags.MvexEH) != 0) ? handlerEH1 : handlerEH0).Decode(decoder, ref instruction);
		}
	}
	internal sealed class OpCodeHandler_MVEX_M : OpCodeHandlerModRM
	{
		private readonly Code code;

		public OpCodeHandler_MVEX_M(Code code)
		{
			this.code = code;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if ((decoder.state.vvvv_invalidCheck & decoder.invalidCheckMask) != 0)
			{
				decoder.SetInvalidInstruction();
			}
			instruction.OpMask = Register.None;
			instruction.InternalSetCodeNoCheck(code);
			MvexInfo mvexInfo = new MvexInfo(code);
			int sss = decoder.state.Sss;
			if (decoder.state.mod == 3)
			{
				decoder.SetInvalidInstruction();
				return;
			}
			instruction.Op0Kind = OpKind.Memory;
			if ((mvexInfo.InvalidConvFns & (uint)(1 << sss) & decoder.invalidCheckMask) != 0)
			{
				decoder.SetInvalidInstruction();
			}
			instruction.InternalSetMvexRegMemConv((MvexRegMemConv)(9 + sss));
			decoder.ReadOpMem(ref instruction, mvexInfo.GetTupleType(sss));
		}
	}
	internal sealed class OpCodeHandler_MVEX_MV : OpCodeHandlerModRM
	{
		private readonly Code code;

		public OpCodeHandler_MVEX_MV(Code code)
		{
			this.code = code;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if ((decoder.state.vvvv_invalidCheck & decoder.invalidCheckMask) != 0)
			{
				decoder.SetInvalidInstruction();
			}
			instruction.InternalSetCodeNoCheck(code);
			instruction.Op1Register = (Register)(decoder.state.reg + decoder.state.zs.extraRegisterBase + decoder.state.extraRegisterBaseEVEX + 141);
			MvexInfo mvexInfo = new MvexInfo(code);
			int sss = decoder.state.Sss;
			if (decoder.state.mod == 3)
			{
				decoder.SetInvalidInstruction();
				return;
			}
			instruction.Op0Kind = OpKind.Memory;
			if (mvexInfo.CanUseEvictionHint && (decoder.state.zs.flags & StateFlags.MvexEH) != 0)
			{
				instruction.InternalSetIsMvexEvictionHint();
			}
			if ((mvexInfo.InvalidConvFns & (uint)(1 << sss) & decoder.invalidCheckMask) != 0)
			{
				decoder.SetInvalidInstruction();
			}
			instruction.InternalSetMvexRegMemConv((MvexRegMemConv)(9 + sss));
			decoder.ReadOpMem(ref instruction, mvexInfo.GetTupleType(sss));
		}
	}
	internal sealed class OpCodeHandler_MVEX_VW : OpCodeHandlerModRM
	{
		private readonly Code code;

		public OpCodeHandler_MVEX_VW(Code code)
		{
			this.code = code;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if ((decoder.state.vvvv_invalidCheck & decoder.invalidCheckMask) != 0)
			{
				decoder.SetInvalidInstruction();
			}
			instruction.InternalSetCodeNoCheck(code);
			instruction.Op0Register = (Register)(decoder.state.reg + decoder.state.zs.extraRegisterBase + decoder.state.extraRegisterBaseEVEX + 141);
			MvexInfo mvexInfo = new MvexInfo(code);
			int sss = decoder.state.Sss;
			if (decoder.state.mod == 3)
			{
				instruction.Op1Register = (Register)(decoder.state.rm + decoder.state.extraBaseRegisterBaseEVEX + 141);
				if ((decoder.state.zs.flags & StateFlags.MvexEH) != 0)
				{
					if (mvexInfo.CanUseSuppressAllExceptions)
					{
						if (((uint)sss & 4u) != 0)
						{
							instruction.InternalSetSuppressAllExceptions();
						}
						if (mvexInfo.CanUseRoundingControl)
						{
							instruction.InternalRoundingControl = (uint)((sss & 3) + 1);
						}
					}
					else if (mvexInfo.NoSaeRc && ((uint)sss & decoder.invalidCheckMask) != 0)
					{
						decoder.SetInvalidInstruction();
					}
				}
				else
				{
					if ((mvexInfo.InvalidSwizzleFns & (uint)(1 << sss) & decoder.invalidCheckMask) != 0)
					{
						decoder.SetInvalidInstruction();
					}
					instruction.InternalSetMvexRegMemConv((MvexRegMemConv)(1 + sss));
				}
			}
			else
			{
				instruction.Op1Kind = OpKind.Memory;
				if ((decoder.state.zs.flags & StateFlags.MvexEH) != 0)
				{
					instruction.InternalSetIsMvexEvictionHint();
				}
				if ((mvexInfo.InvalidConvFns & (uint)(1 << sss) & decoder.invalidCheckMask) != 0)
				{
					decoder.SetInvalidInstruction();
				}
				instruction.InternalSetMvexRegMemConv((MvexRegMemConv)(9 + sss));
				decoder.ReadOpMem(ref instruction, mvexInfo.GetTupleType(sss));
			}
		}
	}
	internal sealed class OpCodeHandler_MVEX_HWIb : OpCodeHandlerModRM
	{
		private readonly Code code;

		public OpCodeHandler_MVEX_HWIb(Code code)
		{
			this.code = code;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			instruction.InternalSetCodeNoCheck(code);
			instruction.Op0Register = (Register)(decoder.state.vvvv + 141);
			MvexInfo mvexInfo = new MvexInfo(code);
			int sss = decoder.state.Sss;
			if (decoder.state.mod == 3)
			{
				instruction.Op1Register = (Register)(decoder.state.rm + decoder.state.extraBaseRegisterBaseEVEX + 141);
				if ((decoder.state.zs.flags & StateFlags.MvexEH) != 0)
				{
					if (mvexInfo.CanUseSuppressAllExceptions)
					{
						if (((uint)sss & 4u) != 0)
						{
							instruction.InternalSetSuppressAllExceptions();
						}
						if (mvexInfo.CanUseRoundingControl)
						{
							instruction.InternalRoundingControl = (uint)((sss & 3) + 1);
						}
					}
					else if (mvexInfo.NoSaeRc && ((uint)sss & decoder.invalidCheckMask) != 0)
					{
						decoder.SetInvalidInstruction();
					}
				}
				else
				{
					if ((mvexInfo.InvalidSwizzleFns & (uint)(1 << sss) & decoder.invalidCheckMask) != 0)
					{
						decoder.SetInvalidInstruction();
					}
					instruction.InternalSetMvexRegMemConv((MvexRegMemConv)(1 + sss));
				}
			}
			else
			{
				instruction.Op1Kind = OpKind.Memory;
				if ((decoder.state.zs.flags & StateFlags.MvexEH) != 0)
				{
					instruction.InternalSetIsMvexEvictionHint();
				}
				if ((mvexInfo.InvalidConvFns & (uint)(1 << sss) & decoder.invalidCheckMask) != 0)
				{
					decoder.SetInvalidInstruction();
				}
				instruction.InternalSetMvexRegMemConv((MvexRegMemConv)(9 + sss));
				decoder.ReadOpMem(ref instruction, mvexInfo.GetTupleType(sss));
			}
			instruction.Op2Kind = OpKind.Immediate8;
			instruction.Immediate8 = (byte)decoder.ReadByte();
		}
	}
	internal sealed class OpCodeHandler_MVEX_VWIb : OpCodeHandlerModRM
	{
		private readonly Code code;

		public OpCodeHandler_MVEX_VWIb(Code code)
		{
			this.code = code;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if ((decoder.state.vvvv_invalidCheck & decoder.invalidCheckMask) != 0)
			{
				decoder.SetInvalidInstruction();
			}
			instruction.InternalSetCodeNoCheck(code);
			instruction.Op0Register = (Register)(decoder.state.reg + decoder.state.zs.extraRegisterBase + decoder.state.extraRegisterBaseEVEX + 141);
			MvexInfo mvexInfo = new MvexInfo(code);
			int sss = decoder.state.Sss;
			if (decoder.state.mod == 3)
			{
				instruction.Op1Register = (Register)(decoder.state.rm + decoder.state.extraBaseRegisterBaseEVEX + 141);
				if ((decoder.state.zs.flags & StateFlags.MvexEH) != 0)
				{
					if (mvexInfo.CanUseSuppressAllExceptions)
					{
						if (((uint)sss & 4u) != 0)
						{
							instruction.InternalSetSuppressAllExceptions();
						}
						if (mvexInfo.CanUseRoundingControl)
						{
							instruction.InternalRoundingControl = (uint)((sss & 3) + 1);
						}
					}
					else if (mvexInfo.NoSaeRc && ((uint)sss & decoder.invalidCheckMask) != 0)
					{
						decoder.SetInvalidInstruction();
					}
				}
				else
				{
					if ((mvexInfo.InvalidSwizzleFns & (uint)(1 << sss) & decoder.invalidCheckMask) != 0)
					{
						decoder.SetInvalidInstruction();
					}
					instruction.InternalSetMvexRegMemConv((MvexRegMemConv)(1 + sss));
				}
			}
			else
			{
				instruction.Op1Kind = OpKind.Memory;
				if ((decoder.state.zs.flags & StateFlags.MvexEH) != 0)
				{
					instruction.InternalSetIsMvexEvictionHint();
				}
				if ((mvexInfo.InvalidConvFns & (uint)(1 << sss) & decoder.invalidCheckMask) != 0)
				{
					decoder.SetInvalidInstruction();
				}
				instruction.InternalSetMvexRegMemConv((MvexRegMemConv)(9 + sss));
				decoder.ReadOpMem(ref instruction, mvexInfo.GetTupleType(sss));
			}
			instruction.Op2Kind = OpKind.Immediate8;
			instruction.Immediate8 = (byte)decoder.ReadByte();
		}
	}
	internal sealed class OpCodeHandler_MVEX_VHW : OpCodeHandlerModRM
	{
		private readonly Code code;

		public OpCodeHandler_MVEX_VHW(Code code)
		{
			this.code = code;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			instruction.InternalSetCodeNoCheck(code);
			instruction.Op0Register = (Register)(decoder.state.reg + decoder.state.zs.extraRegisterBase + decoder.state.extraRegisterBaseEVEX + 141);
			instruction.Op1Register = (Register)(decoder.state.vvvv + 141);
			MvexInfo mvexInfo = new MvexInfo(code);
			if (mvexInfo.RequireOpMaskRegister && decoder.invalidCheckMask != 0 && decoder.state.aaa == 0)
			{
				decoder.SetInvalidInstruction();
			}
			int sss = decoder.state.Sss;
			if (decoder.state.mod == 3)
			{
				instruction.Op2Register = (Register)(decoder.state.rm + decoder.state.extraBaseRegisterBaseEVEX + 141);
				if ((decoder.state.zs.flags & StateFlags.MvexEH) != 0)
				{
					if (mvexInfo.CanUseSuppressAllExceptions)
					{
						if (((uint)sss & 4u) != 0)
						{
							instruction.InternalSetSuppressAllExceptions();
						}
						if (mvexInfo.CanUseRoundingControl)
						{
							instruction.InternalRoundingControl = (uint)((sss & 3) + 1);
						}
					}
					else if (mvexInfo.NoSaeRc && ((uint)sss & decoder.invalidCheckMask) != 0)
					{
						decoder.SetInvalidInstruction();
					}
				}
				else
				{
					if ((mvexInfo.InvalidSwizzleFns & (uint)(1 << sss) & decoder.invalidCheckMask) != 0)
					{
						decoder.SetInvalidInstruction();
					}
					instruction.InternalSetMvexRegMemConv((MvexRegMemConv)(1 + sss));
				}
			}
			else
			{
				instruction.Op2Kind = OpKind.Memory;
				if ((decoder.state.zs.flags & StateFlags.MvexEH) != 0)
				{
					instruction.InternalSetIsMvexEvictionHint();
				}
				if ((mvexInfo.InvalidConvFns & (uint)(1 << sss) & decoder.invalidCheckMask) != 0)
				{
					decoder.SetInvalidInstruction();
				}
				instruction.InternalSetMvexRegMemConv((MvexRegMemConv)(9 + sss));
				decoder.ReadOpMem(ref instruction, mvexInfo.GetTupleType(sss));
			}
		}
	}
	internal sealed class OpCodeHandler_MVEX_VHWIb : OpCodeHandlerModRM
	{
		private readonly Code code;

		public OpCodeHandler_MVEX_VHWIb(Code code)
		{
			this.code = code;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			instruction.InternalSetCodeNoCheck(code);
			instruction.Op0Register = (Register)(decoder.state.reg + decoder.state.zs.extraRegisterBase + decoder.state.extraRegisterBaseEVEX + 141);
			instruction.Op1Register = (Register)(decoder.state.vvvv + 141);
			MvexInfo mvexInfo = new MvexInfo(code);
			int sss = decoder.state.Sss;
			if (decoder.state.mod == 3)
			{
				instruction.Op2Register = (Register)(decoder.state.rm + decoder.state.extraBaseRegisterBaseEVEX + 141);
				if ((decoder.state.zs.flags & StateFlags.MvexEH) != 0)
				{
					if (mvexInfo.CanUseSuppressAllExceptions)
					{
						if (((uint)sss & 4u) != 0)
						{
							instruction.InternalSetSuppressAllExceptions();
						}
						if (mvexInfo.CanUseRoundingControl)
						{
							instruction.InternalRoundingControl = (uint)((sss & 3) + 1);
						}
					}
					else if (mvexInfo.NoSaeRc && ((uint)sss & decoder.invalidCheckMask) != 0)
					{
						decoder.SetInvalidInstruction();
					}
				}
				else
				{
					if ((mvexInfo.InvalidSwizzleFns & (uint)(1 << sss) & decoder.invalidCheckMask) != 0)
					{
						decoder.SetInvalidInstruction();
					}
					instruction.InternalSetMvexRegMemConv((MvexRegMemConv)(1 + sss));
				}
			}
			else
			{
				instruction.Op2Kind = OpKind.Memory;
				if ((decoder.state.zs.flags & StateFlags.MvexEH) != 0)
				{
					instruction.InternalSetIsMvexEvictionHint();
				}
				if ((mvexInfo.InvalidConvFns & (uint)(1 << sss) & decoder.invalidCheckMask) != 0)
				{
					decoder.SetInvalidInstruction();
				}
				instruction.InternalSetMvexRegMemConv((MvexRegMemConv)(9 + sss));
				decoder.ReadOpMem(ref instruction, mvexInfo.GetTupleType(sss));
			}
			instruction.Op3Kind = OpKind.Immediate8;
			instruction.Immediate8 = (byte)decoder.ReadByte();
		}
	}
	internal sealed class OpCodeHandler_MVEX_VKW : OpCodeHandlerModRM
	{
		private readonly Code code;

		public OpCodeHandler_MVEX_VKW(Code code)
		{
			this.code = code;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if ((decoder.state.vvvv & decoder.invalidCheckMask) > 7)
			{
				decoder.SetInvalidInstruction();
			}
			instruction.InternalSetCodeNoCheck(code);
			instruction.Op0Register = (Register)(decoder.state.reg + decoder.state.zs.extraRegisterBase + decoder.state.extraRegisterBaseEVEX + 141);
			instruction.Op1Register = (Register)((decoder.state.vvvv & 7) + 173);
			MvexInfo mvexInfo = new MvexInfo(code);
			int sss = decoder.state.Sss;
			if (decoder.state.mod == 3)
			{
				instruction.Op2Register = (Register)(decoder.state.rm + decoder.state.extraBaseRegisterBaseEVEX + 141);
				if ((decoder.state.zs.flags & StateFlags.MvexEH) != 0)
				{
					if (mvexInfo.CanUseSuppressAllExceptions)
					{
						if (((uint)sss & 4u) != 0)
						{
							instruction.InternalSetSuppressAllExceptions();
						}
						if (mvexInfo.CanUseRoundingControl)
						{
							instruction.InternalRoundingControl = (uint)((sss & 3) + 1);
						}
					}
					else if (mvexInfo.NoSaeRc && ((uint)sss & decoder.invalidCheckMask) != 0)
					{
						decoder.SetInvalidInstruction();
					}
				}
				else
				{
					if ((mvexInfo.InvalidSwizzleFns & (uint)(1 << sss) & decoder.invalidCheckMask) != 0)
					{
						decoder.SetInvalidInstruction();
					}
					instruction.InternalSetMvexRegMemConv((MvexRegMemConv)(1 + sss));
				}
			}
			else
			{
				instruction.Op2Kind = OpKind.Memory;
				if ((decoder.state.zs.flags & StateFlags.MvexEH) != 0)
				{
					instruction.InternalSetIsMvexEvictionHint();
				}
				if ((mvexInfo.InvalidConvFns & (uint)(1 << sss) & decoder.invalidCheckMask) != 0)
				{
					decoder.SetInvalidInstruction();
				}
				instruction.InternalSetMvexRegMemConv((MvexRegMemConv)(9 + sss));
				decoder.ReadOpMem(ref instruction, mvexInfo.GetTupleType(sss));
			}
		}
	}
	internal sealed class OpCodeHandler_MVEX_KHW : OpCodeHandlerModRM
	{
		private readonly Code code;

		public OpCodeHandler_MVEX_KHW(Code code)
		{
			this.code = code;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			instruction.InternalSetCodeNoCheck(code);
			instruction.Op0Register = (Register)(decoder.state.reg + 173);
			instruction.Op1Register = (Register)(decoder.state.vvvv + 141);
			if (((decoder.state.zs.extraRegisterBase | decoder.state.extraRegisterBaseEVEX) & decoder.invalidCheckMask) != 0)
			{
				decoder.SetInvalidInstruction();
			}
			MvexInfo mvexInfo = new MvexInfo(code);
			int sss = decoder.state.Sss;
			if (decoder.state.mod == 3)
			{
				instruction.Op2Register = (Register)(decoder.state.rm + decoder.state.extraBaseRegisterBaseEVEX + 141);
				if ((decoder.state.zs.flags & StateFlags.MvexEH) != 0)
				{
					if (mvexInfo.CanUseSuppressAllExceptions)
					{
						if (((uint)sss & 4u) != 0)
						{
							instruction.InternalSetSuppressAllExceptions();
						}
						if (mvexInfo.CanUseRoundingControl)
						{
							instruction.InternalRoundingControl = (uint)((sss & 3) + 1);
						}
					}
					else if (mvexInfo.NoSaeRc && ((uint)sss & decoder.invalidCheckMask) != 0)
					{
						decoder.SetInvalidInstruction();
					}
				}
				else
				{
					if ((mvexInfo.InvalidSwizzleFns & (uint)(1 << sss) & decoder.invalidCheckMask) != 0)
					{
						decoder.SetInvalidInstruction();
					}
					instruction.InternalSetMvexRegMemConv((MvexRegMemConv)(1 + sss));
				}
			}
			else
			{
				instruction.Op2Kind = OpKind.Memory;
				if ((decoder.state.zs.flags & StateFlags.MvexEH) != 0)
				{
					instruction.InternalSetIsMvexEvictionHint();
				}
				if ((mvexInfo.InvalidConvFns & (uint)(1 << sss) & decoder.invalidCheckMask) != 0)
				{
					decoder.SetInvalidInstruction();
				}
				instruction.InternalSetMvexRegMemConv((MvexRegMemConv)(9 + sss));
				decoder.ReadOpMem(ref instruction, mvexInfo.GetTupleType(sss));
			}
		}
	}
	internal sealed class OpCodeHandler_MVEX_KHWIb : OpCodeHandlerModRM
	{
		private readonly Code code;

		public OpCodeHandler_MVEX_KHWIb(Code code)
		{
			this.code = code;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			instruction.InternalSetCodeNoCheck(code);
			instruction.Op0Register = (Register)(decoder.state.reg + 173);
			instruction.Op1Register = (Register)(decoder.state.vvvv + 141);
			MvexInfo mvexInfo = new MvexInfo(code);
			int sss = decoder.state.Sss;
			if (decoder.state.mod == 3)
			{
				instruction.Op2Register = (Register)(decoder.state.rm + decoder.state.extraBaseRegisterBaseEVEX + 141);
				if ((decoder.state.zs.flags & StateFlags.MvexEH) != 0)
				{
					if (mvexInfo.CanUseSuppressAllExceptions)
					{
						if (((uint)sss & 4u) != 0)
						{
							instruction.InternalSetSuppressAllExceptions();
						}
						if (mvexInfo.CanUseRoundingControl)
						{
							instruction.InternalRoundingControl = (uint)((sss & 3) + 1);
						}
					}
					else if (mvexInfo.NoSaeRc && ((uint)sss & decoder.invalidCheckMask) != 0)
					{
						decoder.SetInvalidInstruction();
					}
				}
				else
				{
					if ((mvexInfo.InvalidSwizzleFns & (uint)(1 << sss) & decoder.invalidCheckMask) != 0)
					{
						decoder.SetInvalidInstruction();
					}
					instruction.InternalSetMvexRegMemConv((MvexRegMemConv)(1 + sss));
				}
			}
			else
			{
				instruction.Op2Kind = OpKind.Memory;
				if ((decoder.state.zs.flags & StateFlags.MvexEH) != 0)
				{
					instruction.InternalSetIsMvexEvictionHint();
				}
				if ((mvexInfo.InvalidConvFns & (uint)(1 << sss) & decoder.invalidCheckMask) != 0)
				{
					decoder.SetInvalidInstruction();
				}
				instruction.InternalSetMvexRegMemConv((MvexRegMemConv)(9 + sss));
				decoder.ReadOpMem(ref instruction, mvexInfo.GetTupleType(sss));
			}
			if (((decoder.state.zs.extraRegisterBase | decoder.state.extraRegisterBaseEVEX) & decoder.invalidCheckMask) != 0)
			{
				decoder.SetInvalidInstruction();
			}
			instruction.Op3Kind = OpKind.Immediate8;
			instruction.Immediate8 = (byte)decoder.ReadByte();
		}
	}
	internal sealed class OpCodeHandler_MVEX_VSIB : OpCodeHandlerModRM
	{
		private readonly Code code;

		public OpCodeHandler_MVEX_VSIB(Code code)
		{
			this.code = code;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if (decoder.invalidCheckMask != 0 && ((decoder.state.vvvv_invalidCheck & 0xFu) != 0 || decoder.state.aaa == 0))
			{
				decoder.SetInvalidInstruction();
			}
			instruction.InternalSetCodeNoCheck(code);
			MvexInfo mvexInfo = new MvexInfo(code);
			int sss = decoder.state.Sss;
			if (decoder.state.mod == 3)
			{
				decoder.SetInvalidInstruction();
				return;
			}
			instruction.Op0Kind = OpKind.Memory;
			if ((decoder.state.zs.flags & StateFlags.MvexEH) != 0)
			{
				instruction.InternalSetIsMvexEvictionHint();
			}
			if ((mvexInfo.InvalidConvFns & (uint)(1 << sss) & decoder.invalidCheckMask) != 0)
			{
				decoder.SetInvalidInstruction();
			}
			instruction.InternalSetMvexRegMemConv((MvexRegMemConv)(9 + sss));
			decoder.ReadOpMem_VSIB(ref instruction, Register.ZMM0, mvexInfo.GetTupleType(sss));
		}
	}
	internal sealed class OpCodeHandler_MVEX_VSIB_V : OpCodeHandlerModRM
	{
		private readonly Code code;

		public OpCodeHandler_MVEX_VSIB_V(Code code)
		{
			this.code = code;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if (decoder.invalidCheckMask != 0 && ((decoder.state.vvvv_invalidCheck & 0xFu) != 0 || decoder.state.aaa == 0))
			{
				decoder.SetInvalidInstruction();
			}
			instruction.InternalSetCodeNoCheck(code);
			instruction.Op1Register = (Register)(decoder.state.reg + decoder.state.zs.extraRegisterBase + decoder.state.extraRegisterBaseEVEX + 141);
			MvexInfo mvexInfo = new MvexInfo(code);
			int sss = decoder.state.Sss;
			if (decoder.state.mod == 3)
			{
				decoder.SetInvalidInstruction();
				return;
			}
			instruction.Op0Kind = OpKind.Memory;
			if ((decoder.state.zs.flags & StateFlags.MvexEH) != 0)
			{
				instruction.InternalSetIsMvexEvictionHint();
			}
			if ((mvexInfo.InvalidConvFns & (uint)(1 << sss) & decoder.invalidCheckMask) != 0)
			{
				decoder.SetInvalidInstruction();
			}
			instruction.InternalSetMvexRegMemConv((MvexRegMemConv)(9 + sss));
			decoder.ReadOpMem_VSIB(ref instruction, Register.ZMM0, mvexInfo.GetTupleType(sss));
		}
	}
	internal sealed class OpCodeHandler_MVEX_V_VSIB : OpCodeHandlerModRM
	{
		private readonly Code code;

		public OpCodeHandler_MVEX_V_VSIB(Code code)
		{
			this.code = code;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if (decoder.invalidCheckMask != 0 && ((decoder.state.vvvv_invalidCheck & 0xFu) != 0 || decoder.state.aaa == 0))
			{
				decoder.SetInvalidInstruction();
			}
			instruction.InternalSetCodeNoCheck(code);
			int num = (int)(decoder.state.reg + decoder.state.zs.extraRegisterBase + decoder.state.extraRegisterBaseEVEX);
			instruction.Op0Register = (Register)(num + 141);
			MvexInfo mvexInfo = new MvexInfo(code);
			int sss = decoder.state.Sss;
			if (decoder.state.mod == 3)
			{
				decoder.SetInvalidInstruction();
				return;
			}
			instruction.Op1Kind = OpKind.Memory;
			if ((decoder.state.zs.flags & StateFlags.MvexEH) != 0)
			{
				instruction.InternalSetIsMvexEvictionHint();
			}
			if ((mvexInfo.InvalidConvFns & (uint)(1 << sss) & decoder.invalidCheckMask) != 0)
			{
				decoder.SetInvalidInstruction();
			}
			instruction.InternalSetMvexRegMemConv((MvexRegMemConv)(9 + sss));
			decoder.ReadOpMem_VSIB(ref instruction, Register.ZMM0, mvexInfo.GetTupleType(sss));
			if (decoder.invalidCheckMask != 0 && num == (int)((uint)(instruction.MemoryIndex - 77) % 32u))
			{
				decoder.SetInvalidInstruction();
			}
		}
	}
	internal sealed class OpCodeHandler_VectorLength_VEX : OpCodeHandlerModRM
	{
		private readonly OpCodeHandler[] handlers;

		public OpCodeHandler_VectorLength_VEX(OpCodeHandler handler128, OpCodeHandler handler256)
		{
			handlers = new OpCodeHandler[4]
			{
				handler128 ?? throw new ArgumentNullException("handler128"),
				handler256 ?? throw new ArgumentNullException("handler256"),
				OpCodeHandler_Invalid.Instance,
				OpCodeHandler_Invalid.Instance
			};
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			handlers[decoder.state.vectorLength].Decode(decoder, ref instruction);
		}
	}
	internal sealed class OpCodeHandler_VectorLength_NoModRM_VEX : OpCodeHandler
	{
		private readonly OpCodeHandler[] handlers;

		public OpCodeHandler_VectorLength_NoModRM_VEX(OpCodeHandler handler128, OpCodeHandler handler256)
		{
			handlers = new OpCodeHandler[4]
			{
				handler128 ?? throw new ArgumentNullException("handler128"),
				handler256 ?? throw new ArgumentNullException("handler256"),
				OpCodeHandler_Invalid.Instance,
				OpCodeHandler_Invalid.Instance
			};
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			handlers[decoder.state.vectorLength].Decode(decoder, ref instruction);
		}
	}
	internal sealed class OpCodeHandler_VEX_Simple : OpCodeHandler
	{
		private readonly Code code;

		public OpCodeHandler_VEX_Simple(Code code)
		{
			this.code = code;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if ((decoder.state.vvvv_invalidCheck & decoder.invalidCheckMask) != 0)
			{
				decoder.SetInvalidInstruction();
			}
			instruction.InternalSetCodeNoCheck(code);
		}
	}
	internal sealed class OpCodeHandler_VEX_VHEv : OpCodeHandlerModRM
	{
		private readonly Register baseReg;

		private readonly Code codeW0;

		private readonly Code codeW1;

		public OpCodeHandler_VEX_VHEv(Register baseReg, Code codeW0, Code codeW1)
		{
			this.baseReg = baseReg;
			this.codeW0 = codeW0;
			this.codeW1 = codeW1;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			Register register;
			if (((uint)decoder.state.zs.flags & decoder.is64bMode_and_W) != 0)
			{
				instruction.InternalSetCodeNoCheck(codeW1);
				register = Register.RAX;
			}
			else
			{
				instruction.InternalSetCodeNoCheck(codeW0);
				register = Register.EAX;
			}
			instruction.Op0Register = (Register)((int)(decoder.state.reg + decoder.state.zs.extraRegisterBase) + (int)baseReg);
			instruction.Op1Register = (Register)((int)decoder.state.vvvv + (int)baseReg);
			if (decoder.state.mod == 3)
			{
				instruction.Op2Register = (Register)((int)(decoder.state.rm + decoder.state.zs.extraBaseRegisterBase) + (int)register);
				return;
			}
			instruction.Op2Kind = OpKind.Memory;
			decoder.ReadOpMem(ref instruction);
		}
	}
	internal sealed class OpCodeHandler_VEX_VHEvIb : OpCodeHandlerModRM
	{
		private readonly Register baseReg;

		private readonly Code codeW0;

		private readonly Code codeW1;

		public OpCodeHandler_VEX_VHEvIb(Register baseReg, Code codeW0, Code codeW1)
		{
			this.baseReg = baseReg;
			this.codeW0 = codeW0;
			this.codeW1 = codeW1;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			Register register;
			if (((uint)decoder.state.zs.flags & decoder.is64bMode_and_W) != 0)
			{
				instruction.InternalSetCodeNoCheck(codeW1);
				register = Register.RAX;
			}
			else
			{
				instruction.InternalSetCodeNoCheck(codeW0);
				register = Register.EAX;
			}
			instruction.Op0Register = (Register)((int)(decoder.state.reg + decoder.state.zs.extraRegisterBase) + (int)baseReg);
			instruction.Op1Register = (Register)((int)decoder.state.vvvv + (int)baseReg);
			if (decoder.state.mod == 3)
			{
				instruction.Op2Register = (Register)((int)(decoder.state.rm + decoder.state.zs.extraBaseRegisterBase) + (int)register);
			}
			else
			{
				instruction.Op2Kind = OpKind.Memory;
				decoder.ReadOpMem(ref instruction);
			}
			instruction.Op3Kind = OpKind.Immediate8;
			instruction.InternalImmediate8 = decoder.ReadByte();
		}
	}
	internal sealed class OpCodeHandler_VEX_VW : OpCodeHandlerModRM
	{
		private readonly Register baseReg1;

		private readonly Register baseReg2;

		private readonly Code code;

		public OpCodeHandler_VEX_VW(Register baseReg, Code code)
		{
			baseReg1 = baseReg;
			baseReg2 = baseReg;
			this.code = code;
		}

		public OpCodeHandler_VEX_VW(Register baseReg1, Register baseReg2, Code code)
		{
			this.baseReg1 = baseReg1;
			this.baseReg2 = baseReg2;
			this.code = code;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if ((decoder.state.vvvv_invalidCheck & decoder.invalidCheckMask) != 0)
			{
				decoder.SetInvalidInstruction();
			}
			instruction.InternalSetCodeNoCheck(code);
			instruction.Op0Register = (Register)((int)(decoder.state.reg + decoder.state.zs.extraRegisterBase) + (int)baseReg1);
			if (decoder.state.mod == 3)
			{
				instruction.Op1Register = (Register)((int)(decoder.state.rm + decoder.state.zs.extraBaseRegisterBase) + (int)baseReg2);
				return;
			}
			instruction.Op1Kind = OpKind.Memory;
			decoder.ReadOpMem(ref instruction);
		}
	}
	internal sealed class OpCodeHandler_VEX_VX_Ev : OpCodeHandlerModRM
	{
		private readonly Code code32;

		private readonly Code code64;

		public OpCodeHandler_VEX_VX_Ev(Code code32, Code code64)
		{
			this.code32 = code32;
			this.code64 = code64;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if ((decoder.state.vvvv_invalidCheck & decoder.invalidCheckMask) != 0)
			{
				decoder.SetInvalidInstruction();
			}
			Register register;
			if (((uint)decoder.state.zs.flags & decoder.is64bMode_and_W) != 0)
			{
				instruction.InternalSetCodeNoCheck(code64);
				register = Register.RAX;
			}
			else
			{
				instruction.InternalSetCodeNoCheck(code32);
				register = Register.EAX;
			}
			instruction.Op0Register = (Register)(decoder.state.reg + decoder.state.zs.extraRegisterBase + 77);
			if (decoder.state.mod == 3)
			{
				instruction.Op1Register = (Register)((int)(decoder.state.rm + decoder.state.zs.extraBaseRegisterBase) + (int)register);
				return;
			}
			instruction.Op1Kind = OpKind.Memory;
			decoder.ReadOpMem(ref instruction);
		}
	}
	internal sealed class OpCodeHandler_VEX_Ev_VX : OpCodeHandlerModRM
	{
		private readonly Code code32;

		private readonly Code code64;

		public OpCodeHandler_VEX_Ev_VX(Code code32, Code code64)
		{
			this.code32 = code32;
			this.code64 = code64;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if ((decoder.state.vvvv_invalidCheck & decoder.invalidCheckMask) != 0)
			{
				decoder.SetInvalidInstruction();
			}
			instruction.Op1Register = (Register)(decoder.state.reg + decoder.state.zs.extraRegisterBase + 77);
			Register register;
			if (((uint)decoder.state.zs.flags & decoder.is64bMode_and_W) != 0)
			{
				instruction.InternalSetCodeNoCheck(code64);
				register = Register.RAX;
			}
			else
			{
				instruction.InternalSetCodeNoCheck(code32);
				register = Register.EAX;
			}
			if (decoder.state.mod == 3)
			{
				instruction.Op0Register = (Register)((int)(decoder.state.rm + decoder.state.zs.extraBaseRegisterBase) + (int)register);
				return;
			}
			instruction.Op0Kind = OpKind.Memory;
			decoder.ReadOpMem(ref instruction);
		}
	}
	internal sealed class OpCodeHandler_VEX_WV : OpCodeHandlerModRM
	{
		private readonly Register baseReg1;

		private readonly Register baseReg2;

		private readonly Code code;

		public OpCodeHandler_VEX_WV(Register baseReg, Code code)
		{
			baseReg1 = baseReg;
			baseReg2 = baseReg;
			this.code = code;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if ((decoder.state.vvvv_invalidCheck & decoder.invalidCheckMask) != 0)
			{
				decoder.SetInvalidInstruction();
			}
			instruction.InternalSetCodeNoCheck(code);
			instruction.Op1Register = (Register)((int)(decoder.state.reg + decoder.state.zs.extraRegisterBase) + (int)baseReg1);
			if (decoder.state.mod == 3)
			{
				instruction.Op0Register = (Register)((int)(decoder.state.rm + decoder.state.zs.extraBaseRegisterBase) + (int)baseReg2);
				return;
			}
			instruction.Op0Kind = OpKind.Memory;
			decoder.ReadOpMem(ref instruction);
		}
	}
	internal sealed class OpCodeHandler_VEX_VM : OpCodeHandlerModRM
	{
		private readonly Register baseReg;

		private readonly Code code;

		public OpCodeHandler_VEX_VM(Register baseReg, Code code)
		{
			this.baseReg = baseReg;
			this.code = code;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if ((decoder.state.vvvv_invalidCheck & decoder.invalidCheckMask) != 0)
			{
				decoder.SetInvalidInstruction();
			}
			instruction.InternalSetCodeNoCheck(code);
			instruction.Op0Register = (Register)((int)(decoder.state.reg + decoder.state.zs.extraRegisterBase) + (int)baseReg);
			if (decoder.state.mod == 3)
			{
				decoder.SetInvalidInstruction();
				return;
			}
			instruction.Op1Kind = OpKind.Memory;
			decoder.ReadOpMem(ref instruction);
		}
	}
	internal sealed class OpCodeHandler_VEX_MV : OpCodeHandlerModRM
	{
		private readonly Register baseReg;

		private readonly Code code;

		public OpCodeHandler_VEX_MV(Register baseReg, Code code)
		{
			this.baseReg = baseReg;
			this.code = code;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if ((decoder.state.vvvv_invalidCheck & decoder.invalidCheckMask) != 0)
			{
				decoder.SetInvalidInstruction();
			}
			instruction.InternalSetCodeNoCheck(code);
			instruction.Op1Register = (Register)((int)(decoder.state.reg + decoder.state.zs.extraRegisterBase) + (int)baseReg);
			if (decoder.state.mod == 3)
			{
				decoder.SetInvalidInstruction();
				return;
			}
			instruction.Op0Kind = OpKind.Memory;
			decoder.ReadOpMem(ref instruction);
		}
	}
	internal sealed class OpCodeHandler_VEX_M : OpCodeHandlerModRM
	{
		private readonly Code code;

		public OpCodeHandler_VEX_M(Code code)
		{
			this.code = code;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if ((decoder.state.vvvv_invalidCheck & decoder.invalidCheckMask) != 0)
			{
				decoder.SetInvalidInstruction();
			}
			instruction.InternalSetCodeNoCheck(code);
			if (decoder.state.mod == 3)
			{
				decoder.SetInvalidInstruction();
				return;
			}
			instruction.Op0Kind = OpKind.Memory;
			decoder.ReadOpMem(ref instruction);
		}
	}
	internal sealed class OpCodeHandler_VEX_RdRq : OpCodeHandlerModRM
	{
		private readonly Code code32;

		private readonly Code code64;

		public OpCodeHandler_VEX_RdRq(Code code32, Code code64)
		{
			this.code32 = code32;
			this.code64 = code64;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if ((decoder.state.vvvv_invalidCheck & decoder.invalidCheckMask) != 0)
			{
				decoder.SetInvalidInstruction();
			}
			if (((uint)decoder.state.zs.flags & decoder.is64bMode_and_W) != 0)
			{
				instruction.InternalSetCodeNoCheck(code64);
				instruction.Op0Register = (Register)(decoder.state.rm + decoder.state.zs.extraBaseRegisterBase + 53);
			}
			else
			{
				instruction.InternalSetCodeNoCheck(code32);
				instruction.Op0Register = (Register)(decoder.state.rm + decoder.state.zs.extraBaseRegisterBase + 37);
			}
			if (decoder.state.mod != 3)
			{
				decoder.SetInvalidInstruction();
			}
		}
	}
	internal sealed class OpCodeHandler_VEX_rDI_VX_RX : OpCodeHandlerModRM
	{
		private readonly Register baseReg;

		private readonly Code code;

		public OpCodeHandler_VEX_rDI_VX_RX(Register baseReg, Code code)
		{
			this.baseReg = baseReg;
			this.code = code;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if ((decoder.state.vvvv_invalidCheck & decoder.invalidCheckMask) != 0)
			{
				decoder.SetInvalidInstruction();
			}
			instruction.InternalSetCodeNoCheck(code);
			if (decoder.state.addressSize == OpSize.Size64)
			{
				instruction.Op0Kind = OpKind.MemorySegRDI;
			}
			else if (decoder.state.addressSize == OpSize.Size32)
			{
				instruction.Op0Kind = OpKind.MemorySegEDI;
			}
			else
			{
				instruction.Op0Kind = OpKind.MemorySegDI;
			}
			instruction.Op1Register = (Register)((int)(decoder.state.reg + decoder.state.zs.extraRegisterBase) + (int)baseReg);
			if (decoder.state.mod == 3)
			{
				instruction.Op2Register = (Register)((int)(decoder.state.rm + decoder.state.zs.extraBaseRegisterBase) + (int)baseReg);
			}
			else
			{
				decoder.SetInvalidInstruction();
			}
		}
	}
	internal sealed class OpCodeHandler_VEX_VWIb : OpCodeHandlerModRM
	{
		private readonly Register baseReg1;

		private readonly Register baseReg2;

		private readonly Code codeW0;

		private readonly Code codeW1;

		public OpCodeHandler_VEX_VWIb(Register baseReg, Code code)
		{
			baseReg1 = baseReg;
			baseReg2 = baseReg;
			codeW0 = code;
			codeW1 = code;
		}

		public OpCodeHandler_VEX_VWIb(Register baseReg, Code codeW0, Code codeW1)
		{
			baseReg1 = baseReg;
			baseReg2 = baseReg;
			this.codeW0 = codeW0;
			this.codeW1 = codeW1;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if ((decoder.state.vvvv_invalidCheck & decoder.invalidCheckMask) != 0)
			{
				decoder.SetInvalidInstruction();
			}
			if (((uint)decoder.state.zs.flags & decoder.is64bMode_and_W) != 0)
			{
				instruction.InternalSetCodeNoCheck(codeW1);
			}
			else
			{
				instruction.InternalSetCodeNoCheck(codeW0);
			}
			instruction.Op0Register = (Register)((int)(decoder.state.reg + decoder.state.zs.extraRegisterBase) + (int)baseReg1);
			if (decoder.state.mod == 3)
			{
				instruction.Op1Register = (Register)((int)(decoder.state.rm + decoder.state.zs.extraBaseRegisterBase) + (int)baseReg2);
			}
			else
			{
				instruction.Op1Kind = OpKind.Memory;
				decoder.ReadOpMem(ref instruction);
			}
			instruction.Op2Kind = OpKind.Immediate8;
			instruction.InternalImmediate8 = decoder.ReadByte();
		}
	}
	internal sealed class OpCodeHandler_VEX_WVIb : OpCodeHandlerModRM
	{
		private readonly Register baseReg1;

		private readonly Register baseReg2;

		private readonly Code code;

		public OpCodeHandler_VEX_WVIb(Register baseReg1, Register baseReg2, Code code)
		{
			this.baseReg1 = baseReg1;
			this.baseReg2 = baseReg2;
			this.code = code;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if ((decoder.state.vvvv_invalidCheck & decoder.invalidCheckMask) != 0)
			{
				decoder.SetInvalidInstruction();
			}
			instruction.InternalSetCodeNoCheck(code);
			if (decoder.state.mod == 3)
			{
				instruction.Op0Register = (Register)((int)(decoder.state.rm + decoder.state.zs.extraBaseRegisterBase) + (int)baseReg1);
			}
			else
			{
				instruction.Op0Kind = OpKind.Memory;
				decoder.ReadOpMem(ref instruction);
			}
			instruction.Op1Register = (Register)((int)(decoder.state.reg + decoder.state.zs.extraRegisterBase) + (int)baseReg2);
			instruction.Op2Kind = OpKind.Immediate8;
			instruction.InternalImmediate8 = decoder.ReadByte();
		}
	}
	internal sealed class OpCodeHandler_VEX_Ed_V_Ib : OpCodeHandlerModRM
	{
		private readonly Register baseReg;

		private readonly Code code32;

		private readonly Code code64;

		public OpCodeHandler_VEX_Ed_V_Ib(Register baseReg, Code code32, Code code64)
		{
			this.baseReg = baseReg;
			this.code32 = code32;
			this.code64 = code64;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if ((decoder.state.vvvv_invalidCheck & decoder.invalidCheckMask) != 0)
			{
				decoder.SetInvalidInstruction();
			}
			Register register;
			if (((uint)decoder.state.zs.flags & decoder.is64bMode_and_W) != 0)
			{
				instruction.InternalSetCodeNoCheck(code64);
				register = Register.RAX;
			}
			else
			{
				instruction.InternalSetCodeNoCheck(code32);
				register = Register.EAX;
			}
			if (decoder.state.mod == 3)
			{
				instruction.Op0Register = (Register)((int)(decoder.state.rm + decoder.state.zs.extraBaseRegisterBase) + (int)register);
			}
			else
			{
				instruction.Op0Kind = OpKind.Memory;
				decoder.ReadOpMem(ref instruction);
			}
			instruction.Op1Register = (Register)((int)(decoder.state.reg + decoder.state.zs.extraRegisterBase) + (int)baseReg);
			instruction.Op2Kind = OpKind.Immediate8;
			instruction.InternalImmediate8 = decoder.ReadByte();
		}
	}
	internal sealed class OpCodeHandler_VEX_VHW : OpCodeHandlerModRM
	{
		private readonly Register baseReg1;

		private readonly Register baseReg2;

		private readonly Register baseReg3;

		private readonly Code codeR;

		private readonly Code codeM;

		public OpCodeHandler_VEX_VHW(Register baseReg, Code codeR, Code codeM)
		{
			baseReg1 = baseReg;
			baseReg2 = baseReg;
			baseReg3 = baseReg;
			this.codeR = codeR;
			this.codeM = codeM;
		}

		public OpCodeHandler_VEX_VHW(Register baseReg, Code code)
		{
			baseReg1 = baseReg;
			baseReg2 = baseReg;
			baseReg3 = baseReg;
			codeR = code;
			codeM = code;
		}

		public OpCodeHandler_VEX_VHW(Register baseReg1, Register baseReg2, Register baseReg3, Code code)
		{
			this.baseReg1 = baseReg1;
			this.baseReg2 = baseReg2;
			this.baseReg3 = baseReg3;
			codeR = code;
			codeM = code;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			instruction.Op0Register = (Register)((int)(decoder.state.reg + decoder.state.zs.extraRegisterBase) + (int)baseReg1);
			instruction.Op1Register = (Register)((int)decoder.state.vvvv + (int)baseReg2);
			if (decoder.state.mod == 3)
			{
				instruction.InternalSetCodeNoCheck(codeR);
				instruction.Op2Register = (Register)((int)(decoder.state.rm + decoder.state.zs.extraBaseRegisterBase) + (int)baseReg3);
			}
			else
			{
				instruction.InternalSetCodeNoCheck(codeM);
				instruction.Op2Kind = OpKind.Memory;
				decoder.ReadOpMem(ref instruction);
			}
		}
	}
	internal sealed class OpCodeHandler_VEX_VWH : OpCodeHandlerModRM
	{
		private readonly Register baseReg;

		private readonly Code code;

		public OpCodeHandler_VEX_VWH(Register baseReg, Code code)
		{
			this.baseReg = baseReg;
			this.code = code;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			instruction.InternalSetCodeNoCheck(code);
			instruction.Op0Register = (Register)((int)(decoder.state.reg + decoder.state.zs.extraRegisterBase) + (int)baseReg);
			instruction.Op2Register = (Register)((int)decoder.state.vvvv + (int)baseReg);
			if (decoder.state.mod == 3)
			{
				instruction.Op1Register = (Register)((int)(decoder.state.rm + decoder.state.zs.extraBaseRegisterBase) + (int)baseReg);
				return;
			}
			instruction.Op1Kind = OpKind.Memory;
			decoder.ReadOpMem(ref instruction);
		}
	}
	internal sealed class OpCodeHandler_VEX_WHV : OpCodeHandlerModRM
	{
		private readonly Register baseReg;

		private readonly Code codeR;

		public OpCodeHandler_VEX_WHV(Register baseReg, Code code)
		{
			this.baseReg = baseReg;
			codeR = code;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			instruction.InternalSetCodeNoCheck(codeR);
			instruction.Op0Register = (Register)((int)(decoder.state.rm + decoder.state.zs.extraBaseRegisterBase) + (int)baseReg);
			instruction.Op1Register = (Register)((int)decoder.state.vvvv + (int)baseReg);
			instruction.Op2Register = (Register)((int)(decoder.state.reg + decoder.state.zs.extraRegisterBase) + (int)baseReg);
		}
	}
	internal sealed class OpCodeHandler_VEX_VHM : OpCodeHandlerModRM
	{
		private readonly Register baseReg;

		private readonly Code code;

		public OpCodeHandler_VEX_VHM(Register baseReg, Code code)
		{
			this.baseReg = baseReg;
			this.code = code;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			instruction.InternalSetCodeNoCheck(code);
			instruction.Op0Register = (Register)((int)(decoder.state.reg + decoder.state.zs.extraRegisterBase) + (int)baseReg);
			instruction.Op1Register = (Register)((int)decoder.state.vvvv + (int)baseReg);
			if (decoder.state.mod == 3)
			{
				decoder.SetInvalidInstruction();
				return;
			}
			instruction.Op2Kind = OpKind.Memory;
			decoder.ReadOpMem(ref instruction);
		}
	}
	internal sealed class OpCodeHandler_VEX_MHV : OpCodeHandlerModRM
	{
		private readonly Register baseReg;

		private readonly Code code;

		public OpCodeHandler_VEX_MHV(Register baseReg, Code code)
		{
			this.baseReg = baseReg;
			this.code = code;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			instruction.InternalSetCodeNoCheck(code);
			instruction.Op1Register = (Register)((int)decoder.state.vvvv + (int)baseReg);
			instruction.Op2Register = (Register)((int)(decoder.state.reg + decoder.state.zs.extraRegisterBase) + (int)baseReg);
			if (decoder.state.mod == 3)
			{
				decoder.SetInvalidInstruction();
				return;
			}
			instruction.Op0Kind = OpKind.Memory;
			decoder.ReadOpMem(ref instruction);
		}
	}
	internal sealed class OpCodeHandler_VEX_VHWIb : OpCodeHandlerModRM
	{
		private readonly Register baseReg1;

		private readonly Register baseReg2;

		private readonly Register baseReg3;

		private readonly Code code;

		public OpCodeHandler_VEX_VHWIb(Register baseReg, Code code)
		{
			baseReg1 = baseReg;
			baseReg2 = baseReg;
			baseReg3 = baseReg;
			this.code = code;
		}

		public OpCodeHandler_VEX_VHWIb(Register baseReg1, Register baseReg2, Register baseReg3, Code code)
		{
			this.baseReg1 = baseReg1;
			this.baseReg2 = baseReg2;
			this.baseReg3 = baseReg3;
			this.code = code;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			instruction.InternalSetCodeNoCheck(code);
			instruction.Op0Register = (Register)((int)(decoder.state.reg + decoder.state.zs.extraRegisterBase) + (int)baseReg1);
			instruction.Op1Register = (Register)((int)decoder.state.vvvv + (int)baseReg2);
			if (decoder.state.mod == 3)
			{
				instruction.Op2Register = (Register)((int)(decoder.state.rm + decoder.state.zs.extraBaseRegisterBase) + (int)baseReg3);
			}
			else
			{
				instruction.Op2Kind = OpKind.Memory;
				decoder.ReadOpMem(ref instruction);
			}
			instruction.Op3Kind = OpKind.Immediate8;
			instruction.InternalImmediate8 = decoder.ReadByte();
		}
	}
	internal sealed class OpCodeHandler_VEX_HRIb : OpCodeHandlerModRM
	{
		private readonly Register baseReg;

		private readonly Code code;

		public OpCodeHandler_VEX_HRIb(Register baseReg, Code code)
		{
			this.baseReg = baseReg;
			this.code = code;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			instruction.InternalSetCodeNoCheck(code);
			instruction.Op0Register = (Register)((int)decoder.state.vvvv + (int)baseReg);
			if (decoder.state.mod == 3)
			{
				instruction.Op1Register = (Register)((int)(decoder.state.rm + decoder.state.zs.extraBaseRegisterBase) + (int)baseReg);
			}
			else
			{
				decoder.SetInvalidInstruction();
			}
			instruction.Op2Kind = OpKind.Immediate8;
			instruction.InternalImmediate8 = decoder.ReadByte();
		}
	}
	internal sealed class OpCodeHandler_VEX_VHWIs4 : OpCodeHandlerModRM
	{
		private readonly Register baseReg;

		private readonly Code code;

		public OpCodeHandler_VEX_VHWIs4(Register baseReg, Code code)
		{
			this.baseReg = baseReg;
			this.code = code;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			instruction.InternalSetCodeNoCheck(code);
			instruction.Op0Register = (Register)((int)(decoder.state.reg + decoder.state.zs.extraRegisterBase) + (int)baseReg);
			instruction.Op1Register = (Register)((int)decoder.state.vvvv + (int)baseReg);
			if (decoder.state.mod == 3)
			{
				instruction.Op2Register = (Register)((int)(decoder.state.rm + decoder.state.zs.extraBaseRegisterBase) + (int)baseReg);
			}
			else
			{
				instruction.Op2Kind = OpKind.Memory;
				decoder.ReadOpMem(ref instruction);
			}
			instruction.Op3Register = (Register)((int)((decoder.ReadByte() >> 4) & decoder.reg15Mask) + (int)baseReg);
		}
	}
	internal sealed class OpCodeHandler_VEX_VHIs4W : OpCodeHandlerModRM
	{
		private readonly Register baseReg;

		private readonly Code code;

		public OpCodeHandler_VEX_VHIs4W(Register baseReg, Code code)
		{
			this.baseReg = baseReg;
			this.code = code;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			instruction.InternalSetCodeNoCheck(code);
			instruction.Op0Register = (Register)((int)(decoder.state.reg + decoder.state.zs.extraRegisterBase) + (int)baseReg);
			instruction.Op1Register = (Register)((int)decoder.state.vvvv + (int)baseReg);
			if (decoder.state.mod == 3)
			{
				instruction.Op3Register = (Register)((int)(decoder.state.rm + decoder.state.zs.extraBaseRegisterBase) + (int)baseReg);
			}
			else
			{
				instruction.Op3Kind = OpKind.Memory;
				decoder.ReadOpMem(ref instruction);
			}
			instruction.Op2Register = (Register)((int)((decoder.ReadByte() >> 4) & decoder.reg15Mask) + (int)baseReg);
		}
	}
	internal sealed class OpCodeHandler_VEX_VHWIs5 : OpCodeHandlerModRM
	{
		private readonly Register baseReg;

		private readonly Code code;

		public OpCodeHandler_VEX_VHWIs5(Register baseReg, Code code)
		{
			this.baseReg = baseReg;
			this.code = code;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			instruction.InternalSetCodeNoCheck(code);
			instruction.Op0Register = (Register)((int)(decoder.state.reg + decoder.state.zs.extraRegisterBase) + (int)baseReg);
			instruction.Op1Register = (Register)((int)decoder.state.vvvv + (int)baseReg);
			if (decoder.state.mod == 3)
			{
				instruction.Op2Register = (Register)((int)(decoder.state.rm + decoder.state.zs.extraBaseRegisterBase) + (int)baseReg);
			}
			else
			{
				instruction.Op2Kind = OpKind.Memory;
				decoder.ReadOpMem(ref instruction);
			}
			uint num = decoder.ReadByte();
			instruction.Op3Register = (Register)((int)((num >> 4) & decoder.reg15Mask) + (int)baseReg);
			instruction.InternalImmediate8 = num & 0xFu;
		}
	}
	internal sealed class OpCodeHandler_VEX_VHIs5W : OpCodeHandlerModRM
	{
		private readonly Register baseReg;

		private readonly Code code;

		public OpCodeHandler_VEX_VHIs5W(Register baseReg, Code code)
		{
			this.baseReg = baseReg;
			this.code = code;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			instruction.InternalSetCodeNoCheck(code);
			instruction.Op0Register = (Register)((int)(decoder.state.reg + decoder.state.zs.extraRegisterBase) + (int)baseReg);
			instruction.Op1Register = (Register)((int)decoder.state.vvvv + (int)baseReg);
			if (decoder.state.mod == 3)
			{
				instruction.Op3Register = (Register)((int)(decoder.state.rm + decoder.state.zs.extraBaseRegisterBase) + (int)baseReg);
			}
			else
			{
				instruction.Op3Kind = OpKind.Memory;
				decoder.ReadOpMem(ref instruction);
			}
			uint num = decoder.ReadByte();
			instruction.Op2Register = (Register)((int)((num >> 4) & decoder.reg15Mask) + (int)baseReg);
			instruction.InternalImmediate8 = num & 0xFu;
		}
	}
	internal sealed class OpCodeHandler_VEX_VK_HK_RK : OpCodeHandlerModRM
	{
		private readonly Code code;

		public OpCodeHandler_VEX_VK_HK_RK(Code code)
		{
			this.code = code;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if (decoder.invalidCheckMask != 0 && (decoder.state.vvvv > 7 || decoder.state.zs.extraRegisterBase != 0))
			{
				decoder.SetInvalidInstruction();
			}
			instruction.InternalSetCodeNoCheck(code);
			instruction.Op0Register = (Register)(decoder.state.reg + 173);
			instruction.Op1Register = (Register)((decoder.state.vvvv & 7) + 173);
			if (decoder.state.mod == 3)
			{
				instruction.Op2Register = (Register)(decoder.state.rm + 173);
			}
			else
			{
				decoder.SetInvalidInstruction();
			}
		}
	}
	internal sealed class OpCodeHandler_VEX_VK_RK : OpCodeHandlerModRM
	{
		private readonly Code code;

		public OpCodeHandler_VEX_VK_RK(Code code)
		{
			this.code = code;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if (((decoder.state.vvvv_invalidCheck | decoder.state.zs.extraRegisterBase) & decoder.invalidCheckMask) != 0)
			{
				decoder.SetInvalidInstruction();
			}
			instruction.InternalSetCodeNoCheck(code);
			instruction.Op0Register = (Register)(decoder.state.reg + 173);
			if (decoder.state.mod == 3)
			{
				instruction.Op1Register = (Register)(decoder.state.rm + 173);
			}
			else
			{
				decoder.SetInvalidInstruction();
			}
		}
	}
	internal sealed class OpCodeHandler_VEX_VK_RK_Ib : OpCodeHandlerModRM
	{
		private readonly Code code;

		public OpCodeHandler_VEX_VK_RK_Ib(Code code)
		{
			this.code = code;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if (((decoder.state.vvvv_invalidCheck | decoder.state.zs.extraRegisterBase) & decoder.invalidCheckMask) != 0)
			{
				decoder.SetInvalidInstruction();
			}
			instruction.InternalSetCodeNoCheck(code);
			instruction.Op0Register = (Register)(decoder.state.reg + 173);
			if (decoder.state.mod == 3)
			{
				instruction.Op1Register = (Register)(decoder.state.rm + 173);
			}
			else
			{
				decoder.SetInvalidInstruction();
			}
			instruction.Op2Kind = OpKind.Immediate8;
			instruction.InternalImmediate8 = decoder.ReadByte();
		}
	}
	internal sealed class OpCodeHandler_VEX_VK_WK : OpCodeHandlerModRM
	{
		private readonly Code code;

		public OpCodeHandler_VEX_VK_WK(Code code)
		{
			this.code = code;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if (((decoder.state.vvvv_invalidCheck | decoder.state.zs.extraRegisterBase) & decoder.invalidCheckMask) != 0)
			{
				decoder.SetInvalidInstruction();
			}
			instruction.InternalSetCodeNoCheck(code);
			instruction.Op0Register = (Register)(decoder.state.reg + 173);
			if (decoder.state.mod == 3)
			{
				instruction.Op1Register = (Register)(decoder.state.rm + 173);
				return;
			}
			instruction.Op1Kind = OpKind.Memory;
			decoder.ReadOpMem(ref instruction);
		}
	}
	internal sealed class OpCodeHandler_VEX_M_VK : OpCodeHandlerModRM
	{
		private readonly Code code;

		public OpCodeHandler_VEX_M_VK(Code code)
		{
			this.code = code;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if (((decoder.state.vvvv_invalidCheck | decoder.state.zs.extraRegisterBase) & decoder.invalidCheckMask) != 0)
			{
				decoder.SetInvalidInstruction();
			}
			instruction.InternalSetCodeNoCheck(code);
			instruction.Op1Register = (Register)(decoder.state.reg + 173);
			if (decoder.state.mod == 3)
			{
				decoder.SetInvalidInstruction();
				return;
			}
			instruction.Op0Kind = OpKind.Memory;
			decoder.ReadOpMem(ref instruction);
		}
	}
	internal sealed class OpCodeHandler_VEX_VK_R : OpCodeHandlerModRM
	{
		private readonly Code code;

		private readonly Register gpr;

		public OpCodeHandler_VEX_VK_R(Code code, Register gpr)
		{
			this.code = code;
			this.gpr = gpr;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if (((decoder.state.vvvv_invalidCheck | decoder.state.zs.extraRegisterBase) & decoder.invalidCheckMask) != 0)
			{
				decoder.SetInvalidInstruction();
			}
			instruction.InternalSetCodeNoCheck(code);
			instruction.Op0Register = (Register)(decoder.state.reg + 173);
			if (decoder.state.mod == 3)
			{
				instruction.Op1Register = (Register)((int)(decoder.state.rm + decoder.state.zs.extraBaseRegisterBase) + (int)gpr);
			}
			else
			{
				decoder.SetInvalidInstruction();
			}
		}
	}
	internal sealed class OpCodeHandler_VEX_G_VK : OpCodeHandlerModRM
	{
		private readonly Code code;

		private readonly Register gpr;

		public OpCodeHandler_VEX_G_VK(Code code, Register gpr)
		{
			this.code = code;
			this.gpr = gpr;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if ((decoder.state.vvvv_invalidCheck & decoder.invalidCheckMask) != 0)
			{
				decoder.SetInvalidInstruction();
			}
			instruction.InternalSetCodeNoCheck(code);
			instruction.Op0Register = (Register)((int)(decoder.state.reg + decoder.state.zs.extraRegisterBase) + (int)gpr);
			if (decoder.state.mod == 3)
			{
				instruction.Op1Register = (Register)(decoder.state.rm + 173);
			}
			else
			{
				decoder.SetInvalidInstruction();
			}
		}
	}
	internal sealed class OpCodeHandler_VEX_Gv_W : OpCodeHandlerModRM
	{
		private readonly Register baseReg;

		private readonly Code codeW0;

		private readonly Code codeW1;

		public OpCodeHandler_VEX_Gv_W(Register baseReg, Code codeW0, Code codeW1)
		{
			this.baseReg = baseReg;
			this.codeW0 = codeW0;
			this.codeW1 = codeW1;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if ((decoder.state.vvvv_invalidCheck & decoder.invalidCheckMask) != 0)
			{
				decoder.SetInvalidInstruction();
			}
			if (((uint)decoder.state.zs.flags & decoder.is64bMode_and_W) != 0)
			{
				instruction.InternalSetCodeNoCheck(codeW1);
				instruction.Op0Register = (Register)(decoder.state.reg + decoder.state.zs.extraRegisterBase + 53);
			}
			else
			{
				instruction.InternalSetCodeNoCheck(codeW0);
				instruction.Op0Register = (Register)(decoder.state.reg + decoder.state.zs.extraRegisterBase + 37);
			}
			if (decoder.state.mod == 3)
			{
				instruction.Op1Register = (Register)((int)(decoder.state.rm + decoder.state.zs.extraBaseRegisterBase) + (int)baseReg);
				return;
			}
			instruction.Op1Kind = OpKind.Memory;
			decoder.ReadOpMem(ref instruction);
		}
	}
	internal sealed class OpCodeHandler_VEX_Gv_RX : OpCodeHandlerModRM
	{
		private readonly Register baseReg;

		private readonly Code code32;

		private readonly Code code64;

		public OpCodeHandler_VEX_Gv_RX(Register baseReg, Code code32, Code code64)
		{
			this.baseReg = baseReg;
			this.code32 = code32;
			this.code64 = code64;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if ((decoder.state.vvvv_invalidCheck & decoder.invalidCheckMask) != 0)
			{
				decoder.SetInvalidInstruction();
			}
			Register register;
			if (((uint)decoder.state.zs.flags & decoder.is64bMode_and_W) != 0)
			{
				instruction.InternalSetCodeNoCheck(code64);
				register = Register.RAX;
			}
			else
			{
				instruction.InternalSetCodeNoCheck(code32);
				register = Register.EAX;
			}
			instruction.Op0Register = (Register)((int)(decoder.state.reg + decoder.state.zs.extraRegisterBase) + (int)register);
			if (decoder.state.mod == 3)
			{
				instruction.Op1Register = (Register)((int)(decoder.state.rm + decoder.state.zs.extraBaseRegisterBase) + (int)baseReg);
			}
			else
			{
				decoder.SetInvalidInstruction();
			}
		}
	}
	internal sealed class OpCodeHandler_VEX_Gv_GPR_Ib : OpCodeHandlerModRM
	{
		private readonly Register baseReg;

		private readonly Code code32;

		private readonly Code code64;

		public OpCodeHandler_VEX_Gv_GPR_Ib(Register baseReg, Code code32, Code code64)
		{
			this.baseReg = baseReg;
			this.code32 = code32;
			this.code64 = code64;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if ((decoder.state.vvvv_invalidCheck & decoder.invalidCheckMask) != 0)
			{
				decoder.SetInvalidInstruction();
			}
			Register register;
			if (((uint)decoder.state.zs.flags & decoder.is64bMode_and_W) != 0)
			{
				instruction.InternalSetCodeNoCheck(code64);
				register = Register.RAX;
			}
			else
			{
				instruction.InternalSetCodeNoCheck(code32);
				register = Register.EAX;
			}
			instruction.Op0Register = (Register)((int)(decoder.state.reg + decoder.state.zs.extraRegisterBase) + (int)register);
			if (decoder.state.mod == 3)
			{
				instruction.Op1Register = (Register)((int)(decoder.state.rm + decoder.state.zs.extraBaseRegisterBase) + (int)baseReg);
			}
			else
			{
				decoder.SetInvalidInstruction();
			}
			instruction.Op2Kind = OpKind.Immediate8;
			instruction.InternalImmediate8 = decoder.ReadByte();
		}
	}
	internal sealed class OpCodeHandler_VEX_VX_VSIB_HX : OpCodeHandlerModRM
	{
		private readonly Register baseReg1;

		private readonly Register vsibIndex;

		private readonly Register baseReg3;

		private readonly Code code;

		public OpCodeHandler_VEX_VX_VSIB_HX(Register baseReg1, Register vsibIndex, Register baseReg3, Code code)
		{
			this.baseReg1 = baseReg1;
			this.vsibIndex = vsibIndex;
			this.baseReg3 = baseReg3;
			this.code = code;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			instruction.InternalSetCodeNoCheck(code);
			int num = (int)(decoder.state.reg + decoder.state.zs.extraRegisterBase);
			instruction.Op0Register = num + baseReg1;
			instruction.Op2Register = (Register)((int)decoder.state.vvvv + (int)baseReg3);
			if (decoder.state.mod == 3)
			{
				decoder.SetInvalidInstruction();
				return;
			}
			instruction.Op1Kind = OpKind.Memory;
			decoder.ReadOpMem_VSIB(ref instruction, vsibIndex, TupleType.N1);
			if (decoder.invalidCheckMask != 0)
			{
				uint num2 = (uint)(instruction.MemoryIndex - 77) % 32u;
				if (num == (int)num2 || decoder.state.vvvv == num2 || num == (int)decoder.state.vvvv)
				{
					decoder.SetInvalidInstruction();
				}
			}
		}
	}
	internal sealed class OpCodeHandler_VEX_Gv_Gv_Ev : OpCodeHandlerModRM
	{
		private readonly Code code32;

		private readonly Code code64;

		public OpCodeHandler_VEX_Gv_Gv_Ev(Code code32, Code code64)
		{
			this.code32 = code32;
			this.code64 = code64;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			Register register;
			if (((uint)decoder.state.zs.flags & decoder.is64bMode_and_W) != 0)
			{
				instruction.InternalSetCodeNoCheck(code64);
				register = Register.RAX;
			}
			else
			{
				instruction.InternalSetCodeNoCheck(code32);
				register = Register.EAX;
			}
			instruction.Op0Register = (Register)((int)(decoder.state.reg + decoder.state.zs.extraRegisterBase) + (int)register);
			instruction.Op1Register = (Register)((int)decoder.state.vvvv + (int)register);
			if (decoder.state.mod == 3)
			{
				instruction.Op2Register = (Register)((int)(decoder.state.rm + decoder.state.zs.extraBaseRegisterBase) + (int)register);
				return;
			}
			instruction.Op2Kind = OpKind.Memory;
			decoder.ReadOpMem(ref instruction);
		}
	}
	internal sealed class OpCodeHandler_VEX_Gv_Ev_Gv : OpCodeHandlerModRM
	{
		private readonly Code code32;

		private readonly Code code64;

		public OpCodeHandler_VEX_Gv_Ev_Gv(Code code32, Code code64)
		{
			this.code32 = code32;
			this.code64 = code64;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			Register register;
			if (((uint)decoder.state.zs.flags & decoder.is64bMode_and_W) != 0)
			{
				instruction.InternalSetCodeNoCheck(code64);
				register = Register.RAX;
			}
			else
			{
				instruction.InternalSetCodeNoCheck(code32);
				register = Register.EAX;
			}
			instruction.Op0Register = (Register)((int)(decoder.state.reg + decoder.state.zs.extraRegisterBase) + (int)register);
			instruction.Op2Register = (Register)((int)decoder.state.vvvv + (int)register);
			if (decoder.state.mod == 3)
			{
				instruction.Op1Register = (Register)((int)(decoder.state.rm + decoder.state.zs.extraBaseRegisterBase) + (int)register);
				return;
			}
			instruction.Op1Kind = OpKind.Memory;
			decoder.ReadOpMem(ref instruction);
		}
	}
	internal sealed class OpCodeHandler_VEX_Ev_Gv_Gv : OpCodeHandlerModRM
	{
		private readonly Code code32;

		private readonly Code code64;

		public OpCodeHandler_VEX_Ev_Gv_Gv(Code code32, Code code64)
		{
			this.code32 = code32;
			this.code64 = code64;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			Register register;
			if (((uint)decoder.state.zs.flags & decoder.is64bMode_and_W) != 0)
			{
				instruction.InternalSetCodeNoCheck(code64);
				register = Register.RAX;
			}
			else
			{
				instruction.InternalSetCodeNoCheck(code32);
				register = Register.EAX;
			}
			instruction.Op1Register = (Register)((int)(decoder.state.reg + decoder.state.zs.extraRegisterBase) + (int)register);
			instruction.Op2Register = (Register)((int)decoder.state.vvvv + (int)register);
			if (decoder.state.mod == 3)
			{
				instruction.Op0Register = (Register)((int)(decoder.state.rm + decoder.state.zs.extraBaseRegisterBase) + (int)register);
				return;
			}
			instruction.Op0Kind = OpKind.Memory;
			decoder.ReadOpMem(ref instruction);
		}
	}
	internal sealed class OpCodeHandler_VEX_Hv_Ev : OpCodeHandlerModRM
	{
		private readonly Code code32;

		private readonly Code code64;

		public OpCodeHandler_VEX_Hv_Ev(Code code32, Code code64)
		{
			this.code32 = code32;
			this.code64 = code64;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			Register register;
			if (((uint)decoder.state.zs.flags & decoder.is64bMode_and_W) != 0)
			{
				instruction.InternalSetCodeNoCheck(code64);
				register = Register.RAX;
			}
			else
			{
				instruction.InternalSetCodeNoCheck(code32);
				register = Register.EAX;
			}
			instruction.Op0Register = (Register)((int)decoder.state.vvvv + (int)register);
			if (decoder.state.mod == 3)
			{
				instruction.Op1Register = (Register)((int)(decoder.state.rm + decoder.state.zs.extraBaseRegisterBase) + (int)register);
				return;
			}
			instruction.Op1Kind = OpKind.Memory;
			decoder.ReadOpMem(ref instruction);
		}
	}
	internal sealed class OpCodeHandler_VEX_Hv_Ed_Id : OpCodeHandlerModRM
	{
		private readonly Code code32;

		private readonly Code code64;

		public OpCodeHandler_VEX_Hv_Ed_Id(Code code32, Code code64)
		{
			this.code32 = code32;
			this.code64 = code64;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if (((uint)decoder.state.zs.flags & decoder.is64bMode_and_W) != 0)
			{
				instruction.InternalSetCodeNoCheck(code64);
				instruction.Op0Register = (Register)(decoder.state.vvvv + 53);
			}
			else
			{
				instruction.InternalSetCodeNoCheck(code32);
				instruction.Op0Register = (Register)(decoder.state.vvvv + 37);
			}
			if (decoder.state.mod == 3)
			{
				instruction.Op1Register = (Register)(decoder.state.rm + decoder.state.zs.extraBaseRegisterBase + 37);
			}
			else
			{
				instruction.Op1Kind = OpKind.Memory;
				decoder.ReadOpMem(ref instruction);
			}
			instruction.Op2Kind = OpKind.Immediate32;
			instruction.Immediate32 = decoder.ReadUInt32();
		}
	}
	internal sealed class OpCodeHandler_VEX_GvM_VX_Ib : OpCodeHandlerModRM
	{
		private readonly Register baseReg;

		private readonly Code code32;

		private readonly Code code64;

		public OpCodeHandler_VEX_GvM_VX_Ib(Register baseReg, Code code32, Code code64)
		{
			this.baseReg = baseReg;
			this.code32 = code32;
			this.code64 = code64;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if ((decoder.state.vvvv_invalidCheck & decoder.invalidCheckMask) != 0)
			{
				decoder.SetInvalidInstruction();
			}
			Register register;
			if (((uint)decoder.state.zs.flags & decoder.is64bMode_and_W) != 0)
			{
				instruction.InternalSetCodeNoCheck(code64);
				register = Register.RAX;
			}
			else
			{
				instruction.InternalSetCodeNoCheck(code32);
				register = Register.EAX;
			}
			if (decoder.state.mod == 3)
			{
				instruction.Op0Register = (Register)((int)(decoder.state.rm + decoder.state.zs.extraBaseRegisterBase) + (int)register);
			}
			else
			{
				instruction.Op0Kind = OpKind.Memory;
				decoder.ReadOpMem(ref instruction);
			}
			instruction.Op1Register = (Register)((int)(decoder.state.reg + decoder.state.zs.extraRegisterBase) + (int)baseReg);
			instruction.Op2Kind = OpKind.Immediate8;
			instruction.InternalImmediate8 = decoder.ReadByte();
		}
	}
	internal sealed class OpCodeHandler_VEX_Gv_Ev_Ib : OpCodeHandlerModRM
	{
		private readonly Code code32;

		private readonly Code code64;

		public OpCodeHandler_VEX_Gv_Ev_Ib(Code code32, Code code64)
		{
			this.code32 = code32;
			this.code64 = code64;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if ((decoder.state.vvvv_invalidCheck & decoder.invalidCheckMask) != 0)
			{
				decoder.SetInvalidInstruction();
			}
			Register register;
			if (((uint)decoder.state.zs.flags & decoder.is64bMode_and_W) != 0)
			{
				instruction.InternalSetCodeNoCheck(code64);
				register = Register.RAX;
			}
			else
			{
				instruction.InternalSetCodeNoCheck(code32);
				register = Register.EAX;
			}
			instruction.Op0Register = (Register)((int)(decoder.state.reg + decoder.state.zs.extraRegisterBase) + (int)register);
			if (decoder.state.mod == 3)
			{
				instruction.Op1Register = (Register)((int)(decoder.state.rm + decoder.state.zs.extraBaseRegisterBase) + (int)register);
			}
			else
			{
				instruction.Op1Kind = OpKind.Memory;
				decoder.ReadOpMem(ref instruction);
			}
			instruction.Op2Kind = OpKind.Immediate8;
			instruction.InternalImmediate8 = decoder.ReadByte();
		}
	}
	internal sealed class OpCodeHandler_VEX_Gv_Ev_Id : OpCodeHandlerModRM
	{
		private readonly Code code32;

		private readonly Code code64;

		public OpCodeHandler_VEX_Gv_Ev_Id(Code code32, Code code64)
		{
			this.code32 = code32;
			this.code64 = code64;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if ((decoder.state.vvvv_invalidCheck & decoder.invalidCheckMask) != 0)
			{
				decoder.SetInvalidInstruction();
			}
			Register register;
			if (((uint)decoder.state.zs.flags & decoder.is64bMode_and_W) != 0)
			{
				instruction.InternalSetCodeNoCheck(code64);
				register = Register.RAX;
			}
			else
			{
				instruction.InternalSetCodeNoCheck(code32);
				register = Register.EAX;
			}
			instruction.Op0Register = (Register)((int)(decoder.state.reg + decoder.state.zs.extraRegisterBase) + (int)register);
			if (decoder.state.mod == 3)
			{
				instruction.Op1Register = (Register)((int)(decoder.state.rm + decoder.state.zs.extraBaseRegisterBase) + (int)register);
			}
			else
			{
				instruction.Op1Kind = OpKind.Memory;
				decoder.ReadOpMem(ref instruction);
			}
			instruction.Op2Kind = OpKind.Immediate32;
			instruction.Immediate32 = decoder.ReadUInt32();
		}
	}
	internal sealed class OpCodeHandler_VEX_VT_SIBMEM : OpCodeHandlerModRM
	{
		private readonly Code code;

		public OpCodeHandler_VEX_VT_SIBMEM(Code code)
		{
			this.code = code;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if (((decoder.state.vvvv_invalidCheck | decoder.state.zs.extraRegisterBase) & decoder.invalidCheckMask) != 0)
			{
				decoder.SetInvalidInstruction();
			}
			instruction.InternalSetCodeNoCheck(code);
			instruction.Op0Register = (Register)(decoder.state.reg + 241);
			if (decoder.state.mod == 3)
			{
				decoder.SetInvalidInstruction();
				return;
			}
			instruction.Op1Kind = OpKind.Memory;
			decoder.ReadOpMemSib(ref instruction);
		}
	}
	internal sealed class OpCodeHandler_VEX_SIBMEM_VT : OpCodeHandlerModRM
	{
		private readonly Code code;

		public OpCodeHandler_VEX_SIBMEM_VT(Code code)
		{
			this.code = code;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if (((decoder.state.vvvv_invalidCheck | decoder.state.zs.extraRegisterBase) & decoder.invalidCheckMask) != 0)
			{
				decoder.SetInvalidInstruction();
			}
			instruction.InternalSetCodeNoCheck(code);
			instruction.Op1Register = (Register)(decoder.state.reg + 241);
			if (decoder.state.mod == 3)
			{
				decoder.SetInvalidInstruction();
				return;
			}
			instruction.Op0Kind = OpKind.Memory;
			decoder.ReadOpMemSib(ref instruction);
		}
	}
	internal sealed class OpCodeHandler_VEX_VT : OpCodeHandlerModRM
	{
		private readonly Code code;

		public OpCodeHandler_VEX_VT(Code code)
		{
			this.code = code;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if (((decoder.state.vvvv_invalidCheck | decoder.state.zs.extraRegisterBase) & decoder.invalidCheckMask) != 0)
			{
				decoder.SetInvalidInstruction();
			}
			instruction.InternalSetCodeNoCheck(code);
			instruction.Op0Register = (Register)(decoder.state.reg + 241);
		}
	}
	internal sealed class OpCodeHandler_VEX_VT_RT_HT : OpCodeHandlerModRM
	{
		private readonly Code code;

		public OpCodeHandler_VEX_VT_RT_HT(Code code)
		{
			this.code = code;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if (decoder.invalidCheckMask != 0 && (decoder.state.vvvv > 7 || decoder.state.zs.extraRegisterBase != 0))
			{
				decoder.SetInvalidInstruction();
			}
			instruction.InternalSetCodeNoCheck(code);
			instruction.Op0Register = (Register)(decoder.state.reg + 241);
			instruction.Op2Register = (Register)((decoder.state.vvvv & 7) + 241);
			if (decoder.state.mod == 3)
			{
				instruction.Op1Register = (Register)(decoder.state.rm + 241);
				if (decoder.invalidCheckMask != 0 && (decoder.state.zs.extraBaseRegisterBase != 0 || decoder.state.reg == decoder.state.vvvv || decoder.state.reg == decoder.state.rm || decoder.state.rm == decoder.state.vvvv))
				{
					decoder.SetInvalidInstruction();
				}
			}
			else
			{
				decoder.SetInvalidInstruction();
			}
		}
	}
	internal sealed class OpCodeHandler_VEX_Gq_HK_RK : OpCodeHandlerModRM
	{
		private readonly Code code;

		public OpCodeHandler_VEX_Gq_HK_RK(Code code)
		{
			this.code = code;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if (decoder.invalidCheckMask != 0 && decoder.state.vvvv > 7)
			{
				decoder.SetInvalidInstruction();
			}
			instruction.InternalSetCodeNoCheck(code);
			instruction.Op0Register = (Register)(decoder.state.reg + decoder.state.zs.extraRegisterBase + 53);
			instruction.Op1Register = (Register)((decoder.state.vvvv & 7) + 173);
			if (decoder.state.mod == 3)
			{
				instruction.Op2Register = (Register)(decoder.state.rm + 173);
			}
			else
			{
				decoder.SetInvalidInstruction();
			}
		}
	}
	internal sealed class OpCodeHandler_VEX_VK_R_Ib : OpCodeHandlerModRM
	{
		private readonly Code code;

		private readonly Register gpr;

		public OpCodeHandler_VEX_VK_R_Ib(Code code, Register gpr)
		{
			this.code = code;
			this.gpr = gpr;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if (((decoder.state.vvvv_invalidCheck | decoder.state.zs.extraRegisterBase) & decoder.invalidCheckMask) != 0)
			{
				decoder.SetInvalidInstruction();
			}
			instruction.InternalSetCodeNoCheck(code);
			instruction.Op0Register = (Register)(decoder.state.reg + 173);
			if (decoder.state.mod == 3)
			{
				instruction.Op1Register = (Register)((int)(decoder.state.rm + decoder.state.zs.extraBaseRegisterBase) + (int)gpr);
			}
			else
			{
				decoder.SetInvalidInstruction();
			}
			instruction.Op2Kind = OpKind.Immediate8;
			instruction.InternalImmediate8 = decoder.ReadByte();
		}
	}
	internal sealed class OpCodeHandler_VEX_K_Jb : OpCodeHandlerModRM
	{
		private readonly Code code;

		public OpCodeHandler_VEX_K_Jb(Code code)
		{
			this.code = code;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			decoder.state.zs.flags |= StateFlags.BranchImm8;
			if (decoder.invalidCheckMask != 0 && decoder.state.vvvv > 7)
			{
				decoder.SetInvalidInstruction();
			}
			instruction.Op0Register = (Register)((decoder.state.vvvv & 7) + 173);
			instruction.InternalSetCodeNoCheck(code);
			instruction.Op1Kind = OpKind.NearBranch64;
			instruction.NearBranch64 = (ulong)(sbyte)decoder.state.modrm + decoder.GetCurrentInstructionPointer64();
		}
	}
	internal sealed class OpCodeHandler_VEX_K_Jz : OpCodeHandlerModRM
	{
		private readonly Code code;

		public OpCodeHandler_VEX_K_Jz(Code code)
		{
			this.code = code;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if (decoder.invalidCheckMask != 0 && decoder.state.vvvv > 7)
			{
				decoder.SetInvalidInstruction();
			}
			instruction.Op0Register = (Register)((decoder.state.vvvv & 7) + 173);
			instruction.InternalSetCodeNoCheck(code);
			instruction.Op1Kind = OpKind.NearBranch64;
			uint num = decoder.state.modrm | (decoder.ReadByte() << 8) | (decoder.ReadByte() << 16) | (decoder.ReadByte() << 24);
			instruction.NearBranch64 = (ulong)(int)num + decoder.GetCurrentInstructionPointer64();
		}
	}
	internal sealed class OpCodeHandler_VEX_Gv_Ev : OpCodeHandlerModRM
	{
		private readonly Code code32;

		private readonly Code code64;

		public OpCodeHandler_VEX_Gv_Ev(Code code32, Code code64)
		{
			this.code32 = code32;
			this.code64 = code64;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if ((decoder.state.vvvv_invalidCheck & decoder.invalidCheckMask) != 0)
			{
				decoder.SetInvalidInstruction();
			}
			Register register;
			if (((uint)decoder.state.zs.flags & decoder.is64bMode_and_W) != 0)
			{
				instruction.InternalSetCodeNoCheck(code64);
				register = Register.RAX;
			}
			else
			{
				instruction.InternalSetCodeNoCheck(code32);
				register = Register.EAX;
			}
			instruction.Op0Register = (Register)((int)(decoder.state.reg + decoder.state.zs.extraRegisterBase) + (int)register);
			if (decoder.state.mod == 3)
			{
				instruction.Op1Register = (Register)((int)(decoder.state.rm + decoder.state.zs.extraBaseRegisterBase) + (int)register);
				return;
			}
			instruction.Op1Kind = OpKind.Memory;
			decoder.ReadOpMem(ref instruction);
		}
	}
	internal sealed class OpCodeHandler_VEX_Ev : OpCodeHandlerModRM
	{
		private readonly Code code32;

		private readonly Code code64;

		public OpCodeHandler_VEX_Ev(Code code32, Code code64)
		{
			this.code32 = code32;
			this.code64 = code64;
		}

		public override void Decode(Decoder decoder, ref Instruction instruction)
		{
			if ((decoder.state.vvvv_invalidCheck & decoder.invalidCheckMask) != 0)
			{
				decoder.SetInvalidInstruction();
			}
			Register register;
			if (((uint)decoder.state.zs.flags & decoder.is64bMode_and_W) != 0)
			{
				instruction.InternalSetCodeNoCheck(code64);
				register = Register.RAX;
			}
			else
			{
				instruction.InternalSetCodeNoCheck(code32);
				register = Register.EAX;
			}
			if (decoder.state.mod == 3)
			{
				instruction.Op0Register = (Register)((int)(decoder.state.rm + decoder.state.zs.extraBaseRegisterBase) + (int)register);
				return;
			}
			instruction.Op0Kind = OpKind.Memory;
			decoder.ReadOpMem(ref instruction);
		}
	}
	internal enum SerializedDataKind : byte
	{
		HandlerReference,
		ArrayReference
	}
	internal abstract class OpCodeHandlerReader
	{
		public abstract int ReadHandlers(ref TableDeserializer deserializer, OpCodeHandler[] result, int resultIndex);
	}
	internal readonly struct HandlerInfo
	{
		public readonly OpCodeHandler handler;

		public readonly OpCodeHandler[] handlers;

		public HandlerInfo(OpCodeHandler handler)
		{
			this.handler = handler;
			handlers = null;
		}

		public HandlerInfo(OpCodeHandler[] handlers)
		{
			handler = null;
			this.handlers = handlers;
		}
	}
	internal ref struct TableDeserializer
	{
		private DataReader reader;

		private readonly OpCodeHandlerReader handlerReader;

		private readonly List<HandlerInfo> idToHandler;

		private readonly OpCodeHandler[] handlerArray;

		public TableDeserializer(OpCodeHandlerReader handlerReader, int maxIds, ReadOnlySpan<byte> data)
		{
			this.handlerReader = handlerReader;
			reader = new DataReader(data);
			idToHandler = new List<HandlerInfo>(maxIds);
			handlerArray = new OpCodeHandler[1];
		}

		public void Deserialize()
		{
			while (reader.CanRead)
			{
				switch ((SerializedDataKind)reader.ReadByte())
				{
				case SerializedDataKind.HandlerReference:
					idToHandler.Add(new HandlerInfo(ReadHandler()));
					break;
				case SerializedDataKind.ArrayReference:
					idToHandler.Add(new HandlerInfo(ReadHandlers((int)reader.ReadCompressedUInt32())));
					break;
				default:
					throw new InvalidOperationException();
				}
			}
			if (reader.CanRead)
			{
				throw new InvalidOperationException();
			}
		}

		public LegacyOpCodeHandlerKind ReadLegacyOpCodeHandlerKind()
		{
			return (LegacyOpCodeHandlerKind)reader.ReadByte();
		}

		public VexOpCodeHandlerKind ReadVexOpCodeHandlerKind()
		{
			return (VexOpCodeHandlerKind)reader.ReadByte();
		}

		public EvexOpCodeHandlerKind ReadEvexOpCodeHandlerKind()
		{
			return (EvexOpCodeHandlerKind)reader.ReadByte();
		}

		public MvexOpCodeHandlerKind ReadMvexOpCodeHandlerKind()
		{
			return (MvexOpCodeHandlerKind)reader.ReadByte();
		}

		public Code ReadCode()
		{
			return (Code)reader.ReadCompressedUInt32();
		}

		public Register ReadRegister()
		{
			return (Register)reader.ReadByte();
		}

		public DecoderOptions ReadDecoderOptions()
		{
			return (DecoderOptions)reader.ReadCompressedUInt32();
		}

		public HandlerFlags ReadHandlerFlags()
		{
			return (HandlerFlags)reader.ReadCompressedUInt32();
		}

		public LegacyHandlerFlags ReadLegacyHandlerFlags()
		{
			return (LegacyHandlerFlags)reader.ReadCompressedUInt32();
		}

		public TupleType ReadTupleType()
		{
			return (TupleType)reader.ReadByte();
		}

		public bool ReadBoolean()
		{
			return reader.ReadByte() != 0;
		}

		public int ReadInt32()
		{
			return (int)reader.ReadCompressedUInt32();
		}

		public OpCodeHandler ReadHandler()
		{
			return ReadHandlerOrNull() ?? throw new InvalidOperationException();
		}

		public OpCodeHandler ReadHandlerOrNull()
		{
			if (handlerReader.ReadHandlers(ref this, handlerArray, 0) != 1)
			{
				throw new InvalidOperationException();
			}
			return handlerArray[0];
		}

		public OpCodeHandler[] ReadHandlers(int count)
		{
			OpCodeHandler[] array = new OpCodeHandler[count];
			int num;
			for (int i = 0; i < array.Length; i += num)
			{
				num = handlerReader.ReadHandlers(ref this, array, i);
				if (num <= 0 || (uint)(i + num) > (uint)array.Length)
				{
					throw new InvalidOperationException();
				}
			}
			return array;
		}

		public OpCodeHandler ReadHandlerReference()
		{
			uint index = reader.ReadByte();
			return idToHandler[(int)index].handler ?? throw new InvalidOperationException();
		}

		public OpCodeHandler[] ReadArrayReference(uint kind)
		{
			if (reader.ReadByte() != kind)
			{
				throw new InvalidOperationException();
			}
			return GetTable(reader.ReadByte());
		}

		public OpCodeHandler[] GetTable(uint index)
		{
			return idToHandler[(int)index].handlers ?? throw new InvalidOperationException();
		}
	}
	internal enum VexOpCodeHandlerKind : byte
	{
		Invalid,
		Invalid2,
		Dup,
		Invalid_NoModRM,
		Bitness_DontReadModRM,
		HandlerReference,
		ArrayReference,
		RM,
		Group,
		W,
		MandatoryPrefix2_1,
		MandatoryPrefix2_4,
		MandatoryPrefix2_NoModRM,
		VectorLength_NoModRM,
		VectorLength,
		Ed_V_Ib,
		Ev_VX,
		G_VK,
		Gv_Ev_Gv,
		Gv_Ev_Ib,
		Gv_Ev_Id,
		Gv_GPR_Ib,
		Gv_Gv_Ev,
		Gv_RX,
		Gv_W,
		GvM_VX_Ib,
		HRIb,
		Hv_Ed_Id,
		Hv_Ev,
		M,
		MHV,
		M_VK,
		MV,
		rDI_VX_RX,
		RdRq,
		Simple,
		VHEv,
		VHEvIb,
		VHIs4W,
		VHIs5W,
		VHM,
		VHW_2,
		VHW_3,
		VHW_4,
		VHWIb_2,
		VHWIb_4,
		VHWIs4,
		VHWIs5,
		VK_HK_RK,
		VK_R,
		VK_RK,
		VK_RK_Ib,
		VK_WK,
		VM,
		VW_2,
		VW_3,
		VWH,
		VWIb_2,
		VWIb_3,
		VX_Ev,
		VX_VSIB_HX,
		WHV,
		WV,
		WVIb,
		VT_SIBMEM,
		SIBMEM_VT,
		VT,
		VT_RT_HT,
		Group8x64,
		Bitness,
		Null,
		Options_DontReadModRM,
		Gq_HK_RK,
		VK_R_Ib,
		Gv_Ev,
		Ev,
		K_Jb,
		K_Jz,
		Ev_Gv_Gv
	}
	internal sealed class VexOpCodeHandlerReader : OpCodeHandlerReader
	{
		public override int ReadHandlers(ref TableDeserializer deserializer, OpCodeHandler[] result, int resultIndex)
		{
			ref OpCodeHandler reference = ref result[resultIndex];
			switch (deserializer.ReadVexOpCodeHandlerKind())
			{
			case VexOpCodeHandlerKind.Invalid:
				reference = OpCodeHandler_Invalid.Instance;
				return 1;
			case VexOpCodeHandlerKind.Invalid2:
				result[resultIndex] = OpCodeHandler_Invalid.Instance;
				result[resultIndex + 1] = OpCodeHandler_Invalid.Instance;
				return 2;
			case VexOpCodeHandlerKind.Dup:
			{
				int num = deserializer.ReadInt32();
				OpCodeHandler opCodeHandler = deserializer.ReadHandlerOrNull();
				for (int i = 0; i < num; i++)
				{
					result[resultIndex + i] = opCodeHandler;
				}
				return num;
			}
			case VexOpCodeHandlerKind.Null:
				reference = null;
				return 1;
			case VexOpCodeHandlerKind.Invalid_NoModRM:
				reference = OpCodeHandler_Invalid_NoModRM.Instance;
				return 1;
			case VexOpCodeHandlerKind.Bitness:
				reference = new OpCodeHandler_Bitness(deserializer.ReadHandler(), deserializer.ReadHandler());
				return 1;
			case VexOpCodeHandlerKind.Bitness_DontReadModRM:
				reference = new OpCodeHandler_Bitness_DontReadModRM(deserializer.ReadHandler(), deserializer.ReadHandler());
				return 1;
			case VexOpCodeHandlerKind.HandlerReference:
				reference = deserializer.ReadHandlerReference();
				return 1;
			case VexOpCodeHandlerKind.ArrayReference:
				throw new InvalidOperationException();
			case VexOpCodeHandlerKind.RM:
				reference = new OpCodeHandler_RM(deserializer.ReadHandler(), deserializer.ReadHandler());
				return 1;
			case VexOpCodeHandlerKind.Group:
				reference = new OpCodeHandler_Group(deserializer.ReadArrayReference(6u));
				return 1;
			case VexOpCodeHandlerKind.Group8x64:
				reference = new OpCodeHandler_Group8x64(deserializer.ReadArrayReference(6u), deserializer.ReadArrayReference(6u));
				return 1;
			case VexOpCodeHandlerKind.W:
				reference = new OpCodeHandler_W(deserializer.ReadHandler(), deserializer.ReadHandler());
				return 1;
			case VexOpCodeHandlerKind.MandatoryPrefix2_1:
				reference = new OpCodeHandler_MandatoryPrefix2(deserializer.ReadHandler());
				return 1;
			case VexOpCodeHandlerKind.MandatoryPrefix2_4:
				reference = new OpCodeHandler_MandatoryPrefix2(deserializer.ReadHandler(), deserializer.ReadHandler(), deserializer.ReadHandler(), deserializer.ReadHandler());
				return 1;
			case VexOpCodeHandlerKind.MandatoryPrefix2_NoModRM:
				reference = new OpCodeHandler_MandatoryPrefix2_NoModRM(deserializer.ReadHandler(), deserializer.ReadHandler(), deserializer.ReadHandler(), deserializer.ReadHandler());
				return 1;
			case VexOpCodeHandlerKind.VectorLength_NoModRM:
				reference = new OpCodeHandler_VectorLength_NoModRM_VEX(deserializer.ReadHandler(), deserializer.ReadHandler());
				return 1;
			case VexOpCodeHandlerKind.VectorLength:
				reference = new OpCodeHandler_VectorLength_VEX(deserializer.ReadHandler(), deserializer.ReadHandler());
				return 1;
			case VexOpCodeHandlerKind.Ed_V_Ib:
			{
				Code code;
				reference = new OpCodeHandler_VEX_Ed_V_Ib(deserializer.ReadRegister(), code = deserializer.ReadCode(), code + 1);
				return 1;
			}
			case VexOpCodeHandlerKind.Ev_VX:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_VEX_Ev_VX(code, code + 1);
				return 1;
			}
			case VexOpCodeHandlerKind.G_VK:
				reference = new OpCodeHandler_VEX_G_VK(deserializer.ReadCode(), deserializer.ReadRegister());
				return 1;
			case VexOpCodeHandlerKind.Gv_Ev_Gv:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_VEX_Gv_Ev_Gv(code, code + 1);
				return 1;
			}
			case VexOpCodeHandlerKind.Ev_Gv_Gv:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_VEX_Ev_Gv_Gv(code, code + 1);
				return 1;
			}
			case VexOpCodeHandlerKind.Gv_Ev_Ib:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_VEX_Gv_Ev_Ib(code, code + 1);
				return 1;
			}
			case VexOpCodeHandlerKind.Gv_Ev_Id:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_VEX_Gv_Ev_Id(code, code + 1);
				return 1;
			}
			case VexOpCodeHandlerKind.Gv_GPR_Ib:
			{
				Code code;
				reference = new OpCodeHandler_VEX_Gv_GPR_Ib(deserializer.ReadRegister(), code = deserializer.ReadCode(), code + 1);
				return 1;
			}
			case VexOpCodeHandlerKind.Gv_Gv_Ev:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_VEX_Gv_Gv_Ev(code, code + 1);
				return 1;
			}
			case VexOpCodeHandlerKind.Gv_RX:
			{
				Code code;
				reference = new OpCodeHandler_VEX_Gv_RX(deserializer.ReadRegister(), code = deserializer.ReadCode(), code + 1);
				return 1;
			}
			case VexOpCodeHandlerKind.Gv_W:
			{
				Code code;
				reference = new OpCodeHandler_VEX_Gv_W(deserializer.ReadRegister(), code = deserializer.ReadCode(), code + 1);
				return 1;
			}
			case VexOpCodeHandlerKind.GvM_VX_Ib:
			{
				Code code;
				reference = new OpCodeHandler_VEX_GvM_VX_Ib(deserializer.ReadRegister(), code = deserializer.ReadCode(), code + 1);
				return 1;
			}
			case VexOpCodeHandlerKind.HRIb:
				reference = new OpCodeHandler_VEX_HRIb(deserializer.ReadRegister(), deserializer.ReadCode());
				return 1;
			case VexOpCodeHandlerKind.Hv_Ed_Id:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_VEX_Hv_Ed_Id(code, code + 1);
				return 1;
			}
			case VexOpCodeHandlerKind.Hv_Ev:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_VEX_Hv_Ev(code, code + 1);
				return 1;
			}
			case VexOpCodeHandlerKind.M:
				reference = new OpCodeHandler_VEX_M(deserializer.ReadCode());
				return 1;
			case VexOpCodeHandlerKind.MHV:
				reference = new OpCodeHandler_VEX_MHV(deserializer.ReadRegister(), deserializer.ReadCode());
				return 1;
			case VexOpCodeHandlerKind.M_VK:
				reference = new OpCodeHandler_VEX_M_VK(deserializer.ReadCode());
				return 1;
			case VexOpCodeHandlerKind.MV:
				reference = new OpCodeHandler_VEX_MV(deserializer.ReadRegister(), deserializer.ReadCode());
				return 1;
			case VexOpCodeHandlerKind.rDI_VX_RX:
				reference = new OpCodeHandler_VEX_rDI_VX_RX(deserializer.ReadRegister(), deserializer.ReadCode());
				return 1;
			case VexOpCodeHandlerKind.RdRq:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_VEX_RdRq(code, code + 1);
				return 1;
			}
			case VexOpCodeHandlerKind.Simple:
				reference = new OpCodeHandler_VEX_Simple(deserializer.ReadCode());
				return 1;
			case VexOpCodeHandlerKind.VHEv:
			{
				Code code;
				reference = new OpCodeHandler_VEX_VHEv(deserializer.ReadRegister(), code = deserializer.ReadCode(), code + 1);
				return 1;
			}
			case VexOpCodeHandlerKind.VHEvIb:
			{
				Code code;
				reference = new OpCodeHandler_VEX_VHEvIb(deserializer.ReadRegister(), code = deserializer.ReadCode(), code + 1);
				return 1;
			}
			case VexOpCodeHandlerKind.VHIs4W:
				reference = new OpCodeHandler_VEX_VHIs4W(deserializer.ReadRegister(), deserializer.ReadCode());
				return 1;
			case VexOpCodeHandlerKind.VHIs5W:
				reference = new OpCodeHandler_VEX_VHIs5W(deserializer.ReadRegister(), deserializer.ReadCode());
				return 1;
			case VexOpCodeHandlerKind.VHM:
				reference = new OpCodeHandler_VEX_VHM(deserializer.ReadRegister(), deserializer.ReadCode());
				return 1;
			case VexOpCodeHandlerKind.VHW_2:
				reference = new OpCodeHandler_VEX_VHW(deserializer.ReadRegister(), deserializer.ReadCode());
				return 1;
			case VexOpCodeHandlerKind.VHW_3:
				reference = new OpCodeHandler_VEX_VHW(deserializer.ReadRegister(), deserializer.ReadCode(), deserializer.ReadCode());
				return 1;
			case VexOpCodeHandlerKind.VHW_4:
				reference = new OpCodeHandler_VEX_VHW(deserializer.ReadRegister(), deserializer.ReadRegister(), deserializer.ReadRegister(), deserializer.ReadCode());
				return 1;
			case VexOpCodeHandlerKind.VHWIb_2:
				reference = new OpCodeHandler_VEX_VHWIb(deserializer.ReadRegister(), deserializer.ReadCode());
				return 1;
			case VexOpCodeHandlerKind.VHWIb_4:
				reference = new OpCodeHandler_VEX_VHWIb(deserializer.ReadRegister(), deserializer.ReadRegister(), deserializer.ReadRegister(), deserializer.ReadCode());
				return 1;
			case VexOpCodeHandlerKind.VHWIs4:
				reference = new OpCodeHandler_VEX_VHWIs4(deserializer.ReadRegister(), deserializer.ReadCode());
				return 1;
			case VexOpCodeHandlerKind.VHWIs5:
				reference = new OpCodeHandler_VEX_VHWIs5(deserializer.ReadRegister(), deserializer.ReadCode());
				return 1;
			case VexOpCodeHandlerKind.VK_HK_RK:
				reference = new OpCodeHandler_VEX_VK_HK_RK(deserializer.ReadCode());
				return 1;
			case VexOpCodeHandlerKind.VK_R:
				reference = new OpCodeHandler_VEX_VK_R(deserializer.ReadCode(), deserializer.ReadRegister());
				return 1;
			case VexOpCodeHandlerKind.VK_RK:
				reference = new OpCodeHandler_VEX_VK_RK(deserializer.ReadCode());
				return 1;
			case VexOpCodeHandlerKind.VK_RK_Ib:
				reference = new OpCodeHandler_VEX_VK_RK_Ib(deserializer.ReadCode());
				return 1;
			case VexOpCodeHandlerKind.VK_WK:
				reference = new OpCodeHandler_VEX_VK_WK(deserializer.ReadCode());
				return 1;
			case VexOpCodeHandlerKind.VM:
				reference = new OpCodeHandler_VEX_VM(deserializer.ReadRegister(), deserializer.ReadCode());
				return 1;
			case VexOpCodeHandlerKind.VW_2:
				reference = new OpCodeHandler_VEX_VW(deserializer.ReadRegister(), deserializer.ReadCode());
				return 1;
			case VexOpCodeHandlerKind.VW_3:
				reference = new OpCodeHandler_VEX_VW(deserializer.ReadRegister(), deserializer.ReadRegister(), deserializer.ReadCode());
				return 1;
			case VexOpCodeHandlerKind.VWH:
				reference = new OpCodeHandler_VEX_VWH(deserializer.ReadRegister(), deserializer.ReadCode());
				return 1;
			case VexOpCodeHandlerKind.VWIb_2:
				reference = new OpCodeHandler_VEX_VWIb(deserializer.ReadRegister(), deserializer.ReadCode());
				return 1;
			case VexOpCodeHandlerKind.VWIb_3:
			{
				Code code;
				reference = new OpCodeHandler_VEX_VWIb(deserializer.ReadRegister(), code = deserializer.ReadCode(), code + 1);
				return 1;
			}
			case VexOpCodeHandlerKind.VX_Ev:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_VEX_VX_Ev(code, code + 1);
				return 1;
			}
			case VexOpCodeHandlerKind.VX_VSIB_HX:
				reference = new OpCodeHandler_VEX_VX_VSIB_HX(deserializer.ReadRegister(), deserializer.ReadRegister(), deserializer.ReadRegister(), deserializer.ReadCode());
				return 1;
			case VexOpCodeHandlerKind.WHV:
				reference = new OpCodeHandler_VEX_WHV(deserializer.ReadRegister(), deserializer.ReadCode());
				return 1;
			case VexOpCodeHandlerKind.WV:
				reference = new OpCodeHandler_VEX_WV(deserializer.ReadRegister(), deserializer.ReadCode());
				return 1;
			case VexOpCodeHandlerKind.WVIb:
				reference = new OpCodeHandler_VEX_WVIb(deserializer.ReadRegister(), deserializer.ReadRegister(), deserializer.ReadCode());
				return 1;
			case VexOpCodeHandlerKind.VT_SIBMEM:
				reference = new OpCodeHandler_VEX_VT_SIBMEM(deserializer.ReadCode());
				return 1;
			case VexOpCodeHandlerKind.SIBMEM_VT:
				reference = new OpCodeHandler_VEX_SIBMEM_VT(deserializer.ReadCode());
				return 1;
			case VexOpCodeHandlerKind.VT:
				reference = new OpCodeHandler_VEX_VT(deserializer.ReadCode());
				return 1;
			case VexOpCodeHandlerKind.VT_RT_HT:
				reference = new OpCodeHandler_VEX_VT_RT_HT(deserializer.ReadCode());
				return 1;
			case VexOpCodeHandlerKind.Options_DontReadModRM:
				reference = new OpCodeHandler_Options_DontReadModRM(deserializer.ReadHandler(), deserializer.ReadHandler(), deserializer.ReadDecoderOptions());
				return 1;
			case VexOpCodeHandlerKind.Gq_HK_RK:
				reference = new OpCodeHandler_VEX_Gq_HK_RK(deserializer.ReadCode());
				return 1;
			case VexOpCodeHandlerKind.VK_R_Ib:
				reference = new OpCodeHandler_VEX_VK_R_Ib(deserializer.ReadCode(), deserializer.ReadRegister());
				return 1;
			case VexOpCodeHandlerKind.Gv_Ev:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_VEX_Gv_Ev(code, code + 1);
				return 1;
			}
			case VexOpCodeHandlerKind.Ev:
			{
				Code code = deserializer.ReadCode();
				reference = new OpCodeHandler_VEX_Ev(code, code + 1);
				return 1;
			}
			case VexOpCodeHandlerKind.K_Jb:
				reference = new OpCodeHandler_VEX_K_Jb(deserializer.ReadCode());
				return 1;
			case VexOpCodeHandlerKind.K_Jz:
				reference = new OpCodeHandler_VEX_K_Jz(deserializer.ReadCode());
				return 1;
			default:
				throw new InvalidOperationException();
			}
		}
	}
}
namespace Iced.Intel.BlockEncoderInternal
{
	internal sealed class Block
	{
		public readonly CodeWriterImpl CodeWriter;

		public readonly ulong RIP;

		public readonly List<RelocInfo> relocInfos;

		private Instr[] instructions;

		private readonly List<BlockData> dataList;

		private readonly ulong alignment;

		private readonly List<BlockData> validData;

		private ulong validDataAddress;

		private ulong validDataAddressAligned;

		public Instr[] Instructions => instructions;

		public bool CanAddRelocInfos => relocInfos != null;

		public Block(BlockEncoder blockEncoder, CodeWriter codeWriter, ulong rip, List<RelocInfo> relocInfos)
		{
			CodeWriter = new CodeWriterImpl(codeWriter);
			RIP = rip;
			this.relocInfos = relocInfos;
			instructions = Array2.Empty<Instr>();
			dataList = new List<BlockData>();
			alignment = (uint)blockEncoder.Bitness / 8u;
			validData = new List<BlockData>();
		}

		internal void SetInstructions(Instr[] instructions)
		{
			this.instructions = instructions;
		}

		public BlockData AllocPointerLocation()
		{
			BlockData blockData = new BlockData
			{
				IsValid = true
			};
			dataList.Add(blockData);
			return blockData;
		}

		public void InitializeData()
		{
			ulong num;
			if (Instructions.Length != 0)
			{
				Instr instr = Instructions[Instructions.Length - 1];
				num = instr.IP + instr.Size;
			}
			else
			{
				num = RIP;
			}
			validDataAddress = num;
			ulong num2 = (validDataAddressAligned = (num + alignment - 1) & ~(alignment - 1));
			foreach (BlockData data in dataList)
			{
				if (data.IsValid)
				{
					data.__dont_use_address = num2;
					data.__dont_use_address_initd = true;
					validData.Add(data);
					num2 += alignment;
				}
			}
		}

		public void WriteData()
		{
			if (validData.Count == 0)
			{
				return;
			}
			CodeWriterImpl codeWriter = CodeWriter;
			int num = (int)(validDataAddressAligned - validDataAddress);
			for (int i = 0; i < num; i++)
			{
				codeWriter.WriteByte(204);
			}
			List<RelocInfo> list = relocInfos;
			if ((int)alignment == 8)
			{
				foreach (BlockData validDatum in validData)
				{
					list?.Add(new RelocInfo(RelocKind.Offset64, validDatum.Address));
					uint num2 = (uint)validDatum.Data;
					codeWriter.WriteByte((byte)num2);
					codeWriter.WriteByte((byte)(num2 >> 8));
					codeWriter.WriteByte((byte)(num2 >> 16));
					codeWriter.WriteByte((byte)(num2 >> 24));
					num2 = (uint)(validDatum.Data >> 32);
					codeWriter.WriteByte((byte)num2);
					codeWriter.WriteByte((byte)(num2 >> 8));
					codeWriter.WriteByte((byte)(num2 >> 16));
					codeWriter.WriteByte((byte)(num2 >> 24));
				}
				return;
			}
			throw new InvalidOperationException();
		}

		public void AddRelocInfo(RelocInfo relocInfo)
		{
			relocInfos?.Add(relocInfo);
		}
	}
	internal sealed class BlockData
	{
		internal ulong __dont_use_address;

		internal bool __dont_use_address_initd;

		public bool IsValid;

		public ulong Data;

		public ulong Address
		{
			get
			{
				if (!IsValid)
				{
					ThrowHelper.ThrowInvalidOperationException();
				}
				if (!__dont_use_address_initd)
				{
					ThrowHelper.ThrowInvalidOperationException();
				}
				return __dont_use_address;
			}
		}
	}
	internal sealed class CallInstr : Instr
	{
		private readonly byte bitness;

		private Instruction instruction;

		private TargetInstr targetInstr;

		private readonly byte origInstructionSize;

		private BlockData pointerData;

		private bool useOrigInstruction;

		public CallInstr(BlockEncoder blockEncoder, Block block, in Instruction instruction)
			: base(block, instruction.IP)
		{
			bitness = (byte)blockEncoder.Bitness;
			this.instruction = instruction;
			Instruction instruction2 = instruction;
			instruction2.NearBranch64 = 0uL;
			origInstructionSize = (byte)blockEncoder.GetInstructionSize(in instruction2, 0uL);
			if (!blockEncoder.FixBranches)
			{
				Size = origInstructionSize;
				useOrigInstruction = true;
			}
			else if (blockEncoder.Bitness == 64)
			{
				Size = Math.Max(origInstructionSize, 6u);
			}
			else
			{
				Size = origInstructionSize;
			}
		}

		public override void Initialize(BlockEncoder blockEncoder)
		{
			targetInstr = blockEncoder.GetTarget(instruction.NearBranchTarget);
		}

		public override bool Optimize(ulong gained)
		{
			return TryOptimize(gained);
		}

		private bool TryOptimize(ulong gained)
		{
			if (Done || useOrigInstruction)
			{
				Done = true;
				return false;
			}
			bool flag = bitness != 64 || targetInstr.IsInBlock(Block);
			if (!flag)
			{
				ulong address = targetInstr.GetAddress();
				ulong num = IP + origInstructionSize;
				long diff = (long)(address - num);
				diff = Instr.CorrectDiff(targetInstr.IsInBlock(Block), diff, gained);
				flag = int.MinValue <= diff && diff <= int.MaxValue;
			}
			if (flag)
			{
				if (pointerData != null)
				{
					pointerData.IsValid = false;
				}
				Size = origInstructionSize;
				useOrigInstruction = true;
				Done = true;
				return true;
			}
			if (pointerData == null)
			{
				pointerData = Block.AllocPointerLocation();
			}
			return false;
		}

		public override string TryEncode(Encoder encoder, out ConstantOffsets constantOffsets, out bool isOriginalInstruction)
		{
			uint encodedLength;
			if (useOrigInstruction)
			{
				isOriginalInstruction = true;
				instruction.NearBranch64 = targetInstr.GetAddress();
				if (!encoder.TryEncode(in instruction, IP, out encodedLength, out string errorMessage))
				{
					constantOffsets = default(ConstantOffsets);
					return Instr.CreateErrorMessage(errorMessage, in instruction);
				}
				constantOffsets = encoder.GetConstantOffsets();
				return null;
			}
			isOriginalInstruction = false;
			constantOffsets = default(ConstantOffsets);
			pointerData.Data = targetInstr.GetAddress();
			string text = EncodeBranchToPointerData(encoder, isCall: true, IP, pointerData, out encodedLength, Size);
			if (text != null)
			{
				return Instr.CreateErrorMessage(text, in instruction);
			}
			return null;
		}
	}
	internal sealed class CodeWriterImpl : CodeWriter
	{
		public uint BytesWritten;

		private readonly CodeWriter codeWriter;

		public CodeWriterImpl(CodeWriter codeWriter)
		{
			if (codeWriter == null)
			{
				ThrowHelper.ThrowArgumentNullException_codeWriter();
			}
			this.codeWriter = codeWriter;
		}

		public override void WriteByte(byte value)
		{
			BytesWritten++;
			codeWriter.WriteByte(value);
		}
	}
	internal abstract class Instr
	{
		public readonly Block Block;

		public uint Size;

		public ulong IP;

		public readonly ulong OrigIP;

		public bool Done;

		protected const uint CallOrJmpPointerDataInstructionSize64 = 6u;

		protected Instr(Block block, ulong origIp)
		{
			OrigIP = origIp;
			Block = block;
		}

		public abstract void Initialize(BlockEncoder blockEncoder);

		public abstract bool Optimize(ulong gained);

		public abstract string TryEncode(Encoder encoder, out ConstantOffsets constantOffsets, out bool isOriginalInstruction);

		protected static string CreateErrorMessage(string errorMessage, in Instruction instruction)
		{
			return $"{errorMessage} : 0x{instruction.IP:X} {instruction.ToString()}";
		}

		public static Instr Create(BlockEncoder blockEncoder, Block block, in Instruction instruction)
		{
			switch (instruction.Code)
			{
			case Code.Jo_rel8_16:
			case Code.Jo_rel8_32:
			case Code.Jo_rel8_64:
			case Code.Jno_rel8_16:
			case Code.Jno_rel8_32:
			case Code.Jno_rel8_64:
			case Code.Jb_rel8_16:
			case Code.Jb_rel8_32:
			case Code.Jb_rel8_64:
			case Code.Jae_rel8_16:
			case Code.Jae_rel8_32:
			case Code.Jae_rel8_64:
			case Code.Je_rel8_16:
			case Code.Je_rel8_32:
			case Code.Je_rel8_64:
			case Code.Jne_rel8_16:
			case Code.Jne_rel8_32:
			case Code.Jne_rel8_64:
			case Code.Jbe_rel8_16:
			case Code.Jbe_rel8_32:
			case Code.Jbe_rel8_64:
			case Code.Ja_rel8_16:
			case Code.Ja_rel8_32:
			case Code.Ja_rel8_64:
			case Code.Js_rel8_16:
			case Code.Js_rel8_32:
			case Code.Js_rel8_64:
			case Code.Jns_rel8_16:
			case Code.Jns_rel8_32:
			case Code.Jns_rel8_64:
			case Code.Jp_rel8_16:
			case Code.Jp_rel8_32:
			case Code.Jp_rel8_64:
			case Code.Jnp_rel8_16:
			case Code.Jnp_rel8_32:
			case Code.Jnp_rel8_64:
			case Code.Jl_rel8_16:
			case Code.Jl_rel8_32:
			case Code.Jl_rel8_64:
			case Code.Jge_rel8_16:
			case Code.Jge_rel8_32:
			case Code.Jge_rel8_64:
			case Code.Jle_rel8_16:
			case Code.Jle_rel8_32:
			case Code.Jle_rel8_64:
			case Code.Jg_rel8_16:
			case Code.Jg_rel8_32:
			case Code.Jg_rel8_64:
			case Code.Jo_rel16:
			case Code.Jo_rel32_32:
			case Code.Jo_rel32_64:
			case Code.Jno_rel16:
			case Code.Jno_rel32_32:
			case Code.Jno_rel32_64:
			case Code.Jb_rel16:
			case Code.Jb_rel32_32:
			case Code.Jb_rel32_64:
			case Code.Jae_rel16:
			case Code.Jae_rel32_32:
			case Code.Jae_rel32_64:
			case Code.Je_rel16:
			case Code.Je_rel32_32:
			case Code.Je_rel32_64:
			case Code.Jne_rel16:
			case Code.Jne_rel32_32:
			case Code.Jne_rel32_64:
			case Code.Jbe_rel16:
			case Code.Jbe_rel32_32:
			case Code.Jbe_rel32_64:
			case Code.Ja_rel16:
			case Code.Ja_rel32_32:
			case Code.Ja_rel32_64:
			case Code.Js_rel16:
			case Code.Js_rel32_32:
			case Code.Js_rel32_64:
			case Code.Jns_rel16:
			case Code.Jns_rel32_32:
			case Code.Jns_rel32_64:
			case Code.Jp_rel16:
			case Code.Jp_rel32_32:
			case Code.Jp_rel32_64:
			case Code.Jnp_rel16:
			case Code.Jnp_rel32_32:
			case Code.Jnp_rel32_64:
			case Code.Jl_rel16:
			case Code.Jl_rel32_32:
			case Code.Jl_rel32_64:
			case Code.Jge_rel16:
			case Code.Jge_rel32_32:
			case Code.Jge_rel32_64:
			case Code.Jle_rel16:
			case Code.Jle_rel32_32:
			case Code.Jle_rel32_64:
			case Code.Jg_rel16:
			case Code.Jg_rel32_32:
			case Code.Jg_rel32_64:
			case Code.VEX_KNC_Jkzd_kr_rel8_64:
			case Code.VEX_KNC_Jknzd_kr_rel8_64:
			case Code.VEX_KNC_Jkzd_kr_rel32_64:
			case Code.VEX_KNC_Jknzd_kr_rel32_64:
				return new JccInstr(blockEncoder, block, in instruction);
			case Code.Loopne_rel8_16_CX:
			case Code.Loopne_rel8_32_CX:
			case Code.Loopne_rel8_16_ECX:
			case Code.Loopne_rel8_32_ECX:
			case Code.Loopne_rel8_64_ECX:
			case Code.Loopne_rel8_16_RCX:
			case Code.Loopne_rel8_64_RCX:
			case Code.Loope_rel8_16_CX:
			case Code.Loope_rel8_32_CX:
			case Code.Loope_rel8_16_ECX:
			case Code.Loope_rel8_32_ECX:
			case Code.Loope_rel8_64_ECX:
			case Code.Loope_rel8_16_RCX:
			case Code.Loope_rel8_64_RCX:
			case Code.Loop_rel8_16_CX:
			case Code.Loop_rel8_32_CX:
			case Code.Loop_rel8_16_ECX:
			case Code.Loop_rel8_32_ECX:
			case Code.Loop_rel8_64_ECX:
			case Code.Loop_rel8_16_RCX:
			case Code.Loop_rel8_64_RCX:
			case Code.Jcxz_rel8_16:
			case Code.Jcxz_rel8_32:
			case Code.Jecxz_rel8_16:
			case Code.Jecxz_rel8_32:
			case Code.Jecxz_rel8_64:
			case Code.Jrcxz_rel8_16:
			case Code.Jrcxz_rel8_64:
				return new SimpleBranchInstr(blockEncoder, block, in instruction);
			case Code.Call_rel16:
			case Code.Call_rel32_32:
			case Code.Call_rel32_64:
				return new CallInstr(blockEncoder, block, in instruction);
			case Code.Jmp_rel16:
			case Code.Jmp_rel32_32:
			case Code.Jmp_rel32_64:
			case Code.Jmp_rel8_16:
			case Code.Jmp_rel8_32:
			case Code.Jmp_rel8_64:
				return new JmpInstr(blockEncoder, block, in instruction);
			case Code.Xbegin_rel16:
			case Code.Xbegin_rel32:
				return new XbeginInstr(blockEncoder, block, in instruction);
			default:
				if (blockEncoder.Bitness == 64)
				{
					int opCount = instruction.OpCount;
					for (int i = 0; i < opCount; i++)
					{
						if (instruction.GetOpKind(i) == OpKind.Memory)
						{
							if (!instruction.IsIPRelativeMemoryOperand)
							{
								break;
							}
							return new IpRelMemOpInstr(blockEncoder, block, in instruction);
						}
					}
				}
				return new SimpleInstr(blockEncoder, block, in instruction);
			}
		}

		protected string EncodeBranchToPointerData(Encoder encoder, bool isCall, ulong ip, BlockData pointerData, out uint size, uint minSize)
		{
			if (minSize > int.MaxValue)
			{
				throw new ArgumentOutOfRangeException("minSize");
			}
			Instruction instruction = default(Instruction);
			instruction.Op0Kind = OpKind.Memory;
			instruction.MemoryDisplSize = encoder.Bitness / 8;
			if (encoder.Bitness == 64)
			{
				instruction.InternalSetCodeNoCheck(isCall ? Code.Call_rm64 : Code.Jmp_rm64);
				instruction.MemoryBase = Register.RIP;
				ulong num = ip + 6;
				long num2 = (long)(pointerData.Address - num);
				if (int.MinValue > num2 || num2 > int.MaxValue)
				{
					size = 0u;
					return "Block is too big";
				}
				instruction.MemoryDisplacement64 = pointerData.Address;
				RelocKind relocKind = RelocKind.Offset64;
				if (!encoder.TryEncode(in instruction, ip, out size, out string errorMessage))
				{
					return errorMessage;
				}
				if (Block.CanAddRelocInfos && relocKind != 0)
				{
					ConstantOffsets constantOffsets = encoder.GetConstantOffsets();
					if (!constantOffsets.HasDisplacement)
					{
						return "Internal error: no displ";
					}
					Block.AddRelocInfo(new RelocInfo(relocKind, IP + constantOffsets.DisplacementOffset));
				}
				while (size < minSize)
				{
					size++;
					Block.CodeWriter.WriteByte(144);
				}
				return null;
			}
			throw new InvalidOperationException();
		}

		protected static long CorrectDiff(bool inBlock, long diff, ulong gained)
		{
			if (inBlock && diff >= 0)
			{
				return diff - (long)gained;
			}
			return diff;
		}
	}
	internal sealed class IpRelMemOpInstr : Instr
	{
		private enum InstrKind : byte
		{
			Unchanged,
			Rip,
			Eip,
			Long,
			Uninitialized
		}

		private Instruction instruction;

		private InstrKind instrKind;

		private readonly byte eipInstructionSize;

		private readonly byte ripInstructionSize;

		private TargetInstr targetInstr;

		public IpRelMemOpInstr(BlockEncoder blockEncoder, Block block, in Instruction instruction)
			: base(block, instruction.IP)
		{
			this.instruction = instruction;
			instrKind = InstrKind.Uninitialized;
			Instruction instruction2 = instruction;
			instruction2.MemoryBase = Register.RIP;
			instruction2.MemoryDisplacement64 = 0uL;
			ripInstructionSize = (byte)blockEncoder.GetInstructionSize(in instruction2, instruction2.IPRelativeMemoryAddress);
			instruction2.MemoryBase = Register.EIP;
			eipInstructionSize = (byte)blockEncoder.GetInstructionSize(in instruction2, instruction2.IPRelativeMemoryAddress);
			Size = eipInstructionSize;
		}

		public override void Initialize(BlockEncoder blockEncoder)
		{
			targetInstr = blockEncoder.GetTarget(instruction.IPRelativeMemoryAddress);
		}

		public override bool Optimize(ulong gained)
		{
			return TryOptimize(gained);
		}

		private bool TryOptimize(ulong gained)
		{
			if (instrKind == InstrKind.Unchanged || instrKind == InstrKind.Rip || instrKind == InstrKind.Eip)
			{
				Done = true;
				return false;
			}
			bool flag = targetInstr.IsInBlock(Block);
			ulong address = targetInstr.GetAddress();
			if (!flag)
			{
				ulong num = IP + ripInstructionSize;
				long diff = (long)(address - num);
				diff = Instr.CorrectDiff(targetInstr.IsInBlock(Block), diff, gained);
				flag = int.MinValue <= diff && diff <= int.MaxValue;
			}
			if (flag)
			{
				Size = ripInstructionSize;
				instrKind = InstrKind.Rip;
				Done = true;
				return true;
			}
			if (address <= uint.MaxValue)
			{
				Size = eipInstructionSize;
				instrKind = InstrKind.Eip;
				Done = true;
				return true;
			}
			instrKind = InstrKind.Long;
			return false;
		}

		public override string TryEncode(Encoder encoder, out ConstantOffsets constantOffsets, out bool isOriginalInstruction)
		{
			switch (instrKind)
			{
			case InstrKind.Unchanged:
			case InstrKind.Rip:
			case InstrKind.Eip:
			{
				isOriginalInstruction = true;
				if (instrKind == InstrKind.Rip)
				{
					instruction.MemoryBase = Register.RIP;
				}
				else if (instrKind == InstrKind.Eip)
				{
					instruction.MemoryBase = Register.EIP;
				}
				ulong address = targetInstr.GetAddress();
				instruction.MemoryDisplacement64 = address;
				encoder.TryEncode(in instruction, IP, out uint _, out string errorMessage);
				if (instruction.IPRelativeMemoryAddress != ((instruction.MemoryBase == Register.EIP) ? ((uint)address) : address))
				{
					errorMessage = "Invalid IP relative address";
				}
				if (errorMessage != null)
				{
					constantOffsets = default(ConstantOffsets);
					return Instr.CreateErrorMessage(errorMessage, in instruction);
				}
				constantOffsets = encoder.GetConstantOffsets();
				return null;
			}
			case InstrKind.Long:
				isOriginalInstruction = false;
				constantOffsets = default(ConstantOffsets);
				return "IP relative memory operand is too far away and isn't currently supported. Try to allocate memory close to the original instruction (+/-2GB).";
			default:
				throw new InvalidOperationException();
			}
		}
	}
	internal sealed class JccInstr : Instr
	{
		private enum InstrKind : byte
		{
			Unchanged,
			Short,
			Near,
			Long,
			Uninitialized
		}

		private Instruction instruction;

		private TargetInstr targetInstr;

		private BlockData pointerData;

		private InstrKind instrKind;

		private readonly byte shortInstructionSize;

		private readonly byte nearInstructionSize;

		private readonly byte longInstructionSize64;

		private static uint GetLongInstructionSize64(in Instruction instruction)
		{
			if (instruction.OpCount == 2)
			{
				return 11u;
			}
			return 8u;
		}

		public JccInstr(BlockEncoder blockEncoder, Block block, in Instruction instruction)
			: base(block, instruction.IP)
		{
			this.instruction = instruction;
			instrKind = InstrKind.Uninitialized;
			longInstructionSize64 = (byte)GetLongInstructionSize64(in instruction);
			Instruction instruction2;
			if (!blockEncoder.FixBranches)
			{
				instrKind = InstrKind.Unchanged;
				instruction2 = instruction;
				instruction2.NearBranch64 = 0uL;
				Size = blockEncoder.GetInstructionSize(in instruction2, 0uL);
				return;
			}
			instruction2 = instruction;
			instruction2.InternalSetCodeNoCheck(instruction.Code.ToShortBranch());
			instruction2.NearBranch64 = 0uL;
			shortInstructionSize = (byte)blockEncoder.GetInstructionSize(in instruction2, 0uL);
			instruction2 = instruction;
			instruction2.InternalSetCodeNoCheck(instruction.Code.ToNearBranch());
			instruction2.NearBranch64 = 0uL;
			nearInstructionSize = (byte)blockEncoder.GetInstructionSize(in instruction2, 0uL);
			if (blockEncoder.Bitness == 64)
			{
				Size = Math.Max(nearInstructionSize, longInstructionSize64);
			}
			else
			{
				Size = nearInstructionSize;
			}
		}

		public override void Initialize(BlockEncoder blockEncoder)
		{
			targetInstr = blockEncoder.GetTarget(instruction.NearBranchTarget);
		}

		public override bool Optimize(ulong gained)
		{
			return TryOptimize(gained);
		}

		private bool TryOptimize(ulong gained)
		{
			if (instrKind == InstrKind.Unchanged || instrKind == InstrKind.Short)
			{
				Done = true;
				return false;
			}
			ulong address = targetInstr.GetAddress();
			ulong num = IP + shortInstructionSize;
			long diff = (long)(address - num);
			diff = Instr.CorrectDiff(targetInstr.IsInBlock(Block), diff, gained);
			if (-128 <= diff && diff <= 127)
			{
				if (pointerData != null)
				{
					pointerData.IsValid = false;
				}
				instrKind = InstrKind.Short;
				Size = shortInstructionSize;
				Done = true;
				return true;
			}
			ulong address2 = targetInstr.GetAddress();
			num = IP + nearInstructionSize;
			diff = (long)(address2 - num);
			diff = Instr.CorrectDiff(targetInstr.IsInBlock(Block), diff, gained);
			if (int.MinValue <= diff && diff <= int.MaxValue)
			{
				if (pointerData != null)
				{
					pointerData.IsValid = false;
				}
				if (diff < -1920 || diff > 1905)
				{
					Done = true;
				}
				instrKind = InstrKind.Near;
				Size = nearInstructionSize;
				return true;
			}
			if (pointerData == null)
			{
				pointerData = Block.AllocPointerLocation();
			}
			instrKind = InstrKind.Long;
			return false;
		}

		public override string TryEncode(Encoder encoder, out ConstantOffsets constantOffsets, out bool isOriginalInstruction)
		{
			uint encodedLength2;
			string errorMessage;
			switch (instrKind)
			{
			case InstrKind.Unchanged:
			case InstrKind.Short:
			case InstrKind.Near:
				isOriginalInstruction = true;
				if (instrKind != 0)
				{
					if (instrKind == InstrKind.Short)
					{
						this.instruction.InternalSetCodeNoCheck(this.instruction.Code.ToShortBranch());
					}
					else
					{
						this.instruction.InternalSetCodeNoCheck(this.instruction.Code.ToNearBranch());
					}
				}
				this.instruction.NearBranch64 = targetInstr.GetAddress();
				if (!encoder.TryEncode(in this.instruction, IP, out encodedLength2, out errorMessage))
				{
					constantOffsets = default(ConstantOffsets);
					return Instr.CreateErrorMessage(errorMessage, in this.instruction);
				}
				constantOffsets = encoder.GetConstantOffsets();
				return null;
			case InstrKind.Long:
			{
				isOriginalInstruction = false;
				constantOffsets = default(ConstantOffsets);
				pointerData.Data = targetInstr.GetAddress();
				Instruction instruction = default(Instruction);
				instruction.InternalSetCodeNoCheck(ShortBrToNativeBr(this.instruction.Code.NegateConditionCode().ToShortBranch(), encoder.Bitness));
				if (this.instruction.OpCount == 1)
				{
					instruction.Op0Kind = OpKind.NearBranch64;
				}
				else
				{
					instruction.Op0Kind = OpKind.Register;
					instruction.Op0Register = this.instruction.Op0Register;
					instruction.Op1Kind = OpKind.NearBranch64;
				}
				instruction.NearBranch64 = IP + longInstructionSize64;
				if (!encoder.TryEncode(in instruction, IP, out uint encodedLength, out errorMessage))
				{
					return Instr.CreateErrorMessage(errorMessage, in this.instruction);
				}
				errorMessage = EncodeBranchToPointerData(encoder, isCall: false, IP + encodedLength, pointerData, out encodedLength2, Size - encodedLength);
				if (errorMessage != null)
				{
					return Instr.CreateErrorMessage(errorMessage, in this.instruction);
				}
				return null;
			}
			default:
				throw new InvalidOperationException();
			}
		}

		private static Code ShortBrToNativeBr(Code code, int bitness)
		{
			Code code2;
			Code code3;
			Code code4;
			switch (code)
			{
			case Code.Jo_rel8_16:
			case Code.Jo_rel8_32:
			case Code.Jo_rel8_64:
				code2 = Code.Jo_rel8_16;
				code3 = Code.Jo_rel8_32;
				code4 = Code.Jo_rel8_64;
				break;
			case Code.Jno_rel8_16:
			case Code.Jno_rel8_32:
			case Code.Jno_rel8_64:
				code2 = Code.Jno_rel8_16;
				code3 = Code.Jno_rel8_32;
				code4 = Code.Jno_rel8_64;
				break;
			case Code.Jb_rel8_16:
			case Code.Jb_rel8_32:
			case Code.Jb_rel8_64:
				code2 = Code.Jb_rel8_16;
				code3 = Code.Jb_rel8_32;
				code4 = Code.Jb_rel8_64;
				break;
			case Code.Jae_rel8_16:
			case Code.Jae_rel8_32:
			case Code.Jae_rel8_64:
				code2 = Code.Jae_rel8_16;
				code3 = Code.Jae_rel8_32;
				code4 = Code.Jae_rel8_64;
				break;
			case Code.Je_rel8_16:
			case Code.Je_rel8_32:
			case Code.Je_rel8_64:
				code2 = Code.Je_rel8_16;
				code3 = Code.Je_rel8_32;
				code4 = Code.Je_rel8_64;
				break;
			case Code.Jne_rel8_16:
			case Code.Jne_rel8_32:
			case Code.Jne_rel8_64:
				code2 = Code.Jne_rel8_16;
				code3 = Code.Jne_rel8_32;
				code4 = Code.Jne_rel8_64;
				break;
			case Code.Jbe_rel8_16:
			case Code.Jbe_rel8_32:
			case Code.Jbe_rel8_64:
				code2 = Code.Jbe_rel8_16;
				code3 = Code.Jbe_rel8_32;
				code4 = Code.Jbe_rel8_64;
				break;
			case Code.Ja_rel8_16:
			case Code.Ja_rel8_32:
			case Code.Ja_rel8_64:
				code2 = Code.Ja_rel8_16;
				code3 = Code.Ja_rel8_32;
				code4 = Code.Ja_rel8_64;
				break;
			case Code.Js_rel8_16:
			case Code.Js_rel8_32:
			case Code.Js_rel8_64:
				code2 = Code.Js_rel8_16;
				code3 = Code.Js_rel8_32;
				code4 = Code.Js_rel8_64;
				break;
			case Code.Jns_rel8_16:
			case Code.Jns_rel8_32:
			case Code.Jns_rel8_64:
				code2 = Code.Jns_rel8_16;
				code3 = Code.Jns_rel8_32;
				code4 = Code.Jns_rel8_64;
				break;
			case Code.Jp_rel8_16:
			case Code.Jp_rel8_32:
			case Code.Jp_rel8_64:
				code2 = Code.Jp_rel8_16;
				code3 = Code.Jp_rel8_32;
				code4 = Code.Jp_rel8_64;
				break;
			case Code.Jnp_rel8_16:
			case Code.Jnp_rel8_32:
			case Code.Jnp_rel8_64:
				code2 = Code.Jnp_rel8_16;
				code3 = Code.Jnp_rel8_32;
				code4 = Code.Jnp_rel8_64;
				break;
			case Code.Jl_rel8_16:
			case Code.Jl_rel8_32:
			case Code.Jl_rel8_64:
				code2 = Code.Jl_rel8_16;
				code3 = Code.Jl_rel8_32;
				code4 = Code.Jl_rel8_64;
				break;
			case Code.Jge_rel8_16:
			case Code.Jge_rel8_32:
			case Code.Jge_rel8_64:
				code2 = Code.Jge_rel8_16;
				code3 = Code.Jge_rel8_32;
				code4 = Code.Jge_rel8_64;
				break;
			case Code.Jle_rel8_16:
			case Code.Jle_rel8_32:
			case Code.Jle_rel8_64:
				code2 = Code.Jle_rel8_16;
				code3 = Code.Jle_rel8_32;
				code4 = Code.Jle_rel8_64;
				break;
			case Code.Jg_rel8_16:
			case Code.Jg_rel8_32:
			case Code.Jg_rel8_64:
				code2 = Code.Jg_rel8_16;
				code3 = Code.Jg_rel8_32;
				code4 = Code.Jg_rel8_64;
				break;
			case Code.VEX_KNC_Jkzd_kr_rel8_64:
			case Code.VEX_KNC_Jknzd_kr_rel8_64:
				if (bitness == 64)
				{
					return code;
				}
				throw new InvalidOperationException();
			default:
				throw new ArgumentOutOfRangeException("code");
			}
			return bitness switch
			{
				16 => code2, 
				32 => code3, 
				64 => code4, 
				_ => throw new ArgumentOutOfRangeException("bitness"), 
			};
		}
	}
	internal sealed class JmpInstr : Instr
	{
		private enum InstrKind : byte
		{
			Unchanged,
			Short,
			Near,
			Long,
			Uninitialized
		}

		private Instruction instruction;

		private TargetInstr targetInstr;

		private BlockData pointerData;

		private InstrKind instrKind;

		private readonly byte shortInstructionSize;

		private readonly byte nearInstructionSize;

		public JmpInstr(BlockEncoder blockEncoder, Block block, in Instruction instruction)
			: base(block, instruction.IP)
		{
			this.instruction = instruction;
			instrKind = InstrKind.Uninitialized;
			Instruction instruction2;
			if (!blockEncoder.FixBranches)
			{
				instrKind = InstrKind.Unchanged;
				instruction2 = instruction;
				instruction2.NearBranch64 = 0uL;
				Size = blockEncoder.GetInstructionSize(in instruction2, 0uL);
				return;
			}
			instruction2 = instruction;
			instruction2.InternalSetCodeNoCheck(instruction.Code.ToShortBranch());
			instruction2.NearBranch64 = 0uL;
			shortInstructionSize = (byte)blockEncoder.GetInstructionSize(in instruction2, 0uL);
			instruction2 = instruction;
			instruction2.InternalSetCodeNoCheck(instruction.Code.ToNearBranch());
			instruction2.NearBranch64 = 0uL;
			nearInstructionSize = (byte)blockEncoder.GetInstructionSize(in instruction2, 0uL);
			if (blockEncoder.Bitness == 64)
			{
				Size = Math.Max(nearInstructionSize, 6u);
			}
			else
			{
				Size = nearInstructionSize;
			}
		}

		public override void Initialize(BlockEncoder blockEncoder)
		{
			targetInstr = blockEncoder.GetTarget(instruction.NearBranchTarget);
		}

		public override bool Optimize(ulong gained)
		{
			return TryOptimize(gained);
		}

		private bool TryOptimize(ulong gained)
		{
			if (instrKind == InstrKind.Unchanged || instrKind == InstrKind.Short)
			{
				Done = true;
				return false;
			}
			ulong address = targetInstr.GetAddress();
			ulong num = IP + shortInstructionSize;
			long diff = (long)(address - num);
			diff = Instr.CorrectDiff(targetInstr.IsInBlock(Block), diff, gained);
			if (-128 <= diff && diff <= 127)
			{
				if (pointerData != null)
				{
					pointerData.IsValid = false;
				}
				instrKind = InstrKind.Short;
				Size = shortInstructionSize;
				Done = true;
				return true;
			}
			ulong address2 = targetInstr.GetAddress();
			num = IP + nearInstructionSize;
			diff = (long)(address2 - num);
			diff = Instr.CorrectDiff(targetInstr.IsInBlock(Block), diff, gained);
			if (int.MinValue <= diff && diff <= int.MaxValue)
			{
				if (pointerData != null)
				{
					pointerData.IsValid = false;
				}
				if (diff < -1920 || diff > 1905)
				{
					Done = true;
				}
				instrKind = InstrKind.Near;
				Size = nearInstructionSize;
				return true;
			}
			if (pointerData == null)
			{
				pointerData = Block.AllocPointerLocation();
			}
			instrKind = InstrKind.Long;
			return false;
		}

		public override string TryEncode(Encoder encoder, out ConstantOffsets constantOffsets, out bool isOriginalInstruction)
		{
			uint size;
			switch (instrKind)
			{
			case InstrKind.Unchanged:
			case InstrKind.Short:
			case InstrKind.Near:
			{
				isOriginalInstruction = true;
				if (instrKind != 0)
				{
					if (instrKind == InstrKind.Short)
					{
						instruction.InternalSetCodeNoCheck(instruction.Code.ToShortBranch());
					}
					else
					{
						instruction.InternalSetCodeNoCheck(instruction.Code.ToNearBranch());
					}
				}
				instruction.NearBranch64 = targetInstr.GetAddress();
				if (!encoder.TryEncode(in instruction, IP, out size, out string text))
				{
					constantOffsets = default(ConstantOffsets);
					return Instr.CreateErrorMessage(text, in instruction);
				}
				constantOffsets = encoder.GetConstantOffsets();
				return null;
			}
			case InstrKind.Long:
			{
				isOriginalInstruction = false;
				constantOffsets = default(ConstantOffsets);
				pointerData.Data = targetInstr.GetAddress();
				string text = EncodeBranchToPointerData(encoder, isCall: false, IP, pointerData, out size, Size);
				if (text != null)
				{
					return Instr.CreateErrorMessage(text, in instruction);
				}
				return null;
			}
			default:
				throw new InvalidOperationException();
			}
		}
	}
	internal sealed class SimpleBranchInstr : Instr
	{
		private enum InstrKind : byte
		{
			Unchanged,
			Short,
			Near,
			Long,
			Uninitialized
		}

		private Instruction instruction;

		private TargetInstr targetInstr;

		private BlockData pointerData;

		private InstrKind instrKind;

		private readonly byte shortInstructionSize;

		private readonly byte nearInstructionSize;

		private readonly byte longInstructionSize;

		private readonly byte nativeInstructionSize;

		private readonly Code nativeCode;

		public SimpleBranchInstr(BlockEncoder blockEncoder, Block block, in Instruction instruction)
			: base(block, instruction.IP)
		{
			this.instruction = instruction;
			instrKind = InstrKind.Uninitialized;
			Instruction instruction2;
			if (!blockEncoder.FixBranches)
			{
				instrKind = InstrKind.Unchanged;
				instruction2 = instruction;
				instruction2.NearBranch64 = 0uL;
				Size = blockEncoder.GetInstructionSize(in instruction2, 0uL);
				return;
			}
			instruction2 = instruction;
			instruction2.NearBranch64 = 0uL;
			shortInstructionSize = (byte)blockEncoder.GetInstructionSize(in instruction2, 0uL);
			nativeCode = ToNativeBranchCode(instruction.Code, blockEncoder.Bitness);
			if (nativeCode == instruction.Code)
			{
				nativeInstructionSize = shortInstructionSize;
			}
			else
			{
				instruction2 = instruction;
				instruction2.InternalSetCodeNoCheck(nativeCode);
				instruction2.NearBranch64 = 0uL;
				nativeInstructionSize = (byte)blockEncoder.GetInstructionSize(in instruction2, 0uL);
			}
			int num;
			switch (blockEncoder.Bitness)
			{
			case 16:
				num = nativeInstructionSize + 2 + 3;
				break;
			case 32:
			case 64:
				num = nativeInstructionSize + 2 + 5;
				break;
			default:
				throw new InvalidOperationException();
			}
			nearInstructionSize = (byte)num;
			if (blockEncoder.Bitness == 64)
			{
				longInstructionSize = (byte)((ulong)(nativeInstructionSize + 2) + 6uL);
				Size = Math.Max(Math.Max(shortInstructionSize, nearInstructionSize), longInstructionSize);
			}
			else
			{
				Size = Math.Max(shortInstructionSize, nearInstructionSize);
			}
		}

		private static Code ToNativeBranchCode(Code code, int bitness)
		{
			Code code2;
			Code code3;
			Code code4;
			switch (code)
			{
			case Code.Loopne_rel8_16_CX:
			case Code.Loopne_rel8_32_CX:
				code2 = Code.Loopne_rel8_16_CX;
				code3 = Code.Loopne_rel8_32_CX;
				code4 = Code.INVALID;
				break;
			case Code.Loopne_rel8_16_ECX:
			case Code.Loopne_rel8_32_ECX:
			case Code.Loopne_rel8_64_ECX:
				code2 = Code.Loopne_rel8_16_ECX;
				code3 = Code.Loopne_rel8_32_ECX;
				code4 = Code.Loopne_rel8_64_ECX;
				break;
			case Code.Loopne_rel8_16_RCX:
			case Code.Loopne_rel8_64_RCX:
				code2 = Code.Loopne_rel8_16_RCX;
				code3 = Code.INVALID;
				code4 = Code.Loopne_rel8_64_RCX;
				break;
			case Code.Loope_rel8_16_CX:
			case Code.Loope_rel8_32_CX:
				code2 = Code.Loope_rel8_16_CX;
				code3 = Code.Loope_rel8_32_CX;
				code4 = Code.INVALID;
				break;
			case Code.Loope_rel8_16_ECX:
			case Code.Loope_rel8_32_ECX:
			case Code.Loope_rel8_64_ECX:
				code2 = Code.Loope_rel8_16_ECX;
				code3 = Code.Loope_rel8_32_ECX;
				code4 = Code.Loope_rel8_64_ECX;
				break;
			case Code.Loope_rel8_16_RCX:
			case Code.Loope_rel8_64_RCX:
				code2 = Code.Loope_rel8_16_RCX;
				code3 = Code.INVALID;
				code4 = Code.Loope_rel8_64_RCX;
				break;
			case Code.Loop_rel8_16_CX:
			case Code.Loop_rel8_32_CX:
				code2 = Code.Loop_rel8_16_CX;
				code3 = Code.Loop_rel8_32_CX;
				code4 = Code.INVALID;
				break;
			case Code.Loop_rel8_16_ECX:
			case Code.Loop_rel8_32_ECX:
			case Code.Loop_rel8_64_ECX:
				code2 = Code.Loop_rel8_16_ECX;
				code3 = Code.Loop_rel8_32_ECX;
				code4 = Code.Loop_rel8_64_ECX;
				break;
			case Code.Loop_rel8_16_RCX:
			case Code.Loop_rel8_64_RCX:
				code2 = Code.Loop_rel8_16_RCX;
				code3 = Code.INVALID;
				code4 = Code.Loop_rel8_64_RCX;
				break;
			case Code.Jcxz_rel8_16:
			case Code.Jcxz_rel8_32:
				code2 = Code.Jcxz_rel8_16;
				code3 = Code.Jcxz_rel8_32;
				code4 = Code.INVALID;
				break;
			case Code.Jecxz_rel8_16:
			case Code.Jecxz_rel8_32:
			case Code.Jecxz_rel8_64:
				code2 = Code.Jecxz_rel8_16;
				code3 = Code.Jecxz_rel8_32;
				code4 = Code.Jecxz_rel8_64;
				break;
			case Code.Jrcxz_rel8_16:
			case Code.Jrcxz_rel8_64:
				code2 = Code.Jrcxz_rel8_16;
				code3 = Code.INVALID;
				code4 = Code.Jrcxz_rel8_64;
				break;
			default:
				throw new ArgumentOutOfRangeException("code");
			}
			return bitness switch
			{
				16 => code2, 
				32 => code3, 
				64 => code4, 
				_ => throw new ArgumentOutOfRangeException("bitness"), 
			};
		}

		public override void Initialize(BlockEncoder blockEncoder)
		{
			targetInstr = blockEncoder.GetTarget(instruction.NearBranchTarget);
		}

		public override bool Optimize(ulong gained)
		{
			return TryOptimize(gained);
		}

		private bool TryOptimize(ulong gained)
		{
			if (instrKind == InstrKind.Unchanged || instrKind == InstrKind.Short)
			{
				Done = true;
				return false;
			}
			ulong address = targetInstr.GetAddress();
			ulong num = IP + shortInstructionSize;
			long diff = (long)(address - num);
			diff = Instr.CorrectDiff(targetInstr.IsInBlock(Block), diff, gained);
			if (-128 <= diff && diff <= 127)
			{
				if (pointerData != null)
				{
					pointerData.IsValid = false;
				}
				instrKind = InstrKind.Short;
				Size = shortInstructionSize;
				Done = true;
				return true;
			}
			ulong address2 = targetInstr.GetAddress();
			num = IP + nearInstructionSize;
			diff = (long)(address2 - num);
			diff = Instr.CorrectDiff(targetInstr.IsInBlock(Block), diff, gained);
			if (int.MinValue <= diff && diff <= int.MaxValue)
			{
				if (pointerData != null)
				{
					pointerData.IsValid = false;
				}
				if (diff < -1920 || diff > 1905)
				{
					Done = true;
				}
				instrKind = InstrKind.Near;
				Size = nearInstructionSize;
				return true;
			}
			if (pointerData == null)
			{
				pointerData = Block.AllocPointerLocation();
			}
			instrKind = InstrKind.Long;
			return false;
		}

		public override string TryEncode(Encoder encoder, out ConstantOffsets constantOffsets, out bool isOriginalInstruction)
		{
			uint encodedLength2;
			uint encodedLength;
			string errorMessage;
			switch (instrKind)
			{
			case InstrKind.Unchanged:
			case InstrKind.Short:
				isOriginalInstruction = true;
				this.instruction.NearBranch64 = targetInstr.GetAddress();
				if (!encoder.TryEncode(in this.instruction, IP, out encodedLength2, out errorMessage))
				{
					constantOffsets = default(ConstantOffsets);
					return Instr.CreateErrorMessage(errorMessage, in this.instruction);
				}
				constantOffsets = encoder.GetConstantOffsets();
				return null;
			case InstrKind.Near:
			{
				isOriginalInstruction = false;
				constantOffsets = default(ConstantOffsets);
				Instruction instruction = this.instruction;
				instruction.InternalSetCodeNoCheck(nativeCode);
				instruction.NearBranch64 = IP + nativeInstructionSize + 2;
				if (!encoder.TryEncode(in instruction, IP, out uint num, out errorMessage))
				{
					return Instr.CreateErrorMessage(errorMessage, in this.instruction);
				}
				instruction = default(Instruction);
				instruction.NearBranch64 = IP + nearInstructionSize;
				Code code;
				switch (encoder.Bitness)
				{
				case 16:
					instruction.InternalSetCodeNoCheck(Code.Jmp_rel8_16);
					code = Code.Jmp_rel16;
					instruction.Op0Kind = OpKind.NearBranch16;
					break;
				case 32:
					instruction.InternalSetCodeNoCheck(Code.Jmp_rel8_32);
					code = Code.Jmp_rel32_32;
					instruction.Op0Kind = OpKind.NearBranch32;
					break;
				case 64:
					instruction.InternalSetCodeNoCheck(Code.Jmp_rel8_64);
					code = Code.Jmp_rel32_64;
					instruction.Op0Kind = OpKind.NearBranch64;
					break;
				default:
					throw new InvalidOperationException();
				}
				if (!encoder.TryEncode(in instruction, IP + num, out encodedLength, out errorMessage))
				{
					return Instr.CreateErrorMessage(errorMessage, in this.instruction);
				}
				num += encodedLength;
				instruction.InternalSetCodeNoCheck(code);
				instruction.NearBranch64 = targetInstr.GetAddress();
				encoder.TryEncode(in instruction, IP + num, out encodedLength, out errorMessage);
				if (errorMessage != null)
				{
					return Instr.CreateErrorMessage(errorMessage, in this.instruction);
				}
				return null;
			}
			case InstrKind.Long:
			{
				isOriginalInstruction = false;
				constantOffsets = default(ConstantOffsets);
				pointerData.Data = targetInstr.GetAddress();
				Instruction instruction = this.instruction;
				instruction.InternalSetCodeNoCheck(nativeCode);
				instruction.NearBranch64 = IP + nativeInstructionSize + 2;
				if (!encoder.TryEncode(in instruction, IP, out encodedLength, out errorMessage))
				{
					return Instr.CreateErrorMessage(errorMessage, in this.instruction);
				}
				uint num = encodedLength;
				instruction = default(Instruction);
				instruction.NearBranch64 = IP + longInstructionSize;
				switch (encoder.Bitness)
				{
				case 16:
					instruction.InternalSetCodeNoCheck(Code.Jmp_rel8_16);
					instruction.Op0Kind = OpKind.NearBranch16;
					break;
				case 32:
					instruction.InternalSetCodeNoCheck(Code.Jmp_rel8_32);
					instruction.Op0Kind = OpKind.NearBranch32;
					break;
				case 64:
					instruction.InternalSetCodeNoCheck(Code.Jmp_rel8_64);
					instruction.Op0Kind = OpKind.NearBranch64;
					break;
				default:
					throw new InvalidOperationException();
				}
				if (!encoder.TryEncode(in instruction, IP + num, out encodedLength, out errorMessage))
				{
					return Instr.CreateErrorMessage(errorMessage, in this.instruction);
				}
				num += encodedLength;
				errorMessage = EncodeBranchToPointerData(encoder, isCall: false, IP + num, pointerData, out encodedLength2, Size - num);
				if (errorMessage != null)
				{
					return Instr.CreateErrorMessage(errorMessage, in this.instruction);
				}
				return null;
			}
			default:
				throw new InvalidOperationException();
			}
		}
	}
	internal sealed class SimpleInstr : Instr
	{
		private Instruction instruction;

		public SimpleInstr(BlockEncoder blockEncoder, Block block, in Instruction instruction)
			: base(block, instruction.IP)
		{
			Done = true;
			this.instruction = instruction;
			Size = blockEncoder.GetInstructionSize(in instruction, instruction.IP);
		}

		public override void Initialize(BlockEncoder blockEncoder)
		{
		}

		public override bool Optimize(ulong gained)
		{
			return false;
		}

		public override string TryEncode(Encoder encoder, out ConstantOffsets constantOffsets, out bool isOriginalInstruction)
		{
			isOriginalInstruction = true;
			if (!encoder.TryEncode(in instruction, IP, out uint _, out string errorMessage))
			{
				constantOffsets = default(ConstantOffsets);
				return Instr.CreateErrorMessage(errorMessage, in instruction);
			}
			constantOffsets = encoder.GetConstantOffsets();
			return null;
		}
	}
	internal readonly struct TargetInstr
	{
		private readonly Instr instruction;

		private readonly ulong address;

		public TargetInstr(Instr instruction)
		{
			this.instruction = instruction;
			address = 0uL;
		}

		public TargetInstr(ulong address)
		{
			instruction = null;
			this.address = address;
		}

		public bool IsInBlock(Block block)
		{
			return instruction?.Block == block;
		}

		public ulong GetAddress()
		{
			return instruction?.IP ?? address;
		}
	}
	internal sealed class XbeginInstr : Instr
	{
		private enum InstrKind : byte
		{
			Unchanged,
			Rel16,
			Rel32,
			Uninitialized
		}

		private Instruction instruction;

		private TargetInstr targetInstr;

		private InstrKind instrKind;

		private readonly byte shortInstructionSize;

		private readonly byte nearInstructionSize;

		public XbeginInstr(BlockEncoder blockEncoder, Block block, in Instruction instruction)
			: base(block, instruction.IP)
		{
			this.instruction = instruction;
			instrKind = InstrKind.Uninitialized;
			Instruction instruction2;
			if (!blockEncoder.FixBranches)
			{
				instrKind = InstrKind.Unchanged;
				instruction2 = instruction;
				instruction2.NearBranch64 = 0uL;
				Size = blockEncoder.GetInstructionSize(in instruction2, 0uL);
				return;
			}
			instruction2 = instruction;
			instruction2.InternalSetCodeNoCheck(Code.Xbegin_rel16);
			instruction2.NearBranch64 = 0uL;
			shortInstructionSize = (byte)blockEncoder.GetInstructionSize(in instruction2, 0uL);
			instruction2 = instruction;
			instruction2.InternalSetCodeNoCheck(Code.Xbegin_rel32);
			instruction2.NearBranch64 = 0uL;
			nearInstructionSize = (byte)blockEncoder.GetInstructionSize(in instruction2, 0uL);
			Size = nearInstructionSize;
		}

		public override void Initialize(BlockEncoder blockEncoder)
		{
			targetInstr = blockEncoder.GetTarget(instruction.NearBranchTarget);
		}

		public override bool Optimize(ulong gained)
		{
			return TryOptimize(gained);
		}

		private bool TryOptimize(ulong gained)
		{
			if (instrKind == InstrKind.Unchanged || instrKind == InstrKind.Rel16)
			{
				Done = true;
				return false;
			}
			ulong address = targetInstr.GetAddress();
			ulong num = IP + shortInstructionSize;
			long diff = (long)(address - num);
			diff = Instr.CorrectDiff(targetInstr.IsInBlock(Block), diff, gained);
			if (-32768 <= diff && diff <= 32767)
			{
				instrKind = InstrKind.Rel16;
				Size = shortInstructionSize;
				return true;
			}
			instrKind = InstrKind.Rel32;
			Size = nearInstructionSize;
			return false;
		}

		public override string TryEncode(Encoder encoder, out ConstantOffsets constantOffsets, out bool isOriginalInstruction)
		{
			switch (instrKind)
			{
			case InstrKind.Unchanged:
			case InstrKind.Rel16:
			case InstrKind.Rel32:
			{
				isOriginalInstruction = true;
				if (instrKind != 0)
				{
					if (instrKind == InstrKind.Rel16)
					{
						instruction.InternalSetCodeNoCheck(Code.Xbegin_rel16);
					}
					else
					{
						instruction.InternalSetCodeNoCheck(Code.Xbegin_rel32);
					}
				}
				instruction.NearBranch64 = targetInstr.GetAddress();
				if (!encoder.TryEncode(in instruction, IP, out uint _, out string errorMessage))
				{
					constantOffsets = default(ConstantOffsets);
					return Instr.CreateErrorMessage(errorMessage, in instruction);
				}
				constantOffsets = encoder.GetConstantOffsets();
				return null;
			}
			default:
				throw new InvalidOperationException();
			}
		}
	}
}
namespace System
{
	internal static class Array2
	{
		private static class EmptyClass<T>
		{
			public static readonly T[] Empty = new T[0];
		}

		public static T[] Empty<T>()
		{
			return EmptyClass<T>.Empty;
		}
	}
	internal static class string2
	{
		[MethodImpl(MethodImplOptions.AggressiveInlining)]
		public static bool IsNullOrEmpty([NotNullWhen(false)] string value)
		{
			return string.IsNullOrEmpty(value);
		}
	}
}
namespace System.Diagnostics
{
	internal static class Debug2
	{
		[Conditional("DEBUG")]
		public static void Assert([DoesNotReturnIf(false)] bool condition)
		{
		}
	}
}